2 * Copyright (c) 1999 Seigo Tanimura
5 * Portions of this source are based on cwcealdr.cpp and dhwiface.cpp in
6 * cwcealdr1.zip, the sample sources by Crystal Semiconductor.
7 * Copyright (c) 1996-1998 Crystal Semiconductor Corp.
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
30 * $FreeBSD: src/sys/dev/sound/pci/csapcm.c,v 1.34.2.2 2006/04/04 17:32:48 ariff Exp $
33 #include <sys/soundcard.h>
34 #include <dev/sound/pcm/sound.h>
35 #include <dev/sound/pcm/ac97.h>
36 #include <dev/sound/chip.h>
37 #include <dev/sound/pci/csareg.h>
38 #include <dev/sound/pci/csavar.h>
40 #include <bus/pci/pcireg.h>
41 #include <bus/pci/pcivar.h>
43 SND_DECLARE_FILE("$DragonFly: src/sys/dev/sound/pci/csapcm.c,v 1.7 2007/01/04 21:47:02 corecode Exp $");
45 /* Buffer size on dma transfer. Fixed for CS416x. */
46 #define CS461x_BUFFSIZE (4 * 1024)
48 #define GOF_PER_SEC 200
50 /* device private data */
54 struct csa_info *parent;
55 struct pcm_channel *channel;
56 struct snd_dbuf *buffer;
63 csa_res res; /* resource */
64 void *ih; /* Interrupt cookie */
65 bus_dma_tag_t parent_dmat; /* DMA tag */
66 struct csa_bridgeinfo *binfo; /* The state of the parent. */
67 struct csa_card *card;
70 /* Contents of board's registers */
74 struct csa_chinfo pch, rch;
75 u_int32_t ac97[CS461x_AC97_NUMBER_RESTORE_REGS];
76 u_int32_t ac97_powerdown;
77 u_int32_t ac97_general_purpose;
80 /* -------------------------------------------------------------------- */
83 static int csa_init(struct csa_info *);
84 static void csa_intr(void *);
85 static void csa_setplaysamplerate(csa_res *resp, u_long ulInRate);
86 static void csa_setcapturesamplerate(csa_res *resp, u_long ulOutRate);
87 static void csa_startplaydma(struct csa_info *csa);
88 static void csa_startcapturedma(struct csa_info *csa);
89 static void csa_stopplaydma(struct csa_info *csa);
90 static void csa_stopcapturedma(struct csa_info *csa);
91 static int csa_startdsp(csa_res *resp);
92 static int csa_stopdsp(csa_res *resp);
93 static int csa_allocres(struct csa_info *scp, device_t dev);
94 static void csa_releaseres(struct csa_info *scp, device_t dev);
95 static void csa_ac97_suspend(struct csa_info *csa);
96 static void csa_ac97_resume(struct csa_info *csa);
98 static u_int32_t csa_playfmt[] = {
100 AFMT_STEREO | AFMT_U8,
102 AFMT_STEREO | AFMT_S8,
104 AFMT_STEREO | AFMT_S16_LE,
106 AFMT_STEREO | AFMT_S16_BE,
109 static struct pcmchan_caps csa_playcaps = {8000, 48000, csa_playfmt, 0};
111 static u_int32_t csa_recfmt[] = {
113 AFMT_STEREO | AFMT_S16_LE,
116 static struct pcmchan_caps csa_reccaps = {11025, 48000, csa_recfmt, 0};
118 /* -------------------------------------------------------------------- */
121 csa_active(struct csa_info *csa, int run)
128 if ((csa->active > 1) || (csa->active < -1))
130 if (csa->card->active)
131 return (csa->card->active(!(csa->active && old)));
136 /* -------------------------------------------------------------------- */
140 csa_rdcd(kobj_t obj, void *devinfo, int regno)
143 struct csa_info *csa = (struct csa_info *)devinfo;
146 if (csa_readcodec(&csa->res, regno + BA0_AC97_RESET, &data))
154 csa_wrcd(kobj_t obj, void *devinfo, int regno, u_int32_t data)
156 struct csa_info *csa = (struct csa_info *)devinfo;
159 csa_writecodec(&csa->res, regno + BA0_AC97_RESET, data);
165 static kobj_method_t csa_ac97_methods[] = {
166 KOBJMETHOD(ac97_read, csa_rdcd),
167 KOBJMETHOD(ac97_write, csa_wrcd),
170 AC97_DECLARE(csa_ac97);
173 csa_setplaysamplerate(csa_res *resp, u_long ulInRate)
175 u_long ulTemp1, ulTemp2;
177 u_long ulCorrectionPerGOF, ulCorrectionPerSec;
183 * Compute the values used to drive the actual sample rate conversion.
184 * The following formulas are being computed, using inline assembly
185 * since we need to use 64 bit arithmetic to compute the values:
187 * ulPhiIncr = floor((Fs,in * 2^26) / Fs,out)
188 * ulCorrectionPerGOF = floor((Fs,in * 2^26 - Fs,out * ulPhiIncr) /
190 * ulCorrectionPerSec = Fs,in * 2^26 - Fs,out * phiIncr -
191 * GOF_PER_SEC * ulCorrectionPerGOF
195 * ulPhiIncr:ulOther = dividend:remainder((Fs,in * 2^26) / Fs,out)
196 * ulCorrectionPerGOF:ulCorrectionPerSec =
197 * dividend:remainder(ulOther / GOF_PER_SEC)
199 ulTemp1 = ulInRate << 16;
200 ulPhiIncr = ulTemp1 / ulOutRate;
201 ulTemp1 -= ulPhiIncr * ulOutRate;
204 ulTemp2 = ulTemp1 / ulOutRate;
205 ulPhiIncr += ulTemp2;
206 ulTemp1 -= ulTemp2 * ulOutRate;
207 ulCorrectionPerGOF = ulTemp1 / GOF_PER_SEC;
208 ulTemp1 -= ulCorrectionPerGOF * GOF_PER_SEC;
209 ulCorrectionPerSec = ulTemp1;
212 * Fill in the SampleRateConverter control block.
214 csa_writemem(resp, BA1_PSRC, ((ulCorrectionPerSec << 16) & 0xFFFF0000) | (ulCorrectionPerGOF & 0xFFFF));
215 csa_writemem(resp, BA1_PPI, ulPhiIncr);
219 csa_setcapturesamplerate(csa_res *resp, u_long ulOutRate)
221 u_long ulPhiIncr, ulCoeffIncr, ulTemp1, ulTemp2;
222 u_long ulCorrectionPerGOF, ulCorrectionPerSec, ulInitialDelay;
223 u_long dwFrameGroupLength, dwCnt;
229 * We can only decimate by up to a factor of 1/9th the hardware rate.
230 * Return an error if an attempt is made to stray outside that limit.
232 if((ulOutRate * 9) < ulInRate)
236 * We can not capture at at rate greater than the Input Rate (48000).
237 * Return an error if an attempt is made to stray outside that limit.
239 if(ulOutRate > ulInRate)
243 * Compute the values used to drive the actual sample rate conversion.
244 * The following formulas are being computed, using inline assembly
245 * since we need to use 64 bit arithmetic to compute the values:
247 * ulCoeffIncr = -floor((Fs,out * 2^23) / Fs,in)
248 * ulPhiIncr = floor((Fs,in * 2^26) / Fs,out)
249 * ulCorrectionPerGOF = floor((Fs,in * 2^26 - Fs,out * ulPhiIncr) /
251 * ulCorrectionPerSec = Fs,in * 2^26 - Fs,out * phiIncr -
252 * GOF_PER_SEC * ulCorrectionPerGOF
253 * ulInitialDelay = ceil((24 * Fs,in) / Fs,out)
257 * ulCoeffIncr = neg(dividend((Fs,out * 2^23) / Fs,in))
258 * ulPhiIncr:ulOther = dividend:remainder((Fs,in * 2^26) / Fs,out)
259 * ulCorrectionPerGOF:ulCorrectionPerSec =
260 * dividend:remainder(ulOther / GOF_PER_SEC)
261 * ulInitialDelay = dividend(((24 * Fs,in) + Fs,out - 1) / Fs,out)
263 ulTemp1 = ulOutRate << 16;
264 ulCoeffIncr = ulTemp1 / ulInRate;
265 ulTemp1 -= ulCoeffIncr * ulInRate;
268 ulCoeffIncr += ulTemp1 / ulInRate;
269 ulCoeffIncr ^= 0xFFFFFFFF;
271 ulTemp1 = ulInRate << 16;
272 ulPhiIncr = ulTemp1 / ulOutRate;
273 ulTemp1 -= ulPhiIncr * ulOutRate;
276 ulTemp2 = ulTemp1 / ulOutRate;
277 ulPhiIncr += ulTemp2;
278 ulTemp1 -= ulTemp2 * ulOutRate;
279 ulCorrectionPerGOF = ulTemp1 / GOF_PER_SEC;
280 ulTemp1 -= ulCorrectionPerGOF * GOF_PER_SEC;
281 ulCorrectionPerSec = ulTemp1;
282 ulInitialDelay = ((ulInRate * 24) + ulOutRate - 1) / ulOutRate;
285 * Fill in the VariDecimate control block.
287 csa_writemem(resp, BA1_CSRC,
288 ((ulCorrectionPerSec << 16) & 0xFFFF0000) | (ulCorrectionPerGOF & 0xFFFF));
289 csa_writemem(resp, BA1_CCI, ulCoeffIncr);
290 csa_writemem(resp, BA1_CD,
291 (((BA1_VARIDEC_BUF_1 + (ulInitialDelay << 2)) << 16) & 0xFFFF0000) | 0x80);
292 csa_writemem(resp, BA1_CPI, ulPhiIncr);
295 * Figure out the frame group length for the write back task. Basically,
296 * this is just the factors of 24000 (2^6*3*5^3) that are not present in
297 * the output sample rate.
299 dwFrameGroupLength = 1;
300 for(dwCnt = 2; dwCnt <= 64; dwCnt *= 2)
302 if(((ulOutRate / dwCnt) * dwCnt) !=
305 dwFrameGroupLength *= 2;
308 if(((ulOutRate / 3) * 3) !=
311 dwFrameGroupLength *= 3;
313 for(dwCnt = 5; dwCnt <= 125; dwCnt *= 5)
315 if(((ulOutRate / dwCnt) * dwCnt) !=
318 dwFrameGroupLength *= 5;
323 * Fill in the WriteBack control block.
325 csa_writemem(resp, BA1_CFG1, dwFrameGroupLength);
326 csa_writemem(resp, BA1_CFG2, (0x00800000 | dwFrameGroupLength));
327 csa_writemem(resp, BA1_CCST, 0x0000FFFF);
328 csa_writemem(resp, BA1_CSPB, ((65536 * ulOutRate) / 24000));
329 csa_writemem(resp, (BA1_CSPB + 4), 0x0000FFFF);
333 csa_startplaydma(struct csa_info *csa)
340 ul = csa_readmem(resp, BA1_PCTL);
342 csa_writemem(resp, BA1_PCTL, ul | csa->pctl);
343 csa_writemem(resp, BA1_PVOL, 0x80008000);
349 csa_startcapturedma(struct csa_info *csa)
356 ul = csa_readmem(resp, BA1_CCTL);
358 csa_writemem(resp, BA1_CCTL, ul | csa->cctl);
359 csa_writemem(resp, BA1_CVOL, 0x80008000);
365 csa_stopplaydma(struct csa_info *csa)
372 ul = csa_readmem(resp, BA1_PCTL);
373 csa->pctl = ul & 0xffff0000;
374 csa_writemem(resp, BA1_PCTL, ul & 0x0000ffff);
375 csa_writemem(resp, BA1_PVOL, 0xffffffff);
379 * The bitwise pointer of the serial FIFO in the DSP
380 * seems to make an error upon starting or stopping the
381 * DSP. Clear the FIFO and correct the pointer if we
385 csa_clearserialfifos(resp);
386 csa_writeio(resp, BA0_SERBSP, 0);
392 csa_stopcapturedma(struct csa_info *csa)
399 ul = csa_readmem(resp, BA1_CCTL);
400 csa->cctl = ul & 0x0000ffff;
401 csa_writemem(resp, BA1_CCTL, ul & 0xffff0000);
402 csa_writemem(resp, BA1_CVOL, 0xffffffff);
406 * The bitwise pointer of the serial FIFO in the DSP
407 * seems to make an error upon starting or stopping the
408 * DSP. Clear the FIFO and correct the pointer if we
412 csa_clearserialfifos(resp);
413 csa_writeio(resp, BA0_SERBSP, 0);
419 csa_startdsp(csa_res *resp)
425 * Set the frame timer to reflect the number of cycles per frame.
427 csa_writemem(resp, BA1_FRMT, 0xadf);
430 * Turn on the run, run at frame, and DMA enable bits in the local copy of
431 * the SP control register.
433 csa_writemem(resp, BA1_SPCR, SPCR_RUN | SPCR_RUNFR | SPCR_DRQEN);
436 * Wait until the run at frame bit resets itself in the SP control
440 for (i = 0 ; i < 25 ; i++) {
442 * Wait a little bit, so we don't issue PCI reads too frequently.
446 * Fetch the current value of the SP status register.
448 ul = csa_readmem(resp, BA1_SPCR);
451 * If the run at frame bit has reset, then stop waiting.
453 if((ul & SPCR_RUNFR) == 0)
457 * If the run at frame bit never reset, then return an error.
459 if((ul & SPCR_RUNFR) != 0)
466 csa_stopdsp(csa_res *resp)
469 * Turn off the run, run at frame, and DMA enable bits in
470 * the local copy of the SP control register.
472 csa_writemem(resp, BA1_SPCR, 0);
478 csa_setupchan(struct csa_chinfo *ch)
480 struct csa_info *csa = ch->parent;
481 csa_res *resp = &csa->res;
484 if (ch->dir == PCMDIR_PLAY) {
486 csa_writemem(resp, BA1_PBA, sndbuf_getbufaddr(ch->buffer));
489 csa->pfie = csa_readmem(resp, BA1_PFIE) & ~0x0000f03f;
490 if (!(ch->fmt & AFMT_SIGNED))
492 if (ch->fmt & AFMT_BIGENDIAN)
494 if (!(ch->fmt & AFMT_STEREO))
496 if (ch->fmt & AFMT_8BIT)
498 csa_writemem(resp, BA1_PFIE, csa->pfie);
501 if (ch->fmt & AFMT_16BIT)
503 if (ch->fmt & AFMT_STEREO)
507 pdtc = csa_readmem(resp, BA1_PDTC) & ~0x000001ff;
509 csa_writemem(resp, BA1_PDTC, pdtc);
512 csa_setplaysamplerate(resp, ch->spd);
513 } else if (ch->dir == PCMDIR_REC) {
515 csa_writemem(resp, BA1_CBA, sndbuf_getbufaddr(ch->buffer));
518 csa_writemem(resp, BA1_CIE, (csa_readmem(resp, BA1_CIE) & ~0x0000003f) | 0x00000001);
521 csa_setcapturesamplerate(resp, ch->spd);
526 /* -------------------------------------------------------------------- */
527 /* channel interface */
530 csachan_init(kobj_t obj, void *devinfo, struct snd_dbuf *b, struct pcm_channel *c, int dir)
532 struct csa_info *csa = devinfo;
533 struct csa_chinfo *ch = (dir == PCMDIR_PLAY)? &csa->pch : &csa->rch;
539 if (sndbuf_alloc(ch->buffer, csa->parent_dmat, CS461x_BUFFSIZE) != 0)
545 csachan_setformat(kobj_t obj, void *data, u_int32_t format)
547 struct csa_chinfo *ch = data;
554 csachan_setspeed(kobj_t obj, void *data, u_int32_t speed)
556 struct csa_chinfo *ch = data;
559 return ch->spd; /* XXX calc real speed */
563 csachan_setblocksize(kobj_t obj, void *data, u_int32_t blocksize)
565 return CS461x_BUFFSIZE / 2;
569 csachan_trigger(kobj_t obj, void *data, int go)
571 struct csa_chinfo *ch = data;
572 struct csa_info *csa = ch->parent;
574 if (go == PCMTRIG_EMLDMAWR || go == PCMTRIG_EMLDMARD)
577 if (go == PCMTRIG_START) {
580 if (ch->dir == PCMDIR_PLAY)
581 csa_startplaydma(csa);
583 csa_startcapturedma(csa);
585 if (ch->dir == PCMDIR_PLAY)
586 csa_stopplaydma(csa);
588 csa_stopcapturedma(csa);
595 csachan_getptr(kobj_t obj, void *data)
597 struct csa_chinfo *ch = data;
598 struct csa_info *csa = ch->parent;
604 if (ch->dir == PCMDIR_PLAY) {
605 ptr = csa_readmem(resp, BA1_PBA) - sndbuf_getbufaddr(ch->buffer);
606 if ((ch->fmt & AFMT_U8) != 0 || (ch->fmt & AFMT_S8) != 0)
609 ptr = csa_readmem(resp, BA1_CBA) - sndbuf_getbufaddr(ch->buffer);
610 if ((ch->fmt & AFMT_U8) != 0 || (ch->fmt & AFMT_S8) != 0)
617 static struct pcmchan_caps *
618 csachan_getcaps(kobj_t obj, void *data)
620 struct csa_chinfo *ch = data;
621 return (ch->dir == PCMDIR_PLAY)? &csa_playcaps : &csa_reccaps;
624 static kobj_method_t csachan_methods[] = {
625 KOBJMETHOD(channel_init, csachan_init),
626 KOBJMETHOD(channel_setformat, csachan_setformat),
627 KOBJMETHOD(channel_setspeed, csachan_setspeed),
628 KOBJMETHOD(channel_setblocksize, csachan_setblocksize),
629 KOBJMETHOD(channel_trigger, csachan_trigger),
630 KOBJMETHOD(channel_getptr, csachan_getptr),
631 KOBJMETHOD(channel_getcaps, csachan_getcaps),
634 CHANNEL_DECLARE(csachan);
636 /* -------------------------------------------------------------------- */
637 /* The interrupt handler */
641 struct csa_info *csa = p;
643 if ((csa->binfo->hisr & HISR_VC0) != 0)
644 chn_intr(csa->pch.channel);
645 if ((csa->binfo->hisr & HISR_VC1) != 0)
646 chn_intr(csa->rch.channel);
649 /* -------------------------------------------------------------------- */
652 * Probe and attach the card
656 csa_init(struct csa_info *csa)
663 csa_stopplaydma(csa);
664 csa_stopcapturedma(csa);
666 if (csa_startdsp(resp))
669 /* Crank up the power on the DAC and ADC. */
670 csa_setplaysamplerate(resp, 8000);
671 csa_setcapturesamplerate(resp, 8000);
673 csa_writeio(resp, BA0_EGPIODR, EGPIODR_GPOE0);
674 csa_writeio(resp, BA0_EGPIOPTR, EGPIOPTR_GPPT0);
675 /* Power up amplifier */
676 csa_writeio(resp, BA0_EGPIODR, csa_readio(resp, BA0_EGPIODR) |
678 csa_writeio(resp, BA0_EGPIOPTR, csa_readio(resp, BA0_EGPIOPTR) |
684 /* Allocates resources. */
686 csa_allocres(struct csa_info *csa, device_t dev)
691 if (resp->io == NULL) {
692 resp->io = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
693 &resp->io_rid, RF_ACTIVE);
694 if (resp->io == NULL)
697 if (resp->mem == NULL) {
698 resp->mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
699 &resp->mem_rid, RF_ACTIVE);
700 if (resp->mem == NULL)
703 if (resp->irq == NULL) {
704 resp->irq = bus_alloc_resource_any(dev, SYS_RES_IRQ,
705 &resp->irq_rid, RF_ACTIVE | RF_SHAREABLE);
706 if (resp->irq == NULL)
709 if (bus_dma_tag_create(/*parent*/NULL, /*alignment*/CS461x_BUFFSIZE, /*boundary*/CS461x_BUFFSIZE,
710 /*lowaddr*/BUS_SPACE_MAXADDR_32BIT,
711 /*highaddr*/BUS_SPACE_MAXADDR,
712 /*filter*/NULL, /*filterarg*/NULL,
713 /*maxsize*/CS461x_BUFFSIZE, /*nsegments*/1, /*maxsegz*/0x3ffff,
715 &csa->parent_dmat) != 0)
721 /* Releases resources. */
723 csa_releaseres(struct csa_info *csa, device_t dev)
727 KASSERT(csa != NULL, ("called with bogus resource structure"));
730 if (resp->irq != NULL) {
732 bus_teardown_intr(dev, resp->irq, csa->ih);
733 bus_release_resource(dev, SYS_RES_IRQ, resp->irq_rid, resp->irq);
736 if (resp->io != NULL) {
737 bus_release_resource(dev, SYS_RES_MEMORY, resp->io_rid, resp->io);
740 if (resp->mem != NULL) {
741 bus_release_resource(dev, SYS_RES_MEMORY, resp->mem_rid, resp->mem);
744 if (csa->parent_dmat != NULL) {
745 bus_dma_tag_destroy(csa->parent_dmat);
746 csa->parent_dmat = NULL;
749 kfree(csa, M_DEVBUF);
753 pcmcsa_probe(device_t dev)
756 struct sndcard_func *func;
758 /* The parent device has already been probed. */
760 func = device_get_ivars(dev);
761 if (func == NULL || func->func != SCF_PCM)
764 s = "CS461x PCM Audio";
766 device_set_desc(dev, s);
771 pcmcsa_attach(device_t dev)
773 struct csa_info *csa;
776 char status[SND_STATUSLEN];
777 struct ac97_info *codec;
778 struct sndcard_func *func;
780 csa = kmalloc(sizeof(*csa), M_DEVBUF, M_WAITOK | M_ZERO);
781 unit = device_get_unit(dev);
782 func = device_get_ivars(dev);
783 csa->binfo = func->varinfo;
785 * Fake the status of DMA so that the initial value of
786 * PCTL and CCTL can be stored into csa->pctl and csa->cctl,
789 csa->pch.dma = csa->rch.dma = 1;
791 csa->card = csa->binfo->card;
793 /* Allocate the resources. */
795 resp->io_rid = PCIR_BAR(0);
796 resp->mem_rid = PCIR_BAR(1);
798 if (csa_allocres(csa, dev)) {
799 csa_releaseres(csa, dev);
805 csa_releaseres(csa, dev);
808 codec = AC97_CREATE(dev, csa, csa_ac97);
810 csa_releaseres(csa, dev);
813 if (csa->card->inv_eapd)
814 ac97_setflags(codec, AC97_F_EAPD_INV);
815 if (mixer_init(dev, ac97_getmixerclass(), codec) == -1) {
817 csa_releaseres(csa, dev);
821 ksnprintf(status, SND_STATUSLEN, "at irq %ld %s",
822 rman_get_start(resp->irq),PCM_KLDSTRING(snd_csa));
824 /* Enable interrupt. */
825 if (snd_setup_intr(dev, resp->irq, 0, csa_intr, csa, &csa->ih)) {
827 csa_releaseres(csa, dev);
830 csa_writemem(resp, BA1_PFIE, csa_readmem(resp, BA1_PFIE) & ~0x0000f03f);
831 csa_writemem(resp, BA1_CIE, (csa_readmem(resp, BA1_CIE) & ~0x0000003f) | 0x00000001);
834 if (pcm_register(dev, csa, 1, 1)) {
836 csa_releaseres(csa, dev);
839 pcm_addchan(dev, PCMDIR_REC, &csachan_class, csa);
840 pcm_addchan(dev, PCMDIR_PLAY, &csachan_class, csa);
841 pcm_setstatus(dev, status);
847 pcmcsa_detach(device_t dev)
850 struct csa_info *csa;
852 r = pcm_unregister(dev);
856 csa = pcm_getdevinfo(dev);
857 csa_releaseres(csa, dev);
863 csa_ac97_suspend(struct csa_info *csa)
868 for (count = 0x2, i=0;
869 (count <= CS461x_AC97_HIGHESTREGTORESTORE) &&
870 (i < CS461x_AC97_NUMBER_RESTORE_REGS);
872 csa_readcodec(&csa->res, BA0_AC97_RESET + count, &csa->ac97[i]);
874 /* mute the outputs */
875 csa_writecodec(&csa->res, BA0_AC97_MASTER_VOLUME, 0x8000);
876 csa_writecodec(&csa->res, BA0_AC97_HEADPHONE_VOLUME, 0x8000);
877 csa_writecodec(&csa->res, BA0_AC97_MASTER_VOLUME_MONO, 0x8000);
878 csa_writecodec(&csa->res, BA0_AC97_PCM_OUT_VOLUME, 0x8000);
879 /* save the registers that cause pops */
880 csa_readcodec(&csa->res, BA0_AC97_POWERDOWN, &csa->ac97_powerdown);
881 csa_readcodec(&csa->res, BA0_AC97_GENERAL_PURPOSE,
882 &csa->ac97_general_purpose);
885 * And power down everything on the AC97 codec. Well, for now,
886 * only power down the DAC/ADC and MIXER VREFON components.
887 * trouble with removing VREF.
891 csa_readcodec(&csa->res, BA0_AC97_POWERDOWN, &tmp);
892 csa_writecodec(&csa->res, BA0_AC97_POWERDOWN,
893 tmp | CS_AC97_POWER_CONTROL_MIXVON);
895 csa_readcodec(&csa->res, BA0_AC97_POWERDOWN, &tmp);
896 csa_writecodec(&csa->res, BA0_AC97_POWERDOWN,
897 tmp | CS_AC97_POWER_CONTROL_ADC);
899 csa_readcodec(&csa->res, BA0_AC97_POWERDOWN, &tmp);
900 csa_writecodec(&csa->res, BA0_AC97_POWERDOWN,
901 tmp | CS_AC97_POWER_CONTROL_DAC);
905 csa_ac97_resume(struct csa_info *csa)
910 * First, we restore the state of the general purpose register. This
911 * contains the mic select (mic1 or mic2) and if we restore this after
912 * we restore the mic volume/boost state and mic2 was selected at
913 * suspend time, we will end up with a brief period of time where mic1
914 * is selected with the volume/boost settings for mic2, causing
915 * acoustic feedback. So we restore the general purpose register
916 * first, thereby getting the correct mic selected before we restore
917 * the mic volume/boost.
919 csa_writecodec(&csa->res, BA0_AC97_GENERAL_PURPOSE,
920 csa->ac97_general_purpose);
922 * Now, while the outputs are still muted, restore the state of power
925 csa_writecodec(&csa->res, BA0_AC97_POWERDOWN, csa->ac97_powerdown);
927 * Restore just the first set of registers, from register number
928 * 0x02 to the register number that ulHighestRegToRestore specifies.
930 for (count = 0x2, i=0;
931 (count <= CS461x_AC97_HIGHESTREGTORESTORE) &&
932 (i < CS461x_AC97_NUMBER_RESTORE_REGS);
934 csa_writecodec(&csa->res, BA0_AC97_RESET + count, csa->ac97[i]);
938 pcmcsa_suspend(device_t dev)
940 struct csa_info *csa;
943 csa = pcm_getdevinfo(dev);
948 /* playback interrupt disable */
949 csa_writemem(resp, BA1_PFIE,
950 (csa_readmem(resp, BA1_PFIE) & ~0x0000f03f) | 0x00000010);
951 /* capture interrupt disable */
952 csa_writemem(resp, BA1_CIE,
953 (csa_readmem(resp, BA1_CIE) & ~0x0000003f) | 0x00000011);
954 csa_stopplaydma(csa);
955 csa_stopcapturedma(csa);
957 csa_ac97_suspend(csa);
963 * Power down the DAC and ADC. For now leave the other areas on.
965 csa_writecodec(&csa->res, BA0_AC97_POWERDOWN, 0x300);
967 * Power down the PLL.
969 csa_writemem(resp, BA0_CLKCR1, 0);
971 * Turn off the Processor by turning off the software clock
972 * enable flag in the clock control register.
974 csa_writemem(resp, BA0_CLKCR1,
975 csa_readmem(resp, BA0_CLKCR1) & ~CLKCR1_SWCE);
983 pcmcsa_resume(device_t dev)
985 struct csa_info *csa;
988 csa = pcm_getdevinfo(dev);
993 /* cs_hardware_init */
994 csa_stopplaydma(csa);
995 csa_stopcapturedma(csa);
996 csa_ac97_resume(csa);
997 if (csa_startdsp(resp))
999 /* Enable interrupts on the part. */
1000 if ((csa_readio(resp, BA0_HISR) & HISR_INTENA) == 0)
1001 csa_writeio(resp, BA0_HICR, HICR_IEV | HICR_CHGM);
1002 /* playback interrupt enable */
1003 csa_writemem(resp, BA1_PFIE, csa_readmem(resp, BA1_PFIE) & ~0x0000f03f);
1004 /* capture interrupt enable */
1005 csa_writemem(resp, BA1_CIE,
1006 (csa_readmem(resp, BA1_CIE) & ~0x0000003f) | 0x00000001);
1007 /* cs_restart_part */
1008 csa_setupchan(&csa->pch);
1009 csa_startplaydma(csa);
1010 csa_setupchan(&csa->rch);
1011 csa_startcapturedma(csa);
1013 csa_active(csa, -1);
1018 static device_method_t pcmcsa_methods[] = {
1019 /* Device interface */
1020 DEVMETHOD(device_probe , pcmcsa_probe ),
1021 DEVMETHOD(device_attach, pcmcsa_attach),
1022 DEVMETHOD(device_detach, pcmcsa_detach),
1023 DEVMETHOD(device_suspend, pcmcsa_suspend),
1024 DEVMETHOD(device_resume, pcmcsa_resume),
1029 static driver_t pcmcsa_driver = {
1035 DRIVER_MODULE(snd_csapcm, csa, pcmcsa_driver, pcm_devclass, NULL, NULL);
1036 MODULE_DEPEND(snd_csapcm, sound, SOUND_MINVER, SOUND_PREFVER, SOUND_MAXVER);
1037 MODULE_DEPEND(snd_csapcm, snd_csa, 1, 1, 1);
1038 MODULE_VERSION(snd_csapcm, 1);