2 * Copyright (c) 2004 Joerg Sonnenberger <joerg@bec.de>. All rights reserved.
4 * Copyright (c) 2001-2008, Intel Corporation
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions are met:
10 * 1. Redistributions of source code must retain the above copyright notice,
11 * this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
17 * 3. Neither the name of the Intel Corporation nor the names of its
18 * contributors may be used to endorse or promote products derived from
19 * this software without specific prior written permission.
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
22 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
25 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
26 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
29 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
31 * POSSIBILITY OF SUCH DAMAGE.
34 * Copyright (c) 2005 The DragonFly Project. All rights reserved.
36 * This code is derived from software contributed to The DragonFly Project
37 * by Matthew Dillon <dillon@backplane.com>
39 * Redistribution and use in source and binary forms, with or without
40 * modification, are permitted provided that the following conditions
43 * 1. Redistributions of source code must retain the above copyright
44 * notice, this list of conditions and the following disclaimer.
45 * 2. Redistributions in binary form must reproduce the above copyright
46 * notice, this list of conditions and the following disclaimer in
47 * the documentation and/or other materials provided with the
49 * 3. Neither the name of The DragonFly Project nor the names of its
50 * contributors may be used to endorse or promote products derived
51 * from this software without specific, prior written permission.
53 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
54 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
55 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
56 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
57 * COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
58 * INCIDENTAL, SPECIAL, EXEMPLARY OR CONSEQUENTIAL DAMAGES (INCLUDING,
59 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
60 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
61 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
62 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
63 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
68 * SERIALIZATION API RULES:
70 * - If the driver uses the same serializer for the interrupt as for the
71 * ifnet, most of the serialization will be done automatically for the
74 * - ifmedia entry points will be serialized by the ifmedia code using the
77 * - if_* entry points except for if_input will be serialized by the IF
78 * and protocol layers.
80 * - The device driver must be sure to serialize access from timeout code
81 * installed by the device driver.
83 * - The device driver typically holds the serializer at the time it wishes
86 * - We must call lwkt_serialize_handler_enable() prior to enabling the
87 * hardware interrupt and lwkt_serialize_handler_disable() after disabling
88 * the hardware interrupt in order to avoid handler execution races from
89 * scheduled interrupt threads.
91 * NOTE! Since callers into the device driver hold the ifnet serializer,
92 * the device driver may be holding a serializer at the time it calls
93 * if_input even if it is not serializer-aware.
96 #include "opt_polling.h"
98 #include <sys/param.h>
100 #include <sys/endian.h>
101 #include <sys/interrupt.h>
102 #include <sys/kernel.h>
104 #include <sys/malloc.h>
105 #include <sys/mbuf.h>
106 #include <sys/proc.h>
107 #include <sys/rman.h>
108 #include <sys/serialize.h>
109 #include <sys/socket.h>
110 #include <sys/sockio.h>
111 #include <sys/sysctl.h>
112 #include <sys/systm.h>
115 #include <net/ethernet.h>
117 #include <net/if_arp.h>
118 #include <net/if_dl.h>
119 #include <net/if_media.h>
120 #include <net/ifq_var.h>
121 #include <net/vlan/if_vlan_var.h>
122 #include <net/vlan/if_vlan_ether.h>
124 #include <netinet/in_systm.h>
125 #include <netinet/in.h>
126 #include <netinet/ip.h>
127 #include <netinet/tcp.h>
128 #include <netinet/udp.h>
130 #include <bus/pci/pcivar.h>
131 #include <bus/pci/pcireg.h>
133 #include <dev/netif/ig_hal/e1000_api.h>
134 #include <dev/netif/ig_hal/e1000_82571.h>
135 #include <dev/netif/em/if_em.h>
137 #define EM_NAME "Intel(R) PRO/1000 Network Connection "
138 #define EM_VER " 7.2.4"
140 #define _EM_DEVICE(id, ret) \
141 { EM_VENDOR_ID, E1000_DEV_ID_##id, ret, EM_NAME #id EM_VER }
142 #define EM_EMX_DEVICE(id) _EM_DEVICE(id, -100)
143 #define EM_DEVICE(id) _EM_DEVICE(id, 0)
144 #define EM_DEVICE_NULL { 0, 0, 0, NULL }
146 static const struct em_vendor_info em_vendor_info_array[] = {
148 EM_DEVICE(82540EM_LOM),
150 EM_DEVICE(82540EP_LOM),
151 EM_DEVICE(82540EP_LP),
155 EM_DEVICE(82541ER_LOM),
156 EM_DEVICE(82541EI_MOBILE),
158 EM_DEVICE(82541GI_LF),
159 EM_DEVICE(82541GI_MOBILE),
163 EM_DEVICE(82543GC_FIBER),
164 EM_DEVICE(82543GC_COPPER),
166 EM_DEVICE(82544EI_COPPER),
167 EM_DEVICE(82544EI_FIBER),
168 EM_DEVICE(82544GC_COPPER),
169 EM_DEVICE(82544GC_LOM),
171 EM_DEVICE(82545EM_COPPER),
172 EM_DEVICE(82545EM_FIBER),
173 EM_DEVICE(82545GM_COPPER),
174 EM_DEVICE(82545GM_FIBER),
175 EM_DEVICE(82545GM_SERDES),
177 EM_DEVICE(82546EB_COPPER),
178 EM_DEVICE(82546EB_FIBER),
179 EM_DEVICE(82546EB_QUAD_COPPER),
180 EM_DEVICE(82546GB_COPPER),
181 EM_DEVICE(82546GB_FIBER),
182 EM_DEVICE(82546GB_SERDES),
183 EM_DEVICE(82546GB_PCIE),
184 EM_DEVICE(82546GB_QUAD_COPPER),
185 EM_DEVICE(82546GB_QUAD_COPPER_KSP3),
188 EM_DEVICE(82547EI_MOBILE),
191 EM_EMX_DEVICE(82571EB_COPPER),
192 EM_EMX_DEVICE(82571EB_FIBER),
193 EM_EMX_DEVICE(82571EB_SERDES),
194 EM_EMX_DEVICE(82571EB_SERDES_DUAL),
195 EM_EMX_DEVICE(82571EB_SERDES_QUAD),
196 EM_EMX_DEVICE(82571EB_QUAD_COPPER),
197 EM_EMX_DEVICE(82571EB_QUAD_COPPER_BP),
198 EM_EMX_DEVICE(82571EB_QUAD_COPPER_LP),
199 EM_EMX_DEVICE(82571EB_QUAD_FIBER),
200 EM_EMX_DEVICE(82571PT_QUAD_COPPER),
202 EM_EMX_DEVICE(82572EI_COPPER),
203 EM_EMX_DEVICE(82572EI_FIBER),
204 EM_EMX_DEVICE(82572EI_SERDES),
205 EM_EMX_DEVICE(82572EI),
207 EM_EMX_DEVICE(82573E),
208 EM_EMX_DEVICE(82573E_IAMT),
209 EM_EMX_DEVICE(82573L),
213 EM_EMX_DEVICE(80003ES2LAN_COPPER_SPT),
214 EM_EMX_DEVICE(80003ES2LAN_SERDES_SPT),
215 EM_EMX_DEVICE(80003ES2LAN_COPPER_DPT),
216 EM_EMX_DEVICE(80003ES2LAN_SERDES_DPT),
218 EM_DEVICE(ICH8_IGP_M_AMT),
219 EM_DEVICE(ICH8_IGP_AMT),
220 EM_DEVICE(ICH8_IGP_C),
222 EM_DEVICE(ICH8_IFE_GT),
223 EM_DEVICE(ICH8_IFE_G),
224 EM_DEVICE(ICH8_IGP_M),
225 EM_DEVICE(ICH8_82567V_3),
227 EM_DEVICE(ICH9_IGP_M_AMT),
228 EM_DEVICE(ICH9_IGP_AMT),
229 EM_DEVICE(ICH9_IGP_C),
230 EM_DEVICE(ICH9_IGP_M),
231 EM_DEVICE(ICH9_IGP_M_V),
233 EM_DEVICE(ICH9_IFE_GT),
234 EM_DEVICE(ICH9_IFE_G),
237 EM_EMX_DEVICE(82574L),
238 EM_EMX_DEVICE(82574LA),
240 EM_DEVICE(ICH10_R_BM_LM),
241 EM_DEVICE(ICH10_R_BM_LF),
242 EM_DEVICE(ICH10_R_BM_V),
243 EM_DEVICE(ICH10_D_BM_LM),
244 EM_DEVICE(ICH10_D_BM_LF),
245 EM_DEVICE(ICH10_D_BM_V),
247 EM_DEVICE(PCH_M_HV_LM),
248 EM_DEVICE(PCH_M_HV_LC),
249 EM_DEVICE(PCH_D_HV_DM),
250 EM_DEVICE(PCH_D_HV_DC),
252 EM_DEVICE(PCH2_LV_LM),
253 EM_DEVICE(PCH2_LV_V),
255 /* required last entry */
259 static int em_probe(device_t);
260 static int em_attach(device_t);
261 static int em_detach(device_t);
262 static int em_shutdown(device_t);
263 static int em_suspend(device_t);
264 static int em_resume(device_t);
266 static void em_init(void *);
267 static void em_stop(struct adapter *);
268 static int em_ioctl(struct ifnet *, u_long, caddr_t, struct ucred *);
269 static void em_start(struct ifnet *);
270 #ifdef DEVICE_POLLING
271 static void em_poll(struct ifnet *, enum poll_cmd, int);
273 static void em_watchdog(struct ifnet *);
274 static void em_media_status(struct ifnet *, struct ifmediareq *);
275 static int em_media_change(struct ifnet *);
276 static void em_timer(void *);
278 static void em_intr(void *);
279 static void em_intr_mask(void *);
280 static void em_intr_body(struct adapter *, boolean_t);
281 static void em_rxeof(struct adapter *, int);
282 static void em_txeof(struct adapter *);
283 static void em_tx_collect(struct adapter *);
284 static void em_tx_purge(struct adapter *);
285 static void em_enable_intr(struct adapter *);
286 static void em_disable_intr(struct adapter *);
288 static int em_dma_malloc(struct adapter *, bus_size_t,
289 struct em_dma_alloc *);
290 static void em_dma_free(struct adapter *, struct em_dma_alloc *);
291 static void em_init_tx_ring(struct adapter *);
292 static int em_init_rx_ring(struct adapter *);
293 static int em_create_tx_ring(struct adapter *);
294 static int em_create_rx_ring(struct adapter *);
295 static void em_destroy_tx_ring(struct adapter *, int);
296 static void em_destroy_rx_ring(struct adapter *, int);
297 static int em_newbuf(struct adapter *, int, int);
298 static int em_encap(struct adapter *, struct mbuf **);
299 static void em_rxcsum(struct adapter *, struct e1000_rx_desc *,
301 static int em_txcsum(struct adapter *, struct mbuf *,
302 uint32_t *, uint32_t *);
304 static int em_get_hw_info(struct adapter *);
305 static int em_is_valid_eaddr(const uint8_t *);
306 static int em_alloc_pci_res(struct adapter *);
307 static void em_free_pci_res(struct adapter *);
308 static int em_reset(struct adapter *);
309 static void em_setup_ifp(struct adapter *);
310 static void em_init_tx_unit(struct adapter *);
311 static void em_init_rx_unit(struct adapter *);
312 static void em_update_stats(struct adapter *);
313 static void em_set_promisc(struct adapter *);
314 static void em_disable_promisc(struct adapter *);
315 static void em_set_multi(struct adapter *);
316 static void em_update_link_status(struct adapter *);
317 static void em_smartspeed(struct adapter *);
318 static void em_set_itr(struct adapter *, uint32_t);
319 static void em_disable_aspm(struct adapter *);
321 /* Hardware workarounds */
322 static int em_82547_fifo_workaround(struct adapter *, int);
323 static void em_82547_update_fifo_head(struct adapter *, int);
324 static int em_82547_tx_fifo_reset(struct adapter *);
325 static void em_82547_move_tail(void *);
326 static void em_82547_move_tail_serialized(struct adapter *);
327 static uint32_t em_82544_fill_desc(bus_addr_t, uint32_t, PDESC_ARRAY);
329 static void em_print_debug_info(struct adapter *);
330 static void em_print_nvm_info(struct adapter *);
331 static void em_print_hw_stats(struct adapter *);
333 static int em_sysctl_stats(SYSCTL_HANDLER_ARGS);
334 static int em_sysctl_debug_info(SYSCTL_HANDLER_ARGS);
335 static int em_sysctl_int_throttle(SYSCTL_HANDLER_ARGS);
336 static int em_sysctl_int_tx_nsegs(SYSCTL_HANDLER_ARGS);
337 static void em_add_sysctl(struct adapter *adapter);
339 /* Management and WOL Support */
340 static void em_get_mgmt(struct adapter *);
341 static void em_rel_mgmt(struct adapter *);
342 static void em_get_hw_control(struct adapter *);
343 static void em_rel_hw_control(struct adapter *);
344 static void em_enable_wol(device_t);
346 static device_method_t em_methods[] = {
347 /* Device interface */
348 DEVMETHOD(device_probe, em_probe),
349 DEVMETHOD(device_attach, em_attach),
350 DEVMETHOD(device_detach, em_detach),
351 DEVMETHOD(device_shutdown, em_shutdown),
352 DEVMETHOD(device_suspend, em_suspend),
353 DEVMETHOD(device_resume, em_resume),
357 static driver_t em_driver = {
360 sizeof(struct adapter),
363 static devclass_t em_devclass;
365 DECLARE_DUMMY_MODULE(if_em);
366 MODULE_DEPEND(em, ig_hal, 1, 1, 1);
367 DRIVER_MODULE(if_em, pci, em_driver, em_devclass, NULL, NULL);
372 static int em_int_throttle_ceil = EM_DEFAULT_ITR;
373 static int em_rxd = EM_DEFAULT_RXD;
374 static int em_txd = EM_DEFAULT_TXD;
375 static int em_smart_pwr_down = 0;
377 /* Controls whether promiscuous also shows bad packets */
378 static int em_debug_sbp = FALSE;
380 static int em_82573_workaround = 1;
381 static int em_msi_enable = 1;
383 TUNABLE_INT("hw.em.int_throttle_ceil", &em_int_throttle_ceil);
384 TUNABLE_INT("hw.em.rxd", &em_rxd);
385 TUNABLE_INT("hw.em.txd", &em_txd);
386 TUNABLE_INT("hw.em.smart_pwr_down", &em_smart_pwr_down);
387 TUNABLE_INT("hw.em.sbp", &em_debug_sbp);
388 TUNABLE_INT("hw.em.82573_workaround", &em_82573_workaround);
389 TUNABLE_INT("hw.em.msi.enable", &em_msi_enable);
391 /* Global used in WOL setup with multiport cards */
392 static int em_global_quad_port_a = 0;
394 /* Set this to one to display debug statistics */
395 static int em_display_debug_stats = 0;
397 #if !defined(KTR_IF_EM)
398 #define KTR_IF_EM KTR_ALL
400 KTR_INFO_MASTER(if_em);
401 KTR_INFO(KTR_IF_EM, if_em, intr_beg, 0, "intr begin");
402 KTR_INFO(KTR_IF_EM, if_em, intr_end, 1, "intr end");
403 KTR_INFO(KTR_IF_EM, if_em, pkt_receive, 4, "rx packet");
404 KTR_INFO(KTR_IF_EM, if_em, pkt_txqueue, 5, "tx packet");
405 KTR_INFO(KTR_IF_EM, if_em, pkt_txclean, 6, "tx clean");
406 #define logif(name) KTR_LOG(if_em_ ## name)
409 em_probe(device_t dev)
411 const struct em_vendor_info *ent;
414 vid = pci_get_vendor(dev);
415 did = pci_get_device(dev);
417 for (ent = em_vendor_info_array; ent->desc != NULL; ++ent) {
418 if (vid == ent->vendor_id && did == ent->device_id) {
419 device_set_desc(dev, ent->desc);
420 device_set_async_attach(dev, TRUE);
428 em_attach(device_t dev)
430 struct adapter *adapter = device_get_softc(dev);
431 struct ifnet *ifp = &adapter->arpcom.ac_if;
434 uint16_t eeprom_data, device_id, apme_mask;
435 driver_intr_t *intr_func;
437 adapter->dev = adapter->osdep.dev = dev;
439 callout_init_mp(&adapter->timer);
440 callout_init_mp(&adapter->tx_fifo_timer);
442 /* Determine hardware and mac info */
443 error = em_get_hw_info(adapter);
445 device_printf(dev, "Identify hardware failed\n");
449 /* Setup PCI resources */
450 error = em_alloc_pci_res(adapter);
452 device_printf(dev, "Allocation of PCI resources failed\n");
457 * For ICH8 and family we need to map the flash memory,
458 * and this must happen after the MAC is identified.
460 if (adapter->hw.mac.type == e1000_ich8lan ||
461 adapter->hw.mac.type == e1000_ich9lan ||
462 adapter->hw.mac.type == e1000_ich10lan ||
463 adapter->hw.mac.type == e1000_pchlan ||
464 adapter->hw.mac.type == e1000_pch2lan) {
465 adapter->flash_rid = EM_BAR_FLASH;
467 adapter->flash = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
468 &adapter->flash_rid, RF_ACTIVE);
469 if (adapter->flash == NULL) {
470 device_printf(dev, "Mapping of Flash failed\n");
474 adapter->osdep.flash_bus_space_tag =
475 rman_get_bustag(adapter->flash);
476 adapter->osdep.flash_bus_space_handle =
477 rman_get_bushandle(adapter->flash);
480 * This is used in the shared code
481 * XXX this goof is actually not used.
483 adapter->hw.flash_address = (uint8_t *)adapter->flash;
486 /* Do Shared Code initialization */
487 if (e1000_setup_init_funcs(&adapter->hw, TRUE)) {
488 device_printf(dev, "Setup of Shared code failed\n");
493 e1000_get_bus_info(&adapter->hw);
496 * Validate number of transmit and receive descriptors. It
497 * must not exceed hardware maximum, and must be multiple
498 * of E1000_DBA_ALIGN.
500 if ((em_txd * sizeof(struct e1000_tx_desc)) % EM_DBA_ALIGN != 0 ||
501 (adapter->hw.mac.type >= e1000_82544 && em_txd > EM_MAX_TXD) ||
502 (adapter->hw.mac.type < e1000_82544 && em_txd > EM_MAX_TXD_82543) ||
503 em_txd < EM_MIN_TXD) {
504 device_printf(dev, "Using %d TX descriptors instead of %d!\n",
505 EM_DEFAULT_TXD, em_txd);
506 adapter->num_tx_desc = EM_DEFAULT_TXD;
508 adapter->num_tx_desc = em_txd;
510 if ((em_rxd * sizeof(struct e1000_rx_desc)) % EM_DBA_ALIGN != 0 ||
511 (adapter->hw.mac.type >= e1000_82544 && em_rxd > EM_MAX_RXD) ||
512 (adapter->hw.mac.type < e1000_82544 && em_rxd > EM_MAX_RXD_82543) ||
513 em_rxd < EM_MIN_RXD) {
514 device_printf(dev, "Using %d RX descriptors instead of %d!\n",
515 EM_DEFAULT_RXD, em_rxd);
516 adapter->num_rx_desc = EM_DEFAULT_RXD;
518 adapter->num_rx_desc = em_rxd;
521 adapter->hw.mac.autoneg = DO_AUTO_NEG;
522 adapter->hw.phy.autoneg_wait_to_complete = FALSE;
523 adapter->hw.phy.autoneg_advertised = AUTONEG_ADV_DEFAULT;
524 adapter->rx_buffer_len = MCLBYTES;
527 * Interrupt throttle rate
529 if (em_int_throttle_ceil == 0) {
530 adapter->int_throttle_ceil = 0;
532 int throttle = em_int_throttle_ceil;
535 throttle = EM_DEFAULT_ITR;
537 /* Recalculate the tunable value to get the exact frequency. */
538 throttle = 1000000000 / 256 / throttle;
540 /* Upper 16bits of ITR is reserved and should be zero */
541 if (throttle & 0xffff0000)
542 throttle = 1000000000 / 256 / EM_DEFAULT_ITR;
544 adapter->int_throttle_ceil = 1000000000 / 256 / throttle;
547 e1000_init_script_state_82541(&adapter->hw, TRUE);
548 e1000_set_tbi_compatibility_82543(&adapter->hw, TRUE);
551 if (adapter->hw.phy.media_type == e1000_media_type_copper) {
552 adapter->hw.phy.mdix = AUTO_ALL_MODES;
553 adapter->hw.phy.disable_polarity_correction = FALSE;
554 adapter->hw.phy.ms_type = EM_MASTER_SLAVE;
557 /* Set the frame limits assuming standard ethernet sized frames. */
558 adapter->max_frame_size = ETHERMTU + ETHER_HDR_LEN + ETHER_CRC_LEN;
559 adapter->min_frame_size = ETH_ZLEN + ETHER_CRC_LEN;
561 /* This controls when hardware reports transmit completion status. */
562 adapter->hw.mac.report_tx_early = 1;
565 * Create top level busdma tag
567 error = bus_dma_tag_create(NULL, 1, 0,
568 BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR,
570 BUS_SPACE_MAXSIZE_32BIT, 0, BUS_SPACE_MAXSIZE_32BIT,
571 0, &adapter->parent_dtag);
573 device_printf(dev, "could not create top level DMA tag\n");
578 * Allocate Transmit Descriptor ring
580 tsize = roundup2(adapter->num_tx_desc * sizeof(struct e1000_tx_desc),
582 error = em_dma_malloc(adapter, tsize, &adapter->txdma);
584 device_printf(dev, "Unable to allocate tx_desc memory\n");
587 adapter->tx_desc_base = adapter->txdma.dma_vaddr;
590 * Allocate Receive Descriptor ring
592 rsize = roundup2(adapter->num_rx_desc * sizeof(struct e1000_rx_desc),
594 error = em_dma_malloc(adapter, rsize, &adapter->rxdma);
596 device_printf(dev, "Unable to allocate rx_desc memory\n");
599 adapter->rx_desc_base = adapter->rxdma.dma_vaddr;
601 /* Allocate multicast array memory. */
602 adapter->mta = kmalloc(ETH_ADDR_LEN * MAX_NUM_MULTICAST_ADDRESSES,
605 /* Indicate SOL/IDER usage */
606 if (e1000_check_reset_block(&adapter->hw)) {
608 "PHY reset is blocked due to SOL/IDER session.\n");
612 * Start from a known state, this is important in reading the
613 * nvm and mac from that.
615 e1000_reset_hw(&adapter->hw);
617 /* Make sure we have a good EEPROM before we read from it */
618 if (e1000_validate_nvm_checksum(&adapter->hw) < 0) {
620 * Some PCI-E parts fail the first check due to
621 * the link being in sleep state, call it again,
622 * if it fails a second time its a real issue.
624 if (e1000_validate_nvm_checksum(&adapter->hw) < 0) {
626 "The EEPROM Checksum Is Not Valid\n");
632 /* Copy the permanent MAC address out of the EEPROM */
633 if (e1000_read_mac_addr(&adapter->hw) < 0) {
634 device_printf(dev, "EEPROM read error while reading MAC"
639 if (!em_is_valid_eaddr(adapter->hw.mac.addr)) {
640 device_printf(dev, "Invalid MAC address\n");
645 /* Allocate transmit descriptors and buffers */
646 error = em_create_tx_ring(adapter);
648 device_printf(dev, "Could not setup transmit structures\n");
652 /* Allocate receive descriptors and buffers */
653 error = em_create_rx_ring(adapter);
655 device_printf(dev, "Could not setup receive structures\n");
659 /* Manually turn off all interrupts */
660 E1000_WRITE_REG(&adapter->hw, E1000_IMC, 0xffffffff);
662 /* Determine if we have to control management hardware */
663 if (e1000_enable_mng_pass_thru(&adapter->hw))
664 adapter->flags |= EM_FLAG_HAS_MGMT;
669 apme_mask = EM_EEPROM_APME;
671 switch (adapter->hw.mac.type) {
678 adapter->flags |= EM_FLAG_HAS_AMT;
682 case e1000_82546_rev_3:
685 case e1000_80003es2lan:
686 if (adapter->hw.bus.func == 1) {
687 e1000_read_nvm(&adapter->hw,
688 NVM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
690 e1000_read_nvm(&adapter->hw,
691 NVM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
700 apme_mask = E1000_WUC_APME;
701 adapter->flags |= EM_FLAG_HAS_AMT;
702 eeprom_data = E1000_READ_REG(&adapter->hw, E1000_WUC);
706 e1000_read_nvm(&adapter->hw,
707 NVM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
710 if (eeprom_data & apme_mask)
711 adapter->wol = E1000_WUFC_MAG | E1000_WUFC_MC;
714 * We have the eeprom settings, now apply the special cases
715 * where the eeprom may be wrong or the board won't support
716 * wake on lan on a particular port
718 device_id = pci_get_device(dev);
720 case E1000_DEV_ID_82546GB_PCIE:
724 case E1000_DEV_ID_82546EB_FIBER:
725 case E1000_DEV_ID_82546GB_FIBER:
726 case E1000_DEV_ID_82571EB_FIBER:
728 * Wake events only supported on port A for dual fiber
729 * regardless of eeprom setting
731 if (E1000_READ_REG(&adapter->hw, E1000_STATUS) &
736 case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
737 case E1000_DEV_ID_82571EB_QUAD_COPPER:
738 case E1000_DEV_ID_82571EB_QUAD_FIBER:
739 case E1000_DEV_ID_82571EB_QUAD_COPPER_LP:
740 /* if quad port adapter, disable WoL on all but port A */
741 if (em_global_quad_port_a != 0)
743 /* Reset for multiple quad port adapters */
744 if (++em_global_quad_port_a == 4)
745 em_global_quad_port_a = 0;
749 /* XXX disable wol */
752 /* Setup OS specific network interface */
753 em_setup_ifp(adapter);
755 /* Add sysctl tree, must after em_setup_ifp() */
756 em_add_sysctl(adapter);
758 /* Reset the hardware */
759 error = em_reset(adapter);
761 device_printf(dev, "Unable to reset the hardware\n");
765 /* Initialize statistics */
766 em_update_stats(adapter);
768 adapter->hw.mac.get_link_status = 1;
769 em_update_link_status(adapter);
771 /* Do we need workaround for 82544 PCI-X adapter? */
772 if (adapter->hw.bus.type == e1000_bus_type_pcix &&
773 adapter->hw.mac.type == e1000_82544)
774 adapter->pcix_82544 = TRUE;
776 adapter->pcix_82544 = FALSE;
778 if (adapter->pcix_82544) {
780 * 82544 on PCI-X may split one TX segment
781 * into two TX descs, so we double its number
782 * of spare TX desc here.
784 adapter->spare_tx_desc = 2 * EM_TX_SPARE;
786 adapter->spare_tx_desc = EM_TX_SPARE;
790 * Keep following relationship between spare_tx_desc, oact_tx_desc
792 * (spare_tx_desc + EM_TX_RESERVED) <=
793 * oact_tx_desc <= EM_TX_OACTIVE_MAX <= tx_int_nsegs
795 adapter->oact_tx_desc = adapter->num_tx_desc / 8;
796 if (adapter->oact_tx_desc > EM_TX_OACTIVE_MAX)
797 adapter->oact_tx_desc = EM_TX_OACTIVE_MAX;
798 if (adapter->oact_tx_desc < adapter->spare_tx_desc + EM_TX_RESERVED)
799 adapter->oact_tx_desc = adapter->spare_tx_desc + EM_TX_RESERVED;
801 adapter->tx_int_nsegs = adapter->num_tx_desc / 16;
802 if (adapter->tx_int_nsegs < adapter->oact_tx_desc)
803 adapter->tx_int_nsegs = adapter->oact_tx_desc;
805 /* Non-AMT based hardware can now take control from firmware */
806 if ((adapter->flags & (EM_FLAG_HAS_MGMT | EM_FLAG_HAS_AMT)) ==
807 EM_FLAG_HAS_MGMT && adapter->hw.mac.type >= e1000_82571)
808 em_get_hw_control(adapter);
811 * Missing Interrupt Following ICR read:
813 * 82571/82572 specification update errata #76
814 * 82573 specification update errata #31
815 * 82574 specification update errata #12
816 * 82583 specification update errata #4
819 if ((adapter->flags & EM_FLAG_SHARED_INTR) &&
820 (adapter->hw.mac.type == e1000_82571 ||
821 adapter->hw.mac.type == e1000_82572 ||
822 adapter->hw.mac.type == e1000_82573 ||
823 adapter->hw.mac.type == e1000_82574 ||
824 adapter->hw.mac.type == e1000_82583))
825 intr_func = em_intr_mask;
827 error = bus_setup_intr(dev, adapter->intr_res, INTR_MPSAFE,
828 intr_func, adapter, &adapter->intr_tag,
831 device_printf(dev, "Failed to register interrupt handler");
832 ether_ifdetach(&adapter->arpcom.ac_if);
836 ifp->if_cpuid = rman_get_cpuid(adapter->intr_res);
837 KKASSERT(ifp->if_cpuid >= 0 && ifp->if_cpuid < ncpus);
845 em_detach(device_t dev)
847 struct adapter *adapter = device_get_softc(dev);
849 if (device_is_attached(dev)) {
850 struct ifnet *ifp = &adapter->arpcom.ac_if;
852 lwkt_serialize_enter(ifp->if_serializer);
856 e1000_phy_hw_reset(&adapter->hw);
858 em_rel_mgmt(adapter);
859 em_rel_hw_control(adapter);
862 E1000_WRITE_REG(&adapter->hw, E1000_WUC,
864 E1000_WRITE_REG(&adapter->hw, E1000_WUFC, adapter->wol);
868 bus_teardown_intr(dev, adapter->intr_res, adapter->intr_tag);
870 lwkt_serialize_exit(ifp->if_serializer);
873 } else if (adapter->memory != NULL) {
874 em_rel_hw_control(adapter);
876 bus_generic_detach(dev);
878 em_free_pci_res(adapter);
880 em_destroy_tx_ring(adapter, adapter->num_tx_desc);
881 em_destroy_rx_ring(adapter, adapter->num_rx_desc);
883 /* Free Transmit Descriptor ring */
884 if (adapter->tx_desc_base)
885 em_dma_free(adapter, &adapter->txdma);
887 /* Free Receive Descriptor ring */
888 if (adapter->rx_desc_base)
889 em_dma_free(adapter, &adapter->rxdma);
891 /* Free top level busdma tag */
892 if (adapter->parent_dtag != NULL)
893 bus_dma_tag_destroy(adapter->parent_dtag);
895 /* Free sysctl tree */
896 if (adapter->sysctl_tree != NULL)
897 sysctl_ctx_free(&adapter->sysctl_ctx);
899 if (adapter->mta != NULL)
900 kfree(adapter->mta, M_DEVBUF);
906 em_shutdown(device_t dev)
908 return em_suspend(dev);
912 em_suspend(device_t dev)
914 struct adapter *adapter = device_get_softc(dev);
915 struct ifnet *ifp = &adapter->arpcom.ac_if;
917 lwkt_serialize_enter(ifp->if_serializer);
921 em_rel_mgmt(adapter);
922 em_rel_hw_control(adapter);
925 E1000_WRITE_REG(&adapter->hw, E1000_WUC, E1000_WUC_PME_EN);
926 E1000_WRITE_REG(&adapter->hw, E1000_WUFC, adapter->wol);
930 lwkt_serialize_exit(ifp->if_serializer);
932 return bus_generic_suspend(dev);
936 em_resume(device_t dev)
938 struct adapter *adapter = device_get_softc(dev);
939 struct ifnet *ifp = &adapter->arpcom.ac_if;
941 lwkt_serialize_enter(ifp->if_serializer);
944 em_get_mgmt(adapter);
947 lwkt_serialize_exit(ifp->if_serializer);
949 return bus_generic_resume(dev);
953 em_start(struct ifnet *ifp)
955 struct adapter *adapter = ifp->if_softc;
958 ASSERT_SERIALIZED(ifp->if_serializer);
960 if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING)
963 if (!adapter->link_active) {
964 ifq_purge(&ifp->if_snd);
968 while (!ifq_is_empty(&ifp->if_snd)) {
969 /* Now do we at least have a minimal? */
970 if (EM_IS_OACTIVE(adapter)) {
971 em_tx_collect(adapter);
972 if (EM_IS_OACTIVE(adapter)) {
973 ifp->if_flags |= IFF_OACTIVE;
974 adapter->no_tx_desc_avail1++;
980 m_head = ifq_dequeue(&ifp->if_snd, NULL);
984 if (em_encap(adapter, &m_head)) {
986 em_tx_collect(adapter);
990 /* Send a copy of the frame to the BPF listener */
991 ETHER_BPF_MTAP(ifp, m_head);
993 /* Set timeout in case hardware has problems transmitting. */
994 ifp->if_timer = EM_TX_TIMEOUT;
999 em_ioctl(struct ifnet *ifp, u_long command, caddr_t data, struct ucred *cr)
1001 struct adapter *adapter = ifp->if_softc;
1002 struct ifreq *ifr = (struct ifreq *)data;
1003 uint16_t eeprom_data = 0;
1004 int max_frame_size, mask, reinit;
1007 ASSERT_SERIALIZED(ifp->if_serializer);
1011 switch (adapter->hw.mac.type) {
1014 * 82573 only supports jumbo frames
1015 * if ASPM is disabled.
1017 e1000_read_nvm(&adapter->hw,
1018 NVM_INIT_3GIO_3, 1, &eeprom_data);
1019 if (eeprom_data & NVM_WORD1A_ASPM_MASK) {
1020 max_frame_size = ETHER_MAX_LEN;
1025 /* Limit Jumbo Frame size */
1029 case e1000_ich10lan:
1033 case e1000_80003es2lan:
1034 max_frame_size = 9234;
1038 max_frame_size = 4096;
1041 /* Adapters that do not support jumbo frames */
1044 max_frame_size = ETHER_MAX_LEN;
1048 max_frame_size = MAX_JUMBO_FRAME_SIZE;
1051 if (ifr->ifr_mtu > max_frame_size - ETHER_HDR_LEN -
1057 ifp->if_mtu = ifr->ifr_mtu;
1058 adapter->max_frame_size =
1059 ifp->if_mtu + ETHER_HDR_LEN + ETHER_CRC_LEN;
1061 if (ifp->if_flags & IFF_RUNNING)
1066 if (ifp->if_flags & IFF_UP) {
1067 if ((ifp->if_flags & IFF_RUNNING)) {
1068 if ((ifp->if_flags ^ adapter->if_flags) &
1069 (IFF_PROMISC | IFF_ALLMULTI)) {
1070 em_disable_promisc(adapter);
1071 em_set_promisc(adapter);
1076 } else if (ifp->if_flags & IFF_RUNNING) {
1079 adapter->if_flags = ifp->if_flags;
1084 if (ifp->if_flags & IFF_RUNNING) {
1085 em_disable_intr(adapter);
1086 em_set_multi(adapter);
1087 if (adapter->hw.mac.type == e1000_82542 &&
1088 adapter->hw.revision_id == E1000_REVISION_2)
1089 em_init_rx_unit(adapter);
1090 #ifdef DEVICE_POLLING
1091 if (!(ifp->if_flags & IFF_POLLING))
1093 em_enable_intr(adapter);
1098 /* Check SOL/IDER usage */
1099 if (e1000_check_reset_block(&adapter->hw)) {
1100 device_printf(adapter->dev, "Media change is"
1101 " blocked due to SOL/IDER session.\n");
1107 error = ifmedia_ioctl(ifp, ifr, &adapter->media, command);
1112 mask = ifr->ifr_reqcap ^ ifp->if_capenable;
1113 if (mask & IFCAP_RXCSUM) {
1114 ifp->if_capenable ^= IFCAP_RXCSUM;
1117 if (mask & IFCAP_TXCSUM) {
1118 ifp->if_capenable ^= IFCAP_TXCSUM;
1119 if (ifp->if_capenable & IFCAP_TXCSUM)
1120 ifp->if_hwassist |= EM_CSUM_FEATURES;
1122 ifp->if_hwassist &= ~EM_CSUM_FEATURES;
1124 if (mask & IFCAP_VLAN_HWTAGGING) {
1125 ifp->if_capenable ^= IFCAP_VLAN_HWTAGGING;
1128 if (reinit && (ifp->if_flags & IFF_RUNNING))
1133 error = ether_ioctl(ifp, command, data);
1140 em_watchdog(struct ifnet *ifp)
1142 struct adapter *adapter = ifp->if_softc;
1144 ASSERT_SERIALIZED(ifp->if_serializer);
1147 * The timer is set to 5 every time start queues a packet.
1148 * Then txeof keeps resetting it as long as it cleans at
1149 * least one descriptor.
1150 * Finally, anytime all descriptors are clean the timer is
1154 if (E1000_READ_REG(&adapter->hw, E1000_TDT(0)) ==
1155 E1000_READ_REG(&adapter->hw, E1000_TDH(0))) {
1157 * If we reach here, all TX jobs are completed and
1158 * the TX engine should have been idled for some time.
1159 * We don't need to call if_devstart() here.
1161 ifp->if_flags &= ~IFF_OACTIVE;
1167 * If we are in this routine because of pause frames, then
1168 * don't reset the hardware.
1170 if (E1000_READ_REG(&adapter->hw, E1000_STATUS) &
1171 E1000_STATUS_TXOFF) {
1172 ifp->if_timer = EM_TX_TIMEOUT;
1176 if (e1000_check_for_link(&adapter->hw) == 0)
1177 if_printf(ifp, "watchdog timeout -- resetting\n");
1180 adapter->watchdog_events++;
1184 if (!ifq_is_empty(&ifp->if_snd))
1191 struct adapter *adapter = xsc;
1192 struct ifnet *ifp = &adapter->arpcom.ac_if;
1193 device_t dev = adapter->dev;
1196 ASSERT_SERIALIZED(ifp->if_serializer);
1201 * Packet Buffer Allocation (PBA)
1202 * Writing PBA sets the receive portion of the buffer
1203 * the remainder is used for the transmit buffer.
1205 * Devices before the 82547 had a Packet Buffer of 64K.
1206 * Default allocation: PBA=48K for Rx, leaving 16K for Tx.
1207 * After the 82547 the buffer was reduced to 40K.
1208 * Default allocation: PBA=30K for Rx, leaving 10K for Tx.
1209 * Note: default does not leave enough room for Jumbo Frame >10k.
1211 switch (adapter->hw.mac.type) {
1213 case e1000_82547_rev_2: /* 82547: Total Packet Buffer is 40K */
1214 if (adapter->max_frame_size > 8192)
1215 pba = E1000_PBA_22K; /* 22K for Rx, 18K for Tx */
1217 pba = E1000_PBA_30K; /* 30K for Rx, 10K for Tx */
1218 adapter->tx_fifo_head = 0;
1219 adapter->tx_head_addr = pba << EM_TX_HEAD_ADDR_SHIFT;
1220 adapter->tx_fifo_size =
1221 (E1000_PBA_40K - pba) << EM_PBA_BYTES_SHIFT;
1224 /* Total Packet Buffer on these is 48K */
1227 case e1000_80003es2lan:
1228 pba = E1000_PBA_32K; /* 32K for Rx, 16K for Tx */
1231 case e1000_82573: /* 82573: Total Packet Buffer is 32K */
1232 pba = E1000_PBA_12K; /* 12K for Rx, 20K for Tx */
1237 pba = E1000_PBA_20K; /* 20K for Rx, 20K for Tx */
1245 case e1000_ich10lan:
1246 #define E1000_PBA_10K 0x000A
1247 pba = E1000_PBA_10K;
1252 pba = E1000_PBA_26K;
1256 /* Devices before 82547 had a Packet Buffer of 64K. */
1257 if (adapter->max_frame_size > 8192)
1258 pba = E1000_PBA_40K; /* 40K for Rx, 24K for Tx */
1260 pba = E1000_PBA_48K; /* 48K for Rx, 16K for Tx */
1262 E1000_WRITE_REG(&adapter->hw, E1000_PBA, pba);
1264 /* Get the latest mac address, User can use a LAA */
1265 bcopy(IF_LLADDR(ifp), adapter->hw.mac.addr, ETHER_ADDR_LEN);
1267 /* Put the address into the Receive Address Array */
1268 e1000_rar_set(&adapter->hw, adapter->hw.mac.addr, 0);
1271 * With the 82571 adapter, RAR[0] may be overwritten
1272 * when the other port is reset, we make a duplicate
1273 * in RAR[14] for that eventuality, this assures
1274 * the interface continues to function.
1276 if (adapter->hw.mac.type == e1000_82571) {
1277 e1000_set_laa_state_82571(&adapter->hw, TRUE);
1278 e1000_rar_set(&adapter->hw, adapter->hw.mac.addr,
1279 E1000_RAR_ENTRIES - 1);
1282 /* Reset the hardware */
1283 if (em_reset(adapter)) {
1284 device_printf(dev, "Unable to reset the hardware\n");
1285 /* XXX em_stop()? */
1288 em_update_link_status(adapter);
1290 /* Setup VLAN support, basic and offload if available */
1291 E1000_WRITE_REG(&adapter->hw, E1000_VET, ETHERTYPE_VLAN);
1293 if (ifp->if_capenable & IFCAP_VLAN_HWTAGGING) {
1296 ctrl = E1000_READ_REG(&adapter->hw, E1000_CTRL);
1297 ctrl |= E1000_CTRL_VME;
1298 E1000_WRITE_REG(&adapter->hw, E1000_CTRL, ctrl);
1301 /* Configure for OS presence */
1302 em_get_mgmt(adapter);
1304 /* Prepare transmit descriptors and buffers */
1305 em_init_tx_ring(adapter);
1306 em_init_tx_unit(adapter);
1308 /* Setup Multicast table */
1309 em_set_multi(adapter);
1311 /* Prepare receive descriptors and buffers */
1312 if (em_init_rx_ring(adapter)) {
1313 device_printf(dev, "Could not setup receive structures\n");
1317 em_init_rx_unit(adapter);
1319 /* Don't lose promiscuous settings */
1320 em_set_promisc(adapter);
1322 ifp->if_flags |= IFF_RUNNING;
1323 ifp->if_flags &= ~IFF_OACTIVE;
1325 callout_reset(&adapter->timer, hz, em_timer, adapter);
1326 e1000_clear_hw_cntrs_base_generic(&adapter->hw);
1328 /* MSI/X configuration for 82574 */
1329 if (adapter->hw.mac.type == e1000_82574) {
1332 tmp = E1000_READ_REG(&adapter->hw, E1000_CTRL_EXT);
1333 tmp |= E1000_CTRL_EXT_PBA_CLR;
1334 E1000_WRITE_REG(&adapter->hw, E1000_CTRL_EXT, tmp);
1337 * Set the IVAR - interrupt vector routing.
1338 * Each nibble represents a vector, high bit
1339 * is enable, other 3 bits are the MSIX table
1340 * entry, we map RXQ0 to 0, TXQ0 to 1, and
1341 * Link (other) to 2, hence the magic number.
1343 E1000_WRITE_REG(&adapter->hw, E1000_IVAR, 0x800A0908);
1346 #ifdef DEVICE_POLLING
1348 * Only enable interrupts if we are not polling, make sure
1349 * they are off otherwise.
1351 if (ifp->if_flags & IFF_POLLING)
1352 em_disable_intr(adapter);
1354 #endif /* DEVICE_POLLING */
1355 em_enable_intr(adapter);
1357 /* AMT based hardware can now take control from firmware */
1358 if ((adapter->flags & (EM_FLAG_HAS_MGMT | EM_FLAG_HAS_AMT)) ==
1359 (EM_FLAG_HAS_MGMT | EM_FLAG_HAS_AMT) &&
1360 adapter->hw.mac.type >= e1000_82571)
1361 em_get_hw_control(adapter);
1363 /* Don't reset the phy next time init gets called */
1364 adapter->hw.phy.reset_disable = TRUE;
1367 #ifdef DEVICE_POLLING
1370 em_poll(struct ifnet *ifp, enum poll_cmd cmd, int count)
1372 struct adapter *adapter = ifp->if_softc;
1375 ASSERT_SERIALIZED(ifp->if_serializer);
1379 em_disable_intr(adapter);
1382 case POLL_DEREGISTER:
1383 em_enable_intr(adapter);
1386 case POLL_AND_CHECK_STATUS:
1387 reg_icr = E1000_READ_REG(&adapter->hw, E1000_ICR);
1388 if (reg_icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
1389 callout_stop(&adapter->timer);
1390 adapter->hw.mac.get_link_status = 1;
1391 em_update_link_status(adapter);
1392 callout_reset(&adapter->timer, hz, em_timer, adapter);
1396 if (ifp->if_flags & IFF_RUNNING) {
1397 em_rxeof(adapter, count);
1400 if (!ifq_is_empty(&ifp->if_snd))
1407 #endif /* DEVICE_POLLING */
1412 em_intr_body(xsc, TRUE);
1416 em_intr_body(struct adapter *adapter, boolean_t chk_asserted)
1418 struct ifnet *ifp = &adapter->arpcom.ac_if;
1422 ASSERT_SERIALIZED(ifp->if_serializer);
1424 reg_icr = E1000_READ_REG(&adapter->hw, E1000_ICR);
1427 ((adapter->hw.mac.type >= e1000_82571 &&
1428 (reg_icr & E1000_ICR_INT_ASSERTED) == 0) ||
1435 * XXX: some laptops trigger several spurious interrupts
1436 * on em(4) when in the resume cycle. The ICR register
1437 * reports all-ones value in this case. Processing such
1438 * interrupts would lead to a freeze. I don't know why.
1440 if (reg_icr == 0xffffffff) {
1445 if (ifp->if_flags & IFF_RUNNING) {
1447 (E1000_ICR_RXT0 | E1000_ICR_RXDMT0 | E1000_ICR_RXO))
1448 em_rxeof(adapter, -1);
1449 if (reg_icr & E1000_ICR_TXDW) {
1451 if (!ifq_is_empty(&ifp->if_snd))
1456 /* Link status change */
1457 if (reg_icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
1458 callout_stop(&adapter->timer);
1459 adapter->hw.mac.get_link_status = 1;
1460 em_update_link_status(adapter);
1462 /* Deal with TX cruft when link lost */
1463 em_tx_purge(adapter);
1465 callout_reset(&adapter->timer, hz, em_timer, adapter);
1468 if (reg_icr & E1000_ICR_RXO)
1469 adapter->rx_overruns++;
1475 em_intr_mask(void *xsc)
1477 struct adapter *adapter = xsc;
1479 E1000_WRITE_REG(&adapter->hw, E1000_IMC, 0xffffffff);
1482 * ICR.INT_ASSERTED bit will never be set if IMS is 0,
1483 * so don't check it.
1485 em_intr_body(adapter, FALSE);
1486 E1000_WRITE_REG(&adapter->hw, E1000_IMS, IMS_ENABLE_MASK);
1490 em_media_status(struct ifnet *ifp, struct ifmediareq *ifmr)
1492 struct adapter *adapter = ifp->if_softc;
1493 u_char fiber_type = IFM_1000_SX;
1495 ASSERT_SERIALIZED(ifp->if_serializer);
1497 em_update_link_status(adapter);
1499 ifmr->ifm_status = IFM_AVALID;
1500 ifmr->ifm_active = IFM_ETHER;
1502 if (!adapter->link_active)
1505 ifmr->ifm_status |= IFM_ACTIVE;
1507 if (adapter->hw.phy.media_type == e1000_media_type_fiber ||
1508 adapter->hw.phy.media_type == e1000_media_type_internal_serdes) {
1509 if (adapter->hw.mac.type == e1000_82545)
1510 fiber_type = IFM_1000_LX;
1511 ifmr->ifm_active |= fiber_type | IFM_FDX;
1513 switch (adapter->link_speed) {
1515 ifmr->ifm_active |= IFM_10_T;
1518 ifmr->ifm_active |= IFM_100_TX;
1522 ifmr->ifm_active |= IFM_1000_T;
1525 if (adapter->link_duplex == FULL_DUPLEX)
1526 ifmr->ifm_active |= IFM_FDX;
1528 ifmr->ifm_active |= IFM_HDX;
1533 em_media_change(struct ifnet *ifp)
1535 struct adapter *adapter = ifp->if_softc;
1536 struct ifmedia *ifm = &adapter->media;
1538 ASSERT_SERIALIZED(ifp->if_serializer);
1540 if (IFM_TYPE(ifm->ifm_media) != IFM_ETHER)
1543 switch (IFM_SUBTYPE(ifm->ifm_media)) {
1545 adapter->hw.mac.autoneg = DO_AUTO_NEG;
1546 adapter->hw.phy.autoneg_advertised = AUTONEG_ADV_DEFAULT;
1552 adapter->hw.mac.autoneg = DO_AUTO_NEG;
1553 adapter->hw.phy.autoneg_advertised = ADVERTISE_1000_FULL;
1557 adapter->hw.mac.autoneg = FALSE;
1558 adapter->hw.phy.autoneg_advertised = 0;
1559 if ((ifm->ifm_media & IFM_GMASK) == IFM_FDX)
1560 adapter->hw.mac.forced_speed_duplex = ADVERTISE_100_FULL;
1562 adapter->hw.mac.forced_speed_duplex = ADVERTISE_100_HALF;
1566 adapter->hw.mac.autoneg = FALSE;
1567 adapter->hw.phy.autoneg_advertised = 0;
1568 if ((ifm->ifm_media & IFM_GMASK) == IFM_FDX)
1569 adapter->hw.mac.forced_speed_duplex = ADVERTISE_10_FULL;
1571 adapter->hw.mac.forced_speed_duplex = ADVERTISE_10_HALF;
1575 if_printf(ifp, "Unsupported media type\n");
1580 * As the speed/duplex settings my have changed we need to
1583 adapter->hw.phy.reset_disable = FALSE;
1591 em_encap(struct adapter *adapter, struct mbuf **m_headp)
1593 bus_dma_segment_t segs[EM_MAX_SCATTER];
1595 struct em_buffer *tx_buffer, *tx_buffer_mapped;
1596 struct e1000_tx_desc *ctxd = NULL;
1597 struct mbuf *m_head = *m_headp;
1598 uint32_t txd_upper, txd_lower, txd_used, cmd = 0;
1599 int maxsegs, nsegs, i, j, first, last = 0, error;
1601 txd_upper = txd_lower = 0;
1605 * Capture the first descriptor index, this descriptor
1606 * will have the index of the EOP which is the only one
1607 * that now gets a DONE bit writeback.
1609 first = adapter->next_avail_tx_desc;
1610 tx_buffer = &adapter->tx_buffer_area[first];
1611 tx_buffer_mapped = tx_buffer;
1612 map = tx_buffer->map;
1614 maxsegs = adapter->num_tx_desc_avail - EM_TX_RESERVED;
1615 KASSERT(maxsegs >= adapter->spare_tx_desc,
1616 ("not enough spare TX desc"));
1617 if (adapter->pcix_82544) {
1618 /* Half it; see the comment in em_attach() */
1621 if (maxsegs > EM_MAX_SCATTER)
1622 maxsegs = EM_MAX_SCATTER;
1624 error = bus_dmamap_load_mbuf_defrag(adapter->txtag, map, m_headp,
1625 segs, maxsegs, &nsegs, BUS_DMA_NOWAIT);
1627 if (error == ENOBUFS)
1628 adapter->mbuf_alloc_failed++;
1630 adapter->no_tx_dma_setup++;
1636 bus_dmamap_sync(adapter->txtag, map, BUS_DMASYNC_PREWRITE);
1639 adapter->tx_nsegs += nsegs;
1641 if (m_head->m_pkthdr.csum_flags & EM_CSUM_FEATURES) {
1642 /* TX csum offloading will consume one TX desc */
1643 adapter->tx_nsegs += em_txcsum(adapter, m_head,
1644 &txd_upper, &txd_lower);
1646 i = adapter->next_avail_tx_desc;
1648 /* Set up our transmit descriptors */
1649 for (j = 0; j < nsegs; j++) {
1650 /* If adapter is 82544 and on PCIX bus */
1651 if(adapter->pcix_82544) {
1652 DESC_ARRAY desc_array;
1653 uint32_t array_elements, counter;
1656 * Check the Address and Length combination and
1657 * split the data accordingly
1659 array_elements = em_82544_fill_desc(segs[j].ds_addr,
1660 segs[j].ds_len, &desc_array);
1661 for (counter = 0; counter < array_elements; counter++) {
1662 KKASSERT(txd_used < adapter->num_tx_desc_avail);
1664 tx_buffer = &adapter->tx_buffer_area[i];
1665 ctxd = &adapter->tx_desc_base[i];
1667 ctxd->buffer_addr = htole64(
1668 desc_array.descriptor[counter].address);
1669 ctxd->lower.data = htole32(
1670 E1000_TXD_CMD_IFCS | txd_lower |
1671 desc_array.descriptor[counter].length);
1672 ctxd->upper.data = htole32(txd_upper);
1675 if (++i == adapter->num_tx_desc)
1681 tx_buffer = &adapter->tx_buffer_area[i];
1682 ctxd = &adapter->tx_desc_base[i];
1684 ctxd->buffer_addr = htole64(segs[j].ds_addr);
1685 ctxd->lower.data = htole32(E1000_TXD_CMD_IFCS |
1686 txd_lower | segs[j].ds_len);
1687 ctxd->upper.data = htole32(txd_upper);
1690 if (++i == adapter->num_tx_desc)
1695 adapter->next_avail_tx_desc = i;
1696 if (adapter->pcix_82544) {
1697 KKASSERT(adapter->num_tx_desc_avail > txd_used);
1698 adapter->num_tx_desc_avail -= txd_used;
1700 KKASSERT(adapter->num_tx_desc_avail > nsegs);
1701 adapter->num_tx_desc_avail -= nsegs;
1704 /* Handle VLAN tag */
1705 if (m_head->m_flags & M_VLANTAG) {
1706 /* Set the vlan id. */
1707 ctxd->upper.fields.special =
1708 htole16(m_head->m_pkthdr.ether_vlantag);
1710 /* Tell hardware to add tag */
1711 ctxd->lower.data |= htole32(E1000_TXD_CMD_VLE);
1714 tx_buffer->m_head = m_head;
1715 tx_buffer_mapped->map = tx_buffer->map;
1716 tx_buffer->map = map;
1718 if (adapter->tx_nsegs >= adapter->tx_int_nsegs) {
1719 adapter->tx_nsegs = 0;
1722 * Report Status (RS) is turned on
1723 * every tx_int_nsegs descriptors.
1725 cmd = E1000_TXD_CMD_RS;
1728 * Keep track of the descriptor, which will
1729 * be written back by hardware.
1731 adapter->tx_dd[adapter->tx_dd_tail] = last;
1732 EM_INC_TXDD_IDX(adapter->tx_dd_tail);
1733 KKASSERT(adapter->tx_dd_tail != adapter->tx_dd_head);
1737 * Last Descriptor of Packet needs End Of Packet (EOP)
1739 ctxd->lower.data |= htole32(E1000_TXD_CMD_EOP | cmd);
1742 * Advance the Transmit Descriptor Tail (TDT), this tells the E1000
1743 * that this frame is available to transmit.
1745 if (adapter->hw.mac.type == e1000_82547 &&
1746 adapter->link_duplex == HALF_DUPLEX) {
1747 em_82547_move_tail_serialized(adapter);
1749 E1000_WRITE_REG(&adapter->hw, E1000_TDT(0), i);
1750 if (adapter->hw.mac.type == e1000_82547) {
1751 em_82547_update_fifo_head(adapter,
1752 m_head->m_pkthdr.len);
1759 * 82547 workaround to avoid controller hang in half-duplex environment.
1760 * The workaround is to avoid queuing a large packet that would span
1761 * the internal Tx FIFO ring boundary. We need to reset the FIFO pointers
1762 * in this case. We do that only when FIFO is quiescent.
1765 em_82547_move_tail_serialized(struct adapter *adapter)
1767 struct e1000_tx_desc *tx_desc;
1768 uint16_t hw_tdt, sw_tdt, length = 0;
1771 ASSERT_SERIALIZED(adapter->arpcom.ac_if.if_serializer);
1773 hw_tdt = E1000_READ_REG(&adapter->hw, E1000_TDT(0));
1774 sw_tdt = adapter->next_avail_tx_desc;
1776 while (hw_tdt != sw_tdt) {
1777 tx_desc = &adapter->tx_desc_base[hw_tdt];
1778 length += tx_desc->lower.flags.length;
1779 eop = tx_desc->lower.data & E1000_TXD_CMD_EOP;
1780 if (++hw_tdt == adapter->num_tx_desc)
1784 if (em_82547_fifo_workaround(adapter, length)) {
1785 adapter->tx_fifo_wrk_cnt++;
1786 callout_reset(&adapter->tx_fifo_timer, 1,
1787 em_82547_move_tail, adapter);
1790 E1000_WRITE_REG(&adapter->hw, E1000_TDT(0), hw_tdt);
1791 em_82547_update_fifo_head(adapter, length);
1798 em_82547_move_tail(void *xsc)
1800 struct adapter *adapter = xsc;
1801 struct ifnet *ifp = &adapter->arpcom.ac_if;
1803 lwkt_serialize_enter(ifp->if_serializer);
1804 em_82547_move_tail_serialized(adapter);
1805 lwkt_serialize_exit(ifp->if_serializer);
1809 em_82547_fifo_workaround(struct adapter *adapter, int len)
1811 int fifo_space, fifo_pkt_len;
1813 fifo_pkt_len = roundup2(len + EM_FIFO_HDR, EM_FIFO_HDR);
1815 if (adapter->link_duplex == HALF_DUPLEX) {
1816 fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head;
1818 if (fifo_pkt_len >= (EM_82547_PKT_THRESH + fifo_space)) {
1819 if (em_82547_tx_fifo_reset(adapter))
1829 em_82547_update_fifo_head(struct adapter *adapter, int len)
1831 int fifo_pkt_len = roundup2(len + EM_FIFO_HDR, EM_FIFO_HDR);
1833 /* tx_fifo_head is always 16 byte aligned */
1834 adapter->tx_fifo_head += fifo_pkt_len;
1835 if (adapter->tx_fifo_head >= adapter->tx_fifo_size)
1836 adapter->tx_fifo_head -= adapter->tx_fifo_size;
1840 em_82547_tx_fifo_reset(struct adapter *adapter)
1844 if ((E1000_READ_REG(&adapter->hw, E1000_TDT(0)) ==
1845 E1000_READ_REG(&adapter->hw, E1000_TDH(0))) &&
1846 (E1000_READ_REG(&adapter->hw, E1000_TDFT) ==
1847 E1000_READ_REG(&adapter->hw, E1000_TDFH)) &&
1848 (E1000_READ_REG(&adapter->hw, E1000_TDFTS) ==
1849 E1000_READ_REG(&adapter->hw, E1000_TDFHS)) &&
1850 (E1000_READ_REG(&adapter->hw, E1000_TDFPC) == 0)) {
1851 /* Disable TX unit */
1852 tctl = E1000_READ_REG(&adapter->hw, E1000_TCTL);
1853 E1000_WRITE_REG(&adapter->hw, E1000_TCTL,
1854 tctl & ~E1000_TCTL_EN);
1856 /* Reset FIFO pointers */
1857 E1000_WRITE_REG(&adapter->hw, E1000_TDFT,
1858 adapter->tx_head_addr);
1859 E1000_WRITE_REG(&adapter->hw, E1000_TDFH,
1860 adapter->tx_head_addr);
1861 E1000_WRITE_REG(&adapter->hw, E1000_TDFTS,
1862 adapter->tx_head_addr);
1863 E1000_WRITE_REG(&adapter->hw, E1000_TDFHS,
1864 adapter->tx_head_addr);
1866 /* Re-enable TX unit */
1867 E1000_WRITE_REG(&adapter->hw, E1000_TCTL, tctl);
1868 E1000_WRITE_FLUSH(&adapter->hw);
1870 adapter->tx_fifo_head = 0;
1871 adapter->tx_fifo_reset_cnt++;
1880 em_set_promisc(struct adapter *adapter)
1882 struct ifnet *ifp = &adapter->arpcom.ac_if;
1885 reg_rctl = E1000_READ_REG(&adapter->hw, E1000_RCTL);
1887 if (ifp->if_flags & IFF_PROMISC) {
1888 reg_rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
1889 /* Turn this on if you want to see bad packets */
1891 reg_rctl |= E1000_RCTL_SBP;
1892 E1000_WRITE_REG(&adapter->hw, E1000_RCTL, reg_rctl);
1893 } else if (ifp->if_flags & IFF_ALLMULTI) {
1894 reg_rctl |= E1000_RCTL_MPE;
1895 reg_rctl &= ~E1000_RCTL_UPE;
1896 E1000_WRITE_REG(&adapter->hw, E1000_RCTL, reg_rctl);
1901 em_disable_promisc(struct adapter *adapter)
1905 reg_rctl = E1000_READ_REG(&adapter->hw, E1000_RCTL);
1907 reg_rctl &= ~E1000_RCTL_UPE;
1908 reg_rctl &= ~E1000_RCTL_MPE;
1909 reg_rctl &= ~E1000_RCTL_SBP;
1910 E1000_WRITE_REG(&adapter->hw, E1000_RCTL, reg_rctl);
1914 em_set_multi(struct adapter *adapter)
1916 struct ifnet *ifp = &adapter->arpcom.ac_if;
1917 struct ifmultiaddr *ifma;
1918 uint32_t reg_rctl = 0;
1923 bzero(mta, ETH_ADDR_LEN * MAX_NUM_MULTICAST_ADDRESSES);
1925 if (adapter->hw.mac.type == e1000_82542 &&
1926 adapter->hw.revision_id == E1000_REVISION_2) {
1927 reg_rctl = E1000_READ_REG(&adapter->hw, E1000_RCTL);
1928 if (adapter->hw.bus.pci_cmd_word & CMD_MEM_WRT_INVALIDATE)
1929 e1000_pci_clear_mwi(&adapter->hw);
1930 reg_rctl |= E1000_RCTL_RST;
1931 E1000_WRITE_REG(&adapter->hw, E1000_RCTL, reg_rctl);
1935 TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) {
1936 if (ifma->ifma_addr->sa_family != AF_LINK)
1939 if (mcnt == MAX_NUM_MULTICAST_ADDRESSES)
1942 bcopy(LLADDR((struct sockaddr_dl *)ifma->ifma_addr),
1943 &mta[mcnt * ETHER_ADDR_LEN], ETHER_ADDR_LEN);
1947 if (mcnt >= MAX_NUM_MULTICAST_ADDRESSES) {
1948 reg_rctl = E1000_READ_REG(&adapter->hw, E1000_RCTL);
1949 reg_rctl |= E1000_RCTL_MPE;
1950 E1000_WRITE_REG(&adapter->hw, E1000_RCTL, reg_rctl);
1952 e1000_update_mc_addr_list(&adapter->hw, mta, mcnt);
1955 if (adapter->hw.mac.type == e1000_82542 &&
1956 adapter->hw.revision_id == E1000_REVISION_2) {
1957 reg_rctl = E1000_READ_REG(&adapter->hw, E1000_RCTL);
1958 reg_rctl &= ~E1000_RCTL_RST;
1959 E1000_WRITE_REG(&adapter->hw, E1000_RCTL, reg_rctl);
1961 if (adapter->hw.bus.pci_cmd_word & CMD_MEM_WRT_INVALIDATE)
1962 e1000_pci_set_mwi(&adapter->hw);
1967 * This routine checks for link status and updates statistics.
1972 struct adapter *adapter = xsc;
1973 struct ifnet *ifp = &adapter->arpcom.ac_if;
1975 lwkt_serialize_enter(ifp->if_serializer);
1977 em_update_link_status(adapter);
1978 em_update_stats(adapter);
1980 /* Reset LAA into RAR[0] on 82571 */
1981 if (e1000_get_laa_state_82571(&adapter->hw) == TRUE)
1982 e1000_rar_set(&adapter->hw, adapter->hw.mac.addr, 0);
1984 if (em_display_debug_stats && (ifp->if_flags & IFF_RUNNING))
1985 em_print_hw_stats(adapter);
1987 em_smartspeed(adapter);
1989 callout_reset(&adapter->timer, hz, em_timer, adapter);
1991 lwkt_serialize_exit(ifp->if_serializer);
1995 em_update_link_status(struct adapter *adapter)
1997 struct e1000_hw *hw = &adapter->hw;
1998 struct ifnet *ifp = &adapter->arpcom.ac_if;
1999 device_t dev = adapter->dev;
2000 uint32_t link_check = 0;
2002 /* Get the cached link value or read phy for real */
2003 switch (hw->phy.media_type) {
2004 case e1000_media_type_copper:
2005 if (hw->mac.get_link_status) {
2006 /* Do the work to read phy */
2007 e1000_check_for_link(hw);
2008 link_check = !hw->mac.get_link_status;
2009 if (link_check) /* ESB2 fix */
2010 e1000_cfg_on_link_up(hw);
2016 case e1000_media_type_fiber:
2017 e1000_check_for_link(hw);
2019 E1000_READ_REG(hw, E1000_STATUS) & E1000_STATUS_LU;
2022 case e1000_media_type_internal_serdes:
2023 e1000_check_for_link(hw);
2024 link_check = adapter->hw.mac.serdes_has_link;
2027 case e1000_media_type_unknown:
2032 /* Now check for a transition */
2033 if (link_check && adapter->link_active == 0) {
2034 e1000_get_speed_and_duplex(hw, &adapter->link_speed,
2035 &adapter->link_duplex);
2038 * Check if we should enable/disable SPEED_MODE bit on
2041 if (adapter->link_speed != SPEED_1000 &&
2042 (hw->mac.type == e1000_82571 ||
2043 hw->mac.type == e1000_82572)) {
2046 tarc0 = E1000_READ_REG(hw, E1000_TARC(0));
2047 tarc0 &= ~SPEED_MODE_BIT;
2048 E1000_WRITE_REG(hw, E1000_TARC(0), tarc0);
2051 device_printf(dev, "Link is up %d Mbps %s\n",
2052 adapter->link_speed,
2053 ((adapter->link_duplex == FULL_DUPLEX) ?
2054 "Full Duplex" : "Half Duplex"));
2056 adapter->link_active = 1;
2057 adapter->smartspeed = 0;
2058 ifp->if_baudrate = adapter->link_speed * 1000000;
2059 ifp->if_link_state = LINK_STATE_UP;
2060 if_link_state_change(ifp);
2061 } else if (!link_check && adapter->link_active == 1) {
2062 ifp->if_baudrate = adapter->link_speed = 0;
2063 adapter->link_duplex = 0;
2065 device_printf(dev, "Link is Down\n");
2066 adapter->link_active = 0;
2068 /* Link down, disable watchdog */
2071 ifp->if_link_state = LINK_STATE_DOWN;
2072 if_link_state_change(ifp);
2077 em_stop(struct adapter *adapter)
2079 struct ifnet *ifp = &adapter->arpcom.ac_if;
2082 ASSERT_SERIALIZED(ifp->if_serializer);
2084 em_disable_intr(adapter);
2086 callout_stop(&adapter->timer);
2087 callout_stop(&adapter->tx_fifo_timer);
2089 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE);
2092 e1000_reset_hw(&adapter->hw);
2093 if (adapter->hw.mac.type >= e1000_82544)
2094 E1000_WRITE_REG(&adapter->hw, E1000_WUC, 0);
2096 for (i = 0; i < adapter->num_tx_desc; i++) {
2097 struct em_buffer *tx_buffer = &adapter->tx_buffer_area[i];
2099 if (tx_buffer->m_head != NULL) {
2100 bus_dmamap_unload(adapter->txtag, tx_buffer->map);
2101 m_freem(tx_buffer->m_head);
2102 tx_buffer->m_head = NULL;
2106 for (i = 0; i < adapter->num_rx_desc; i++) {
2107 struct em_buffer *rx_buffer = &adapter->rx_buffer_area[i];
2109 if (rx_buffer->m_head != NULL) {
2110 bus_dmamap_unload(adapter->rxtag, rx_buffer->map);
2111 m_freem(rx_buffer->m_head);
2112 rx_buffer->m_head = NULL;
2116 if (adapter->fmp != NULL)
2117 m_freem(adapter->fmp);
2118 adapter->fmp = NULL;
2119 adapter->lmp = NULL;
2121 adapter->csum_flags = 0;
2122 adapter->csum_lhlen = 0;
2123 adapter->csum_iphlen = 0;
2125 adapter->tx_dd_head = 0;
2126 adapter->tx_dd_tail = 0;
2127 adapter->tx_nsegs = 0;
2131 em_get_hw_info(struct adapter *adapter)
2133 device_t dev = adapter->dev;
2135 /* Save off the information about this board */
2136 adapter->hw.vendor_id = pci_get_vendor(dev);
2137 adapter->hw.device_id = pci_get_device(dev);
2138 adapter->hw.revision_id = pci_get_revid(dev);
2139 adapter->hw.subsystem_vendor_id = pci_get_subvendor(dev);
2140 adapter->hw.subsystem_device_id = pci_get_subdevice(dev);
2142 /* Do Shared Code Init and Setup */
2143 if (e1000_set_mac_type(&adapter->hw))
2149 em_alloc_pci_res(struct adapter *adapter)
2151 device_t dev = adapter->dev;
2153 int val, rid, msi_enable;
2155 /* Enable bus mastering */
2156 pci_enable_busmaster(dev);
2158 adapter->memory_rid = EM_BAR_MEM;
2159 adapter->memory = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
2160 &adapter->memory_rid, RF_ACTIVE);
2161 if (adapter->memory == NULL) {
2162 device_printf(dev, "Unable to allocate bus resource: memory\n");
2165 adapter->osdep.mem_bus_space_tag =
2166 rman_get_bustag(adapter->memory);
2167 adapter->osdep.mem_bus_space_handle =
2168 rman_get_bushandle(adapter->memory);
2170 /* XXX This is quite goofy, it is not actually used */
2171 adapter->hw.hw_addr = (uint8_t *)&adapter->osdep.mem_bus_space_handle;
2173 /* Only older adapters use IO mapping */
2174 if (adapter->hw.mac.type > e1000_82543 &&
2175 adapter->hw.mac.type < e1000_82571) {
2176 /* Figure our where our IO BAR is ? */
2177 for (rid = PCIR_BAR(0); rid < PCIR_CARDBUSCIS;) {
2178 val = pci_read_config(dev, rid, 4);
2179 if (EM_BAR_TYPE(val) == EM_BAR_TYPE_IO) {
2180 adapter->io_rid = rid;
2184 /* check for 64bit BAR */
2185 if (EM_BAR_MEM_TYPE(val) == EM_BAR_MEM_TYPE_64BIT)
2188 if (rid >= PCIR_CARDBUSCIS) {
2189 device_printf(dev, "Unable to locate IO BAR\n");
2192 adapter->ioport = bus_alloc_resource_any(dev, SYS_RES_IOPORT,
2193 &adapter->io_rid, RF_ACTIVE);
2194 if (adapter->ioport == NULL) {
2195 device_printf(dev, "Unable to allocate bus resource: "
2199 adapter->hw.io_base = 0;
2200 adapter->osdep.io_bus_space_tag =
2201 rman_get_bustag(adapter->ioport);
2202 adapter->osdep.io_bus_space_handle =
2203 rman_get_bushandle(adapter->ioport);
2207 * Don't enable MSI-X on 82574, see:
2208 * 82574 specification update errata #15
2210 * Don't enable MSI on PCI/PCI-X chips, see:
2211 * 82540 specification update errata #6
2212 * 82545 specification update errata #4
2214 * Don't enable MSI on 82571/82572, see:
2215 * 82571/82572 specification update errata #63
2217 msi_enable = em_msi_enable;
2219 (!pci_is_pcie(dev) ||
2220 adapter->hw.mac.type == e1000_82571 ||
2221 adapter->hw.mac.type == e1000_82572))
2224 adapter->intr_type = pci_alloc_1intr(dev, msi_enable,
2225 &adapter->intr_rid, &intr_flags);
2227 if (adapter->intr_type == PCI_INTR_TYPE_LEGACY) {
2230 unshared = device_getenv_int(dev, "irq.unshared", 0);
2232 adapter->flags |= EM_FLAG_SHARED_INTR;
2234 device_printf(dev, "IRQ shared\n");
2236 intr_flags &= ~RF_SHAREABLE;
2238 device_printf(dev, "IRQ unshared\n");
2242 adapter->intr_res = bus_alloc_resource_any(dev, SYS_RES_IRQ,
2243 &adapter->intr_rid, intr_flags);
2244 if (adapter->intr_res == NULL) {
2245 device_printf(dev, "Unable to allocate bus resource: "
2250 adapter->hw.bus.pci_cmd_word = pci_read_config(dev, PCIR_COMMAND, 2);
2251 adapter->hw.back = &adapter->osdep;
2256 em_free_pci_res(struct adapter *adapter)
2258 device_t dev = adapter->dev;
2260 if (adapter->intr_res != NULL) {
2261 bus_release_resource(dev, SYS_RES_IRQ,
2262 adapter->intr_rid, adapter->intr_res);
2265 if (adapter->intr_type == PCI_INTR_TYPE_MSI)
2266 pci_release_msi(dev);
2268 if (adapter->memory != NULL) {
2269 bus_release_resource(dev, SYS_RES_MEMORY,
2270 adapter->memory_rid, adapter->memory);
2273 if (adapter->flash != NULL) {
2274 bus_release_resource(dev, SYS_RES_MEMORY,
2275 adapter->flash_rid, adapter->flash);
2278 if (adapter->ioport != NULL) {
2279 bus_release_resource(dev, SYS_RES_IOPORT,
2280 adapter->io_rid, adapter->ioport);
2285 em_reset(struct adapter *adapter)
2287 device_t dev = adapter->dev;
2288 uint16_t rx_buffer_size;
2290 /* When hardware is reset, fifo_head is also reset */
2291 adapter->tx_fifo_head = 0;
2293 /* Set up smart power down as default off on newer adapters. */
2294 if (!em_smart_pwr_down &&
2295 (adapter->hw.mac.type == e1000_82571 ||
2296 adapter->hw.mac.type == e1000_82572)) {
2297 uint16_t phy_tmp = 0;
2299 /* Speed up time to link by disabling smart power down. */
2300 e1000_read_phy_reg(&adapter->hw,
2301 IGP02E1000_PHY_POWER_MGMT, &phy_tmp);
2302 phy_tmp &= ~IGP02E1000_PM_SPD;
2303 e1000_write_phy_reg(&adapter->hw,
2304 IGP02E1000_PHY_POWER_MGMT, phy_tmp);
2308 * These parameters control the automatic generation (Tx) and
2309 * response (Rx) to Ethernet PAUSE frames.
2310 * - High water mark should allow for at least two frames to be
2311 * received after sending an XOFF.
2312 * - Low water mark works best when it is very near the high water mark.
2313 * This allows the receiver to restart by sending XON when it has
2314 * drained a bit. Here we use an arbitary value of 1500 which will
2315 * restart after one full frame is pulled from the buffer. There
2316 * could be several smaller frames in the buffer and if so they will
2317 * not trigger the XON until their total number reduces the buffer
2319 * - The pause time is fairly large at 1000 x 512ns = 512 usec.
2322 (E1000_READ_REG(&adapter->hw, E1000_PBA) & 0xffff) << 10;
2324 adapter->hw.fc.high_water = rx_buffer_size -
2325 roundup2(adapter->max_frame_size, 1024);
2326 adapter->hw.fc.low_water = adapter->hw.fc.high_water - 1500;
2328 if (adapter->hw.mac.type == e1000_80003es2lan)
2329 adapter->hw.fc.pause_time = 0xFFFF;
2331 adapter->hw.fc.pause_time = EM_FC_PAUSE_TIME;
2333 adapter->hw.fc.send_xon = TRUE;
2335 adapter->hw.fc.requested_mode = e1000_fc_full;
2337 /* Workaround: no TX flow ctrl for PCH */
2338 if (adapter->hw.mac.type == e1000_pchlan)
2339 adapter->hw.fc.requested_mode = e1000_fc_rx_pause;
2341 /* Override - settings for PCH2LAN, ya its magic :) */
2342 if (adapter->hw.mac.type == e1000_pch2lan) {
2343 adapter->hw.fc.high_water = 0x5C20;
2344 adapter->hw.fc.low_water = 0x5048;
2345 adapter->hw.fc.pause_time = 0x0650;
2346 adapter->hw.fc.refresh_time = 0x0400;
2348 /* Jumbos need adjusted PBA */
2349 if (adapter->arpcom.ac_if.if_mtu > ETHERMTU)
2350 E1000_WRITE_REG(&adapter->hw, E1000_PBA, 12);
2352 E1000_WRITE_REG(&adapter->hw, E1000_PBA, 26);
2355 /* Issue a global reset */
2356 e1000_reset_hw(&adapter->hw);
2357 if (adapter->hw.mac.type >= e1000_82544)
2358 E1000_WRITE_REG(&adapter->hw, E1000_WUC, 0);
2359 em_disable_aspm(adapter);
2361 if (e1000_init_hw(&adapter->hw) < 0) {
2362 device_printf(dev, "Hardware Initialization Failed\n");
2366 E1000_WRITE_REG(&adapter->hw, E1000_VET, ETHERTYPE_VLAN);
2367 e1000_get_phy_info(&adapter->hw);
2368 e1000_check_for_link(&adapter->hw);
2374 em_setup_ifp(struct adapter *adapter)
2376 struct ifnet *ifp = &adapter->arpcom.ac_if;
2378 if_initname(ifp, device_get_name(adapter->dev),
2379 device_get_unit(adapter->dev));
2380 ifp->if_softc = adapter;
2381 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
2382 ifp->if_init = em_init;
2383 ifp->if_ioctl = em_ioctl;
2384 ifp->if_start = em_start;
2385 #ifdef DEVICE_POLLING
2386 ifp->if_poll = em_poll;
2388 ifp->if_watchdog = em_watchdog;
2389 ifq_set_maxlen(&ifp->if_snd, adapter->num_tx_desc - 1);
2390 ifq_set_ready(&ifp->if_snd);
2392 ether_ifattach(ifp, adapter->hw.mac.addr, NULL);
2394 if (adapter->hw.mac.type >= e1000_82543)
2395 ifp->if_capabilities = IFCAP_HWCSUM;
2397 ifp->if_capabilities |= IFCAP_VLAN_HWTAGGING | IFCAP_VLAN_MTU;
2398 ifp->if_capenable = ifp->if_capabilities;
2400 if (ifp->if_capenable & IFCAP_TXCSUM)
2401 ifp->if_hwassist = EM_CSUM_FEATURES;
2404 * Tell the upper layer(s) we support long frames.
2406 ifp->if_data.ifi_hdrlen = sizeof(struct ether_vlan_header);
2409 * Specify the media types supported by this adapter and register
2410 * callbacks to update media and link information
2412 ifmedia_init(&adapter->media, IFM_IMASK,
2413 em_media_change, em_media_status);
2414 if (adapter->hw.phy.media_type == e1000_media_type_fiber ||
2415 adapter->hw.phy.media_type == e1000_media_type_internal_serdes) {
2416 u_char fiber_type = IFM_1000_SX; /* default type */
2418 if (adapter->hw.mac.type == e1000_82545)
2419 fiber_type = IFM_1000_LX;
2420 ifmedia_add(&adapter->media, IFM_ETHER | fiber_type | IFM_FDX,
2422 ifmedia_add(&adapter->media, IFM_ETHER | fiber_type, 0, NULL);
2424 ifmedia_add(&adapter->media, IFM_ETHER | IFM_10_T, 0, NULL);
2425 ifmedia_add(&adapter->media, IFM_ETHER | IFM_10_T | IFM_FDX,
2427 ifmedia_add(&adapter->media, IFM_ETHER | IFM_100_TX,
2429 ifmedia_add(&adapter->media, IFM_ETHER | IFM_100_TX | IFM_FDX,
2431 if (adapter->hw.phy.type != e1000_phy_ife) {
2432 ifmedia_add(&adapter->media,
2433 IFM_ETHER | IFM_1000_T | IFM_FDX, 0, NULL);
2434 ifmedia_add(&adapter->media,
2435 IFM_ETHER | IFM_1000_T, 0, NULL);
2438 ifmedia_add(&adapter->media, IFM_ETHER | IFM_AUTO, 0, NULL);
2439 ifmedia_set(&adapter->media, IFM_ETHER | IFM_AUTO);
2444 * Workaround for SmartSpeed on 82541 and 82547 controllers
2447 em_smartspeed(struct adapter *adapter)
2451 if (adapter->link_active || adapter->hw.phy.type != e1000_phy_igp ||
2452 adapter->hw.mac.autoneg == 0 ||
2453 (adapter->hw.phy.autoneg_advertised & ADVERTISE_1000_FULL) == 0)
2456 if (adapter->smartspeed == 0) {
2458 * If Master/Slave config fault is asserted twice,
2459 * we assume back-to-back
2461 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_tmp);
2462 if (!(phy_tmp & SR_1000T_MS_CONFIG_FAULT))
2464 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_tmp);
2465 if (phy_tmp & SR_1000T_MS_CONFIG_FAULT) {
2466 e1000_read_phy_reg(&adapter->hw,
2467 PHY_1000T_CTRL, &phy_tmp);
2468 if (phy_tmp & CR_1000T_MS_ENABLE) {
2469 phy_tmp &= ~CR_1000T_MS_ENABLE;
2470 e1000_write_phy_reg(&adapter->hw,
2471 PHY_1000T_CTRL, phy_tmp);
2472 adapter->smartspeed++;
2473 if (adapter->hw.mac.autoneg &&
2474 !e1000_phy_setup_autoneg(&adapter->hw) &&
2475 !e1000_read_phy_reg(&adapter->hw,
2476 PHY_CONTROL, &phy_tmp)) {
2477 phy_tmp |= MII_CR_AUTO_NEG_EN |
2478 MII_CR_RESTART_AUTO_NEG;
2479 e1000_write_phy_reg(&adapter->hw,
2480 PHY_CONTROL, phy_tmp);
2485 } else if (adapter->smartspeed == EM_SMARTSPEED_DOWNSHIFT) {
2486 /* If still no link, perhaps using 2/3 pair cable */
2487 e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_tmp);
2488 phy_tmp |= CR_1000T_MS_ENABLE;
2489 e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL, phy_tmp);
2490 if (adapter->hw.mac.autoneg &&
2491 !e1000_phy_setup_autoneg(&adapter->hw) &&
2492 !e1000_read_phy_reg(&adapter->hw, PHY_CONTROL, &phy_tmp)) {
2493 phy_tmp |= MII_CR_AUTO_NEG_EN | MII_CR_RESTART_AUTO_NEG;
2494 e1000_write_phy_reg(&adapter->hw, PHY_CONTROL, phy_tmp);
2498 /* Restart process after EM_SMARTSPEED_MAX iterations */
2499 if (adapter->smartspeed++ == EM_SMARTSPEED_MAX)
2500 adapter->smartspeed = 0;
2504 em_dma_malloc(struct adapter *adapter, bus_size_t size,
2505 struct em_dma_alloc *dma)
2507 dma->dma_vaddr = bus_dmamem_coherent_any(adapter->parent_dtag,
2508 EM_DBA_ALIGN, size, BUS_DMA_WAITOK,
2509 &dma->dma_tag, &dma->dma_map,
2511 if (dma->dma_vaddr == NULL)
2518 em_dma_free(struct adapter *adapter, struct em_dma_alloc *dma)
2520 if (dma->dma_tag == NULL)
2522 bus_dmamap_unload(dma->dma_tag, dma->dma_map);
2523 bus_dmamem_free(dma->dma_tag, dma->dma_vaddr, dma->dma_map);
2524 bus_dma_tag_destroy(dma->dma_tag);
2528 em_create_tx_ring(struct adapter *adapter)
2530 device_t dev = adapter->dev;
2531 struct em_buffer *tx_buffer;
2534 adapter->tx_buffer_area =
2535 kmalloc(sizeof(struct em_buffer) * adapter->num_tx_desc,
2536 M_DEVBUF, M_WAITOK | M_ZERO);
2539 * Create DMA tags for tx buffers
2541 error = bus_dma_tag_create(adapter->parent_dtag, /* parent */
2542 1, 0, /* alignment, bounds */
2543 BUS_SPACE_MAXADDR, /* lowaddr */
2544 BUS_SPACE_MAXADDR, /* highaddr */
2545 NULL, NULL, /* filter, filterarg */
2546 EM_TSO_SIZE, /* maxsize */
2547 EM_MAX_SCATTER, /* nsegments */
2548 EM_MAX_SEGSIZE, /* maxsegsize */
2549 BUS_DMA_WAITOK | BUS_DMA_ALLOCNOW |
2550 BUS_DMA_ONEBPAGE, /* flags */
2553 device_printf(dev, "Unable to allocate TX DMA tag\n");
2554 kfree(adapter->tx_buffer_area, M_DEVBUF);
2555 adapter->tx_buffer_area = NULL;
2560 * Create DMA maps for tx buffers
2562 for (i = 0; i < adapter->num_tx_desc; i++) {
2563 tx_buffer = &adapter->tx_buffer_area[i];
2565 error = bus_dmamap_create(adapter->txtag,
2566 BUS_DMA_WAITOK | BUS_DMA_ONEBPAGE,
2569 device_printf(dev, "Unable to create TX DMA map\n");
2570 em_destroy_tx_ring(adapter, i);
2578 em_init_tx_ring(struct adapter *adapter)
2580 /* Clear the old ring contents */
2581 bzero(adapter->tx_desc_base,
2582 (sizeof(struct e1000_tx_desc)) * adapter->num_tx_desc);
2585 adapter->next_avail_tx_desc = 0;
2586 adapter->next_tx_to_clean = 0;
2587 adapter->num_tx_desc_avail = adapter->num_tx_desc;
2591 em_init_tx_unit(struct adapter *adapter)
2593 uint32_t tctl, tarc, tipg = 0;
2596 /* Setup the Base and Length of the Tx Descriptor Ring */
2597 bus_addr = adapter->txdma.dma_paddr;
2598 E1000_WRITE_REG(&adapter->hw, E1000_TDLEN(0),
2599 adapter->num_tx_desc * sizeof(struct e1000_tx_desc));
2600 E1000_WRITE_REG(&adapter->hw, E1000_TDBAH(0),
2601 (uint32_t)(bus_addr >> 32));
2602 E1000_WRITE_REG(&adapter->hw, E1000_TDBAL(0),
2603 (uint32_t)bus_addr);
2604 /* Setup the HW Tx Head and Tail descriptor pointers */
2605 E1000_WRITE_REG(&adapter->hw, E1000_TDT(0), 0);
2606 E1000_WRITE_REG(&adapter->hw, E1000_TDH(0), 0);
2608 /* Set the default values for the Tx Inter Packet Gap timer */
2609 switch (adapter->hw.mac.type) {
2611 tipg = DEFAULT_82542_TIPG_IPGT;
2612 tipg |= DEFAULT_82542_TIPG_IPGR1 << E1000_TIPG_IPGR1_SHIFT;
2613 tipg |= DEFAULT_82542_TIPG_IPGR2 << E1000_TIPG_IPGR2_SHIFT;
2616 case e1000_80003es2lan:
2617 tipg = DEFAULT_82543_TIPG_IPGR1;
2618 tipg |= DEFAULT_80003ES2LAN_TIPG_IPGR2 <<
2619 E1000_TIPG_IPGR2_SHIFT;
2623 if (adapter->hw.phy.media_type == e1000_media_type_fiber ||
2624 adapter->hw.phy.media_type ==
2625 e1000_media_type_internal_serdes)
2626 tipg = DEFAULT_82543_TIPG_IPGT_FIBER;
2628 tipg = DEFAULT_82543_TIPG_IPGT_COPPER;
2629 tipg |= DEFAULT_82543_TIPG_IPGR1 << E1000_TIPG_IPGR1_SHIFT;
2630 tipg |= DEFAULT_82543_TIPG_IPGR2 << E1000_TIPG_IPGR2_SHIFT;
2634 E1000_WRITE_REG(&adapter->hw, E1000_TIPG, tipg);
2636 /* NOTE: 0 is not allowed for TIDV */
2637 E1000_WRITE_REG(&adapter->hw, E1000_TIDV, 1);
2638 if(adapter->hw.mac.type >= e1000_82540)
2639 E1000_WRITE_REG(&adapter->hw, E1000_TADV, 0);
2641 if (adapter->hw.mac.type == e1000_82571 ||
2642 adapter->hw.mac.type == e1000_82572) {
2643 tarc = E1000_READ_REG(&adapter->hw, E1000_TARC(0));
2644 tarc |= SPEED_MODE_BIT;
2645 E1000_WRITE_REG(&adapter->hw, E1000_TARC(0), tarc);
2646 } else if (adapter->hw.mac.type == e1000_80003es2lan) {
2647 tarc = E1000_READ_REG(&adapter->hw, E1000_TARC(0));
2649 E1000_WRITE_REG(&adapter->hw, E1000_TARC(0), tarc);
2650 tarc = E1000_READ_REG(&adapter->hw, E1000_TARC(1));
2652 E1000_WRITE_REG(&adapter->hw, E1000_TARC(1), tarc);
2655 /* Program the Transmit Control Register */
2656 tctl = E1000_READ_REG(&adapter->hw, E1000_TCTL);
2657 tctl &= ~E1000_TCTL_CT;
2658 tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC | E1000_TCTL_EN |
2659 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
2661 if (adapter->hw.mac.type >= e1000_82571)
2662 tctl |= E1000_TCTL_MULR;
2664 /* This write will effectively turn on the transmit unit. */
2665 E1000_WRITE_REG(&adapter->hw, E1000_TCTL, tctl);
2669 em_destroy_tx_ring(struct adapter *adapter, int ndesc)
2671 struct em_buffer *tx_buffer;
2674 if (adapter->tx_buffer_area == NULL)
2677 for (i = 0; i < ndesc; i++) {
2678 tx_buffer = &adapter->tx_buffer_area[i];
2680 KKASSERT(tx_buffer->m_head == NULL);
2681 bus_dmamap_destroy(adapter->txtag, tx_buffer->map);
2683 bus_dma_tag_destroy(adapter->txtag);
2685 kfree(adapter->tx_buffer_area, M_DEVBUF);
2686 adapter->tx_buffer_area = NULL;
2690 * The offload context needs to be set when we transfer the first
2691 * packet of a particular protocol (TCP/UDP). This routine has been
2692 * enhanced to deal with inserted VLAN headers.
2694 * If the new packet's ether header length, ip header length and
2695 * csum offloading type are same as the previous packet, we should
2696 * avoid allocating a new csum context descriptor; mainly to take
2697 * advantage of the pipeline effect of the TX data read request.
2699 * This function returns number of TX descrptors allocated for
2703 em_txcsum(struct adapter *adapter, struct mbuf *mp,
2704 uint32_t *txd_upper, uint32_t *txd_lower)
2706 struct e1000_context_desc *TXD;
2707 int curr_txd, ehdrlen, csum_flags;
2708 uint32_t cmd, hdr_len, ip_hlen;
2710 csum_flags = mp->m_pkthdr.csum_flags & EM_CSUM_FEATURES;
2711 ip_hlen = mp->m_pkthdr.csum_iphlen;
2712 ehdrlen = mp->m_pkthdr.csum_lhlen;
2714 if (adapter->csum_lhlen == ehdrlen &&
2715 adapter->csum_iphlen == ip_hlen &&
2716 adapter->csum_flags == csum_flags) {
2718 * Same csum offload context as the previous packets;
2721 *txd_upper = adapter->csum_txd_upper;
2722 *txd_lower = adapter->csum_txd_lower;
2727 * Setup a new csum offload context.
2730 curr_txd = adapter->next_avail_tx_desc;
2731 TXD = (struct e1000_context_desc *)&adapter->tx_desc_base[curr_txd];
2735 /* Setup of IP header checksum. */
2736 if (csum_flags & CSUM_IP) {
2738 * Start offset for header checksum calculation.
2739 * End offset for header checksum calculation.
2740 * Offset of place to put the checksum.
2742 TXD->lower_setup.ip_fields.ipcss = ehdrlen;
2743 TXD->lower_setup.ip_fields.ipcse =
2744 htole16(ehdrlen + ip_hlen - 1);
2745 TXD->lower_setup.ip_fields.ipcso =
2746 ehdrlen + offsetof(struct ip, ip_sum);
2747 cmd |= E1000_TXD_CMD_IP;
2748 *txd_upper |= E1000_TXD_POPTS_IXSM << 8;
2750 hdr_len = ehdrlen + ip_hlen;
2752 if (csum_flags & CSUM_TCP) {
2754 * Start offset for payload checksum calculation.
2755 * End offset for payload checksum calculation.
2756 * Offset of place to put the checksum.
2758 TXD->upper_setup.tcp_fields.tucss = hdr_len;
2759 TXD->upper_setup.tcp_fields.tucse = htole16(0);
2760 TXD->upper_setup.tcp_fields.tucso =
2761 hdr_len + offsetof(struct tcphdr, th_sum);
2762 cmd |= E1000_TXD_CMD_TCP;
2763 *txd_upper |= E1000_TXD_POPTS_TXSM << 8;
2764 } else if (csum_flags & CSUM_UDP) {
2766 * Start offset for header checksum calculation.
2767 * End offset for header checksum calculation.
2768 * Offset of place to put the checksum.
2770 TXD->upper_setup.tcp_fields.tucss = hdr_len;
2771 TXD->upper_setup.tcp_fields.tucse = htole16(0);
2772 TXD->upper_setup.tcp_fields.tucso =
2773 hdr_len + offsetof(struct udphdr, uh_sum);
2774 *txd_upper |= E1000_TXD_POPTS_TXSM << 8;
2777 *txd_lower = E1000_TXD_CMD_DEXT | /* Extended descr type */
2778 E1000_TXD_DTYP_D; /* Data descr */
2780 /* Save the information for this csum offloading context */
2781 adapter->csum_lhlen = ehdrlen;
2782 adapter->csum_iphlen = ip_hlen;
2783 adapter->csum_flags = csum_flags;
2784 adapter->csum_txd_upper = *txd_upper;
2785 adapter->csum_txd_lower = *txd_lower;
2787 TXD->tcp_seg_setup.data = htole32(0);
2788 TXD->cmd_and_length =
2789 htole32(E1000_TXD_CMD_IFCS | E1000_TXD_CMD_DEXT | cmd);
2791 if (++curr_txd == adapter->num_tx_desc)
2794 KKASSERT(adapter->num_tx_desc_avail > 0);
2795 adapter->num_tx_desc_avail--;
2797 adapter->next_avail_tx_desc = curr_txd;
2802 em_txeof(struct adapter *adapter)
2804 struct ifnet *ifp = &adapter->arpcom.ac_if;
2805 struct em_buffer *tx_buffer;
2806 int first, num_avail;
2808 if (adapter->tx_dd_head == adapter->tx_dd_tail)
2811 if (adapter->num_tx_desc_avail == adapter->num_tx_desc)
2814 num_avail = adapter->num_tx_desc_avail;
2815 first = adapter->next_tx_to_clean;
2817 while (adapter->tx_dd_head != adapter->tx_dd_tail) {
2818 struct e1000_tx_desc *tx_desc;
2819 int dd_idx = adapter->tx_dd[adapter->tx_dd_head];
2821 tx_desc = &adapter->tx_desc_base[dd_idx];
2822 if (tx_desc->upper.fields.status & E1000_TXD_STAT_DD) {
2823 EM_INC_TXDD_IDX(adapter->tx_dd_head);
2825 if (++dd_idx == adapter->num_tx_desc)
2828 while (first != dd_idx) {
2833 tx_buffer = &adapter->tx_buffer_area[first];
2834 if (tx_buffer->m_head) {
2836 bus_dmamap_unload(adapter->txtag,
2838 m_freem(tx_buffer->m_head);
2839 tx_buffer->m_head = NULL;
2842 if (++first == adapter->num_tx_desc)
2849 adapter->next_tx_to_clean = first;
2850 adapter->num_tx_desc_avail = num_avail;
2852 if (adapter->tx_dd_head == adapter->tx_dd_tail) {
2853 adapter->tx_dd_head = 0;
2854 adapter->tx_dd_tail = 0;
2857 if (!EM_IS_OACTIVE(adapter)) {
2858 ifp->if_flags &= ~IFF_OACTIVE;
2860 /* All clean, turn off the timer */
2861 if (adapter->num_tx_desc_avail == adapter->num_tx_desc)
2867 em_tx_collect(struct adapter *adapter)
2869 struct ifnet *ifp = &adapter->arpcom.ac_if;
2870 struct em_buffer *tx_buffer;
2871 int tdh, first, num_avail, dd_idx = -1;
2873 if (adapter->num_tx_desc_avail == adapter->num_tx_desc)
2876 tdh = E1000_READ_REG(&adapter->hw, E1000_TDH(0));
2877 if (tdh == adapter->next_tx_to_clean)
2880 if (adapter->tx_dd_head != adapter->tx_dd_tail)
2881 dd_idx = adapter->tx_dd[adapter->tx_dd_head];
2883 num_avail = adapter->num_tx_desc_avail;
2884 first = adapter->next_tx_to_clean;
2886 while (first != tdh) {
2891 tx_buffer = &adapter->tx_buffer_area[first];
2892 if (tx_buffer->m_head) {
2894 bus_dmamap_unload(adapter->txtag,
2896 m_freem(tx_buffer->m_head);
2897 tx_buffer->m_head = NULL;
2900 if (first == dd_idx) {
2901 EM_INC_TXDD_IDX(adapter->tx_dd_head);
2902 if (adapter->tx_dd_head == adapter->tx_dd_tail) {
2903 adapter->tx_dd_head = 0;
2904 adapter->tx_dd_tail = 0;
2907 dd_idx = adapter->tx_dd[adapter->tx_dd_head];
2911 if (++first == adapter->num_tx_desc)
2914 adapter->next_tx_to_clean = first;
2915 adapter->num_tx_desc_avail = num_avail;
2917 if (!EM_IS_OACTIVE(adapter)) {
2918 ifp->if_flags &= ~IFF_OACTIVE;
2920 /* All clean, turn off the timer */
2921 if (adapter->num_tx_desc_avail == adapter->num_tx_desc)
2927 * When Link is lost sometimes there is work still in the TX ring
2928 * which will result in a watchdog, rather than allow that do an
2929 * attempted cleanup and then reinit here. Note that this has been
2930 * seens mostly with fiber adapters.
2933 em_tx_purge(struct adapter *adapter)
2935 struct ifnet *ifp = &adapter->arpcom.ac_if;
2937 if (!adapter->link_active && ifp->if_timer) {
2938 em_tx_collect(adapter);
2939 if (ifp->if_timer) {
2940 if_printf(ifp, "Link lost, TX pending, reinit\n");
2948 em_newbuf(struct adapter *adapter, int i, int init)
2951 bus_dma_segment_t seg;
2953 struct em_buffer *rx_buffer;
2956 m = m_getcl(init ? MB_WAIT : MB_DONTWAIT, MT_DATA, M_PKTHDR);
2958 adapter->mbuf_cluster_failed++;
2960 if_printf(&adapter->arpcom.ac_if,
2961 "Unable to allocate RX mbuf\n");
2965 m->m_len = m->m_pkthdr.len = MCLBYTES;
2967 if (adapter->max_frame_size <= MCLBYTES - ETHER_ALIGN)
2968 m_adj(m, ETHER_ALIGN);
2970 error = bus_dmamap_load_mbuf_segment(adapter->rxtag,
2971 adapter->rx_sparemap, m,
2972 &seg, 1, &nseg, BUS_DMA_NOWAIT);
2976 if_printf(&adapter->arpcom.ac_if,
2977 "Unable to load RX mbuf\n");
2982 rx_buffer = &adapter->rx_buffer_area[i];
2983 if (rx_buffer->m_head != NULL)
2984 bus_dmamap_unload(adapter->rxtag, rx_buffer->map);
2986 map = rx_buffer->map;
2987 rx_buffer->map = adapter->rx_sparemap;
2988 adapter->rx_sparemap = map;
2990 rx_buffer->m_head = m;
2992 adapter->rx_desc_base[i].buffer_addr = htole64(seg.ds_addr);
2997 em_create_rx_ring(struct adapter *adapter)
2999 device_t dev = adapter->dev;
3000 struct em_buffer *rx_buffer;
3003 adapter->rx_buffer_area =
3004 kmalloc(sizeof(struct em_buffer) * adapter->num_rx_desc,
3005 M_DEVBUF, M_WAITOK | M_ZERO);
3008 * Create DMA tag for rx buffers
3010 error = bus_dma_tag_create(adapter->parent_dtag, /* parent */
3011 1, 0, /* alignment, bounds */
3012 BUS_SPACE_MAXADDR, /* lowaddr */
3013 BUS_SPACE_MAXADDR, /* highaddr */
3014 NULL, NULL, /* filter, filterarg */
3015 MCLBYTES, /* maxsize */
3017 MCLBYTES, /* maxsegsize */
3018 BUS_DMA_WAITOK | BUS_DMA_ALLOCNOW, /* flags */
3021 device_printf(dev, "Unable to allocate RX DMA tag\n");
3022 kfree(adapter->rx_buffer_area, M_DEVBUF);
3023 adapter->rx_buffer_area = NULL;
3028 * Create spare DMA map for rx buffers
3030 error = bus_dmamap_create(adapter->rxtag, BUS_DMA_WAITOK,
3031 &adapter->rx_sparemap);
3033 device_printf(dev, "Unable to create spare RX DMA map\n");
3034 bus_dma_tag_destroy(adapter->rxtag);
3035 kfree(adapter->rx_buffer_area, M_DEVBUF);
3036 adapter->rx_buffer_area = NULL;
3041 * Create DMA maps for rx buffers
3043 for (i = 0; i < adapter->num_rx_desc; i++) {
3044 rx_buffer = &adapter->rx_buffer_area[i];
3046 error = bus_dmamap_create(adapter->rxtag, BUS_DMA_WAITOK,
3049 device_printf(dev, "Unable to create RX DMA map\n");
3050 em_destroy_rx_ring(adapter, i);
3058 em_init_rx_ring(struct adapter *adapter)
3062 /* Reset descriptor ring */
3063 bzero(adapter->rx_desc_base,
3064 (sizeof(struct e1000_rx_desc)) * adapter->num_rx_desc);
3066 /* Allocate new ones. */
3067 for (i = 0; i < adapter->num_rx_desc; i++) {
3068 error = em_newbuf(adapter, i, 1);
3073 /* Setup our descriptor pointers */
3074 adapter->next_rx_desc_to_check = 0;
3080 em_init_rx_unit(struct adapter *adapter)
3082 struct ifnet *ifp = &adapter->arpcom.ac_if;
3087 * Make sure receives are disabled while setting
3088 * up the descriptor ring
3090 rctl = E1000_READ_REG(&adapter->hw, E1000_RCTL);
3091 E1000_WRITE_REG(&adapter->hw, E1000_RCTL, rctl & ~E1000_RCTL_EN);
3093 if (adapter->hw.mac.type >= e1000_82540) {
3097 * Set the interrupt throttling rate. Value is calculated
3098 * as ITR = 1 / (INT_THROTTLE_CEIL * 256ns)
3100 if (adapter->int_throttle_ceil)
3101 itr = 1000000000 / 256 / adapter->int_throttle_ceil;
3104 em_set_itr(adapter, itr);
3107 /* Disable accelerated ackknowledge */
3108 if (adapter->hw.mac.type == e1000_82574) {
3109 E1000_WRITE_REG(&adapter->hw,
3110 E1000_RFCTL, E1000_RFCTL_ACK_DIS);
3113 /* Receive Checksum Offload for TCP and UDP */
3114 if (ifp->if_capenable & IFCAP_RXCSUM) {
3117 rxcsum = E1000_READ_REG(&adapter->hw, E1000_RXCSUM);
3118 rxcsum |= (E1000_RXCSUM_IPOFL | E1000_RXCSUM_TUOFL);
3119 E1000_WRITE_REG(&adapter->hw, E1000_RXCSUM, rxcsum);
3123 * XXX TEMPORARY WORKAROUND: on some systems with 82573
3124 * long latencies are observed, like Lenovo X60. This
3125 * change eliminates the problem, but since having positive
3126 * values in RDTR is a known source of problems on other
3127 * platforms another solution is being sought.
3129 if (em_82573_workaround && adapter->hw.mac.type == e1000_82573) {
3130 E1000_WRITE_REG(&adapter->hw, E1000_RADV, EM_RADV_82573);
3131 E1000_WRITE_REG(&adapter->hw, E1000_RDTR, EM_RDTR_82573);
3135 * Setup the Base and Length of the Rx Descriptor Ring
3137 bus_addr = adapter->rxdma.dma_paddr;
3138 E1000_WRITE_REG(&adapter->hw, E1000_RDLEN(0),
3139 adapter->num_rx_desc * sizeof(struct e1000_rx_desc));
3140 E1000_WRITE_REG(&adapter->hw, E1000_RDBAH(0),
3141 (uint32_t)(bus_addr >> 32));
3142 E1000_WRITE_REG(&adapter->hw, E1000_RDBAL(0),
3143 (uint32_t)bus_addr);
3146 * Setup the HW Rx Head and Tail Descriptor Pointers
3148 E1000_WRITE_REG(&adapter->hw, E1000_RDH(0), 0);
3149 E1000_WRITE_REG(&adapter->hw, E1000_RDT(0), adapter->num_rx_desc - 1);
3151 /* Set early receive threshold on appropriate hw */
3152 if (((adapter->hw.mac.type == e1000_ich9lan) ||
3153 (adapter->hw.mac.type == e1000_pch2lan) ||
3154 (adapter->hw.mac.type == e1000_ich10lan)) &&
3155 (ifp->if_mtu > ETHERMTU)) {
3158 rxdctl = E1000_READ_REG(&adapter->hw, E1000_RXDCTL(0));
3159 E1000_WRITE_REG(&adapter->hw, E1000_RXDCTL(0), rxdctl | 3);
3160 E1000_WRITE_REG(&adapter->hw, E1000_ERT, 0x100 | (1 << 13));
3163 if (adapter->hw.mac.type == e1000_pch2lan) {
3164 if (ifp->if_mtu > ETHERMTU)
3165 e1000_lv_jumbo_workaround_ich8lan(&adapter->hw, TRUE);
3167 e1000_lv_jumbo_workaround_ich8lan(&adapter->hw, FALSE);
3170 /* Setup the Receive Control Register */
3171 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
3172 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM | E1000_RCTL_LBM_NO |
3173 E1000_RCTL_RDMTS_HALF |
3174 (adapter->hw.mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
3176 /* Make sure VLAN Filters are off */
3177 rctl &= ~E1000_RCTL_VFE;
3179 if (e1000_tbi_sbp_enabled_82543(&adapter->hw))
3180 rctl |= E1000_RCTL_SBP;
3182 rctl &= ~E1000_RCTL_SBP;
3184 switch (adapter->rx_buffer_len) {
3187 rctl |= E1000_RCTL_SZ_2048;
3191 rctl |= E1000_RCTL_SZ_4096 |
3192 E1000_RCTL_BSEX | E1000_RCTL_LPE;
3196 rctl |= E1000_RCTL_SZ_8192 |
3197 E1000_RCTL_BSEX | E1000_RCTL_LPE;
3201 rctl |= E1000_RCTL_SZ_16384 |
3202 E1000_RCTL_BSEX | E1000_RCTL_LPE;
3206 if (ifp->if_mtu > ETHERMTU)
3207 rctl |= E1000_RCTL_LPE;
3209 rctl &= ~E1000_RCTL_LPE;
3211 /* Enable Receives */
3212 E1000_WRITE_REG(&adapter->hw, E1000_RCTL, rctl);
3216 em_destroy_rx_ring(struct adapter *adapter, int ndesc)
3218 struct em_buffer *rx_buffer;
3221 if (adapter->rx_buffer_area == NULL)
3224 for (i = 0; i < ndesc; i++) {
3225 rx_buffer = &adapter->rx_buffer_area[i];
3227 KKASSERT(rx_buffer->m_head == NULL);
3228 bus_dmamap_destroy(adapter->rxtag, rx_buffer->map);
3230 bus_dmamap_destroy(adapter->rxtag, adapter->rx_sparemap);
3231 bus_dma_tag_destroy(adapter->rxtag);
3233 kfree(adapter->rx_buffer_area, M_DEVBUF);
3234 adapter->rx_buffer_area = NULL;
3238 em_rxeof(struct adapter *adapter, int count)
3240 struct ifnet *ifp = &adapter->arpcom.ac_if;
3241 uint8_t status, accept_frame = 0, eop = 0;
3242 uint16_t len, desc_len, prev_len_adj;
3243 struct e1000_rx_desc *current_desc;
3247 i = adapter->next_rx_desc_to_check;
3248 current_desc = &adapter->rx_desc_base[i];
3250 if (!(current_desc->status & E1000_RXD_STAT_DD))
3253 while ((current_desc->status & E1000_RXD_STAT_DD) && count != 0) {
3254 struct mbuf *m = NULL;
3258 mp = adapter->rx_buffer_area[i].m_head;
3261 * Can't defer bus_dmamap_sync(9) because TBI_ACCEPT
3262 * needs to access the last received byte in the mbuf.
3264 bus_dmamap_sync(adapter->rxtag, adapter->rx_buffer_area[i].map,
3265 BUS_DMASYNC_POSTREAD);
3269 desc_len = le16toh(current_desc->length);
3270 status = current_desc->status;
3271 if (status & E1000_RXD_STAT_EOP) {
3274 if (desc_len < ETHER_CRC_LEN) {
3276 prev_len_adj = ETHER_CRC_LEN - desc_len;
3278 len = desc_len - ETHER_CRC_LEN;
3285 if (current_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK) {
3287 uint32_t pkt_len = desc_len;
3289 if (adapter->fmp != NULL)
3290 pkt_len += adapter->fmp->m_pkthdr.len;
3292 last_byte = *(mtod(mp, caddr_t) + desc_len - 1);
3293 if (TBI_ACCEPT(&adapter->hw, status,
3294 current_desc->errors, pkt_len, last_byte,
3295 adapter->min_frame_size, adapter->max_frame_size)) {
3296 e1000_tbi_adjust_stats_82543(&adapter->hw,
3297 &adapter->stats, pkt_len,
3298 adapter->hw.mac.addr,
3299 adapter->max_frame_size);
3308 if (em_newbuf(adapter, i, 0) != 0) {
3313 /* Assign correct length to the current fragment */
3316 if (adapter->fmp == NULL) {
3317 mp->m_pkthdr.len = len;
3318 adapter->fmp = mp; /* Store the first mbuf */
3322 * Chain mbuf's together
3326 * Adjust length of previous mbuf in chain if
3327 * we received less than 4 bytes in the last
3330 if (prev_len_adj > 0) {
3331 adapter->lmp->m_len -= prev_len_adj;
3332 adapter->fmp->m_pkthdr.len -=
3335 adapter->lmp->m_next = mp;
3336 adapter->lmp = adapter->lmp->m_next;
3337 adapter->fmp->m_pkthdr.len += len;
3341 adapter->fmp->m_pkthdr.rcvif = ifp;
3344 if (ifp->if_capenable & IFCAP_RXCSUM) {
3345 em_rxcsum(adapter, current_desc,
3349 if (status & E1000_RXD_STAT_VP) {
3350 adapter->fmp->m_pkthdr.ether_vlantag =
3351 (le16toh(current_desc->special) &
3352 E1000_RXD_SPC_VLAN_MASK);
3353 adapter->fmp->m_flags |= M_VLANTAG;
3356 adapter->fmp = NULL;
3357 adapter->lmp = NULL;
3363 /* Reuse loaded DMA map and just update mbuf chain */
3364 mp = adapter->rx_buffer_area[i].m_head;
3365 mp->m_len = mp->m_pkthdr.len = MCLBYTES;
3366 mp->m_data = mp->m_ext.ext_buf;
3368 if (adapter->max_frame_size <= (MCLBYTES - ETHER_ALIGN))
3369 m_adj(mp, ETHER_ALIGN);
3371 if (adapter->fmp != NULL) {
3372 m_freem(adapter->fmp);
3373 adapter->fmp = NULL;
3374 adapter->lmp = NULL;
3379 /* Zero out the receive descriptors status. */
3380 current_desc->status = 0;
3383 ifp->if_input(ifp, m);
3385 /* Advance our pointers to the next descriptor. */
3386 if (++i == adapter->num_rx_desc)
3388 current_desc = &adapter->rx_desc_base[i];
3390 adapter->next_rx_desc_to_check = i;
3392 /* Advance the E1000's Receive Queue #0 "Tail Pointer". */
3394 i = adapter->num_rx_desc - 1;
3395 E1000_WRITE_REG(&adapter->hw, E1000_RDT(0), i);
3399 em_rxcsum(struct adapter *adapter, struct e1000_rx_desc *rx_desc,
3402 /* 82543 or newer only */
3403 if (adapter->hw.mac.type < e1000_82543 ||
3404 /* Ignore Checksum bit is set */
3405 (rx_desc->status & E1000_RXD_STAT_IXSM))
3408 if ((rx_desc->status & E1000_RXD_STAT_IPCS) &&
3409 !(rx_desc->errors & E1000_RXD_ERR_IPE)) {
3410 /* IP Checksum Good */
3411 mp->m_pkthdr.csum_flags |= CSUM_IP_CHECKED | CSUM_IP_VALID;
3414 if ((rx_desc->status & E1000_RXD_STAT_TCPCS) &&
3415 !(rx_desc->errors & E1000_RXD_ERR_TCPE)) {
3416 mp->m_pkthdr.csum_flags |= CSUM_DATA_VALID |
3418 CSUM_FRAG_NOT_CHECKED;
3419 mp->m_pkthdr.csum_data = htons(0xffff);
3424 em_enable_intr(struct adapter *adapter)
3426 uint32_t ims_mask = IMS_ENABLE_MASK;
3428 lwkt_serialize_handler_enable(adapter->arpcom.ac_if.if_serializer);
3432 if (adapter->hw.mac.type == e1000_82574) {
3433 E1000_WRITE_REG(&adapter->hw, EM_EIAC, EM_MSIX_MASK);
3434 ims_mask |= EM_MSIX_MASK;
3437 E1000_WRITE_REG(&adapter->hw, E1000_IMS, ims_mask);
3441 em_disable_intr(struct adapter *adapter)
3443 uint32_t clear = 0xffffffff;
3446 * The first version of 82542 had an errata where when link was forced
3447 * it would stay up even up even if the cable was disconnected.
3448 * Sequence errors were used to detect the disconnect and then the
3449 * driver would unforce the link. This code in the in the ISR. For
3450 * this to work correctly the Sequence error interrupt had to be
3451 * enabled all the time.
3453 if (adapter->hw.mac.type == e1000_82542 &&
3454 adapter->hw.revision_id == E1000_REVISION_2)
3455 clear &= ~E1000_ICR_RXSEQ;
3456 else if (adapter->hw.mac.type == e1000_82574)
3457 E1000_WRITE_REG(&adapter->hw, EM_EIAC, 0);
3459 E1000_WRITE_REG(&adapter->hw, E1000_IMC, clear);
3461 lwkt_serialize_handler_disable(adapter->arpcom.ac_if.if_serializer);
3465 * Bit of a misnomer, what this really means is
3466 * to enable OS management of the system... aka
3467 * to disable special hardware management features
3470 em_get_mgmt(struct adapter *adapter)
3472 /* A shared code workaround */
3473 #define E1000_82542_MANC2H E1000_MANC2H
3474 if (adapter->flags & EM_FLAG_HAS_MGMT) {
3475 int manc2h = E1000_READ_REG(&adapter->hw, E1000_MANC2H);
3476 int manc = E1000_READ_REG(&adapter->hw, E1000_MANC);
3478 /* disable hardware interception of ARP */
3479 manc &= ~(E1000_MANC_ARP_EN);
3481 /* enable receiving management packets to the host */
3482 if (adapter->hw.mac.type >= e1000_82571) {
3483 manc |= E1000_MANC_EN_MNG2HOST;
3484 #define E1000_MNG2HOST_PORT_623 (1 << 5)
3485 #define E1000_MNG2HOST_PORT_664 (1 << 6)
3486 manc2h |= E1000_MNG2HOST_PORT_623;
3487 manc2h |= E1000_MNG2HOST_PORT_664;
3488 E1000_WRITE_REG(&adapter->hw, E1000_MANC2H, manc2h);
3491 E1000_WRITE_REG(&adapter->hw, E1000_MANC, manc);
3496 * Give control back to hardware management
3497 * controller if there is one.
3500 em_rel_mgmt(struct adapter *adapter)
3502 if (adapter->flags & EM_FLAG_HAS_MGMT) {
3503 int manc = E1000_READ_REG(&adapter->hw, E1000_MANC);
3505 /* re-enable hardware interception of ARP */
3506 manc |= E1000_MANC_ARP_EN;
3508 if (adapter->hw.mac.type >= e1000_82571)
3509 manc &= ~E1000_MANC_EN_MNG2HOST;
3511 E1000_WRITE_REG(&adapter->hw, E1000_MANC, manc);
3516 * em_get_hw_control() sets {CTRL_EXT|FWSM}:DRV_LOAD bit.
3517 * For ASF and Pass Through versions of f/w this means that
3518 * the driver is loaded. For AMT version (only with 82573)
3519 * of the f/w this means that the network i/f is open.
3522 em_get_hw_control(struct adapter *adapter)
3524 /* Let firmware know the driver has taken over */
3525 if (adapter->hw.mac.type == e1000_82573) {
3528 swsm = E1000_READ_REG(&adapter->hw, E1000_SWSM);
3529 E1000_WRITE_REG(&adapter->hw, E1000_SWSM,
3530 swsm | E1000_SWSM_DRV_LOAD);
3534 ctrl_ext = E1000_READ_REG(&adapter->hw, E1000_CTRL_EXT);
3535 E1000_WRITE_REG(&adapter->hw, E1000_CTRL_EXT,
3536 ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
3538 adapter->flags |= EM_FLAG_HW_CTRL;
3542 * em_rel_hw_control() resets {CTRL_EXT|FWSM}:DRV_LOAD bit.
3543 * For ASF and Pass Through versions of f/w this means that the
3544 * driver is no longer loaded. For AMT version (only with 82573)
3545 * of the f/w this means that the network i/f is closed.
3548 em_rel_hw_control(struct adapter *adapter)
3550 if ((adapter->flags & EM_FLAG_HW_CTRL) == 0)
3552 adapter->flags &= ~EM_FLAG_HW_CTRL;
3554 /* Let firmware taken over control of h/w */
3555 if (adapter->hw.mac.type == e1000_82573) {
3558 swsm = E1000_READ_REG(&adapter->hw, E1000_SWSM);
3559 E1000_WRITE_REG(&adapter->hw, E1000_SWSM,
3560 swsm & ~E1000_SWSM_DRV_LOAD);
3564 ctrl_ext = E1000_READ_REG(&adapter->hw, E1000_CTRL_EXT);
3565 E1000_WRITE_REG(&adapter->hw, E1000_CTRL_EXT,
3566 ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
3571 em_is_valid_eaddr(const uint8_t *addr)
3573 char zero_addr[ETHER_ADDR_LEN] = { 0, 0, 0, 0, 0, 0 };
3575 if ((addr[0] & 1) || !bcmp(addr, zero_addr, ETHER_ADDR_LEN))
3582 * Enable PCI Wake On Lan capability
3585 em_enable_wol(device_t dev)
3587 uint16_t cap, status;
3590 /* First find the capabilities pointer*/
3591 cap = pci_read_config(dev, PCIR_CAP_PTR, 2);
3593 /* Read the PM Capabilities */
3594 id = pci_read_config(dev, cap, 1);
3595 if (id != PCIY_PMG) /* Something wrong */
3599 * OK, we have the power capabilities,
3600 * so now get the status register
3602 cap += PCIR_POWER_STATUS;
3603 status = pci_read_config(dev, cap, 2);
3604 status |= PCIM_PSTAT_PME | PCIM_PSTAT_PMEENABLE;
3605 pci_write_config(dev, cap, status, 2);
3610 * 82544 Coexistence issue workaround.
3611 * There are 2 issues.
3612 * 1. Transmit Hang issue.
3613 * To detect this issue, following equation can be used...
3614 * SIZE[3:0] + ADDR[2:0] = SUM[3:0].
3615 * If SUM[3:0] is in between 1 to 4, we will have this issue.
3618 * To detect this issue, following equation can be used...
3619 * SIZE[3:0] + ADDR[2:0] = SUM[3:0].
3620 * If SUM[3:0] is in between 9 to c, we will have this issue.
3623 * Make sure we do not have ending address
3624 * as 1,2,3,4(Hang) or 9,a,b,c (DAC)
3627 em_82544_fill_desc(bus_addr_t address, uint32_t length, PDESC_ARRAY desc_array)
3629 uint32_t safe_terminator;
3632 * Since issue is sensitive to length and address.
3633 * Let us first check the address...
3636 desc_array->descriptor[0].address = address;
3637 desc_array->descriptor[0].length = length;
3638 desc_array->elements = 1;
3639 return (desc_array->elements);
3643 (uint32_t)((((uint32_t)address & 0x7) + (length & 0xF)) & 0xF);
3645 /* If it does not fall between 0x1 to 0x4 and 0x9 to 0xC then return */
3646 if (safe_terminator == 0 ||
3647 (safe_terminator > 4 && safe_terminator < 9) ||
3648 (safe_terminator > 0xC && safe_terminator <= 0xF)) {
3649 desc_array->descriptor[0].address = address;
3650 desc_array->descriptor[0].length = length;
3651 desc_array->elements = 1;
3652 return (desc_array->elements);
3655 desc_array->descriptor[0].address = address;
3656 desc_array->descriptor[0].length = length - 4;
3657 desc_array->descriptor[1].address = address + (length - 4);
3658 desc_array->descriptor[1].length = 4;
3659 desc_array->elements = 2;
3660 return (desc_array->elements);
3664 em_update_stats(struct adapter *adapter)
3666 struct ifnet *ifp = &adapter->arpcom.ac_if;
3668 if (adapter->hw.phy.media_type == e1000_media_type_copper ||
3669 (E1000_READ_REG(&adapter->hw, E1000_STATUS) & E1000_STATUS_LU)) {
3670 adapter->stats.symerrs +=
3671 E1000_READ_REG(&adapter->hw, E1000_SYMERRS);
3672 adapter->stats.sec += E1000_READ_REG(&adapter->hw, E1000_SEC);
3674 adapter->stats.crcerrs += E1000_READ_REG(&adapter->hw, E1000_CRCERRS);
3675 adapter->stats.mpc += E1000_READ_REG(&adapter->hw, E1000_MPC);
3676 adapter->stats.scc += E1000_READ_REG(&adapter->hw, E1000_SCC);
3677 adapter->stats.ecol += E1000_READ_REG(&adapter->hw, E1000_ECOL);
3679 adapter->stats.mcc += E1000_READ_REG(&adapter->hw, E1000_MCC);
3680 adapter->stats.latecol += E1000_READ_REG(&adapter->hw, E1000_LATECOL);
3681 adapter->stats.colc += E1000_READ_REG(&adapter->hw, E1000_COLC);
3682 adapter->stats.dc += E1000_READ_REG(&adapter->hw, E1000_DC);
3683 adapter->stats.rlec += E1000_READ_REG(&adapter->hw, E1000_RLEC);
3684 adapter->stats.xonrxc += E1000_READ_REG(&adapter->hw, E1000_XONRXC);
3685 adapter->stats.xontxc += E1000_READ_REG(&adapter->hw, E1000_XONTXC);
3686 adapter->stats.xoffrxc += E1000_READ_REG(&adapter->hw, E1000_XOFFRXC);
3687 adapter->stats.xofftxc += E1000_READ_REG(&adapter->hw, E1000_XOFFTXC);
3688 adapter->stats.fcruc += E1000_READ_REG(&adapter->hw, E1000_FCRUC);
3689 adapter->stats.prc64 += E1000_READ_REG(&adapter->hw, E1000_PRC64);
3690 adapter->stats.prc127 += E1000_READ_REG(&adapter->hw, E1000_PRC127);
3691 adapter->stats.prc255 += E1000_READ_REG(&adapter->hw, E1000_PRC255);
3692 adapter->stats.prc511 += E1000_READ_REG(&adapter->hw, E1000_PRC511);
3693 adapter->stats.prc1023 += E1000_READ_REG(&adapter->hw, E1000_PRC1023);
3694 adapter->stats.prc1522 += E1000_READ_REG(&adapter->hw, E1000_PRC1522);
3695 adapter->stats.gprc += E1000_READ_REG(&adapter->hw, E1000_GPRC);
3696 adapter->stats.bprc += E1000_READ_REG(&adapter->hw, E1000_BPRC);
3697 adapter->stats.mprc += E1000_READ_REG(&adapter->hw, E1000_MPRC);
3698 adapter->stats.gptc += E1000_READ_REG(&adapter->hw, E1000_GPTC);
3700 /* For the 64-bit byte counters the low dword must be read first. */
3701 /* Both registers clear on the read of the high dword */
3703 adapter->stats.gorc += E1000_READ_REG(&adapter->hw, E1000_GORCH);
3704 adapter->stats.gotc += E1000_READ_REG(&adapter->hw, E1000_GOTCH);
3706 adapter->stats.rnbc += E1000_READ_REG(&adapter->hw, E1000_RNBC);
3707 adapter->stats.ruc += E1000_READ_REG(&adapter->hw, E1000_RUC);
3708 adapter->stats.rfc += E1000_READ_REG(&adapter->hw, E1000_RFC);
3709 adapter->stats.roc += E1000_READ_REG(&adapter->hw, E1000_ROC);
3710 adapter->stats.rjc += E1000_READ_REG(&adapter->hw, E1000_RJC);
3712 adapter->stats.tor += E1000_READ_REG(&adapter->hw, E1000_TORH);
3713 adapter->stats.tot += E1000_READ_REG(&adapter->hw, E1000_TOTH);
3715 adapter->stats.tpr += E1000_READ_REG(&adapter->hw, E1000_TPR);
3716 adapter->stats.tpt += E1000_READ_REG(&adapter->hw, E1000_TPT);
3717 adapter->stats.ptc64 += E1000_READ_REG(&adapter->hw, E1000_PTC64);
3718 adapter->stats.ptc127 += E1000_READ_REG(&adapter->hw, E1000_PTC127);
3719 adapter->stats.ptc255 += E1000_READ_REG(&adapter->hw, E1000_PTC255);
3720 adapter->stats.ptc511 += E1000_READ_REG(&adapter->hw, E1000_PTC511);
3721 adapter->stats.ptc1023 += E1000_READ_REG(&adapter->hw, E1000_PTC1023);
3722 adapter->stats.ptc1522 += E1000_READ_REG(&adapter->hw, E1000_PTC1522);
3723 adapter->stats.mptc += E1000_READ_REG(&adapter->hw, E1000_MPTC);
3724 adapter->stats.bptc += E1000_READ_REG(&adapter->hw, E1000_BPTC);
3726 if (adapter->hw.mac.type >= e1000_82543) {
3727 adapter->stats.algnerrc +=
3728 E1000_READ_REG(&adapter->hw, E1000_ALGNERRC);
3729 adapter->stats.rxerrc +=
3730 E1000_READ_REG(&adapter->hw, E1000_RXERRC);
3731 adapter->stats.tncrs +=
3732 E1000_READ_REG(&adapter->hw, E1000_TNCRS);
3733 adapter->stats.cexterr +=
3734 E1000_READ_REG(&adapter->hw, E1000_CEXTERR);
3735 adapter->stats.tsctc +=
3736 E1000_READ_REG(&adapter->hw, E1000_TSCTC);
3737 adapter->stats.tsctfc +=
3738 E1000_READ_REG(&adapter->hw, E1000_TSCTFC);
3741 ifp->if_collisions = adapter->stats.colc;
3745 adapter->dropped_pkts + adapter->stats.rxerrc +
3746 adapter->stats.crcerrs + adapter->stats.algnerrc +
3747 adapter->stats.ruc + adapter->stats.roc +
3748 adapter->stats.mpc + adapter->stats.cexterr;
3752 adapter->stats.ecol + adapter->stats.latecol +
3753 adapter->watchdog_events;
3757 em_print_debug_info(struct adapter *adapter)
3759 device_t dev = adapter->dev;
3760 uint8_t *hw_addr = adapter->hw.hw_addr;
3762 device_printf(dev, "Adapter hardware address = %p \n", hw_addr);
3763 device_printf(dev, "CTRL = 0x%x RCTL = 0x%x \n",
3764 E1000_READ_REG(&adapter->hw, E1000_CTRL),
3765 E1000_READ_REG(&adapter->hw, E1000_RCTL));
3766 device_printf(dev, "Packet buffer = Tx=%dk Rx=%dk \n",
3767 ((E1000_READ_REG(&adapter->hw, E1000_PBA) & 0xffff0000) >> 16),\
3768 (E1000_READ_REG(&adapter->hw, E1000_PBA) & 0xffff) );
3769 device_printf(dev, "Flow control watermarks high = %d low = %d\n",
3770 adapter->hw.fc.high_water,
3771 adapter->hw.fc.low_water);
3772 device_printf(dev, "tx_int_delay = %d, tx_abs_int_delay = %d\n",
3773 E1000_READ_REG(&adapter->hw, E1000_TIDV),
3774 E1000_READ_REG(&adapter->hw, E1000_TADV));
3775 device_printf(dev, "rx_int_delay = %d, rx_abs_int_delay = %d\n",
3776 E1000_READ_REG(&adapter->hw, E1000_RDTR),
3777 E1000_READ_REG(&adapter->hw, E1000_RADV));
3778 device_printf(dev, "fifo workaround = %lld, fifo_reset_count = %lld\n",
3779 (long long)adapter->tx_fifo_wrk_cnt,
3780 (long long)adapter->tx_fifo_reset_cnt);
3781 device_printf(dev, "hw tdh = %d, hw tdt = %d\n",
3782 E1000_READ_REG(&adapter->hw, E1000_TDH(0)),
3783 E1000_READ_REG(&adapter->hw, E1000_TDT(0)));
3784 device_printf(dev, "hw rdh = %d, hw rdt = %d\n",
3785 E1000_READ_REG(&adapter->hw, E1000_RDH(0)),
3786 E1000_READ_REG(&adapter->hw, E1000_RDT(0)));
3787 device_printf(dev, "Num Tx descriptors avail = %d\n",
3788 adapter->num_tx_desc_avail);
3789 device_printf(dev, "Tx Descriptors not avail1 = %ld\n",
3790 adapter->no_tx_desc_avail1);
3791 device_printf(dev, "Tx Descriptors not avail2 = %ld\n",
3792 adapter->no_tx_desc_avail2);
3793 device_printf(dev, "Std mbuf failed = %ld\n",
3794 adapter->mbuf_alloc_failed);
3795 device_printf(dev, "Std mbuf cluster failed = %ld\n",
3796 adapter->mbuf_cluster_failed);
3797 device_printf(dev, "Driver dropped packets = %ld\n",
3798 adapter->dropped_pkts);
3799 device_printf(dev, "Driver tx dma failure in encap = %ld\n",
3800 adapter->no_tx_dma_setup);
3804 em_print_hw_stats(struct adapter *adapter)
3806 device_t dev = adapter->dev;
3808 device_printf(dev, "Excessive collisions = %lld\n",
3809 (long long)adapter->stats.ecol);
3810 #if (DEBUG_HW > 0) /* Dont output these errors normally */
3811 device_printf(dev, "Symbol errors = %lld\n",
3812 (long long)adapter->stats.symerrs);
3814 device_printf(dev, "Sequence errors = %lld\n",
3815 (long long)adapter->stats.sec);
3816 device_printf(dev, "Defer count = %lld\n",
3817 (long long)adapter->stats.dc);
3818 device_printf(dev, "Missed Packets = %lld\n",
3819 (long long)adapter->stats.mpc);
3820 device_printf(dev, "Receive No Buffers = %lld\n",
3821 (long long)adapter->stats.rnbc);
3822 /* RLEC is inaccurate on some hardware, calculate our own. */
3823 device_printf(dev, "Receive Length Errors = %lld\n",
3824 ((long long)adapter->stats.roc + (long long)adapter->stats.ruc));
3825 device_printf(dev, "Receive errors = %lld\n",
3826 (long long)adapter->stats.rxerrc);
3827 device_printf(dev, "Crc errors = %lld\n",
3828 (long long)adapter->stats.crcerrs);
3829 device_printf(dev, "Alignment errors = %lld\n",
3830 (long long)adapter->stats.algnerrc);
3831 device_printf(dev, "Collision/Carrier extension errors = %lld\n",
3832 (long long)adapter->stats.cexterr);
3833 device_printf(dev, "RX overruns = %ld\n", adapter->rx_overruns);
3834 device_printf(dev, "watchdog timeouts = %ld\n",
3835 adapter->watchdog_events);
3836 device_printf(dev, "XON Rcvd = %lld\n",
3837 (long long)adapter->stats.xonrxc);
3838 device_printf(dev, "XON Xmtd = %lld\n",
3839 (long long)adapter->stats.xontxc);
3840 device_printf(dev, "XOFF Rcvd = %lld\n",
3841 (long long)adapter->stats.xoffrxc);
3842 device_printf(dev, "XOFF Xmtd = %lld\n",
3843 (long long)adapter->stats.xofftxc);
3844 device_printf(dev, "Good Packets Rcvd = %lld\n",
3845 (long long)adapter->stats.gprc);
3846 device_printf(dev, "Good Packets Xmtd = %lld\n",
3847 (long long)adapter->stats.gptc);
3851 em_print_nvm_info(struct adapter *adapter)
3853 uint16_t eeprom_data;
3856 /* Its a bit crude, but it gets the job done */
3857 kprintf("\nInterface EEPROM Dump:\n");
3858 kprintf("Offset\n0x0000 ");
3859 for (i = 0, j = 0; i < 32; i++, j++) {
3860 if (j == 8) { /* Make the offset block */
3862 kprintf("\n0x00%x0 ",row);
3864 e1000_read_nvm(&adapter->hw, i, 1, &eeprom_data);
3865 kprintf("%04x ", eeprom_data);
3871 em_sysctl_debug_info(SYSCTL_HANDLER_ARGS)
3873 struct adapter *adapter;
3878 error = sysctl_handle_int(oidp, &result, 0, req);
3879 if (error || !req->newptr)
3882 adapter = (struct adapter *)arg1;
3883 ifp = &adapter->arpcom.ac_if;
3885 lwkt_serialize_enter(ifp->if_serializer);
3888 em_print_debug_info(adapter);
3891 * This value will cause a hex dump of the
3892 * first 32 16-bit words of the EEPROM to
3896 em_print_nvm_info(adapter);
3898 lwkt_serialize_exit(ifp->if_serializer);
3904 em_sysctl_stats(SYSCTL_HANDLER_ARGS)
3909 error = sysctl_handle_int(oidp, &result, 0, req);
3910 if (error || !req->newptr)
3914 struct adapter *adapter = (struct adapter *)arg1;
3915 struct ifnet *ifp = &adapter->arpcom.ac_if;
3917 lwkt_serialize_enter(ifp->if_serializer);
3918 em_print_hw_stats(adapter);
3919 lwkt_serialize_exit(ifp->if_serializer);
3925 em_add_sysctl(struct adapter *adapter)
3927 sysctl_ctx_init(&adapter->sysctl_ctx);
3928 adapter->sysctl_tree = SYSCTL_ADD_NODE(&adapter->sysctl_ctx,
3929 SYSCTL_STATIC_CHILDREN(_hw), OID_AUTO,
3930 device_get_nameunit(adapter->dev),
3932 if (adapter->sysctl_tree == NULL) {
3933 device_printf(adapter->dev, "can't add sysctl node\n");
3935 SYSCTL_ADD_PROC(&adapter->sysctl_ctx,
3936 SYSCTL_CHILDREN(adapter->sysctl_tree),
3937 OID_AUTO, "debug", CTLTYPE_INT|CTLFLAG_RW, adapter, 0,
3938 em_sysctl_debug_info, "I", "Debug Information");
3940 SYSCTL_ADD_PROC(&adapter->sysctl_ctx,
3941 SYSCTL_CHILDREN(adapter->sysctl_tree),
3942 OID_AUTO, "stats", CTLTYPE_INT|CTLFLAG_RW, adapter, 0,
3943 em_sysctl_stats, "I", "Statistics");
3945 SYSCTL_ADD_INT(&adapter->sysctl_ctx,
3946 SYSCTL_CHILDREN(adapter->sysctl_tree),
3947 OID_AUTO, "rxd", CTLFLAG_RD,
3948 &adapter->num_rx_desc, 0, NULL);
3949 SYSCTL_ADD_INT(&adapter->sysctl_ctx,
3950 SYSCTL_CHILDREN(adapter->sysctl_tree),
3951 OID_AUTO, "txd", CTLFLAG_RD,
3952 &adapter->num_tx_desc, 0, NULL);
3954 if (adapter->hw.mac.type >= e1000_82540) {
3955 SYSCTL_ADD_PROC(&adapter->sysctl_ctx,
3956 SYSCTL_CHILDREN(adapter->sysctl_tree),
3957 OID_AUTO, "int_throttle_ceil",
3958 CTLTYPE_INT|CTLFLAG_RW, adapter, 0,
3959 em_sysctl_int_throttle, "I",
3960 "interrupt throttling rate");
3962 SYSCTL_ADD_PROC(&adapter->sysctl_ctx,
3963 SYSCTL_CHILDREN(adapter->sysctl_tree),
3964 OID_AUTO, "int_tx_nsegs",
3965 CTLTYPE_INT|CTLFLAG_RW, adapter, 0,
3966 em_sysctl_int_tx_nsegs, "I",
3967 "# segments per TX interrupt");
3972 em_sysctl_int_throttle(SYSCTL_HANDLER_ARGS)
3974 struct adapter *adapter = (void *)arg1;
3975 struct ifnet *ifp = &adapter->arpcom.ac_if;
3976 int error, throttle;
3978 throttle = adapter->int_throttle_ceil;
3979 error = sysctl_handle_int(oidp, &throttle, 0, req);
3980 if (error || req->newptr == NULL)
3982 if (throttle < 0 || throttle > 1000000000 / 256)
3987 * Set the interrupt throttling rate in 256ns increments,
3988 * recalculate sysctl value assignment to get exact frequency.
3990 throttle = 1000000000 / 256 / throttle;
3992 /* Upper 16bits of ITR is reserved and should be zero */
3993 if (throttle & 0xffff0000)
3997 lwkt_serialize_enter(ifp->if_serializer);
4000 adapter->int_throttle_ceil = 1000000000 / 256 / throttle;
4002 adapter->int_throttle_ceil = 0;
4004 if (ifp->if_flags & IFF_RUNNING)
4005 em_set_itr(adapter, throttle);
4007 lwkt_serialize_exit(ifp->if_serializer);
4010 if_printf(ifp, "Interrupt moderation set to %d/sec\n",
4011 adapter->int_throttle_ceil);
4017 em_sysctl_int_tx_nsegs(SYSCTL_HANDLER_ARGS)
4019 struct adapter *adapter = (void *)arg1;
4020 struct ifnet *ifp = &adapter->arpcom.ac_if;
4023 segs = adapter->tx_int_nsegs;
4024 error = sysctl_handle_int(oidp, &segs, 0, req);
4025 if (error || req->newptr == NULL)
4030 lwkt_serialize_enter(ifp->if_serializer);
4033 * Don't allow int_tx_nsegs to become:
4034 * o Less the oact_tx_desc
4035 * o Too large that no TX desc will cause TX interrupt to
4036 * be generated (OACTIVE will never recover)
4037 * o Too small that will cause tx_dd[] overflow
4039 if (segs < adapter->oact_tx_desc ||
4040 segs >= adapter->num_tx_desc - adapter->oact_tx_desc ||
4041 segs < adapter->num_tx_desc / EM_TXDD_SAFE) {
4045 adapter->tx_int_nsegs = segs;
4048 lwkt_serialize_exit(ifp->if_serializer);
4054 em_set_itr(struct adapter *adapter, uint32_t itr)
4056 E1000_WRITE_REG(&adapter->hw, E1000_ITR, itr);
4057 if (adapter->hw.mac.type == e1000_82574) {
4061 * When using MSIX interrupts we need to
4062 * throttle using the EITR register
4064 for (i = 0; i < 4; ++i) {
4065 E1000_WRITE_REG(&adapter->hw,
4066 E1000_EITR_82574(i), itr);
4072 em_disable_aspm(struct adapter *adapter)
4074 uint16_t link_cap, link_ctrl, disable;
4075 uint8_t pcie_ptr, reg;
4076 device_t dev = adapter->dev;
4078 switch (adapter->hw.mac.type) {
4083 * 82573 specification update
4084 * errata #8 disable L0s
4085 * errata #41 disable L1
4087 * 82571/82572 specification update
4088 # errata #13 disable L1
4089 * errata #68 disable L0s
4091 disable = PCIEM_LNKCTL_ASPM_L0S | PCIEM_LNKCTL_ASPM_L1;
4097 * 82574 specification update errata #20
4098 * 82583 specification update errata #9
4100 * There is no need to disable L1
4102 disable = PCIEM_LNKCTL_ASPM_L0S;
4109 pcie_ptr = pci_get_pciecap_ptr(dev);
4113 link_cap = pci_read_config(dev, pcie_ptr + PCIER_LINKCAP, 2);
4114 if ((link_cap & PCIEM_LNKCAP_ASPM_MASK) == 0)
4118 if_printf(&adapter->arpcom.ac_if,
4119 "disable ASPM %#02x\n", disable);
4122 reg = pcie_ptr + PCIER_LINKCTRL;
4123 link_ctrl = pci_read_config(dev, reg, 2);
4124 link_ctrl &= ~disable;
4125 pci_write_config(dev, reg, link_ctrl, 2);