drm/i915: Use struct pci_dev and Linux pci functions
authorFrançois Tigeot <ftigeot@wolfpond.org>
Wed, 24 Dec 2014 16:11:27 +0000 (17:11 +0100)
committerFrançois Tigeot <ftigeot@wolfpond.org>
Wed, 24 Dec 2014 17:09:27 +0000 (18:09 +0100)
sys/dev/drm/i915/i915_dma.c
sys/dev/drm/i915/i915_drv.c
sys/dev/drm/i915/i915_drv.h
sys/dev/drm/i915/i915_irq.c
sys/dev/drm/i915/i915_suspend.c
sys/dev/drm/i915/intel_display.c
sys/dev/drm/i915/intel_opregion.c
sys/dev/drm/i915/intel_panel.c

index 48da26d..73d76e6 100644 (file)
@@ -1096,12 +1096,15 @@ static int i915_set_status_page(struct drm_device *dev, void *data,
 static int i915_get_bridge_dev(struct drm_device *dev)
 {
        struct drm_i915_private *dev_priv = dev->dev_private;
+       static struct pci_dev i915_bridge_dev;
 
-       dev_priv->bridge_dev = pci_find_dbsf(0, 0, 0, 0);
-       if (!dev_priv->bridge_dev) {
+       i915_bridge_dev.dev = pci_find_dbsf(0, 0, 0, 0);
+       if (!i915_bridge_dev.dev) {
                DRM_ERROR("bridge device not found\n");
                return -1;
        }
+
+       dev_priv->bridge_dev = &i915_bridge_dev;
        return 0;
 }
 
@@ -1119,14 +1122,12 @@ intel_alloc_mchbar_resource(struct drm_device *dev)
        drm_i915_private_t *dev_priv = dev->dev_private;
        int reg = INTEL_INFO(dev)->gen >= 4 ? MCHBAR_I965 : MCHBAR_I915;
        device_t vga;
-       u32 temp_lo, temp_hi;
-       u64 mchbar_addr, temp;
+       u32 temp_lo, temp_hi = 0;
+       u64 mchbar_addr;
 
        if (INTEL_INFO(dev)->gen >= 4)
-               temp_hi = pci_read_config(dev_priv->bridge_dev, reg + 4, 4);
-       else
-               temp_hi = 0;
-       temp_lo = pci_read_config(dev_priv->bridge_dev, reg, 4);
+               pci_read_config_dword(dev_priv->bridge_dev, reg + 4, &temp_hi);
+       pci_read_config_dword(dev_priv->bridge_dev, reg, &temp_lo);
        mchbar_addr = ((u64)temp_hi << 32) | temp_lo;
 
        /* If ACPI doesn't have it, assume we need to allocate it ourselves */
@@ -1147,13 +1148,12 @@ intel_alloc_mchbar_resource(struct drm_device *dev)
                return (-ENOMEM);
        }
 
-       if (INTEL_INFO(dev)->gen >= 4) {
-               temp = rman_get_start(dev_priv->mch_res);
-               temp >>= 32;
-               pci_write_config(dev_priv->bridge_dev, reg + 4, temp, 4);
-       }
-       pci_write_config(dev_priv->bridge_dev, reg,
-           rman_get_start(dev_priv->mch_res) & UINT32_MAX, 4);
+       if (INTEL_INFO(dev)->gen >= 4)
+               pci_write_config_dword(dev_priv->bridge_dev, reg + 4,
+                                      upper_32_bits(rman_get_start(dev_priv->mch_res)));
+
+       pci_write_config_dword(dev_priv->bridge_dev, reg,
+                              lower_32_bits(rman_get_start(dev_priv->mch_res)));
        return 0;
 }
 
@@ -1169,10 +1169,10 @@ intel_setup_mchbar(struct drm_device *dev)
        dev_priv->mchbar_need_disable = false;
 
        if (IS_I915G(dev) || IS_I915GM(dev)) {
-               temp = pci_read_config(dev_priv->bridge_dev, DEVEN_REG, 4);
+               pci_read_config_dword(dev_priv->bridge_dev, DEVEN_REG, &temp);
                enabled = (temp & DEVEN_MCHBAR_EN) != 0;
        } else {
-               temp = pci_read_config(dev_priv->bridge_dev, mchbar_reg, 4);
+               pci_read_config_dword(dev_priv->bridge_dev, mchbar_reg, &temp);
                enabled = temp & 1;
        }
 
@@ -1187,11 +1187,11 @@ intel_setup_mchbar(struct drm_device *dev)
 
        /* Space is allocated or reserved, so enable it. */
        if (IS_I915G(dev) || IS_I915GM(dev)) {
-               pci_write_config(dev_priv->bridge_dev, DEVEN_REG,
-                   temp | DEVEN_MCHBAR_EN, 4);
+               pci_write_config_dword(dev_priv->bridge_dev, DEVEN_REG,
+                                      temp | DEVEN_MCHBAR_EN);
        } else {
-               temp = pci_read_config(dev_priv->bridge_dev, mchbar_reg, 4);
-               pci_write_config(dev_priv->bridge_dev, mchbar_reg, temp | 1, 4);
+               pci_read_config_dword(dev_priv->bridge_dev, mchbar_reg, &temp);
+               pci_write_config_dword(dev_priv->bridge_dev, mchbar_reg, temp | 1);
        }
 }
 
@@ -1205,17 +1205,13 @@ intel_teardown_mchbar(struct drm_device *dev)
 
        if (dev_priv->mchbar_need_disable) {
                if (IS_I915G(dev) || IS_I915GM(dev)) {
-                       temp = pci_read_config(dev_priv->bridge_dev,
-                           DEVEN_REG, 4);
+                       pci_read_config_dword(dev_priv->bridge_dev, DEVEN_REG, &temp);
                        temp &= ~DEVEN_MCHBAR_EN;
-                       pci_write_config(dev_priv->bridge_dev, DEVEN_REG,
-                           temp, 4);
+                       pci_write_config_dword(dev_priv->bridge_dev, DEVEN_REG, temp);
                } else {
-                       temp = pci_read_config(dev_priv->bridge_dev,
-                           mchbar_reg, 4);
+                       pci_read_config_dword(dev_priv->bridge_dev, mchbar_reg, &temp);
                        temp &= ~1;
-                       pci_write_config(dev_priv->bridge_dev, mchbar_reg,
-                           temp, 4);
+                       pci_write_config_dword(dev_priv->bridge_dev, mchbar_reg, temp);
                }
        }
 
@@ -1326,9 +1322,14 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags)
        struct drm_i915_private *dev_priv = dev->dev_private;
        unsigned long base, size;
        int mmio_bar, ret;
+       static struct pci_dev i915_pdev;
 
        ret = 0;
 
+       /* XXX: struct pci_dev */
+       i915_pdev.dev = dev->dev;
+       dev->pdev = &i915_pdev;
+
        /* i915 has 4 more counters */
        dev->counters += 4;
        dev->types[6] = _DRM_STAT_IRQ;
index 71d0ba9..04eaaaf 100644 (file)
@@ -650,8 +650,8 @@ static int i8xx_do_reset(struct drm_device *dev)
 static int i965_reset_complete(struct drm_device *dev)
 {
        u8 gdrst;
-       gdrst = pci_read_config(dev->dev, I965_GDRST, 1);
-       return (gdrst & 0x1);
+       pci_read_config_byte(dev->pdev, I965_GDRST, &gdrst);
+       return (gdrst & GRDOM_RESET_ENABLE) == 0;
 }
 
 static int i965_do_reset(struct drm_device *dev)
@@ -664,19 +664,19 @@ static int i965_do_reset(struct drm_device *dev)
         * well as the reset bit (GR/bit 0).  Setting the GR bit
         * triggers the reset; when done, the hardware will clear it.
         */
-       gdrst = pci_read_config(dev->dev, I965_GDRST, 1);
-       pci_write_config(dev->dev, I965_GDRST,
+       pci_read_config_byte(dev->pdev, I965_GDRST, &gdrst);
+       pci_write_config_byte(dev->pdev, I965_GDRST,
                              gdrst | GRDOM_RENDER |
-                             GRDOM_RESET_ENABLE, 1);
+                             GRDOM_RESET_ENABLE);
        ret =  wait_for(i965_reset_complete(dev), 500);
        if (ret)
                return ret;
 
        /* We can't reset render&media without also resetting display ... */
-       gdrst = pci_read_config(dev->dev, I965_GDRST, 1);
-       pci_write_config(dev->dev, I965_GDRST,
+       pci_read_config_byte(dev->pdev, I965_GDRST, &gdrst);
+       pci_write_config_byte(dev->pdev, I965_GDRST,
                              gdrst | GRDOM_MEDIA |
-                             GRDOM_RESET_ENABLE, 1);
+                             GRDOM_RESET_ENABLE);
 
        return wait_for(i965_reset_complete(dev), 500);
 }
index 8d0a9ad..d6d2db2 100644 (file)
@@ -662,7 +662,7 @@ typedef struct drm_i915_private {
         */
        uint32_t gpio_mmio_base;
 
-       struct device *bridge_dev;
+       struct pci_dev *bridge_dev;
        struct intel_ring_buffer ring[I915_NUM_RINGS];
        uint32_t next_seqno;
 
index 9865020..c6f649a 100644 (file)
@@ -1957,11 +1957,11 @@ static int valleyview_irq_postinstall(struct drm_device *dev)
        dev_priv->pipestat[1] = 0;
 
        /* Hack for broken MSIs on VLV */
-       pci_write_config(dev_priv->dev->dev, 0x94, 0xfee00000, 4);
-       msid = pci_read_config(dev->dev, 0x98, 2);
+       pci_write_config_dword(dev_priv->dev->pdev, 0x94, 0xfee00000);
+       pci_read_config_word(dev->pdev, 0x98, &msid);
        msid &= 0xff; /* mask out delivery bits */
        msid |= (1<<14);
-       pci_write_config(dev_priv->dev->dev, 0x98, msid, 4);
+       pci_write_config_word(dev_priv->dev->pdev, 0x98, msid);
 
        I915_WRITE(VLV_IMR, dev_priv->irq_mask);
        I915_WRITE(VLV_IER, enable_mask);
index 48042db..a4e1b94 100644 (file)
@@ -807,7 +807,7 @@ int i915_save_state(struct drm_device *dev)
        struct drm_i915_private *dev_priv = dev->dev_private;
        int i;
 
-       dev_priv->regfile.saveLBB = pci_read_config(dev->dev, LBB, 1);
+       pci_read_config_byte(dev->pdev, LBB, &dev_priv->regfile.saveLBB);
 
        DRM_LOCK(dev);
 
@@ -857,7 +857,7 @@ int i915_restore_state(struct drm_device *dev)
        struct drm_i915_private *dev_priv = dev->dev_private;
        int i;
 
-       pci_write_config(dev->dev, LBB, dev_priv->regfile.saveLBB, 1);
+       pci_write_config_byte(dev->pdev, LBB, dev_priv->regfile.saveLBB);
 
        DRM_LOCK(dev);
 
index c4dceae..79cf598 100644 (file)
@@ -4014,7 +4014,7 @@ static int i915gm_get_display_clock_speed(struct drm_device *dev)
 {
        u16 gcfgc = 0;
 
-       gcfgc = pci_read_config(dev->dev, GCFGC, 2);
+       pci_read_config_word(dev->pdev, GCFGC, &gcfgc);
 
        if (gcfgc & GC_LOW_FREQUENCY_ENABLE)
                return 133000;
@@ -9458,12 +9458,12 @@ int intel_modeset_vga_set_state(struct drm_device *dev, bool state)
        struct drm_i915_private *dev_priv = dev->dev_private;
        u16 gmch_ctrl;
 
-       gmch_ctrl = pci_read_config(dev_priv->bridge_dev, INTEL_GMCH_CTRL, 2);
+       pci_read_config_word(dev_priv->bridge_dev, INTEL_GMCH_CTRL, &gmch_ctrl);
        if (state)
                gmch_ctrl &= ~INTEL_GMCH_VGA_DISABLE;
        else
                gmch_ctrl |= INTEL_GMCH_VGA_DISABLE;
-       pci_write_config(dev_priv->bridge_dev, INTEL_GMCH_CTRL, gmch_ctrl, 2);
+       pci_write_config_word(dev_priv->bridge_dev, INTEL_GMCH_CTRL, gmch_ctrl);
        return 0;
 }
 
index 47d23fb..0aa5e38 100644 (file)
@@ -513,7 +513,7 @@ int intel_opregion_setup(struct drm_device *dev)
        char buf[sizeof(OPREGION_SIGNATURE)];
        int err = 0;
 
-       asls = pci_read_config(dev->dev, PCI_ASLS, 4);
+       pci_read_config_dword(dev->pdev, PCI_ASLS, &asls);
        DRM_DEBUG_DRIVER("graphic opregion physical addr: 0x%x\n", asls);
        if (asls == 0) {
                DRM_DEBUG_DRIVER("ACPI OpRegion not supported!\n");
index 32b6454..9a912ea 100644 (file)
@@ -243,7 +243,7 @@ static u32 intel_panel_get_backlight(struct drm_device *dev)
                if (is_backlight_combination_mode(dev)) {
                        u8 lbpc;
 
-                       lbpc = pci_read_config(dev->dev, PCI_LBPC, 1);
+                       pci_read_config_byte(dev->pdev, PCI_LBPC, &lbpc);
                        val *= lbpc;
                }
        }
@@ -277,7 +277,7 @@ static void intel_panel_actually_set_backlight(struct drm_device *dev, u32 level
 
                lbpc = level * 0xfe / max + 1;
                level /= lbpc;
-               pci_write_config(dev->dev, PCI_LBPC, lbpc, 4);
+               pci_write_config_byte(dev->pdev, PCI_LBPC, lbpc);
        }
 
        tmp = I915_READ(BLC_PWM_CTL);