From 9a6ee7e20253aa07aa57f821d6d2a5e65039df9e Mon Sep 17 00:00:00 2001 From: Joerg Sonnenberger Date: Fri, 19 Aug 2005 14:40:03 +0000 Subject: [PATCH] 5705K, 5714C, 5721, 5750, 5750M, 5751M, 5789 support. Add some hacks from the Broadcom Linux driver. Reorder initialisation to give bge_reset / bge_chipinit what it needs. Obtained-from: FreeBSD Submitted-by: Sepherosa Ziehau --- sys/dev/netif/bge/if_bge.c | 198 +++++++++++++++++++++++++--------- sys/dev/netif/bge/if_bgereg.h | 15 ++- 2 files changed, 157 insertions(+), 56 deletions(-) diff --git a/sys/dev/netif/bge/if_bge.c b/sys/dev/netif/bge/if_bge.c index 11347fc072..a7e8e4188a 100644 --- a/sys/dev/netif/bge/if_bge.c +++ b/sys/dev/netif/bge/if_bge.c @@ -31,7 +31,7 @@ * THE POSSIBILITY OF SUCH DAMAGE. * * $FreeBSD: src/sys/dev/bge/if_bge.c,v 1.3.2.29 2003/12/01 21:06:59 ambrisko Exp $ - * $DragonFly: src/sys/dev/netif/bge/if_bge.c,v 1.41 2005/06/21 15:27:55 joerg Exp $ + * $DragonFly: src/sys/dev/netif/bge/if_bge.c,v 1.42 2005/08/19 14:40:03 joerg Exp $ * */ @@ -130,37 +130,51 @@ static struct bge_type bge_devs[] = { { PCI_VENDOR_ALTEON, PCI_PRODUCT_ALTEON_BCM5700, - "Broadcom BCM5700 Gigabit Ethernet" }, - { PCI_VENDOR_ALTEON, PCI_PRODUCT_ALTEON_BCM5700, - "Broadcom BCM5701 Gigabit Ethernet" }, + "Alteon BCM5700 Gigabit Ethernet" }, + { PCI_VENDOR_ALTEON, PCI_PRODUCT_ALTEON_BCM5701, + "Alteon BCM5701 Gigabit Ethernet" }, { PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM5700, "Broadcom BCM5700 Gigabit Ethernet" }, { PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM5701, "Broadcom BCM5701 Gigabit Ethernet" }, { PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM5702X, "Broadcom BCM5702X Gigabit Ethernet" }, - { PCI_VENDOR_BROADCOM, BCOM_DEVICEID_BCM5702X, - "Broadcom BCM5702X Gigabit Ethernet" }, + { PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM5702_ALT, + "Broadcom BCM5702 Gigabit Ethernet" }, { PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM5703X, "Broadcom BCM5703X Gigabit Ethernet" }, - { PCI_VENDOR_BROADCOM, BCOM_DEVICEID_BCM5703X, - "Broadcom BCM5703X Gigabit Ethernet" }, + { PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM5703A3, + "Broadcom BCM5703 Gigabit Ethernet" }, { PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM5704C, "Broadcom BCM5704C Dual Gigabit Ethernet" }, { PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM5704S, "Broadcom BCM5704S Dual Gigabit Ethernet" }, { PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM5705, "Broadcom BCM5705 Gigabit Ethernet" }, + { PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM5705K, + "Broadcom BCM5705K Gigabit Ethernet" }, { PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM5705M, "Broadcom BCM5705M Gigabit Ethernet" }, - { PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM5705_ALT, + { PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM5705M_ALT, "Broadcom BCM5705M Gigabit Ethernet" }, + { PCI_VENDOR_BROADCOM, BCOM_DEVICEID_BCM5714C, + "Broadcom BCM5714C Gigabit Ethernet" }, + { PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM5721, + "Broadcom BCM5721 Gigabit Ethernet" }, + { PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM5750, + "Broadcom BCM5750 Gigabit Ethernet" }, + { PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM5750M, + "Broadcom BCM5750M Gigabit Ethernet" }, { PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM5751, "Broadcom BCM5751 Gigabit Ethernet" }, + { PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM5751M, + "Broadcom BCM5751M Gigabit Ethernet" }, { PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM5782, "Broadcom BCM5782 Gigabit Ethernet" }, - { PCI_VENDOR_BROADCOM, BCOM_DEVICEID_BCM5788, + { PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM5788, "Broadcom BCM5788 Gigabit Ethernet" }, + { PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM5789, + "Broadcom BCM5789 Gigabit Ethernet" }, { PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM5901, "Broadcom BCM5901 Fast Ethernet" }, { PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM5901A2, @@ -971,8 +985,13 @@ bge_chipinit(struct bge_softc *sc) BGE_MEMWIN_WRITE(sc, i, 0); /* Set up the PCI DMA control register. */ - if (pci_read_config(sc->bge_dev, BGE_PCI_PCISTATE, 4) & - BGE_PCISTATE_PCI_BUSMODE) { + if (sc->bge_pcie) { + /* PCI Express */ + dma_rw_ctl = BGE_PCI_READ_CMD|BGE_PCI_WRITE_CMD | + (0xf << BGE_PCIDMARWCTL_RD_WAT_SHIFT) | + (0x2 << BGE_PCIDMARWCTL_WR_WAT_SHIFT); + } else if (pci_read_config(sc->bge_dev, BGE_PCI_PCISTATE, 4) & + BGE_PCISTATE_PCI_BUSMODE) { /* Conventional PCI bus */ dma_rw_ctl = BGE_PCI_READ_CMD|BGE_PCI_WRITE_CMD | (0x7 << BGE_PCIDMARWCTL_RD_WAT_SHIFT) | @@ -1010,7 +1029,8 @@ bge_chipinit(struct bge_softc *sc) if (sc->bge_asicrev == BGE_ASICREV_BCM5703 || sc->bge_asicrev == BGE_ASICREV_BCM5704 || - sc->bge_asicrev == BGE_ASICREV_BCM5705) + sc->bge_asicrev == BGE_ASICREV_BCM5705 || + sc->bge_asicrev == BGE_ASICREV_BCM5750) dma_rw_ctl &= ~BGE_PCIDMARWCTL_MINDMA; pci_write_config(sc->bge_dev, BGE_PCI_DMA_RW_CTL, dma_rw_ctl, 4); @@ -1051,7 +1071,8 @@ bge_blockinit(struct bge_softc *sc) /* Note: the BCM5704 has a smaller mbuf space than other chips. */ - if (sc->bge_asicrev != BGE_ASICREV_BCM5705) { + if (sc->bge_asicrev != BGE_ASICREV_BCM5705 && + sc->bge_asicrev != BGE_ASICREV_BCM5750) { /* Configure mbuf memory pool */ if (sc->bge_extram) { CSR_WRITE_4(sc, BGE_BMAN_MBUFPOOL_BASEADDR, @@ -1076,7 +1097,8 @@ bge_blockinit(struct bge_softc *sc) } /* Configure mbuf pool watermarks */ - if (sc->bge_asicrev == BGE_ASICREV_BCM5705) { + if (sc->bge_asicrev == BGE_ASICREV_BCM5705 || + sc->bge_asicrev == BGE_ASICREV_BCM5750) { CSR_WRITE_4(sc, BGE_BMAN_MBUFPOOL_READDMA_LOWAT, 0x0); CSR_WRITE_4(sc, BGE_BMAN_MBUFPOOL_MACRX_LOWAT, 0x10); } else { @@ -1090,7 +1112,8 @@ bge_blockinit(struct bge_softc *sc) CSR_WRITE_4(sc, BGE_BMAN_DMA_DESCPOOL_HIWAT, 10); /* Enable buffer manager */ - if (sc->bge_asicrev != BGE_ASICREV_BCM5705) { + if (sc->bge_asicrev != BGE_ASICREV_BCM5705 && + sc->bge_asicrev != BGE_ASICREV_BCM5750) { CSR_WRITE_4(sc, BGE_BMAN_MODE, BGE_BMANMODE_ENABLE|BGE_BMANMODE_LOMBUF_ATTN); @@ -1129,7 +1152,8 @@ bge_blockinit(struct bge_softc *sc) rcb = &sc->bge_rdata->bge_info.bge_std_rx_rcb; BGE_HOSTADDR(rcb->bge_hostaddr, vtophys(&sc->bge_rdata->bge_rx_std_ring)); - if (sc->bge_asicrev == BGE_ASICREV_BCM5705) + if (sc->bge_asicrev == BGE_ASICREV_BCM5705 || + sc->bge_asicrev == BGE_ASICREV_BCM5750) rcb->bge_maxlen_flags = BGE_RCB_MAXLEN_FLAGS(512, 0); else rcb->bge_maxlen_flags = @@ -1150,7 +1174,8 @@ bge_blockinit(struct bge_softc *sc) * using this ring (i.e. once we set the MTU * high enough to require it). */ - if (sc->bge_asicrev != BGE_ASICREV_BCM5705) { + if (sc->bge_asicrev != BGE_ASICREV_BCM5705 && + sc->bge_asicrev != BGE_ASICREV_BCM5750) { rcb = &sc->bge_rdata->bge_info.bge_jumbo_rx_rcb; BGE_HOSTADDR(rcb->bge_hostaddr, vtophys(&sc->bge_rdata->bge_rx_jumbo_ring)); @@ -1205,7 +1230,8 @@ bge_blockinit(struct bge_softc *sc) vrcb->bge_hostaddr.bge_addr_hi = 0; BGE_HOSTADDR(vrcb->bge_hostaddr, vtophys(&sc->bge_rdata->bge_tx_ring)); vrcb->bge_nicaddr = BGE_NIC_TXRING_ADDR(0, BGE_TX_RING_CNT); - if (sc->bge_asicrev != BGE_ASICREV_BCM5705) + if (sc->bge_asicrev != BGE_ASICREV_BCM5705 && + sc->bge_asicrev != BGE_ASICREV_BCM5750) vrcb->bge_maxlen_flags = BGE_RCB_MAXLEN_FLAGS(BGE_TX_RING_CNT, 0); @@ -1291,7 +1317,8 @@ bge_blockinit(struct bge_softc *sc) CSR_WRITE_4(sc, BGE_HCC_TX_COAL_TICKS, sc->bge_tx_coal_ticks); CSR_WRITE_4(sc, BGE_HCC_RX_MAX_COAL_BDS, sc->bge_rx_max_coal_bds); CSR_WRITE_4(sc, BGE_HCC_TX_MAX_COAL_BDS, sc->bge_tx_max_coal_bds); - if (sc->bge_asicrev != BGE_ASICREV_BCM5705) { + if (sc->bge_asicrev != BGE_ASICREV_BCM5705 && + sc->bge_asicrev != BGE_ASICREV_BCM5750) { CSR_WRITE_4(sc, BGE_HCC_RX_COAL_TICKS_INT, 0); CSR_WRITE_4(sc, BGE_HCC_TX_COAL_TICKS_INT, 0); } @@ -1299,7 +1326,8 @@ bge_blockinit(struct bge_softc *sc) CSR_WRITE_4(sc, BGE_HCC_TX_MAX_COAL_BDS_INT, 0); /* Set up address of statistics block */ - if (sc->bge_asicrev != BGE_ASICREV_BCM5705) { + if (sc->bge_asicrev != BGE_ASICREV_BCM5705 && + sc->bge_asicrev != BGE_ASICREV_BCM5750) { CSR_WRITE_4(sc, BGE_HCC_STATS_ADDR_HI, 0); CSR_WRITE_4(sc, BGE_HCC_STATS_ADDR_LO, vtophys(&sc->bge_rdata->bge_info.bge_stats)); @@ -1328,7 +1356,8 @@ bge_blockinit(struct bge_softc *sc) CSR_WRITE_4(sc, BGE_RXLP_MODE, BGE_RXLPMODE_ENABLE); /* Turn on RX list selector state machine. */ - if (sc->bge_asicrev != BGE_ASICREV_BCM5705) + if (sc->bge_asicrev != BGE_ASICREV_BCM5705 && + sc->bge_asicrev != BGE_ASICREV_BCM5750) CSR_WRITE_4(sc, BGE_RXLS_MODE, BGE_RXLSMODE_ENABLE); /* Turn on DMA, clear stats */ @@ -1350,7 +1379,8 @@ bge_blockinit(struct bge_softc *sc) #endif /* Turn on DMA completion state machine */ - if (sc->bge_asicrev != BGE_ASICREV_BCM5705) + if (sc->bge_asicrev != BGE_ASICREV_BCM5705 && + sc->bge_asicrev != BGE_ASICREV_BCM5750) CSR_WRITE_4(sc, BGE_DMAC_MODE, BGE_DMACMODE_ENABLE); /* Turn on write DMA state machine */ @@ -1371,7 +1401,8 @@ bge_blockinit(struct bge_softc *sc) CSR_WRITE_4(sc, BGE_RDBDI_MODE, BGE_RDBDIMODE_ENABLE); /* Turn on Mbuf cluster free state machine */ - if (sc->bge_asicrev != BGE_ASICREV_BCM5705) + if (sc->bge_asicrev != BGE_ASICREV_BCM5705 && + sc->bge_asicrev != BGE_ASICREV_BCM5750) CSR_WRITE_4(sc, BGE_MBCF_MODE, BGE_MBCFMODE_ENABLE); /* Turn on send BD completion state machine */ @@ -1503,6 +1534,35 @@ bge_attach(device_t dev) goto fail; } + /* Save ASIC rev. */ + sc->bge_chipid = + pci_read_config(dev, BGE_PCI_MISC_CTL, 4) & + BGE_PCIMISCCTL_ASICREV; + sc->bge_asicrev = BGE_ASICREV(sc->bge_chipid); + sc->bge_chiprev = BGE_CHIPREV(sc->bge_chipid); + + /* + * Treat the 5714 like the 5750 until we have more info + * on this chip. + */ + if (sc->bge_asicrev == BGE_ASICREV_BCM5714) + sc->bge_asicrev = BGE_ASICREV_BCM5750; + + /* + * XXX: Broadcom Linux driver. Not in specs or eratta. + * PCI-Express? + */ + if (sc->bge_asicrev == BGE_ASICREV_BCM5750) { + uint32_t v; + + v = pci_read_config(dev, BGE_PCI_MSI_CAPID, 4); + if (((v >> 8) & 0xff) == BGE_PCIE_MSI_CAPID) { + v = pci_read_config(dev, BGE_PCIE_MSI_CAPID, 4); + if ((v & 0xff) == BGE_PCIE_MSI_CAPID_VAL) + sc->bge_pcie = 1; + } + } + ifp = &sc->arpcom.ac_if; if_initname(ifp, device_get_name(dev), device_get_unit(dev)); @@ -1546,19 +1606,12 @@ bge_attach(device_t dev) bzero(sc->bge_rdata, sizeof(struct bge_ring_data)); - /* Save ASIC rev. */ - - sc->bge_chipid = - pci_read_config(dev, BGE_PCI_MISC_CTL, 4) & - BGE_PCIMISCCTL_ASICREV; - sc->bge_asicrev = BGE_ASICREV(sc->bge_chipid); - sc->bge_chiprev = BGE_CHIPREV(sc->bge_chipid); - /* * Try to allocate memory for jumbo buffers. - * The 5705 does not appear to support jumbo frames. + * The 5705/5750 does not appear to support jumbo frames. */ - if (sc->bge_asicrev != BGE_ASICREV_BCM5705) { + if (sc->bge_asicrev != BGE_ASICREV_BCM5705 && + sc->bge_asicrev != BGE_ASICREV_BCM5750) { if (bge_alloc_jumbo_mem(sc)) { device_printf(dev, "jumbo buffer allocation failed\n"); error = ENXIO; @@ -1573,8 +1626,9 @@ bge_attach(device_t dev) sc->bge_rx_max_coal_bds = 64; sc->bge_tx_max_coal_bds = 128; - /* 5705 limits RX return ring to 512 entries. */ - if (sc->bge_asicrev == BGE_ASICREV_BCM5705) + /* 5705/5750 limits RX return ring to 512 entries. */ + if (sc->bge_asicrev == BGE_ASICREV_BCM5705 || + sc->bge_asicrev == BGE_ASICREV_BCM5750) sc->bge_return_ring_cnt = BGE_RETURN_RING_CNT_5705; else sc->bge_return_ring_cnt = BGE_RETURN_RING_CNT; @@ -1703,7 +1757,8 @@ bge_detach(device_t dev) crit_exit(); - if (sc->bge_asicrev != BGE_ASICREV_BCM5705) + if (sc->bge_asicrev != BGE_ASICREV_BCM5705 && + sc->bge_asicrev != BGE_ASICREV_BCM5750) bge_free_jumbo_mem(sc); return(0); @@ -1743,7 +1798,7 @@ static void bge_reset(struct bge_softc *sc) { device_t dev; - uint32_t cachesize, command, pcistate; + uint32_t cachesize, command, pcistate, reset; int i, val = 0; dev = sc->bge_dev; @@ -1757,12 +1812,37 @@ bge_reset(struct bge_softc *sc) BGE_PCIMISCCTL_INDIRECT_ACCESS|BGE_PCIMISCCTL_MASK_PCI_INTR| BGE_PCIMISCCTL_ENDIAN_WORDSWAP|BGE_PCIMISCCTL_PCISTATE_RW, 4); + reset = BGE_MISCCFG_RESET_CORE_CLOCKS|(65<<1); + + /* XXX: Broadcom Linux driver. */ + if (sc->bge_pcie) { + if (CSR_READ_4(sc, 0x7e2c) == 0x60) /* PCIE 1.0 */ + CSR_WRITE_4(sc, 0x7e2c, 0x20); + if (sc->bge_chipid != BGE_CHIPID_BCM5750_A0) { + /* Prevent PCIE link training during global reset */ + CSR_WRITE_4(sc, BGE_MISC_CFG, (1<<29)); + reset |= (1<<29); + } + } + /* Issue global reset */ - bge_writereg_ind(sc, BGE_MISC_CFG, - BGE_MISCCFG_RESET_CORE_CLOCKS | (65<<1)); + bge_writereg_ind(sc, BGE_MISC_CFG, reset); DELAY(1000); + /* XXX: Broadcom Linux driver. */ + if (sc->bge_pcie) { + if (sc->bge_chipid == BGE_CHIPID_BCM5750_A0) { + uint32_t v; + + DELAY(500000); /* wait for link training to complete */ + v = pci_read_config(dev, 0xc4, 4); + pci_write_config(dev, 0xc4, v | (1<<15), 4); + } + /* Set PCIE max payload size and clear error status. */ + pci_write_config(dev, 0xd8, 0xf5000, 4); + } + /* Reset some of the PCI state that got zapped by reset */ pci_write_config(dev, BGE_PCI_MISC_CTL, BGE_PCIMISCCTL_INDIRECT_ACCESS|BGE_PCIMISCCTL_MASK_PCI_INTR| @@ -1809,7 +1889,8 @@ bge_reset(struct bge_softc *sc) } /* Enable memory arbiter. */ - if (sc->bge_asicrev != BGE_ASICREV_BCM5705) + if (sc->bge_asicrev != BGE_ASICREV_BCM5705 && + sc->bge_asicrev != BGE_ASICREV_BCM5750) CSR_WRITE_4(sc, BGE_MARB_MODE, BGE_MARBMODE_ENABLE); /* Fix up byte swapping */ @@ -1818,9 +1899,15 @@ bge_reset(struct bge_softc *sc) CSR_WRITE_4(sc, BGE_MAC_MODE, 0); - DELAY(10000); + /* XXX: Broadcom Linux driver. */ + if (sc->bge_pcie && sc->bge_chipid != BGE_CHIPID_BCM5750_A0) { + uint32_t v; - return; + v = CSR_READ_4(sc, 0x7c00); + CSR_WRITE_4(sc, 0x7c00, v | (1<<25)); + } + + DELAY(10000); } /* @@ -2082,7 +2169,8 @@ bge_tick(void *xsc) crit_enter(); - if (sc->bge_asicrev == BGE_ASICREV_BCM5705) + if (sc->bge_asicrev == BGE_ASICREV_BCM5705 || + sc->bge_asicrev == BGE_ASICREV_BCM5750) bge_stats_update_regs(sc); else bge_stats_update(sc); @@ -2507,9 +2595,10 @@ bge_ioctl(struct ifnet *ifp, u_long command, caddr_t data, struct ucred *cr) switch(command) { case SIOCSIFMTU: - /* Disallow jumbo frames on 5705. */ - if ((sc->bge_asicrev == BGE_ASICREV_BCM5705 && - ifr->ifr_mtu > ETHERMTU) || ifr->ifr_mtu > BGE_JUMBO_MTU) + /* Disallow jumbo frames on 5705/5750. */ + if (((sc->bge_asicrev == BGE_ASICREV_BCM5705 || + sc->bge_asicrev == BGE_ASICREV_BCM5750) && + ifr->ifr_mtu > ETHERMTU) || ifr->ifr_mtu > BGE_JUMBO_MTU) error = EINVAL; else { ifp->if_mtu = ifr->ifr_mtu; @@ -2621,7 +2710,8 @@ bge_stop(struct bge_softc *sc) BGE_CLRBIT(sc, BGE_RX_MODE, BGE_RXMODE_ENABLE); BGE_CLRBIT(sc, BGE_RBDI_MODE, BGE_RBDIMODE_ENABLE); BGE_CLRBIT(sc, BGE_RXLP_MODE, BGE_RXLPMODE_ENABLE); - if (sc->bge_asicrev != BGE_ASICREV_BCM5705) + if (sc->bge_asicrev != BGE_ASICREV_BCM5705 && + sc->bge_asicrev != BGE_ASICREV_BCM5750) BGE_CLRBIT(sc, BGE_RXLS_MODE, BGE_RXLSMODE_ENABLE); BGE_CLRBIT(sc, BGE_RDBDI_MODE, BGE_RBDIMODE_ENABLE); BGE_CLRBIT(sc, BGE_RDC_MODE, BGE_RDCMODE_ENABLE); @@ -2635,7 +2725,8 @@ bge_stop(struct bge_softc *sc) BGE_CLRBIT(sc, BGE_SDI_MODE, BGE_SDIMODE_ENABLE); BGE_CLRBIT(sc, BGE_RDMA_MODE, BGE_RDMAMODE_ENABLE); BGE_CLRBIT(sc, BGE_SDC_MODE, BGE_SDCMODE_ENABLE); - if (sc->bge_asicrev != BGE_ASICREV_BCM5705) + if (sc->bge_asicrev != BGE_ASICREV_BCM5705 && + sc->bge_asicrev != BGE_ASICREV_BCM5750) BGE_CLRBIT(sc, BGE_DMAC_MODE, BGE_DMACMODE_ENABLE); BGE_CLRBIT(sc, BGE_SBDC_MODE, BGE_SBDCMODE_ENABLE); @@ -2645,11 +2736,13 @@ bge_stop(struct bge_softc *sc) */ BGE_CLRBIT(sc, BGE_HCC_MODE, BGE_HCCMODE_ENABLE); BGE_CLRBIT(sc, BGE_WDMA_MODE, BGE_WDMAMODE_ENABLE); - if (sc->bge_asicrev != BGE_ASICREV_BCM5705) + if (sc->bge_asicrev != BGE_ASICREV_BCM5705 && + sc->bge_asicrev != BGE_ASICREV_BCM5750) BGE_CLRBIT(sc, BGE_MBCF_MODE, BGE_MBCFMODE_ENABLE); CSR_WRITE_4(sc, BGE_FTQ_RESET, 0xFFFFFFFF); CSR_WRITE_4(sc, BGE_FTQ_RESET, 0); - if (sc->bge_asicrev != BGE_ASICREV_BCM5705) { + if (sc->bge_asicrev != BGE_ASICREV_BCM5705 && + sc->bge_asicrev != BGE_ASICREV_BCM5750) { BGE_CLRBIT(sc, BGE_BMAN_MODE, BGE_BMANMODE_ENABLE); BGE_CLRBIT(sc, BGE_MARB_MODE, BGE_MARBMODE_ENABLE); } @@ -2667,7 +2760,8 @@ bge_stop(struct bge_softc *sc) bge_free_rx_ring_std(sc); /* Free jumbo RX list. */ - if (sc->bge_asicrev != BGE_ASICREV_BCM5705) + if (sc->bge_asicrev != BGE_ASICREV_BCM5705 && + sc->bge_asicrev != BGE_ASICREV_BCM5750) bge_free_rx_ring_jumbo(sc); /* Free TX buffers. */ diff --git a/sys/dev/netif/bge/if_bgereg.h b/sys/dev/netif/bge/if_bgereg.h index e65cf0257d..c4e6bcaa03 100644 --- a/sys/dev/netif/bge/if_bgereg.h +++ b/sys/dev/netif/bge/if_bgereg.h @@ -31,7 +31,7 @@ * THE POSSIBILITY OF SUCH DAMAGE. * * $FreeBSD: src/sys/dev/bge/if_bgereg.h,v 1.1.2.13 2003/12/01 21:06:59 ambrisko Exp $ - * $DragonFly: src/sys/dev/netif/bge/if_bgereg.h,v 1.10 2005/05/25 12:18:31 joerg Exp $ + * $DragonFly: src/sys/dev/netif/bge/if_bgereg.h,v 1.11 2005/08/19 14:40:03 joerg Exp $ */ /* @@ -170,6 +170,9 @@ #define BGE_PCI_MSI_ADDR_LO 0x60 #define BGE_PCI_MSI_DATA 0x64 +#define BGE_PCIE_MSI_CAPID 0xD0 +#define BGE_PCIE_MSI_CAPID_VAL 0x10 + /* * PCI registers specific to the BCM570x family. */ @@ -234,6 +237,9 @@ #define BGE_CHIPID_BCM5705_A1 0x30010000 #define BGE_CHIPID_BCM5705_A2 0x30020000 #define BGE_CHIPID_BCM5705_A3 0x30030000 +#define BGE_CHIPID_BCM5750_A0 0x40000000 +#define BGE_CHIPID_BCM5750_A1 0x40010000 +#define BGE_CHIPID_BCM5714_A0 0x50000000 /* shorthand one */ #define BGE_ASICREV(x) ((x) >> 28) @@ -242,6 +248,8 @@ #define BGE_ASICREV_BCM5703 0x01 #define BGE_ASICREV_BCM5704 0x02 #define BGE_ASICREV_BCM5705 0x03 +#define BGE_ASICREV_BCM5750 0x04 +#define BGE_ASICREV_BCM5714 0x05 /* chip revisions */ #define BGE_CHIPREV(x) ((x) >> 24) @@ -1802,9 +1810,7 @@ struct bge_status_block { /* * strange Broadcom PCI IDs */ -#define BCOM_DEVICEID_BCM5702X 0x16C6 -#define BCOM_DEVICEID_BCM5703X 0x16C7 -#define BCOM_DEVICEID_BCM5788 0x169C +#define BCOM_DEVICEID_BCM5714C 0x1668 /* * Offset of MAC address inside EEPROM. @@ -2186,6 +2192,7 @@ struct bge_softc { uint8_t bge_asicrev; uint8_t bge_chiprev; uint8_t bge_no_3_led; + uint8_t bge_pcie; struct bge_ring_data *bge_rdata; /* rings */ struct bge_chain_data bge_cdata; /* mbufs */ uint16_t bge_tx_saved_considx; -- 2.41.0