From f3cd9a2dcfaecf396baac77e5d3f51a25af66781 Mon Sep 17 00:00:00 2001 From: Sepherosa Ziehau Date: Thu, 12 Jul 2012 15:05:59 +0800 Subject: [PATCH] bge: Correct PHY test control register value name --- sys/dev/netif/bge/if_bge.c | 4 ++-- sys/dev/netif/bge/if_bgereg.h | 3 ++- 2 files changed, 4 insertions(+), 3 deletions(-) diff --git a/sys/dev/netif/bge/if_bge.c b/sys/dev/netif/bge/if_bge.c index 5568302766..5d67b7b020 100644 --- a/sys/dev/netif/bge/if_bge.c +++ b/sys/dev/netif/bge/if_bge.c @@ -2644,10 +2644,10 @@ bge_reset(struct bge_softc *sc) /* Force PCI-E 1.0a mode */ if (sc->bge_asicrev != BGE_ASICREV_BCM5785 && CSR_READ_4(sc, BGE_PCIE_PHY_TSTCTL) == - (BGE_PCIE_PCIE_PHY_TSTCTL_PSCRAM | + (BGE_PCIE_PHY_TSTCTL_PSCRAM | BGE_PCIE_PHY_TSTCTL_PCIE10)) { CSR_WRITE_4(sc, BGE_PCIE_PHY_TSTCTL, - BGE_PCIE_PCIE_PHY_TSTCTL_PSCRAM); + BGE_PCIE_PHY_TSTCTL_PSCRAM); } if (sc->bge_chipid != BGE_CHIPID_BCM5750_A0) { /* Prevent PCIE link training during global reset */ diff --git a/sys/dev/netif/bge/if_bgereg.h b/sys/dev/netif/bge/if_bgereg.h index ca379f1aeb..ce1577ad35 100644 --- a/sys/dev/netif/bge/if_bgereg.h +++ b/sys/dev/netif/bge/if_bgereg.h @@ -1944,8 +1944,9 @@ #define BGE_PCIE_TRANSACT 0x7c04 #define BGE_PCIE_TRANSACT_ONESHOT_MSI 0x20000000 +/* PCI-E PHY test control register */ #define BGE_PCIE_PHY_TSTCTL 0x7e2c -#define BGE_PCIE_PCIE_PHY_TSTCTL_PSCRAM 0x00000020 +#define BGE_PCIE_PHY_TSTCTL_PSCRAM 0x00000020 #define BGE_PCIE_PHY_TSTCTL_PCIE10 0x00000040 #define PCI_SETBIT(dev, reg, x, s) \ -- 2.41.0