2 * Copyright (c) 2014 Realtek Semiconductor Corp. All rights reserved.
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * version 2 as published by the Free Software Foundation.
10 #include <linux/signal.h>
11 #include <linux/slab.h>
12 #include <linux/module.h>
13 #include <linux/netdevice.h>
14 #include <linux/etherdevice.h>
15 #include <linux/mii.h>
16 #include <linux/ethtool.h>
17 #include <linux/usb.h>
18 #include <linux/crc32.h>
19 #include <linux/if_vlan.h>
20 #include <linux/uaccess.h>
21 #include <linux/list.h>
23 #include <linux/ipv6.h>
24 #include <net/ip6_checksum.h>
25 #include <uapi/linux/mdio.h>
26 #include <linux/mdio.h>
27 #include <linux/usb/cdc.h>
29 /* Version Information */
30 #define DRIVER_VERSION "v1.07.0 (2014/10/09)"
31 #define DRIVER_AUTHOR "Realtek linux nic maintainers <nic_swsd@realtek.com>"
32 #define DRIVER_DESC "Realtek RTL8152/RTL8153 Based USB Ethernet Adapters"
33 #define MODULENAME "r8152"
35 #define R8152_PHY_ID 32
37 #define PLA_IDR 0xc000
38 #define PLA_RCR 0xc010
39 #define PLA_RMS 0xc016
40 #define PLA_RXFIFO_CTRL0 0xc0a0
41 #define PLA_RXFIFO_CTRL1 0xc0a4
42 #define PLA_RXFIFO_CTRL2 0xc0a8
43 #define PLA_FMC 0xc0b4
44 #define PLA_CFG_WOL 0xc0b6
45 #define PLA_TEREDO_CFG 0xc0bc
46 #define PLA_MAR 0xcd00
47 #define PLA_BACKUP 0xd000
48 #define PAL_BDC_CR 0xd1a0
49 #define PLA_TEREDO_TIMER 0xd2cc
50 #define PLA_REALWOW_TIMER 0xd2e8
51 #define PLA_LEDSEL 0xdd90
52 #define PLA_LED_FEATURE 0xdd92
53 #define PLA_PHYAR 0xde00
54 #define PLA_BOOT_CTRL 0xe004
55 #define PLA_GPHY_INTR_IMR 0xe022
56 #define PLA_EEE_CR 0xe040
57 #define PLA_EEEP_CR 0xe080
58 #define PLA_MAC_PWR_CTRL 0xe0c0
59 #define PLA_MAC_PWR_CTRL2 0xe0ca
60 #define PLA_MAC_PWR_CTRL3 0xe0cc
61 #define PLA_MAC_PWR_CTRL4 0xe0ce
62 #define PLA_WDT6_CTRL 0xe428
63 #define PLA_TCR0 0xe610
64 #define PLA_TCR1 0xe612
65 #define PLA_MTPS 0xe615
66 #define PLA_TXFIFO_CTRL 0xe618
67 #define PLA_RSTTALLY 0xe800
69 #define PLA_CRWECR 0xe81c
70 #define PLA_CONFIG12 0xe81e /* CONFIG1, CONFIG2 */
71 #define PLA_CONFIG34 0xe820 /* CONFIG3, CONFIG4 */
72 #define PLA_CONFIG5 0xe822
73 #define PLA_PHY_PWR 0xe84c
74 #define PLA_OOB_CTRL 0xe84f
75 #define PLA_CPCR 0xe854
76 #define PLA_MISC_0 0xe858
77 #define PLA_MISC_1 0xe85a
78 #define PLA_OCP_GPHY_BASE 0xe86c
79 #define PLA_TALLYCNT 0xe890
80 #define PLA_SFF_STS_7 0xe8de
81 #define PLA_PHYSTATUS 0xe908
82 #define PLA_BP_BA 0xfc26
83 #define PLA_BP_0 0xfc28
84 #define PLA_BP_1 0xfc2a
85 #define PLA_BP_2 0xfc2c
86 #define PLA_BP_3 0xfc2e
87 #define PLA_BP_4 0xfc30
88 #define PLA_BP_5 0xfc32
89 #define PLA_BP_6 0xfc34
90 #define PLA_BP_7 0xfc36
91 #define PLA_BP_EN 0xfc38
93 #define USB_U2P3_CTRL 0xb460
94 #define USB_DEV_STAT 0xb808
95 #define USB_USB_CTRL 0xd406
96 #define USB_PHY_CTRL 0xd408
97 #define USB_TX_AGG 0xd40a
98 #define USB_RX_BUF_TH 0xd40c
99 #define USB_USB_TIMER 0xd428
100 #define USB_RX_EARLY_AGG 0xd42c
101 #define USB_PM_CTRL_STATUS 0xd432
102 #define USB_TX_DMA 0xd434
103 #define USB_TOLERANCE 0xd490
104 #define USB_LPM_CTRL 0xd41a
105 #define USB_UPS_CTRL 0xd800
106 #define USB_MISC_0 0xd81a
107 #define USB_POWER_CUT 0xd80a
108 #define USB_AFE_CTRL2 0xd824
109 #define USB_WDT11_CTRL 0xe43c
110 #define USB_BP_BA 0xfc26
111 #define USB_BP_0 0xfc28
112 #define USB_BP_1 0xfc2a
113 #define USB_BP_2 0xfc2c
114 #define USB_BP_3 0xfc2e
115 #define USB_BP_4 0xfc30
116 #define USB_BP_5 0xfc32
117 #define USB_BP_6 0xfc34
118 #define USB_BP_7 0xfc36
119 #define USB_BP_EN 0xfc38
122 #define OCP_ALDPS_CONFIG 0x2010
123 #define OCP_EEE_CONFIG1 0x2080
124 #define OCP_EEE_CONFIG2 0x2092
125 #define OCP_EEE_CONFIG3 0x2094
126 #define OCP_BASE_MII 0xa400
127 #define OCP_EEE_AR 0xa41a
128 #define OCP_EEE_DATA 0xa41c
129 #define OCP_PHY_STATUS 0xa420
130 #define OCP_POWER_CFG 0xa430
131 #define OCP_EEE_CFG 0xa432
132 #define OCP_SRAM_ADDR 0xa436
133 #define OCP_SRAM_DATA 0xa438
134 #define OCP_DOWN_SPEED 0xa442
135 #define OCP_EEE_ABLE 0xa5c4
136 #define OCP_EEE_ADV 0xa5d0
137 #define OCP_EEE_LPABLE 0xa5d2
138 #define OCP_ADC_CFG 0xbc06
141 #define SRAM_LPF_CFG 0x8012
142 #define SRAM_10M_AMP1 0x8080
143 #define SRAM_10M_AMP2 0x8082
144 #define SRAM_IMPEDANCE 0x8084
147 #define RCR_AAP 0x00000001
148 #define RCR_APM 0x00000002
149 #define RCR_AM 0x00000004
150 #define RCR_AB 0x00000008
151 #define RCR_ACPT_ALL (RCR_AAP | RCR_APM | RCR_AM | RCR_AB)
153 /* PLA_RXFIFO_CTRL0 */
154 #define RXFIFO_THR1_NORMAL 0x00080002
155 #define RXFIFO_THR1_OOB 0x01800003
157 /* PLA_RXFIFO_CTRL1 */
158 #define RXFIFO_THR2_FULL 0x00000060
159 #define RXFIFO_THR2_HIGH 0x00000038
160 #define RXFIFO_THR2_OOB 0x0000004a
161 #define RXFIFO_THR2_NORMAL 0x00a0
163 /* PLA_RXFIFO_CTRL2 */
164 #define RXFIFO_THR3_FULL 0x00000078
165 #define RXFIFO_THR3_HIGH 0x00000048
166 #define RXFIFO_THR3_OOB 0x0000005a
167 #define RXFIFO_THR3_NORMAL 0x0110
169 /* PLA_TXFIFO_CTRL */
170 #define TXFIFO_THR_NORMAL 0x00400008
171 #define TXFIFO_THR_NORMAL2 0x01000008
174 #define FMC_FCR_MCU_EN 0x0001
177 #define EEEP_CR_EEEP_TX 0x0002
180 #define WDT6_SET_MODE 0x0010
183 #define TCR0_TX_EMPTY 0x0800
184 #define TCR0_AUTO_FIFO 0x0080
187 #define VERSION_MASK 0x7cf0
190 #define MTPS_JUMBO (12 * 1024 / 64)
191 #define MTPS_DEFAULT (6 * 1024 / 64)
194 #define TALLY_RESET 0x0001
202 #define CRWECR_NORAML 0x00
203 #define CRWECR_CONFIG 0xc0
206 #define NOW_IS_OOB 0x80
207 #define TXFIFO_EMPTY 0x20
208 #define RXFIFO_EMPTY 0x10
209 #define LINK_LIST_READY 0x02
210 #define DIS_MCU_CLROOB 0x01
211 #define FIFO_EMPTY (TXFIFO_EMPTY | RXFIFO_EMPTY)
214 #define RXDY_GATED_EN 0x0008
217 #define RE_INIT_LL 0x8000
218 #define MCU_BORW_EN 0x4000
221 #define CPCR_RX_VLAN 0x0040
224 #define MAGIC_EN 0x0001
227 #define TEREDO_SEL 0x8000
228 #define TEREDO_WAKE_MASK 0x7f00
229 #define TEREDO_RS_EVENT_MASK 0x00fe
230 #define OOB_TEREDO_EN 0x0001
233 #define ALDPS_PROXY_MODE 0x0001
236 #define LINK_ON_WAKE_EN 0x0010
237 #define LINK_OFF_WAKE_EN 0x0008
240 #define BWF_EN 0x0040
241 #define MWF_EN 0x0020
242 #define UWF_EN 0x0010
243 #define LAN_WAKE_EN 0x0002
245 /* PLA_LED_FEATURE */
246 #define LED_MODE_MASK 0x0700
249 #define TX_10M_IDLE_EN 0x0080
250 #define PFM_PWM_SWITCH 0x0040
252 /* PLA_MAC_PWR_CTRL */
253 #define D3_CLK_GATED_EN 0x00004000
254 #define MCU_CLK_RATIO 0x07010f07
255 #define MCU_CLK_RATIO_MASK 0x0f0f0f0f
256 #define ALDPS_SPDWN_RATIO 0x0f87
258 /* PLA_MAC_PWR_CTRL2 */
259 #define EEE_SPDWN_RATIO 0x8007
261 /* PLA_MAC_PWR_CTRL3 */
262 #define PKT_AVAIL_SPDWN_EN 0x0100
263 #define SUSPEND_SPDWN_EN 0x0004
264 #define U1U2_SPDWN_EN 0x0002
265 #define L1_SPDWN_EN 0x0001
267 /* PLA_MAC_PWR_CTRL4 */
268 #define PWRSAVE_SPDWN_EN 0x1000
269 #define RXDV_SPDWN_EN 0x0800
270 #define TX10MIDLE_EN 0x0100
271 #define TP100_SPDWN_EN 0x0020
272 #define TP500_SPDWN_EN 0x0010
273 #define TP1000_SPDWN_EN 0x0008
274 #define EEE_SPDWN_EN 0x0001
276 /* PLA_GPHY_INTR_IMR */
277 #define GPHY_STS_MSK 0x0001
278 #define SPEED_DOWN_MSK 0x0002
279 #define SPDWN_RXDV_MSK 0x0004
280 #define SPDWN_LINKCHG_MSK 0x0008
283 #define PHYAR_FLAG 0x80000000
286 #define EEE_RX_EN 0x0001
287 #define EEE_TX_EN 0x0002
290 #define AUTOLOAD_DONE 0x0002
293 #define STAT_SPEED_MASK 0x0006
294 #define STAT_SPEED_HIGH 0x0000
295 #define STAT_SPEED_FULL 0x0002
298 #define TX_AGG_MAX_THRESHOLD 0x03
301 #define RX_THR_SUPPER 0x0c350180
302 #define RX_THR_HIGH 0x7a120180
303 #define RX_THR_SLOW 0xffff0180
306 #define TEST_MODE_DISABLE 0x00000001
307 #define TX_SIZE_ADJUST1 0x00000100
310 #define POWER_CUT 0x0100
312 /* USB_PM_CTRL_STATUS */
313 #define RESUME_INDICATE 0x0001
316 #define RX_AGG_DISABLE 0x0010
319 #define U2P3_ENABLE 0x0001
322 #define PWR_EN 0x0001
323 #define PHASE2_EN 0x0008
326 #define PCUT_STATUS 0x0001
328 /* USB_RX_EARLY_AGG */
329 #define EARLY_AGG_SUPPER 0x0e832981
330 #define EARLY_AGG_HIGH 0x0e837a12
331 #define EARLY_AGG_SLOW 0x0e83ffff
334 #define TIMER11_EN 0x0001
337 #define LPM_TIMER_MASK 0x0c
338 #define LPM_TIMER_500MS 0x04 /* 500 ms */
339 #define LPM_TIMER_500US 0x0c /* 500 us */
342 #define SEN_VAL_MASK 0xf800
343 #define SEN_VAL_NORMAL 0xa000
344 #define SEL_RXIDLE 0x0100
346 /* OCP_ALDPS_CONFIG */
347 #define ENPWRSAVE 0x8000
348 #define ENPDNPS 0x0200
349 #define LINKENA 0x0100
350 #define DIS_SDSAVE 0x0010
353 #define PHY_STAT_MASK 0x0007
354 #define PHY_STAT_LAN_ON 3
355 #define PHY_STAT_PWRDN 5
358 #define EEE_CLKDIV_EN 0x8000
359 #define EN_ALDPS 0x0004
360 #define EN_10M_PLLOFF 0x0001
362 /* OCP_EEE_CONFIG1 */
363 #define RG_TXLPI_MSK_HFDUP 0x8000
364 #define RG_MATCLR_EN 0x4000
365 #define EEE_10_CAP 0x2000
366 #define EEE_NWAY_EN 0x1000
367 #define TX_QUIET_EN 0x0200
368 #define RX_QUIET_EN 0x0100
369 #define sd_rise_time_mask 0x0070
370 #define sd_rise_time(x) (min(x, 7) << 4) /* bit 4 ~ 6 */
371 #define RG_RXLPI_MSK_HFDUP 0x0008
372 #define SDFALLTIME 0x0007 /* bit 0 ~ 2 */
374 /* OCP_EEE_CONFIG2 */
375 #define RG_LPIHYS_NUM 0x7000 /* bit 12 ~ 15 */
376 #define RG_DACQUIET_EN 0x0400
377 #define RG_LDVQUIET_EN 0x0200
378 #define RG_CKRSEL 0x0020
379 #define RG_EEEPRG_EN 0x0010
381 /* OCP_EEE_CONFIG3 */
382 #define fast_snr_mask 0xff80
383 #define fast_snr(x) (min(x, 0x1ff) << 7) /* bit 7 ~ 15 */
384 #define RG_LFS_SEL 0x0060 /* bit 6 ~ 5 */
385 #define MSK_PH 0x0006 /* bit 0 ~ 3 */
388 /* bit[15:14] function */
389 #define FUN_ADDR 0x0000
390 #define FUN_DATA 0x4000
391 /* bit[4:0] device addr */
394 #define CTAP_SHORT_EN 0x0040
395 #define EEE10_EN 0x0010
398 #define EN_10M_BGOFF 0x0080
401 #define CKADSEL_L 0x0100
402 #define ADC_EN 0x0080
403 #define EN_EMI_L 0x0040
406 #define LPF_AUTO_TUNE 0x8000
409 #define GDAC_IB_UPALL 0x0008
412 #define AMP_DN 0x0200
415 #define RX_DRIVING_MASK 0x6000
417 enum rtl_register_content {
425 #define RTL8152_MAX_TX 4
426 #define RTL8152_MAX_RX 10
432 #define INTR_LINK 0x0004
434 #define RTL8152_REQT_READ 0xc0
435 #define RTL8152_REQT_WRITE 0x40
436 #define RTL8152_REQ_GET_REGS 0x05
437 #define RTL8152_REQ_SET_REGS 0x05
439 #define BYTE_EN_DWORD 0xff
440 #define BYTE_EN_WORD 0x33
441 #define BYTE_EN_BYTE 0x11
442 #define BYTE_EN_SIX_BYTES 0x3f
443 #define BYTE_EN_START_MASK 0x0f
444 #define BYTE_EN_END_MASK 0xf0
446 #define RTL8153_MAX_PACKET 9216 /* 9K */
447 #define RTL8153_MAX_MTU (RTL8153_MAX_PACKET - VLAN_ETH_HLEN - VLAN_HLEN)
448 #define RTL8152_RMS (VLAN_ETH_FRAME_LEN + VLAN_HLEN)
449 #define RTL8153_RMS RTL8153_MAX_PACKET
450 #define RTL8152_TX_TIMEOUT (5 * HZ)
463 /* Define these values to match your device */
464 #define VENDOR_ID_REALTEK 0x0bda
465 #define VENDOR_ID_SAMSUNG 0x04e8
467 #define MCU_TYPE_PLA 0x0100
468 #define MCU_TYPE_USB 0x0000
470 struct tally_counter {
477 __le32 tx_one_collision;
478 __le32 tx_multi_collision;
488 #define RX_LEN_MASK 0x7fff
491 #define RD_UDP_CS (1 << 23)
492 #define RD_TCP_CS (1 << 22)
493 #define RD_IPV6_CS (1 << 20)
494 #define RD_IPV4_CS (1 << 19)
497 #define IPF (1 << 23) /* IP checksum fail */
498 #define UDPF (1 << 22) /* UDP checksum fail */
499 #define TCPF (1 << 21) /* TCP checksum fail */
500 #define RX_VLAN_TAG (1 << 16)
509 #define TX_FS (1 << 31) /* First segment of a packet */
510 #define TX_LS (1 << 30) /* Final segment of a packet */
511 #define GTSENDV4 (1 << 28)
512 #define GTSENDV6 (1 << 27)
513 #define GTTCPHO_SHIFT 18
514 #define GTTCPHO_MAX 0x7fU
515 #define TX_LEN_MAX 0x3ffffU
518 #define UDP_CS (1 << 31) /* Calculate UDP/IP checksum */
519 #define TCP_CS (1 << 30) /* Calculate TCP/IP checksum */
520 #define IPV4_CS (1 << 29) /* Calculate IPv4 checksum */
521 #define IPV6_CS (1 << 28) /* Calculate IPv6 checksum */
523 #define MSS_MAX 0x7ffU
524 #define TCPHO_SHIFT 17
525 #define TCPHO_MAX 0x7ffU
526 #define TX_VLAN_TAG (1 << 16)
532 struct list_head list;
534 struct r8152 *context;
540 struct list_head list;
542 struct r8152 *context;
551 struct usb_device *udev;
552 struct tasklet_struct tl;
553 struct usb_interface *intf;
554 struct net_device *netdev;
555 struct urb *intr_urb;
556 struct tx_agg tx_info[RTL8152_MAX_TX];
557 struct rx_agg rx_info[RTL8152_MAX_RX];
558 struct list_head rx_done, tx_free;
559 struct sk_buff_head tx_queue;
560 spinlock_t rx_lock, tx_lock;
561 struct delayed_work schedule;
562 struct mii_if_info mii;
563 struct mutex control; /* use for hw setting */
566 void (*init)(struct r8152 *);
567 int (*enable)(struct r8152 *);
568 void (*disable)(struct r8152 *);
569 void (*up)(struct r8152 *);
570 void (*down)(struct r8152 *);
571 void (*unload)(struct r8152 *);
572 int (*eee_get)(struct r8152 *, struct ethtool_eee *);
573 int (*eee_set)(struct r8152 *, struct ethtool_eee *);
602 /* Maximum number of multicast addresses to filter (vs. Rx-all-multicast).
603 * The RTL chips use a 64 element hash table based on the Ethernet CRC.
605 static const int multicast_filter_limit = 32;
606 static unsigned int agg_buf_sz = 16384;
608 #define RTL_LIMITED_TSO_SIZE (agg_buf_sz - sizeof(struct tx_desc) - \
609 VLAN_ETH_HLEN - VLAN_HLEN)
612 int get_registers(struct r8152 *tp, u16 value, u16 index, u16 size, void *data)
617 tmp = kmalloc(size, GFP_KERNEL);
621 ret = usb_control_msg(tp->udev, usb_rcvctrlpipe(tp->udev, 0),
622 RTL8152_REQ_GET_REGS, RTL8152_REQT_READ,
623 value, index, tmp, size, 500);
625 memcpy(data, tmp, size);
632 int set_registers(struct r8152 *tp, u16 value, u16 index, u16 size, void *data)
637 tmp = kmemdup(data, size, GFP_KERNEL);
641 ret = usb_control_msg(tp->udev, usb_sndctrlpipe(tp->udev, 0),
642 RTL8152_REQ_SET_REGS, RTL8152_REQT_WRITE,
643 value, index, tmp, size, 500);
650 static int generic_ocp_read(struct r8152 *tp, u16 index, u16 size,
651 void *data, u16 type)
656 if (test_bit(RTL8152_UNPLUG, &tp->flags))
659 /* both size and indix must be 4 bytes align */
660 if ((size & 3) || !size || (index & 3) || !data)
663 if ((u32)index + (u32)size > 0xffff)
668 ret = get_registers(tp, index, type, limit, data);
676 ret = get_registers(tp, index, type, size, data);
688 set_bit(RTL8152_UNPLUG, &tp->flags);
693 static int generic_ocp_write(struct r8152 *tp, u16 index, u16 byteen,
694 u16 size, void *data, u16 type)
697 u16 byteen_start, byteen_end, byen;
700 if (test_bit(RTL8152_UNPLUG, &tp->flags))
703 /* both size and indix must be 4 bytes align */
704 if ((size & 3) || !size || (index & 3) || !data)
707 if ((u32)index + (u32)size > 0xffff)
710 byteen_start = byteen & BYTE_EN_START_MASK;
711 byteen_end = byteen & BYTE_EN_END_MASK;
713 byen = byteen_start | (byteen_start << 4);
714 ret = set_registers(tp, index, type | byen, 4, data);
727 ret = set_registers(tp, index,
728 type | BYTE_EN_DWORD,
737 ret = set_registers(tp, index,
738 type | BYTE_EN_DWORD,
750 byen = byteen_end | (byteen_end >> 4);
751 ret = set_registers(tp, index, type | byen, 4, data);
758 set_bit(RTL8152_UNPLUG, &tp->flags);
764 int pla_ocp_read(struct r8152 *tp, u16 index, u16 size, void *data)
766 return generic_ocp_read(tp, index, size, data, MCU_TYPE_PLA);
770 int pla_ocp_write(struct r8152 *tp, u16 index, u16 byteen, u16 size, void *data)
772 return generic_ocp_write(tp, index, byteen, size, data, MCU_TYPE_PLA);
776 int usb_ocp_read(struct r8152 *tp, u16 index, u16 size, void *data)
778 return generic_ocp_read(tp, index, size, data, MCU_TYPE_USB);
782 int usb_ocp_write(struct r8152 *tp, u16 index, u16 byteen, u16 size, void *data)
784 return generic_ocp_write(tp, index, byteen, size, data, MCU_TYPE_USB);
787 static u32 ocp_read_dword(struct r8152 *tp, u16 type, u16 index)
791 generic_ocp_read(tp, index, sizeof(data), &data, type);
793 return __le32_to_cpu(data);
796 static void ocp_write_dword(struct r8152 *tp, u16 type, u16 index, u32 data)
798 __le32 tmp = __cpu_to_le32(data);
800 generic_ocp_write(tp, index, BYTE_EN_DWORD, sizeof(tmp), &tmp, type);
803 static u16 ocp_read_word(struct r8152 *tp, u16 type, u16 index)
807 u8 shift = index & 2;
811 generic_ocp_read(tp, index, sizeof(tmp), &tmp, type);
813 data = __le32_to_cpu(tmp);
814 data >>= (shift * 8);
820 static void ocp_write_word(struct r8152 *tp, u16 type, u16 index, u32 data)
824 u16 byen = BYTE_EN_WORD;
825 u8 shift = index & 2;
831 mask <<= (shift * 8);
832 data <<= (shift * 8);
836 tmp = __cpu_to_le32(data);
838 generic_ocp_write(tp, index, byen, sizeof(tmp), &tmp, type);
841 static u8 ocp_read_byte(struct r8152 *tp, u16 type, u16 index)
845 u8 shift = index & 3;
849 generic_ocp_read(tp, index, sizeof(tmp), &tmp, type);
851 data = __le32_to_cpu(tmp);
852 data >>= (shift * 8);
858 static void ocp_write_byte(struct r8152 *tp, u16 type, u16 index, u32 data)
862 u16 byen = BYTE_EN_BYTE;
863 u8 shift = index & 3;
869 mask <<= (shift * 8);
870 data <<= (shift * 8);
874 tmp = __cpu_to_le32(data);
876 generic_ocp_write(tp, index, byen, sizeof(tmp), &tmp, type);
879 static u16 ocp_reg_read(struct r8152 *tp, u16 addr)
881 u16 ocp_base, ocp_index;
883 ocp_base = addr & 0xf000;
884 if (ocp_base != tp->ocp_base) {
885 ocp_write_word(tp, MCU_TYPE_PLA, PLA_OCP_GPHY_BASE, ocp_base);
886 tp->ocp_base = ocp_base;
889 ocp_index = (addr & 0x0fff) | 0xb000;
890 return ocp_read_word(tp, MCU_TYPE_PLA, ocp_index);
893 static void ocp_reg_write(struct r8152 *tp, u16 addr, u16 data)
895 u16 ocp_base, ocp_index;
897 ocp_base = addr & 0xf000;
898 if (ocp_base != tp->ocp_base) {
899 ocp_write_word(tp, MCU_TYPE_PLA, PLA_OCP_GPHY_BASE, ocp_base);
900 tp->ocp_base = ocp_base;
903 ocp_index = (addr & 0x0fff) | 0xb000;
904 ocp_write_word(tp, MCU_TYPE_PLA, ocp_index, data);
907 static inline void r8152_mdio_write(struct r8152 *tp, u32 reg_addr, u32 value)
909 ocp_reg_write(tp, OCP_BASE_MII + reg_addr * 2, value);
912 static inline int r8152_mdio_read(struct r8152 *tp, u32 reg_addr)
914 return ocp_reg_read(tp, OCP_BASE_MII + reg_addr * 2);
917 static void sram_write(struct r8152 *tp, u16 addr, u16 data)
919 ocp_reg_write(tp, OCP_SRAM_ADDR, addr);
920 ocp_reg_write(tp, OCP_SRAM_DATA, data);
923 static u16 sram_read(struct r8152 *tp, u16 addr)
925 ocp_reg_write(tp, OCP_SRAM_ADDR, addr);
926 return ocp_reg_read(tp, OCP_SRAM_DATA);
929 static int read_mii_word(struct net_device *netdev, int phy_id, int reg)
931 struct r8152 *tp = netdev_priv(netdev);
934 if (test_bit(RTL8152_UNPLUG, &tp->flags))
937 if (phy_id != R8152_PHY_ID)
940 ret = r8152_mdio_read(tp, reg);
946 void write_mii_word(struct net_device *netdev, int phy_id, int reg, int val)
948 struct r8152 *tp = netdev_priv(netdev);
950 if (test_bit(RTL8152_UNPLUG, &tp->flags))
953 if (phy_id != R8152_PHY_ID)
956 r8152_mdio_write(tp, reg, val);
960 r8152_submit_rx(struct r8152 *tp, struct rx_agg *agg, gfp_t mem_flags);
962 static int rtl8152_set_mac_address(struct net_device *netdev, void *p)
964 struct r8152 *tp = netdev_priv(netdev);
965 struct sockaddr *addr = p;
966 int ret = -EADDRNOTAVAIL;
968 if (!is_valid_ether_addr(addr->sa_data))
971 ret = usb_autopm_get_interface(tp->intf);
975 mutex_lock(&tp->control);
977 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
979 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG);
980 pla_ocp_write(tp, PLA_IDR, BYTE_EN_SIX_BYTES, 8, addr->sa_data);
981 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
983 mutex_unlock(&tp->control);
985 usb_autopm_put_interface(tp->intf);
990 static int set_ethernet_addr(struct r8152 *tp)
992 struct net_device *dev = tp->netdev;
996 if (tp->version == RTL_VER_01)
997 ret = pla_ocp_read(tp, PLA_IDR, 8, sa.sa_data);
999 ret = pla_ocp_read(tp, PLA_BACKUP, 8, sa.sa_data);
1002 netif_err(tp, probe, dev, "Get ether addr fail\n");
1003 } else if (!is_valid_ether_addr(sa.sa_data)) {
1004 netif_err(tp, probe, dev, "Invalid ether addr %pM\n",
1006 eth_hw_addr_random(dev);
1007 ether_addr_copy(sa.sa_data, dev->dev_addr);
1008 ret = rtl8152_set_mac_address(dev, &sa);
1009 netif_info(tp, probe, dev, "Random ether addr %pM\n",
1012 if (tp->version == RTL_VER_01)
1013 ether_addr_copy(dev->dev_addr, sa.sa_data);
1015 ret = rtl8152_set_mac_address(dev, &sa);
1021 static void read_bulk_callback(struct urb *urb)
1023 struct net_device *netdev;
1024 int status = urb->status;
1036 if (test_bit(RTL8152_UNPLUG, &tp->flags))
1039 if (!test_bit(WORK_ENABLE, &tp->flags))
1042 netdev = tp->netdev;
1044 /* When link down, the driver would cancel all bulks. */
1045 /* This avoid the re-submitting bulk */
1046 if (!netif_carrier_ok(netdev))
1049 usb_mark_last_busy(tp->udev);
1053 if (urb->actual_length < ETH_ZLEN)
1056 spin_lock(&tp->rx_lock);
1057 list_add_tail(&agg->list, &tp->rx_done);
1058 spin_unlock(&tp->rx_lock);
1059 tasklet_schedule(&tp->tl);
1062 set_bit(RTL8152_UNPLUG, &tp->flags);
1063 netif_device_detach(tp->netdev);
1066 return; /* the urb is in unlink state */
1068 if (net_ratelimit())
1069 netdev_warn(netdev, "maybe reset is needed?\n");
1072 if (net_ratelimit())
1073 netdev_warn(netdev, "Rx status %d\n", status);
1077 r8152_submit_rx(tp, agg, GFP_ATOMIC);
1080 static void write_bulk_callback(struct urb *urb)
1082 struct net_device_stats *stats;
1083 struct net_device *netdev;
1086 int status = urb->status;
1096 netdev = tp->netdev;
1097 stats = &netdev->stats;
1099 if (net_ratelimit())
1100 netdev_warn(netdev, "Tx status %d\n", status);
1101 stats->tx_errors += agg->skb_num;
1103 stats->tx_packets += agg->skb_num;
1104 stats->tx_bytes += agg->skb_len;
1107 spin_lock(&tp->tx_lock);
1108 list_add_tail(&agg->list, &tp->tx_free);
1109 spin_unlock(&tp->tx_lock);
1111 usb_autopm_put_interface_async(tp->intf);
1113 if (!netif_carrier_ok(netdev))
1116 if (!test_bit(WORK_ENABLE, &tp->flags))
1119 if (test_bit(RTL8152_UNPLUG, &tp->flags))
1122 if (!skb_queue_empty(&tp->tx_queue))
1123 tasklet_schedule(&tp->tl);
1126 static void intr_callback(struct urb *urb)
1130 int status = urb->status;
1137 if (!test_bit(WORK_ENABLE, &tp->flags))
1140 if (test_bit(RTL8152_UNPLUG, &tp->flags))
1144 case 0: /* success */
1146 case -ECONNRESET: /* unlink */
1148 netif_device_detach(tp->netdev);
1151 netif_info(tp, intr, tp->netdev,
1152 "Stop submitting intr, status %d\n", status);
1155 netif_info(tp, intr, tp->netdev, "intr status -EOVERFLOW\n");
1157 /* -EPIPE: should clear the halt */
1159 netif_info(tp, intr, tp->netdev, "intr status %d\n", status);
1163 d = urb->transfer_buffer;
1164 if (INTR_LINK & __le16_to_cpu(d[0])) {
1165 if (!(tp->speed & LINK_STATUS)) {
1166 set_bit(RTL8152_LINK_CHG, &tp->flags);
1167 schedule_delayed_work(&tp->schedule, 0);
1170 if (tp->speed & LINK_STATUS) {
1171 set_bit(RTL8152_LINK_CHG, &tp->flags);
1172 schedule_delayed_work(&tp->schedule, 0);
1177 res = usb_submit_urb(urb, GFP_ATOMIC);
1178 if (res == -ENODEV) {
1179 set_bit(RTL8152_UNPLUG, &tp->flags);
1180 netif_device_detach(tp->netdev);
1182 netif_err(tp, intr, tp->netdev,
1183 "can't resubmit intr, status %d\n", res);
1187 static inline void *rx_agg_align(void *data)
1189 return (void *)ALIGN((uintptr_t)data, RX_ALIGN);
1192 static inline void *tx_agg_align(void *data)
1194 return (void *)ALIGN((uintptr_t)data, TX_ALIGN);
1197 static void free_all_mem(struct r8152 *tp)
1201 for (i = 0; i < RTL8152_MAX_RX; i++) {
1202 usb_free_urb(tp->rx_info[i].urb);
1203 tp->rx_info[i].urb = NULL;
1205 kfree(tp->rx_info[i].buffer);
1206 tp->rx_info[i].buffer = NULL;
1207 tp->rx_info[i].head = NULL;
1210 for (i = 0; i < RTL8152_MAX_TX; i++) {
1211 usb_free_urb(tp->tx_info[i].urb);
1212 tp->tx_info[i].urb = NULL;
1214 kfree(tp->tx_info[i].buffer);
1215 tp->tx_info[i].buffer = NULL;
1216 tp->tx_info[i].head = NULL;
1219 usb_free_urb(tp->intr_urb);
1220 tp->intr_urb = NULL;
1222 kfree(tp->intr_buff);
1223 tp->intr_buff = NULL;
1226 static int alloc_all_mem(struct r8152 *tp)
1228 struct net_device *netdev = tp->netdev;
1229 struct usb_interface *intf = tp->intf;
1230 struct usb_host_interface *alt = intf->cur_altsetting;
1231 struct usb_host_endpoint *ep_intr = alt->endpoint + 2;
1236 node = netdev->dev.parent ? dev_to_node(netdev->dev.parent) : -1;
1238 spin_lock_init(&tp->rx_lock);
1239 spin_lock_init(&tp->tx_lock);
1240 INIT_LIST_HEAD(&tp->tx_free);
1241 skb_queue_head_init(&tp->tx_queue);
1243 for (i = 0; i < RTL8152_MAX_RX; i++) {
1244 buf = kmalloc_node(agg_buf_sz, GFP_KERNEL, node);
1248 if (buf != rx_agg_align(buf)) {
1250 buf = kmalloc_node(agg_buf_sz + RX_ALIGN, GFP_KERNEL,
1256 urb = usb_alloc_urb(0, GFP_KERNEL);
1262 INIT_LIST_HEAD(&tp->rx_info[i].list);
1263 tp->rx_info[i].context = tp;
1264 tp->rx_info[i].urb = urb;
1265 tp->rx_info[i].buffer = buf;
1266 tp->rx_info[i].head = rx_agg_align(buf);
1269 for (i = 0; i < RTL8152_MAX_TX; i++) {
1270 buf = kmalloc_node(agg_buf_sz, GFP_KERNEL, node);
1274 if (buf != tx_agg_align(buf)) {
1276 buf = kmalloc_node(agg_buf_sz + TX_ALIGN, GFP_KERNEL,
1282 urb = usb_alloc_urb(0, GFP_KERNEL);
1288 INIT_LIST_HEAD(&tp->tx_info[i].list);
1289 tp->tx_info[i].context = tp;
1290 tp->tx_info[i].urb = urb;
1291 tp->tx_info[i].buffer = buf;
1292 tp->tx_info[i].head = tx_agg_align(buf);
1294 list_add_tail(&tp->tx_info[i].list, &tp->tx_free);
1297 tp->intr_urb = usb_alloc_urb(0, GFP_KERNEL);
1301 tp->intr_buff = kmalloc(INTBUFSIZE, GFP_KERNEL);
1305 tp->intr_interval = (int)ep_intr->desc.bInterval;
1306 usb_fill_int_urb(tp->intr_urb, tp->udev, usb_rcvintpipe(tp->udev, 3),
1307 tp->intr_buff, INTBUFSIZE, intr_callback,
1308 tp, tp->intr_interval);
1317 static struct tx_agg *r8152_get_tx_agg(struct r8152 *tp)
1319 struct tx_agg *agg = NULL;
1320 unsigned long flags;
1322 if (list_empty(&tp->tx_free))
1325 spin_lock_irqsave(&tp->tx_lock, flags);
1326 if (!list_empty(&tp->tx_free)) {
1327 struct list_head *cursor;
1329 cursor = tp->tx_free.next;
1330 list_del_init(cursor);
1331 agg = list_entry(cursor, struct tx_agg, list);
1333 spin_unlock_irqrestore(&tp->tx_lock, flags);
1338 static inline __be16 get_protocol(struct sk_buff *skb)
1342 if (skb->protocol == htons(ETH_P_8021Q))
1343 protocol = vlan_eth_hdr(skb)->h_vlan_encapsulated_proto;
1345 protocol = skb->protocol;
1350 /* r8152_csum_workaround()
1351 * The hw limites the value the transport offset. When the offset is out of the
1352 * range, calculate the checksum by sw.
1354 static void r8152_csum_workaround(struct r8152 *tp, struct sk_buff *skb,
1355 struct sk_buff_head *list)
1357 if (skb_shinfo(skb)->gso_size) {
1358 netdev_features_t features = tp->netdev->features;
1359 struct sk_buff_head seg_list;
1360 struct sk_buff *segs, *nskb;
1362 features &= ~(NETIF_F_SG | NETIF_F_IPV6_CSUM | NETIF_F_TSO6);
1363 segs = skb_gso_segment(skb, features);
1364 if (IS_ERR(segs) || !segs)
1367 __skb_queue_head_init(&seg_list);
1373 __skb_queue_tail(&seg_list, nskb);
1376 skb_queue_splice(&seg_list, list);
1378 } else if (skb->ip_summed == CHECKSUM_PARTIAL) {
1379 if (skb_checksum_help(skb) < 0)
1382 __skb_queue_head(list, skb);
1384 struct net_device_stats *stats;
1387 stats = &tp->netdev->stats;
1388 stats->tx_dropped++;
1393 /* msdn_giant_send_check()
1394 * According to the document of microsoft, the TCP Pseudo Header excludes the
1395 * packet length for IPv6 TCP large packets.
1397 static int msdn_giant_send_check(struct sk_buff *skb)
1399 const struct ipv6hdr *ipv6h;
1403 ret = skb_cow_head(skb, 0);
1407 ipv6h = ipv6_hdr(skb);
1411 th->check = ~tcp_v6_check(0, &ipv6h->saddr, &ipv6h->daddr, 0);
1416 static inline void rtl_tx_vlan_tag(struct tx_desc *desc, struct sk_buff *skb)
1418 if (vlan_tx_tag_present(skb)) {
1421 opts2 = TX_VLAN_TAG | swab16(vlan_tx_tag_get(skb));
1422 desc->opts2 |= cpu_to_le32(opts2);
1426 static inline void rtl_rx_vlan_tag(struct rx_desc *desc, struct sk_buff *skb)
1428 u32 opts2 = le32_to_cpu(desc->opts2);
1430 if (opts2 & RX_VLAN_TAG)
1431 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q),
1432 swab16(opts2 & 0xffff));
1435 static int r8152_tx_csum(struct r8152 *tp, struct tx_desc *desc,
1436 struct sk_buff *skb, u32 len, u32 transport_offset)
1438 u32 mss = skb_shinfo(skb)->gso_size;
1439 u32 opts1, opts2 = 0;
1440 int ret = TX_CSUM_SUCCESS;
1442 WARN_ON_ONCE(len > TX_LEN_MAX);
1444 opts1 = len | TX_FS | TX_LS;
1447 if (transport_offset > GTTCPHO_MAX) {
1448 netif_warn(tp, tx_err, tp->netdev,
1449 "Invalid transport offset 0x%x for TSO\n",
1455 switch (get_protocol(skb)) {
1456 case htons(ETH_P_IP):
1460 case htons(ETH_P_IPV6):
1461 if (msdn_giant_send_check(skb)) {
1473 opts1 |= transport_offset << GTTCPHO_SHIFT;
1474 opts2 |= min(mss, MSS_MAX) << MSS_SHIFT;
1475 } else if (skb->ip_summed == CHECKSUM_PARTIAL) {
1478 if (transport_offset > TCPHO_MAX) {
1479 netif_warn(tp, tx_err, tp->netdev,
1480 "Invalid transport offset 0x%x\n",
1486 switch (get_protocol(skb)) {
1487 case htons(ETH_P_IP):
1489 ip_protocol = ip_hdr(skb)->protocol;
1492 case htons(ETH_P_IPV6):
1494 ip_protocol = ipv6_hdr(skb)->nexthdr;
1498 ip_protocol = IPPROTO_RAW;
1502 if (ip_protocol == IPPROTO_TCP)
1504 else if (ip_protocol == IPPROTO_UDP)
1509 opts2 |= transport_offset << TCPHO_SHIFT;
1512 desc->opts2 = cpu_to_le32(opts2);
1513 desc->opts1 = cpu_to_le32(opts1);
1519 static int r8152_tx_agg_fill(struct r8152 *tp, struct tx_agg *agg)
1521 struct sk_buff_head skb_head, *tx_queue = &tp->tx_queue;
1525 __skb_queue_head_init(&skb_head);
1526 spin_lock(&tx_queue->lock);
1527 skb_queue_splice_init(tx_queue, &skb_head);
1528 spin_unlock(&tx_queue->lock);
1530 tx_data = agg->head;
1533 remain = agg_buf_sz;
1535 while (remain >= ETH_ZLEN + sizeof(struct tx_desc)) {
1536 struct tx_desc *tx_desc;
1537 struct sk_buff *skb;
1541 skb = __skb_dequeue(&skb_head);
1545 len = skb->len + sizeof(*tx_desc);
1548 __skb_queue_head(&skb_head, skb);
1552 tx_data = tx_agg_align(tx_data);
1553 tx_desc = (struct tx_desc *)tx_data;
1555 offset = (u32)skb_transport_offset(skb);
1557 if (r8152_tx_csum(tp, tx_desc, skb, skb->len, offset)) {
1558 r8152_csum_workaround(tp, skb, &skb_head);
1562 rtl_tx_vlan_tag(tx_desc, skb);
1564 tx_data += sizeof(*tx_desc);
1567 if (skb_copy_bits(skb, 0, tx_data, len) < 0) {
1568 struct net_device_stats *stats = &tp->netdev->stats;
1570 stats->tx_dropped++;
1571 dev_kfree_skb_any(skb);
1572 tx_data -= sizeof(*tx_desc);
1577 agg->skb_len += len;
1580 dev_kfree_skb_any(skb);
1582 remain = agg_buf_sz - (int)(tx_agg_align(tx_data) - agg->head);
1585 if (!skb_queue_empty(&skb_head)) {
1586 spin_lock(&tx_queue->lock);
1587 skb_queue_splice(&skb_head, tx_queue);
1588 spin_unlock(&tx_queue->lock);
1591 netif_tx_lock(tp->netdev);
1593 if (netif_queue_stopped(tp->netdev) &&
1594 skb_queue_len(&tp->tx_queue) < tp->tx_qlen)
1595 netif_wake_queue(tp->netdev);
1597 netif_tx_unlock(tp->netdev);
1599 ret = usb_autopm_get_interface_async(tp->intf);
1603 usb_fill_bulk_urb(agg->urb, tp->udev, usb_sndbulkpipe(tp->udev, 2),
1604 agg->head, (int)(tx_data - (u8 *)agg->head),
1605 (usb_complete_t)write_bulk_callback, agg);
1607 ret = usb_submit_urb(agg->urb, GFP_ATOMIC);
1609 usb_autopm_put_interface_async(tp->intf);
1615 static u8 r8152_rx_csum(struct r8152 *tp, struct rx_desc *rx_desc)
1617 u8 checksum = CHECKSUM_NONE;
1620 if (tp->version == RTL_VER_01)
1623 opts2 = le32_to_cpu(rx_desc->opts2);
1624 opts3 = le32_to_cpu(rx_desc->opts3);
1626 if (opts2 & RD_IPV4_CS) {
1628 checksum = CHECKSUM_NONE;
1629 else if ((opts2 & RD_UDP_CS) && (opts3 & UDPF))
1630 checksum = CHECKSUM_NONE;
1631 else if ((opts2 & RD_TCP_CS) && (opts3 & TCPF))
1632 checksum = CHECKSUM_NONE;
1634 checksum = CHECKSUM_UNNECESSARY;
1635 } else if (RD_IPV6_CS) {
1636 if ((opts2 & RD_UDP_CS) && !(opts3 & UDPF))
1637 checksum = CHECKSUM_UNNECESSARY;
1638 else if ((opts2 & RD_TCP_CS) && !(opts3 & TCPF))
1639 checksum = CHECKSUM_UNNECESSARY;
1646 static void rx_bottom(struct r8152 *tp)
1648 unsigned long flags;
1649 struct list_head *cursor, *next, rx_queue;
1651 if (list_empty(&tp->rx_done))
1654 INIT_LIST_HEAD(&rx_queue);
1655 spin_lock_irqsave(&tp->rx_lock, flags);
1656 list_splice_init(&tp->rx_done, &rx_queue);
1657 spin_unlock_irqrestore(&tp->rx_lock, flags);
1659 list_for_each_safe(cursor, next, &rx_queue) {
1660 struct rx_desc *rx_desc;
1666 list_del_init(cursor);
1668 agg = list_entry(cursor, struct rx_agg, list);
1670 if (urb->actual_length < ETH_ZLEN)
1673 rx_desc = agg->head;
1674 rx_data = agg->head;
1675 len_used += sizeof(struct rx_desc);
1677 while (urb->actual_length > len_used) {
1678 struct net_device *netdev = tp->netdev;
1679 struct net_device_stats *stats = &netdev->stats;
1680 unsigned int pkt_len;
1681 struct sk_buff *skb;
1683 pkt_len = le32_to_cpu(rx_desc->opts1) & RX_LEN_MASK;
1684 if (pkt_len < ETH_ZLEN)
1687 len_used += pkt_len;
1688 if (urb->actual_length < len_used)
1691 pkt_len -= CRC_SIZE;
1692 rx_data += sizeof(struct rx_desc);
1694 skb = netdev_alloc_skb_ip_align(netdev, pkt_len);
1696 stats->rx_dropped++;
1700 skb->ip_summed = r8152_rx_csum(tp, rx_desc);
1701 memcpy(skb->data, rx_data, pkt_len);
1702 skb_put(skb, pkt_len);
1703 skb->protocol = eth_type_trans(skb, netdev);
1704 rtl_rx_vlan_tag(rx_desc, skb);
1705 netif_receive_skb(skb);
1706 stats->rx_packets++;
1707 stats->rx_bytes += pkt_len;
1710 rx_data = rx_agg_align(rx_data + pkt_len + CRC_SIZE);
1711 rx_desc = (struct rx_desc *)rx_data;
1712 len_used = (int)(rx_data - (u8 *)agg->head);
1713 len_used += sizeof(struct rx_desc);
1717 r8152_submit_rx(tp, agg, GFP_ATOMIC);
1721 static void tx_bottom(struct r8152 *tp)
1728 if (skb_queue_empty(&tp->tx_queue))
1731 agg = r8152_get_tx_agg(tp);
1735 res = r8152_tx_agg_fill(tp, agg);
1737 struct net_device *netdev = tp->netdev;
1739 if (res == -ENODEV) {
1740 set_bit(RTL8152_UNPLUG, &tp->flags);
1741 netif_device_detach(netdev);
1743 struct net_device_stats *stats = &netdev->stats;
1744 unsigned long flags;
1746 netif_warn(tp, tx_err, netdev,
1747 "failed tx_urb %d\n", res);
1748 stats->tx_dropped += agg->skb_num;
1750 spin_lock_irqsave(&tp->tx_lock, flags);
1751 list_add_tail(&agg->list, &tp->tx_free);
1752 spin_unlock_irqrestore(&tp->tx_lock, flags);
1758 static void bottom_half(unsigned long data)
1762 tp = (struct r8152 *)data;
1764 if (test_bit(RTL8152_UNPLUG, &tp->flags))
1767 if (!test_bit(WORK_ENABLE, &tp->flags))
1770 /* When link down, the driver would cancel all bulks. */
1771 /* This avoid the re-submitting bulk */
1772 if (!netif_carrier_ok(tp->netdev))
1775 clear_bit(SCHEDULE_TASKLET, &tp->flags);
1782 int r8152_submit_rx(struct r8152 *tp, struct rx_agg *agg, gfp_t mem_flags)
1786 usb_fill_bulk_urb(agg->urb, tp->udev, usb_rcvbulkpipe(tp->udev, 1),
1787 agg->head, agg_buf_sz,
1788 (usb_complete_t)read_bulk_callback, agg);
1790 ret = usb_submit_urb(agg->urb, mem_flags);
1791 if (ret == -ENODEV) {
1792 set_bit(RTL8152_UNPLUG, &tp->flags);
1793 netif_device_detach(tp->netdev);
1795 struct urb *urb = agg->urb;
1796 unsigned long flags;
1798 urb->actual_length = 0;
1799 spin_lock_irqsave(&tp->rx_lock, flags);
1800 list_add_tail(&agg->list, &tp->rx_done);
1801 spin_unlock_irqrestore(&tp->rx_lock, flags);
1802 tasklet_schedule(&tp->tl);
1808 static void rtl_drop_queued_tx(struct r8152 *tp)
1810 struct net_device_stats *stats = &tp->netdev->stats;
1811 struct sk_buff_head skb_head, *tx_queue = &tp->tx_queue;
1812 struct sk_buff *skb;
1814 if (skb_queue_empty(tx_queue))
1817 __skb_queue_head_init(&skb_head);
1818 spin_lock_bh(&tx_queue->lock);
1819 skb_queue_splice_init(tx_queue, &skb_head);
1820 spin_unlock_bh(&tx_queue->lock);
1822 while ((skb = __skb_dequeue(&skb_head))) {
1824 stats->tx_dropped++;
1828 static void rtl8152_tx_timeout(struct net_device *netdev)
1830 struct r8152 *tp = netdev_priv(netdev);
1833 netif_warn(tp, tx_err, netdev, "Tx timeout\n");
1834 for (i = 0; i < RTL8152_MAX_TX; i++)
1835 usb_unlink_urb(tp->tx_info[i].urb);
1838 static void rtl8152_set_rx_mode(struct net_device *netdev)
1840 struct r8152 *tp = netdev_priv(netdev);
1842 if (tp->speed & LINK_STATUS) {
1843 set_bit(RTL8152_SET_RX_MODE, &tp->flags);
1844 schedule_delayed_work(&tp->schedule, 0);
1848 static void _rtl8152_set_rx_mode(struct net_device *netdev)
1850 struct r8152 *tp = netdev_priv(netdev);
1851 u32 mc_filter[2]; /* Multicast hash filter */
1855 clear_bit(RTL8152_SET_RX_MODE, &tp->flags);
1856 netif_stop_queue(netdev);
1857 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
1858 ocp_data &= ~RCR_ACPT_ALL;
1859 ocp_data |= RCR_AB | RCR_APM;
1861 if (netdev->flags & IFF_PROMISC) {
1862 /* Unconditionally log net taps. */
1863 netif_notice(tp, link, netdev, "Promiscuous mode enabled\n");
1864 ocp_data |= RCR_AM | RCR_AAP;
1865 mc_filter[1] = 0xffffffff;
1866 mc_filter[0] = 0xffffffff;
1867 } else if ((netdev_mc_count(netdev) > multicast_filter_limit) ||
1868 (netdev->flags & IFF_ALLMULTI)) {
1869 /* Too many to filter perfectly -- accept all multicasts. */
1871 mc_filter[1] = 0xffffffff;
1872 mc_filter[0] = 0xffffffff;
1874 struct netdev_hw_addr *ha;
1878 netdev_for_each_mc_addr(ha, netdev) {
1879 int bit_nr = ether_crc(ETH_ALEN, ha->addr) >> 26;
1881 mc_filter[bit_nr >> 5] |= 1 << (bit_nr & 31);
1886 tmp[0] = __cpu_to_le32(swab32(mc_filter[1]));
1887 tmp[1] = __cpu_to_le32(swab32(mc_filter[0]));
1889 pla_ocp_write(tp, PLA_MAR, BYTE_EN_DWORD, sizeof(tmp), tmp);
1890 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
1891 netif_wake_queue(netdev);
1894 static netdev_features_t
1895 rtl8152_features_check(struct sk_buff *skb, struct net_device *dev,
1896 netdev_features_t features)
1898 u32 mss = skb_shinfo(skb)->gso_size;
1899 int max_offset = mss ? GTTCPHO_MAX : TCPHO_MAX;
1900 int offset = skb_transport_offset(skb);
1902 if ((mss || skb->ip_summed == CHECKSUM_PARTIAL) && offset > max_offset)
1903 features &= ~(NETIF_F_ALL_CSUM | NETIF_F_GSO_MASK);
1904 else if ((skb->len + sizeof(struct tx_desc)) > agg_buf_sz)
1905 features &= ~NETIF_F_GSO_MASK;
1910 static netdev_tx_t rtl8152_start_xmit(struct sk_buff *skb,
1911 struct net_device *netdev)
1913 struct r8152 *tp = netdev_priv(netdev);
1915 skb_tx_timestamp(skb);
1917 skb_queue_tail(&tp->tx_queue, skb);
1919 if (!list_empty(&tp->tx_free)) {
1920 if (test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
1921 set_bit(SCHEDULE_TASKLET, &tp->flags);
1922 schedule_delayed_work(&tp->schedule, 0);
1924 usb_mark_last_busy(tp->udev);
1925 tasklet_schedule(&tp->tl);
1927 } else if (skb_queue_len(&tp->tx_queue) > tp->tx_qlen) {
1928 netif_stop_queue(netdev);
1931 return NETDEV_TX_OK;
1934 static void r8152b_reset_packet_filter(struct r8152 *tp)
1938 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_FMC);
1939 ocp_data &= ~FMC_FCR_MCU_EN;
1940 ocp_write_word(tp, MCU_TYPE_PLA, PLA_FMC, ocp_data);
1941 ocp_data |= FMC_FCR_MCU_EN;
1942 ocp_write_word(tp, MCU_TYPE_PLA, PLA_FMC, ocp_data);
1945 static void rtl8152_nic_reset(struct r8152 *tp)
1949 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CR, CR_RST);
1951 for (i = 0; i < 1000; i++) {
1952 if (!(ocp_read_byte(tp, MCU_TYPE_PLA, PLA_CR) & CR_RST))
1954 usleep_range(100, 400);
1958 static void set_tx_qlen(struct r8152 *tp)
1960 struct net_device *netdev = tp->netdev;
1962 tp->tx_qlen = agg_buf_sz / (netdev->mtu + VLAN_ETH_HLEN + VLAN_HLEN +
1963 sizeof(struct tx_desc));
1966 static inline u8 rtl8152_get_speed(struct r8152 *tp)
1968 return ocp_read_byte(tp, MCU_TYPE_PLA, PLA_PHYSTATUS);
1971 static void rtl_set_eee_plus(struct r8152 *tp)
1976 speed = rtl8152_get_speed(tp);
1977 if (speed & _10bps) {
1978 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR);
1979 ocp_data |= EEEP_CR_EEEP_TX;
1980 ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR, ocp_data);
1982 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR);
1983 ocp_data &= ~EEEP_CR_EEEP_TX;
1984 ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR, ocp_data);
1988 static void rxdy_gated_en(struct r8152 *tp, bool enable)
1992 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_MISC_1);
1994 ocp_data |= RXDY_GATED_EN;
1996 ocp_data &= ~RXDY_GATED_EN;
1997 ocp_write_word(tp, MCU_TYPE_PLA, PLA_MISC_1, ocp_data);
2000 static int rtl_start_rx(struct r8152 *tp)
2004 INIT_LIST_HEAD(&tp->rx_done);
2005 for (i = 0; i < RTL8152_MAX_RX; i++) {
2006 INIT_LIST_HEAD(&tp->rx_info[i].list);
2007 ret = r8152_submit_rx(tp, &tp->rx_info[i], GFP_KERNEL);
2012 if (ret && ++i < RTL8152_MAX_RX) {
2013 struct list_head rx_queue;
2014 unsigned long flags;
2016 INIT_LIST_HEAD(&rx_queue);
2019 struct rx_agg *agg = &tp->rx_info[i++];
2020 struct urb *urb = agg->urb;
2022 urb->actual_length = 0;
2023 list_add_tail(&agg->list, &rx_queue);
2024 } while (i < RTL8152_MAX_RX);
2026 spin_lock_irqsave(&tp->rx_lock, flags);
2027 list_splice_tail(&rx_queue, &tp->rx_done);
2028 spin_unlock_irqrestore(&tp->rx_lock, flags);
2034 static int rtl_stop_rx(struct r8152 *tp)
2038 for (i = 0; i < RTL8152_MAX_RX; i++)
2039 usb_kill_urb(tp->rx_info[i].urb);
2044 static int rtl_enable(struct r8152 *tp)
2048 r8152b_reset_packet_filter(tp);
2050 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_CR);
2051 ocp_data |= CR_RE | CR_TE;
2052 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CR, ocp_data);
2054 rxdy_gated_en(tp, false);
2056 return rtl_start_rx(tp);
2059 static int rtl8152_enable(struct r8152 *tp)
2061 if (test_bit(RTL8152_UNPLUG, &tp->flags))
2065 rtl_set_eee_plus(tp);
2067 return rtl_enable(tp);
2070 static void r8153_set_rx_agg(struct r8152 *tp)
2074 speed = rtl8152_get_speed(tp);
2075 if (speed & _1000bps) {
2076 if (tp->udev->speed == USB_SPEED_SUPER) {
2077 ocp_write_dword(tp, MCU_TYPE_USB, USB_RX_BUF_TH,
2079 ocp_write_dword(tp, MCU_TYPE_USB, USB_RX_EARLY_AGG,
2082 ocp_write_dword(tp, MCU_TYPE_USB, USB_RX_BUF_TH,
2084 ocp_write_dword(tp, MCU_TYPE_USB, USB_RX_EARLY_AGG,
2088 ocp_write_dword(tp, MCU_TYPE_USB, USB_RX_BUF_TH, RX_THR_SLOW);
2089 ocp_write_dword(tp, MCU_TYPE_USB, USB_RX_EARLY_AGG,
2094 static int rtl8153_enable(struct r8152 *tp)
2096 if (test_bit(RTL8152_UNPLUG, &tp->flags))
2100 rtl_set_eee_plus(tp);
2101 r8153_set_rx_agg(tp);
2103 return rtl_enable(tp);
2106 static void rtl_disable(struct r8152 *tp)
2111 if (test_bit(RTL8152_UNPLUG, &tp->flags)) {
2112 rtl_drop_queued_tx(tp);
2116 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2117 ocp_data &= ~RCR_ACPT_ALL;
2118 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2120 rtl_drop_queued_tx(tp);
2122 for (i = 0; i < RTL8152_MAX_TX; i++)
2123 usb_kill_urb(tp->tx_info[i].urb);
2125 rxdy_gated_en(tp, true);
2127 for (i = 0; i < 1000; i++) {
2128 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2129 if ((ocp_data & FIFO_EMPTY) == FIFO_EMPTY)
2131 usleep_range(1000, 2000);
2134 for (i = 0; i < 1000; i++) {
2135 if (ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR0) & TCR0_TX_EMPTY)
2137 usleep_range(1000, 2000);
2142 rtl8152_nic_reset(tp);
2145 static void r8152_power_cut_en(struct r8152 *tp, bool enable)
2149 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_UPS_CTRL);
2151 ocp_data |= POWER_CUT;
2153 ocp_data &= ~POWER_CUT;
2154 ocp_write_word(tp, MCU_TYPE_USB, USB_UPS_CTRL, ocp_data);
2156 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_PM_CTRL_STATUS);
2157 ocp_data &= ~RESUME_INDICATE;
2158 ocp_write_word(tp, MCU_TYPE_USB, USB_PM_CTRL_STATUS, ocp_data);
2161 static void rtl_rx_vlan_en(struct r8152 *tp, bool enable)
2165 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CPCR);
2167 ocp_data |= CPCR_RX_VLAN;
2169 ocp_data &= ~CPCR_RX_VLAN;
2170 ocp_write_word(tp, MCU_TYPE_PLA, PLA_CPCR, ocp_data);
2173 static int rtl8152_set_features(struct net_device *dev,
2174 netdev_features_t features)
2176 netdev_features_t changed = features ^ dev->features;
2177 struct r8152 *tp = netdev_priv(dev);
2180 ret = usb_autopm_get_interface(tp->intf);
2184 mutex_lock(&tp->control);
2186 if (changed & NETIF_F_HW_VLAN_CTAG_RX) {
2187 if (features & NETIF_F_HW_VLAN_CTAG_RX)
2188 rtl_rx_vlan_en(tp, true);
2190 rtl_rx_vlan_en(tp, false);
2193 mutex_unlock(&tp->control);
2195 usb_autopm_put_interface(tp->intf);
2201 #define WAKE_ANY (WAKE_PHY | WAKE_MAGIC | WAKE_UCAST | WAKE_BCAST | WAKE_MCAST)
2203 static u32 __rtl_get_wol(struct r8152 *tp)
2208 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_CONFIG5);
2209 if (!(ocp_data & LAN_WAKE_EN))
2212 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG34);
2213 if (ocp_data & LINK_ON_WAKE_EN)
2214 wolopts |= WAKE_PHY;
2216 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG5);
2217 if (ocp_data & UWF_EN)
2218 wolopts |= WAKE_UCAST;
2219 if (ocp_data & BWF_EN)
2220 wolopts |= WAKE_BCAST;
2221 if (ocp_data & MWF_EN)
2222 wolopts |= WAKE_MCAST;
2224 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CFG_WOL);
2225 if (ocp_data & MAGIC_EN)
2226 wolopts |= WAKE_MAGIC;
2231 static void __rtl_set_wol(struct r8152 *tp, u32 wolopts)
2235 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG);
2237 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG34);
2238 ocp_data &= ~LINK_ON_WAKE_EN;
2239 if (wolopts & WAKE_PHY)
2240 ocp_data |= LINK_ON_WAKE_EN;
2241 ocp_write_word(tp, MCU_TYPE_PLA, PLA_CONFIG34, ocp_data);
2243 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG5);
2244 ocp_data &= ~(UWF_EN | BWF_EN | MWF_EN | LAN_WAKE_EN);
2245 if (wolopts & WAKE_UCAST)
2247 if (wolopts & WAKE_BCAST)
2249 if (wolopts & WAKE_MCAST)
2251 if (wolopts & WAKE_ANY)
2252 ocp_data |= LAN_WAKE_EN;
2253 ocp_write_word(tp, MCU_TYPE_PLA, PLA_CONFIG5, ocp_data);
2255 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
2257 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CFG_WOL);
2258 ocp_data &= ~MAGIC_EN;
2259 if (wolopts & WAKE_MAGIC)
2260 ocp_data |= MAGIC_EN;
2261 ocp_write_word(tp, MCU_TYPE_PLA, PLA_CFG_WOL, ocp_data);
2263 if (wolopts & WAKE_ANY)
2264 device_set_wakeup_enable(&tp->udev->dev, true);
2266 device_set_wakeup_enable(&tp->udev->dev, false);
2269 static void rtl_runtime_suspend_enable(struct r8152 *tp, bool enable)
2274 __rtl_set_wol(tp, WAKE_ANY);
2276 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG);
2278 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG34);
2279 ocp_data |= LINK_OFF_WAKE_EN;
2280 ocp_write_word(tp, MCU_TYPE_PLA, PLA_CONFIG34, ocp_data);
2282 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
2284 __rtl_set_wol(tp, tp->saved_wolopts);
2288 static void rtl_phy_reset(struct r8152 *tp)
2293 clear_bit(PHY_RESET, &tp->flags);
2295 data = r8152_mdio_read(tp, MII_BMCR);
2297 /* don't reset again before the previous one complete */
2298 if (data & BMCR_RESET)
2302 r8152_mdio_write(tp, MII_BMCR, data);
2304 for (i = 0; i < 50; i++) {
2306 if ((r8152_mdio_read(tp, MII_BMCR) & BMCR_RESET) == 0)
2311 static void r8153_teredo_off(struct r8152 *tp)
2315 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG);
2316 ocp_data &= ~(TEREDO_SEL | TEREDO_RS_EVENT_MASK | OOB_TEREDO_EN);
2317 ocp_write_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG, ocp_data);
2319 ocp_write_word(tp, MCU_TYPE_PLA, PLA_WDT6_CTRL, WDT6_SET_MODE);
2320 ocp_write_word(tp, MCU_TYPE_PLA, PLA_REALWOW_TIMER, 0);
2321 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_TEREDO_TIMER, 0);
2324 static void r8152b_disable_aldps(struct r8152 *tp)
2326 ocp_reg_write(tp, OCP_ALDPS_CONFIG, ENPDNPS | LINKENA | DIS_SDSAVE);
2330 static inline void r8152b_enable_aldps(struct r8152 *tp)
2332 ocp_reg_write(tp, OCP_ALDPS_CONFIG, ENPWRSAVE | ENPDNPS |
2333 LINKENA | DIS_SDSAVE);
2336 static void rtl8152_disable(struct r8152 *tp)
2338 r8152b_disable_aldps(tp);
2340 r8152b_enable_aldps(tp);
2343 static void r8152b_hw_phy_cfg(struct r8152 *tp)
2347 data = r8152_mdio_read(tp, MII_BMCR);
2348 if (data & BMCR_PDOWN) {
2349 data &= ~BMCR_PDOWN;
2350 r8152_mdio_write(tp, MII_BMCR, data);
2353 set_bit(PHY_RESET, &tp->flags);
2356 static void r8152b_exit_oob(struct r8152 *tp)
2361 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2362 ocp_data &= ~RCR_ACPT_ALL;
2363 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2365 rxdy_gated_en(tp, true);
2366 r8153_teredo_off(tp);
2367 r8152b_hw_phy_cfg(tp);
2369 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
2370 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CR, 0x00);
2372 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2373 ocp_data &= ~NOW_IS_OOB;
2374 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2376 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2377 ocp_data &= ~MCU_BORW_EN;
2378 ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2380 for (i = 0; i < 1000; i++) {
2381 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2382 if (ocp_data & LINK_LIST_READY)
2384 usleep_range(1000, 2000);
2387 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2388 ocp_data |= RE_INIT_LL;
2389 ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2391 for (i = 0; i < 1000; i++) {
2392 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2393 if (ocp_data & LINK_LIST_READY)
2395 usleep_range(1000, 2000);
2398 rtl8152_nic_reset(tp);
2400 /* rx share fifo credit full threshold */
2401 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL0, RXFIFO_THR1_NORMAL);
2403 if (tp->udev->speed == USB_SPEED_FULL ||
2404 tp->udev->speed == USB_SPEED_LOW) {
2405 /* rx share fifo credit near full threshold */
2406 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1,
2408 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2,
2411 /* rx share fifo credit near full threshold */
2412 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1,
2414 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2,
2418 /* TX share fifo free credit full threshold */
2419 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_TXFIFO_CTRL, TXFIFO_THR_NORMAL);
2421 ocp_write_byte(tp, MCU_TYPE_USB, USB_TX_AGG, TX_AGG_MAX_THRESHOLD);
2422 ocp_write_dword(tp, MCU_TYPE_USB, USB_RX_BUF_TH, RX_THR_HIGH);
2423 ocp_write_dword(tp, MCU_TYPE_USB, USB_TX_DMA,
2424 TEST_MODE_DISABLE | TX_SIZE_ADJUST1);
2426 rtl_rx_vlan_en(tp, tp->netdev->features & NETIF_F_HW_VLAN_CTAG_RX);
2428 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8152_RMS);
2430 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR0);
2431 ocp_data |= TCR0_AUTO_FIFO;
2432 ocp_write_word(tp, MCU_TYPE_PLA, PLA_TCR0, ocp_data);
2435 static void r8152b_enter_oob(struct r8152 *tp)
2440 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2441 ocp_data &= ~NOW_IS_OOB;
2442 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2444 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL0, RXFIFO_THR1_OOB);
2445 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1, RXFIFO_THR2_OOB);
2446 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2, RXFIFO_THR3_OOB);
2450 for (i = 0; i < 1000; i++) {
2451 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2452 if (ocp_data & LINK_LIST_READY)
2454 usleep_range(1000, 2000);
2457 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2458 ocp_data |= RE_INIT_LL;
2459 ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2461 for (i = 0; i < 1000; i++) {
2462 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2463 if (ocp_data & LINK_LIST_READY)
2465 usleep_range(1000, 2000);
2468 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8152_RMS);
2470 rtl_rx_vlan_en(tp, true);
2472 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PAL_BDC_CR);
2473 ocp_data |= ALDPS_PROXY_MODE;
2474 ocp_write_word(tp, MCU_TYPE_PLA, PAL_BDC_CR, ocp_data);
2476 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2477 ocp_data |= NOW_IS_OOB | DIS_MCU_CLROOB;
2478 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2480 rxdy_gated_en(tp, false);
2482 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2483 ocp_data |= RCR_APM | RCR_AM | RCR_AB;
2484 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2487 static void r8153_hw_phy_cfg(struct r8152 *tp)
2492 ocp_reg_write(tp, OCP_ADC_CFG, CKADSEL_L | ADC_EN | EN_EMI_L);
2493 data = r8152_mdio_read(tp, MII_BMCR);
2494 if (data & BMCR_PDOWN) {
2495 data &= ~BMCR_PDOWN;
2496 r8152_mdio_write(tp, MII_BMCR, data);
2499 if (tp->version == RTL_VER_03) {
2500 data = ocp_reg_read(tp, OCP_EEE_CFG);
2501 data &= ~CTAP_SHORT_EN;
2502 ocp_reg_write(tp, OCP_EEE_CFG, data);
2505 data = ocp_reg_read(tp, OCP_POWER_CFG);
2506 data |= EEE_CLKDIV_EN;
2507 ocp_reg_write(tp, OCP_POWER_CFG, data);
2509 data = ocp_reg_read(tp, OCP_DOWN_SPEED);
2510 data |= EN_10M_BGOFF;
2511 ocp_reg_write(tp, OCP_DOWN_SPEED, data);
2512 data = ocp_reg_read(tp, OCP_POWER_CFG);
2513 data |= EN_10M_PLLOFF;
2514 ocp_reg_write(tp, OCP_POWER_CFG, data);
2515 data = sram_read(tp, SRAM_IMPEDANCE);
2516 data &= ~RX_DRIVING_MASK;
2517 sram_write(tp, SRAM_IMPEDANCE, data);
2519 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR);
2520 ocp_data |= PFM_PWM_SWITCH;
2521 ocp_write_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR, ocp_data);
2523 data = sram_read(tp, SRAM_LPF_CFG);
2524 data |= LPF_AUTO_TUNE;
2525 sram_write(tp, SRAM_LPF_CFG, data);
2527 data = sram_read(tp, SRAM_10M_AMP1);
2528 data |= GDAC_IB_UPALL;
2529 sram_write(tp, SRAM_10M_AMP1, data);
2530 data = sram_read(tp, SRAM_10M_AMP2);
2532 sram_write(tp, SRAM_10M_AMP2, data);
2534 set_bit(PHY_RESET, &tp->flags);
2537 static void r8153_u1u2en(struct r8152 *tp, bool enable)
2542 memset(u1u2, 0xff, sizeof(u1u2));
2544 memset(u1u2, 0x00, sizeof(u1u2));
2546 usb_ocp_write(tp, USB_TOLERANCE, BYTE_EN_SIX_BYTES, sizeof(u1u2), u1u2);
2549 static void r8153_u2p3en(struct r8152 *tp, bool enable)
2553 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_U2P3_CTRL);
2555 ocp_data |= U2P3_ENABLE;
2557 ocp_data &= ~U2P3_ENABLE;
2558 ocp_write_word(tp, MCU_TYPE_USB, USB_U2P3_CTRL, ocp_data);
2561 static void r8153_power_cut_en(struct r8152 *tp, bool enable)
2565 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_POWER_CUT);
2567 ocp_data |= PWR_EN | PHASE2_EN;
2569 ocp_data &= ~(PWR_EN | PHASE2_EN);
2570 ocp_write_word(tp, MCU_TYPE_USB, USB_POWER_CUT, ocp_data);
2572 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_MISC_0);
2573 ocp_data &= ~PCUT_STATUS;
2574 ocp_write_word(tp, MCU_TYPE_USB, USB_MISC_0, ocp_data);
2577 static void r8153_first_init(struct r8152 *tp)
2582 rxdy_gated_en(tp, true);
2583 r8153_teredo_off(tp);
2585 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2586 ocp_data &= ~RCR_ACPT_ALL;
2587 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2589 r8153_hw_phy_cfg(tp);
2591 rtl8152_nic_reset(tp);
2593 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2594 ocp_data &= ~NOW_IS_OOB;
2595 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2597 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2598 ocp_data &= ~MCU_BORW_EN;
2599 ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2601 for (i = 0; i < 1000; i++) {
2602 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2603 if (ocp_data & LINK_LIST_READY)
2605 usleep_range(1000, 2000);
2608 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2609 ocp_data |= RE_INIT_LL;
2610 ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2612 for (i = 0; i < 1000; i++) {
2613 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2614 if (ocp_data & LINK_LIST_READY)
2616 usleep_range(1000, 2000);
2619 rtl_rx_vlan_en(tp, tp->netdev->features & NETIF_F_HW_VLAN_CTAG_RX);
2621 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8153_RMS);
2622 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_MTPS, MTPS_JUMBO);
2624 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR0);
2625 ocp_data |= TCR0_AUTO_FIFO;
2626 ocp_write_word(tp, MCU_TYPE_PLA, PLA_TCR0, ocp_data);
2628 rtl8152_nic_reset(tp);
2630 /* rx share fifo credit full threshold */
2631 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL0, RXFIFO_THR1_NORMAL);
2632 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1, RXFIFO_THR2_NORMAL);
2633 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2, RXFIFO_THR3_NORMAL);
2634 /* TX share fifo free credit full threshold */
2635 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_TXFIFO_CTRL, TXFIFO_THR_NORMAL2);
2637 /* rx aggregation */
2638 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_USB_CTRL);
2639 ocp_data &= ~RX_AGG_DISABLE;
2640 ocp_write_word(tp, MCU_TYPE_USB, USB_USB_CTRL, ocp_data);
2643 static void r8153_enter_oob(struct r8152 *tp)
2648 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2649 ocp_data &= ~NOW_IS_OOB;
2650 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2654 for (i = 0; i < 1000; i++) {
2655 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2656 if (ocp_data & LINK_LIST_READY)
2658 usleep_range(1000, 2000);
2661 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2662 ocp_data |= RE_INIT_LL;
2663 ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2665 for (i = 0; i < 1000; i++) {
2666 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2667 if (ocp_data & LINK_LIST_READY)
2669 usleep_range(1000, 2000);
2672 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8153_RMS);
2674 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG);
2675 ocp_data &= ~TEREDO_WAKE_MASK;
2676 ocp_write_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG, ocp_data);
2678 rtl_rx_vlan_en(tp, true);
2680 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PAL_BDC_CR);
2681 ocp_data |= ALDPS_PROXY_MODE;
2682 ocp_write_word(tp, MCU_TYPE_PLA, PAL_BDC_CR, ocp_data);
2684 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2685 ocp_data |= NOW_IS_OOB | DIS_MCU_CLROOB;
2686 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2688 rxdy_gated_en(tp, false);
2690 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2691 ocp_data |= RCR_APM | RCR_AM | RCR_AB;
2692 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2695 static void r8153_disable_aldps(struct r8152 *tp)
2699 data = ocp_reg_read(tp, OCP_POWER_CFG);
2701 ocp_reg_write(tp, OCP_POWER_CFG, data);
2705 static void r8153_enable_aldps(struct r8152 *tp)
2709 data = ocp_reg_read(tp, OCP_POWER_CFG);
2711 ocp_reg_write(tp, OCP_POWER_CFG, data);
2714 static void rtl8153_disable(struct r8152 *tp)
2716 r8153_disable_aldps(tp);
2718 r8153_enable_aldps(tp);
2721 static int rtl8152_set_speed(struct r8152 *tp, u8 autoneg, u16 speed, u8 duplex)
2723 u16 bmcr, anar, gbcr;
2726 cancel_delayed_work_sync(&tp->schedule);
2727 anar = r8152_mdio_read(tp, MII_ADVERTISE);
2728 anar &= ~(ADVERTISE_10HALF | ADVERTISE_10FULL |
2729 ADVERTISE_100HALF | ADVERTISE_100FULL);
2730 if (tp->mii.supports_gmii) {
2731 gbcr = r8152_mdio_read(tp, MII_CTRL1000);
2732 gbcr &= ~(ADVERTISE_1000FULL | ADVERTISE_1000HALF);
2737 if (autoneg == AUTONEG_DISABLE) {
2738 if (speed == SPEED_10) {
2740 anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
2741 } else if (speed == SPEED_100) {
2742 bmcr = BMCR_SPEED100;
2743 anar |= ADVERTISE_100HALF | ADVERTISE_100FULL;
2744 } else if (speed == SPEED_1000 && tp->mii.supports_gmii) {
2745 bmcr = BMCR_SPEED1000;
2746 gbcr |= ADVERTISE_1000FULL | ADVERTISE_1000HALF;
2752 if (duplex == DUPLEX_FULL)
2753 bmcr |= BMCR_FULLDPLX;
2755 if (speed == SPEED_10) {
2756 if (duplex == DUPLEX_FULL)
2757 anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
2759 anar |= ADVERTISE_10HALF;
2760 } else if (speed == SPEED_100) {
2761 if (duplex == DUPLEX_FULL) {
2762 anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
2763 anar |= ADVERTISE_100HALF | ADVERTISE_100FULL;
2765 anar |= ADVERTISE_10HALF;
2766 anar |= ADVERTISE_100HALF;
2768 } else if (speed == SPEED_1000 && tp->mii.supports_gmii) {
2769 if (duplex == DUPLEX_FULL) {
2770 anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
2771 anar |= ADVERTISE_100HALF | ADVERTISE_100FULL;
2772 gbcr |= ADVERTISE_1000FULL | ADVERTISE_1000HALF;
2774 anar |= ADVERTISE_10HALF;
2775 anar |= ADVERTISE_100HALF;
2776 gbcr |= ADVERTISE_1000HALF;
2783 bmcr = BMCR_ANENABLE | BMCR_ANRESTART;
2786 if (test_bit(PHY_RESET, &tp->flags))
2789 if (tp->mii.supports_gmii)
2790 r8152_mdio_write(tp, MII_CTRL1000, gbcr);
2792 r8152_mdio_write(tp, MII_ADVERTISE, anar);
2793 r8152_mdio_write(tp, MII_BMCR, bmcr);
2795 if (test_bit(PHY_RESET, &tp->flags)) {
2798 clear_bit(PHY_RESET, &tp->flags);
2799 for (i = 0; i < 50; i++) {
2801 if ((r8152_mdio_read(tp, MII_BMCR) & BMCR_RESET) == 0)
2811 static void rtl8152_up(struct r8152 *tp)
2813 if (test_bit(RTL8152_UNPLUG, &tp->flags))
2816 r8152b_disable_aldps(tp);
2817 r8152b_exit_oob(tp);
2818 r8152b_enable_aldps(tp);
2821 static void rtl8152_down(struct r8152 *tp)
2823 if (test_bit(RTL8152_UNPLUG, &tp->flags)) {
2824 rtl_drop_queued_tx(tp);
2828 r8152_power_cut_en(tp, false);
2829 r8152b_disable_aldps(tp);
2830 r8152b_enter_oob(tp);
2831 r8152b_enable_aldps(tp);
2834 static void rtl8153_up(struct r8152 *tp)
2836 if (test_bit(RTL8152_UNPLUG, &tp->flags))
2839 r8153_disable_aldps(tp);
2840 r8153_first_init(tp);
2841 r8153_enable_aldps(tp);
2844 static void rtl8153_down(struct r8152 *tp)
2846 if (test_bit(RTL8152_UNPLUG, &tp->flags)) {
2847 rtl_drop_queued_tx(tp);
2851 r8153_u1u2en(tp, false);
2852 r8153_power_cut_en(tp, false);
2853 r8153_disable_aldps(tp);
2854 r8153_enter_oob(tp);
2855 r8153_enable_aldps(tp);
2858 static void set_carrier(struct r8152 *tp)
2860 struct net_device *netdev = tp->netdev;
2863 clear_bit(RTL8152_LINK_CHG, &tp->flags);
2864 speed = rtl8152_get_speed(tp);
2866 if (speed & LINK_STATUS) {
2867 if (!(tp->speed & LINK_STATUS)) {
2868 tp->rtl_ops.enable(tp);
2869 set_bit(RTL8152_SET_RX_MODE, &tp->flags);
2870 netif_carrier_on(netdev);
2873 if (tp->speed & LINK_STATUS) {
2874 netif_carrier_off(netdev);
2875 tasklet_disable(&tp->tl);
2876 tp->rtl_ops.disable(tp);
2877 tasklet_enable(&tp->tl);
2883 static void rtl_work_func_t(struct work_struct *work)
2885 struct r8152 *tp = container_of(work, struct r8152, schedule.work);
2887 /* If the device is unplugged or !netif_running(), the workqueue
2888 * doesn't need to wake the device, and could return directly.
2890 if (test_bit(RTL8152_UNPLUG, &tp->flags) || !netif_running(tp->netdev))
2893 if (usb_autopm_get_interface(tp->intf) < 0)
2896 if (!test_bit(WORK_ENABLE, &tp->flags))
2899 if (!mutex_trylock(&tp->control)) {
2900 schedule_delayed_work(&tp->schedule, 0);
2904 if (test_bit(RTL8152_LINK_CHG, &tp->flags))
2907 if (test_bit(RTL8152_SET_RX_MODE, &tp->flags))
2908 _rtl8152_set_rx_mode(tp->netdev);
2910 if (test_bit(SCHEDULE_TASKLET, &tp->flags) &&
2911 (tp->speed & LINK_STATUS)) {
2912 clear_bit(SCHEDULE_TASKLET, &tp->flags);
2913 tasklet_schedule(&tp->tl);
2916 if (test_bit(PHY_RESET, &tp->flags))
2919 mutex_unlock(&tp->control);
2922 usb_autopm_put_interface(tp->intf);
2925 static int rtl8152_open(struct net_device *netdev)
2927 struct r8152 *tp = netdev_priv(netdev);
2930 res = alloc_all_mem(tp);
2934 /* set speed to 0 to avoid autoresume try to submit rx */
2937 res = usb_autopm_get_interface(tp->intf);
2943 mutex_lock(&tp->control);
2945 /* The WORK_ENABLE may be set when autoresume occurs */
2946 if (test_bit(WORK_ENABLE, &tp->flags)) {
2947 clear_bit(WORK_ENABLE, &tp->flags);
2948 usb_kill_urb(tp->intr_urb);
2949 cancel_delayed_work_sync(&tp->schedule);
2951 /* disable the tx/rx, if the workqueue has enabled them. */
2952 if (tp->speed & LINK_STATUS)
2953 tp->rtl_ops.disable(tp);
2958 rtl8152_set_speed(tp, AUTONEG_ENABLE,
2959 tp->mii.supports_gmii ? SPEED_1000 : SPEED_100,
2962 netif_carrier_off(netdev);
2963 netif_start_queue(netdev);
2964 set_bit(WORK_ENABLE, &tp->flags);
2966 res = usb_submit_urb(tp->intr_urb, GFP_KERNEL);
2969 netif_device_detach(tp->netdev);
2970 netif_warn(tp, ifup, netdev, "intr_urb submit failed: %d\n",
2974 tasklet_enable(&tp->tl);
2977 mutex_unlock(&tp->control);
2979 usb_autopm_put_interface(tp->intf);
2985 static int rtl8152_close(struct net_device *netdev)
2987 struct r8152 *tp = netdev_priv(netdev);
2990 tasklet_disable(&tp->tl);
2991 clear_bit(WORK_ENABLE, &tp->flags);
2992 usb_kill_urb(tp->intr_urb);
2993 cancel_delayed_work_sync(&tp->schedule);
2994 netif_stop_queue(netdev);
2996 res = usb_autopm_get_interface(tp->intf);
2998 rtl_drop_queued_tx(tp);
3000 mutex_lock(&tp->control);
3002 /* The autosuspend may have been enabled and wouldn't
3003 * be disable when autoresume occurs, because the
3004 * netif_running() would be false.
3006 rtl_runtime_suspend_enable(tp, false);
3008 tp->rtl_ops.down(tp);
3010 mutex_unlock(&tp->control);
3012 usb_autopm_put_interface(tp->intf);
3020 static inline void r8152_mmd_indirect(struct r8152 *tp, u16 dev, u16 reg)
3022 ocp_reg_write(tp, OCP_EEE_AR, FUN_ADDR | dev);
3023 ocp_reg_write(tp, OCP_EEE_DATA, reg);
3024 ocp_reg_write(tp, OCP_EEE_AR, FUN_DATA | dev);
3027 static u16 r8152_mmd_read(struct r8152 *tp, u16 dev, u16 reg)
3031 r8152_mmd_indirect(tp, dev, reg);
3032 data = ocp_reg_read(tp, OCP_EEE_DATA);
3033 ocp_reg_write(tp, OCP_EEE_AR, 0x0000);
3038 static void r8152_mmd_write(struct r8152 *tp, u16 dev, u16 reg, u16 data)
3040 r8152_mmd_indirect(tp, dev, reg);
3041 ocp_reg_write(tp, OCP_EEE_DATA, data);
3042 ocp_reg_write(tp, OCP_EEE_AR, 0x0000);
3045 static void r8152_eee_en(struct r8152 *tp, bool enable)
3047 u16 config1, config2, config3;
3050 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR);
3051 config1 = ocp_reg_read(tp, OCP_EEE_CONFIG1) & ~sd_rise_time_mask;
3052 config2 = ocp_reg_read(tp, OCP_EEE_CONFIG2);
3053 config3 = ocp_reg_read(tp, OCP_EEE_CONFIG3) & ~fast_snr_mask;
3056 ocp_data |= EEE_RX_EN | EEE_TX_EN;
3057 config1 |= EEE_10_CAP | EEE_NWAY_EN | TX_QUIET_EN | RX_QUIET_EN;
3058 config1 |= sd_rise_time(1);
3059 config2 |= RG_DACQUIET_EN | RG_LDVQUIET_EN;
3060 config3 |= fast_snr(42);
3062 ocp_data &= ~(EEE_RX_EN | EEE_TX_EN);
3063 config1 &= ~(EEE_10_CAP | EEE_NWAY_EN | TX_QUIET_EN |
3065 config1 |= sd_rise_time(7);
3066 config2 &= ~(RG_DACQUIET_EN | RG_LDVQUIET_EN);
3067 config3 |= fast_snr(511);
3070 ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEE_CR, ocp_data);
3071 ocp_reg_write(tp, OCP_EEE_CONFIG1, config1);
3072 ocp_reg_write(tp, OCP_EEE_CONFIG2, config2);
3073 ocp_reg_write(tp, OCP_EEE_CONFIG3, config3);
3076 static void r8152b_enable_eee(struct r8152 *tp)
3078 r8152_eee_en(tp, true);
3079 r8152_mmd_write(tp, MDIO_MMD_AN, MDIO_AN_EEE_ADV, MDIO_EEE_100TX);
3082 static void r8153_eee_en(struct r8152 *tp, bool enable)
3087 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR);
3088 config = ocp_reg_read(tp, OCP_EEE_CFG);
3091 ocp_data |= EEE_RX_EN | EEE_TX_EN;
3094 ocp_data &= ~(EEE_RX_EN | EEE_TX_EN);
3095 config &= ~EEE10_EN;
3098 ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEE_CR, ocp_data);
3099 ocp_reg_write(tp, OCP_EEE_CFG, config);
3102 static void r8153_enable_eee(struct r8152 *tp)
3104 r8153_eee_en(tp, true);
3105 ocp_reg_write(tp, OCP_EEE_ADV, MDIO_EEE_1000T | MDIO_EEE_100TX);
3108 static void r8152b_enable_fc(struct r8152 *tp)
3112 anar = r8152_mdio_read(tp, MII_ADVERTISE);
3113 anar |= ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM;
3114 r8152_mdio_write(tp, MII_ADVERTISE, anar);
3117 static void rtl_tally_reset(struct r8152 *tp)
3121 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_RSTTALLY);
3122 ocp_data |= TALLY_RESET;
3123 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RSTTALLY, ocp_data);
3126 static void r8152b_init(struct r8152 *tp)
3130 if (test_bit(RTL8152_UNPLUG, &tp->flags))
3133 r8152b_disable_aldps(tp);
3135 if (tp->version == RTL_VER_01) {
3136 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE);
3137 ocp_data &= ~LED_MODE_MASK;
3138 ocp_write_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE, ocp_data);
3141 r8152_power_cut_en(tp, false);
3143 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR);
3144 ocp_data |= TX_10M_IDLE_EN | PFM_PWM_SWITCH;
3145 ocp_write_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR, ocp_data);
3146 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL);
3147 ocp_data &= ~MCU_CLK_RATIO_MASK;
3148 ocp_data |= MCU_CLK_RATIO | D3_CLK_GATED_EN;
3149 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL, ocp_data);
3150 ocp_data = GPHY_STS_MSK | SPEED_DOWN_MSK |
3151 SPDWN_RXDV_MSK | SPDWN_LINKCHG_MSK;
3152 ocp_write_word(tp, MCU_TYPE_PLA, PLA_GPHY_INTR_IMR, ocp_data);
3154 r8152b_enable_eee(tp);
3155 r8152b_enable_aldps(tp);
3156 r8152b_enable_fc(tp);
3157 rtl_tally_reset(tp);
3159 /* enable rx aggregation */
3160 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_USB_CTRL);
3161 ocp_data &= ~RX_AGG_DISABLE;
3162 ocp_write_word(tp, MCU_TYPE_USB, USB_USB_CTRL, ocp_data);
3165 static void r8153_init(struct r8152 *tp)
3170 if (test_bit(RTL8152_UNPLUG, &tp->flags))
3173 r8153_disable_aldps(tp);
3174 r8153_u1u2en(tp, false);
3176 for (i = 0; i < 500; i++) {
3177 if (ocp_read_word(tp, MCU_TYPE_PLA, PLA_BOOT_CTRL) &
3183 for (i = 0; i < 500; i++) {
3184 ocp_data = ocp_reg_read(tp, OCP_PHY_STATUS) & PHY_STAT_MASK;
3185 if (ocp_data == PHY_STAT_LAN_ON || ocp_data == PHY_STAT_PWRDN)
3190 r8153_u2p3en(tp, false);
3192 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_WDT11_CTRL);
3193 ocp_data &= ~TIMER11_EN;
3194 ocp_write_word(tp, MCU_TYPE_USB, USB_WDT11_CTRL, ocp_data);
3196 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE);
3197 ocp_data &= ~LED_MODE_MASK;
3198 ocp_write_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE, ocp_data);
3200 ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_LPM_CTRL);
3201 ocp_data &= ~LPM_TIMER_MASK;
3202 if (tp->udev->speed == USB_SPEED_SUPER)
3203 ocp_data |= LPM_TIMER_500US;
3205 ocp_data |= LPM_TIMER_500MS;
3206 ocp_write_byte(tp, MCU_TYPE_USB, USB_LPM_CTRL, ocp_data);
3208 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_AFE_CTRL2);
3209 ocp_data &= ~SEN_VAL_MASK;
3210 ocp_data |= SEN_VAL_NORMAL | SEL_RXIDLE;
3211 ocp_write_word(tp, MCU_TYPE_USB, USB_AFE_CTRL2, ocp_data);
3213 r8153_power_cut_en(tp, false);
3214 r8153_u1u2en(tp, true);
3216 ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL, ALDPS_SPDWN_RATIO);
3217 ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL2, EEE_SPDWN_RATIO);
3218 ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL3,
3219 PKT_AVAIL_SPDWN_EN | SUSPEND_SPDWN_EN |
3220 U1U2_SPDWN_EN | L1_SPDWN_EN);
3221 ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL4,
3222 PWRSAVE_SPDWN_EN | RXDV_SPDWN_EN | TX10MIDLE_EN |
3223 TP100_SPDWN_EN | TP500_SPDWN_EN | TP1000_SPDWN_EN |
3226 r8153_enable_eee(tp);
3227 r8153_enable_aldps(tp);
3228 r8152b_enable_fc(tp);
3229 rtl_tally_reset(tp);
3232 static int rtl8152_suspend(struct usb_interface *intf, pm_message_t message)
3234 struct r8152 *tp = usb_get_intfdata(intf);
3235 struct net_device *netdev = tp->netdev;
3238 mutex_lock(&tp->control);
3240 if (PMSG_IS_AUTO(message)) {
3241 if (netif_running(netdev) && work_busy(&tp->schedule.work)) {
3246 set_bit(SELECTIVE_SUSPEND, &tp->flags);
3248 netif_device_detach(netdev);
3251 if (netif_running(netdev) && test_bit(WORK_ENABLE, &tp->flags)) {
3252 clear_bit(WORK_ENABLE, &tp->flags);
3253 usb_kill_urb(tp->intr_urb);
3254 tasklet_disable(&tp->tl);
3255 if (test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
3257 rtl_runtime_suspend_enable(tp, true);
3259 cancel_delayed_work_sync(&tp->schedule);
3260 tp->rtl_ops.down(tp);
3262 tasklet_enable(&tp->tl);
3265 mutex_unlock(&tp->control);
3270 static int rtl8152_resume(struct usb_interface *intf)
3272 struct r8152 *tp = usb_get_intfdata(intf);
3274 mutex_lock(&tp->control);
3276 if (!test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
3277 tp->rtl_ops.init(tp);
3278 netif_device_attach(tp->netdev);
3281 if (netif_running(tp->netdev)) {
3282 if (test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
3283 rtl_runtime_suspend_enable(tp, false);
3284 clear_bit(SELECTIVE_SUSPEND, &tp->flags);
3285 set_bit(WORK_ENABLE, &tp->flags);
3286 if (tp->speed & LINK_STATUS)
3290 rtl8152_set_speed(tp, AUTONEG_ENABLE,
3291 tp->mii.supports_gmii ?
3292 SPEED_1000 : SPEED_100,
3295 netif_carrier_off(tp->netdev);
3296 set_bit(WORK_ENABLE, &tp->flags);
3298 usb_submit_urb(tp->intr_urb, GFP_KERNEL);
3299 } else if (test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
3300 clear_bit(SELECTIVE_SUSPEND, &tp->flags);
3303 mutex_unlock(&tp->control);
3308 static void rtl8152_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
3310 struct r8152 *tp = netdev_priv(dev);
3312 if (usb_autopm_get_interface(tp->intf) < 0)
3315 mutex_lock(&tp->control);
3317 wol->supported = WAKE_ANY;
3318 wol->wolopts = __rtl_get_wol(tp);
3320 mutex_unlock(&tp->control);
3322 usb_autopm_put_interface(tp->intf);
3325 static int rtl8152_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
3327 struct r8152 *tp = netdev_priv(dev);
3330 ret = usb_autopm_get_interface(tp->intf);
3334 mutex_lock(&tp->control);
3336 __rtl_set_wol(tp, wol->wolopts);
3337 tp->saved_wolopts = wol->wolopts & WAKE_ANY;
3339 mutex_unlock(&tp->control);
3341 usb_autopm_put_interface(tp->intf);
3347 static u32 rtl8152_get_msglevel(struct net_device *dev)
3349 struct r8152 *tp = netdev_priv(dev);
3351 return tp->msg_enable;
3354 static void rtl8152_set_msglevel(struct net_device *dev, u32 value)
3356 struct r8152 *tp = netdev_priv(dev);
3358 tp->msg_enable = value;
3361 static void rtl8152_get_drvinfo(struct net_device *netdev,
3362 struct ethtool_drvinfo *info)
3364 struct r8152 *tp = netdev_priv(netdev);
3366 strlcpy(info->driver, MODULENAME, sizeof(info->driver));
3367 strlcpy(info->version, DRIVER_VERSION, sizeof(info->version));
3368 usb_make_path(tp->udev, info->bus_info, sizeof(info->bus_info));
3372 int rtl8152_get_settings(struct net_device *netdev, struct ethtool_cmd *cmd)
3374 struct r8152 *tp = netdev_priv(netdev);
3377 if (!tp->mii.mdio_read)
3380 ret = usb_autopm_get_interface(tp->intf);
3384 mutex_lock(&tp->control);
3386 ret = mii_ethtool_gset(&tp->mii, cmd);
3388 mutex_unlock(&tp->control);
3390 usb_autopm_put_interface(tp->intf);
3396 static int rtl8152_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
3398 struct r8152 *tp = netdev_priv(dev);
3401 ret = usb_autopm_get_interface(tp->intf);
3405 mutex_lock(&tp->control);
3407 ret = rtl8152_set_speed(tp, cmd->autoneg, cmd->speed, cmd->duplex);
3409 mutex_unlock(&tp->control);
3411 usb_autopm_put_interface(tp->intf);
3417 static const char rtl8152_gstrings[][ETH_GSTRING_LEN] = {
3424 "tx_single_collisions",
3425 "tx_multi_collisions",
3433 static int rtl8152_get_sset_count(struct net_device *dev, int sset)
3437 return ARRAY_SIZE(rtl8152_gstrings);
3443 static void rtl8152_get_ethtool_stats(struct net_device *dev,
3444 struct ethtool_stats *stats, u64 *data)
3446 struct r8152 *tp = netdev_priv(dev);
3447 struct tally_counter tally;
3449 if (usb_autopm_get_interface(tp->intf) < 0)
3452 generic_ocp_read(tp, PLA_TALLYCNT, sizeof(tally), &tally, MCU_TYPE_PLA);
3454 usb_autopm_put_interface(tp->intf);
3456 data[0] = le64_to_cpu(tally.tx_packets);
3457 data[1] = le64_to_cpu(tally.rx_packets);
3458 data[2] = le64_to_cpu(tally.tx_errors);
3459 data[3] = le32_to_cpu(tally.rx_errors);
3460 data[4] = le16_to_cpu(tally.rx_missed);
3461 data[5] = le16_to_cpu(tally.align_errors);
3462 data[6] = le32_to_cpu(tally.tx_one_collision);
3463 data[7] = le32_to_cpu(tally.tx_multi_collision);
3464 data[8] = le64_to_cpu(tally.rx_unicast);
3465 data[9] = le64_to_cpu(tally.rx_broadcast);
3466 data[10] = le32_to_cpu(tally.rx_multicast);
3467 data[11] = le16_to_cpu(tally.tx_aborted);
3468 data[12] = le16_to_cpu(tally.tx_underrun);
3471 static void rtl8152_get_strings(struct net_device *dev, u32 stringset, u8 *data)
3473 switch (stringset) {
3475 memcpy(data, *rtl8152_gstrings, sizeof(rtl8152_gstrings));
3480 static int r8152_get_eee(struct r8152 *tp, struct ethtool_eee *eee)
3482 u32 ocp_data, lp, adv, supported = 0;
3485 val = r8152_mmd_read(tp, MDIO_MMD_PCS, MDIO_PCS_EEE_ABLE);
3486 supported = mmd_eee_cap_to_ethtool_sup_t(val);
3488 val = r8152_mmd_read(tp, MDIO_MMD_AN, MDIO_AN_EEE_ADV);
3489 adv = mmd_eee_adv_to_ethtool_adv_t(val);
3491 val = r8152_mmd_read(tp, MDIO_MMD_AN, MDIO_AN_EEE_LPABLE);
3492 lp = mmd_eee_adv_to_ethtool_adv_t(val);
3494 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR);
3495 ocp_data &= EEE_RX_EN | EEE_TX_EN;
3497 eee->eee_enabled = !!ocp_data;
3498 eee->eee_active = !!(supported & adv & lp);
3499 eee->supported = supported;
3500 eee->advertised = adv;
3501 eee->lp_advertised = lp;
3506 static int r8152_set_eee(struct r8152 *tp, struct ethtool_eee *eee)
3508 u16 val = ethtool_adv_to_mmd_eee_adv_t(eee->advertised);
3510 r8152_eee_en(tp, eee->eee_enabled);
3512 if (!eee->eee_enabled)
3515 r8152_mmd_write(tp, MDIO_MMD_AN, MDIO_AN_EEE_ADV, val);
3520 static int r8153_get_eee(struct r8152 *tp, struct ethtool_eee *eee)
3522 u32 ocp_data, lp, adv, supported = 0;
3525 val = ocp_reg_read(tp, OCP_EEE_ABLE);
3526 supported = mmd_eee_cap_to_ethtool_sup_t(val);
3528 val = ocp_reg_read(tp, OCP_EEE_ADV);
3529 adv = mmd_eee_adv_to_ethtool_adv_t(val);
3531 val = ocp_reg_read(tp, OCP_EEE_LPABLE);
3532 lp = mmd_eee_adv_to_ethtool_adv_t(val);
3534 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR);
3535 ocp_data &= EEE_RX_EN | EEE_TX_EN;
3537 eee->eee_enabled = !!ocp_data;
3538 eee->eee_active = !!(supported & adv & lp);
3539 eee->supported = supported;
3540 eee->advertised = adv;
3541 eee->lp_advertised = lp;
3546 static int r8153_set_eee(struct r8152 *tp, struct ethtool_eee *eee)
3548 u16 val = ethtool_adv_to_mmd_eee_adv_t(eee->advertised);
3550 r8153_eee_en(tp, eee->eee_enabled);
3552 if (!eee->eee_enabled)
3555 ocp_reg_write(tp, OCP_EEE_ADV, val);
3561 rtl_ethtool_get_eee(struct net_device *net, struct ethtool_eee *edata)
3563 struct r8152 *tp = netdev_priv(net);
3566 ret = usb_autopm_get_interface(tp->intf);
3570 mutex_lock(&tp->control);
3572 ret = tp->rtl_ops.eee_get(tp, edata);
3574 mutex_unlock(&tp->control);
3576 usb_autopm_put_interface(tp->intf);
3583 rtl_ethtool_set_eee(struct net_device *net, struct ethtool_eee *edata)
3585 struct r8152 *tp = netdev_priv(net);
3588 ret = usb_autopm_get_interface(tp->intf);
3592 mutex_lock(&tp->control);
3594 ret = tp->rtl_ops.eee_set(tp, edata);
3596 ret = mii_nway_restart(&tp->mii);
3598 mutex_unlock(&tp->control);
3600 usb_autopm_put_interface(tp->intf);
3606 static int rtl8152_nway_reset(struct net_device *dev)
3608 struct r8152 *tp = netdev_priv(dev);
3611 ret = usb_autopm_get_interface(tp->intf);
3615 mutex_lock(&tp->control);
3617 ret = mii_nway_restart(&tp->mii);
3619 mutex_unlock(&tp->control);
3621 usb_autopm_put_interface(tp->intf);
3627 static struct ethtool_ops ops = {
3628 .get_drvinfo = rtl8152_get_drvinfo,
3629 .get_settings = rtl8152_get_settings,
3630 .set_settings = rtl8152_set_settings,
3631 .get_link = ethtool_op_get_link,
3632 .nway_reset = rtl8152_nway_reset,
3633 .get_msglevel = rtl8152_get_msglevel,
3634 .set_msglevel = rtl8152_set_msglevel,
3635 .get_wol = rtl8152_get_wol,
3636 .set_wol = rtl8152_set_wol,
3637 .get_strings = rtl8152_get_strings,
3638 .get_sset_count = rtl8152_get_sset_count,
3639 .get_ethtool_stats = rtl8152_get_ethtool_stats,
3640 .get_eee = rtl_ethtool_get_eee,
3641 .set_eee = rtl_ethtool_set_eee,
3644 static int rtl8152_ioctl(struct net_device *netdev, struct ifreq *rq, int cmd)
3646 struct r8152 *tp = netdev_priv(netdev);
3647 struct mii_ioctl_data *data = if_mii(rq);
3650 if (test_bit(RTL8152_UNPLUG, &tp->flags))
3653 res = usb_autopm_get_interface(tp->intf);
3659 data->phy_id = R8152_PHY_ID; /* Internal PHY */
3663 mutex_lock(&tp->control);
3664 data->val_out = r8152_mdio_read(tp, data->reg_num);
3665 mutex_unlock(&tp->control);
3669 if (!capable(CAP_NET_ADMIN)) {
3673 mutex_lock(&tp->control);
3674 r8152_mdio_write(tp, data->reg_num, data->val_in);
3675 mutex_unlock(&tp->control);
3682 usb_autopm_put_interface(tp->intf);
3688 static int rtl8152_change_mtu(struct net_device *dev, int new_mtu)
3690 struct r8152 *tp = netdev_priv(dev);
3692 switch (tp->version) {
3695 return eth_change_mtu(dev, new_mtu);
3700 if (new_mtu < 68 || new_mtu > RTL8153_MAX_MTU)
3708 static const struct net_device_ops rtl8152_netdev_ops = {
3709 .ndo_open = rtl8152_open,
3710 .ndo_stop = rtl8152_close,
3711 .ndo_do_ioctl = rtl8152_ioctl,
3712 .ndo_start_xmit = rtl8152_start_xmit,
3713 .ndo_tx_timeout = rtl8152_tx_timeout,
3714 .ndo_set_features = rtl8152_set_features,
3715 .ndo_set_rx_mode = rtl8152_set_rx_mode,
3716 .ndo_set_mac_address = rtl8152_set_mac_address,
3717 .ndo_change_mtu = rtl8152_change_mtu,
3718 .ndo_validate_addr = eth_validate_addr,
3719 .ndo_features_check = rtl8152_features_check,
3722 static void r8152b_get_version(struct r8152 *tp)
3727 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR1);
3728 version = (u16)(ocp_data & VERSION_MASK);
3732 tp->version = RTL_VER_01;
3735 tp->version = RTL_VER_02;
3738 tp->version = RTL_VER_03;
3739 tp->mii.supports_gmii = 1;
3742 tp->version = RTL_VER_04;
3743 tp->mii.supports_gmii = 1;
3746 tp->version = RTL_VER_05;
3747 tp->mii.supports_gmii = 1;
3750 netif_info(tp, probe, tp->netdev,
3751 "Unknown version 0x%04x\n", version);
3756 static void rtl8152_unload(struct r8152 *tp)
3758 if (test_bit(RTL8152_UNPLUG, &tp->flags))
3761 if (tp->version != RTL_VER_01)
3762 r8152_power_cut_en(tp, true);
3765 static void rtl8153_unload(struct r8152 *tp)
3767 if (test_bit(RTL8152_UNPLUG, &tp->flags))
3770 r8153_power_cut_en(tp, false);
3773 static int rtl_ops_init(struct r8152 *tp)
3775 struct rtl_ops *ops = &tp->rtl_ops;
3778 switch (tp->version) {
3781 ops->init = r8152b_init;
3782 ops->enable = rtl8152_enable;
3783 ops->disable = rtl8152_disable;
3784 ops->up = rtl8152_up;
3785 ops->down = rtl8152_down;
3786 ops->unload = rtl8152_unload;
3787 ops->eee_get = r8152_get_eee;
3788 ops->eee_set = r8152_set_eee;
3794 ops->init = r8153_init;
3795 ops->enable = rtl8153_enable;
3796 ops->disable = rtl8153_disable;
3797 ops->up = rtl8153_up;
3798 ops->down = rtl8153_down;
3799 ops->unload = rtl8153_unload;
3800 ops->eee_get = r8153_get_eee;
3801 ops->eee_set = r8153_set_eee;
3806 netif_err(tp, probe, tp->netdev, "Unknown Device\n");
3813 static int rtl8152_probe(struct usb_interface *intf,
3814 const struct usb_device_id *id)
3816 struct usb_device *udev = interface_to_usbdev(intf);
3818 struct net_device *netdev;
3821 if (udev->actconfig->desc.bConfigurationValue != 1) {
3822 usb_driver_set_configuration(udev, 1);
3826 usb_reset_device(udev);
3827 netdev = alloc_etherdev(sizeof(struct r8152));
3829 dev_err(&intf->dev, "Out of memory\n");
3833 SET_NETDEV_DEV(netdev, &intf->dev);
3834 tp = netdev_priv(netdev);
3835 tp->msg_enable = 0x7FFF;
3838 tp->netdev = netdev;
3841 r8152b_get_version(tp);
3842 ret = rtl_ops_init(tp);
3846 tasklet_init(&tp->tl, bottom_half, (unsigned long)tp);
3847 mutex_init(&tp->control);
3848 INIT_DELAYED_WORK(&tp->schedule, rtl_work_func_t);
3850 netdev->netdev_ops = &rtl8152_netdev_ops;
3851 netdev->watchdog_timeo = RTL8152_TX_TIMEOUT;
3853 netdev->features |= NETIF_F_RXCSUM | NETIF_F_IP_CSUM | NETIF_F_SG |
3854 NETIF_F_TSO | NETIF_F_FRAGLIST | NETIF_F_IPV6_CSUM |
3855 NETIF_F_TSO6 | NETIF_F_HW_VLAN_CTAG_RX |
3856 NETIF_F_HW_VLAN_CTAG_TX;
3857 netdev->hw_features = NETIF_F_RXCSUM | NETIF_F_IP_CSUM | NETIF_F_SG |
3858 NETIF_F_TSO | NETIF_F_FRAGLIST |
3859 NETIF_F_IPV6_CSUM | NETIF_F_TSO6 |
3860 NETIF_F_HW_VLAN_CTAG_RX |
3861 NETIF_F_HW_VLAN_CTAG_TX;
3862 netdev->vlan_features = NETIF_F_SG | NETIF_F_IP_CSUM | NETIF_F_TSO |
3863 NETIF_F_HIGHDMA | NETIF_F_FRAGLIST |
3864 NETIF_F_IPV6_CSUM | NETIF_F_TSO6;
3866 netdev->ethtool_ops = &ops;
3867 netif_set_gso_max_size(netdev, RTL_LIMITED_TSO_SIZE);
3869 tp->mii.dev = netdev;
3870 tp->mii.mdio_read = read_mii_word;
3871 tp->mii.mdio_write = write_mii_word;
3872 tp->mii.phy_id_mask = 0x3f;
3873 tp->mii.reg_num_mask = 0x1f;
3874 tp->mii.phy_id = R8152_PHY_ID;
3876 intf->needs_remote_wakeup = 1;
3878 tp->rtl_ops.init(tp);
3879 set_ethernet_addr(tp);
3881 usb_set_intfdata(intf, tp);
3883 ret = register_netdev(netdev);
3885 netif_err(tp, probe, netdev, "couldn't register the device\n");
3889 tp->saved_wolopts = __rtl_get_wol(tp);
3890 if (tp->saved_wolopts)
3891 device_set_wakeup_enable(&udev->dev, true);
3893 device_set_wakeup_enable(&udev->dev, false);
3895 tasklet_disable(&tp->tl);
3897 netif_info(tp, probe, netdev, "%s\n", DRIVER_VERSION);
3902 usb_set_intfdata(intf, NULL);
3903 tasklet_kill(&tp->tl);
3905 free_netdev(netdev);
3909 static void rtl8152_disconnect(struct usb_interface *intf)
3911 struct r8152 *tp = usb_get_intfdata(intf);
3913 usb_set_intfdata(intf, NULL);
3915 struct usb_device *udev = tp->udev;
3917 if (udev->state == USB_STATE_NOTATTACHED)
3918 set_bit(RTL8152_UNPLUG, &tp->flags);
3920 tasklet_kill(&tp->tl);
3921 unregister_netdev(tp->netdev);
3922 tp->rtl_ops.unload(tp);
3923 free_netdev(tp->netdev);
3927 #define REALTEK_USB_DEVICE(vend, prod) \
3928 .match_flags = USB_DEVICE_ID_MATCH_DEVICE | \
3929 USB_DEVICE_ID_MATCH_INT_CLASS, \
3930 .idVendor = (vend), \
3931 .idProduct = (prod), \
3932 .bInterfaceClass = USB_CLASS_VENDOR_SPEC \
3935 .match_flags = USB_DEVICE_ID_MATCH_INT_INFO | \
3936 USB_DEVICE_ID_MATCH_DEVICE, \
3937 .idVendor = (vend), \
3938 .idProduct = (prod), \
3939 .bInterfaceClass = USB_CLASS_COMM, \
3940 .bInterfaceSubClass = USB_CDC_SUBCLASS_ETHERNET, \
3941 .bInterfaceProtocol = USB_CDC_PROTO_NONE
3943 /* table of devices that work with this driver */
3944 static struct usb_device_id rtl8152_table[] = {
3945 {REALTEK_USB_DEVICE(VENDOR_ID_REALTEK, 0x8152)},
3946 {REALTEK_USB_DEVICE(VENDOR_ID_REALTEK, 0x8153)},
3947 {REALTEK_USB_DEVICE(VENDOR_ID_SAMSUNG, 0xa101)},
3951 MODULE_DEVICE_TABLE(usb, rtl8152_table);
3953 static struct usb_driver rtl8152_driver = {
3955 .id_table = rtl8152_table,
3956 .probe = rtl8152_probe,
3957 .disconnect = rtl8152_disconnect,
3958 .suspend = rtl8152_suspend,
3959 .resume = rtl8152_resume,
3960 .reset_resume = rtl8152_resume,
3961 .supports_autosuspend = 1,
3962 .disable_hub_initiated_lpm = 1,
3965 module_usb_driver(rtl8152_driver);
3967 MODULE_AUTHOR(DRIVER_AUTHOR);
3968 MODULE_DESCRIPTION(DRIVER_DESC);
3969 MODULE_LICENSE("GPL");