2 * Copyright (c) 2000 Doug Rabson
3 * Copyright (c) 2000 Ruslan Ermilov
4 * Copyright (c) 2011 The FreeBSD Foundation
7 * Portions of this software were developed by Konstantin Belousov
8 * under sponsorship from the FreeBSD Foundation.
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
19 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
23 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
24 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
25 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
27 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
28 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
31 * $FreeBSD: src/sys/dev/agp/agp_i810.c,v 1.56 2010/03/12 21:34:23 rnoland Exp $
35 * Fixes for 830/845G support: David Dawes <dawes@xfree86.org>
36 * 852GM/855GM/865G support added by David Dawes <dawes@xfree86.org>
38 * This is generic Intel GTT handling code, morphed from the AGP
45 #define KTR_AGP_I810 KTR_DEV
47 #define KTR_AGP_I810 0
50 #include <sys/param.h>
51 #include <sys/systm.h>
52 #include <sys/malloc.h>
53 #include <sys/kernel.h>
58 #include <bus/pci/pcivar.h>
59 #include <bus/pci/pcireg.h>
62 #include <dev/agp/agp_i810.h>
65 #include <vm/vm_object.h>
66 #include <vm/vm_page.h>
67 #include <vm/vm_pageout.h>
70 #include <machine/md_var.h>
72 #define bus_read_1(r, o) \
73 bus_space_read_1((r)->r_bustag, (r)->r_bushandle, (o))
74 #define bus_read_4(r, o) \
75 bus_space_read_4((r)->r_bustag, (r)->r_bushandle, (o))
76 #define bus_write_4(r, o, v) \
77 bus_space_write_4((r)->r_bustag, (r)->r_bushandle, (o), (v))
79 MALLOC_DECLARE(M_AGP);
81 struct agp_i810_match;
83 static int agp_i810_check_active(device_t bridge_dev);
84 static int agp_i830_check_active(device_t bridge_dev);
85 static int agp_i915_check_active(device_t bridge_dev);
86 static int agp_sb_check_active(device_t bridge_dev);
88 static void agp_82852_set_desc(device_t dev,
89 const struct agp_i810_match *match);
90 static void agp_i810_set_desc(device_t dev, const struct agp_i810_match *match);
92 static void agp_i810_dump_regs(device_t dev);
93 static void agp_i830_dump_regs(device_t dev);
94 static void agp_i855_dump_regs(device_t dev);
95 static void agp_i915_dump_regs(device_t dev);
96 static void agp_i965_dump_regs(device_t dev);
97 static void agp_sb_dump_regs(device_t dev);
99 static int agp_i810_get_stolen_size(device_t dev);
100 static int agp_i830_get_stolen_size(device_t dev);
101 static int agp_i915_get_stolen_size(device_t dev);
102 static int agp_sb_get_stolen_size(device_t dev);
104 static int agp_i810_get_gtt_mappable_entries(device_t dev);
105 static int agp_i830_get_gtt_mappable_entries(device_t dev);
106 static int agp_i915_get_gtt_mappable_entries(device_t dev);
108 static int agp_i810_get_gtt_total_entries(device_t dev);
109 static int agp_i965_get_gtt_total_entries(device_t dev);
110 static int agp_gen5_get_gtt_total_entries(device_t dev);
111 static int agp_sb_get_gtt_total_entries(device_t dev);
113 static int agp_i810_install_gatt(device_t dev);
114 static int agp_i830_install_gatt(device_t dev);
116 static void agp_i810_deinstall_gatt(device_t dev);
117 static void agp_i830_deinstall_gatt(device_t dev);
119 static void agp_i810_install_gtt_pte(device_t dev, u_int index,
120 vm_offset_t physical, int flags);
121 static void agp_i830_install_gtt_pte(device_t dev, u_int index,
122 vm_offset_t physical, int flags);
123 static void agp_i915_install_gtt_pte(device_t dev, u_int index,
124 vm_offset_t physical, int flags);
125 static void agp_i965_install_gtt_pte(device_t dev, u_int index,
126 vm_offset_t physical, int flags);
127 static void agp_g4x_install_gtt_pte(device_t dev, u_int index,
128 vm_offset_t physical, int flags);
129 static void agp_sb_install_gtt_pte(device_t dev, u_int index,
130 vm_offset_t physical, int flags);
132 static void agp_i810_write_gtt(device_t dev, u_int index, uint32_t pte);
133 static void agp_i915_write_gtt(device_t dev, u_int index, uint32_t pte);
134 static void agp_i965_write_gtt(device_t dev, u_int index, uint32_t pte);
135 static void agp_g4x_write_gtt(device_t dev, u_int index, uint32_t pte);
136 static void agp_sb_write_gtt(device_t dev, u_int index, uint32_t pte);
138 static u_int32_t agp_i810_read_gtt_pte(device_t dev, u_int index);
139 static u_int32_t agp_i915_read_gtt_pte(device_t dev, u_int index);
140 static u_int32_t agp_i965_read_gtt_pte(device_t dev, u_int index);
141 static u_int32_t agp_g4x_read_gtt_pte(device_t dev, u_int index);
143 static vm_paddr_t agp_i810_read_gtt_pte_paddr(device_t dev, u_int index);
144 static vm_paddr_t agp_i915_read_gtt_pte_paddr(device_t dev, u_int index);
145 static vm_paddr_t agp_sb_read_gtt_pte_paddr(device_t dev, u_int index);
147 static int agp_i810_set_aperture(device_t dev, u_int32_t aperture);
148 static int agp_i830_set_aperture(device_t dev, u_int32_t aperture);
149 static int agp_i915_set_aperture(device_t dev, u_int32_t aperture);
151 static int agp_i810_chipset_flush_setup(device_t dev);
152 static int agp_i915_chipset_flush_setup(device_t dev);
153 static int agp_i965_chipset_flush_setup(device_t dev);
155 static void agp_i810_chipset_flush_teardown(device_t dev);
156 static void agp_i915_chipset_flush_teardown(device_t dev);
157 static void agp_i965_chipset_flush_teardown(device_t dev);
159 static void agp_i810_chipset_flush(device_t dev);
160 static void agp_i830_chipset_flush(device_t dev);
161 static void agp_i915_chipset_flush(device_t dev);
164 CHIP_I810, /* i810/i815 */
165 CHIP_I830, /* 830M/845G */
166 CHIP_I855, /* 852GM/855GM/865G */
167 CHIP_I915, /* 915G/915GM */
168 CHIP_I965, /* G965 */
169 CHIP_G33, /* G33/Q33/Q35 */
170 CHIP_IGD, /* Pineview */
171 CHIP_G4X, /* G45/Q45 */
172 CHIP_SB, /* SandyBridge */
175 /* The i810 through i855 have the registers at BAR 1, and the GATT gets
176 * allocated by us. The i915 has registers in BAR 0 and the GATT is at the
177 * start of the stolen memory, and should only be accessed by the OS through
178 * BAR 3. The G965 has registers and GATT in the same BAR (0) -- first 512KB
179 * is registers, second 512KB is GATT.
181 static struct resource_spec agp_i810_res_spec[] = {
182 { SYS_RES_MEMORY, AGP_I810_MMADR, RF_ACTIVE | RF_SHAREABLE },
186 static struct resource_spec agp_i915_res_spec[] = {
187 { SYS_RES_MEMORY, AGP_I915_MMADR, RF_ACTIVE | RF_SHAREABLE },
188 { SYS_RES_MEMORY, AGP_I915_GTTADR, RF_ACTIVE | RF_SHAREABLE },
192 static struct resource_spec agp_i965_res_spec[] = {
193 { SYS_RES_MEMORY, AGP_I965_GTTMMADR, RF_ACTIVE | RF_SHAREABLE },
197 static struct resource_spec agp_g4x_res_spec[] = {
198 { SYS_RES_MEMORY, AGP_G4X_MMADR, RF_ACTIVE | RF_SHAREABLE },
199 { SYS_RES_MEMORY, AGP_G4X_GTTADR, RF_ACTIVE | RF_SHAREABLE },
203 struct agp_i810_softc {
204 struct agp_softc agp;
205 u_int32_t initial_aperture; /* aperture size at startup */
206 struct agp_gatt *gatt;
207 u_int32_t dcache_size; /* i810 only */
208 u_int32_t stolen; /* number of i830/845 gtt
209 entries for stolen memory */
210 u_int stolen_size; /* BIOS-reserved graphics memory */
211 u_int gtt_total_entries; /* Total number of gtt ptes */
212 u_int gtt_mappable_entries; /* Number of gtt ptes mappable by CPU */
213 device_t bdev; /* bridge device */
214 void *argb_cursor; /* contigmalloc area for ARGB cursor */
215 struct resource *sc_res[2];
216 const struct agp_i810_match *match;
217 int sc_flush_page_rid;
218 struct resource *sc_flush_page_res;
219 void *sc_flush_page_vaddr;
220 int sc_bios_allocated_flush_page;
223 static device_t intel_agp;
225 struct agp_i810_driver {
228 int busdma_addr_mask_sz;
229 struct resource_spec *res_spec;
230 int (*check_active)(device_t);
231 void (*set_desc)(device_t, const struct agp_i810_match *);
232 void (*dump_regs)(device_t);
233 int (*get_stolen_size)(device_t);
234 int (*get_gtt_total_entries)(device_t);
235 int (*get_gtt_mappable_entries)(device_t);
236 int (*install_gatt)(device_t);
237 void (*deinstall_gatt)(device_t);
238 void (*write_gtt)(device_t, u_int, uint32_t);
239 void (*install_gtt_pte)(device_t, u_int, vm_offset_t, int);
240 u_int32_t (*read_gtt_pte)(device_t, u_int);
241 vm_paddr_t (*read_gtt_pte_paddr)(device_t , u_int);
242 int (*set_aperture)(device_t, u_int32_t);
243 int (*chipset_flush_setup)(device_t);
244 void (*chipset_flush_teardown)(device_t);
245 void (*chipset_flush)(device_t);
248 static const struct agp_i810_driver agp_i810_i810_driver = {
249 .chiptype = CHIP_I810,
251 .busdma_addr_mask_sz = 32,
252 .res_spec = agp_i810_res_spec,
253 .check_active = agp_i810_check_active,
254 .set_desc = agp_i810_set_desc,
255 .dump_regs = agp_i810_dump_regs,
256 .get_stolen_size = agp_i810_get_stolen_size,
257 .get_gtt_mappable_entries = agp_i810_get_gtt_mappable_entries,
258 .get_gtt_total_entries = agp_i810_get_gtt_total_entries,
259 .install_gatt = agp_i810_install_gatt,
260 .deinstall_gatt = agp_i810_deinstall_gatt,
261 .write_gtt = agp_i810_write_gtt,
262 .install_gtt_pte = agp_i810_install_gtt_pte,
263 .read_gtt_pte = agp_i810_read_gtt_pte,
264 .read_gtt_pte_paddr = agp_i810_read_gtt_pte_paddr,
265 .set_aperture = agp_i810_set_aperture,
266 .chipset_flush_setup = agp_i810_chipset_flush_setup,
267 .chipset_flush_teardown = agp_i810_chipset_flush_teardown,
268 .chipset_flush = agp_i810_chipset_flush,
271 static const struct agp_i810_driver agp_i810_i815_driver = {
272 .chiptype = CHIP_I810,
274 .busdma_addr_mask_sz = 32,
275 .res_spec = agp_i810_res_spec,
276 .check_active = agp_i810_check_active,
277 .set_desc = agp_i810_set_desc,
278 .dump_regs = agp_i810_dump_regs,
279 .get_stolen_size = agp_i810_get_stolen_size,
280 .get_gtt_mappable_entries = agp_i830_get_gtt_mappable_entries,
281 .get_gtt_total_entries = agp_i810_get_gtt_total_entries,
282 .install_gatt = agp_i810_install_gatt,
283 .deinstall_gatt = agp_i810_deinstall_gatt,
284 .write_gtt = agp_i810_write_gtt,
285 .install_gtt_pte = agp_i810_install_gtt_pte,
286 .read_gtt_pte = agp_i810_read_gtt_pte,
287 .read_gtt_pte_paddr = agp_i810_read_gtt_pte_paddr,
288 .set_aperture = agp_i810_set_aperture,
289 .chipset_flush_setup = agp_i810_chipset_flush_setup,
290 .chipset_flush_teardown = agp_i810_chipset_flush_teardown,
291 .chipset_flush = agp_i830_chipset_flush,
294 static const struct agp_i810_driver agp_i810_i830_driver = {
295 .chiptype = CHIP_I830,
297 .busdma_addr_mask_sz = 32,
298 .res_spec = agp_i810_res_spec,
299 .check_active = agp_i830_check_active,
300 .set_desc = agp_i810_set_desc,
301 .dump_regs = agp_i830_dump_regs,
302 .get_stolen_size = agp_i830_get_stolen_size,
303 .get_gtt_mappable_entries = agp_i830_get_gtt_mappable_entries,
304 .get_gtt_total_entries = agp_i810_get_gtt_total_entries,
305 .install_gatt = agp_i830_install_gatt,
306 .deinstall_gatt = agp_i830_deinstall_gatt,
307 .write_gtt = agp_i810_write_gtt,
308 .install_gtt_pte = agp_i830_install_gtt_pte,
309 .read_gtt_pte = agp_i810_read_gtt_pte,
310 .read_gtt_pte_paddr = agp_i810_read_gtt_pte_paddr,
311 .set_aperture = agp_i830_set_aperture,
312 .chipset_flush_setup = agp_i810_chipset_flush_setup,
313 .chipset_flush_teardown = agp_i810_chipset_flush_teardown,
314 .chipset_flush = agp_i830_chipset_flush,
317 static const struct agp_i810_driver agp_i810_i855_driver = {
318 .chiptype = CHIP_I855,
320 .busdma_addr_mask_sz = 32,
321 .res_spec = agp_i810_res_spec,
322 .check_active = agp_i830_check_active,
323 .set_desc = agp_82852_set_desc,
324 .dump_regs = agp_i855_dump_regs,
325 .get_stolen_size = agp_i915_get_stolen_size,
326 .get_gtt_mappable_entries = agp_i915_get_gtt_mappable_entries,
327 .get_gtt_total_entries = agp_i810_get_gtt_total_entries,
328 .install_gatt = agp_i830_install_gatt,
329 .deinstall_gatt = agp_i830_deinstall_gatt,
330 .write_gtt = agp_i810_write_gtt,
331 .install_gtt_pte = agp_i830_install_gtt_pte,
332 .read_gtt_pte = agp_i810_read_gtt_pte,
333 .read_gtt_pte_paddr = agp_i810_read_gtt_pte_paddr,
334 .set_aperture = agp_i830_set_aperture,
335 .chipset_flush_setup = agp_i810_chipset_flush_setup,
336 .chipset_flush_teardown = agp_i810_chipset_flush_teardown,
337 .chipset_flush = agp_i830_chipset_flush,
340 static const struct agp_i810_driver agp_i810_i865_driver = {
341 .chiptype = CHIP_I855,
343 .busdma_addr_mask_sz = 32,
344 .res_spec = agp_i810_res_spec,
345 .check_active = agp_i830_check_active,
346 .set_desc = agp_i810_set_desc,
347 .dump_regs = agp_i855_dump_regs,
348 .get_stolen_size = agp_i915_get_stolen_size,
349 .get_gtt_mappable_entries = agp_i915_get_gtt_mappable_entries,
350 .get_gtt_total_entries = agp_i810_get_gtt_total_entries,
351 .install_gatt = agp_i830_install_gatt,
352 .deinstall_gatt = agp_i830_deinstall_gatt,
353 .write_gtt = agp_i810_write_gtt,
354 .install_gtt_pte = agp_i830_install_gtt_pte,
355 .read_gtt_pte = agp_i810_read_gtt_pte,
356 .read_gtt_pte_paddr = agp_i810_read_gtt_pte_paddr,
357 .set_aperture = agp_i915_set_aperture,
358 .chipset_flush_setup = agp_i810_chipset_flush_setup,
359 .chipset_flush_teardown = agp_i810_chipset_flush_teardown,
360 .chipset_flush = agp_i830_chipset_flush,
363 static const struct agp_i810_driver agp_i810_i915_driver = {
364 .chiptype = CHIP_I915,
366 .busdma_addr_mask_sz = 32,
367 .res_spec = agp_i915_res_spec,
368 .check_active = agp_i915_check_active,
369 .set_desc = agp_i810_set_desc,
370 .dump_regs = agp_i915_dump_regs,
371 .get_stolen_size = agp_i915_get_stolen_size,
372 .get_gtt_mappable_entries = agp_i915_get_gtt_mappable_entries,
373 .get_gtt_total_entries = agp_i810_get_gtt_total_entries,
374 .install_gatt = agp_i830_install_gatt,
375 .deinstall_gatt = agp_i830_deinstall_gatt,
376 .write_gtt = agp_i915_write_gtt,
377 .install_gtt_pte = agp_i915_install_gtt_pte,
378 .read_gtt_pte = agp_i915_read_gtt_pte,
379 .read_gtt_pte_paddr = agp_i915_read_gtt_pte_paddr,
380 .set_aperture = agp_i915_set_aperture,
381 .chipset_flush_setup = agp_i915_chipset_flush_setup,
382 .chipset_flush_teardown = agp_i915_chipset_flush_teardown,
383 .chipset_flush = agp_i915_chipset_flush,
386 static const struct agp_i810_driver agp_i810_g965_driver = {
387 .chiptype = CHIP_I965,
389 .busdma_addr_mask_sz = 36,
390 .res_spec = agp_i965_res_spec,
391 .check_active = agp_i915_check_active,
392 .set_desc = agp_i810_set_desc,
393 .dump_regs = agp_i965_dump_regs,
394 .get_stolen_size = agp_i915_get_stolen_size,
395 .get_gtt_mappable_entries = agp_i915_get_gtt_mappable_entries,
396 .get_gtt_total_entries = agp_i965_get_gtt_total_entries,
397 .install_gatt = agp_i830_install_gatt,
398 .deinstall_gatt = agp_i830_deinstall_gatt,
399 .write_gtt = agp_i965_write_gtt,
400 .install_gtt_pte = agp_i965_install_gtt_pte,
401 .read_gtt_pte = agp_i965_read_gtt_pte,
402 .read_gtt_pte_paddr = agp_i915_read_gtt_pte_paddr,
403 .set_aperture = agp_i915_set_aperture,
404 .chipset_flush_setup = agp_i965_chipset_flush_setup,
405 .chipset_flush_teardown = agp_i965_chipset_flush_teardown,
406 .chipset_flush = agp_i915_chipset_flush,
409 static const struct agp_i810_driver agp_i810_g33_driver = {
410 .chiptype = CHIP_G33,
412 .busdma_addr_mask_sz = 36,
413 .res_spec = agp_i915_res_spec,
414 .check_active = agp_i915_check_active,
415 .set_desc = agp_i810_set_desc,
416 .dump_regs = agp_i965_dump_regs,
417 .get_stolen_size = agp_i915_get_stolen_size,
418 .get_gtt_mappable_entries = agp_i915_get_gtt_mappable_entries,
419 .get_gtt_total_entries = agp_i965_get_gtt_total_entries,
420 .install_gatt = agp_i830_install_gatt,
421 .deinstall_gatt = agp_i830_deinstall_gatt,
422 .write_gtt = agp_i915_write_gtt,
423 .install_gtt_pte = agp_i915_install_gtt_pte,
424 .read_gtt_pte = agp_i915_read_gtt_pte,
425 .read_gtt_pte_paddr = agp_i915_read_gtt_pte_paddr,
426 .set_aperture = agp_i915_set_aperture,
427 .chipset_flush_setup = agp_i965_chipset_flush_setup,
428 .chipset_flush_teardown = agp_i965_chipset_flush_teardown,
429 .chipset_flush = agp_i915_chipset_flush,
432 static const struct agp_i810_driver agp_i810_igd_driver = {
433 .chiptype = CHIP_IGD,
435 .busdma_addr_mask_sz = 36,
436 .res_spec = agp_i915_res_spec,
437 .check_active = agp_i915_check_active,
438 .set_desc = agp_i810_set_desc,
439 .dump_regs = agp_i915_dump_regs,
440 .get_stolen_size = agp_i915_get_stolen_size,
441 .get_gtt_mappable_entries = agp_i915_get_gtt_mappable_entries,
442 .get_gtt_total_entries = agp_i965_get_gtt_total_entries,
443 .install_gatt = agp_i830_install_gatt,
444 .deinstall_gatt = agp_i830_deinstall_gatt,
445 .write_gtt = agp_i915_write_gtt,
446 .install_gtt_pte = agp_i915_install_gtt_pte,
447 .read_gtt_pte = agp_i915_read_gtt_pte,
448 .read_gtt_pte_paddr = agp_i915_read_gtt_pte_paddr,
449 .set_aperture = agp_i915_set_aperture,
450 .chipset_flush_setup = agp_i965_chipset_flush_setup,
451 .chipset_flush_teardown = agp_i965_chipset_flush_teardown,
452 .chipset_flush = agp_i915_chipset_flush,
455 static const struct agp_i810_driver agp_i810_g4x_driver = {
456 .chiptype = CHIP_G4X,
458 .busdma_addr_mask_sz = 36,
459 .res_spec = agp_i965_res_spec,
460 .check_active = agp_i915_check_active,
461 .set_desc = agp_i810_set_desc,
462 .dump_regs = agp_i965_dump_regs,
463 .get_stolen_size = agp_i915_get_stolen_size,
464 .get_gtt_mappable_entries = agp_i915_get_gtt_mappable_entries,
465 .get_gtt_total_entries = agp_gen5_get_gtt_total_entries,
466 .install_gatt = agp_i830_install_gatt,
467 .deinstall_gatt = agp_i830_deinstall_gatt,
468 .write_gtt = agp_g4x_write_gtt,
469 .install_gtt_pte = agp_g4x_install_gtt_pte,
470 .read_gtt_pte = agp_g4x_read_gtt_pte,
471 .read_gtt_pte_paddr = agp_i915_read_gtt_pte_paddr,
472 .set_aperture = agp_i915_set_aperture,
473 .chipset_flush_setup = agp_i965_chipset_flush_setup,
474 .chipset_flush_teardown = agp_i965_chipset_flush_teardown,
475 .chipset_flush = agp_i915_chipset_flush,
478 static const struct agp_i810_driver agp_i810_sb_driver = {
481 .busdma_addr_mask_sz = 40,
482 .res_spec = agp_g4x_res_spec,
483 .check_active = agp_sb_check_active,
484 .set_desc = agp_i810_set_desc,
485 .dump_regs = agp_sb_dump_regs,
486 .get_stolen_size = agp_sb_get_stolen_size,
487 .get_gtt_mappable_entries = agp_i915_get_gtt_mappable_entries,
488 .get_gtt_total_entries = agp_sb_get_gtt_total_entries,
489 .install_gatt = agp_i830_install_gatt,
490 .deinstall_gatt = agp_i830_deinstall_gatt,
491 .write_gtt = agp_sb_write_gtt,
492 .install_gtt_pte = agp_sb_install_gtt_pte,
493 .read_gtt_pte = agp_g4x_read_gtt_pte,
494 .read_gtt_pte_paddr = agp_sb_read_gtt_pte_paddr,
495 .set_aperture = agp_i915_set_aperture,
496 .chipset_flush_setup = agp_i810_chipset_flush_setup,
497 .chipset_flush_teardown = agp_i810_chipset_flush_teardown,
498 .chipset_flush = agp_i810_chipset_flush,
501 /* For adding new devices, devid is the id of the graphics controller
502 * (pci:0:2:0, for example). The placeholder (usually at pci:0:2:1) for the
503 * second head should never be added. The bridge_offset is the offset to
504 * subtract from devid to get the id of the hostb that the device is on.
506 static const struct agp_i810_match {
509 const struct agp_i810_driver *driver;
510 } agp_i810_matches[] = {
513 .name = "Intel 82810 (i810 GMCH) SVGA controller",
514 .driver = &agp_i810_i810_driver
518 .name = "Intel 82810-DC100 (i810-DC100 GMCH) SVGA controller",
519 .driver = &agp_i810_i810_driver
523 .name = "Intel 82810E (i810E GMCH) SVGA controller",
524 .driver = &agp_i810_i810_driver
528 .name = "Intel 82815 (i815 GMCH) SVGA controller",
529 .driver = &agp_i810_i815_driver
533 .name = "Intel 82830M (830M GMCH) SVGA controller",
534 .driver = &agp_i810_i830_driver
538 .name = "Intel 82845M (845M GMCH) SVGA controller",
539 .driver = &agp_i810_i830_driver
543 .name = "Intel 82852/855GM SVGA controller",
544 .driver = &agp_i810_i855_driver
548 .name = "Intel 82865G (865G GMCH) SVGA controller",
549 .driver = &agp_i810_i865_driver
553 .name = "Intel 82915G (915G GMCH) SVGA controller",
554 .driver = &agp_i810_i915_driver
558 .name = "Intel E7221 SVGA controller",
559 .driver = &agp_i810_i915_driver
563 .name = "Intel 82915GM (915GM GMCH) SVGA controller",
564 .driver = &agp_i810_i915_driver
568 .name = "Intel 82945G (945G GMCH) SVGA controller",
569 .driver = &agp_i810_i915_driver
573 .name = "Intel 82945GM (945GM GMCH) SVGA controller",
574 .driver = &agp_i810_i915_driver
578 .name = "Intel 945GME SVGA controller",
579 .driver = &agp_i810_i915_driver
583 .name = "Intel 946GZ SVGA controller",
584 .driver = &agp_i810_g965_driver
588 .name = "Intel G965 SVGA controller",
589 .driver = &agp_i810_g965_driver
593 .name = "Intel Q965 SVGA controller",
594 .driver = &agp_i810_g965_driver
598 .name = "Intel G965 SVGA controller",
599 .driver = &agp_i810_g965_driver
603 .name = "Intel Q35 SVGA controller",
604 .driver = &agp_i810_g33_driver
608 .name = "Intel G33 SVGA controller",
609 .driver = &agp_i810_g33_driver
613 .name = "Intel Q33 SVGA controller",
614 .driver = &agp_i810_g33_driver
618 .name = "Intel Pineview SVGA controller",
619 .driver = &agp_i810_igd_driver
623 .name = "Intel Pineview (M) SVGA controller",
624 .driver = &agp_i810_igd_driver
628 .name = "Intel GM965 SVGA controller",
629 .driver = &agp_i810_g965_driver
633 .name = "Intel GME965 SVGA controller",
634 .driver = &agp_i810_g965_driver
638 .name = "Intel GM45 SVGA controller",
639 .driver = &agp_i810_g4x_driver
643 .name = "Intel Eaglelake SVGA controller",
644 .driver = &agp_i810_g4x_driver
648 .name = "Intel Q45 SVGA controller",
649 .driver = &agp_i810_g4x_driver
653 .name = "Intel G45 SVGA controller",
654 .driver = &agp_i810_g4x_driver
658 .name = "Intel G41 SVGA controller",
659 .driver = &agp_i810_g4x_driver
663 .name = "Intel Ironlake (D) SVGA controller",
664 .driver = &agp_i810_g4x_driver
668 .name = "Intel Ironlake (M) SVGA controller",
669 .driver = &agp_i810_g4x_driver
673 .name = "SandyBridge desktop GT1 IG",
674 .driver = &agp_i810_sb_driver
678 .name = "SandyBridge desktop GT2 IG",
679 .driver = &agp_i810_sb_driver
683 .name = "SandyBridge desktop GT2+ IG",
684 .driver = &agp_i810_sb_driver
688 .name = "SandyBridge mobile GT1 IG",
689 .driver = &agp_i810_sb_driver
693 .name = "SandyBridge mobile GT2 IG",
694 .driver = &agp_i810_sb_driver
698 .name = "SandyBridge mobile GT2+ IG",
699 .driver = &agp_i810_sb_driver
703 .name = "SandyBridge server IG",
704 .driver = &agp_i810_sb_driver
708 .name = "IvyBridge desktop GT1 IG",
709 .driver = &agp_i810_sb_driver
713 .name = "IvyBridge desktop GT2 IG",
714 .driver = &agp_i810_sb_driver
718 .name = "IvyBridge mobile GT1 IG",
719 .driver = &agp_i810_sb_driver
723 .name = "IvyBridge mobile GT2 IG",
724 .driver = &agp_i810_sb_driver
728 .name = "IvyBridge server GT1 IG",
729 .driver = &agp_i810_sb_driver
733 .name = "IvyBridge server GT2 IG",
734 .driver = &agp_i810_sb_driver
741 static const struct agp_i810_match*
742 agp_i810_match(device_t dev)
746 if (pci_get_class(dev) != PCIC_DISPLAY)
749 devid = pci_get_devid(dev);
750 for (i = 0; agp_i810_matches[i].devid != 0; i++) {
751 if (agp_i810_matches[i].devid == devid)
754 if (agp_i810_matches[i].devid == 0)
757 return (&agp_i810_matches[i]);
761 * Find bridge device.
764 agp_i810_find_bridge(device_t dev)
767 return (pci_find_dbsf(0, 0, 0, 0));
771 agp_i810_identify(driver_t *driver, device_t parent)
774 if (device_find_child(parent, "agp", -1) == NULL &&
775 agp_i810_match(parent))
776 device_add_child(parent, "agp", -1);
780 agp_i810_check_active(device_t bridge_dev)
784 smram = pci_read_config(bridge_dev, AGP_I810_SMRAM, 1);
785 if ((smram & AGP_I810_SMRAM_GMS) == AGP_I810_SMRAM_GMS_DISABLED)
791 agp_i830_check_active(device_t bridge_dev)
795 gcc1 = pci_read_config(bridge_dev, AGP_I830_GCC1, 1);
796 if ((gcc1 & AGP_I830_GCC1_DEV2) == AGP_I830_GCC1_DEV2_DISABLED)
802 agp_i915_check_active(device_t bridge_dev)
806 deven = pci_read_config(bridge_dev, AGP_I915_DEVEN, 4);
807 if ((deven & AGP_I915_DEVEN_D2F0) == AGP_I915_DEVEN_D2F0_DISABLED)
813 agp_sb_check_active(device_t bridge_dev)
817 deven = pci_read_config(bridge_dev, AGP_I915_DEVEN, 4);
818 if ((deven & AGP_SB_DEVEN_D2EN) == AGP_SB_DEVEN_D2EN_DISABLED)
824 agp_82852_set_desc(device_t dev, const struct agp_i810_match *match)
827 switch (pci_read_config(dev, AGP_I85X_CAPID, 1)) {
830 "Intel 82855GME (855GME GMCH) SVGA controller");
834 "Intel 82855GM (855GM GMCH) SVGA controller");
838 "Intel 82852GME (852GME GMCH) SVGA controller");
842 "Intel 82852GM (852GM GMCH) SVGA controller");
846 "Intel 8285xM (85xGM GMCH) SVGA controller");
852 agp_i810_set_desc(device_t dev, const struct agp_i810_match *match)
855 device_set_desc(dev, match->name);
859 agp_i810_probe(device_t dev)
862 const struct agp_i810_match *match;
865 if (resource_disabled("agp", device_get_unit(dev)))
867 match = agp_i810_match(dev);
871 bdev = agp_i810_find_bridge(dev);
874 kprintf("I810: can't find bridge device\n");
879 * checking whether internal graphics device has been activated.
881 err = match->driver->check_active(bdev);
884 kprintf("i810: disabled, not probing\n");
888 match->driver->set_desc(dev, match);
889 return (BUS_PROBE_DEFAULT);
893 agp_i810_dump_regs(device_t dev)
895 struct agp_i810_softc *sc = device_get_softc(dev);
897 device_printf(dev, "AGP_I810_PGTBL_CTL: %08x\n",
898 bus_read_4(sc->sc_res[0], AGP_I810_PGTBL_CTL));
899 device_printf(dev, "AGP_I810_MISCC: 0x%04x\n",
900 pci_read_config(sc->bdev, AGP_I810_MISCC, 2));
904 agp_i830_dump_regs(device_t dev)
906 struct agp_i810_softc *sc = device_get_softc(dev);
908 device_printf(dev, "AGP_I810_PGTBL_CTL: %08x\n",
909 bus_read_4(sc->sc_res[0], AGP_I810_PGTBL_CTL));
910 device_printf(dev, "AGP_I830_GCC1: 0x%02x\n",
911 pci_read_config(sc->bdev, AGP_I830_GCC1, 1));
915 agp_i855_dump_regs(device_t dev)
917 struct agp_i810_softc *sc = device_get_softc(dev);
919 device_printf(dev, "AGP_I810_PGTBL_CTL: %08x\n",
920 bus_read_4(sc->sc_res[0], AGP_I810_PGTBL_CTL));
921 device_printf(dev, "AGP_I855_GCC1: 0x%02x\n",
922 pci_read_config(sc->bdev, AGP_I855_GCC1, 1));
926 agp_i915_dump_regs(device_t dev)
928 struct agp_i810_softc *sc = device_get_softc(dev);
930 device_printf(dev, "AGP_I810_PGTBL_CTL: %08x\n",
931 bus_read_4(sc->sc_res[0], AGP_I810_PGTBL_CTL));
932 device_printf(dev, "AGP_I855_GCC1: 0x%02x\n",
933 pci_read_config(sc->bdev, AGP_I855_GCC1, 1));
934 device_printf(dev, "AGP_I915_MSAC: 0x%02x\n",
935 pci_read_config(sc->bdev, AGP_I915_MSAC, 1));
939 agp_i965_dump_regs(device_t dev)
941 struct agp_i810_softc *sc = device_get_softc(dev);
943 device_printf(dev, "AGP_I965_PGTBL_CTL2: %08x\n",
944 bus_read_4(sc->sc_res[0], AGP_I965_PGTBL_CTL2));
945 device_printf(dev, "AGP_I855_GCC1: 0x%02x\n",
946 pci_read_config(sc->bdev, AGP_I855_GCC1, 1));
947 device_printf(dev, "AGP_I965_MSAC: 0x%02x\n",
948 pci_read_config(sc->bdev, AGP_I965_MSAC, 1));
952 agp_sb_dump_regs(device_t dev)
954 struct agp_i810_softc *sc = device_get_softc(dev);
956 device_printf(dev, "AGP_SNB_GFX_MODE: %08x\n",
957 bus_read_4(sc->sc_res[0], AGP_SNB_GFX_MODE));
958 device_printf(dev, "AGP_SNB_GCC1: 0x%04x\n",
959 pci_read_config(sc->bdev, AGP_SNB_GCC1, 2));
963 agp_i810_get_stolen_size(device_t dev)
965 struct agp_i810_softc *sc;
967 sc = device_get_softc(dev);
974 agp_i830_get_stolen_size(device_t dev)
976 struct agp_i810_softc *sc;
979 sc = device_get_softc(dev);
981 gcc1 = pci_read_config(sc->bdev, AGP_I830_GCC1, 1);
982 switch (gcc1 & AGP_I830_GCC1_GMS) {
983 case AGP_I830_GCC1_GMS_STOLEN_512:
984 sc->stolen = (512 - 132) * 1024 / 4096;
985 sc->stolen_size = 512 * 1024;
987 case AGP_I830_GCC1_GMS_STOLEN_1024:
988 sc->stolen = (1024 - 132) * 1024 / 4096;
989 sc->stolen_size = 1024 * 1024;
991 case AGP_I830_GCC1_GMS_STOLEN_8192:
992 sc->stolen = (8192 - 132) * 1024 / 4096;
993 sc->stolen_size = 8192 * 1024;
998 "unknown memory configuration, disabling (GCC1 %x)\n",
1006 agp_i915_get_stolen_size(device_t dev)
1008 struct agp_i810_softc *sc;
1009 unsigned int gcc1, stolen, gtt_size;
1011 sc = device_get_softc(dev);
1014 * Stolen memory is set up at the beginning of the aperture by
1015 * the BIOS, consisting of the GATT followed by 4kb for the
1018 switch (sc->match->driver->chiptype) {
1026 switch (bus_read_4(sc->sc_res[0], AGP_I810_PGTBL_CTL) &
1027 AGP_I810_PGTBL_SIZE_MASK) {
1028 case AGP_I810_PGTBL_SIZE_128KB:
1031 case AGP_I810_PGTBL_SIZE_256KB:
1034 case AGP_I810_PGTBL_SIZE_512KB:
1037 case AGP_I965_PGTBL_SIZE_1MB:
1040 case AGP_I965_PGTBL_SIZE_2MB:
1043 case AGP_I965_PGTBL_SIZE_1_5MB:
1044 gtt_size = 1024 + 512;
1047 device_printf(dev, "Bad PGTBL size\n");
1052 gcc1 = pci_read_config(sc->bdev, AGP_I855_GCC1, 2);
1053 switch (gcc1 & AGP_G33_MGGC_GGMS_MASK) {
1054 case AGP_G33_MGGC_GGMS_SIZE_1M:
1057 case AGP_G33_MGGC_GGMS_SIZE_2M:
1061 device_printf(dev, "Bad PGTBL size\n");
1070 device_printf(dev, "Bad chiptype\n");
1074 /* GCC1 is called MGGC on i915+ */
1075 gcc1 = pci_read_config(sc->bdev, AGP_I855_GCC1, 1);
1076 switch (gcc1 & AGP_I855_GCC1_GMS) {
1077 case AGP_I855_GCC1_GMS_STOLEN_1M:
1080 case AGP_I855_GCC1_GMS_STOLEN_4M:
1083 case AGP_I855_GCC1_GMS_STOLEN_8M:
1086 case AGP_I855_GCC1_GMS_STOLEN_16M:
1089 case AGP_I855_GCC1_GMS_STOLEN_32M:
1092 case AGP_I915_GCC1_GMS_STOLEN_48M:
1093 stolen = sc->match->driver->gen > 2 ? 48 * 1024 : 0;
1095 case AGP_I915_GCC1_GMS_STOLEN_64M:
1096 stolen = sc->match->driver->gen > 2 ? 64 * 1024 : 0;
1098 case AGP_G33_GCC1_GMS_STOLEN_128M:
1099 stolen = sc->match->driver->gen > 2 ? 128 * 1024 : 0;
1101 case AGP_G33_GCC1_GMS_STOLEN_256M:
1102 stolen = sc->match->driver->gen > 2 ? 256 * 1024 : 0;
1104 case AGP_G4X_GCC1_GMS_STOLEN_96M:
1105 if (sc->match->driver->chiptype == CHIP_I965 ||
1106 sc->match->driver->chiptype == CHIP_G4X)
1111 case AGP_G4X_GCC1_GMS_STOLEN_160M:
1112 if (sc->match->driver->chiptype == CHIP_I965 ||
1113 sc->match->driver->chiptype == CHIP_G4X)
1114 stolen = 160 * 1024;
1118 case AGP_G4X_GCC1_GMS_STOLEN_224M:
1119 if (sc->match->driver->chiptype == CHIP_I965 ||
1120 sc->match->driver->chiptype == CHIP_G4X)
1121 stolen = 224 * 1024;
1125 case AGP_G4X_GCC1_GMS_STOLEN_352M:
1126 if (sc->match->driver->chiptype == CHIP_I965 ||
1127 sc->match->driver->chiptype == CHIP_G4X)
1128 stolen = 352 * 1024;
1134 "unknown memory configuration, disabling (GCC1 %x)\n",
1140 sc->stolen_size = stolen * 1024;
1141 sc->stolen = (stolen - gtt_size) * 1024 / 4096;
1147 agp_sb_get_stolen_size(device_t dev)
1149 struct agp_i810_softc *sc;
1152 sc = device_get_softc(dev);
1153 gmch_ctl = pci_read_config(sc->bdev, AGP_SNB_GCC1, 2);
1154 switch (gmch_ctl & AGP_SNB_GMCH_GMS_STOLEN_MASK) {
1155 case AGP_SNB_GMCH_GMS_STOLEN_32M:
1156 sc->stolen_size = 32 * 1024 * 1024;
1158 case AGP_SNB_GMCH_GMS_STOLEN_64M:
1159 sc->stolen_size = 64 * 1024 * 1024;
1161 case AGP_SNB_GMCH_GMS_STOLEN_96M:
1162 sc->stolen_size = 96 * 1024 * 1024;
1164 case AGP_SNB_GMCH_GMS_STOLEN_128M:
1165 sc->stolen_size = 128 * 1024 * 1024;
1167 case AGP_SNB_GMCH_GMS_STOLEN_160M:
1168 sc->stolen_size = 160 * 1024 * 1024;
1170 case AGP_SNB_GMCH_GMS_STOLEN_192M:
1171 sc->stolen_size = 192 * 1024 * 1024;
1173 case AGP_SNB_GMCH_GMS_STOLEN_224M:
1174 sc->stolen_size = 224 * 1024 * 1024;
1176 case AGP_SNB_GMCH_GMS_STOLEN_256M:
1177 sc->stolen_size = 256 * 1024 * 1024;
1179 case AGP_SNB_GMCH_GMS_STOLEN_288M:
1180 sc->stolen_size = 288 * 1024 * 1024;
1182 case AGP_SNB_GMCH_GMS_STOLEN_320M:
1183 sc->stolen_size = 320 * 1024 * 1024;
1185 case AGP_SNB_GMCH_GMS_STOLEN_352M:
1186 sc->stolen_size = 352 * 1024 * 1024;
1188 case AGP_SNB_GMCH_GMS_STOLEN_384M:
1189 sc->stolen_size = 384 * 1024 * 1024;
1191 case AGP_SNB_GMCH_GMS_STOLEN_416M:
1192 sc->stolen_size = 416 * 1024 * 1024;
1194 case AGP_SNB_GMCH_GMS_STOLEN_448M:
1195 sc->stolen_size = 448 * 1024 * 1024;
1197 case AGP_SNB_GMCH_GMS_STOLEN_480M:
1198 sc->stolen_size = 480 * 1024 * 1024;
1200 case AGP_SNB_GMCH_GMS_STOLEN_512M:
1201 sc->stolen_size = 512 * 1024 * 1024;
1204 sc->stolen = (sc->stolen_size - 4) / 4096;
1209 agp_i810_get_gtt_mappable_entries(device_t dev)
1211 struct agp_i810_softc *sc;
1215 sc = device_get_softc(dev);
1216 miscc = pci_read_config(sc->bdev, AGP_I810_MISCC, 2);
1217 if ((miscc & AGP_I810_MISCC_WINSIZE) == AGP_I810_MISCC_WINSIZE_32)
1221 sc->gtt_mappable_entries = (ap * 1024 * 1024) >> AGP_PAGE_SHIFT;
1226 agp_i830_get_gtt_mappable_entries(device_t dev)
1228 struct agp_i810_softc *sc;
1232 sc = device_get_softc(dev);
1233 gmch_ctl = pci_read_config(sc->bdev, AGP_I830_GCC1, 2);
1234 if ((gmch_ctl & AGP_I830_GCC1_GMASIZE) == AGP_I830_GCC1_GMASIZE_64)
1238 sc->gtt_mappable_entries = (ap * 1024 * 1024) >> AGP_PAGE_SHIFT;
1243 agp_i915_get_gtt_mappable_entries(device_t dev)
1245 struct agp_i810_softc *sc;
1248 sc = device_get_softc(dev);
1249 ap = AGP_GET_APERTURE(dev);
1250 sc->gtt_mappable_entries = ap >> AGP_PAGE_SHIFT;
1255 agp_i810_get_gtt_total_entries(device_t dev)
1257 struct agp_i810_softc *sc;
1259 sc = device_get_softc(dev);
1260 sc->gtt_total_entries = sc->gtt_mappable_entries;
1265 agp_i965_get_gtt_total_entries(device_t dev)
1267 struct agp_i810_softc *sc;
1268 uint32_t pgetbl_ctl;
1271 sc = device_get_softc(dev);
1273 pgetbl_ctl = bus_read_4(sc->sc_res[0], AGP_I810_PGTBL_CTL);
1274 switch (pgetbl_ctl & AGP_I810_PGTBL_SIZE_MASK) {
1275 case AGP_I810_PGTBL_SIZE_128KB:
1276 sc->gtt_total_entries = 128 * 1024 / 4;
1278 case AGP_I810_PGTBL_SIZE_256KB:
1279 sc->gtt_total_entries = 256 * 1024 / 4;
1281 case AGP_I810_PGTBL_SIZE_512KB:
1282 sc->gtt_total_entries = 512 * 1024 / 4;
1284 /* GTT pagetable sizes bigger than 512KB are not possible on G33! */
1285 case AGP_I810_PGTBL_SIZE_1MB:
1286 sc->gtt_total_entries = 1024 * 1024 / 4;
1288 case AGP_I810_PGTBL_SIZE_2MB:
1289 sc->gtt_total_entries = 2 * 1024 * 1024 / 4;
1291 case AGP_I810_PGTBL_SIZE_1_5MB:
1292 sc->gtt_total_entries = (1024 + 512) * 1024 / 4;
1295 device_printf(dev, "Unknown page table size\n");
1302 agp_gen5_adjust_pgtbl_size(device_t dev, uint32_t sz)
1304 struct agp_i810_softc *sc;
1305 uint32_t pgetbl_ctl, pgetbl_ctl2;
1307 sc = device_get_softc(dev);
1309 /* Disable per-process page table. */
1310 pgetbl_ctl2 = bus_read_4(sc->sc_res[0], AGP_I965_PGTBL_CTL2);
1311 pgetbl_ctl2 &= ~AGP_I810_PGTBL_ENABLED;
1312 bus_write_4(sc->sc_res[0], AGP_I965_PGTBL_CTL2, pgetbl_ctl2);
1314 /* Write the new ggtt size. */
1315 pgetbl_ctl = bus_read_4(sc->sc_res[0], AGP_I810_PGTBL_CTL);
1316 pgetbl_ctl &= ~AGP_I810_PGTBL_SIZE_MASK;
1318 bus_write_4(sc->sc_res[0], AGP_I810_PGTBL_CTL, pgetbl_ctl);
1322 agp_gen5_get_gtt_total_entries(device_t dev)
1324 struct agp_i810_softc *sc;
1327 sc = device_get_softc(dev);
1329 gcc1 = pci_read_config(sc->bdev, AGP_I830_GCC1, 2);
1330 switch (gcc1 & AGP_G4x_GCC1_SIZE_MASK) {
1331 case AGP_G4x_GCC1_SIZE_1M:
1332 case AGP_G4x_GCC1_SIZE_VT_1M:
1333 agp_gen5_adjust_pgtbl_size(dev, AGP_I810_PGTBL_SIZE_1MB);
1335 case AGP_G4x_GCC1_SIZE_VT_1_5M:
1336 agp_gen5_adjust_pgtbl_size(dev, AGP_I810_PGTBL_SIZE_1_5MB);
1338 case AGP_G4x_GCC1_SIZE_2M:
1339 case AGP_G4x_GCC1_SIZE_VT_2M:
1340 agp_gen5_adjust_pgtbl_size(dev, AGP_I810_PGTBL_SIZE_2MB);
1343 device_printf(dev, "Unknown page table size\n");
1347 return (agp_i965_get_gtt_total_entries(dev));
1351 agp_sb_get_gtt_total_entries(device_t dev)
1353 struct agp_i810_softc *sc;
1356 sc = device_get_softc(dev);
1358 gcc1 = pci_read_config(sc->bdev, AGP_SNB_GCC1, 2);
1359 switch (gcc1 & AGP_SNB_GTT_SIZE_MASK) {
1361 case AGP_SNB_GTT_SIZE_0M:
1362 kprintf("Bad GTT size mask: 0x%04x\n", gcc1);
1364 case AGP_SNB_GTT_SIZE_1M:
1365 sc->gtt_total_entries = 1024 * 1024 / 4;
1367 case AGP_SNB_GTT_SIZE_2M:
1368 sc->gtt_total_entries = 2 * 1024 * 1024 / 4;
1375 agp_i810_install_gatt(device_t dev)
1377 struct agp_i810_softc *sc;
1379 sc = device_get_softc(dev);
1381 /* Some i810s have on-chip memory called dcache. */
1382 if ((bus_read_1(sc->sc_res[0], AGP_I810_DRT) & AGP_I810_DRT_POPULATED)
1384 sc->dcache_size = 4 * 1024 * 1024;
1386 sc->dcache_size = 0;
1388 /* According to the specs the gatt on the i810 must be 64k. */
1389 sc->gatt->ag_virtual = contigmalloc(64 * 1024, M_AGP, 0, 0, ~0,
1391 if (sc->gatt->ag_virtual == NULL) {
1393 device_printf(dev, "contiguous allocation failed\n");
1397 bzero(sc->gatt->ag_virtual, sc->gatt->ag_entries * sizeof(u_int32_t));
1398 sc->gatt->ag_physical = vtophys((vm_offset_t)sc->gatt->ag_virtual);
1400 /* Install the GATT. */
1401 bus_write_4(sc->sc_res[0], AGP_I810_PGTBL_CTL,
1402 sc->gatt->ag_physical | 1);
1407 agp_i830_install_gatt(device_t dev)
1409 struct agp_i810_softc *sc;
1412 sc = device_get_softc(dev);
1415 * The i830 automatically initializes the 128k gatt on boot.
1416 * GATT address is already in there, make sure it's enabled.
1418 pgtblctl = bus_read_4(sc->sc_res[0], AGP_I810_PGTBL_CTL);
1420 bus_write_4(sc->sc_res[0], AGP_I810_PGTBL_CTL, pgtblctl);
1422 sc->gatt->ag_physical = pgtblctl & ~1;
1427 agp_i810_attach(device_t dev)
1429 struct agp_i810_softc *sc;
1432 sc = device_get_softc(dev);
1433 sc->bdev = agp_i810_find_bridge(dev);
1434 if (sc->bdev == NULL)
1437 sc->match = agp_i810_match(dev);
1439 agp_set_aperture_resource(dev, sc->match->driver->gen <= 2 ?
1440 AGP_APBASE : AGP_I915_GMADR);
1441 error = agp_generic_attach(dev);
1445 if (ptoa((vm_paddr_t)Maxmem) >
1446 (1ULL << sc->match->driver->busdma_addr_mask_sz) - 1) {
1447 device_printf(dev, "agp_i810 does not support physical "
1448 "memory above %ju.\n", (uintmax_t)(1ULL <<
1449 sc->match->driver->busdma_addr_mask_sz) - 1);
1453 if (bus_alloc_resources(dev, sc->match->driver->res_spec, sc->sc_res)) {
1454 agp_generic_detach(dev);
1458 sc->initial_aperture = AGP_GET_APERTURE(dev);
1459 sc->gatt = kmalloc(sizeof(struct agp_gatt), M_AGP, M_WAITOK);
1460 sc->gatt->ag_entries = AGP_GET_APERTURE(dev) >> AGP_PAGE_SHIFT;
1462 if ((error = sc->match->driver->get_stolen_size(dev)) != 0 ||
1463 (error = sc->match->driver->install_gatt(dev)) != 0 ||
1464 (error = sc->match->driver->get_gtt_mappable_entries(dev)) != 0 ||
1465 (error = sc->match->driver->get_gtt_total_entries(dev)) != 0 ||
1466 (error = sc->match->driver->chipset_flush_setup(dev)) != 0) {
1467 bus_release_resources(dev, sc->match->driver->res_spec,
1469 kfree(sc->gatt, M_AGP);
1470 agp_generic_detach(dev);
1475 device_printf(dev, "aperture size is %dM",
1476 sc->initial_aperture / 1024 / 1024);
1478 kprintf(", detected %dk stolen memory\n", sc->stolen * 4);
1482 sc->match->driver->dump_regs(dev);
1483 device_printf(dev, "Mappable GTT entries: %d\n",
1484 sc->gtt_mappable_entries);
1485 device_printf(dev, "Total GTT entries: %d\n",
1486 sc->gtt_total_entries);
1492 agp_i810_deinstall_gatt(device_t dev)
1494 struct agp_i810_softc *sc;
1496 sc = device_get_softc(dev);
1497 bus_write_4(sc->sc_res[0], AGP_I810_PGTBL_CTL, 0);
1498 contigfree(sc->gatt->ag_virtual, 64 * 1024, M_AGP);
1502 agp_i830_deinstall_gatt(device_t dev)
1504 struct agp_i810_softc *sc;
1505 unsigned int pgtblctl;
1507 sc = device_get_softc(dev);
1508 pgtblctl = bus_read_4(sc->sc_res[0], AGP_I810_PGTBL_CTL);
1510 bus_write_4(sc->sc_res[0], AGP_I810_PGTBL_CTL, pgtblctl);
1514 agp_i810_detach(device_t dev)
1516 struct agp_i810_softc *sc;
1518 sc = device_get_softc(dev);
1521 /* Clear the GATT base. */
1522 sc->match->driver->deinstall_gatt(dev);
1524 sc->match->driver->chipset_flush_teardown(dev);
1526 /* Put the aperture back the way it started. */
1527 AGP_SET_APERTURE(dev, sc->initial_aperture);
1529 kfree(sc->gatt, M_AGP);
1530 bus_release_resources(dev, sc->match->driver->res_spec, sc->sc_res);
1537 agp_i810_resume(device_t dev)
1539 struct agp_i810_softc *sc;
1540 sc = device_get_softc(dev);
1542 AGP_SET_APERTURE(dev, sc->initial_aperture);
1544 /* Install the GATT. */
1545 bus_write_4(sc->sc_res[0], AGP_I810_PGTBL_CTL,
1546 sc->gatt->ag_physical | 1);
1548 return (bus_generic_resume(dev));
1552 * Sets the PCI resource size of the aperture on i830-class and below chipsets,
1553 * while returning failure on later chipsets when an actual change is
1556 * This whole function is likely bogus, as the kernel would probably need to
1557 * reconfigure the placement of the AGP aperture if a larger size is requested,
1558 * which doesn't happen currently.
1561 agp_i810_set_aperture(device_t dev, u_int32_t aperture)
1563 struct agp_i810_softc *sc;
1566 sc = device_get_softc(dev);
1568 * Double check for sanity.
1570 if (aperture != 32 * 1024 * 1024 && aperture != 64 * 1024 * 1024) {
1571 device_printf(dev, "bad aperture size %d\n", aperture);
1575 miscc = pci_read_config(sc->bdev, AGP_I810_MISCC, 2);
1576 miscc &= ~AGP_I810_MISCC_WINSIZE;
1577 if (aperture == 32 * 1024 * 1024)
1578 miscc |= AGP_I810_MISCC_WINSIZE_32;
1580 miscc |= AGP_I810_MISCC_WINSIZE_64;
1582 pci_write_config(sc->bdev, AGP_I810_MISCC, miscc, 2);
1587 agp_i830_set_aperture(device_t dev, u_int32_t aperture)
1589 struct agp_i810_softc *sc;
1592 sc = device_get_softc(dev);
1594 if (aperture != 64 * 1024 * 1024 &&
1595 aperture != 128 * 1024 * 1024) {
1596 device_printf(dev, "bad aperture size %d\n", aperture);
1599 gcc1 = pci_read_config(sc->bdev, AGP_I830_GCC1, 2);
1600 gcc1 &= ~AGP_I830_GCC1_GMASIZE;
1601 if (aperture == 64 * 1024 * 1024)
1602 gcc1 |= AGP_I830_GCC1_GMASIZE_64;
1604 gcc1 |= AGP_I830_GCC1_GMASIZE_128;
1606 pci_write_config(sc->bdev, AGP_I830_GCC1, gcc1, 2);
1611 agp_i915_set_aperture(device_t dev, u_int32_t aperture)
1614 return (agp_generic_set_aperture(dev, aperture));
1618 agp_i810_method_set_aperture(device_t dev, u_int32_t aperture)
1620 struct agp_i810_softc *sc;
1622 sc = device_get_softc(dev);
1623 return (sc->match->driver->set_aperture(dev, aperture));
1627 * Writes a GTT entry mapping the page at the given offset from the
1628 * beginning of the aperture to the given physical address. Setup the
1629 * caching mode according to flags.
1631 * For gen 1, 2 and 3, GTT start is located at AGP_I810_GTT offset
1632 * from corresponding BAR start. For gen 4, offset is 512KB +
1633 * AGP_I810_GTT, for gen 5 and 6 it is 2MB + AGP_I810_GTT.
1635 * Also, the bits of the physical page address above 4GB needs to be
1636 * placed into bits 40-32 of PTE.
1639 agp_i810_install_gtt_pte(device_t dev, u_int index, vm_offset_t physical,
1644 pte = (u_int32_t)physical | I810_PTE_VALID;
1645 if (flags == AGP_DCACHE_MEMORY)
1646 pte |= I810_PTE_LOCAL;
1647 else if (flags == AGP_USER_CACHED_MEMORY)
1648 pte |= I830_PTE_SYSTEM_CACHED;
1649 agp_i810_write_gtt(dev, index, pte);
1653 agp_i810_write_gtt(device_t dev, u_int index, uint32_t pte)
1655 struct agp_i810_softc *sc;
1657 sc = device_get_softc(dev);
1658 bus_write_4(sc->sc_res[0], AGP_I810_GTT + index * 4, pte);
1662 agp_i830_install_gtt_pte(device_t dev, u_int index, vm_offset_t physical,
1667 pte = (u_int32_t)physical | I810_PTE_VALID;
1668 if (flags == AGP_USER_CACHED_MEMORY)
1669 pte |= I830_PTE_SYSTEM_CACHED;
1670 agp_i810_write_gtt(dev, index, pte);
1674 agp_i915_install_gtt_pte(device_t dev, u_int index, vm_offset_t physical,
1679 pte = (u_int32_t)physical | I810_PTE_VALID;
1680 if (flags == AGP_USER_CACHED_MEMORY)
1681 pte |= I830_PTE_SYSTEM_CACHED;
1682 pte |= (physical & 0x0000000f00000000ull) >> 28;
1683 agp_i915_write_gtt(dev, index, pte);
1687 agp_i915_write_gtt(device_t dev, u_int index, uint32_t pte)
1689 struct agp_i810_softc *sc;
1691 sc = device_get_softc(dev);
1692 bus_write_4(sc->sc_res[1], index * 4, pte);
1696 agp_i965_install_gtt_pte(device_t dev, u_int index, vm_offset_t physical,
1701 pte = (u_int32_t)physical | I810_PTE_VALID;
1702 if (flags == AGP_USER_CACHED_MEMORY)
1703 pte |= I830_PTE_SYSTEM_CACHED;
1704 pte |= (physical & 0x0000000f00000000ull) >> 28;
1705 agp_i965_write_gtt(dev, index, pte);
1709 agp_i965_write_gtt(device_t dev, u_int index, uint32_t pte)
1711 struct agp_i810_softc *sc;
1713 sc = device_get_softc(dev);
1714 bus_write_4(sc->sc_res[0], index * 4 + (512 * 1024), pte);
1718 agp_g4x_install_gtt_pte(device_t dev, u_int index, vm_offset_t physical,
1723 pte = (u_int32_t)physical | I810_PTE_VALID;
1724 if (flags == AGP_USER_CACHED_MEMORY)
1725 pte |= I830_PTE_SYSTEM_CACHED;
1726 pte |= (physical & 0x0000000f00000000ull) >> 28;
1727 agp_g4x_write_gtt(dev, index, pte);
1731 agp_g4x_write_gtt(device_t dev, u_int index, uint32_t pte)
1733 struct agp_i810_softc *sc;
1735 sc = device_get_softc(dev);
1736 bus_write_4(sc->sc_res[0], index * 4 + (2 * 1024 * 1024), pte);
1740 agp_sb_install_gtt_pte(device_t dev, u_int index, vm_offset_t physical,
1743 int type_mask, gfdt;
1746 pte = (u_int32_t)physical | I810_PTE_VALID;
1747 type_mask = flags & ~AGP_USER_CACHED_MEMORY_GFDT;
1748 gfdt = (flags & AGP_USER_CACHED_MEMORY_GFDT) != 0 ? GEN6_PTE_GFDT : 0;
1750 if (type_mask == AGP_USER_MEMORY)
1751 pte |= GEN6_PTE_UNCACHED;
1752 else if (type_mask == AGP_USER_CACHED_MEMORY_LLC_MLC)
1753 pte |= GEN6_PTE_LLC_MLC | gfdt;
1755 pte |= GEN6_PTE_LLC | gfdt;
1757 pte |= (physical & 0x000000ff00000000ull) >> 28;
1758 agp_sb_write_gtt(dev, index, pte);
1762 agp_sb_write_gtt(device_t dev, u_int index, uint32_t pte)
1764 struct agp_i810_softc *sc;
1766 sc = device_get_softc(dev);
1767 bus_write_4(sc->sc_res[0], index * 4 + (2 * 1024 * 1024), pte);
1771 agp_i810_bind_page(device_t dev, vm_offset_t offset, vm_offset_t physical)
1773 struct agp_i810_softc *sc = device_get_softc(dev);
1776 if (offset >= (sc->gatt->ag_entries << AGP_PAGE_SHIFT)) {
1777 device_printf(dev, "failed: offset is 0x%08jx, "
1778 "shift is %d, entries is %d\n", (intmax_t)offset,
1779 AGP_PAGE_SHIFT, sc->gatt->ag_entries);
1782 index = offset >> AGP_PAGE_SHIFT;
1783 if (sc->stolen != 0 && index < sc->stolen) {
1784 device_printf(dev, "trying to bind into stolen memory\n");
1787 sc->match->driver->install_gtt_pte(dev, index, physical, 0);
1792 agp_i810_unbind_page(device_t dev, vm_offset_t offset)
1794 struct agp_i810_softc *sc;
1797 sc = device_get_softc(dev);
1798 if (offset >= (sc->gatt->ag_entries << AGP_PAGE_SHIFT))
1800 index = offset >> AGP_PAGE_SHIFT;
1801 if (sc->stolen != 0 && index < sc->stolen) {
1802 device_printf(dev, "trying to unbind from stolen memory\n");
1805 sc->match->driver->install_gtt_pte(dev, index, 0, 0);
1810 agp_i810_read_gtt_pte(device_t dev, u_int index)
1812 struct agp_i810_softc *sc;
1815 sc = device_get_softc(dev);
1816 pte = bus_read_4(sc->sc_res[0], AGP_I810_GTT + index * 4);
1821 agp_i915_read_gtt_pte(device_t dev, u_int index)
1823 struct agp_i810_softc *sc;
1826 sc = device_get_softc(dev);
1827 pte = bus_read_4(sc->sc_res[1], index * 4);
1832 agp_i965_read_gtt_pte(device_t dev, u_int index)
1834 struct agp_i810_softc *sc;
1837 sc = device_get_softc(dev);
1838 pte = bus_read_4(sc->sc_res[0], index * 4 + (512 * 1024));
1843 agp_g4x_read_gtt_pte(device_t dev, u_int index)
1845 struct agp_i810_softc *sc;
1848 sc = device_get_softc(dev);
1849 pte = bus_read_4(sc->sc_res[0], index * 4 + (2 * 1024 * 1024));
1854 agp_i810_read_gtt_pte_paddr(device_t dev, u_int index)
1856 struct agp_i810_softc *sc;
1860 sc = device_get_softc(dev);
1861 pte = sc->match->driver->read_gtt_pte(dev, index);
1862 res = pte & ~PAGE_MASK;
1867 agp_i915_read_gtt_pte_paddr(device_t dev, u_int index)
1869 struct agp_i810_softc *sc;
1873 sc = device_get_softc(dev);
1874 pte = sc->match->driver->read_gtt_pte(dev, index);
1875 res = (pte & ~PAGE_MASK) | ((pte & 0xf0) << 28);
1880 agp_sb_read_gtt_pte_paddr(device_t dev, u_int index)
1882 struct agp_i810_softc *sc;
1886 sc = device_get_softc(dev);
1887 pte = sc->match->driver->read_gtt_pte(dev, index);
1888 res = (pte & ~PAGE_MASK) | ((pte & 0xff0) << 28);
1893 * Writing via memory mapped registers already flushes all TLBs.
1896 agp_i810_flush_tlb(device_t dev)
1901 agp_i810_enable(device_t dev, u_int32_t mode)
1907 static struct agp_memory *
1908 agp_i810_alloc_memory(device_t dev, int type, vm_size_t size)
1910 struct agp_i810_softc *sc;
1911 struct agp_memory *mem;
1914 sc = device_get_softc(dev);
1916 if ((size & (AGP_PAGE_SIZE - 1)) != 0 ||
1917 sc->agp.as_allocated + size > sc->agp.as_maxmem)
1922 * Mapping local DRAM into GATT.
1924 if (sc->match->driver->chiptype != CHIP_I810)
1926 if (size != sc->dcache_size)
1928 } else if (type == 2) {
1930 * Type 2 is the contiguous physical memory type, that hands
1931 * back a physical address. This is used for cursors on i810.
1932 * Hand back as many single pages with physical as the user
1933 * wants, but only allow one larger allocation (ARGB cursor)
1936 if (size != AGP_PAGE_SIZE) {
1937 if (sc->argb_cursor != NULL)
1940 /* Allocate memory for ARGB cursor, if we can. */
1941 sc->argb_cursor = contigmalloc(size, M_AGP,
1942 0, 0, ~0, PAGE_SIZE, 0);
1943 if (sc->argb_cursor == NULL)
1948 mem = kmalloc(sizeof *mem, M_AGP, M_INTWAIT);
1949 mem->am_id = sc->agp.as_nextid++;
1950 mem->am_size = size;
1951 mem->am_type = type;
1952 if (type != 1 && (type != 2 || size == AGP_PAGE_SIZE))
1953 mem->am_obj = vm_object_allocate(OBJT_DEFAULT,
1954 atop(round_page(size)));
1959 if (size == AGP_PAGE_SIZE) {
1961 * Allocate and wire down the page now so that we can
1962 * get its physical address.
1964 VM_OBJECT_LOCK(mem->am_obj);
1965 m = vm_page_grab(mem->am_obj, 0, VM_ALLOC_NORMAL |
1969 VM_OBJECT_UNLOCK(mem->am_obj);
1970 mem->am_physical = VM_PAGE_TO_PHYS(m);
1973 /* Our allocation is already nicely wired down for us.
1974 * Just grab the physical address.
1976 mem->am_physical = vtophys(sc->argb_cursor);
1979 mem->am_physical = 0;
1982 mem->am_is_bound = 0;
1983 TAILQ_INSERT_TAIL(&sc->agp.as_memory, mem, am_link);
1984 sc->agp.as_allocated += size;
1990 agp_i810_free_memory(device_t dev, struct agp_memory *mem)
1992 struct agp_i810_softc *sc;
1994 if (mem->am_is_bound)
1997 sc = device_get_softc(dev);
1999 if (mem->am_type == 2) {
2000 if (mem->am_size == AGP_PAGE_SIZE) {
2002 * Unwire the page which we wired in alloc_memory.
2006 vm_object_hold(mem->am_obj);
2007 m = vm_page_lookup_busy_wait(mem->am_obj, 0,
2009 vm_object_drop(mem->am_obj);
2010 vm_page_unwire(m, 0);
2013 contigfree(sc->argb_cursor, mem->am_size, M_AGP);
2014 sc->argb_cursor = NULL;
2018 sc->agp.as_allocated -= mem->am_size;
2019 TAILQ_REMOVE(&sc->agp.as_memory, mem, am_link);
2021 vm_object_deallocate(mem->am_obj);
2027 agp_i810_bind_memory(device_t dev, struct agp_memory *mem, vm_offset_t offset)
2029 struct agp_i810_softc *sc;
2032 /* Do some sanity checks first. */
2033 if ((offset & (AGP_PAGE_SIZE - 1)) != 0 ||
2034 offset + mem->am_size > AGP_GET_APERTURE(dev)) {
2035 device_printf(dev, "binding memory at bad offset %#x\n",
2040 sc = device_get_softc(dev);
2041 if (mem->am_type == 2 && mem->am_size != AGP_PAGE_SIZE) {
2042 lockmgr(&sc->agp.as_lock, LK_EXCLUSIVE);
2043 if (mem->am_is_bound) {
2044 lockmgr(&sc->agp.as_lock, LK_RELEASE);
2047 /* The memory's already wired down, just stick it in the GTT. */
2048 for (i = 0; i < mem->am_size; i += AGP_PAGE_SIZE) {
2049 sc->match->driver->install_gtt_pte(dev, (offset + i) >>
2050 AGP_PAGE_SHIFT, mem->am_physical + i, 0);
2053 mem->am_offset = offset;
2054 mem->am_is_bound = 1;
2055 lockmgr(&sc->agp.as_lock, LK_RELEASE);
2059 if (mem->am_type != 1)
2060 return (agp_generic_bind_memory(dev, mem, offset));
2063 * Mapping local DRAM into GATT.
2065 if (sc->match->driver->chiptype != CHIP_I810)
2067 for (i = 0; i < mem->am_size; i += AGP_PAGE_SIZE)
2068 bus_write_4(sc->sc_res[0],
2069 AGP_I810_GTT + (i >> AGP_PAGE_SHIFT) * 4, i | 3);
2075 agp_i810_unbind_memory(device_t dev, struct agp_memory *mem)
2077 struct agp_i810_softc *sc;
2080 sc = device_get_softc(dev);
2082 if (mem->am_type == 2 && mem->am_size != AGP_PAGE_SIZE) {
2083 lockmgr(&sc->agp.as_lock, LK_EXCLUSIVE);
2084 if (!mem->am_is_bound) {
2085 lockmgr(&sc->agp.as_lock, LK_RELEASE);
2089 for (i = 0; i < mem->am_size; i += AGP_PAGE_SIZE) {
2090 sc->match->driver->install_gtt_pte(dev,
2091 (mem->am_offset + i) >> AGP_PAGE_SHIFT, 0, 0);
2094 mem->am_is_bound = 0;
2095 lockmgr(&sc->agp.as_lock, LK_RELEASE);
2099 if (mem->am_type != 1)
2100 return (agp_generic_unbind_memory(dev, mem));
2102 if (sc->match->driver->chiptype != CHIP_I810)
2104 for (i = 0; i < mem->am_size; i += AGP_PAGE_SIZE) {
2105 sc->match->driver->install_gtt_pte(dev, i >> AGP_PAGE_SHIFT,
2111 static device_method_t agp_i810_methods[] = {
2112 /* Device interface */
2113 DEVMETHOD(device_identify, agp_i810_identify),
2114 DEVMETHOD(device_probe, agp_i810_probe),
2115 DEVMETHOD(device_attach, agp_i810_attach),
2116 DEVMETHOD(device_detach, agp_i810_detach),
2117 DEVMETHOD(device_suspend, bus_generic_suspend),
2118 DEVMETHOD(device_resume, agp_i810_resume),
2121 DEVMETHOD(agp_get_aperture, agp_generic_get_aperture),
2122 DEVMETHOD(agp_set_aperture, agp_i810_method_set_aperture),
2123 DEVMETHOD(agp_bind_page, agp_i810_bind_page),
2124 DEVMETHOD(agp_unbind_page, agp_i810_unbind_page),
2125 DEVMETHOD(agp_flush_tlb, agp_i810_flush_tlb),
2126 DEVMETHOD(agp_enable, agp_i810_enable),
2127 DEVMETHOD(agp_alloc_memory, agp_i810_alloc_memory),
2128 DEVMETHOD(agp_free_memory, agp_i810_free_memory),
2129 DEVMETHOD(agp_bind_memory, agp_i810_bind_memory),
2130 DEVMETHOD(agp_unbind_memory, agp_i810_unbind_memory),
2131 DEVMETHOD(agp_chipset_flush, agp_intel_gtt_chipset_flush),
2136 static driver_t agp_i810_driver = {
2139 sizeof(struct agp_i810_softc),
2142 static devclass_t agp_devclass;
2144 DRIVER_MODULE(agp_i810, vgapci, agp_i810_driver, agp_devclass, NULL, NULL);
2145 MODULE_DEPEND(agp_i810, agp, 1, 1, 1);
2146 MODULE_DEPEND(agp_i810, pci, 1, 1, 1);
2148 extern vm_page_t bogus_page;
2151 agp_intel_gtt_clear_range(device_t dev, u_int first_entry, u_int num_entries)
2153 struct agp_i810_softc *sc;
2156 sc = device_get_softc(dev);
2157 for (i = 0; i < num_entries; i++)
2158 sc->match->driver->install_gtt_pte(dev, first_entry + i,
2159 VM_PAGE_TO_PHYS(bogus_page), 0);
2160 sc->match->driver->read_gtt_pte(dev, first_entry + num_entries - 1);
2164 agp_intel_gtt_insert_pages(device_t dev, u_int first_entry, u_int num_entries,
2165 vm_page_t *pages, u_int flags)
2167 struct agp_i810_softc *sc;
2170 sc = device_get_softc(dev);
2171 for (i = 0; i < num_entries; i++) {
2172 KKASSERT(pages[i]->valid == VM_PAGE_BITS_ALL);
2173 KKASSERT(pages[i]->wire_count > 0);
2174 sc->match->driver->install_gtt_pte(dev, first_entry + i,
2175 VM_PAGE_TO_PHYS(pages[i]), flags);
2177 sc->match->driver->read_gtt_pte(dev, first_entry + num_entries - 1);
2181 agp_intel_gtt_get(device_t dev)
2183 struct agp_i810_softc *sc;
2184 struct intel_gtt res;
2186 sc = device_get_softc(dev);
2187 res.stolen_size = sc->stolen_size;
2188 res.gtt_total_entries = sc->gtt_total_entries;
2189 res.gtt_mappable_entries = sc->gtt_mappable_entries;
2190 res.do_idle_maps = 0;
2191 res.scratch_page_dma = VM_PAGE_TO_PHYS(bogus_page);
2196 agp_i810_chipset_flush_setup(device_t dev)
2203 agp_i810_chipset_flush_teardown(device_t dev)
2206 /* Nothing to do. */
2210 agp_i810_chipset_flush(device_t dev)
2213 /* Nothing to do. */
2217 agp_i830_chipset_flush(device_t dev)
2219 struct agp_i810_softc *sc;
2223 sc = device_get_softc(dev);
2224 cpu_wbinvd_on_all_cpus();
2225 hic = bus_read_4(sc->sc_res[0], AGP_I830_HIC);
2226 bus_write_4(sc->sc_res[0], AGP_I830_HIC, hic | (1 << 31));
2227 for (i = 0; i < 20000 /* 1 sec */; i++) {
2228 hic = bus_read_4(sc->sc_res[0], AGP_I830_HIC);
2229 if ((hic & (1 << 31)) != 0)
2236 agp_i915_chipset_flush_alloc_page(device_t dev, uint64_t start, uint64_t end)
2238 struct agp_i810_softc *sc;
2241 sc = device_get_softc(dev);
2242 vga = device_get_parent(dev);
2243 sc->sc_flush_page_rid = 100;
2244 sc->sc_flush_page_res = BUS_ALLOC_RESOURCE(device_get_parent(vga), dev,
2245 SYS_RES_MEMORY, &sc->sc_flush_page_rid, start, end, PAGE_SIZE,
2247 if (sc->sc_flush_page_res == NULL) {
2248 device_printf(dev, "Failed to allocate flush page at 0x%jx\n",
2252 sc->sc_flush_page_vaddr = rman_get_virtual(sc->sc_flush_page_res);
2254 device_printf(dev, "Allocated flush page phys 0x%jx virt %p\n",
2255 (uintmax_t)rman_get_start(sc->sc_flush_page_res),
2256 sc->sc_flush_page_vaddr);
2262 agp_i915_chipset_flush_free_page(device_t dev)
2264 struct agp_i810_softc *sc;
2267 sc = device_get_softc(dev);
2268 vga = device_get_parent(dev);
2269 if (sc->sc_flush_page_res == NULL)
2271 BUS_DEACTIVATE_RESOURCE(device_get_parent(vga), dev, SYS_RES_MEMORY,
2272 sc->sc_flush_page_rid, sc->sc_flush_page_res);
2273 BUS_RELEASE_RESOURCE(device_get_parent(vga), dev, SYS_RES_MEMORY,
2274 sc->sc_flush_page_rid, sc->sc_flush_page_res);
2278 agp_i915_chipset_flush_setup(device_t dev)
2280 struct agp_i810_softc *sc;
2284 sc = device_get_softc(dev);
2285 temp = pci_read_config(sc->bdev, AGP_I915_IFPADDR, 4);
2286 if ((temp & 1) != 0) {
2290 "Found already configured flush page at 0x%jx\n",
2292 sc->sc_bios_allocated_flush_page = 1;
2294 * In the case BIOS initialized the flush pointer (?)
2295 * register, expect that BIOS also set up the resource
2298 error = agp_i915_chipset_flush_alloc_page(dev, temp,
2299 temp + PAGE_SIZE - 1);
2303 sc->sc_bios_allocated_flush_page = 0;
2304 error = agp_i915_chipset_flush_alloc_page(dev, 0, 0xffffffff);
2307 temp = rman_get_start(sc->sc_flush_page_res);
2308 pci_write_config(sc->bdev, AGP_I915_IFPADDR, temp | 1, 4);
2314 agp_i915_chipset_flush_teardown(device_t dev)
2316 struct agp_i810_softc *sc;
2319 sc = device_get_softc(dev);
2320 if (sc->sc_flush_page_res == NULL)
2322 if (!sc->sc_bios_allocated_flush_page) {
2323 temp = pci_read_config(sc->bdev, AGP_I915_IFPADDR, 4);
2325 pci_write_config(sc->bdev, AGP_I915_IFPADDR, temp, 4);
2327 agp_i915_chipset_flush_free_page(dev);
2331 agp_i965_chipset_flush_setup(device_t dev)
2333 struct agp_i810_softc *sc;
2335 uint32_t temp_hi, temp_lo;
2338 sc = device_get_softc(dev);
2340 temp_hi = pci_read_config(sc->bdev, AGP_I965_IFPADDR + 4, 4);
2341 temp_lo = pci_read_config(sc->bdev, AGP_I965_IFPADDR, 4);
2343 if ((temp_lo & 1) != 0) {
2344 temp = ((uint64_t)temp_hi << 32) | (temp_lo & ~1);
2347 "Found already configured flush page at 0x%jx\n",
2349 sc->sc_bios_allocated_flush_page = 1;
2351 * In the case BIOS initialized the flush pointer (?)
2352 * register, expect that BIOS also set up the resource
2355 error = agp_i915_chipset_flush_alloc_page(dev, temp,
2356 temp + PAGE_SIZE - 1);
2360 sc->sc_bios_allocated_flush_page = 0;
2361 error = agp_i915_chipset_flush_alloc_page(dev, 0, ~0);
2364 temp = rman_get_start(sc->sc_flush_page_res);
2365 pci_write_config(sc->bdev, AGP_I965_IFPADDR + 4,
2366 (temp >> 32) & UINT32_MAX, 4);
2367 pci_write_config(sc->bdev, AGP_I965_IFPADDR,
2368 (temp & UINT32_MAX) | 1, 4);
2374 agp_i965_chipset_flush_teardown(device_t dev)
2376 struct agp_i810_softc *sc;
2379 sc = device_get_softc(dev);
2380 if (sc->sc_flush_page_res == NULL)
2382 if (!sc->sc_bios_allocated_flush_page) {
2383 temp_lo = pci_read_config(sc->bdev, AGP_I965_IFPADDR, 4);
2385 pci_write_config(sc->bdev, AGP_I965_IFPADDR, temp_lo, 4);
2387 agp_i915_chipset_flush_free_page(dev);
2391 agp_i915_chipset_flush(device_t dev)
2393 struct agp_i810_softc *sc;
2395 sc = device_get_softc(dev);
2396 *(uint32_t *)sc->sc_flush_page_vaddr = 1;
2400 agp_intel_gtt_chipset_flush(device_t dev)
2402 struct agp_i810_softc *sc;
2404 sc = device_get_softc(dev);
2405 sc->match->driver->chipset_flush(dev);
2410 agp_intel_gtt_unmap_memory(device_t dev, struct sglist *sg_list)
2415 agp_intel_gtt_map_memory(device_t dev, vm_page_t *pages, u_int num_entries,
2416 struct sglist **sg_list)
2418 struct agp_i810_softc *sc;
2426 if (*sg_list != NULL)
2428 sc = device_get_softc(dev);
2429 sg = sglist_alloc(num_entries, M_WAITOK /* XXXKIB */);
2430 for (i = 0; i < num_entries; i++) {
2431 sg->sg_segs[i].ss_paddr = VM_PAGE_TO_PHYS(pages[i]);
2432 sg->sg_segs[i].ss_len = PAGE_SIZE;
2436 error = bus_dma_tag_create(bus_get_dma_tag(dev),
2437 1 /* alignment */, 0 /* boundary */,
2438 1ULL << sc->match->busdma_addr_mask_sz /* lowaddr */,
2439 BUS_SPACE_MAXADDR /* highaddr */,
2440 NULL /* filtfunc */, NULL /* filtfuncarg */,
2441 BUS_SPACE_MAXADDR /* maxsize */,
2442 BUS_SPACE_UNRESTRICTED /* nsegments */,
2443 BUS_SPACE_MAXADDR /* maxsegsz */,
2444 0 /* flags */, NULL /* lockfunc */, NULL /* lockfuncarg */,
2457 agp_intel_gtt_insert_sg_entries(device_t dev, struct sglist *sg_list,
2458 u_int first_entry, u_int flags)
2460 struct agp_i810_softc *sc;
2465 sc = device_get_softc(dev);
2466 for (i = j = 0; j < sg_list->sg_nseg; j++) {
2467 spaddr = sg_list->sg_segs[i].ss_paddr;
2468 slen = sg_list->sg_segs[i].ss_len;
2469 for (; slen > 0; i++) {
2470 sc->match->driver->install_gtt_pte(dev, first_entry + i,
2472 spaddr += AGP_PAGE_SIZE;
2473 slen -= AGP_PAGE_SIZE;
2476 sc->match->driver->read_gtt_pte(dev, first_entry + i - 1);
2480 intel_gtt_clear_range(u_int first_entry, u_int num_entries)
2483 agp_intel_gtt_clear_range(intel_agp, first_entry, num_entries);
2487 intel_gtt_insert_pages(u_int first_entry, u_int num_entries, vm_page_t *pages,
2491 agp_intel_gtt_insert_pages(intel_agp, first_entry, num_entries,
2499 return (agp_intel_gtt_get(intel_agp));
2503 intel_gtt_chipset_flush(void)
2506 return (agp_intel_gtt_chipset_flush(intel_agp));
2510 intel_gtt_unmap_memory(struct sglist *sg_list)
2513 agp_intel_gtt_unmap_memory(intel_agp, sg_list);
2517 intel_gtt_map_memory(vm_page_t *pages, u_int num_entries,
2518 struct sglist **sg_list)
2521 return (agp_intel_gtt_map_memory(intel_agp, pages, num_entries,
2526 intel_gtt_insert_sg_entries(struct sglist *sg_list, u_int first_entry,
2530 agp_intel_gtt_insert_sg_entries(intel_agp, sg_list, first_entry, flags);
2534 intel_gtt_get_bridge_device(void)
2536 struct agp_i810_softc *sc;
2538 sc = device_get_softc(intel_agp);
2543 intel_gtt_read_pte_paddr(u_int entry)
2545 struct agp_i810_softc *sc;
2547 sc = device_get_softc(intel_agp);
2548 return (sc->match->driver->read_gtt_pte_paddr(intel_agp, entry));
2552 intel_gtt_read_pte(u_int entry)
2554 struct agp_i810_softc *sc;
2556 sc = device_get_softc(intel_agp);
2557 return (sc->match->driver->read_gtt_pte(intel_agp, entry));
2561 intel_gtt_write(u_int entry, uint32_t val)
2563 struct agp_i810_softc *sc;
2565 sc = device_get_softc(intel_agp);
2566 return (sc->match->driver->write_gtt(intel_agp, entry, val));