sys/dev/agp/agp_i810.c

   1 /*
   2  * Copyright (c) 2000 Doug Rabson
   3  * Copyright (c) 2000 Ruslan Ermilov
   4  * Copyright (c) 2011 The FreeBSD Foundation
   5  * All rights reserved.
   6  *
   7  * Portions of this software were developed by Konstantin Belousov
   8  * under sponsorship from the FreeBSD Foundation.
   9  *
  10  * Redistribution and use in source and binary forms, with or without
  11  * modification, are permitted provided that the following conditions
  12  * are met:
  13  * 1. Redistributions of source code must retain the above copyright
  14  *    notice, this list of conditions and the following disclaimer.
  15  * 2. Redistributions in binary form must reproduce the above copyright
  16  *    notice, this list of conditions and the following disclaimer in the
  17  *    documentation and/or other materials provided with the distribution.
  18  *
  19  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
  20  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  21  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  22  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
  23  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  24  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  25  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  26  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  27  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  28  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  29  * SUCH DAMAGE.
  30  *
  31  * $FreeBSD: src/sys/dev/agp/agp_i810.c,v 1.56 2010/03/12 21:34:23 rnoland Exp $
  32  */
  33
  34 /*
  35  * Fixes for 830/845G support: David Dawes <dawes@xfree86.org>
  36  * 852GM/855GM/865G support added by David Dawes <dawes@xfree86.org>
  37  *
  38  * This is generic Intel GTT handling code, morphed from the AGP
  39  * bridge code.
  40  */
  41
  42 #if 0
  43 #define KTR_AGP_I810    KTR_DEV
  44 #else
  45 #define KTR_AGP_I810    0
  46 #endif
  47
  48 #include <sys/param.h>
  49 #include <sys/systm.h>
  50 #include <sys/malloc.h>
  51 #include <sys/kernel.h>
  52 #include <sys/bus.h>
  53 #include <sys/lock.h>
  54 #include <sys/rman.h>
  55
  56 #include <bus/pci/pcidevs.h>
  57 #include <bus/pci/pcivar.h>
  58 #include <bus/pci/pcireg.h>
  59 #include "agppriv.h"
  60 #include "agpreg.h"
  61 #include <dev/agp/agp_i810.h>
  62
  63 #include <vm/vm.h>
  64 #include <vm/vm_object.h>
  65 #include <vm/vm_page.h>
  66 #include <vm/vm_pageout.h>
  67 #include <vm/pmap.h>
  68
  69 #include <machine/md_var.h>
  70
  71 #define bus_read_1(r, o) \
  72                    bus_space_read_1((r)->r_bustag, (r)->r_bushandle, (o))
  73 #define bus_read_4(r, o) \
  74                    bus_space_read_4((r)->r_bustag, (r)->r_bushandle, (o))
  75 #define bus_write_4(r, o, v) \
  76                     bus_space_write_4((r)->r_bustag, (r)->r_bushandle, (o), (v))
  77
  78 MALLOC_DECLARE(M_AGP);
  79
  80 struct agp_i810_match;
  81
  82 static int agp_i810_check_active(device_t bridge_dev);
  83 static int agp_i830_check_active(device_t bridge_dev);
  84 static int agp_i915_check_active(device_t bridge_dev);
  85 static int agp_sb_check_active(device_t bridge_dev);
  86
  87 static void agp_82852_set_desc(device_t dev,
  88     const struct agp_i810_match *match);
  89 static void agp_i810_set_desc(device_t dev, const struct agp_i810_match *match);
  90
  91 static void agp_i810_dump_regs(device_t dev);
  92 static void agp_i830_dump_regs(device_t dev);
  93 static void agp_i855_dump_regs(device_t dev);
  94 static void agp_i915_dump_regs(device_t dev);
  95 static void agp_i965_dump_regs(device_t dev);
  96 static void agp_sb_dump_regs(device_t dev);
  97
  98 static int agp_i810_get_stolen_size(device_t dev);
  99 static int agp_i830_get_stolen_size(device_t dev);
 100 static int agp_i915_get_stolen_size(device_t dev);
 101 static int agp_sb_get_stolen_size(device_t dev);
 102
 103 static int agp_i810_get_gtt_mappable_entries(device_t dev);
 104 static int agp_i830_get_gtt_mappable_entries(device_t dev);
 105 static int agp_i915_get_gtt_mappable_entries(device_t dev);
 106
 107 static int agp_i810_get_gtt_total_entries(device_t dev);
 108 static int agp_i965_get_gtt_total_entries(device_t dev);
 109 static int agp_gen5_get_gtt_total_entries(device_t dev);
 110 static int agp_sb_get_gtt_total_entries(device_t dev);
 111
 112 static int agp_i810_install_gatt(device_t dev);
 113 static int agp_i830_install_gatt(device_t dev);
 114
 115 static void agp_i810_deinstall_gatt(device_t dev);
 116 static void agp_i830_deinstall_gatt(device_t dev);
 117
 118 static void agp_i810_install_gtt_pte(device_t dev, u_int index,
 119     vm_offset_t physical, int flags);
 120 static void agp_i830_install_gtt_pte(device_t dev, u_int index,
 121     vm_offset_t physical, int flags);
 122 static void agp_i915_install_gtt_pte(device_t dev, u_int index,
 123     vm_offset_t physical, int flags);
 124 static void agp_i965_install_gtt_pte(device_t dev, u_int index,
 125     vm_offset_t physical, int flags);
 126 static void agp_g4x_install_gtt_pte(device_t dev, u_int index,
 127     vm_offset_t physical, int flags);
 128 static void agp_sb_install_gtt_pte(device_t dev, u_int index,
 129     vm_offset_t physical, int flags);
 130
 131 static void agp_i810_write_gtt(device_t dev, u_int index, uint32_t pte);
 132 static void agp_i915_write_gtt(device_t dev, u_int index, uint32_t pte);
 133 static void agp_i965_write_gtt(device_t dev, u_int index, uint32_t pte);
 134 static void agp_g4x_write_gtt(device_t dev, u_int index, uint32_t pte);
 135 static void agp_sb_write_gtt(device_t dev, u_int index, uint32_t pte);
 136
 137 static u_int32_t agp_i810_read_gtt_pte(device_t dev, u_int index);
 138 static u_int32_t agp_i915_read_gtt_pte(device_t dev, u_int index);
 139 static u_int32_t agp_i965_read_gtt_pte(device_t dev, u_int index);
 140 static u_int32_t agp_g4x_read_gtt_pte(device_t dev, u_int index);
 141
 142 static vm_paddr_t agp_i810_read_gtt_pte_paddr(device_t dev, u_int index);
 143 static vm_paddr_t agp_i915_read_gtt_pte_paddr(device_t dev, u_int index);
 144 static vm_paddr_t agp_sb_read_gtt_pte_paddr(device_t dev, u_int index);
 145
 146 static int agp_i810_set_aperture(device_t dev, u_int32_t aperture);
 147 static int agp_i830_set_aperture(device_t dev, u_int32_t aperture);
 148 static int agp_i915_set_aperture(device_t dev, u_int32_t aperture);
 149
 150 static int agp_i810_chipset_flush_setup(device_t dev);
 151 static int agp_i915_chipset_flush_setup(device_t dev);
 152 static int agp_i965_chipset_flush_setup(device_t dev);
 153
 154 static void agp_i810_chipset_flush_teardown(device_t dev);
 155 static void agp_i915_chipset_flush_teardown(device_t dev);
 156 static void agp_i965_chipset_flush_teardown(device_t dev);
 157
 158 static void agp_i810_chipset_flush(device_t dev);
 159 static void agp_i830_chipset_flush(device_t dev);
 160 static void agp_i915_chipset_flush(device_t dev);
 161
 162 enum {
 163         CHIP_I810,      /* i810/i815 */
 164         CHIP_I830,      /* 830M/845G */
 165         CHIP_I855,      /* 852GM/855GM/865G */
 166         CHIP_I915,      /* 915G/915GM */
 167         CHIP_I965,      /* G965 */
 168         CHIP_G33,       /* G33/Q33/Q35 */
 169         CHIP_IGD,       /* Pineview */
 170         CHIP_G4X,       /* G45/Q45 */
 171         CHIP_SB,        /* SandyBridge */
 172 };
 173
 174 /* The i810 through i855 have the registers at BAR 1, and the GATT gets
 175  * allocated by us.  The i915 has registers in BAR 0 and the GATT is at the
 176  * start of the stolen memory, and should only be accessed by the OS through
 177  * BAR 3.  The G965 has registers and GATT in the same BAR (0) -- first 512KB
 178  * is registers, second 512KB is GATT.
 179  */
 180 static struct resource_spec agp_i810_res_spec[] = {
 181         { SYS_RES_MEMORY, AGP_I810_MMADR, RF_ACTIVE | RF_SHAREABLE },
 182         { -1, 0 }
 183 };
 184
 185 static struct resource_spec agp_i915_res_spec[] = {
 186         { SYS_RES_MEMORY, AGP_I915_MMADR, RF_ACTIVE | RF_SHAREABLE },
 187         { SYS_RES_MEMORY, AGP_I915_GTTADR, RF_ACTIVE | RF_SHAREABLE },
 188         { -1, 0 }
 189 };
 190
 191 static struct resource_spec agp_i965_res_spec[] = {
 192         { SYS_RES_MEMORY, AGP_I965_GTTMMADR, RF_ACTIVE | RF_SHAREABLE },
 193         { -1, 0 }
 194 };
 195
 196 static struct resource_spec agp_g4x_res_spec[] = {
 197         { SYS_RES_MEMORY, AGP_G4X_MMADR, RF_ACTIVE | RF_SHAREABLE },
 198         { SYS_RES_MEMORY, AGP_G4X_GTTADR, RF_ACTIVE | RF_SHAREABLE },
 199         { -1, 0 }
 200 };
 201
 202 struct agp_i810_softc {
 203         struct agp_softc agp;
 204         u_int32_t initial_aperture;     /* aperture size at startup */
 205         struct agp_gatt *gatt;
 206         u_int32_t dcache_size;          /* i810 only */
 207         u_int32_t stolen;               /* number of i830/845 gtt
 208                                            entries for stolen memory */
 209         u_int stolen_size;              /* BIOS-reserved graphics memory */
 210         u_int gtt_total_entries;        /* Total number of gtt ptes */
 211         u_int gtt_mappable_entries;     /* Number of gtt ptes mappable by CPU */
 212         device_t bdev;                  /* bridge device */
 213         void *argb_cursor;              /* contigmalloc area for ARGB cursor */
 214         struct resource *sc_res[2];
 215         const struct agp_i810_match *match;
 216         int sc_flush_page_rid;
 217         struct resource *sc_flush_page_res;
 218         void *sc_flush_page_vaddr;
 219         int sc_bios_allocated_flush_page;
 220 };
 221
 222 static device_t intel_agp;
 223
 224 struct agp_i810_driver {
 225         int chiptype;
 226         int gen;
 227         int busdma_addr_mask_sz;
 228         struct resource_spec *res_spec;
 229         int (*check_active)(device_t);
 230         void (*set_desc)(device_t, const struct agp_i810_match *);
 231         void (*dump_regs)(device_t);
 232         int (*get_stolen_size)(device_t);
 233         int (*get_gtt_total_entries)(device_t);
 234         int (*get_gtt_mappable_entries)(device_t);
 235         int (*install_gatt)(device_t);
 236         void (*deinstall_gatt)(device_t);
 237         void (*write_gtt)(device_t, u_int, uint32_t);
 238         void (*install_gtt_pte)(device_t, u_int, vm_offset_t, int);
 239         u_int32_t (*read_gtt_pte)(device_t, u_int);
 240         vm_paddr_t (*read_gtt_pte_paddr)(device_t , u_int);
 241         int (*set_aperture)(device_t, u_int32_t);
 242         int (*chipset_flush_setup)(device_t);
 243         void (*chipset_flush_teardown)(device_t);
 244         void (*chipset_flush)(device_t);
 245 };
 246
 247 static const struct agp_i810_driver agp_i810_i810_driver = {
 248         .chiptype = CHIP_I810,
 249         .gen = 1,
 250         .busdma_addr_mask_sz = 32,
 251         .res_spec = agp_i810_res_spec,
 252         .check_active = agp_i810_check_active,
 253         .set_desc = agp_i810_set_desc,
 254         .dump_regs = agp_i810_dump_regs,
 255         .get_stolen_size = agp_i810_get_stolen_size,
 256         .get_gtt_mappable_entries = agp_i810_get_gtt_mappable_entries,
 257         .get_gtt_total_entries = agp_i810_get_gtt_total_entries,
 258         .install_gatt = agp_i810_install_gatt,
 259         .deinstall_gatt = agp_i810_deinstall_gatt,
 260         .write_gtt = agp_i810_write_gtt,
 261         .install_gtt_pte = agp_i810_install_gtt_pte,
 262         .read_gtt_pte = agp_i810_read_gtt_pte,
 263         .read_gtt_pte_paddr = agp_i810_read_gtt_pte_paddr,
 264         .set_aperture = agp_i810_set_aperture,
 265         .chipset_flush_setup = agp_i810_chipset_flush_setup,
 266         .chipset_flush_teardown = agp_i810_chipset_flush_teardown,
 267         .chipset_flush = agp_i810_chipset_flush,
 268 };
 269
 270 static const struct agp_i810_driver agp_i810_i815_driver = {
 271         .chiptype = CHIP_I810,
 272         .gen = 2,
 273         .busdma_addr_mask_sz = 32,
 274         .res_spec = agp_i810_res_spec,
 275         .check_active = agp_i810_check_active,
 276         .set_desc = agp_i810_set_desc,
 277         .dump_regs = agp_i810_dump_regs,
 278         .get_stolen_size = agp_i810_get_stolen_size,
 279         .get_gtt_mappable_entries = agp_i830_get_gtt_mappable_entries,
 280         .get_gtt_total_entries = agp_i810_get_gtt_total_entries,
 281         .install_gatt = agp_i810_install_gatt,
 282         .deinstall_gatt = agp_i810_deinstall_gatt,
 283         .write_gtt = agp_i810_write_gtt,
 284         .install_gtt_pte = agp_i810_install_gtt_pte,
 285         .read_gtt_pte = agp_i810_read_gtt_pte,
 286         .read_gtt_pte_paddr = agp_i810_read_gtt_pte_paddr,
 287         .set_aperture = agp_i810_set_aperture,
 288         .chipset_flush_setup = agp_i810_chipset_flush_setup,
 289         .chipset_flush_teardown = agp_i810_chipset_flush_teardown,
 290         .chipset_flush = agp_i830_chipset_flush,
 291 };
 292
 293 static const struct agp_i810_driver agp_i810_i830_driver = {
 294         .chiptype = CHIP_I830,
 295         .gen = 2,
 296         .busdma_addr_mask_sz = 32,
 297         .res_spec = agp_i810_res_spec,
 298         .check_active = agp_i830_check_active,
 299         .set_desc = agp_i810_set_desc,
 300         .dump_regs = agp_i830_dump_regs,
 301         .get_stolen_size = agp_i830_get_stolen_size,
 302         .get_gtt_mappable_entries = agp_i830_get_gtt_mappable_entries,
 303         .get_gtt_total_entries = agp_i810_get_gtt_total_entries,
 304         .install_gatt = agp_i830_install_gatt,
 305         .deinstall_gatt = agp_i830_deinstall_gatt,
 306         .write_gtt = agp_i810_write_gtt,
 307         .install_gtt_pte = agp_i830_install_gtt_pte,
 308         .read_gtt_pte = agp_i810_read_gtt_pte,
 309         .read_gtt_pte_paddr = agp_i810_read_gtt_pte_paddr,
 310         .set_aperture = agp_i830_set_aperture,
 311         .chipset_flush_setup = agp_i810_chipset_flush_setup,
 312         .chipset_flush_teardown = agp_i810_chipset_flush_teardown,
 313         .chipset_flush = agp_i830_chipset_flush,
 314 };
 315
 316 static const struct agp_i810_driver agp_i810_i855_driver = {
 317         .chiptype = CHIP_I855,
 318         .gen = 2,
 319         .busdma_addr_mask_sz = 32,
 320         .res_spec = agp_i810_res_spec,
 321         .check_active = agp_i830_check_active,
 322         .set_desc = agp_82852_set_desc,
 323         .dump_regs = agp_i855_dump_regs,
 324         .get_stolen_size = agp_i915_get_stolen_size,
 325         .get_gtt_mappable_entries = agp_i915_get_gtt_mappable_entries,
 326         .get_gtt_total_entries = agp_i810_get_gtt_total_entries,
 327         .install_gatt = agp_i830_install_gatt,
 328         .deinstall_gatt = agp_i830_deinstall_gatt,
 329         .write_gtt = agp_i810_write_gtt,
 330         .install_gtt_pte = agp_i830_install_gtt_pte,
 331         .read_gtt_pte = agp_i810_read_gtt_pte,
 332         .read_gtt_pte_paddr = agp_i810_read_gtt_pte_paddr,
 333         .set_aperture = agp_i830_set_aperture,
 334         .chipset_flush_setup = agp_i810_chipset_flush_setup,
 335         .chipset_flush_teardown = agp_i810_chipset_flush_teardown,
 336         .chipset_flush = agp_i830_chipset_flush,
 337 };
 338
 339 static const struct agp_i810_driver agp_i810_i865_driver = {
 340         .chiptype = CHIP_I855,
 341         .gen = 2,
 342         .busdma_addr_mask_sz = 32,
 343         .res_spec = agp_i810_res_spec,
 344         .check_active = agp_i830_check_active,
 345         .set_desc = agp_i810_set_desc,
 346         .dump_regs = agp_i855_dump_regs,
 347         .get_stolen_size = agp_i915_get_stolen_size,
 348         .get_gtt_mappable_entries = agp_i915_get_gtt_mappable_entries,
 349         .get_gtt_total_entries = agp_i810_get_gtt_total_entries,
 350         .install_gatt = agp_i830_install_gatt,
 351         .deinstall_gatt = agp_i830_deinstall_gatt,
 352         .write_gtt = agp_i810_write_gtt,
 353         .install_gtt_pte = agp_i830_install_gtt_pte,
 354         .read_gtt_pte = agp_i810_read_gtt_pte,
 355         .read_gtt_pte_paddr = agp_i810_read_gtt_pte_paddr,
 356         .set_aperture = agp_i915_set_aperture,
 357         .chipset_flush_setup = agp_i810_chipset_flush_setup,
 358         .chipset_flush_teardown = agp_i810_chipset_flush_teardown,
 359         .chipset_flush = agp_i830_chipset_flush,
 360 };
 361
 362 static const struct agp_i810_driver agp_i810_i915_driver = {
 363         .chiptype = CHIP_I915,
 364         .gen = 3,
 365         .busdma_addr_mask_sz = 32,
 366         .res_spec = agp_i915_res_spec,
 367         .check_active = agp_i915_check_active,
 368         .set_desc = agp_i810_set_desc,
 369         .dump_regs = agp_i915_dump_regs,
 370         .get_stolen_size = agp_i915_get_stolen_size,
 371         .get_gtt_mappable_entries = agp_i915_get_gtt_mappable_entries,
 372         .get_gtt_total_entries = agp_i810_get_gtt_total_entries,
 373         .install_gatt = agp_i830_install_gatt,
 374         .deinstall_gatt = agp_i830_deinstall_gatt,
 375         .write_gtt = agp_i915_write_gtt,
 376         .install_gtt_pte = agp_i915_install_gtt_pte,
 377         .read_gtt_pte = agp_i915_read_gtt_pte,
 378         .read_gtt_pte_paddr = agp_i915_read_gtt_pte_paddr,
 379         .set_aperture = agp_i915_set_aperture,
 380         .chipset_flush_setup = agp_i915_chipset_flush_setup,
 381         .chipset_flush_teardown = agp_i915_chipset_flush_teardown,
 382         .chipset_flush = agp_i915_chipset_flush,
 383 };
 384
 385 static const struct agp_i810_driver agp_i810_g965_driver = {
 386         .chiptype = CHIP_I965,
 387         .gen = 4,
 388         .busdma_addr_mask_sz = 36,
 389         .res_spec = agp_i965_res_spec,
 390         .check_active = agp_i915_check_active,
 391         .set_desc = agp_i810_set_desc,
 392         .dump_regs = agp_i965_dump_regs,
 393         .get_stolen_size = agp_i915_get_stolen_size,
 394         .get_gtt_mappable_entries = agp_i915_get_gtt_mappable_entries,
 395         .get_gtt_total_entries = agp_i965_get_gtt_total_entries,
 396         .install_gatt = agp_i830_install_gatt,
 397         .deinstall_gatt = agp_i830_deinstall_gatt,
 398         .write_gtt = agp_i965_write_gtt,
 399         .install_gtt_pte = agp_i965_install_gtt_pte,
 400         .read_gtt_pte = agp_i965_read_gtt_pte,
 401         .read_gtt_pte_paddr = agp_i915_read_gtt_pte_paddr,
 402         .set_aperture = agp_i915_set_aperture,
 403         .chipset_flush_setup = agp_i965_chipset_flush_setup,
 404         .chipset_flush_teardown = agp_i965_chipset_flush_teardown,
 405         .chipset_flush = agp_i915_chipset_flush,
 406 };
 407
 408 static const struct agp_i810_driver agp_i810_g33_driver = {
 409         .chiptype = CHIP_G33,
 410         .gen = 3,
 411         .busdma_addr_mask_sz = 36,
 412         .res_spec = agp_i915_res_spec,
 413         .check_active = agp_i915_check_active,
 414         .set_desc = agp_i810_set_desc,
 415         .dump_regs = agp_i965_dump_regs,
 416         .get_stolen_size = agp_i915_get_stolen_size,
 417         .get_gtt_mappable_entries = agp_i915_get_gtt_mappable_entries,
 418         .get_gtt_total_entries = agp_i965_get_gtt_total_entries,
 419         .install_gatt = agp_i830_install_gatt,
 420         .deinstall_gatt = agp_i830_deinstall_gatt,
 421         .write_gtt = agp_i915_write_gtt,
 422         .install_gtt_pte = agp_i915_install_gtt_pte,
 423         .read_gtt_pte = agp_i915_read_gtt_pte,
 424         .read_gtt_pte_paddr = agp_i915_read_gtt_pte_paddr,
 425         .set_aperture = agp_i915_set_aperture,
 426         .chipset_flush_setup = agp_i965_chipset_flush_setup,
 427         .chipset_flush_teardown = agp_i965_chipset_flush_teardown,
 428         .chipset_flush = agp_i915_chipset_flush,
 429 };
 430
 431 static const struct agp_i810_driver agp_i810_igd_driver = {
 432         .chiptype = CHIP_IGD,
 433         .gen = 3,
 434         .busdma_addr_mask_sz = 36,
 435         .res_spec = agp_i915_res_spec,
 436         .check_active = agp_i915_check_active,
 437         .set_desc = agp_i810_set_desc,
 438         .dump_regs = agp_i915_dump_regs,
 439         .get_stolen_size = agp_i915_get_stolen_size,
 440         .get_gtt_mappable_entries = agp_i915_get_gtt_mappable_entries,
 441         .get_gtt_total_entries = agp_i965_get_gtt_total_entries,
 442         .install_gatt = agp_i830_install_gatt,
 443         .deinstall_gatt = agp_i830_deinstall_gatt,
 444         .write_gtt = agp_i915_write_gtt,
 445         .install_gtt_pte = agp_i915_install_gtt_pte,
 446         .read_gtt_pte = agp_i915_read_gtt_pte,
 447         .read_gtt_pte_paddr = agp_i915_read_gtt_pte_paddr,
 448         .set_aperture = agp_i915_set_aperture,
 449         .chipset_flush_setup = agp_i965_chipset_flush_setup,
 450         .chipset_flush_teardown = agp_i965_chipset_flush_teardown,
 451         .chipset_flush = agp_i915_chipset_flush,
 452 };
 453
 454 static const struct agp_i810_driver agp_i810_g4x_driver = {
 455         .chiptype = CHIP_G4X,
 456         .gen = 5,
 457         .busdma_addr_mask_sz = 36,
 458         .res_spec = agp_i965_res_spec,
 459         .check_active = agp_i915_check_active,
 460         .set_desc = agp_i810_set_desc,
 461         .dump_regs = agp_i965_dump_regs,
 462         .get_stolen_size = agp_i915_get_stolen_size,
 463         .get_gtt_mappable_entries = agp_i915_get_gtt_mappable_entries,
 464         .get_gtt_total_entries = agp_gen5_get_gtt_total_entries,
 465         .install_gatt = agp_i830_install_gatt,
 466         .deinstall_gatt = agp_i830_deinstall_gatt,
 467         .write_gtt = agp_g4x_write_gtt,
 468         .install_gtt_pte = agp_g4x_install_gtt_pte,
 469         .read_gtt_pte = agp_g4x_read_gtt_pte,
 470         .read_gtt_pte_paddr = agp_i915_read_gtt_pte_paddr,
 471         .set_aperture = agp_i915_set_aperture,
 472         .chipset_flush_setup = agp_i965_chipset_flush_setup,
 473         .chipset_flush_teardown = agp_i965_chipset_flush_teardown,
 474         .chipset_flush = agp_i915_chipset_flush,
 475 };
 476
 477 static const struct agp_i810_driver agp_i810_sb_driver = {
 478         .chiptype = CHIP_SB,
 479         .gen = 6,
 480         .busdma_addr_mask_sz = 40,
 481         .res_spec = agp_g4x_res_spec,
 482         .check_active = agp_sb_check_active,
 483         .set_desc = agp_i810_set_desc,
 484         .dump_regs = agp_sb_dump_regs,
 485         .get_stolen_size = agp_sb_get_stolen_size,
 486         .get_gtt_mappable_entries = agp_i915_get_gtt_mappable_entries,
 487         .get_gtt_total_entries = agp_sb_get_gtt_total_entries,
 488         .install_gatt = agp_i830_install_gatt,
 489         .deinstall_gatt = agp_i830_deinstall_gatt,
 490         .write_gtt = agp_sb_write_gtt,
 491         .install_gtt_pte = agp_sb_install_gtt_pte,
 492         .read_gtt_pte = agp_g4x_read_gtt_pte,
 493         .read_gtt_pte_paddr = agp_sb_read_gtt_pte_paddr,
 494         .set_aperture = agp_i915_set_aperture,
 495         .chipset_flush_setup = agp_i810_chipset_flush_setup,
 496         .chipset_flush_teardown = agp_i810_chipset_flush_teardown,
 497         .chipset_flush = agp_i810_chipset_flush,
 498 };
 499
 500 /* For adding new devices, devid is the id of the graphics controller
 501  * (pci:0:2:0, for example).  The placeholder (usually at pci:0:2:1) for the
 502  * second head should never be added.  The bridge_offset is the offset to
 503  * subtract from devid to get the id of the hostb that the device is on.
 504  */
 505 static const struct agp_i810_match {
 506         int devid;
 507         char *name;
 508         const struct agp_i810_driver *driver;
 509 } agp_i810_matches[] = {
 510         {
 511                 .devid = 0x7121,
 512                 .name = "Intel 82810 (i810 GMCH) SVGA controller",
 513                 .driver = &agp_i810_i810_driver
 514         },
 515         {
 516                 .devid = 0x7123,
 517                 .name = "Intel 82810-DC100 (i810-DC100 GMCH) SVGA controller",
 518                 .driver = &agp_i810_i810_driver
 519         },
 520         {
 521                 .devid = 0x7125,
 522                 .name = "Intel 82810E (i810E GMCH) SVGA controller",
 523                 .driver = &agp_i810_i810_driver
 524         },
 525         {
 526                 .devid = 0x1132,
 527                 .name = "Intel 82815 (i815 GMCH) SVGA controller",
 528                 .driver = &agp_i810_i815_driver
 529         },
 530         {
 531                 .devid = 0x3577,
 532                 .name = "Intel 82830M (830M GMCH) SVGA controller",
 533                 .driver = &agp_i810_i830_driver
 534         },
 535         {
 536                 .devid = 0x2562,
 537                 .name = "Intel 82845M (845M GMCH) SVGA controller",
 538                 .driver = &agp_i810_i830_driver
 539         },
 540         {
 541                 .devid = 0x3582,
 542                 .name = "Intel 82852/855GM SVGA controller",
 543                 .driver = &agp_i810_i855_driver
 544         },
 545         {
 546                 .devid = 0x2572,
 547                 .name = "Intel 82865G (865G GMCH) SVGA controller",
 548                 .driver = &agp_i810_i865_driver
 549         },
 550         {
 551                 .devid = 0x2582,
 552                 .name = "Intel 82915G (915G GMCH) SVGA controller",
 553                 .driver = &agp_i810_i915_driver
 554         },
 555         {
 556                 .devid = 0x258A,
 557                 .name = "Intel E7221 SVGA controller",
 558                 .driver = &agp_i810_i915_driver
 559         },
 560         {
 561                 .devid = 0x2592,
 562                 .name = "Intel 82915GM (915GM GMCH) SVGA controller",
 563                 .driver = &agp_i810_i915_driver
 564         },
 565         {
 566                 .devid = 0x2772,
 567                 .name = "Intel 82945G (945G GMCH) SVGA controller",
 568                 .driver = &agp_i810_i915_driver
 569         },
 570         {
 571                 .devid = 0x27A2,
 572                 .name = "Intel 82945GM (945GM GMCH) SVGA controller",
 573                 .driver = &agp_i810_i915_driver
 574         },
 575         {
 576                 .devid = 0x27AE,
 577                 .name = "Intel 945GME SVGA controller",
 578                 .driver = &agp_i810_i915_driver
 579         },
 580         {
 581                 .devid = 0x2972,
 582                 .name = "Intel 946GZ SVGA controller",
 583                 .driver = &agp_i810_g965_driver
 584         },
 585         {
 586                 .devid = 0x2982,
 587                 .name = "Intel G965 SVGA controller",
 588                 .driver = &agp_i810_g965_driver
 589         },
 590         {
 591                 .devid = 0x2992,
 592                 .name = "Intel Q965 SVGA controller",
 593                 .driver = &agp_i810_g965_driver
 594         },
 595         {
 596                 .devid = 0x29A2,
 597                 .name = "Intel G965 SVGA controller",
 598                 .driver = &agp_i810_g965_driver
 599         },
 600         {
 601                 .devid = 0x29B2,
 602                 .name = "Intel Q35 SVGA controller",
 603                 .driver = &agp_i810_g33_driver
 604         },
 605         {
 606                 .devid = 0x29C2,
 607                 .name = "Intel G33 SVGA controller",
 608                 .driver = &agp_i810_g33_driver
 609         },
 610         {
 611                 .devid = 0x29D2,
 612                 .name = "Intel Q33 SVGA controller",
 613                 .driver = &agp_i810_g33_driver
 614         },
 615         {
 616                 .devid = 0xA001,
 617                 .name = "Intel Pineview SVGA controller",
 618                 .driver = &agp_i810_igd_driver
 619         },
 620         {
 621                 .devid = 0xA011,
 622                 .name = "Intel Pineview (M) SVGA controller",
 623                 .driver = &agp_i810_igd_driver
 624         },
 625         {
 626                 .devid = 0x2A02,
 627                 .name = "Intel GM965 SVGA controller",
 628                 .driver = &agp_i810_g965_driver
 629         },
 630         {
 631                 .devid = 0x2A12,
 632                 .name = "Intel GME965 SVGA controller",
 633                 .driver = &agp_i810_g965_driver
 634         },
 635         {
 636                 .devid = 0x2A42,
 637                 .name = "Intel GM45 SVGA controller",
 638                 .driver = &agp_i810_g4x_driver
 639         },
 640         {
 641                 .devid = 0x2E02,
 642                 .name = "Intel Eaglelake SVGA controller",
 643                 .driver = &agp_i810_g4x_driver
 644         },
 645         {
 646                 .devid = 0x2E12,
 647                 .name = "Intel Q45 SVGA controller",
 648                 .driver = &agp_i810_g4x_driver
 649         },
 650         {
 651                 .devid = 0x2E22,
 652                 .name = "Intel G45 SVGA controller",
 653                 .driver = &agp_i810_g4x_driver
 654         },
 655         {
 656                 .devid = 0x2E32,
 657                 .name = "Intel G41 SVGA controller",
 658                 .driver = &agp_i810_g4x_driver
 659         },
 660         {
 661                 .devid = 0x0042,
 662                 .name = "Intel Ironlake (D) SVGA controller",
 663                 .driver = &agp_i810_g4x_driver
 664         },
 665         {
 666                 .devid = 0x0046,
 667                 .name = "Intel Ironlake (M) SVGA controller",
 668                 .driver = &agp_i810_g4x_driver
 669         },
 670         {
 671                 .devid = 0x0102,
 672                 .name = "SandyBridge desktop GT1 IG",
 673                 .driver = &agp_i810_sb_driver
 674         },
 675         {
 676                 .devid = 0x0112,
 677                 .name = "SandyBridge desktop GT2 IG",
 678                 .driver = &agp_i810_sb_driver
 679         },
 680         {
 681                 .devid = 0x0122,
 682                 .name = "SandyBridge desktop GT2+ IG",
 683                 .driver = &agp_i810_sb_driver
 684         },
 685         {
 686                 .devid = 0x0106,
 687                 .name = "SandyBridge mobile GT1 IG",
 688                 .driver = &agp_i810_sb_driver
 689         },
 690         {
 691                 .devid = 0x0116,
 692                 .name = "SandyBridge mobile GT2 IG",
 693                 .driver = &agp_i810_sb_driver
 694         },
 695         {
 696                 .devid = 0x0126,
 697                 .name = "SandyBridge mobile GT2+ IG",
 698                 .driver = &agp_i810_sb_driver
 699         },
 700         {
 701                 .devid = 0x010a,
 702                 .name = "SandyBridge server IG",
 703                 .driver = &agp_i810_sb_driver
 704         },
 705         {
 706                 .devid = 0x0152,
 707                 .name = "IvyBridge desktop GT1 IG",
 708                 .driver = &agp_i810_sb_driver
 709         },
 710         {
 711                 .devid = 0x0162,
 712                 .name = "IvyBridge desktop GT2 IG",
 713                 .driver = &agp_i810_sb_driver
 714         },
 715         {
 716                 .devid = 0x0156,
 717                 .name = "IvyBridge mobile GT1 IG",
 718                 .driver = &agp_i810_sb_driver
 719         },
 720         {
 721                 .devid = 0x0166,
 722                 .name = "IvyBridge mobile GT2 IG",
 723                 .driver = &agp_i810_sb_driver
 724         },
 725         {
 726                 .devid = 0x015a,
 727                 .name = "IvyBridge server GT1 IG",
 728                 .driver = &agp_i810_sb_driver
 729         },
 730         {
 731                 .devid = 0x016a,
 732                 .name = "IvyBridge server GT2 IG",
 733                 .driver = &agp_i810_sb_driver
 734         },
 735         {
 736                 .devid = 0,
 737         }
 738 };
 739
 740 static const struct agp_i810_match*
 741 agp_i810_match(device_t dev)
 742 {
 743         int i, devid;
 744
 745         if (pci_get_vendor(dev) != PCI_VENDOR_INTEL)
 746                 return (NULL);
 747
 748         devid = pci_get_subdevice(dev);
 749         for (i = 0; agp_i810_matches[i].devid != 0; i++) {
 750                 if (agp_i810_matches[i].devid == devid)
 751                         break;
 752         }
 753         if (agp_i810_matches[i].devid == 0)
 754                 return (NULL);
 755         else
 756                 return (&agp_i810_matches[i]);
 757 }
 758
 759 /*
 760  * Find bridge device.
 761  */
 762 static device_t
 763 agp_i810_find_bridge(device_t dev)
 764 {
 765
 766         return (pci_find_dbsf(0, 0, 0, 0));
 767 }
 768
 769 static void
 770 agp_i810_identify(driver_t *driver, device_t parent)
 771 {
 772
 773         if (device_find_child(parent, "agp", -1) == NULL &&
 774             agp_i810_match(parent))
 775                 device_add_child(parent, "agp", -1);
 776 }
 777
 778 static int
 779 agp_i810_check_active(device_t bridge_dev)
 780 {
 781         u_int8_t smram;
 782
 783         smram = pci_read_config(bridge_dev, AGP_I810_SMRAM, 1);
 784         if ((smram & AGP_I810_SMRAM_GMS) == AGP_I810_SMRAM_GMS_DISABLED)
 785                 return (ENXIO);
 786         return (0);
 787 }
 788
 789 static int
 790 agp_i830_check_active(device_t bridge_dev)
 791 {
 792         int gcc1;
 793
 794         gcc1 = pci_read_config(bridge_dev, AGP_I830_GCC1, 1);
 795         if ((gcc1 & AGP_I830_GCC1_DEV2) == AGP_I830_GCC1_DEV2_DISABLED)
 796                 return (ENXIO);
 797         return (0);
 798 }
 799
 800 static int
 801 agp_i915_check_active(device_t bridge_dev)
 802 {
 803         int deven;
 804
 805         deven = pci_read_config(bridge_dev, AGP_I915_DEVEN, 4);
 806         if ((deven & AGP_I915_DEVEN_D2F0) == AGP_I915_DEVEN_D2F0_DISABLED)
 807                 return (ENXIO);
 808         return (0);
 809 }
 810
 811 static int
 812 agp_sb_check_active(device_t bridge_dev)
 813 {
 814         int deven;
 815
 816         deven = pci_read_config(bridge_dev, AGP_I915_DEVEN, 4);
 817         if ((deven & AGP_SB_DEVEN_D2EN) == AGP_SB_DEVEN_D2EN_DISABLED)
 818                 return (ENXIO);
 819         return (0);
 820 }
 821
 822 static void
 823 agp_82852_set_desc(device_t dev, const struct agp_i810_match *match)
 824 {
 825
 826         switch (pci_read_config(dev, AGP_I85X_CAPID, 1)) {
 827         case AGP_I855_GME:
 828                 device_set_desc(dev,
 829                     "Intel 82855GME (855GME GMCH) SVGA controller");
 830                 break;
 831         case AGP_I855_GM:
 832                 device_set_desc(dev,
 833                     "Intel 82855GM (855GM GMCH) SVGA controller");
 834                 break;
 835         case AGP_I852_GME:
 836                 device_set_desc(dev,
 837                     "Intel 82852GME (852GME GMCH) SVGA controller");
 838                 break;
 839         case AGP_I852_GM:
 840                 device_set_desc(dev,
 841                     "Intel 82852GM (852GM GMCH) SVGA controller");
 842                 break;
 843         default:
 844                 device_set_desc(dev,
 845                     "Intel 8285xM (85xGM GMCH) SVGA controller");
 846                 break;
 847         }
 848 }
 849
 850 static void
 851 agp_i810_set_desc(device_t dev, const struct agp_i810_match *match)
 852 {
 853
 854         device_set_desc(dev, match->name);
 855 }
 856
 857 static int
 858 agp_i810_probe(device_t dev)
 859 {
 860         device_t bdev;
 861         const struct agp_i810_match *match;
 862         int err;
 863
 864         if (resource_disabled("agp", device_get_unit(dev)))
 865                 return (ENXIO);
 866         match = agp_i810_match(dev);
 867         if (match == NULL)
 868                 return (ENXIO);
 869
 870         bdev = agp_i810_find_bridge(dev);
 871         if (bdev == NULL) {
 872                 if (bootverbose)
 873                         kprintf("I810: can't find bridge device\n");
 874                 return (ENXIO);
 875         }
 876
 877         /*
 878          * checking whether internal graphics device has been activated.
 879          */
 880         err = match->driver->check_active(bdev);
 881         if (err != 0) {
 882                 if (bootverbose)
 883                         kprintf("i810: disabled, not probing\n");
 884                 return (err);
 885         }
 886
 887         match->driver->set_desc(dev, match);
 888         return (BUS_PROBE_DEFAULT);
 889 }
 890
 891 static void
 892 agp_i810_dump_regs(device_t dev)
 893 {
 894         struct agp_i810_softc *sc = device_get_softc(dev);
 895
 896         device_printf(dev, "AGP_I810_PGTBL_CTL: %08x\n",
 897             bus_read_4(sc->sc_res[0], AGP_I810_PGTBL_CTL));
 898         device_printf(dev, "AGP_I810_MISCC: 0x%04x\n",
 899             pci_read_config(sc->bdev, AGP_I810_MISCC, 2));
 900 }
 901
 902 static void
 903 agp_i830_dump_regs(device_t dev)
 904 {
 905         struct agp_i810_softc *sc = device_get_softc(dev);
 906
 907         device_printf(dev, "AGP_I810_PGTBL_CTL: %08x\n",
 908             bus_read_4(sc->sc_res[0], AGP_I810_PGTBL_CTL));
 909         device_printf(dev, "AGP_I830_GCC1: 0x%02x\n",
 910             pci_read_config(sc->bdev, AGP_I830_GCC1, 1));
 911 }
 912
 913 static void
 914 agp_i855_dump_regs(device_t dev)
 915 {
 916         struct agp_i810_softc *sc = device_get_softc(dev);
 917
 918         device_printf(dev, "AGP_I810_PGTBL_CTL: %08x\n",
 919             bus_read_4(sc->sc_res[0], AGP_I810_PGTBL_CTL));
 920         device_printf(dev, "AGP_I855_GCC1: 0x%02x\n",
 921             pci_read_config(sc->bdev, AGP_I855_GCC1, 1));
 922 }
 923
 924 static void
 925 agp_i915_dump_regs(device_t dev)
 926 {
 927         struct agp_i810_softc *sc = device_get_softc(dev);
 928
 929         device_printf(dev, "AGP_I810_PGTBL_CTL: %08x\n",
 930             bus_read_4(sc->sc_res[0], AGP_I810_PGTBL_CTL));
 931         device_printf(dev, "AGP_I855_GCC1: 0x%02x\n",
 932             pci_read_config(sc->bdev, AGP_I855_GCC1, 1));
 933         device_printf(dev, "AGP_I915_MSAC: 0x%02x\n",
 934             pci_read_config(sc->bdev, AGP_I915_MSAC, 1));
 935 }
 936
 937 static void
 938 agp_i965_dump_regs(device_t dev)
 939 {
 940         struct agp_i810_softc *sc = device_get_softc(dev);
 941
 942         device_printf(dev, "AGP_I965_PGTBL_CTL2: %08x\n",
 943             bus_read_4(sc->sc_res[0], AGP_I965_PGTBL_CTL2));
 944         device_printf(dev, "AGP_I855_GCC1: 0x%02x\n",
 945             pci_read_config(sc->bdev, AGP_I855_GCC1, 1));
 946         device_printf(dev, "AGP_I965_MSAC: 0x%02x\n",
 947             pci_read_config(sc->bdev, AGP_I965_MSAC, 1));
 948 }
 949
 950 static void
 951 agp_sb_dump_regs(device_t dev)
 952 {
 953         struct agp_i810_softc *sc = device_get_softc(dev);
 954
 955         device_printf(dev, "AGP_SNB_GFX_MODE: %08x\n",
 956             bus_read_4(sc->sc_res[0], AGP_SNB_GFX_MODE));
 957         device_printf(dev, "AGP_SNB_GCC1: 0x%04x\n",
 958             pci_read_config(sc->bdev, AGP_SNB_GCC1, 2));
 959 }
 960
 961 static int
 962 agp_i810_get_stolen_size(device_t dev)
 963 {
 964         struct agp_i810_softc *sc;
 965
 966         sc = device_get_softc(dev);
 967         sc->stolen = 0;
 968         sc->stolen_size = 0;
 969         return (0);
 970 }
 971
 972 static int
 973 agp_i830_get_stolen_size(device_t dev)
 974 {
 975         struct agp_i810_softc *sc;
 976         unsigned int gcc1;
 977
 978         sc = device_get_softc(dev);
 979
 980         gcc1 = pci_read_config(sc->bdev, AGP_I830_GCC1, 1);
 981         switch (gcc1 & AGP_I830_GCC1_GMS) {
 982         case AGP_I830_GCC1_GMS_STOLEN_512:
 983                 sc->stolen = (512 - 132) * 1024 / 4096;
 984                 sc->stolen_size = 512 * 1024;
 985                 break;
 986         case AGP_I830_GCC1_GMS_STOLEN_1024:
 987                 sc->stolen = (1024 - 132) * 1024 / 4096;
 988                 sc->stolen_size = 1024 * 1024;
 989                 break;
 990         case AGP_I830_GCC1_GMS_STOLEN_8192:
 991                 sc->stolen = (8192 - 132) * 1024 / 4096;
 992                 sc->stolen_size = 8192 * 1024;
 993                 break;
 994         default:
 995                 sc->stolen = 0;
 996                 device_printf(dev,
 997                     "unknown memory configuration, disabling (GCC1 %x)\n",
 998                     gcc1);
 999                 return (EINVAL);
1000         }
1001         return (0);
1002 }
1003
1004 static int
1005 agp_i915_get_stolen_size(device_t dev)
1006 {
1007         struct agp_i810_softc *sc;
1008         unsigned int gcc1, stolen, gtt_size;
1009
1010         sc = device_get_softc(dev);
1011
1012         /*
1013          * Stolen memory is set up at the beginning of the aperture by
1014          * the BIOS, consisting of the GATT followed by 4kb for the
1015          * BIOS display.
1016          */
1017         switch (sc->match->driver->chiptype) {
1018         case CHIP_I855:
1019                 gtt_size = 128;
1020                 break;
1021         case CHIP_I915:
1022                 gtt_size = 256;
1023                 break;
1024         case CHIP_I965:
1025                 switch (bus_read_4(sc->sc_res[0], AGP_I810_PGTBL_CTL) &
1026                         AGP_I810_PGTBL_SIZE_MASK) {
1027                 case AGP_I810_PGTBL_SIZE_128KB:
1028                         gtt_size = 128;
1029                         break;
1030                 case AGP_I810_PGTBL_SIZE_256KB:
1031                         gtt_size = 256;
1032                         break;
1033                 case AGP_I810_PGTBL_SIZE_512KB:
1034                         gtt_size = 512;
1035                         break;
1036                 case AGP_I965_PGTBL_SIZE_1MB:
1037                         gtt_size = 1024;
1038                         break;
1039                 case AGP_I965_PGTBL_SIZE_2MB:
1040                         gtt_size = 2048;
1041                         break;
1042                 case AGP_I965_PGTBL_SIZE_1_5MB:
1043                         gtt_size = 1024 + 512;
1044                         break;
1045                 default:
1046                         device_printf(dev, "Bad PGTBL size\n");
1047                         return (EINVAL);
1048                 }
1049                 break;
1050         case CHIP_G33:
1051                 gcc1 = pci_read_config(sc->bdev, AGP_I855_GCC1, 2);
1052                 switch (gcc1 & AGP_G33_MGGC_GGMS_MASK) {
1053                 case AGP_G33_MGGC_GGMS_SIZE_1M:
1054                         gtt_size = 1024;
1055                         break;
1056                 case AGP_G33_MGGC_GGMS_SIZE_2M:
1057                         gtt_size = 2048;
1058                         break;
1059                 default:
1060                         device_printf(dev, "Bad PGTBL size\n");
1061                         return (EINVAL);
1062                 }
1063                 break;
1064         case CHIP_IGD:
1065         case CHIP_G4X:
1066                 gtt_size = 0;
1067                 break;
1068         default:
1069                 device_printf(dev, "Bad chiptype\n");
1070                 return (EINVAL);
1071         }
1072
1073         /* GCC1 is called MGGC on i915+ */
1074         gcc1 = pci_read_config(sc->bdev, AGP_I855_GCC1, 1);
1075         switch (gcc1 & AGP_I855_GCC1_GMS) {
1076         case AGP_I855_GCC1_GMS_STOLEN_1M:
1077                 stolen = 1024;
1078                 break;
1079         case AGP_I855_GCC1_GMS_STOLEN_4M:
1080                 stolen = 4 * 1024;
1081                 break;
1082         case AGP_I855_GCC1_GMS_STOLEN_8M:
1083                 stolen = 8 * 1024;
1084                 break;
1085         case AGP_I855_GCC1_GMS_STOLEN_16M:
1086                 stolen = 16 * 1024;
1087                 break;
1088         case AGP_I855_GCC1_GMS_STOLEN_32M:
1089                 stolen = 32 * 1024;
1090                 break;
1091         case AGP_I915_GCC1_GMS_STOLEN_48M:
1092                 stolen = sc->match->driver->gen > 2 ? 48 * 1024 : 0;
1093                 break;
1094         case AGP_I915_GCC1_GMS_STOLEN_64M:
1095                 stolen = sc->match->driver->gen > 2 ? 64 * 1024 : 0;
1096                 break;
1097         case AGP_G33_GCC1_GMS_STOLEN_128M:
1098                 stolen = sc->match->driver->gen > 2 ? 128 * 1024 : 0;
1099                 break;
1100         case AGP_G33_GCC1_GMS_STOLEN_256M:
1101                 stolen = sc->match->driver->gen > 2 ? 256 * 1024 : 0;
1102                 break;
1103         case AGP_G4X_GCC1_GMS_STOLEN_96M:
1104                 if (sc->match->driver->chiptype == CHIP_I965 ||
1105                     sc->match->driver->chiptype == CHIP_G4X)
1106                         stolen = 96 * 1024;
1107                 else
1108                         stolen = 0;
1109                 break;
1110         case AGP_G4X_GCC1_GMS_STOLEN_160M:
1111                 if (sc->match->driver->chiptype == CHIP_I965 ||
1112                     sc->match->driver->chiptype == CHIP_G4X)
1113                         stolen = 160 * 1024;
1114                 else
1115                         stolen = 0;
1116                 break;
1117         case AGP_G4X_GCC1_GMS_STOLEN_224M:
1118                 if (sc->match->driver->chiptype == CHIP_I965 ||
1119                     sc->match->driver->chiptype == CHIP_G4X)
1120                         stolen = 224 * 1024;
1121                 else
1122                         stolen = 0;
1123                 break;
1124         case AGP_G4X_GCC1_GMS_STOLEN_352M:
1125                 if (sc->match->driver->chiptype == CHIP_I965 ||
1126                     sc->match->driver->chiptype == CHIP_G4X)
1127                         stolen = 352 * 1024;
1128                 else
1129                         stolen = 0;
1130                 break;
1131         default:
1132                 device_printf(dev,
1133                     "unknown memory configuration, disabling (GCC1 %x)\n",
1134                     gcc1);
1135                 return (EINVAL);
1136         }
1137
1138         gtt_size += 4;
1139         sc->stolen_size = stolen * 1024;
1140         sc->stolen = (stolen - gtt_size) * 1024 / 4096;
1141
1142         return (0);
1143 }
1144
1145 static int
1146 agp_sb_get_stolen_size(device_t dev)
1147 {
1148         struct agp_i810_softc *sc;
1149         uint16_t gmch_ctl;
1150
1151         sc = device_get_softc(dev);
1152         gmch_ctl = pci_read_config(sc->bdev, AGP_SNB_GCC1, 2);
1153         switch (gmch_ctl & AGP_SNB_GMCH_GMS_STOLEN_MASK) {
1154         case AGP_SNB_GMCH_GMS_STOLEN_32M:
1155                 sc->stolen_size = 32 * 1024 * 1024;
1156                 break;
1157         case AGP_SNB_GMCH_GMS_STOLEN_64M:
1158                 sc->stolen_size = 64 * 1024 * 1024;
1159                 break;
1160         case AGP_SNB_GMCH_GMS_STOLEN_96M:
1161                 sc->stolen_size = 96 * 1024 * 1024;
1162                 break;
1163         case AGP_SNB_GMCH_GMS_STOLEN_128M:
1164                 sc->stolen_size = 128 * 1024 * 1024;
1165                 break;
1166         case AGP_SNB_GMCH_GMS_STOLEN_160M:
1167                 sc->stolen_size = 160 * 1024 * 1024;
1168                 break;
1169         case AGP_SNB_GMCH_GMS_STOLEN_192M:
1170                 sc->stolen_size = 192 * 1024 * 1024;
1171                 break;
1172         case AGP_SNB_GMCH_GMS_STOLEN_224M:
1173                 sc->stolen_size = 224 * 1024 * 1024;
1174                 break;
1175         case AGP_SNB_GMCH_GMS_STOLEN_256M:
1176                 sc->stolen_size = 256 * 1024 * 1024;
1177                 break;
1178         case AGP_SNB_GMCH_GMS_STOLEN_288M:
1179                 sc->stolen_size = 288 * 1024 * 1024;
1180                 break;
1181         case AGP_SNB_GMCH_GMS_STOLEN_320M:
1182                 sc->stolen_size = 320 * 1024 * 1024;
1183                 break;
1184         case AGP_SNB_GMCH_GMS_STOLEN_352M:
1185                 sc->stolen_size = 352 * 1024 * 1024;
1186                 break;
1187         case AGP_SNB_GMCH_GMS_STOLEN_384M:
1188                 sc->stolen_size = 384 * 1024 * 1024;
1189                 break;
1190         case AGP_SNB_GMCH_GMS_STOLEN_416M:
1191                 sc->stolen_size = 416 * 1024 * 1024;
1192                 break;
1193         case AGP_SNB_GMCH_GMS_STOLEN_448M:
1194                 sc->stolen_size = 448 * 1024 * 1024;
1195                 break;
1196         case AGP_SNB_GMCH_GMS_STOLEN_480M:
1197                 sc->stolen_size = 480 * 1024 * 1024;
1198                 break;
1199         case AGP_SNB_GMCH_GMS_STOLEN_512M:
1200                 sc->stolen_size = 512 * 1024 * 1024;
1201                 break;
1202         }
1203         sc->stolen = (sc->stolen_size - 4) / 4096;
1204         return (0);
1205 }
1206
1207 static int
1208 agp_i810_get_gtt_mappable_entries(device_t dev)
1209 {
1210         struct agp_i810_softc *sc;
1211         uint32_t ap;
1212         uint16_t miscc;
1213
1214         sc = device_get_softc(dev);
1215         miscc = pci_read_config(sc->bdev, AGP_I810_MISCC, 2);
1216         if ((miscc & AGP_I810_MISCC_WINSIZE) == AGP_I810_MISCC_WINSIZE_32)
1217                 ap = 32;
1218         else
1219                 ap = 64;
1220         sc->gtt_mappable_entries = (ap * 1024 * 1024) >> AGP_PAGE_SHIFT;
1221         return (0);
1222 }
1223
1224 static int
1225 agp_i830_get_gtt_mappable_entries(device_t dev)
1226 {
1227         struct agp_i810_softc *sc;
1228         uint32_t ap;
1229         uint16_t gmch_ctl;
1230
1231         sc = device_get_softc(dev);
1232         gmch_ctl = pci_read_config(sc->bdev, AGP_I830_GCC1, 2);
1233         if ((gmch_ctl & AGP_I830_GCC1_GMASIZE) == AGP_I830_GCC1_GMASIZE_64)
1234                 ap = 64;
1235         else
1236                 ap = 128;
1237         sc->gtt_mappable_entries = (ap * 1024 * 1024) >> AGP_PAGE_SHIFT;
1238         return (0);
1239 }
1240
1241 static int
1242 agp_i915_get_gtt_mappable_entries(device_t dev)
1243 {
1244         struct agp_i810_softc *sc;
1245         uint32_t ap;
1246
1247         sc = device_get_softc(dev);
1248         ap = AGP_GET_APERTURE(dev);
1249         sc->gtt_mappable_entries = ap >> AGP_PAGE_SHIFT;
1250         return (0);
1251 }
1252
1253 static int
1254 agp_i810_get_gtt_total_entries(device_t dev)
1255 {
1256         struct agp_i810_softc *sc;
1257
1258         sc = device_get_softc(dev);
1259         sc->gtt_total_entries = sc->gtt_mappable_entries;
1260         return (0);
1261 }
1262
1263 static int
1264 agp_i965_get_gtt_total_entries(device_t dev)
1265 {
1266         struct agp_i810_softc *sc;
1267         uint32_t pgetbl_ctl;
1268         int error;
1269
1270         sc = device_get_softc(dev);
1271         error = 0;
1272         pgetbl_ctl = bus_read_4(sc->sc_res[0], AGP_I810_PGTBL_CTL);
1273         switch (pgetbl_ctl & AGP_I810_PGTBL_SIZE_MASK) {
1274         case AGP_I810_PGTBL_SIZE_128KB:
1275                 sc->gtt_total_entries = 128 * 1024 / 4;
1276                 break;
1277         case AGP_I810_PGTBL_SIZE_256KB:
1278                 sc->gtt_total_entries = 256 * 1024 / 4;
1279                 break;
1280         case AGP_I810_PGTBL_SIZE_512KB:
1281                 sc->gtt_total_entries = 512 * 1024 / 4;
1282                 break;
1283         /* GTT pagetable sizes bigger than 512KB are not possible on G33! */
1284         case AGP_I810_PGTBL_SIZE_1MB:
1285                 sc->gtt_total_entries = 1024 * 1024 / 4;
1286                 break;
1287         case AGP_I810_PGTBL_SIZE_2MB:
1288                 sc->gtt_total_entries = 2 * 1024 * 1024 / 4;
1289                 break;
1290         case AGP_I810_PGTBL_SIZE_1_5MB:
1291                 sc->gtt_total_entries = (1024 + 512) * 1024 / 4;
1292                 break;
1293         default:
1294                 device_printf(dev, "Unknown page table size\n");
1295                 error = ENXIO;
1296         }
1297         return (error);
1298 }
1299
1300 static void
1301 agp_gen5_adjust_pgtbl_size(device_t dev, uint32_t sz)
1302 {
1303         struct agp_i810_softc *sc;
1304         uint32_t pgetbl_ctl, pgetbl_ctl2;
1305
1306         sc = device_get_softc(dev);
1307
1308         /* Disable per-process page table. */
1309         pgetbl_ctl2 = bus_read_4(sc->sc_res[0], AGP_I965_PGTBL_CTL2);
1310         pgetbl_ctl2 &= ~AGP_I810_PGTBL_ENABLED;
1311         bus_write_4(sc->sc_res[0], AGP_I965_PGTBL_CTL2, pgetbl_ctl2);
1312
1313         /* Write the new ggtt size. */
1314         pgetbl_ctl = bus_read_4(sc->sc_res[0], AGP_I810_PGTBL_CTL);
1315         pgetbl_ctl &= ~AGP_I810_PGTBL_SIZE_MASK;
1316         pgetbl_ctl |= sz;
1317         bus_write_4(sc->sc_res[0], AGP_I810_PGTBL_CTL, pgetbl_ctl);
1318 }
1319
1320 static int
1321 agp_gen5_get_gtt_total_entries(device_t dev)
1322 {
1323         struct agp_i810_softc *sc;
1324         uint16_t gcc1;
1325
1326         sc = device_get_softc(dev);
1327
1328         gcc1 = pci_read_config(sc->bdev, AGP_I830_GCC1, 2);
1329         switch (gcc1 & AGP_G4x_GCC1_SIZE_MASK) {
1330         case AGP_G4x_GCC1_SIZE_1M:
1331         case AGP_G4x_GCC1_SIZE_VT_1M:
1332                 agp_gen5_adjust_pgtbl_size(dev, AGP_I810_PGTBL_SIZE_1MB);
1333                 break;
1334         case AGP_G4x_GCC1_SIZE_VT_1_5M:
1335                 agp_gen5_adjust_pgtbl_size(dev, AGP_I810_PGTBL_SIZE_1_5MB);
1336                 break;
1337         case AGP_G4x_GCC1_SIZE_2M:
1338         case AGP_G4x_GCC1_SIZE_VT_2M:
1339                 agp_gen5_adjust_pgtbl_size(dev, AGP_I810_PGTBL_SIZE_2MB);
1340                 break;
1341         default:
1342                 device_printf(dev, "Unknown page table size\n");
1343                 return (ENXIO);
1344         }
1345
1346         return (agp_i965_get_gtt_total_entries(dev));
1347 }
1348
1349 static int
1350 agp_sb_get_gtt_total_entries(device_t dev)
1351 {
1352         struct agp_i810_softc *sc;
1353         uint16_t gcc1;
1354
1355         sc = device_get_softc(dev);
1356
1357         gcc1 = pci_read_config(sc->bdev, AGP_SNB_GCC1, 2);
1358         switch (gcc1 & AGP_SNB_GTT_SIZE_MASK) {
1359         default:
1360         case AGP_SNB_GTT_SIZE_0M:
1361                 kprintf("Bad GTT size mask: 0x%04x\n", gcc1);
1362                 return (ENXIO);
1363         case AGP_SNB_GTT_SIZE_1M:
1364                 sc->gtt_total_entries = 1024 * 1024 / 4;
1365                 break;
1366         case AGP_SNB_GTT_SIZE_2M:
1367                 sc->gtt_total_entries = 2 * 1024 * 1024 / 4;
1368                 break;
1369         }
1370         return (0);
1371 }
1372
1373 static int
1374 agp_i810_install_gatt(device_t dev)
1375 {
1376         struct agp_i810_softc *sc;
1377
1378         sc = device_get_softc(dev);
1379
1380         /* Some i810s have on-chip memory called dcache. */
1381         if ((bus_read_1(sc->sc_res[0], AGP_I810_DRT) & AGP_I810_DRT_POPULATED)
1382             != 0)
1383                 sc->dcache_size = 4 * 1024 * 1024;
1384         else
1385                 sc->dcache_size = 0;
1386
1387         /* According to the specs the gatt on the i810 must be 64k. */
1388         sc->gatt->ag_virtual = contigmalloc(64 * 1024, M_AGP, 0, 0, ~0,
1389             PAGE_SIZE, 0);
1390         if (sc->gatt->ag_virtual == NULL) {
1391                 if (bootverbose)
1392                         device_printf(dev, "contiguous allocation failed\n");
1393                 return (ENOMEM);
1394         }
1395
1396         bzero(sc->gatt->ag_virtual, sc->gatt->ag_entries * sizeof(u_int32_t));
1397         sc->gatt->ag_physical = vtophys((vm_offset_t)sc->gatt->ag_virtual);
1398         agp_flush_cache();
1399         /* Install the GATT. */
1400         bus_write_4(sc->sc_res[0], AGP_I810_PGTBL_CTL,
1401             sc->gatt->ag_physical | 1);
1402         return (0);
1403 }
1404
1405 static int
1406 agp_i830_install_gatt(device_t dev)
1407 {
1408         struct agp_i810_softc *sc;
1409         uint32_t pgtblctl;
1410
1411         sc = device_get_softc(dev);
1412
1413         /*
1414          * The i830 automatically initializes the 128k gatt on boot.
1415          * GATT address is already in there, make sure it's enabled.
1416          */
1417         pgtblctl = bus_read_4(sc->sc_res[0], AGP_I810_PGTBL_CTL);
1418         pgtblctl |= 1;
1419         bus_write_4(sc->sc_res[0], AGP_I810_PGTBL_CTL, pgtblctl);
1420
1421         sc->gatt->ag_physical = pgtblctl & ~1;
1422         return (0);
1423 }
1424
1425 static int
1426 agp_i810_attach(device_t dev)
1427 {
1428         struct agp_i810_softc *sc;
1429         int error;
1430
1431         sc = device_get_softc(dev);
1432         sc->bdev = agp_i810_find_bridge(dev);
1433         if (sc->bdev == NULL)
1434                 return (ENOENT);
1435
1436         sc->match = agp_i810_match(dev);
1437
1438         agp_set_aperture_resource(dev, sc->match->driver->gen <= 2 ?
1439             AGP_APBASE : AGP_I915_GMADR);
1440         error = agp_generic_attach(dev);
1441         if (error)
1442                 return (error);
1443
1444         if (ptoa((vm_paddr_t)Maxmem) >
1445             (1ULL << sc->match->driver->busdma_addr_mask_sz) - 1) {
1446                 device_printf(dev, "agp_i810 does not support physical "
1447                     "memory above %ju.\n", (uintmax_t)(1ULL <<
1448                     sc->match->driver->busdma_addr_mask_sz) - 1);
1449                 return (ENOENT);
1450         }
1451
1452         if (bus_alloc_resources(dev, sc->match->driver->res_spec, sc->sc_res)) {
1453                 agp_generic_detach(dev);
1454                 return (ENODEV);
1455         }
1456
1457         sc->initial_aperture = AGP_GET_APERTURE(dev);
1458         sc->gatt = kmalloc(sizeof(struct agp_gatt), M_AGP, M_WAITOK);
1459         sc->gatt->ag_entries = AGP_GET_APERTURE(dev) >> AGP_PAGE_SHIFT;
1460
1461         if ((error = sc->match->driver->get_stolen_size(dev)) != 0 ||
1462             (error = sc->match->driver->install_gatt(dev)) != 0 ||
1463             (error = sc->match->driver->get_gtt_mappable_entries(dev)) != 0 ||
1464             (error = sc->match->driver->get_gtt_total_entries(dev)) != 0 ||
1465             (error = sc->match->driver->chipset_flush_setup(dev)) != 0) {
1466                 bus_release_resources(dev, sc->match->driver->res_spec,
1467                     sc->sc_res);
1468                 kfree(sc->gatt, M_AGP);
1469                 agp_generic_detach(dev);
1470                 return (error);
1471         }
1472
1473         intel_agp = dev;
1474         device_printf(dev, "aperture size is %dM",
1475             sc->initial_aperture / 1024 / 1024);
1476         if (sc->stolen > 0)
1477                 kprintf(", detected %dk stolen memory\n", sc->stolen * 4);
1478         else
1479                 kprintf("\n");
1480         if (bootverbose) {
1481                 sc->match->driver->dump_regs(dev);
1482                 device_printf(dev, "Mappable GTT entries: %d\n",
1483                     sc->gtt_mappable_entries);
1484                 device_printf(dev, "Total GTT entries: %d\n",
1485                     sc->gtt_total_entries);
1486         }
1487         return (0);
1488 }
1489
1490 static void
1491 agp_i810_deinstall_gatt(device_t dev)
1492 {
1493         struct agp_i810_softc *sc;
1494
1495         sc = device_get_softc(dev);
1496         bus_write_4(sc->sc_res[0], AGP_I810_PGTBL_CTL, 0);
1497         contigfree(sc->gatt->ag_virtual, 64 * 1024, M_AGP);
1498 }
1499
1500 static void
1501 agp_i830_deinstall_gatt(device_t dev)
1502 {
1503         struct agp_i810_softc *sc;
1504         unsigned int pgtblctl;
1505
1506         sc = device_get_softc(dev);
1507         pgtblctl = bus_read_4(sc->sc_res[0], AGP_I810_PGTBL_CTL);
1508         pgtblctl &= ~1;
1509         bus_write_4(sc->sc_res[0], AGP_I810_PGTBL_CTL, pgtblctl);
1510 }
1511
1512 static int
1513 agp_i810_detach(device_t dev)
1514 {
1515         struct agp_i810_softc *sc;
1516
1517         sc = device_get_softc(dev);
1518         agp_free_cdev(dev);
1519
1520         /* Clear the GATT base. */
1521         sc->match->driver->deinstall_gatt(dev);
1522
1523         sc->match->driver->chipset_flush_teardown(dev);
1524
1525         /* Put the aperture back the way it started. */
1526         AGP_SET_APERTURE(dev, sc->initial_aperture);
1527
1528         kfree(sc->gatt, M_AGP);
1529         bus_release_resources(dev, sc->match->driver->res_spec, sc->sc_res);
1530         agp_free_res(dev);
1531
1532         return (0);
1533 }
1534
1535 static int
1536 agp_i810_resume(device_t dev)
1537 {
1538         struct agp_i810_softc *sc;
1539         sc = device_get_softc(dev);
1540
1541         AGP_SET_APERTURE(dev, sc->initial_aperture);
1542
1543         /* Install the GATT. */
1544         bus_write_4(sc->sc_res[0], AGP_I810_PGTBL_CTL,
1545         sc->gatt->ag_physical | 1);
1546
1547         return (bus_generic_resume(dev));
1548 }
1549
1550 /**
1551  * Sets the PCI resource size of the aperture on i830-class and below chipsets,
1552  * while returning failure on later chipsets when an actual change is
1553  * requested.
1554  *
1555  * This whole function is likely bogus, as the kernel would probably need to
1556  * reconfigure the placement of the AGP aperture if a larger size is requested,
1557  * which doesn't happen currently.
1558  */
1559 static int
1560 agp_i810_set_aperture(device_t dev, u_int32_t aperture)
1561 {
1562         struct agp_i810_softc *sc;
1563         u_int16_t miscc;
1564
1565         sc = device_get_softc(dev);
1566         /*
1567          * Double check for sanity.
1568          */
1569         if (aperture != 32 * 1024 * 1024 && aperture != 64 * 1024 * 1024) {
1570                 device_printf(dev, "bad aperture size %d\n", aperture);
1571                 return (EINVAL);
1572         }
1573
1574         miscc = pci_read_config(sc->bdev, AGP_I810_MISCC, 2);
1575         miscc &= ~AGP_I810_MISCC_WINSIZE;
1576         if (aperture == 32 * 1024 * 1024)
1577                 miscc |= AGP_I810_MISCC_WINSIZE_32;
1578         else
1579                 miscc |= AGP_I810_MISCC_WINSIZE_64;
1580
1581         pci_write_config(sc->bdev, AGP_I810_MISCC, miscc, 2);
1582         return (0);
1583 }
1584
1585 static int
1586 agp_i830_set_aperture(device_t dev, u_int32_t aperture)
1587 {
1588         struct agp_i810_softc *sc;
1589         u_int16_t gcc1;
1590
1591         sc = device_get_softc(dev);
1592
1593         if (aperture != 64 * 1024 * 1024 &&
1594             aperture != 128 * 1024 * 1024) {
1595                 device_printf(dev, "bad aperture size %d\n", aperture);
1596                 return (EINVAL);
1597         }
1598         gcc1 = pci_read_config(sc->bdev, AGP_I830_GCC1, 2);
1599         gcc1 &= ~AGP_I830_GCC1_GMASIZE;
1600         if (aperture == 64 * 1024 * 1024)
1601                 gcc1 |= AGP_I830_GCC1_GMASIZE_64;
1602         else
1603                 gcc1 |= AGP_I830_GCC1_GMASIZE_128;
1604
1605         pci_write_config(sc->bdev, AGP_I830_GCC1, gcc1, 2);
1606         return (0);
1607 }
1608
1609 static int
1610 agp_i915_set_aperture(device_t dev, u_int32_t aperture)
1611 {
1612
1613         return (agp_generic_set_aperture(dev, aperture));
1614 }
1615
1616 static int
1617 agp_i810_method_set_aperture(device_t dev, u_int32_t aperture)
1618 {
1619         struct agp_i810_softc *sc;
1620
1621         sc = device_get_softc(dev);
1622         return (sc->match->driver->set_aperture(dev, aperture));
1623 }
1624
1625 /**
1626  * Writes a GTT entry mapping the page at the given offset from the
1627  * beginning of the aperture to the given physical address.  Setup the
1628  * caching mode according to flags.
1629  *
1630  * For gen 1, 2 and 3, GTT start is located at AGP_I810_GTT offset
1631  * from corresponding BAR start. For gen 4, offset is 512KB +
1632  * AGP_I810_GTT, for gen 5 and 6 it is 2MB + AGP_I810_GTT.
1633  *
1634  * Also, the bits of the physical page address above 4GB needs to be
1635  * placed into bits 40-32 of PTE.
1636  */
1637 static void
1638 agp_i810_install_gtt_pte(device_t dev, u_int index, vm_offset_t physical,
1639     int flags)
1640 {
1641         uint32_t pte;
1642
1643         pte = (u_int32_t)physical | I810_PTE_VALID;
1644         if (flags == AGP_DCACHE_MEMORY)
1645                 pte |= I810_PTE_LOCAL;
1646         else if (flags == AGP_USER_CACHED_MEMORY)
1647                 pte |= I830_PTE_SYSTEM_CACHED;
1648         agp_i810_write_gtt(dev, index, pte);
1649 }
1650
1651 static void
1652 agp_i810_write_gtt(device_t dev, u_int index, uint32_t pte)
1653 {
1654         struct agp_i810_softc *sc;
1655
1656         sc = device_get_softc(dev);
1657         bus_write_4(sc->sc_res[0], AGP_I810_GTT + index * 4, pte);
1658 }
1659
1660 static void
1661 agp_i830_install_gtt_pte(device_t dev, u_int index, vm_offset_t physical,
1662     int flags)
1663 {
1664         uint32_t pte;
1665
1666         pte = (u_int32_t)physical | I810_PTE_VALID;
1667         if (flags == AGP_USER_CACHED_MEMORY)
1668                 pte |= I830_PTE_SYSTEM_CACHED;
1669         agp_i810_write_gtt(dev, index, pte);
1670 }
1671
1672 static void
1673 agp_i915_install_gtt_pte(device_t dev, u_int index, vm_offset_t physical,
1674     int flags)
1675 {
1676         uint32_t pte;
1677
1678         pte = (u_int32_t)physical | I810_PTE_VALID;
1679         if (flags == AGP_USER_CACHED_MEMORY)
1680                 pte |= I830_PTE_SYSTEM_CACHED;
1681         pte |= (physical & 0x0000000f00000000ull) >> 28;
1682         agp_i915_write_gtt(dev, index, pte);
1683 }
1684
1685 static void
1686 agp_i915_write_gtt(device_t dev, u_int index, uint32_t pte)
1687 {
1688         struct agp_i810_softc *sc;
1689
1690         sc = device_get_softc(dev);
1691         bus_write_4(sc->sc_res[1], index * 4, pte);
1692 }
1693
1694 static void
1695 agp_i965_install_gtt_pte(device_t dev, u_int index, vm_offset_t physical,
1696     int flags)
1697 {
1698         uint32_t pte;
1699
1700         pte = (u_int32_t)physical | I810_PTE_VALID;
1701         if (flags == AGP_USER_CACHED_MEMORY)
1702                 pte |= I830_PTE_SYSTEM_CACHED;
1703         pte |= (physical & 0x0000000f00000000ull) >> 28;
1704         agp_i965_write_gtt(dev, index, pte);
1705 }
1706
1707 static void
1708 agp_i965_write_gtt(device_t dev, u_int index, uint32_t pte)
1709 {
1710         struct agp_i810_softc *sc;
1711
1712         sc = device_get_softc(dev);
1713         bus_write_4(sc->sc_res[0], index * 4 + (512 * 1024), pte);
1714 }
1715
1716 static void
1717 agp_g4x_install_gtt_pte(device_t dev, u_int index, vm_offset_t physical,
1718     int flags)
1719 {
1720         uint32_t pte;
1721
1722         pte = (u_int32_t)physical | I810_PTE_VALID;
1723         if (flags == AGP_USER_CACHED_MEMORY)
1724                 pte |= I830_PTE_SYSTEM_CACHED;
1725         pte |= (physical & 0x0000000f00000000ull) >> 28;
1726         agp_g4x_write_gtt(dev, index, pte);
1727 }
1728
1729 static void
1730 agp_g4x_write_gtt(device_t dev, u_int index, uint32_t pte)
1731 {
1732         struct agp_i810_softc *sc;
1733
1734         sc = device_get_softc(dev);
1735         bus_write_4(sc->sc_res[0], index * 4 + (2 * 1024 * 1024), pte);
1736 }
1737
1738 static void
1739 agp_sb_install_gtt_pte(device_t dev, u_int index, vm_offset_t physical,
1740     int flags)
1741 {
1742         int type_mask, gfdt;
1743         uint32_t pte;
1744
1745         pte = (u_int32_t)physical | I810_PTE_VALID;
1746         type_mask = flags & ~AGP_USER_CACHED_MEMORY_GFDT;
1747         gfdt = (flags & AGP_USER_CACHED_MEMORY_GFDT) != 0 ? GEN6_PTE_GFDT : 0;
1748
1749         if (type_mask == AGP_USER_MEMORY)
1750                 pte |= GEN6_PTE_UNCACHED;
1751         else if (type_mask == AGP_USER_CACHED_MEMORY_LLC_MLC)
1752                 pte |= GEN6_PTE_LLC_MLC | gfdt;
1753         else
1754                 pte |= GEN6_PTE_LLC | gfdt;
1755
1756         pte |= (physical & 0x000000ff00000000ull) >> 28;
1757         agp_sb_write_gtt(dev, index, pte);
1758 }
1759
1760 static void
1761 agp_sb_write_gtt(device_t dev, u_int index, uint32_t pte)
1762 {
1763         struct agp_i810_softc *sc;
1764
1765         sc = device_get_softc(dev);
1766         bus_write_4(sc->sc_res[0], index * 4 + (2 * 1024 * 1024), pte);
1767 }
1768
1769 static int
1770 agp_i810_bind_page(device_t dev, vm_offset_t offset, vm_offset_t physical)
1771 {
1772         struct agp_i810_softc *sc = device_get_softc(dev);
1773         u_int index;
1774
1775         if (offset >= (sc->gatt->ag_entries << AGP_PAGE_SHIFT)) {
1776                 device_printf(dev, "failed: offset is 0x%08jx, "
1777                     "shift is %d, entries is %d\n", (intmax_t)offset,
1778                     AGP_PAGE_SHIFT, sc->gatt->ag_entries);
1779                 return (EINVAL);
1780         }
1781         index = offset >> AGP_PAGE_SHIFT;
1782         if (sc->stolen != 0 && index < sc->stolen) {
1783                 device_printf(dev, "trying to bind into stolen memory\n");
1784                 return (EINVAL);
1785         }
1786         sc->match->driver->install_gtt_pte(dev, index, physical, 0);
1787         return (0);
1788 }
1789
1790 static int
1791 agp_i810_unbind_page(device_t dev, vm_offset_t offset)
1792 {
1793         struct agp_i810_softc *sc;
1794         u_int index;
1795
1796         sc = device_get_softc(dev);
1797         if (offset >= (sc->gatt->ag_entries << AGP_PAGE_SHIFT))
1798                 return (EINVAL);
1799         index = offset >> AGP_PAGE_SHIFT;
1800         if (sc->stolen != 0 && index < sc->stolen) {
1801                 device_printf(dev, "trying to unbind from stolen memory\n");
1802                 return (EINVAL);
1803         }
1804         sc->match->driver->install_gtt_pte(dev, index, 0, 0);
1805         return (0);
1806 }
1807
1808 static u_int32_t
1809 agp_i810_read_gtt_pte(device_t dev, u_int index)
1810 {
1811         struct agp_i810_softc *sc;
1812         u_int32_t pte;
1813
1814         sc = device_get_softc(dev);
1815         pte = bus_read_4(sc->sc_res[0], AGP_I810_GTT + index * 4);
1816         return (pte);
1817 }
1818
1819 static u_int32_t
1820 agp_i915_read_gtt_pte(device_t dev, u_int index)
1821 {
1822         struct agp_i810_softc *sc;
1823         u_int32_t pte;
1824
1825         sc = device_get_softc(dev);
1826         pte = bus_read_4(sc->sc_res[1], index * 4);
1827         return (pte);
1828 }
1829
1830 static u_int32_t
1831 agp_i965_read_gtt_pte(device_t dev, u_int index)
1832 {
1833         struct agp_i810_softc *sc;
1834         u_int32_t pte;
1835
1836         sc = device_get_softc(dev);
1837         pte = bus_read_4(sc->sc_res[0], index * 4 + (512 * 1024));
1838         return (pte);
1839 }
1840
1841 static u_int32_t
1842 agp_g4x_read_gtt_pte(device_t dev, u_int index)
1843 {
1844         struct agp_i810_softc *sc;
1845         u_int32_t pte;
1846
1847         sc = device_get_softc(dev);
1848         pte = bus_read_4(sc->sc_res[0], index * 4 + (2 * 1024 * 1024));
1849         return (pte);
1850 }
1851
1852 static vm_paddr_t
1853 agp_i810_read_gtt_pte_paddr(device_t dev, u_int index)
1854 {
1855         struct agp_i810_softc *sc;
1856         u_int32_t pte;
1857         vm_paddr_t res;
1858
1859         sc = device_get_softc(dev);
1860         pte = sc->match->driver->read_gtt_pte(dev, index);
1861         res = pte & ~PAGE_MASK;
1862         return (res);
1863 }
1864
1865 static vm_paddr_t
1866 agp_i915_read_gtt_pte_paddr(device_t dev, u_int index)
1867 {
1868         struct agp_i810_softc *sc;
1869         u_int32_t pte;
1870         vm_paddr_t res;
1871
1872         sc = device_get_softc(dev);
1873         pte = sc->match->driver->read_gtt_pte(dev, index);
1874         res = (pte & ~PAGE_MASK) | ((pte & 0xf0) << 28);
1875         return (res);
1876 }
1877
1878 static vm_paddr_t
1879 agp_sb_read_gtt_pte_paddr(device_t dev, u_int index)
1880 {
1881         struct agp_i810_softc *sc;
1882         u_int32_t pte;
1883         vm_paddr_t res;
1884
1885         sc = device_get_softc(dev);
1886         pte = sc->match->driver->read_gtt_pte(dev, index);
1887         res = (pte & ~PAGE_MASK) | ((pte & 0xff0) << 28);
1888         return (res);
1889 }
1890
1891 /*
1892  * Writing via memory mapped registers already flushes all TLBs.
1893  */
1894 static void
1895 agp_i810_flush_tlb(device_t dev)
1896 {
1897 }
1898
1899 static int
1900 agp_i810_enable(device_t dev, u_int32_t mode)
1901 {
1902
1903         return (0);
1904 }
1905
1906 static struct agp_memory *
1907 agp_i810_alloc_memory(device_t dev, int type, vm_size_t size)
1908 {
1909         struct agp_i810_softc *sc;
1910         struct agp_memory *mem;
1911         vm_page_t m;
1912
1913         sc = device_get_softc(dev);
1914
1915         if ((size & (AGP_PAGE_SIZE - 1)) != 0 ||
1916             sc->agp.as_allocated + size > sc->agp.as_maxmem)
1917                 return (0);
1918
1919         if (type == 1) {
1920                 /*
1921                  * Mapping local DRAM into GATT.
1922                  */
1923                 if (sc->match->driver->chiptype != CHIP_I810)
1924                         return (0);
1925                 if (size != sc->dcache_size)
1926                         return (0);
1927         } else if (type == 2) {
1928                 /*
1929                  * Type 2 is the contiguous physical memory type, that hands
1930                  * back a physical address.  This is used for cursors on i810.
1931                  * Hand back as many single pages with physical as the user
1932                  * wants, but only allow one larger allocation (ARGB cursor)
1933                  * for simplicity.
1934                  */
1935                 if (size != AGP_PAGE_SIZE) {
1936                         if (sc->argb_cursor != NULL)
1937                                 return (0);
1938
1939                         /* Allocate memory for ARGB cursor, if we can. */
1940                         sc->argb_cursor = contigmalloc(size, M_AGP,
1941                            0, 0, ~0, PAGE_SIZE, 0);
1942                         if (sc->argb_cursor == NULL)
1943                                 return (0);
1944                 }
1945         }
1946
1947         mem = kmalloc(sizeof *mem, M_AGP, M_INTWAIT);
1948         mem->am_id = sc->agp.as_nextid++;
1949         mem->am_size = size;
1950         mem->am_type = type;
1951         if (type != 1 && (type != 2 || size == AGP_PAGE_SIZE))
1952                 mem->am_obj = vm_object_allocate(OBJT_DEFAULT,
1953                     atop(round_page(size)));
1954         else
1955                 mem->am_obj = 0;
1956
1957         if (type == 2) {
1958                 if (size == AGP_PAGE_SIZE) {
1959                         /*
1960                          * Allocate and wire down the page now so that we can
1961                          * get its physical address.
1962                          */
1963                         VM_OBJECT_LOCK(mem->am_obj);
1964                         m = vm_page_grab(mem->am_obj, 0, VM_ALLOC_NORMAL |
1965                                                          VM_ALLOC_ZERO |
1966                                                          VM_ALLOC_RETRY);
1967                         vm_page_wire(m);
1968                         VM_OBJECT_UNLOCK(mem->am_obj);
1969                         mem->am_physical = VM_PAGE_TO_PHYS(m);
1970                         vm_page_wakeup(m);
1971                 } else {
1972                         /* Our allocation is already nicely wired down for us.
1973                          * Just grab the physical address.
1974                          */
1975                         mem->am_physical = vtophys(sc->argb_cursor);
1976                 }
1977         } else
1978                 mem->am_physical = 0;
1979
1980         mem->am_offset = 0;
1981         mem->am_is_bound = 0;
1982         TAILQ_INSERT_TAIL(&sc->agp.as_memory, mem, am_link);
1983         sc->agp.as_allocated += size;
1984
1985         return (mem);
1986 }
1987
1988 static int
1989 agp_i810_free_memory(device_t dev, struct agp_memory *mem)
1990 {
1991         struct agp_i810_softc *sc;
1992
1993         if (mem->am_is_bound)
1994                 return (EBUSY);
1995
1996         sc = device_get_softc(dev);
1997
1998         if (mem->am_type == 2) {
1999                 if (mem->am_size == AGP_PAGE_SIZE) {
2000                         /*
2001                          * Unwire the page which we wired in alloc_memory.
2002                          */
2003                         vm_page_t m;
2004
2005                         vm_object_hold(mem->am_obj);
2006                         m = vm_page_lookup_busy_wait(mem->am_obj, 0,
2007                                                      FALSE, "agppg");
2008                         vm_object_drop(mem->am_obj);
2009                         vm_page_unwire(m, 0);
2010                         vm_page_wakeup(m);
2011                 } else {
2012                         contigfree(sc->argb_cursor, mem->am_size, M_AGP);
2013                         sc->argb_cursor = NULL;
2014                 }
2015         }
2016
2017         sc->agp.as_allocated -= mem->am_size;
2018         TAILQ_REMOVE(&sc->agp.as_memory, mem, am_link);
2019         if (mem->am_obj)
2020                 vm_object_deallocate(mem->am_obj);
2021         kfree(mem, M_AGP);
2022         return (0);
2023 }
2024
2025 static int
2026 agp_i810_bind_memory(device_t dev, struct agp_memory *mem, vm_offset_t offset)
2027 {
2028         struct agp_i810_softc *sc;
2029         vm_offset_t i;
2030
2031         /* Do some sanity checks first. */
2032         if ((offset & (AGP_PAGE_SIZE - 1)) != 0 ||
2033             offset + mem->am_size > AGP_GET_APERTURE(dev)) {
2034                 device_printf(dev, "binding memory at bad offset %#x\n",
2035                     (int)offset);
2036                 return (EINVAL);
2037         }
2038
2039         sc = device_get_softc(dev);
2040         if (mem->am_type == 2 && mem->am_size != AGP_PAGE_SIZE) {
2041                 lockmgr(&sc->agp.as_lock, LK_EXCLUSIVE);
2042                 if (mem->am_is_bound) {
2043                         lockmgr(&sc->agp.as_lock, LK_RELEASE);
2044                         return EINVAL;
2045                 }
2046                 /* The memory's already wired down, just stick it in the GTT. */
2047                 for (i = 0; i < mem->am_size; i += AGP_PAGE_SIZE) {
2048                         sc->match->driver->install_gtt_pte(dev, (offset + i) >>
2049                             AGP_PAGE_SHIFT, mem->am_physical + i, 0);
2050                 }
2051                 agp_flush_cache();
2052                 mem->am_offset = offset;
2053                 mem->am_is_bound = 1;
2054                 lockmgr(&sc->agp.as_lock, LK_RELEASE);
2055                 return (0);
2056         }
2057
2058         if (mem->am_type != 1)
2059                 return (agp_generic_bind_memory(dev, mem, offset));
2060
2061         /*
2062          * Mapping local DRAM into GATT.
2063          */
2064         if (sc->match->driver->chiptype != CHIP_I810)
2065                 return (EINVAL);
2066         for (i = 0; i < mem->am_size; i += AGP_PAGE_SIZE)
2067                 bus_write_4(sc->sc_res[0],
2068                     AGP_I810_GTT + (i >> AGP_PAGE_SHIFT) * 4, i | 3);
2069
2070         return (0);
2071 }
2072
2073 static int
2074 agp_i810_unbind_memory(device_t dev, struct agp_memory *mem)
2075 {
2076         struct agp_i810_softc *sc;
2077         vm_offset_t i;
2078
2079         sc = device_get_softc(dev);
2080
2081         if (mem->am_type == 2 && mem->am_size != AGP_PAGE_SIZE) {
2082                 lockmgr(&sc->agp.as_lock, LK_EXCLUSIVE);
2083                 if (!mem->am_is_bound) {
2084                         lockmgr(&sc->agp.as_lock, LK_RELEASE);
2085                         return (EINVAL);
2086                 }
2087
2088                 for (i = 0; i < mem->am_size; i += AGP_PAGE_SIZE) {
2089                         sc->match->driver->install_gtt_pte(dev,
2090                             (mem->am_offset + i) >> AGP_PAGE_SHIFT, 0, 0);
2091                 }
2092                 agp_flush_cache();
2093                 mem->am_is_bound = 0;
2094                 lockmgr(&sc->agp.as_lock, LK_RELEASE);
2095                 return (0);
2096         }
2097
2098         if (mem->am_type != 1)
2099                 return (agp_generic_unbind_memory(dev, mem));
2100
2101         if (sc->match->driver->chiptype != CHIP_I810)
2102                 return (EINVAL);
2103         for (i = 0; i < mem->am_size; i += AGP_PAGE_SIZE) {
2104                 sc->match->driver->install_gtt_pte(dev, i >> AGP_PAGE_SHIFT,
2105                     0, 0);
2106         }
2107         return (0);
2108 }
2109
2110 static device_method_t agp_i810_methods[] = {
2111         /* Device interface */
2112         DEVMETHOD(device_identify,      agp_i810_identify),
2113         DEVMETHOD(device_probe,         agp_i810_probe),
2114         DEVMETHOD(device_attach,        agp_i810_attach),
2115         DEVMETHOD(device_detach,        agp_i810_detach),
2116         DEVMETHOD(device_suspend,       bus_generic_suspend),
2117         DEVMETHOD(device_resume,        agp_i810_resume),
2118
2119         /* AGP interface */
2120         DEVMETHOD(agp_get_aperture,     agp_generic_get_aperture),
2121         DEVMETHOD(agp_set_aperture,     agp_i810_method_set_aperture),
2122         DEVMETHOD(agp_bind_page,        agp_i810_bind_page),
2123         DEVMETHOD(agp_unbind_page,      agp_i810_unbind_page),
2124         DEVMETHOD(agp_flush_tlb,        agp_i810_flush_tlb),
2125         DEVMETHOD(agp_enable,           agp_i810_enable),
2126         DEVMETHOD(agp_alloc_memory,     agp_i810_alloc_memory),
2127         DEVMETHOD(agp_free_memory,      agp_i810_free_memory),
2128         DEVMETHOD(agp_bind_memory,      agp_i810_bind_memory),
2129         DEVMETHOD(agp_unbind_memory,    agp_i810_unbind_memory),
2130         DEVMETHOD(agp_chipset_flush,    agp_intel_gtt_chipset_flush),
2131
2132         DEVMETHOD_END
2133 };
2134
2135 static driver_t agp_i810_driver = {
2136         "agp",
2137         agp_i810_methods,
2138         sizeof(struct agp_i810_softc),
2139 };
2140
2141 static devclass_t agp_devclass;
2142
2143 DRIVER_MODULE(agp_i810, vgapci, agp_i810_driver, agp_devclass, NULL, NULL);
2144 MODULE_DEPEND(agp_i810, agp, 1, 1, 1);
2145 MODULE_DEPEND(agp_i810, pci, 1, 1, 1);
2146
2147 extern vm_page_t bogus_page;
2148
2149 void
2150 agp_intel_gtt_clear_range(device_t dev, u_int first_entry, u_int num_entries)
2151 {
2152         struct agp_i810_softc *sc;
2153         u_int i;
2154
2155         sc = device_get_softc(dev);
2156         for (i = 0; i < num_entries; i++)
2157                 sc->match->driver->install_gtt_pte(dev, first_entry + i,
2158                     VM_PAGE_TO_PHYS(bogus_page), 0);
2159         sc->match->driver->read_gtt_pte(dev, first_entry + num_entries - 1);
2160 }
2161
2162 void
2163 agp_intel_gtt_insert_pages(device_t dev, u_int first_entry, u_int num_entries,
2164     vm_page_t *pages, u_int flags)
2165 {
2166         struct agp_i810_softc *sc;
2167         u_int i;
2168
2169         sc = device_get_softc(dev);
2170         for (i = 0; i < num_entries; i++) {
2171                 KKASSERT(pages[i]->valid == VM_PAGE_BITS_ALL);
2172                 KKASSERT(pages[i]->wire_count > 0);
2173                 sc->match->driver->install_gtt_pte(dev, first_entry + i,
2174                     VM_PAGE_TO_PHYS(pages[i]), flags);
2175         }
2176         sc->match->driver->read_gtt_pte(dev, first_entry + num_entries - 1);
2177 }
2178
2179 struct intel_gtt
2180 agp_intel_gtt_get(device_t dev)
2181 {
2182         struct agp_i810_softc *sc;
2183         struct intel_gtt res;
2184
2185         sc = device_get_softc(dev);
2186         res.stolen_size = sc->stolen_size;
2187         res.gtt_total_entries = sc->gtt_total_entries;
2188         res.gtt_mappable_entries = sc->gtt_mappable_entries;
2189         res.do_idle_maps = 0;
2190         res.scratch_page_dma = VM_PAGE_TO_PHYS(bogus_page);
2191         return (res);
2192 }
2193
2194 static int
2195 agp_i810_chipset_flush_setup(device_t dev)
2196 {
2197
2198         return (0);
2199 }
2200
2201 static void
2202 agp_i810_chipset_flush_teardown(device_t dev)
2203 {
2204
2205         /* Nothing to do. */
2206 }
2207
2208 static void
2209 agp_i810_chipset_flush(device_t dev)
2210 {
2211
2212         /* Nothing to do. */
2213 }
2214
2215 static void
2216 agp_i830_chipset_flush(device_t dev)
2217 {
2218         struct agp_i810_softc *sc;
2219         uint32_t hic;
2220         int i;
2221
2222         sc = device_get_softc(dev);
2223         cpu_wbinvd_on_all_cpus();
2224         hic = bus_read_4(sc->sc_res[0], AGP_I830_HIC);
2225         bus_write_4(sc->sc_res[0], AGP_I830_HIC, hic | (1 << 31));
2226         for (i = 0; i < 20000 /* 1 sec */; i++) {
2227                 hic = bus_read_4(sc->sc_res[0], AGP_I830_HIC);
2228                 if ((hic & (1 << 31)) != 0)
2229                         break;
2230                 DELAY(50);
2231         }
2232 }
2233
2234 static int
2235 agp_i915_chipset_flush_alloc_page(device_t dev, uint64_t start, uint64_t end)
2236 {
2237         struct agp_i810_softc *sc;
2238         device_t vga;
2239
2240         sc = device_get_softc(dev);
2241         vga = device_get_parent(dev);
2242         sc->sc_flush_page_rid = 100;
2243         sc->sc_flush_page_res = BUS_ALLOC_RESOURCE(device_get_parent(vga), dev,
2244             SYS_RES_MEMORY, &sc->sc_flush_page_rid, start, end, PAGE_SIZE,
2245             RF_ACTIVE, -1);
2246         if (sc->sc_flush_page_res == NULL) {
2247                 device_printf(dev, "Failed to allocate flush page at 0x%jx\n",
2248                     (uintmax_t)start);
2249                 return (EINVAL);
2250         }
2251         sc->sc_flush_page_vaddr = rman_get_virtual(sc->sc_flush_page_res);
2252         if (bootverbose) {
2253                 device_printf(dev, "Allocated flush page phys 0x%jx virt %p\n",
2254                     (uintmax_t)rman_get_start(sc->sc_flush_page_res),
2255                     sc->sc_flush_page_vaddr);
2256         }
2257         return (0);
2258 }
2259
2260 static void
2261 agp_i915_chipset_flush_free_page(device_t dev)
2262 {
2263         struct agp_i810_softc *sc;
2264         device_t vga;
2265
2266         sc = device_get_softc(dev);
2267         vga = device_get_parent(dev);
2268         if (sc->sc_flush_page_res == NULL)
2269                 return;
2270         BUS_DEACTIVATE_RESOURCE(device_get_parent(vga), dev, SYS_RES_MEMORY,
2271             sc->sc_flush_page_rid, sc->sc_flush_page_res);
2272         BUS_RELEASE_RESOURCE(device_get_parent(vga), dev, SYS_RES_MEMORY,
2273             sc->sc_flush_page_rid, sc->sc_flush_page_res);
2274 }
2275
2276 static int
2277 agp_i915_chipset_flush_setup(device_t dev)
2278 {
2279         struct agp_i810_softc *sc;
2280         uint32_t temp;
2281         int error;
2282
2283         sc = device_get_softc(dev);
2284         temp = pci_read_config(sc->bdev, AGP_I915_IFPADDR, 4);
2285         if ((temp & 1) != 0) {
2286                 temp &= ~1;
2287                 if (bootverbose)
2288                         device_printf(dev,
2289                             "Found already configured flush page at 0x%jx\n",
2290                             (uintmax_t)temp);
2291                 sc->sc_bios_allocated_flush_page = 1;
2292                 /*
2293                  * In the case BIOS initialized the flush pointer (?)
2294                  * register, expect that BIOS also set up the resource
2295                  * for the page.
2296                  */
2297                 error = agp_i915_chipset_flush_alloc_page(dev, temp,
2298                     temp + PAGE_SIZE - 1);
2299                 if (error != 0)
2300                         return (error);
2301         } else {
2302                 sc->sc_bios_allocated_flush_page = 0;
2303                 error = agp_i915_chipset_flush_alloc_page(dev, 0, 0xffffffff);
2304                 if (error != 0)
2305                         return (error);
2306                 temp = rman_get_start(sc->sc_flush_page_res);
2307                 pci_write_config(sc->bdev, AGP_I915_IFPADDR, temp | 1, 4);
2308         }
2309         return (0);
2310 }
2311
2312 static void
2313 agp_i915_chipset_flush_teardown(device_t dev)
2314 {
2315         struct agp_i810_softc *sc;
2316         uint32_t temp;
2317
2318         sc = device_get_softc(dev);
2319         if (sc->sc_flush_page_res == NULL)
2320                 return;
2321         if (!sc->sc_bios_allocated_flush_page) {
2322                 temp = pci_read_config(sc->bdev, AGP_I915_IFPADDR, 4);
2323                 temp &= ~1;
2324                 pci_write_config(sc->bdev, AGP_I915_IFPADDR, temp, 4);
2325         }
2326         agp_i915_chipset_flush_free_page(dev);
2327 }
2328
2329 static int
2330 agp_i965_chipset_flush_setup(device_t dev)
2331 {
2332         struct agp_i810_softc *sc;
2333         uint64_t temp;
2334         uint32_t temp_hi, temp_lo;
2335         int error;
2336
2337         sc = device_get_softc(dev);
2338
2339         temp_hi = pci_read_config(sc->bdev, AGP_I965_IFPADDR + 4, 4);
2340         temp_lo = pci_read_config(sc->bdev, AGP_I965_IFPADDR, 4);
2341
2342         if ((temp_lo & 1) != 0) {
2343                 temp = ((uint64_t)temp_hi << 32) | (temp_lo & ~1);
2344                 if (bootverbose)
2345                         device_printf(dev,
2346                             "Found already configured flush page at 0x%jx\n",
2347                             (uintmax_t)temp);
2348                 sc->sc_bios_allocated_flush_page = 1;
2349                 /*
2350                  * In the case BIOS initialized the flush pointer (?)
2351                  * register, expect that BIOS also set up the resource
2352                  * for the page.
2353                  */
2354                 error = agp_i915_chipset_flush_alloc_page(dev, temp,
2355                     temp + PAGE_SIZE - 1);
2356                 if (error != 0)
2357                         return (error);
2358         } else {
2359                 sc->sc_bios_allocated_flush_page = 0;
2360                 error = agp_i915_chipset_flush_alloc_page(dev, 0, ~0);
2361                 if (error != 0)
2362                         return (error);
2363                 temp = rman_get_start(sc->sc_flush_page_res);
2364                 pci_write_config(sc->bdev, AGP_I965_IFPADDR + 4,
2365                     (temp >> 32) & UINT32_MAX, 4);
2366                 pci_write_config(sc->bdev, AGP_I965_IFPADDR,
2367                     (temp & UINT32_MAX) | 1, 4);
2368         }
2369         return (0);
2370 }
2371
2372 static void
2373 agp_i965_chipset_flush_teardown(device_t dev)
2374 {
2375         struct agp_i810_softc *sc;
2376         uint32_t temp_lo;
2377
2378         sc = device_get_softc(dev);
2379         if (sc->sc_flush_page_res == NULL)
2380                 return;
2381         if (!sc->sc_bios_allocated_flush_page) {
2382                 temp_lo = pci_read_config(sc->bdev, AGP_I965_IFPADDR, 4);
2383                 temp_lo &= ~1;
2384                 pci_write_config(sc->bdev, AGP_I965_IFPADDR, temp_lo, 4);
2385         }
2386         agp_i915_chipset_flush_free_page(dev);
2387 }
2388
2389 static void
2390 agp_i915_chipset_flush(device_t dev)
2391 {
2392         struct agp_i810_softc *sc;
2393
2394         sc = device_get_softc(dev);
2395         *(uint32_t *)sc->sc_flush_page_vaddr = 1;
2396 }
2397
2398 int
2399 agp_intel_gtt_chipset_flush(device_t dev)
2400 {
2401         struct agp_i810_softc *sc;
2402
2403         sc = device_get_softc(dev);
2404         sc->match->driver->chipset_flush(dev);
2405         return (0);
2406 }
2407
2408 void
2409 agp_intel_gtt_unmap_memory(device_t dev, struct sglist *sg_list)
2410 {
2411 }
2412
2413 int
2414 agp_intel_gtt_map_memory(device_t dev, vm_page_t *pages, u_int num_entries,
2415     struct sglist **sg_list)
2416 {
2417 #if 0
2418         struct agp_i810_softc *sc;
2419 #endif
2420         struct sglist *sg;
2421         int i;
2422 #if 0
2423         int error;
2424         bus_dma_tag_t dmat;
2425 #endif
2426
2427         if (*sg_list != NULL)
2428                 return (0);
2429 #if 0
2430         sc = device_get_softc(dev);
2431 #endif
2432         sg = sglist_alloc(num_entries, M_WAITOK /* XXXKIB */);
2433         for (i = 0; i < num_entries; i++) {
2434                 sg->sg_segs[i].ss_paddr = VM_PAGE_TO_PHYS(pages[i]);
2435                 sg->sg_segs[i].ss_len = PAGE_SIZE;
2436         }
2437
2438 #if 0
2439         error = bus_dma_tag_create(bus_get_dma_tag(dev),
2440             1 /* alignment */, 0 /* boundary */,
2441             1ULL << sc->match->busdma_addr_mask_sz /* lowaddr */,
2442             BUS_SPACE_MAXADDR /* highaddr */,
2443             NULL /* filtfunc */, NULL /* filtfuncarg */,
2444             BUS_SPACE_MAXADDR /* maxsize */,
2445             BUS_SPACE_UNRESTRICTED /* nsegments */,
2446             BUS_SPACE_MAXADDR /* maxsegsz */,
2447             0 /* flags */, NULL /* lockfunc */, NULL /* lockfuncarg */,
2448             &dmat);
2449         if (error != 0) {
2450                 sglist_free(sg);
2451                 return (error);
2452         }
2453         /* XXXKIB */
2454 #endif
2455         *sg_list = sg;
2456         return (0);
2457 }
2458
2459 void
2460 agp_intel_gtt_insert_sg_entries(device_t dev, struct sglist *sg_list,
2461     u_int first_entry, u_int flags)
2462 {
2463         struct agp_i810_softc *sc;
2464         vm_paddr_t spaddr;
2465         size_t slen;
2466         u_int i, j;
2467
2468         sc = device_get_softc(dev);
2469         for (i = j = 0; j < sg_list->sg_nseg; j++) {
2470                 spaddr = sg_list->sg_segs[i].ss_paddr;
2471                 slen = sg_list->sg_segs[i].ss_len;
2472                 for (; slen > 0; i++) {
2473                         sc->match->driver->install_gtt_pte(dev, first_entry + i,
2474                             spaddr, flags);
2475                         spaddr += AGP_PAGE_SIZE;
2476                         slen -= AGP_PAGE_SIZE;
2477                 }
2478         }
2479         sc->match->driver->read_gtt_pte(dev, first_entry + i - 1);
2480 }
2481
2482 void
2483 intel_gtt_clear_range(u_int first_entry, u_int num_entries)
2484 {
2485
2486         agp_intel_gtt_clear_range(intel_agp, first_entry, num_entries);
2487 }
2488
2489 void
2490 intel_gtt_insert_pages(u_int first_entry, u_int num_entries, vm_page_t *pages,
2491     u_int flags)
2492 {
2493
2494         agp_intel_gtt_insert_pages(intel_agp, first_entry, num_entries,
2495             pages, flags);
2496 }
2497
2498 struct intel_gtt
2499 intel_gtt_get(void)
2500 {
2501
2502         return (agp_intel_gtt_get(intel_agp));
2503 }
2504
2505 int
2506 intel_gtt_chipset_flush(void)
2507 {
2508
2509         return (agp_intel_gtt_chipset_flush(intel_agp));
2510 }
2511
2512 void
2513 intel_gtt_unmap_memory(struct sglist *sg_list)
2514 {
2515
2516         agp_intel_gtt_unmap_memory(intel_agp, sg_list);
2517 }
2518
2519 int
2520 intel_gtt_map_memory(vm_page_t *pages, u_int num_entries,
2521     struct sglist **sg_list)
2522 {
2523
2524         return (agp_intel_gtt_map_memory(intel_agp, pages, num_entries,
2525             sg_list));
2526 }
2527
2528 void
2529 intel_gtt_insert_sg_entries(struct sglist *sg_list, u_int first_entry,
2530     u_int flags)
2531 {
2532
2533         agp_intel_gtt_insert_sg_entries(intel_agp, sg_list, first_entry, flags);
2534 }
2535
2536 device_t
2537 intel_gtt_get_bridge_device(void)
2538 {
2539         struct agp_i810_softc *sc;
2540
2541         sc = device_get_softc(intel_agp);
2542         return (sc->bdev);
2543 }
2544
2545 vm_paddr_t
2546 intel_gtt_read_pte_paddr(u_int entry)
2547 {
2548         struct agp_i810_softc *sc;
2549
2550         sc = device_get_softc(intel_agp);
2551         return (sc->match->driver->read_gtt_pte_paddr(intel_agp, entry));
2552 }
2553
2554 u_int32_t
2555 intel_gtt_read_pte(u_int entry)
2556 {
2557         struct agp_i810_softc *sc;
2558
2559         sc = device_get_softc(intel_agp);
2560         return (sc->match->driver->read_gtt_pte(intel_agp, entry));
2561 }
2562
2563 void
2564 intel_gtt_write(u_int entry, uint32_t val)
2565 {
2566         struct agp_i810_softc *sc;
2567
2568         sc = device_get_softc(intel_agp);
2569         sc->match->driver->write_gtt(intel_agp, entry, val);
2570 }