2 * Copyright (c) 1982, 1987, 1990 The Regents of the University of California.
3 * Copyright (c) 1992 Terrence R. Lambert.
4 * Copyright (c) 2003 Peter Wemm.
5 * Copyright (c) 2008 The DragonFly Project.
8 * This code is derived from software contributed to Berkeley by
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
19 * 3. All advertising materials mentioning features or use of this software
20 * must display the following acknowledgement:
21 * This product includes software developed by the University of
22 * California, Berkeley and its contributors.
23 * 4. Neither the name of the University nor the names of its contributors
24 * may be used to endorse or promote products derived from this software
25 * without specific prior written permission.
27 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
28 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
29 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
30 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
31 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
32 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
33 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
34 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
35 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
36 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
39 * from: @(#)machdep.c 7.4 (Berkeley) 6/3/91
40 * $FreeBSD: src/sys/i386/i386/machdep.c,v 1.385.2.30 2003/05/31 08:48:05 alc Exp $
43 //#include "use_npx.h"
45 #include "opt_compat.h"
48 #include "opt_directio.h"
51 #include "opt_msgbuf.h"
54 #include <sys/param.h>
55 #include <sys/systm.h>
56 #include <sys/sysproto.h>
57 #include <sys/signalvar.h>
58 #include <sys/kernel.h>
59 #include <sys/linker.h>
60 #include <sys/malloc.h>
64 #include <sys/reboot.h>
66 #include <sys/msgbuf.h>
67 #include <sys/sysent.h>
68 #include <sys/sysctl.h>
69 #include <sys/vmmeter.h>
71 #include <sys/usched.h>
75 #include <vm/vm_param.h>
77 #include <vm/vm_kern.h>
78 #include <vm/vm_object.h>
79 #include <vm/vm_page.h>
80 #include <vm/vm_map.h>
81 #include <vm/vm_pager.h>
82 #include <vm/vm_extern.h>
84 #include <sys/thread2.h>
85 #include <sys/mplock2.h>
86 #include <sys/mutex2.h>
94 #include <machine/cpu.h>
95 #include <machine/clock.h>
96 #include <machine/specialreg.h>
98 #include <machine/bootinfo.h>
100 #include <machine/md_var.h>
101 #include <machine/metadata.h>
102 #include <machine/pc/bios.h>
103 #include <machine/pcb_ext.h> /* pcb.h included via sys/user.h */
104 #include <machine/globaldata.h> /* CPU_prvspace */
105 #include <machine/smp.h>
107 #include <machine/perfmon.h>
109 #include <machine/cputypes.h>
110 #include <machine/intr_machdep.h>
113 #include <bus/isa/isa_device.h>
115 #include <machine_base/isa/isa_intr.h>
116 #include <bus/isa/rtc.h>
117 #include <sys/random.h>
118 #include <sys/ptrace.h>
119 #include <machine/sigframe.h>
121 #include <sys/machintr.h>
122 #include <machine_base/icu/icu_abi.h>
123 #include <machine_base/icu/elcr_var.h>
124 #include <machine_base/apic/lapic.h>
125 #include <machine_base/apic/ioapic.h>
126 #include <machine_base/apic/ioapic_abi.h>
127 #include <machine/mptable.h>
129 #define PHYSMAP_ENTRIES 10
131 extern u_int64_t hammer_time(u_int64_t, u_int64_t);
133 extern void printcpuinfo(void); /* XXX header file */
134 extern void identify_cpu(void);
136 extern void finishidentcpu(void);
138 extern void panicifcpuunsupported(void);
140 static void cpu_startup(void *);
141 static void pic_finish(void *);
142 static void cpu_finish(void *);
144 #ifndef CPU_DISABLE_SSE
145 static void set_fpregs_xmm(struct save87 *, struct savexmm *);
146 static void fill_fpregs_xmm(struct savexmm *, struct save87 *);
147 #endif /* CPU_DISABLE_SSE */
149 extern void ffs_rawread_setup(void);
150 #endif /* DIRECTIO */
151 static void init_locks(void);
153 SYSINIT(cpu, SI_BOOT2_START_CPU, SI_ORDER_FIRST, cpu_startup, NULL)
154 SYSINIT(pic_finish, SI_BOOT2_FINISH_PIC, SI_ORDER_FIRST, pic_finish, NULL)
155 SYSINIT(cpu_finish, SI_BOOT2_FINISH_CPU, SI_ORDER_FIRST, cpu_finish, NULL)
158 extern vm_offset_t ksym_start, ksym_end;
161 struct privatespace CPU_prvspace[MAXCPU] __aligned(4096); /* XXX */
163 int _udatasel, _ucodesel, _ucode32sel;
165 int64_t tsc_offsets[MAXCPU];
168 #if defined(SWTCH_OPTIM_STATS)
169 extern int swtch_optim_stats;
170 SYSCTL_INT(_debug, OID_AUTO, swtch_optim_stats,
171 CTLFLAG_RD, &swtch_optim_stats, 0, "");
172 SYSCTL_INT(_debug, OID_AUTO, tlb_flush_count,
173 CTLFLAG_RD, &tlb_flush_count, 0, "");
175 SYSCTL_INT(_hw, OID_AUTO, cpu_mwait_halt,
176 CTLFLAG_RW, &cpu_mwait_halt, 0, "");
180 u_long ebda_addr = 0;
182 int imcr_present = 0;
184 int naps = 0; /* # of Applications processors */
187 struct mtx dt_lock; /* lock for GDT and LDT */
190 sysctl_hw_physmem(SYSCTL_HANDLER_ARGS)
192 u_long pmem = ctob(physmem);
194 int error = sysctl_handle_long(oidp, &pmem, 0, req);
198 SYSCTL_PROC(_hw, HW_PHYSMEM, physmem, CTLTYPE_ULONG|CTLFLAG_RD,
199 0, 0, sysctl_hw_physmem, "LU", "Total system memory in bytes (number of pages * page size)");
202 sysctl_hw_usermem(SYSCTL_HANDLER_ARGS)
204 int error = sysctl_handle_int(oidp, 0,
205 ctob(physmem - vmstats.v_wire_count), req);
209 SYSCTL_PROC(_hw, HW_USERMEM, usermem, CTLTYPE_INT|CTLFLAG_RD,
210 0, 0, sysctl_hw_usermem, "IU", "");
213 sysctl_hw_availpages(SYSCTL_HANDLER_ARGS)
215 int error = sysctl_handle_int(oidp, 0,
216 x86_64_btop(avail_end - avail_start), req);
220 SYSCTL_PROC(_hw, OID_AUTO, availpages, CTLTYPE_INT|CTLFLAG_RD,
221 0, 0, sysctl_hw_availpages, "I", "");
227 * The number of PHYSMAP entries must be one less than the number of
228 * PHYSSEG entries because the PHYSMAP entry that spans the largest
229 * physical address that is accessible by ISA DMA is split into two
232 #define PHYSMAP_SIZE (2 * (VM_PHYSSEG_MAX - 1))
234 vm_paddr_t phys_avail[PHYSMAP_SIZE + 2];
235 vm_paddr_t dump_avail[PHYSMAP_SIZE + 2];
237 /* must be 2 less so 0 0 can signal end of chunks */
238 #define PHYS_AVAIL_ARRAY_END (NELEM(phys_avail) - 2)
239 #define DUMP_AVAIL_ARRAY_END (NELEM(dump_avail) - 2)
241 static vm_offset_t buffer_sva, buffer_eva;
242 vm_offset_t clean_sva, clean_eva;
243 static vm_offset_t pager_sva, pager_eva;
244 static struct trapframe proc0_tf;
247 cpu_startup(void *dummy)
251 vm_offset_t firstaddr;
254 * Good {morning,afternoon,evening,night}.
256 kprintf("%s", version);
259 panicifcpuunsupported();
263 kprintf("real memory = %ju (%ju MB)\n",
265 (intmax_t)Realmem / 1024 / 1024);
267 * Display any holes after the first chunk of extended memory.
272 kprintf("Physical memory chunk(s):\n");
273 for (indx = 0; phys_avail[indx + 1] != 0; indx += 2) {
274 vm_paddr_t size1 = phys_avail[indx + 1] - phys_avail[indx];
276 kprintf("0x%08jx - 0x%08jx, %ju bytes (%ju pages)\n",
277 (intmax_t)phys_avail[indx],
278 (intmax_t)phys_avail[indx + 1] - 1,
280 (intmax_t)(size1 / PAGE_SIZE));
285 * Allocate space for system data structures.
286 * The first available kernel virtual address is in "v".
287 * As pages of kernel virtual memory are allocated, "v" is incremented.
288 * As pages of memory are allocated and cleared,
289 * "firstaddr" is incremented.
290 * An index into the kernel page table corresponding to the
291 * virtual memory address maintained in "v" is kept in "mapaddr".
295 * Make two passes. The first pass calculates how much memory is
296 * needed and allocates it. The second pass assigns virtual
297 * addresses to the various data structures.
301 v = (caddr_t)firstaddr;
303 #define valloc(name, type, num) \
304 (name) = (type *)v; v = (caddr_t)((name)+(num))
305 #define valloclim(name, type, num, lim) \
306 (name) = (type *)v; v = (caddr_t)((lim) = ((name)+(num)))
309 * The nominal buffer size (and minimum KVA allocation) is BKVASIZE.
310 * For the first 64MB of ram nominally allocate sufficient buffers to
311 * cover 1/4 of our ram. Beyond the first 64MB allocate additional
312 * buffers to cover 1/20 of our ram over 64MB. When auto-sizing
313 * the buffer cache we limit the eventual kva reservation to
316 * factor represents the 1/4 x ram conversion.
319 long factor = 4 * BKVASIZE / 1024;
320 long kbytes = physmem * (PAGE_SIZE / 1024);
324 nbuf += min((kbytes - 4096) / factor, 65536 / factor);
326 nbuf += (kbytes - 65536) * 2 / (factor * 5);
327 if (maxbcache && nbuf > maxbcache / BKVASIZE)
328 nbuf = maxbcache / BKVASIZE;
332 * Do not allow the buffer_map to be more then 1/2 the size of the
335 if (nbuf > (virtual_end - virtual_start +
336 virtual2_end - virtual2_start) / (BKVASIZE * 2)) {
337 nbuf = (virtual_end - virtual_start +
338 virtual2_end - virtual2_start) / (BKVASIZE * 2);
339 kprintf("Warning: nbufs capped at %ld due to kvm\n", nbuf);
343 * Do not allow the buffer_map to use more than 50% of available
344 * physical-equivalent memory. Since the VM pages which back
345 * individual buffers are typically wired, having too many bufs
346 * can prevent the system from paging properly.
348 if (nbuf > physmem * PAGE_SIZE / (BKVASIZE * 2)) {
349 nbuf = physmem * PAGE_SIZE / (BKVASIZE * 2);
350 kprintf("Warning: nbufs capped at %ld due to physmem\n", nbuf);
354 * Do not allow the sizeof(struct buf) * nbuf to exceed half of
355 * the valloc space which is just the virtual_end - virtual_start
356 * section. We use valloc() to allocate the buf header array.
358 if (nbuf > (virtual_end - virtual_start) / sizeof(struct buf) / 2) {
359 nbuf = (virtual_end - virtual_start) /
360 sizeof(struct buf) / 2;
361 kprintf("Warning: nbufs capped at %ld due to valloc "
362 "considerations", nbuf);
365 nswbuf = lmax(lmin(nbuf / 4, 256), 16);
367 if (nswbuf < NSWBUF_MIN)
374 valloc(swbuf, struct buf, nswbuf);
375 valloc(buf, struct buf, nbuf);
378 * End of first pass, size has been calculated so allocate memory
380 if (firstaddr == 0) {
381 size = (vm_size_t)(v - firstaddr);
382 firstaddr = kmem_alloc(&kernel_map, round_page(size));
384 panic("startup: no room for tables");
389 * End of second pass, addresses have been assigned
391 * nbuf is an int, make sure we don't overflow the field.
393 * On 64-bit systems we always reserve maximal allocations for
394 * buffer cache buffers and there are no fragmentation issues,
395 * so the KVA segment does not have to be excessively oversized.
397 if ((vm_size_t)(v - firstaddr) != size)
398 panic("startup: table size inconsistency");
400 kmem_suballoc(&kernel_map, &clean_map, &clean_sva, &clean_eva,
401 ((vm_offset_t)(nbuf + 16) * BKVASIZE) +
402 (nswbuf * MAXPHYS) + pager_map_size);
403 kmem_suballoc(&clean_map, &buffer_map, &buffer_sva, &buffer_eva,
404 ((vm_offset_t)(nbuf + 16) * BKVASIZE));
405 buffer_map.system_map = 1;
406 kmem_suballoc(&clean_map, &pager_map, &pager_sva, &pager_eva,
407 ((vm_offset_t)nswbuf * MAXPHYS) + pager_map_size);
408 pager_map.system_map = 1;
410 #if defined(USERCONFIG)
412 cninit(); /* the preferred console may have changed */
415 kprintf("avail memory = %ju (%ju MB)\n",
416 (uintmax_t)ptoa(vmstats.v_free_count + vmstats.v_dma_pages),
417 (uintmax_t)ptoa(vmstats.v_free_count + vmstats.v_dma_pages) /
421 * Set up buffers, so they can be used to read disk labels.
424 vm_pager_bufferinit();
428 cpu_finish(void *dummy __unused)
434 pic_finish(void *dummy __unused)
436 /* Log ELCR information */
439 /* Log MPTABLE information */
440 mptable_pci_int_dump();
443 MachIntrABI.finalize();
447 * Send an interrupt to process.
449 * Stack is set up to allow sigcode stored
450 * at top to call routine, followed by kcall
451 * to sigreturn routine below. After sigreturn
452 * resets the signal mask, the stack, and the
453 * frame pointer, it returns to the user
457 sendsig(sig_t catcher, int sig, sigset_t *mask, u_long code)
459 struct lwp *lp = curthread->td_lwp;
460 struct proc *p = lp->lwp_proc;
461 struct trapframe *regs;
462 struct sigacts *psp = p->p_sigacts;
463 struct sigframe sf, *sfp;
467 regs = lp->lwp_md.md_regs;
468 oonstack = (lp->lwp_sigstk.ss_flags & SS_ONSTACK) ? 1 : 0;
470 /* Save user context */
471 bzero(&sf, sizeof(struct sigframe));
472 sf.sf_uc.uc_sigmask = *mask;
473 sf.sf_uc.uc_stack = lp->lwp_sigstk;
474 sf.sf_uc.uc_mcontext.mc_onstack = oonstack;
475 KKASSERT(__offsetof(struct trapframe, tf_rdi) == 0);
476 bcopy(regs, &sf.sf_uc.uc_mcontext.mc_rdi, sizeof(struct trapframe));
478 /* Make the size of the saved context visible to userland */
479 sf.sf_uc.uc_mcontext.mc_len = sizeof(sf.sf_uc.uc_mcontext);
481 /* Allocate and validate space for the signal handler context. */
482 if ((lp->lwp_flags & LWP_ALTSTACK) != 0 && !oonstack &&
483 SIGISMEMBER(psp->ps_sigonstack, sig)) {
484 sp = (char *)(lp->lwp_sigstk.ss_sp + lp->lwp_sigstk.ss_size -
485 sizeof(struct sigframe));
486 lp->lwp_sigstk.ss_flags |= SS_ONSTACK;
488 /* We take red zone into account */
489 sp = (char *)regs->tf_rsp - sizeof(struct sigframe) - 128;
493 * XXX AVX needs 64-byte alignment but sigframe has other fields and
494 * the embedded ucontext is not at the front, so aligning this won't
495 * help us. Fortunately we bcopy in/out of the sigframe, so the
498 * The problem though is if userland winds up trying to use the
501 sfp = (struct sigframe *)((intptr_t)sp & ~(intptr_t)0xF);
503 /* Translate the signal is appropriate */
504 if (p->p_sysent->sv_sigtbl) {
505 if (sig <= p->p_sysent->sv_sigsize)
506 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)];
510 * Build the argument list for the signal handler.
512 * Arguments are in registers (%rdi, %rsi, %rdx, %rcx)
514 regs->tf_rdi = sig; /* argument 1 */
515 regs->tf_rdx = (register_t)&sfp->sf_uc; /* argument 3 */
517 if (SIGISMEMBER(psp->ps_siginfo, sig)) {
519 * Signal handler installed with SA_SIGINFO.
521 * action(signo, siginfo, ucontext)
523 regs->tf_rsi = (register_t)&sfp->sf_si; /* argument 2 */
524 regs->tf_rcx = (register_t)regs->tf_addr; /* argument 4 */
525 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher;
527 /* fill siginfo structure */
528 sf.sf_si.si_signo = sig;
529 sf.sf_si.si_code = code;
530 sf.sf_si.si_addr = (void *)regs->tf_addr;
533 * Old FreeBSD-style arguments.
535 * handler (signo, code, [uc], addr)
537 regs->tf_rsi = (register_t)code; /* argument 2 */
538 regs->tf_rcx = (register_t)regs->tf_addr; /* argument 4 */
539 sf.sf_ahu.sf_handler = catcher;
543 * If we're a vm86 process, we want to save the segment registers.
544 * We also change eflags to be our emulated eflags, not the actual
548 if (regs->tf_eflags & PSL_VM) {
549 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
550 struct vm86_kernel *vm86 = &lp->lwp_thread->td_pcb->pcb_ext->ext_vm86;
552 sf.sf_uc.uc_mcontext.mc_gs = tf->tf_vm86_gs;
553 sf.sf_uc.uc_mcontext.mc_fs = tf->tf_vm86_fs;
554 sf.sf_uc.uc_mcontext.mc_es = tf->tf_vm86_es;
555 sf.sf_uc.uc_mcontext.mc_ds = tf->tf_vm86_ds;
557 if (vm86->vm86_has_vme == 0)
558 sf.sf_uc.uc_mcontext.mc_eflags =
559 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) |
560 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP));
563 * Clear PSL_NT to inhibit T_TSSFLT faults on return from
564 * syscalls made by the signal handler. This just avoids
565 * wasting time for our lazy fixup of such faults. PSL_NT
566 * does nothing in vm86 mode, but vm86 programs can set it
567 * almost legitimately in probes for old cpu types.
569 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP);
574 * Save the FPU state and reinit the FP unit
576 npxpush(&sf.sf_uc.uc_mcontext);
579 * Copy the sigframe out to the user's stack.
581 if (copyout(&sf, sfp, sizeof(struct sigframe)) != 0) {
583 * Something is wrong with the stack pointer.
584 * ...Kill the process.
589 regs->tf_rsp = (register_t)sfp;
590 regs->tf_rip = PS_STRINGS - *(p->p_sysent->sv_szsigcode);
593 * i386 abi specifies that the direction flag must be cleared
596 regs->tf_rflags &= ~(PSL_T|PSL_D);
599 * 64 bit mode has a code and stack selector but
600 * no data or extra selector. %fs and %gs are not
603 regs->tf_cs = _ucodesel;
604 regs->tf_ss = _udatasel;
609 * Sanitize the trapframe for a virtual kernel passing control to a custom
610 * VM context. Remove any items that would otherwise create a privilage
613 * XXX at the moment we allow userland to set the resume flag. Is this a
617 cpu_sanitize_frame(struct trapframe *frame)
619 frame->tf_cs = _ucodesel;
620 frame->tf_ss = _udatasel;
621 /* XXX VM (8086) mode not supported? */
622 frame->tf_rflags &= (PSL_RF | PSL_USERCHANGE | PSL_VM_UNSUPP);
623 frame->tf_rflags |= PSL_RESERVED_DEFAULT | PSL_I;
629 * Sanitize the tls so loading the descriptor does not blow up
630 * on us. For x86_64 we don't have to do anything.
633 cpu_sanitize_tls(struct savetls *tls)
639 * sigreturn(ucontext_t *sigcntxp)
641 * System call to cleanup state after a signal
642 * has been taken. Reset signal mask and
643 * stack state from context left by sendsig (above).
644 * Return to previous pc and psl as specified by
645 * context left by sendsig. Check carefully to
646 * make sure that the user has not modified the
647 * state to gain improper privileges.
651 #define EFL_SECURE(ef, oef) ((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0)
652 #define CS_SECURE(cs) (ISPL(cs) == SEL_UPL)
655 sys_sigreturn(struct sigreturn_args *uap)
657 struct lwp *lp = curthread->td_lwp;
658 struct trapframe *regs;
666 * We have to copy the information into kernel space so userland
667 * can't modify it while we are sniffing it.
669 regs = lp->lwp_md.md_regs;
670 error = copyin(uap->sigcntxp, &uc, sizeof(uc));
674 rflags = ucp->uc_mcontext.mc_rflags;
676 /* VM (8086) mode not supported */
677 rflags &= ~PSL_VM_UNSUPP;
680 if (eflags & PSL_VM) {
681 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
682 struct vm86_kernel *vm86;
685 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't
686 * set up the vm86 area, and we can't enter vm86 mode.
688 if (lp->lwp_thread->td_pcb->pcb_ext == 0)
690 vm86 = &lp->lwp_thread->td_pcb->pcb_ext->ext_vm86;
691 if (vm86->vm86_inited == 0)
694 /* go back to user mode if both flags are set */
695 if ((eflags & PSL_VIP) && (eflags & PSL_VIF))
696 trapsignal(lp, SIGBUS, 0);
698 if (vm86->vm86_has_vme) {
699 eflags = (tf->tf_eflags & ~VME_USERCHANGE) |
700 (eflags & VME_USERCHANGE) | PSL_VM;
702 vm86->vm86_eflags = eflags; /* save VIF, VIP */
703 eflags = (tf->tf_eflags & ~VM_USERCHANGE) |
704 (eflags & VM_USERCHANGE) | PSL_VM;
706 bcopy(&ucp->uc_mcontext.mc_gs, tf, sizeof(struct trapframe));
707 tf->tf_eflags = eflags;
708 tf->tf_vm86_ds = tf->tf_ds;
709 tf->tf_vm86_es = tf->tf_es;
710 tf->tf_vm86_fs = tf->tf_fs;
711 tf->tf_vm86_gs = tf->tf_gs;
712 tf->tf_ds = _udatasel;
713 tf->tf_es = _udatasel;
714 tf->tf_fs = _udatasel;
715 tf->tf_gs = _udatasel;
720 * Don't allow users to change privileged or reserved flags.
723 * XXX do allow users to change the privileged flag PSL_RF.
724 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers
725 * should sometimes set it there too. tf_eflags is kept in
726 * the signal context during signal handling and there is no
727 * other place to remember it, so the PSL_RF bit may be
728 * corrupted by the signal handler without us knowing.
729 * Corruption of the PSL_RF bit at worst causes one more or
730 * one less debugger trap, so allowing it is fairly harmless.
732 if (!EFL_SECURE(rflags & ~PSL_RF, regs->tf_rflags & ~PSL_RF)) {
733 kprintf("sigreturn: rflags = 0x%lx\n", (long)rflags);
738 * Don't allow users to load a valid privileged %cs. Let the
739 * hardware check for invalid selectors, excess privilege in
740 * other selectors, invalid %eip's and invalid %esp's.
742 cs = ucp->uc_mcontext.mc_cs;
743 if (!CS_SECURE(cs)) {
744 kprintf("sigreturn: cs = 0x%x\n", cs);
745 trapsignal(lp, SIGBUS, T_PROTFLT);
748 bcopy(&ucp->uc_mcontext.mc_rdi, regs, sizeof(struct trapframe));
752 * Restore the FPU state from the frame
755 npxpop(&ucp->uc_mcontext);
757 if (ucp->uc_mcontext.mc_onstack & 1)
758 lp->lwp_sigstk.ss_flags |= SS_ONSTACK;
760 lp->lwp_sigstk.ss_flags &= ~SS_ONSTACK;
762 lp->lwp_sigmask = ucp->uc_sigmask;
763 SIG_CANTMASK(lp->lwp_sigmask);
770 * Machine dependent boot() routine
772 * I haven't seen anything to put here yet
773 * Possibly some stuff might be grafted back here from boot()
781 * Shutdown the CPU as much as possible
787 __asm__ __volatile("hlt");
791 * cpu_idle() represents the idle LWKT. You cannot return from this function
792 * (unless you want to blow things up!). Instead we look for runnable threads
793 * and loop or halt as appropriate. Giant is not held on entry to the thread.
795 * The main loop is entered with a critical section held, we must release
796 * the critical section before doing anything else. lwkt_switch() will
797 * check for pending interrupts due to entering and exiting its own
800 * NOTE: On an SMP system we rely on a scheduler IPI to wake a HLTed cpu up.
801 * However, there are cases where the idlethread will be entered with
802 * the possibility that no IPI will occur and in such cases
803 * lwkt_switch() sets TDF_IDLE_NOHLT.
805 * NOTE: cpu_idle_hlt again defaults to 2 (use ACPI sleep states). Set to
806 * 1 to just use hlt and for debugging purposes.
808 * NOTE: cpu_idle_repeat determines how many entries into the idle thread
809 * must occur before it starts using ACPI halt.
811 static int cpu_idle_hlt = 2;
812 static int cpu_idle_hltcnt;
813 static int cpu_idle_spincnt;
814 static u_int cpu_idle_repeat = 750;
815 SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_hlt, CTLFLAG_RW,
816 &cpu_idle_hlt, 0, "Idle loop HLT enable");
817 SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_hltcnt, CTLFLAG_RW,
818 &cpu_idle_hltcnt, 0, "Idle loop entry halts");
819 SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_spincnt, CTLFLAG_RW,
820 &cpu_idle_spincnt, 0, "Idle loop entry spins");
821 SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_repeat, CTLFLAG_RW,
822 &cpu_idle_repeat, 0, "Idle entries before acpi hlt");
825 cpu_idle_default_hook(void)
828 * We must guarentee that hlt is exactly the instruction
831 __asm __volatile("sti; hlt");
834 /* Other subsystems (e.g., ACPI) can hook this later. */
835 void (*cpu_idle_hook)(void) = cpu_idle_default_hook;
840 globaldata_t gd = mycpu;
841 struct thread *td __debugvar = gd->gd_curthread;
846 KKASSERT(td->td_critcount == 0);
849 * See if there are any LWKTs ready to go.
854 * When halting inside a cli we must check for reqflags
855 * races, particularly [re]schedule requests. Running
856 * splz() does the job.
859 * 0 Never halt, just spin
861 * 1 Always use HLT (or MONITOR/MWAIT if avail).
862 * This typically eats more power than the
865 * 2 Use HLT/MONITOR/MWAIT up to a point and then
866 * use the ACPI halt (default). This is a hybrid
867 * approach. See machdep.cpu_idle_repeat.
869 * 3 Always use the ACPI halt. This typically
870 * eats the least amount of power but the cpu
871 * will be slow waking up. Slows down e.g.
872 * compiles and other pipe/event oriented stuff.
874 * NOTE: Interrupts are enabled and we are not in a critical
877 * NOTE: Preemptions do not reset gd_idle_repeat. Also we
878 * don't bother capping gd_idle_repeat, it is ok if
881 ++gd->gd_idle_repeat;
882 reqflags = gd->gd_reqflags;
883 quick = (cpu_idle_hlt == 1) ||
885 gd->gd_idle_repeat < cpu_idle_repeat);
887 if (quick && (cpu_mi_feature & CPU_MI_MONITOR) &&
888 (reqflags & RQF_IDLECHECK_WK_MASK) == 0) {
890 cpu_mmw_pause_int(&gd->gd_reqflags, reqflags,
893 } else if (cpu_idle_hlt) {
894 __asm __volatile("cli");
896 if ((gd->gd_reqflags & RQF_IDLECHECK_WK_MASK) == 0) {
898 cpu_idle_default_hook();
902 __asm __volatile("sti");
906 __asm __volatile("sti");
913 * This routine is called if a spinlock has been held through the
914 * exponential backoff period and is seriously contested. On a real cpu
918 cpu_spinlock_contested(void)
924 * Clear registers on exec
927 exec_setregs(u_long entry, u_long stack, u_long ps_strings)
929 struct thread *td = curthread;
930 struct lwp *lp = td->td_lwp;
931 struct pcb *pcb = td->td_pcb;
932 struct trapframe *regs = lp->lwp_md.md_regs;
934 /* was i386_user_cleanup() in NetBSD */
938 bzero((char *)regs, sizeof(struct trapframe));
939 regs->tf_rip = entry;
940 regs->tf_rsp = ((stack - 8) & ~0xFul) + 8; /* align the stack */
941 regs->tf_rdi = stack; /* argv */
942 regs->tf_rflags = PSL_USER | (regs->tf_rflags & PSL_T);
943 regs->tf_ss = _udatasel;
944 regs->tf_cs = _ucodesel;
945 regs->tf_rbx = ps_strings;
948 * Reset the hardware debug registers if they were in use.
949 * They won't have any meaning for the newly exec'd process.
951 if (pcb->pcb_flags & PCB_DBREGS) {
957 pcb->pcb_dr7 = 0; /* JG set bit 10? */
958 if (pcb == td->td_pcb) {
960 * Clear the debug registers on the running
961 * CPU, otherwise they will end up affecting
962 * the next process we switch to.
966 pcb->pcb_flags &= ~PCB_DBREGS;
970 * Initialize the math emulator (if any) for the current process.
971 * Actually, just clear the bit that says that the emulator has
972 * been initialized. Initialization is delayed until the process
973 * traps to the emulator (if it is done at all) mainly because
974 * emulators don't provide an entry point for initialization.
976 pcb->pcb_flags &= ~FP_SOFTFP;
979 * NOTE: do not set CR0_TS here. npxinit() must do it after clearing
980 * gd_npxthread. Otherwise a preemptive interrupt thread
981 * may panic in npxdna().
984 load_cr0(rcr0() | CR0_MP);
987 * NOTE: The MSR values must be correct so we can return to
988 * userland. gd_user_fs/gs must be correct so the switch
989 * code knows what the current MSR values are.
991 pcb->pcb_fsbase = 0; /* Values loaded from PCB on switch */
993 mdcpu->gd_user_fs = 0; /* Cache of current MSR values */
994 mdcpu->gd_user_gs = 0;
995 wrmsr(MSR_FSBASE, 0); /* Set MSR values for return to userland */
996 wrmsr(MSR_KGSBASE, 0);
998 /* Initialize the npx (if any) for the current process. */
999 npxinit(__INITIAL_FPUCW__);
1002 pcb->pcb_ds = _udatasel;
1003 pcb->pcb_es = _udatasel;
1004 pcb->pcb_fs = _udatasel;
1005 pcb->pcb_gs = _udatasel;
1014 cr0 |= CR0_NE; /* Done by npxinit() */
1015 cr0 |= CR0_MP | CR0_TS; /* Done at every execve() too. */
1016 cr0 |= CR0_WP | CR0_AM;
1022 sysctl_machdep_adjkerntz(SYSCTL_HANDLER_ARGS)
1025 error = sysctl_handle_int(oidp, oidp->oid_arg1, oidp->oid_arg2,
1027 if (!error && req->newptr)
1032 SYSCTL_PROC(_machdep, CPU_ADJKERNTZ, adjkerntz, CTLTYPE_INT|CTLFLAG_RW,
1033 &adjkerntz, 0, sysctl_machdep_adjkerntz, "I", "");
1035 SYSCTL_INT(_machdep, CPU_DISRTCSET, disable_rtc_set,
1036 CTLFLAG_RW, &disable_rtc_set, 0, "");
1039 SYSCTL_STRUCT(_machdep, CPU_BOOTINFO, bootinfo,
1040 CTLFLAG_RD, &bootinfo, bootinfo, "");
1043 SYSCTL_INT(_machdep, CPU_WALLCLOCK, wall_cmos_clock,
1044 CTLFLAG_RW, &wall_cmos_clock, 0, "");
1046 extern u_long bootdev; /* not a cdev_t - encoding is different */
1047 SYSCTL_ULONG(_machdep, OID_AUTO, guessed_bootdev,
1048 CTLFLAG_RD, &bootdev, 0, "Boot device (not in cdev_t format)");
1051 * Initialize 386 and configure to run kernel
1055 * Initialize segments & interrupt table
1059 struct user_segment_descriptor gdt[NGDT * MAXCPU]; /* global descriptor table */
1060 struct gate_descriptor idt_arr[MAXCPU][NIDT];
1062 union descriptor ldt[NLDT]; /* local descriptor table */
1065 /* table descriptors - used to load tables by cpu */
1066 struct region_descriptor r_gdt;
1067 struct region_descriptor r_idt_arr[MAXCPU];
1069 /* JG proc0paddr is a virtual address */
1072 char proc0paddr_buff[LWKT_THREAD_STACK];
1075 /* software prototypes -- in more palatable form */
1076 struct soft_segment_descriptor gdt_segs[] = {
1077 /* GNULL_SEL 0 Null Descriptor */
1078 { 0x0, /* segment base address */
1080 0, /* segment type */
1081 0, /* segment descriptor priority level */
1082 0, /* segment descriptor present */
1084 0, /* default 32 vs 16 bit size */
1085 0 /* limit granularity (byte/page units)*/ },
1086 /* GCODE_SEL 1 Code Descriptor for kernel */
1087 { 0x0, /* segment base address */
1088 0xfffff, /* length - all address space */
1089 SDT_MEMERA, /* segment type */
1090 SEL_KPL, /* segment descriptor priority level */
1091 1, /* segment descriptor present */
1093 0, /* default 32 vs 16 bit size */
1094 1 /* limit granularity (byte/page units)*/ },
1095 /* GDATA_SEL 2 Data Descriptor for kernel */
1096 { 0x0, /* segment base address */
1097 0xfffff, /* length - all address space */
1098 SDT_MEMRWA, /* segment type */
1099 SEL_KPL, /* segment descriptor priority level */
1100 1, /* segment descriptor present */
1102 0, /* default 32 vs 16 bit size */
1103 1 /* limit granularity (byte/page units)*/ },
1104 /* GUCODE32_SEL 3 32 bit Code Descriptor for user */
1105 { 0x0, /* segment base address */
1106 0xfffff, /* length - all address space */
1107 SDT_MEMERA, /* segment type */
1108 SEL_UPL, /* segment descriptor priority level */
1109 1, /* segment descriptor present */
1111 1, /* default 32 vs 16 bit size */
1112 1 /* limit granularity (byte/page units)*/ },
1113 /* GUDATA_SEL 4 32/64 bit Data Descriptor for user */
1114 { 0x0, /* segment base address */
1115 0xfffff, /* length - all address space */
1116 SDT_MEMRWA, /* segment type */
1117 SEL_UPL, /* segment descriptor priority level */
1118 1, /* segment descriptor present */
1120 1, /* default 32 vs 16 bit size */
1121 1 /* limit granularity (byte/page units)*/ },
1122 /* GUCODE_SEL 5 64 bit Code Descriptor for user */
1123 { 0x0, /* segment base address */
1124 0xfffff, /* length - all address space */
1125 SDT_MEMERA, /* segment type */
1126 SEL_UPL, /* segment descriptor priority level */
1127 1, /* segment descriptor present */
1129 0, /* default 32 vs 16 bit size */
1130 1 /* limit granularity (byte/page units)*/ },
1131 /* GPROC0_SEL 6 Proc 0 Tss Descriptor */
1133 0x0, /* segment base address */
1134 sizeof(struct x86_64tss)-1,/* length - all address space */
1135 SDT_SYSTSS, /* segment type */
1136 SEL_KPL, /* segment descriptor priority level */
1137 1, /* segment descriptor present */
1139 0, /* unused - default 32 vs 16 bit size */
1140 0 /* limit granularity (byte/page units)*/ },
1141 /* Actually, the TSS is a system descriptor which is double size */
1142 { 0x0, /* segment base address */
1144 0, /* segment type */
1145 0, /* segment descriptor priority level */
1146 0, /* segment descriptor present */
1148 0, /* default 32 vs 16 bit size */
1149 0 /* limit granularity (byte/page units)*/ },
1150 /* GUGS32_SEL 8 32 bit GS Descriptor for user */
1151 { 0x0, /* segment base address */
1152 0xfffff, /* length - all address space */
1153 SDT_MEMRWA, /* segment type */
1154 SEL_UPL, /* segment descriptor priority level */
1155 1, /* segment descriptor present */
1157 1, /* default 32 vs 16 bit size */
1158 1 /* limit granularity (byte/page units)*/ },
1162 setidt_global(int idx, inthand_t *func, int typ, int dpl, int ist)
1166 for (cpu = 0; cpu < MAXCPU; ++cpu) {
1167 struct gate_descriptor *ip = &idt_arr[cpu][idx];
1169 ip->gd_looffset = (uintptr_t)func;
1170 ip->gd_selector = GSEL(GCODE_SEL, SEL_KPL);
1176 ip->gd_hioffset = ((uintptr_t)func)>>16 ;
1181 setidt(int idx, inthand_t *func, int typ, int dpl, int ist, int cpu)
1183 struct gate_descriptor *ip;
1185 KASSERT(cpu >= 0 && cpu < ncpus, ("invalid cpu %d", cpu));
1187 ip = &idt_arr[cpu][idx];
1188 ip->gd_looffset = (uintptr_t)func;
1189 ip->gd_selector = GSEL(GCODE_SEL, SEL_KPL);
1195 ip->gd_hioffset = ((uintptr_t)func)>>16 ;
1198 #define IDTVEC(name) __CONCAT(X,name)
1201 IDTVEC(div), IDTVEC(dbg), IDTVEC(nmi), IDTVEC(bpt), IDTVEC(ofl),
1202 IDTVEC(bnd), IDTVEC(ill), IDTVEC(dna), IDTVEC(fpusegm),
1203 IDTVEC(tss), IDTVEC(missing), IDTVEC(stk), IDTVEC(prot),
1204 IDTVEC(page), IDTVEC(mchk), IDTVEC(rsvd), IDTVEC(fpu), IDTVEC(align),
1205 IDTVEC(xmm), IDTVEC(dblfault),
1206 IDTVEC(fast_syscall), IDTVEC(fast_syscall32);
1208 #ifdef DEBUG_INTERRUPTS
1209 extern inthand_t *Xrsvdary[256];
1213 sdtossd(struct user_segment_descriptor *sd, struct soft_segment_descriptor *ssd)
1215 ssd->ssd_base = (sd->sd_hibase << 24) | sd->sd_lobase;
1216 ssd->ssd_limit = (sd->sd_hilimit << 16) | sd->sd_lolimit;
1217 ssd->ssd_type = sd->sd_type;
1218 ssd->ssd_dpl = sd->sd_dpl;
1219 ssd->ssd_p = sd->sd_p;
1220 ssd->ssd_def32 = sd->sd_def32;
1221 ssd->ssd_gran = sd->sd_gran;
1225 ssdtosd(struct soft_segment_descriptor *ssd, struct user_segment_descriptor *sd)
1228 sd->sd_lobase = (ssd->ssd_base) & 0xffffff;
1229 sd->sd_hibase = (ssd->ssd_base >> 24) & 0xff;
1230 sd->sd_lolimit = (ssd->ssd_limit) & 0xffff;
1231 sd->sd_hilimit = (ssd->ssd_limit >> 16) & 0xf;
1232 sd->sd_type = ssd->ssd_type;
1233 sd->sd_dpl = ssd->ssd_dpl;
1234 sd->sd_p = ssd->ssd_p;
1235 sd->sd_long = ssd->ssd_long;
1236 sd->sd_def32 = ssd->ssd_def32;
1237 sd->sd_gran = ssd->ssd_gran;
1241 ssdtosyssd(struct soft_segment_descriptor *ssd,
1242 struct system_segment_descriptor *sd)
1245 sd->sd_lobase = (ssd->ssd_base) & 0xffffff;
1246 sd->sd_hibase = (ssd->ssd_base >> 24) & 0xfffffffffful;
1247 sd->sd_lolimit = (ssd->ssd_limit) & 0xffff;
1248 sd->sd_hilimit = (ssd->ssd_limit >> 16) & 0xf;
1249 sd->sd_type = ssd->ssd_type;
1250 sd->sd_dpl = ssd->ssd_dpl;
1251 sd->sd_p = ssd->ssd_p;
1252 sd->sd_gran = ssd->ssd_gran;
1256 * Populate the (physmap) array with base/bound pairs describing the
1257 * available physical memory in the system, then test this memory and
1258 * build the phys_avail array describing the actually-available memory.
1260 * If we cannot accurately determine the physical memory map, then use
1261 * value from the 0xE801 call, and failing that, the RTC.
1263 * Total memory size may be set by the kernel environment variable
1264 * hw.physmem or the compile-time define MAXMEM.
1266 * Memory is aligned to PHYSMAP_ALIGN which must be a multiple
1267 * of PAGE_SIZE. This also greatly reduces the memory test time
1268 * which would otherwise be excessive on machines with > 8G of ram.
1270 * XXX first should be vm_paddr_t.
1273 #define PHYSMAP_ALIGN (vm_paddr_t)(128 * 1024)
1274 #define PHYSMAP_ALIGN_MASK (vm_paddr_t)(PHYSMAP_ALIGN - 1)
1277 getmemsize(caddr_t kmdp, u_int64_t first)
1279 int off, physmap_idx, pa_indx, da_indx;
1281 vm_paddr_t physmap[PHYSMAP_SIZE];
1283 vm_paddr_t msgbuf_size;
1284 u_long physmem_tunable;
1286 struct bios_smap *smapbase, *smap, *smapend;
1288 quad_t dcons_addr, dcons_size;
1290 bzero(physmap, sizeof(physmap));
1294 * get memory map from INT 15:E820, kindly supplied by the loader.
1296 * subr_module.c says:
1297 * "Consumer may safely assume that size value precedes data."
1298 * ie: an int32_t immediately precedes smap.
1300 smapbase = (struct bios_smap *)preload_search_info(kmdp,
1301 MODINFO_METADATA | MODINFOMD_SMAP);
1302 if (smapbase == NULL)
1303 panic("No BIOS smap info from loader!");
1305 smapsize = *((u_int32_t *)smapbase - 1);
1306 smapend = (struct bios_smap *)((uintptr_t)smapbase + smapsize);
1308 for (smap = smapbase; smap < smapend; smap++) {
1309 if (boothowto & RB_VERBOSE)
1310 kprintf("SMAP type=%02x base=%016lx len=%016lx\n",
1311 smap->type, smap->base, smap->length);
1313 if (smap->type != SMAP_TYPE_MEMORY)
1316 if (smap->length == 0)
1319 for (i = 0; i <= physmap_idx; i += 2) {
1320 if (smap->base < physmap[i + 1]) {
1321 if (boothowto & RB_VERBOSE) {
1322 kprintf("Overlapping or non-monotonic "
1323 "memory region, ignoring "
1329 if (i <= physmap_idx)
1332 Realmem += smap->length;
1334 if (smap->base == physmap[physmap_idx + 1]) {
1335 physmap[physmap_idx + 1] += smap->length;
1340 if (physmap_idx == PHYSMAP_SIZE) {
1341 kprintf("Too many segments in the physical "
1342 "address map, giving up\n");
1345 physmap[physmap_idx] = smap->base;
1346 physmap[physmap_idx + 1] = smap->base + smap->length;
1349 base_memory = physmap[1] / 1024;
1350 /* make hole for AP bootstrap code */
1351 physmap[1] = mp_bootaddress(base_memory);
1353 /* Save EBDA address, if any */
1354 ebda_addr = (u_long)(*(u_short *)(KERNBASE + 0x40e));
1358 * Maxmem isn't the "maximum memory", it's one larger than the
1359 * highest page of the physical address space. It should be
1360 * called something like "Maxphyspage". We may adjust this
1361 * based on ``hw.physmem'' and the results of the memory test.
1363 Maxmem = atop(physmap[physmap_idx + 1]);
1366 Maxmem = MAXMEM / 4;
1369 if (TUNABLE_ULONG_FETCH("hw.physmem", &physmem_tunable))
1370 Maxmem = atop(physmem_tunable);
1373 * Don't allow MAXMEM or hw.physmem to extend the amount of memory
1376 if (Maxmem > atop(physmap[physmap_idx + 1]))
1377 Maxmem = atop(physmap[physmap_idx + 1]);
1380 * Blowing out the DMAP will blow up the system.
1382 if (Maxmem > atop(DMAP_MAX_ADDRESS - DMAP_MIN_ADDRESS)) {
1383 kprintf("Limiting Maxmem due to DMAP size\n");
1384 Maxmem = atop(DMAP_MAX_ADDRESS - DMAP_MIN_ADDRESS);
1387 if (atop(physmap[physmap_idx + 1]) != Maxmem &&
1388 (boothowto & RB_VERBOSE)) {
1389 kprintf("Physical memory use set to %ldK\n", Maxmem * 4);
1393 * Call pmap initialization to make new kernel address space
1397 pmap_bootstrap(&first);
1398 physmap[0] = PAGE_SIZE;
1401 * Align the physmap to PHYSMAP_ALIGN and cut out anything
1404 for (i = j = 0; i <= physmap_idx; i += 2) {
1405 if (physmap[i+1] > ptoa(Maxmem))
1406 physmap[i+1] = ptoa(Maxmem);
1407 physmap[i] = (physmap[i] + PHYSMAP_ALIGN_MASK) &
1408 ~PHYSMAP_ALIGN_MASK;
1409 physmap[i+1] = physmap[i+1] & ~PHYSMAP_ALIGN_MASK;
1411 physmap[j] = physmap[i];
1412 physmap[j+1] = physmap[i+1];
1414 if (physmap[i] < physmap[i+1])
1417 physmap_idx = j - 2;
1420 * Align anything else used in the validation loop.
1422 first = (first + PHYSMAP_ALIGN_MASK) & ~PHYSMAP_ALIGN_MASK;
1425 * Size up each available chunk of physical memory.
1429 phys_avail[pa_indx++] = physmap[0];
1430 phys_avail[pa_indx] = physmap[0];
1431 dump_avail[da_indx] = physmap[0];
1435 * Get dcons buffer address
1437 if (kgetenv_quad("dcons.addr", &dcons_addr) == 0 ||
1438 kgetenv_quad("dcons.size", &dcons_size) == 0)
1442 * Validate the physical memory. The physical memory segments
1443 * have already been aligned to PHYSMAP_ALIGN which is a multiple
1446 for (i = 0; i <= physmap_idx; i += 2) {
1449 end = physmap[i + 1];
1451 for (pa = physmap[i]; pa < end; pa += PHYSMAP_ALIGN) {
1452 int tmp, page_bad, full;
1453 int *ptr = (int *)CADDR1;
1457 * block out kernel memory as not available.
1459 if (pa >= 0x200000 && pa < first)
1463 * block out dcons buffer
1466 && pa >= trunc_page(dcons_addr)
1467 && pa < dcons_addr + dcons_size) {
1474 * map page into kernel: valid, read/write,non-cacheable
1477 kernel_pmap.pmap_bits[PG_V_IDX] |
1478 kernel_pmap.pmap_bits[PG_RW_IDX] |
1479 kernel_pmap.pmap_bits[PG_N_IDX];
1484 * Test for alternating 1's and 0's
1486 *(volatile int *)ptr = 0xaaaaaaaa;
1488 if (*(volatile int *)ptr != 0xaaaaaaaa)
1491 * Test for alternating 0's and 1's
1493 *(volatile int *)ptr = 0x55555555;
1495 if (*(volatile int *)ptr != 0x55555555)
1500 *(volatile int *)ptr = 0xffffffff;
1502 if (*(volatile int *)ptr != 0xffffffff)
1507 *(volatile int *)ptr = 0x0;
1509 if (*(volatile int *)ptr != 0x0)
1512 * Restore original value.
1517 * Adjust array of valid/good pages.
1519 if (page_bad == TRUE)
1522 * If this good page is a continuation of the
1523 * previous set of good pages, then just increase
1524 * the end pointer. Otherwise start a new chunk.
1525 * Note that "end" points one higher than end,
1526 * making the range >= start and < end.
1527 * If we're also doing a speculative memory
1528 * test and we at or past the end, bump up Maxmem
1529 * so that we keep going. The first bad page
1530 * will terminate the loop.
1532 if (phys_avail[pa_indx] == pa) {
1533 phys_avail[pa_indx] += PHYSMAP_ALIGN;
1536 if (pa_indx == PHYS_AVAIL_ARRAY_END) {
1538 "Too many holes in the physical address space, giving up\n");
1543 phys_avail[pa_indx++] = pa;
1544 phys_avail[pa_indx] = pa + PHYSMAP_ALIGN;
1546 physmem += PHYSMAP_ALIGN / PAGE_SIZE;
1548 if (dump_avail[da_indx] == pa) {
1549 dump_avail[da_indx] += PHYSMAP_ALIGN;
1552 if (da_indx == DUMP_AVAIL_ARRAY_END) {
1556 dump_avail[da_indx++] = pa;
1557 dump_avail[da_indx] = pa + PHYSMAP_ALIGN;
1568 * The last chunk must contain at least one page plus the message
1569 * buffer to avoid complicating other code (message buffer address
1570 * calculation, etc.).
1572 msgbuf_size = (MSGBUF_SIZE + PHYSMAP_ALIGN_MASK) & ~PHYSMAP_ALIGN_MASK;
1574 while (phys_avail[pa_indx - 1] + PHYSMAP_ALIGN +
1575 msgbuf_size >= phys_avail[pa_indx]) {
1576 physmem -= atop(phys_avail[pa_indx] - phys_avail[pa_indx - 1]);
1577 phys_avail[pa_indx--] = 0;
1578 phys_avail[pa_indx--] = 0;
1581 Maxmem = atop(phys_avail[pa_indx]);
1583 /* Trim off space for the message buffer. */
1584 phys_avail[pa_indx] -= msgbuf_size;
1586 avail_end = phys_avail[pa_indx];
1588 /* Map the message buffer. */
1589 for (off = 0; off < msgbuf_size; off += PAGE_SIZE) {
1590 pmap_kenter((vm_offset_t)msgbufp + off,
1591 phys_avail[pa_indx] + off);
1595 struct machintr_abi MachIntrABI;
1606 * 7 Device Not Available (x87)
1608 * 9 Coprocessor Segment overrun (unsupported, reserved)
1610 * 11 Segment not present
1612 * 13 General Protection
1615 * 16 x87 FP Exception pending
1616 * 17 Alignment Check
1618 * 19 SIMD floating point
1620 * 32-255 INTn/external sources
1623 hammer_time(u_int64_t modulep, u_int64_t physfree)
1626 int gsel_tss, x, cpu;
1628 int metadata_missing, off;
1630 struct mdglobaldata *gd;
1634 * Prevent lowering of the ipl if we call tsleep() early.
1636 gd = &CPU_prvspace[0].mdglobaldata;
1637 bzero(gd, sizeof(*gd));
1640 * Note: on both UP and SMP curthread must be set non-NULL
1641 * early in the boot sequence because the system assumes
1642 * that 'curthread' is never NULL.
1645 gd->mi.gd_curthread = &thread0;
1646 thread0.td_gd = &gd->mi;
1648 atdevbase = ISA_HOLE_START + PTOV_OFFSET;
1651 metadata_missing = 0;
1652 if (bootinfo.bi_modulep) {
1653 preload_metadata = (caddr_t)bootinfo.bi_modulep + KERNBASE;
1654 preload_bootstrap_relocate(KERNBASE);
1656 metadata_missing = 1;
1658 if (bootinfo.bi_envp)
1659 kern_envp = (caddr_t)bootinfo.bi_envp + KERNBASE;
1662 preload_metadata = (caddr_t)(uintptr_t)(modulep + PTOV_OFFSET);
1663 preload_bootstrap_relocate(PTOV_OFFSET);
1664 kmdp = preload_search_by_type("elf kernel");
1666 kmdp = preload_search_by_type("elf64 kernel");
1667 boothowto = MD_FETCH(kmdp, MODINFOMD_HOWTO, int);
1668 kern_envp = MD_FETCH(kmdp, MODINFOMD_ENVP, char *) + PTOV_OFFSET;
1670 ksym_start = MD_FETCH(kmdp, MODINFOMD_SSYM, uintptr_t);
1671 ksym_end = MD_FETCH(kmdp, MODINFOMD_ESYM, uintptr_t);
1674 if (boothowto & RB_VERBOSE)
1678 * Default MachIntrABI to ICU
1680 MachIntrABI = MachIntrABI_ICU;
1683 * start with one cpu. Note: with one cpu, ncpus2_shift, ncpus2_mask,
1684 * and ncpus_fit_mask remain 0.
1689 /* Init basic tunables, hz etc */
1693 * make gdt memory segments
1695 gdt_segs[GPROC0_SEL].ssd_base =
1696 (uintptr_t) &CPU_prvspace[0].mdglobaldata.gd_common_tss;
1698 gd->mi.gd_prvspace = &CPU_prvspace[0];
1700 for (x = 0; x < NGDT; x++) {
1701 if (x != GPROC0_SEL && x != (GPROC0_SEL + 1))
1702 ssdtosd(&gdt_segs[x], &gdt[x]);
1704 ssdtosyssd(&gdt_segs[GPROC0_SEL],
1705 (struct system_segment_descriptor *)&gdt[GPROC0_SEL]);
1707 r_gdt.rd_limit = NGDT * sizeof(gdt[0]) - 1;
1708 r_gdt.rd_base = (long) gdt;
1711 wrmsr(MSR_FSBASE, 0); /* User value */
1712 wrmsr(MSR_GSBASE, (u_int64_t)&gd->mi);
1713 wrmsr(MSR_KGSBASE, 0); /* User value while in the kernel */
1715 mi_gdinit(&gd->mi, 0);
1717 proc0paddr = proc0paddr_buff;
1718 mi_proc0init(&gd->mi, proc0paddr);
1719 safepri = TDPRI_MAX;
1721 /* spinlocks and the BGL */
1725 for (x = 0; x < NIDT; x++)
1726 setidt_global(x, &IDTVEC(rsvd), SDT_SYSIGT, SEL_KPL, 0);
1727 setidt_global(IDT_DE, &IDTVEC(div), SDT_SYSIGT, SEL_KPL, 0);
1728 setidt_global(IDT_DB, &IDTVEC(dbg), SDT_SYSIGT, SEL_KPL, 0);
1729 setidt_global(IDT_NMI, &IDTVEC(nmi), SDT_SYSIGT, SEL_KPL, 1);
1730 setidt_global(IDT_BP, &IDTVEC(bpt), SDT_SYSIGT, SEL_UPL, 0);
1731 setidt_global(IDT_OF, &IDTVEC(ofl), SDT_SYSIGT, SEL_KPL, 0);
1732 setidt_global(IDT_BR, &IDTVEC(bnd), SDT_SYSIGT, SEL_KPL, 0);
1733 setidt_global(IDT_UD, &IDTVEC(ill), SDT_SYSIGT, SEL_KPL, 0);
1734 setidt_global(IDT_NM, &IDTVEC(dna), SDT_SYSIGT, SEL_KPL, 0);
1735 setidt_global(IDT_DF, &IDTVEC(dblfault), SDT_SYSIGT, SEL_KPL, 1);
1736 setidt_global(IDT_FPUGP, &IDTVEC(fpusegm), SDT_SYSIGT, SEL_KPL, 0);
1737 setidt_global(IDT_TS, &IDTVEC(tss), SDT_SYSIGT, SEL_KPL, 0);
1738 setidt_global(IDT_NP, &IDTVEC(missing), SDT_SYSIGT, SEL_KPL, 0);
1739 setidt_global(IDT_SS, &IDTVEC(stk), SDT_SYSIGT, SEL_KPL, 0);
1740 setidt_global(IDT_GP, &IDTVEC(prot), SDT_SYSIGT, SEL_KPL, 0);
1741 setidt_global(IDT_PF, &IDTVEC(page), SDT_SYSIGT, SEL_KPL, 0);
1742 setidt_global(IDT_MF, &IDTVEC(fpu), SDT_SYSIGT, SEL_KPL, 0);
1743 setidt_global(IDT_AC, &IDTVEC(align), SDT_SYSIGT, SEL_KPL, 0);
1744 setidt_global(IDT_MC, &IDTVEC(mchk), SDT_SYSIGT, SEL_KPL, 0);
1745 setidt_global(IDT_XF, &IDTVEC(xmm), SDT_SYSIGT, SEL_KPL, 0);
1747 for (cpu = 0; cpu < MAXCPU; ++cpu) {
1748 r_idt_arr[cpu].rd_limit = sizeof(idt_arr[cpu]) - 1;
1749 r_idt_arr[cpu].rd_base = (long) &idt_arr[cpu][0];
1752 lidt(&r_idt_arr[0]);
1755 * Initialize the console before we print anything out.
1760 if (metadata_missing)
1761 kprintf("WARNING: loader(8) metadata is missing!\n");
1771 * Initialize IRQ mapping
1774 * SHOULD be after elcr_probe()
1776 MachIntrABI_ICU.initmap();
1777 MachIntrABI_IOAPIC.initmap();
1781 if (boothowto & RB_KDB)
1782 Debugger("Boot flags requested debugger");
1786 finishidentcpu(); /* Final stage of CPU initialization */
1787 setidt(6, &IDTVEC(ill), SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1788 setidt(13, &IDTVEC(prot), SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1790 identify_cpu(); /* Final stage of CPU initialization */
1791 initializecpu(0); /* Initialize CPU registers */
1793 TUNABLE_INT_FETCH("hw.apic_io_enable", &ioapic_enable); /* for compat */
1794 TUNABLE_INT_FETCH("hw.ioapic_enable", &ioapic_enable);
1795 TUNABLE_INT_FETCH("hw.lapic_enable", &lapic_enable);
1798 * Some of the virtual machines do not work w/ I/O APIC
1799 * enabled. If the user does not explicitly enable or
1800 * disable the I/O APIC (ioapic_enable < 0), then we
1801 * disable I/O APIC on all virtual machines.
1804 * This must be done after identify_cpu(), which sets
1807 if (ioapic_enable < 0) {
1808 if (cpu_feature2 & CPUID2_VMM)
1814 /* make an initial tss so cpu can get interrupt stack on syscall! */
1815 gd->gd_common_tss.tss_rsp0 =
1816 (register_t)(thread0.td_kstack +
1817 KSTACK_PAGES * PAGE_SIZE - sizeof(struct pcb));
1818 /* Ensure the stack is aligned to 16 bytes */
1819 gd->gd_common_tss.tss_rsp0 &= ~(register_t)0xF;
1821 /* double fault stack */
1822 gd->gd_common_tss.tss_ist1 =
1823 (long)&gd->mi.gd_prvspace->idlestack[
1824 sizeof(gd->mi.gd_prvspace->idlestack)];
1826 /* Set the IO permission bitmap (empty due to tss seg limit) */
1827 gd->gd_common_tss.tss_iobase = sizeof(struct x86_64tss);
1829 gsel_tss = GSEL(GPROC0_SEL, SEL_KPL);
1830 gd->gd_tss_gdt = &gdt[GPROC0_SEL];
1831 gd->gd_common_tssd = *gd->gd_tss_gdt;
1834 /* Set up the fast syscall stuff */
1835 msr = rdmsr(MSR_EFER) | EFER_SCE;
1836 wrmsr(MSR_EFER, msr);
1837 wrmsr(MSR_LSTAR, (u_int64_t)IDTVEC(fast_syscall));
1838 wrmsr(MSR_CSTAR, (u_int64_t)IDTVEC(fast_syscall32));
1839 msr = ((u_int64_t)GSEL(GCODE_SEL, SEL_KPL) << 32) |
1840 ((u_int64_t)GSEL(GUCODE32_SEL, SEL_UPL) << 48);
1841 wrmsr(MSR_STAR, msr);
1842 wrmsr(MSR_SF_MASK, PSL_NT|PSL_T|PSL_I|PSL_C|PSL_D|PSL_IOPL);
1844 getmemsize(kmdp, physfree);
1845 init_param2(physmem);
1847 /* now running on new page tables, configured,and u/iom is accessible */
1849 /* Map the message buffer. */
1851 for (off = 0; off < round_page(MSGBUF_SIZE); off += PAGE_SIZE)
1852 pmap_kenter((vm_offset_t)msgbufp + off, avail_end + off);
1855 msgbufinit(msgbufp, MSGBUF_SIZE);
1858 /* transfer to user mode */
1860 _ucodesel = GSEL(GUCODE_SEL, SEL_UPL);
1861 _udatasel = GSEL(GUDATA_SEL, SEL_UPL);
1862 _ucode32sel = GSEL(GUCODE32_SEL, SEL_UPL);
1868 /* setup proc 0's pcb */
1869 thread0.td_pcb->pcb_flags = 0;
1870 thread0.td_pcb->pcb_cr3 = KPML4phys;
1871 thread0.td_pcb->pcb_ext = NULL;
1872 lwp0.lwp_md.md_regs = &proc0_tf; /* XXX needed? */
1874 /* Location of kernel stack for locore */
1875 return ((u_int64_t)thread0.td_pcb);
1879 * Initialize machine-dependant portions of the global data structure.
1880 * Note that the global data area and cpu0's idlestack in the private
1881 * data space were allocated in locore.
1883 * Note: the idlethread's cpl is 0
1885 * WARNING! Called from early boot, 'mycpu' may not work yet.
1888 cpu_gdinit(struct mdglobaldata *gd, int cpu)
1891 gd->mi.gd_curthread = &gd->mi.gd_idlethread;
1893 lwkt_init_thread(&gd->mi.gd_idlethread,
1894 gd->mi.gd_prvspace->idlestack,
1895 sizeof(gd->mi.gd_prvspace->idlestack),
1897 lwkt_set_comm(&gd->mi.gd_idlethread, "idle_%d", cpu);
1898 gd->mi.gd_idlethread.td_switch = cpu_lwkt_switch;
1899 gd->mi.gd_idlethread.td_sp -= sizeof(void *);
1900 *(void **)gd->mi.gd_idlethread.td_sp = cpu_idle_restore;
1904 is_globaldata_space(vm_offset_t saddr, vm_offset_t eaddr)
1906 if (saddr >= (vm_offset_t)&CPU_prvspace[0] &&
1907 eaddr <= (vm_offset_t)&CPU_prvspace[MAXCPU]) {
1910 if (saddr >= DMAP_MIN_ADDRESS && eaddr <= DMAP_MAX_ADDRESS)
1916 globaldata_find(int cpu)
1918 KKASSERT(cpu >= 0 && cpu < ncpus);
1919 return(&CPU_prvspace[cpu].mdglobaldata.mi);
1923 ptrace_set_pc(struct lwp *lp, unsigned long addr)
1925 lp->lwp_md.md_regs->tf_rip = addr;
1930 ptrace_single_step(struct lwp *lp)
1932 lp->lwp_md.md_regs->tf_rflags |= PSL_T;
1937 fill_regs(struct lwp *lp, struct reg *regs)
1939 struct trapframe *tp;
1941 if ((tp = lp->lwp_md.md_regs) == NULL)
1943 bcopy(&tp->tf_rdi, ®s->r_rdi, sizeof(*regs));
1948 set_regs(struct lwp *lp, struct reg *regs)
1950 struct trapframe *tp;
1952 tp = lp->lwp_md.md_regs;
1953 if (!EFL_SECURE(regs->r_rflags, tp->tf_rflags) ||
1954 !CS_SECURE(regs->r_cs))
1956 bcopy(®s->r_rdi, &tp->tf_rdi, sizeof(*regs));
1961 #ifndef CPU_DISABLE_SSE
1963 fill_fpregs_xmm(struct savexmm *sv_xmm, struct save87 *sv_87)
1965 struct env87 *penv_87 = &sv_87->sv_env;
1966 struct envxmm *penv_xmm = &sv_xmm->sv_env;
1969 /* FPU control/status */
1970 penv_87->en_cw = penv_xmm->en_cw;
1971 penv_87->en_sw = penv_xmm->en_sw;
1972 penv_87->en_tw = penv_xmm->en_tw;
1973 penv_87->en_fip = penv_xmm->en_fip;
1974 penv_87->en_fcs = penv_xmm->en_fcs;
1975 penv_87->en_opcode = penv_xmm->en_opcode;
1976 penv_87->en_foo = penv_xmm->en_foo;
1977 penv_87->en_fos = penv_xmm->en_fos;
1980 for (i = 0; i < 8; ++i)
1981 sv_87->sv_ac[i] = sv_xmm->sv_fp[i].fp_acc;
1985 set_fpregs_xmm(struct save87 *sv_87, struct savexmm *sv_xmm)
1987 struct env87 *penv_87 = &sv_87->sv_env;
1988 struct envxmm *penv_xmm = &sv_xmm->sv_env;
1991 /* FPU control/status */
1992 penv_xmm->en_cw = penv_87->en_cw;
1993 penv_xmm->en_sw = penv_87->en_sw;
1994 penv_xmm->en_tw = penv_87->en_tw;
1995 penv_xmm->en_fip = penv_87->en_fip;
1996 penv_xmm->en_fcs = penv_87->en_fcs;
1997 penv_xmm->en_opcode = penv_87->en_opcode;
1998 penv_xmm->en_foo = penv_87->en_foo;
1999 penv_xmm->en_fos = penv_87->en_fos;
2002 for (i = 0; i < 8; ++i)
2003 sv_xmm->sv_fp[i].fp_acc = sv_87->sv_ac[i];
2005 #endif /* CPU_DISABLE_SSE */
2008 fill_fpregs(struct lwp *lp, struct fpreg *fpregs)
2010 if (lp->lwp_thread == NULL || lp->lwp_thread->td_pcb == NULL)
2012 #ifndef CPU_DISABLE_SSE
2014 fill_fpregs_xmm(&lp->lwp_thread->td_pcb->pcb_save.sv_xmm,
2015 (struct save87 *)fpregs);
2018 #endif /* CPU_DISABLE_SSE */
2019 bcopy(&lp->lwp_thread->td_pcb->pcb_save.sv_87, fpregs, sizeof *fpregs);
2024 set_fpregs(struct lwp *lp, struct fpreg *fpregs)
2026 #ifndef CPU_DISABLE_SSE
2028 set_fpregs_xmm((struct save87 *)fpregs,
2029 &lp->lwp_thread->td_pcb->pcb_save.sv_xmm);
2032 #endif /* CPU_DISABLE_SSE */
2033 bcopy(fpregs, &lp->lwp_thread->td_pcb->pcb_save.sv_87, sizeof *fpregs);
2038 fill_dbregs(struct lwp *lp, struct dbreg *dbregs)
2043 dbregs->dr[0] = rdr0();
2044 dbregs->dr[1] = rdr1();
2045 dbregs->dr[2] = rdr2();
2046 dbregs->dr[3] = rdr3();
2047 dbregs->dr[4] = rdr4();
2048 dbregs->dr[5] = rdr5();
2049 dbregs->dr[6] = rdr6();
2050 dbregs->dr[7] = rdr7();
2053 if (lp->lwp_thread == NULL || (pcb = lp->lwp_thread->td_pcb) == NULL)
2055 dbregs->dr[0] = pcb->pcb_dr0;
2056 dbregs->dr[1] = pcb->pcb_dr1;
2057 dbregs->dr[2] = pcb->pcb_dr2;
2058 dbregs->dr[3] = pcb->pcb_dr3;
2061 dbregs->dr[6] = pcb->pcb_dr6;
2062 dbregs->dr[7] = pcb->pcb_dr7;
2067 set_dbregs(struct lwp *lp, struct dbreg *dbregs)
2070 load_dr0(dbregs->dr[0]);
2071 load_dr1(dbregs->dr[1]);
2072 load_dr2(dbregs->dr[2]);
2073 load_dr3(dbregs->dr[3]);
2074 load_dr4(dbregs->dr[4]);
2075 load_dr5(dbregs->dr[5]);
2076 load_dr6(dbregs->dr[6]);
2077 load_dr7(dbregs->dr[7]);
2080 struct ucred *ucred;
2082 uint64_t mask1, mask2;
2085 * Don't let an illegal value for dr7 get set. Specifically,
2086 * check for undefined settings. Setting these bit patterns
2087 * result in undefined behaviour and can lead to an unexpected
2090 /* JG this loop looks unreadable */
2091 /* Check 4 2-bit fields for invalid patterns.
2092 * These fields are R/Wi, for i = 0..3
2094 /* Is 10 in LENi allowed when running in compatibility mode? */
2095 /* Pattern 10 in R/Wi might be used to indicate
2096 * breakpoint on I/O. Further analysis should be
2097 * carried to decide if it is safe and useful to
2098 * provide access to that capability
2100 for (i = 0, mask1 = 0x3<<16, mask2 = 0x2<<16; i < 4;
2101 i++, mask1 <<= 4, mask2 <<= 4)
2102 if ((dbregs->dr[7] & mask1) == mask2)
2105 pcb = lp->lwp_thread->td_pcb;
2106 ucred = lp->lwp_proc->p_ucred;
2109 * Don't let a process set a breakpoint that is not within the
2110 * process's address space. If a process could do this, it
2111 * could halt the system by setting a breakpoint in the kernel
2112 * (if ddb was enabled). Thus, we need to check to make sure
2113 * that no breakpoints are being enabled for addresses outside
2114 * process's address space, unless, perhaps, we were called by
2117 * XXX - what about when the watched area of the user's
2118 * address space is written into from within the kernel
2119 * ... wouldn't that still cause a breakpoint to be generated
2120 * from within kernel mode?
2123 if (priv_check_cred(ucred, PRIV_ROOT, 0) != 0) {
2124 if (dbregs->dr[7] & 0x3) {
2125 /* dr0 is enabled */
2126 if (dbregs->dr[0] >= VM_MAX_USER_ADDRESS)
2130 if (dbregs->dr[7] & (0x3<<2)) {
2131 /* dr1 is enabled */
2132 if (dbregs->dr[1] >= VM_MAX_USER_ADDRESS)
2136 if (dbregs->dr[7] & (0x3<<4)) {
2137 /* dr2 is enabled */
2138 if (dbregs->dr[2] >= VM_MAX_USER_ADDRESS)
2142 if (dbregs->dr[7] & (0x3<<6)) {
2143 /* dr3 is enabled */
2144 if (dbregs->dr[3] >= VM_MAX_USER_ADDRESS)
2149 pcb->pcb_dr0 = dbregs->dr[0];
2150 pcb->pcb_dr1 = dbregs->dr[1];
2151 pcb->pcb_dr2 = dbregs->dr[2];
2152 pcb->pcb_dr3 = dbregs->dr[3];
2153 pcb->pcb_dr6 = dbregs->dr[6];
2154 pcb->pcb_dr7 = dbregs->dr[7];
2156 pcb->pcb_flags |= PCB_DBREGS;
2163 * Return > 0 if a hardware breakpoint has been hit, and the
2164 * breakpoint was in user space. Return 0, otherwise.
2167 user_dbreg_trap(void)
2169 u_int64_t dr7, dr6; /* debug registers dr6 and dr7 */
2170 u_int64_t bp; /* breakpoint bits extracted from dr6 */
2171 int nbp; /* number of breakpoints that triggered */
2172 caddr_t addr[4]; /* breakpoint addresses */
2176 if ((dr7 & 0xff) == 0) {
2178 * all GE and LE bits in the dr7 register are zero,
2179 * thus the trap couldn't have been caused by the
2180 * hardware debug registers
2191 * None of the breakpoint bits are set meaning this
2192 * trap was not caused by any of the debug registers
2198 * at least one of the breakpoints were hit, check to see
2199 * which ones and if any of them are user space addresses
2203 addr[nbp++] = (caddr_t)rdr0();
2206 addr[nbp++] = (caddr_t)rdr1();
2209 addr[nbp++] = (caddr_t)rdr2();
2212 addr[nbp++] = (caddr_t)rdr3();
2215 for (i=0; i<nbp; i++) {
2217 (caddr_t)VM_MAX_USER_ADDRESS) {
2219 * addr[i] is in user space
2226 * None of the breakpoints are in user space.
2234 Debugger(const char *msg)
2236 kprintf("Debugger(\"%s\") called.\n", msg);
2243 * Provide inb() and outb() as functions. They are normally only
2244 * available as macros calling inlined functions, thus cannot be
2245 * called inside DDB.
2247 * The actual code is stolen from <machine/cpufunc.h>, and de-inlined.
2253 /* silence compiler warnings */
2255 void outb(u_int, u_char);
2262 * We use %%dx and not %1 here because i/o is done at %dx and not at
2263 * %edx, while gcc generates inferior code (movw instead of movl)
2264 * if we tell it to load (u_short) port.
2266 __asm __volatile("inb %%dx,%0" : "=a" (data) : "d" (port));
2271 outb(u_int port, u_char data)
2275 * Use an unnecessary assignment to help gcc's register allocator.
2276 * This make a large difference for gcc-1.40 and a tiny difference
2277 * for gcc-2.6.0. For gcc-1.40, al had to be ``asm("ax")'' for
2278 * best results. gcc-2.6.0 can't handle this.
2281 __asm __volatile("outb %0,%%dx" : : "a" (al), "d" (port));
2289 * initialize all the SMP locks
2292 /* critical region when masking or unmasking interupts */
2293 struct spinlock_deprecated imen_spinlock;
2295 /* critical region for old style disable_intr/enable_intr */
2296 struct spinlock_deprecated mpintr_spinlock;
2298 /* critical region around INTR() routines */
2299 struct spinlock_deprecated intr_spinlock;
2301 /* lock region used by kernel profiling */
2302 struct spinlock_deprecated mcount_spinlock;
2304 /* locks com (tty) data/hardware accesses: a FASTINTR() */
2305 struct spinlock_deprecated com_spinlock;
2307 /* lock regions around the clock hardware */
2308 struct spinlock_deprecated clock_spinlock;
2314 * Get the initial mplock with a count of 1 for the BSP.
2315 * This uses a LOGICAL cpu ID, ie BSP == 0.
2317 cpu_get_initial_mplock();
2319 spin_lock_init(&mcount_spinlock);
2320 spin_lock_init(&intr_spinlock);
2321 spin_lock_init(&mpintr_spinlock);
2322 spin_lock_init(&imen_spinlock);
2323 spin_lock_init(&com_spinlock);
2324 spin_lock_init(&clock_spinlock);
2326 /* our token pool needs to work early */
2327 lwkt_token_pool_init();