2 * Copyright (c) 2013 Cedric GROSS <cg@cgross.info>
3 * Copyright (c) 2011 Intel Corporation
5 * Permission to use, copy, modify, and distribute this software for any
6 * purpose with or without fee is hereby granted, provided that the above
7 * copyright notice and this permission notice appear in all copies.
9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 * $FreeBSD: head/sys/dev/iwn/if_iwn_chip_cfg.h 258208 2013-11-16 04:29:02Z eadler $
20 #ifndef __IF_IWN_CHIP_CFG_H__
21 #define __IF_IWN_CHIP_CFG_H__
23 /* ==========================================================================
26 * ==========================================================================
30 * Flags for managing calibration result. See calib_need
31 * in iwn_base_params struct
33 * These are bitmasks that determine which indexes in the calibcmd
34 * array are pushed up.
36 #define IWN_FLG_NEED_PHY_CALIB_DC (1<<0)
37 #define IWN_FLG_NEED_PHY_CALIB_LO (1<<1)
38 #define IWN_FLG_NEED_PHY_CALIB_TX_IQ (1<<2)
39 #define IWN_FLG_NEED_PHY_CALIB_TX_IQ_PERIODIC (1<<3)
40 #define IWN_FLG_NEED_PHY_CALIB_BASE_BAND (1<<4)
42 * These aren't (yet) included in the calibcmd array, but
43 * are used as flags for which calibrations to use.
45 * XXX I think they should be named differently and
46 * stuffed in a different member in the config struct!
48 #define IWN_FLG_NEED_PHY_CALIB_TEMP_OFFSET (1<<5)
49 #define IWN_FLG_NEED_PHY_CALIB_CRYSTAL (1<<6)
50 #define IWN_FLG_NEED_PHY_CALIB_TEMP_OFFSETv2 (1<<7)
53 * Define some parameters for managing different NIC.
54 * Refer to linux specific file like iwl-xxxx.c to determine correct value
57 * @max_ll_items: max number of OTP blocks
58 * @shadow_ram_support: shadow support for OTP memory
59 * @shadow_reg_enable: HW shadhow register bit
60 * @no_idle_support: do not support idle mode
61 * @advanced_bt_coexist : Advanced BT management
62 * @bt_session_2 : NIC need a new struct for configure BT coexistence. Needed
63 * only if advanced_bt_coexist is true
65 * @additional_nic_config: For 6005 series
66 * @iq_invert : ? But need it for N 2000 series
67 * @regulatory_bands : XXX
68 * @enhanced_TX_power : EEPROM Has advanced TX power options. Set 'True'
69 * if update_enhanced_txpower = iwl_eeprom_enhanced_txpower.
70 * See iwl-agn-devices.c file to determine that(enhanced_txpower)
71 * @need_temp_offset_calib : Need to compute some temp offset for calibration.
72 * @calib_need : Use IWN_FLG_NEED_PHY_CALIB_* flags to specify which
73 * calibration data ucode need. See calib_init_cfg in iwl-xxxx.c
75 * @support_hostap: Define IEEE80211_C_HOSTAP for ic_caps
76 * @no_multi_vaps: See iwn_vap_create
77 * @additional_gp_drv_bit : Specific bit to defined during nic_config
78 * @bt_mode: BT configuration mode
86 struct iwn_base_params {
88 const uint16_t max_ll_items;
89 #define IWN_OTP_MAX_LL_ITEMS_1000 (3) /* OTP blocks for 1000 */
90 #define IWN_OTP_MAX_LL_ITEMS_6x00 (4) /* OTP blocks for 6x00 */
91 #define IWN_OTP_MAX_LL_ITEMS_6x50 (7) /* OTP blocks for 6x50 */
92 #define IWN_OTP_MAX_LL_ITEMS_2x00 (4) /* OTP blocks for 2x00 */
93 const bool shadow_ram_support;
94 const bool shadow_reg_enable;
95 const bool bt_session_2;
96 const bool bt_sco_disable;
97 const bool additional_nic_config;
98 const uint32_t *regulatory_bands;
99 const bool enhanced_TX_power;
100 const uint16_t calib_need;
101 const bool support_hostap;
102 const bool no_multi_vaps;
103 uint8_t additional_gp_drv_bit;
104 enum bt_mode_enum bt_mode;
107 static const struct iwn_base_params iwn5000_base_params = {
108 .pll_cfg_val = IWN_ANA_PLL_INIT, /* pll_cfg_val; */
109 .max_ll_items = IWN_OTP_MAX_LL_ITEMS_6x00, /* max_ll_items */
110 .shadow_ram_support = true, /* shadow_ram_support */
111 .shadow_reg_enable = false, /* shadow_reg_enable */
112 .bt_session_2 = false, /* bt_session_2 */
113 .bt_sco_disable = true, /* bt_sco_disable */
114 .additional_nic_config = false, /* additional_nic_config */
115 .regulatory_bands = iwn5000_regulatory_bands, /* regulatory_bands */
116 .enhanced_TX_power = false, /* enhanced_TX_power */
118 ( IWN_FLG_NEED_PHY_CALIB_LO
119 | IWN_FLG_NEED_PHY_CALIB_TX_IQ_PERIODIC
120 | IWN_FLG_NEED_PHY_CALIB_TX_IQ
121 | IWN_FLG_NEED_PHY_CALIB_BASE_BAND ),
122 .support_hostap = false, /* support_hostap */
123 .no_multi_vaps = true, /* no_multi_vaps */
124 .additional_gp_drv_bit = IWN_GP_DRIVER_NONE, /* additional_gp_drv_bit */
125 .bt_mode = IWN_BT_NONE, /* bt_mode */
131 static const struct iwn_base_params iwn4965_base_params = {
132 .pll_cfg_val = 0, /* pll_cfg_val; */
133 .max_ll_items = IWN_OTP_MAX_LL_ITEMS_6x00, /* max_ll_items - ignored for 4965 */
134 .shadow_ram_support = true, /* shadow_ram_support */
135 .shadow_reg_enable = false, /* shadow_reg_enable */
136 .bt_session_2 = false, /* bt_session_2 XXX unknown? */
137 .bt_sco_disable = true, /* bt_sco_disable XXX unknown? */
138 .additional_nic_config = false, /* additional_nic_config - not for 4965 */
139 .regulatory_bands = iwn5000_regulatory_bands, /* regulatory_bands */
140 .enhanced_TX_power = false, /* enhanced_TX_power - not for 4965 */
142 (IWN_FLG_NEED_PHY_CALIB_DC
143 | IWN_FLG_NEED_PHY_CALIB_LO
144 | IWN_FLG_NEED_PHY_CALIB_TX_IQ_PERIODIC
145 | IWN_FLG_NEED_PHY_CALIB_TX_IQ
146 | IWN_FLG_NEED_PHY_CALIB_BASE_BAND ),
147 .support_hostap = false, /* support_hostap - XXX should work on fixing! */
148 .no_multi_vaps = true, /* no_multi_vaps - XXX should work on fixing! */
149 .additional_gp_drv_bit = IWN_GP_DRIVER_NONE, /* additional_gp_drv_bit */
150 .bt_mode = IWN_BT_SIMPLE, /* bt_mode */
154 static const struct iwn_base_params iwn2000_base_params = {
156 .max_ll_items = IWN_OTP_MAX_LL_ITEMS_2x00,
157 .shadow_ram_support = true,
158 .shadow_reg_enable = false,
159 .bt_session_2 = false,
160 .bt_sco_disable = true,
161 .additional_nic_config = false,
162 .regulatory_bands = iwn2030_regulatory_bands,
163 .enhanced_TX_power = true,
165 (IWN_FLG_NEED_PHY_CALIB_DC
166 | IWN_FLG_NEED_PHY_CALIB_LO
167 | IWN_FLG_NEED_PHY_CALIB_TX_IQ
168 | IWN_FLG_NEED_PHY_CALIB_BASE_BAND
169 | IWN_FLG_NEED_PHY_CALIB_TEMP_OFFSETv2 ),
170 .support_hostap = true,
171 .no_multi_vaps = false,
172 .additional_gp_drv_bit = IWN_GP_DRIVER_REG_BIT_RADIO_IQ_INVERT,
173 .bt_mode = IWN_BT_NONE,
176 static const struct iwn_base_params iwn2030_base_params = {
178 .max_ll_items = IWN_OTP_MAX_LL_ITEMS_2x00,
179 .shadow_ram_support = true,
180 .shadow_reg_enable = false, /* XXX check? */
181 .bt_session_2 = true,
182 .bt_sco_disable = true,
183 .additional_nic_config = false,
184 .regulatory_bands = iwn2030_regulatory_bands,
185 .enhanced_TX_power = true,
187 (IWN_FLG_NEED_PHY_CALIB_DC
188 | IWN_FLG_NEED_PHY_CALIB_LO
189 | IWN_FLG_NEED_PHY_CALIB_TX_IQ
190 | IWN_FLG_NEED_PHY_CALIB_BASE_BAND
191 | IWN_FLG_NEED_PHY_CALIB_TEMP_OFFSETv2 ),
192 .support_hostap = true,
193 .no_multi_vaps = false,
194 .additional_gp_drv_bit = IWN_GP_DRIVER_REG_BIT_RADIO_IQ_INVERT,
195 .bt_mode = IWN_BT_ADVANCED,
198 static const struct iwn_base_params iwn1000_base_params = {
199 .pll_cfg_val = IWN_ANA_PLL_INIT,
200 .max_ll_items = IWN_OTP_MAX_LL_ITEMS_1000,
201 .shadow_ram_support = false,
202 .shadow_reg_enable = false, /* XXX check? */
203 .bt_session_2 = false,
204 .bt_sco_disable = false,
205 .additional_nic_config = false,
206 .regulatory_bands = iwn5000_regulatory_bands,
207 .enhanced_TX_power = false,
209 ( IWN_FLG_NEED_PHY_CALIB_LO
210 | IWN_FLG_NEED_PHY_CALIB_TX_IQ_PERIODIC
211 | IWN_FLG_NEED_PHY_CALIB_TX_IQ
212 | IWN_FLG_NEED_PHY_CALIB_BASE_BAND
214 .support_hostap = false,
215 .no_multi_vaps = true,
216 .additional_gp_drv_bit = IWN_GP_DRIVER_NONE,
217 /* XXX 1000 - no BT */
218 .bt_mode = IWN_BT_SIMPLE,
220 static const struct iwn_base_params iwn_6000_base_params = {
222 .max_ll_items = IWN_OTP_MAX_LL_ITEMS_6x00,
223 .shadow_ram_support = true,
224 .shadow_reg_enable = true,
225 .bt_session_2 = false,
226 .bt_sco_disable = false,
227 .additional_nic_config = false,
228 .regulatory_bands = iwn6000_regulatory_bands,
229 .enhanced_TX_power = true,
231 (IWN_FLG_NEED_PHY_CALIB_DC
232 | IWN_FLG_NEED_PHY_CALIB_LO
233 | IWN_FLG_NEED_PHY_CALIB_TX_IQ
234 | IWN_FLG_NEED_PHY_CALIB_BASE_BAND ),
235 .support_hostap = false,
236 .no_multi_vaps = true,
237 .additional_gp_drv_bit = IWN_GP_DRIVER_NONE,
238 .bt_mode = IWN_BT_SIMPLE,
240 static const struct iwn_base_params iwn_6000i_base_params = {
242 .max_ll_items = IWN_OTP_MAX_LL_ITEMS_6x00,
243 .shadow_ram_support = true,
244 .shadow_reg_enable = true,
245 .bt_session_2 = false,
246 .bt_sco_disable = true,
247 .additional_nic_config = false,
248 .regulatory_bands = iwn6000_regulatory_bands,
249 .enhanced_TX_power = true,
251 (IWN_FLG_NEED_PHY_CALIB_DC
252 | IWN_FLG_NEED_PHY_CALIB_LO
253 | IWN_FLG_NEED_PHY_CALIB_TX_IQ
254 | IWN_FLG_NEED_PHY_CALIB_BASE_BAND ),
255 .support_hostap = false,
256 .no_multi_vaps = true,
257 .additional_gp_drv_bit = IWN_GP_DRIVER_NONE,
258 .bt_mode = IWN_BT_SIMPLE,
260 static const struct iwn_base_params iwn_6000g2_base_params = {
262 .max_ll_items = IWN_OTP_MAX_LL_ITEMS_6x00,
263 .shadow_ram_support = true,
264 .shadow_reg_enable = true,
265 .bt_session_2 = false,
266 .bt_sco_disable = true,
267 .additional_nic_config = false,
268 .regulatory_bands = iwn6000_regulatory_bands,
269 .enhanced_TX_power = true,
271 (IWN_FLG_NEED_PHY_CALIB_DC
272 | IWN_FLG_NEED_PHY_CALIB_LO
273 | IWN_FLG_NEED_PHY_CALIB_TX_IQ
274 | IWN_FLG_NEED_PHY_CALIB_BASE_BAND
275 | IWN_FLG_NEED_PHY_CALIB_TEMP_OFFSET ),
276 .support_hostap = false,
277 .no_multi_vaps = true,
278 .additional_gp_drv_bit = 0,
279 .bt_mode = IWN_BT_SIMPLE,
282 static const struct iwn_base_params iwn_6050_base_params = {
284 .max_ll_items = IWN_OTP_MAX_LL_ITEMS_6x50,
285 .shadow_ram_support = true,
286 .shadow_reg_enable = true,
287 .bt_session_2 = false,
288 .bt_sco_disable = true,
289 .additional_nic_config = true,
290 .regulatory_bands = iwn6000_regulatory_bands,
291 .enhanced_TX_power = true,
293 (IWN_FLG_NEED_PHY_CALIB_LO
294 | IWN_FLG_NEED_PHY_CALIB_TX_IQ
295 | IWN_FLG_NEED_PHY_CALIB_BASE_BAND
296 | IWN_FLG_NEED_PHY_CALIB_TEMP_OFFSET ),
297 .support_hostap = false,
298 .no_multi_vaps = true,
299 .additional_gp_drv_bit = IWN_GP_DRIVER_NONE,
300 .bt_mode = IWN_BT_SIMPLE,
302 static const struct iwn_base_params iwn_6150_base_params = {
304 .max_ll_items = IWN_OTP_MAX_LL_ITEMS_6x50,
305 .shadow_ram_support = true,
306 .shadow_reg_enable = true,
307 .bt_session_2 = false,
308 .bt_sco_disable = true,
309 .additional_nic_config = true,
310 .regulatory_bands = iwn6000_regulatory_bands,
311 .enhanced_TX_power = true,
313 (IWN_FLG_NEED_PHY_CALIB_LO
314 | IWN_FLG_NEED_PHY_CALIB_TX_IQ
315 | IWN_FLG_NEED_PHY_CALIB_BASE_BAND),
316 .support_hostap = false,
317 .no_multi_vaps = true,
318 .additional_gp_drv_bit = IWN_GP_DRIVER_6050_1X2,
319 .bt_mode = IWN_BT_SIMPLE,
322 /* IWL_DEVICE_6035 & IWL_DEVICE_6030 */
323 static const struct iwn_base_params iwn_6000g2b_base_params = {
325 .max_ll_items = IWN_OTP_MAX_LL_ITEMS_6x00,
326 .shadow_ram_support = true,
327 .shadow_reg_enable = true,
328 .bt_session_2 = false,
329 .bt_sco_disable = true,
330 .additional_nic_config = false,
331 .regulatory_bands = iwn6000_regulatory_bands,
332 .enhanced_TX_power = true,
334 (IWN_FLG_NEED_PHY_CALIB_DC
335 | IWN_FLG_NEED_PHY_CALIB_LO
336 | IWN_FLG_NEED_PHY_CALIB_TX_IQ
337 | IWN_FLG_NEED_PHY_CALIB_BASE_BAND
338 | IWN_FLG_NEED_PHY_CALIB_TEMP_OFFSET ),
339 .support_hostap = false,
340 .no_multi_vaps = true,
341 .additional_gp_drv_bit = IWN_GP_DRIVER_NONE,
342 .bt_mode = IWN_BT_ADVANCED,
344 static const struct iwn_base_params iwn_5x50_base_params = {
345 .pll_cfg_val = IWN_ANA_PLL_INIT,
346 .max_ll_items = IWN_OTP_MAX_LL_ITEMS_6x00,
347 .shadow_ram_support = true,
348 .shadow_reg_enable = false,
349 .bt_session_2 = false,
350 .bt_sco_disable = true,
351 .additional_nic_config = false,
352 .regulatory_bands = iwn5000_regulatory_bands,
353 .enhanced_TX_power =false,
355 (IWN_FLG_NEED_PHY_CALIB_DC
356 | IWN_FLG_NEED_PHY_CALIB_LO
357 | IWN_FLG_NEED_PHY_CALIB_TX_IQ
358 | IWN_FLG_NEED_PHY_CALIB_BASE_BAND ),
359 .support_hostap = false,
360 .no_multi_vaps = true,
361 .additional_gp_drv_bit = IWN_GP_DRIVER_NONE,
362 .bt_mode = IWN_BT_SIMPLE,
365 #endif /* __IF_IWN_CHIP_CFG_H__ */