2 * Copyright (c) 2002-2008 Sam Leffler, Errno Consulting
3 * Copyright (c) 2002-2008 Atheros Communications, Inc.
5 * Permission to use, copy, modify, and/or distribute this software for any
6 * purpose with or without fee is hereby granted, provided that the above
7 * copyright notice and this permission notice appear in all copies.
9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 * $FreeBSD: head/sys/dev/ath/ath_hal/ar5312/ar5315_gpio.c 188974 2009-02-24 00:12:16Z sam $
22 #if (AH_SUPPORT_2316 || AH_SUPPORT_2317)
25 #include "ah_internal.h"
28 #include "ar5312/ar5312.h"
29 #include "ar5312/ar5312reg.h"
30 #include "ar5312/ar5312phy.h"
32 #define AR_NUM_GPIO 7 /* 6 GPIO pins */
33 #define AR5315_GPIOD_MASK 0x0000007F /* GPIO data reg r/w mask */
36 * Configure GPIO Output lines
39 ar5315GpioCfgOutput(struct ath_hal *ah, uint32_t gpio, HAL_GPIO_MUX_TYPE type)
41 uint32_t gpioOffset = (AR5315_GPIO_BASE - ((uint32_t) ah->ah_sh));
43 HALASSERT(gpio < AR_NUM_GPIO);
45 OS_REG_WRITE(ah, gpioOffset+AR5315_GPIODIR,
46 (OS_REG_READ(ah, gpioOffset+AR5315_GPIODIR) &~ AR5315_GPIODIR_M(gpio))
47 | AR5315_GPIODIR_O(gpio));
53 * Configure GPIO Input lines
56 ar5315GpioCfgInput(struct ath_hal *ah, uint32_t gpio)
58 uint32_t gpioOffset = (AR5315_GPIO_BASE - ((uint32_t) ah->ah_sh));
60 HALASSERT(gpio < AR_NUM_GPIO);
62 OS_REG_WRITE(ah, gpioOffset+AR5315_GPIODIR,
63 (OS_REG_READ(ah, gpioOffset+AR5315_GPIODIR) &~ AR5315_GPIODIR_M(gpio))
64 | AR5315_GPIODIR_I(gpio));
70 * Once configured for I/O - set output lines
73 ar5315GpioSet(struct ath_hal *ah, uint32_t gpio, uint32_t val)
76 uint32_t gpioOffset = (AR5315_GPIO_BASE - ((uint32_t) ah->ah_sh));
78 HALASSERT(gpio < AR_NUM_GPIO);
80 reg = OS_REG_READ(ah, gpioOffset+AR5315_GPIODO);
82 reg |= (val&1) << gpio;
84 OS_REG_WRITE(ah, gpioOffset+AR5315_GPIODO, reg);
89 * Once configured for I/O - get input lines
92 ar5315GpioGet(struct ath_hal *ah, uint32_t gpio)
94 uint32_t gpioOffset = (AR5315_GPIO_BASE - ((uint32_t) ah->ah_sh));
96 if (gpio < AR_NUM_GPIO) {
97 uint32_t val = OS_REG_READ(ah, gpioOffset+AR5315_GPIODI);
98 val = ((val & AR5315_GPIOD_MASK) >> gpio) & 0x1;
106 * Set the GPIO Interrupt
109 ar5315GpioSetIntr(struct ath_hal *ah, u_int gpio, uint32_t ilevel)
112 uint32_t gpioOffset = (AR5315_GPIO_BASE - ((uint32_t) ah->ah_sh));
114 /* XXX bounds check gpio */
115 val = OS_REG_READ(ah, gpioOffset+AR5315_GPIOINT);
116 val &= ~(AR5315_GPIOINT_M | AR5315_GPIOINTLVL_M);
117 val |= gpio << AR5315_GPIOINT_S;
119 val |= 2 << AR5315_GPIOINTLVL_S; /* interrupt on pin high */
121 val |= 1 << AR5315_GPIOINTLVL_S; /* interrupt on pin low */
123 /* Don't need to change anything for low level interrupt. */
124 OS_REG_WRITE(ah, gpioOffset+AR5315_GPIOINT, val);
126 /* Change the interrupt mask. */
127 (void) ar5212SetInterrupts(ah, AH5212(ah)->ah_maskReg | HAL_INT_GPIO);
131 #endif /* AH_SUPPORT_2316 || AH_SUPPORT_2317 */