2 * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting
3 * Copyright (c) 2002-2008 Atheros Communications, Inc.
5 * Permission to use, copy, modify, and/or distribute this software for any
6 * purpose with or without fee is hereby granted, provided that the above
7 * copyright notice and this permission notice appear in all copies.
9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 * $FreeBSD: head/sys/dev/ath/ath_hal/ar5416/ar2133.c 188980 2009-02-24 01:16:40Z sam $
23 #include "ah_internal.h"
25 #include "ah_eeprom_v14.h"
27 #include "ar5416/ar5416.h"
28 #include "ar5416/ar5416reg.h"
29 #include "ar5416/ar5416phy.h"
32 RF_HAL_FUNCS base; /* public state, must be first */
33 uint16_t pcdacTable[1];
42 /* NB: Bank*Data storage follows */
44 #define AR2133(ah) ((struct ar2133State *) AH5212(ah)->ah_rfHal)
46 #define ar5416ModifyRfBuffer ar5212ModifyRfBuffer /*XXX*/
48 void ar5416ModifyRfBuffer(uint32_t *rfBuf, uint32_t reg32,
49 uint32_t numBits, uint32_t firstBit, uint32_t column);
52 ar2133WriteRegs(struct ath_hal *ah, u_int modesIndex, u_int freqIndex,
55 (void) ath_hal_ini_write(ah, &AH5416(ah)->ah_ini_bb_rfgain,
60 * Take the MHz channel value and set the Channel value
62 * ASSUMES: Writes enabled to analog bus
65 ar2133SetChannel(struct ath_hal *ah, const struct ieee80211_channel *chan)
67 uint32_t channelSel = 0;
68 uint32_t bModeSynth = 0;
69 uint32_t aModeRefSel = 0;
74 OS_MARK(ah, AH_MARK_SETCHANNEL, chan->ic_freq);
76 ar5416GetChannelCenters(ah, chan, ¢ers);
77 freq = centers.synth_center;
82 if (((freq - 2192) % 5) == 0) {
83 channelSel = ((freq - 672) * 2 - 3040)/10;
85 } else if (((freq - 2224) % 5) == 0) {
86 channelSel = ((freq - 704) * 2 - 3040) / 10;
89 HALDEBUG(ah, HAL_DEBUG_ANY,
90 "%s: invalid channel %u MHz\n", __func__, freq);
94 channelSel = (channelSel << 2) & 0xff;
95 channelSel = ath_hal_reverseBits(channelSel, 8);
97 txctl = OS_REG_READ(ah, AR_PHY_CCK_TX_CTRL);
99 /* Enable channel spreading for channel 14 */
100 OS_REG_WRITE(ah, AR_PHY_CCK_TX_CTRL,
101 txctl | AR_PHY_CCK_TX_CTRL_JAPAN);
103 OS_REG_WRITE(ah, AR_PHY_CCK_TX_CTRL,
104 txctl &~ AR_PHY_CCK_TX_CTRL_JAPAN);
106 } else if ((freq % 20) == 0 && freq >= 5120) {
107 channelSel = ath_hal_reverseBits(((freq - 4800) / 20 << 2), 8);
108 if (AR_SREV_SOWL_10_OR_LATER(ah))
109 aModeRefSel = ath_hal_reverseBits(3, 2);
111 aModeRefSel = ath_hal_reverseBits(1, 2);
112 } else if ((freq % 10) == 0) {
113 channelSel = ath_hal_reverseBits(((freq - 4800) / 10 << 1), 8);
114 if (AR_SREV_SOWL_10_OR_LATER(ah))
115 aModeRefSel = ath_hal_reverseBits(2, 2);
117 aModeRefSel = ath_hal_reverseBits(1, 2);
118 } else if ((freq % 5) == 0) {
119 channelSel = ath_hal_reverseBits((freq - 4800) / 5, 8);
120 aModeRefSel = ath_hal_reverseBits(1, 2);
122 HALDEBUG(ah, HAL_DEBUG_ANY, "%s: invalid channel %u MHz\n",
127 reg32 = (channelSel << 8) | (aModeRefSel << 2) | (bModeSynth << 1) |
130 OS_REG_WRITE(ah, AR_PHY(0x37), reg32);
132 AH_PRIVATE(ah)->ah_curchan = chan;
138 * Return a reference to the requested RF Bank.
141 ar2133GetRfBank(struct ath_hal *ah, int bank)
143 struct ar2133State *priv = AR2133(ah);
145 HALASSERT(priv != AH_NULL);
147 case 1: return priv->Bank1Data;
148 case 2: return priv->Bank2Data;
149 case 3: return priv->Bank3Data;
150 case 6: return priv->Bank6Data;
151 case 7: return priv->Bank7Data;
153 HALDEBUG(ah, HAL_DEBUG_ANY, "%s: unknown RF Bank %d requested\n",
159 * Reads EEPROM header info from device structure and programs
162 * REQUIRES: Access to the analog rf device
165 ar2133SetRfRegs(struct ath_hal *ah, const struct ieee80211_channel *chan,
166 uint16_t modesIndex, uint16_t *rfXpdGain)
168 struct ar2133State *priv = AR2133(ah);
173 /* Setup Bank 0 Write */
174 ath_hal_ini_bank_setup(priv->Bank0Data, &AH5416(ah)->ah_ini_bank0, 1);
176 /* Setup Bank 1 Write */
177 ath_hal_ini_bank_setup(priv->Bank1Data, &AH5416(ah)->ah_ini_bank1, 1);
179 /* Setup Bank 2 Write */
180 ath_hal_ini_bank_setup(priv->Bank2Data, &AH5416(ah)->ah_ini_bank2, 1);
182 /* Setup Bank 3 Write */
183 ath_hal_ini_bank_setup(priv->Bank3Data, &AH5416(ah)->ah_ini_bank3, modesIndex);
185 /* Setup Bank 6 Write */
186 ath_hal_ini_bank_setup(priv->Bank6Data, &AH5416(ah)->ah_ini_bank6, modesIndex);
188 /* Only the 5 or 2 GHz OB/DB need to be set for a mode */
189 if (IEEE80211_IS_CHAN_2GHZ(chan)) {
190 ar5416ModifyRfBuffer(priv->Bank6Data,
191 ath_hal_eepromGet(ah, AR_EEP_OB_2, AH_NULL), 3, 197, 0);
192 ar5416ModifyRfBuffer(priv->Bank6Data,
193 ath_hal_eepromGet(ah, AR_EEP_DB_2, AH_NULL), 3, 194, 0);
195 ar5416ModifyRfBuffer(priv->Bank6Data,
196 ath_hal_eepromGet(ah, AR_EEP_OB_5, AH_NULL), 3, 203, 0);
197 ar5416ModifyRfBuffer(priv->Bank6Data,
198 ath_hal_eepromGet(ah, AR_EEP_DB_5, AH_NULL), 3, 200, 0);
200 /* Setup Bank 7 Setup */
201 ath_hal_ini_bank_setup(priv->Bank7Data, &AH5416(ah)->ah_ini_bank7, 1);
203 /* Write Analog registers */
204 writes = ath_hal_ini_bank_write(ah, &AH5416(ah)->ah_ini_bank0,
206 writes = ath_hal_ini_bank_write(ah, &AH5416(ah)->ah_ini_bank1,
207 priv->Bank1Data, writes);
208 writes = ath_hal_ini_bank_write(ah, &AH5416(ah)->ah_ini_bank2,
209 priv->Bank2Data, writes);
210 writes = ath_hal_ini_bank_write(ah, &AH5416(ah)->ah_ini_bank3,
211 priv->Bank3Data, writes);
212 writes = ath_hal_ini_bank_write(ah, &AH5416(ah)->ah_ini_bank6,
213 priv->Bank6Data, writes);
214 (void) ath_hal_ini_bank_write(ah, &AH5416(ah)->ah_ini_bank7,
215 priv->Bank7Data, writes);
222 * Read the transmit power levels from the structures taken from EEPROM
223 * Interpolate read transmit power values for this channel
224 * Organize the transmit power values into a table for writing into the hardware
228 ar2133SetPowerTable(struct ath_hal *ah, int16_t *pPowerMin, int16_t *pPowerMax,
229 const struct ieee80211_channel *chan, uint16_t *rfXpdGain)
236 ar2133GetMinPower(struct ath_hal *ah, EXPN_DATA_PER_CHANNEL_5112 *data)
239 int16_t minGain,minPwr,minPcdac,retVal;
241 /* Assume NUM_POINTS_XPD0 > 0 */
242 minGain = data->pDataPerXPD[0].xpd_gain;
243 for (minIndex=0,i=1; i<NUM_XPD_PER_CHANNEL; i++) {
244 if (data->pDataPerXPD[i].xpd_gain < minGain) {
246 minGain = data->pDataPerXPD[i].xpd_gain;
249 minPwr = data->pDataPerXPD[minIndex].pwr_t4[0];
250 minPcdac = data->pDataPerXPD[minIndex].pcdac[0];
251 for (i=1; i<NUM_POINTS_XPD0; i++) {
252 if (data->pDataPerXPD[minIndex].pwr_t4[i] < minPwr) {
253 minPwr = data->pDataPerXPD[minIndex].pwr_t4[i];
254 minPcdac = data->pDataPerXPD[minIndex].pcdac[i];
257 retVal = minPwr - (minPcdac*2);
263 ar2133GetChannelMaxMinPower(struct ath_hal *ah,
264 const struct ieee80211_channel *chan,
265 int16_t *maxPow, int16_t *minPow)
268 struct ath_hal_5212 *ahp = AH5212(ah);
269 int numChannels=0,i,last;
270 int totalD, totalF,totalMin;
271 EXPN_DATA_PER_CHANNEL_5112 *data=AH_NULL;
272 EEPROM_POWER_EXPN_5112 *powerArray=AH_NULL;
275 if (IS_CHAN_A(chan)) {
276 powerArray = ahp->ah_modePowerArray5112;
277 data = powerArray[headerInfo11A].pDataPerChannel;
278 numChannels = powerArray[headerInfo11A].numChannels;
279 } else if (IS_CHAN_G(chan) || IS_CHAN_108G(chan)) {
280 /* XXX - is this correct? Should we also use the same power for turbo G? */
281 powerArray = ahp->ah_modePowerArray5112;
282 data = powerArray[headerInfo11G].pDataPerChannel;
283 numChannels = powerArray[headerInfo11G].numChannels;
284 } else if (IS_CHAN_B(chan)) {
285 powerArray = ahp->ah_modePowerArray5112;
286 data = powerArray[headerInfo11B].pDataPerChannel;
287 numChannels = powerArray[headerInfo11B].numChannels;
291 /* Make sure the channel is in the range of the TP values
294 if ((numChannels < 1) ||
295 (chan->channel < data[0].channelValue) ||
296 (chan->channel > data[numChannels-1].channelValue))
299 /* Linearly interpolate the power value now */
301 (i<numChannels) && (chan->channel > data[i].channelValue);
303 totalD = data[i].channelValue - data[last].channelValue;
305 totalF = data[i].maxPower_t4 - data[last].maxPower_t4;
306 *maxPow = (int8_t) ((totalF*(chan->channel-data[last].channelValue) + data[last].maxPower_t4*totalD)/totalD);
308 totalMin = ar2133GetMinPower(ah,&data[i]) - ar2133GetMinPower(ah, &data[last]);
309 *minPow = (int8_t) ((totalMin*(chan->channel-data[last].channelValue) + ar2133GetMinPower(ah, &data[last])*totalD)/totalD);
312 if (chan->channel == data[i].channelValue) {
313 *maxPow = data[i].maxPower_t4;
314 *minPow = ar2133GetMinPower(ah, &data[i]);
320 *maxPow = *minPow = 0;
326 ar2133GetNoiseFloor(struct ath_hal *ah, int16_t nfarray[])
328 struct ath_hal_5416 *ahp = AH5416(ah);
331 switch (ahp->ah_rx_chainmask) {
333 nf = MS(OS_REG_READ(ah, AR_PHY_CH2_CCA), AR_PHY_CH2_MINCCA_PWR);
335 nf = 0 - ((nf ^ 0x1ff) + 1);
336 HALDEBUG(ah, HAL_DEBUG_NFCAL,
337 "NF calibrated [ctl] [chain 2] is %d\n", nf);
340 nf = MS(OS_REG_READ(ah, AR_PHY_CH2_EXT_CCA), AR_PHY_CH2_EXT_MINCCA_PWR);
342 nf = 0 - ((nf ^ 0x1ff) + 1);
343 HALDEBUG(ah, HAL_DEBUG_NFCAL,
344 "NF calibrated [ext] [chain 2] is %d\n", nf);
349 nf = MS(OS_REG_READ(ah, AR_PHY_CH1_CCA), AR_PHY_CH1_MINCCA_PWR);
351 nf = 0 - ((nf ^ 0x1ff) + 1);
352 HALDEBUG(ah, HAL_DEBUG_NFCAL,
353 "NF calibrated [ctl] [chain 1] is %d\n", nf);
357 nf = MS(OS_REG_READ(ah, AR_PHY_CH1_EXT_CCA), AR_PHY_CH1_EXT_MINCCA_PWR);
359 nf = 0 - ((nf ^ 0x1ff) + 1);
360 HALDEBUG(ah, HAL_DEBUG_NFCAL,
361 "NF calibrated [ext] [chain 1] is %d\n", nf);
365 nf = MS(OS_REG_READ(ah, AR_PHY_CCA), AR_PHY_MINCCA_PWR);
367 nf = 0 - ((nf ^ 0x1ff) + 1);
368 HALDEBUG(ah, HAL_DEBUG_NFCAL,
369 "NF calibrated [ctl] [chain 0] is %d\n", nf);
372 nf = MS(OS_REG_READ(ah, AR_PHY_EXT_CCA), AR_PHY_EXT_MINCCA_PWR);
374 nf = 0 - ((nf ^ 0x1ff) + 1);
375 HALDEBUG(ah, HAL_DEBUG_NFCAL,
376 "NF calibrated [ext] [chain 0] is %d\n", nf);
384 * Adjust NF based on statistical values for 5GHz frequencies.
385 * Stubbed:Not used by Fowl
388 ar2133GetNfAdjust(struct ath_hal *ah, const HAL_CHANNEL_INTERNAL *c)
394 * Free memory for analog bank scratch buffers
397 ar2133RfDetach(struct ath_hal *ah)
399 struct ath_hal_5212 *ahp = AH5212(ah);
401 HALASSERT(ahp->ah_rfHal != AH_NULL);
402 ath_hal_free(ahp->ah_rfHal);
403 ahp->ah_rfHal = AH_NULL;
407 * Allocate memory for analog bank scratch buffers
408 * Scratch Buffer will be reinitialized every reset so no need to zero now
411 ar2133RfAttach(struct ath_hal *ah, HAL_STATUS *status)
413 struct ath_hal_5212 *ahp = AH5212(ah);
414 struct ar2133State *priv;
417 HALDEBUG(ah, HAL_DEBUG_ATTACH, "%s: attach AR2133 radio\n", __func__);
419 HALASSERT(ahp->ah_rfHal == AH_NULL);
420 priv = ath_hal_malloc(sizeof(struct ar2133State)
421 + AH5416(ah)->ah_ini_bank0.rows * sizeof(uint32_t)
422 + AH5416(ah)->ah_ini_bank1.rows * sizeof(uint32_t)
423 + AH5416(ah)->ah_ini_bank2.rows * sizeof(uint32_t)
424 + AH5416(ah)->ah_ini_bank3.rows * sizeof(uint32_t)
425 + AH5416(ah)->ah_ini_bank6.rows * sizeof(uint32_t)
426 + AH5416(ah)->ah_ini_bank7.rows * sizeof(uint32_t)
428 if (priv == AH_NULL) {
429 HALDEBUG(ah, HAL_DEBUG_ANY,
430 "%s: cannot allocate private state\n", __func__);
431 *status = HAL_ENOMEM; /* XXX */
434 priv->base.rfDetach = ar2133RfDetach;
435 priv->base.writeRegs = ar2133WriteRegs;
436 priv->base.getRfBank = ar2133GetRfBank;
437 priv->base.setChannel = ar2133SetChannel;
438 priv->base.setRfRegs = ar2133SetRfRegs;
439 priv->base.setPowerTable = ar2133SetPowerTable;
440 priv->base.getChannelMaxMinPower = ar2133GetChannelMaxMinPower;
441 priv->base.getNfAdjust = ar2133GetNfAdjust;
443 bankData = (uint32_t *) &priv[1];
444 priv->Bank0Data = bankData, bankData += AH5416(ah)->ah_ini_bank0.rows;
445 priv->Bank1Data = bankData, bankData += AH5416(ah)->ah_ini_bank1.rows;
446 priv->Bank2Data = bankData, bankData += AH5416(ah)->ah_ini_bank2.rows;
447 priv->Bank3Data = bankData, bankData += AH5416(ah)->ah_ini_bank3.rows;
448 priv->Bank6Data = bankData, bankData += AH5416(ah)->ah_ini_bank6.rows;
449 priv->Bank7Data = bankData, bankData += AH5416(ah)->ah_ini_bank7.rows;
451 ahp->ah_pcdacTable = priv->pcdacTable;
452 ahp->ah_pcdacTableSize = sizeof(priv->pcdacTable);
453 ahp->ah_rfHal = &priv->base;
455 * Set noise floor adjust method; we arrange a
456 * direct call instead of thunking.
458 AH_PRIVATE(ah)->ah_getNfAdjust = priv->base.getNfAdjust;
459 AH_PRIVATE(ah)->ah_getNoiseFloor = ar2133GetNoiseFloor;