2 * Copyright (c) 1992 Terrence R. Lambert.
3 * Copyright (c) 1982, 1987, 1990 The Regents of the University of California.
6 * This code is derived from software contributed to Berkeley by
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 * 3. All advertising materials mentioning features or use of this software
18 * must display the following acknowledgement:
19 * This product includes software developed by the University of
20 * California, Berkeley and its contributors.
21 * 4. Neither the name of the University nor the names of its contributors
22 * may be used to endorse or promote products derived from this software
23 * without specific prior written permission.
25 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
28 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
31 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
37 * from: @(#)machdep.c 7.4 (Berkeley) 6/3/91
38 * $FreeBSD: src/sys/i386/i386/machdep.c,v 1.385.2.30 2003/05/31 08:48:05 alc Exp $
43 #include "opt_atalk.h"
44 #include "opt_compat.h"
47 #include "opt_directio.h"
50 #include "opt_maxmem.h"
51 #include "opt_msgbuf.h"
52 #include "opt_perfmon.h"
54 #include "opt_userconfig.h"
57 #include <sys/param.h>
58 #include <sys/systm.h>
59 #include <sys/sysproto.h>
60 #include <sys/signalvar.h>
61 #include <sys/kernel.h>
62 #include <sys/linker.h>
63 #include <sys/malloc.h>
67 #include <sys/reboot.h>
69 #include <sys/msgbuf.h>
70 #include <sys/sysent.h>
71 #include <sys/sysctl.h>
72 #include <sys/vmmeter.h>
74 #include <sys/upcall.h>
75 #include <sys/usched.h>
79 #include <vm/vm_param.h>
81 #include <vm/vm_kern.h>
82 #include <vm/vm_object.h>
83 #include <vm/vm_page.h>
84 #include <vm/vm_map.h>
85 #include <vm/vm_pager.h>
86 #include <vm/vm_extern.h>
88 #include <sys/thread2.h>
89 #include <sys/mplock2.h>
97 #include <machine/cpu.h>
98 #include <machine/clock.h>
99 #include <machine/specialreg.h>
100 #include <machine/bootinfo.h>
101 #include <machine/md_var.h>
102 #include <machine/pcb_ext.h> /* pcb.h included via sys/user.h */
103 #include <machine/globaldata.h> /* CPU_prvspace */
104 #include <machine/smp.h>
106 #include <machine/perfmon.h>
108 #include <machine/cputypes.h>
111 #include <bus/isa/isa_device.h>
113 #include <machine_base/isa/intr_machdep.h>
114 #include <machine_base/isa/elcr_var.h>
115 #include <bus/isa/rtc.h>
116 #include <machine/vm86.h>
117 #include <sys/random.h>
118 #include <sys/ptrace.h>
119 #include <machine/sigframe.h>
121 #include <sys/machintr.h>
123 #define PHYSMAP_ENTRIES 10
125 extern void init386(int first);
126 extern void dblfault_handler(void);
128 extern void printcpuinfo(void); /* XXX header file */
129 extern void finishidentcpu(void);
130 extern void panicifcpuunsupported(void);
131 extern void initializecpu(void);
133 static void cpu_startup(void *);
134 #ifndef CPU_DISABLE_SSE
135 static void set_fpregs_xmm(struct save87 *, struct savexmm *);
136 static void fill_fpregs_xmm(struct savexmm *, struct save87 *);
137 #endif /* CPU_DISABLE_SSE */
139 extern void ffs_rawread_setup(void);
140 #endif /* DIRECTIO */
141 static void init_locks(void);
143 SYSINIT(cpu, SI_BOOT2_SMP, SI_ORDER_FIRST, cpu_startup, NULL)
145 int _udatasel, _ucodesel;
148 int64_t tsc_offsets[MAXCPU];
150 int64_t tsc_offsets[1];
153 #if defined(SWTCH_OPTIM_STATS)
154 extern int swtch_optim_stats;
155 SYSCTL_INT(_debug, OID_AUTO, swtch_optim_stats,
156 CTLFLAG_RD, &swtch_optim_stats, 0, "");
157 SYSCTL_INT(_debug, OID_AUTO, tlb_flush_count,
158 CTLFLAG_RD, &tlb_flush_count, 0, "");
163 u_long ebda_addr = 0;
166 sysctl_hw_physmem(SYSCTL_HANDLER_ARGS)
168 int error = sysctl_handle_int(oidp, 0, ctob(physmem), req);
172 SYSCTL_PROC(_hw, HW_PHYSMEM, physmem, CTLTYPE_INT|CTLFLAG_RD,
173 0, 0, sysctl_hw_physmem, "IU", "");
176 sysctl_hw_usermem(SYSCTL_HANDLER_ARGS)
178 int error = sysctl_handle_int(oidp, 0,
179 ctob(physmem - vmstats.v_wire_count), req);
183 SYSCTL_PROC(_hw, HW_USERMEM, usermem, CTLTYPE_INT|CTLFLAG_RD,
184 0, 0, sysctl_hw_usermem, "IU", "");
187 sysctl_hw_availpages(SYSCTL_HANDLER_ARGS)
189 int error = sysctl_handle_int(oidp, 0,
190 i386_btop(avail_end - avail_start), req);
194 SYSCTL_PROC(_hw, OID_AUTO, availpages, CTLTYPE_INT|CTLFLAG_RD,
195 0, 0, sysctl_hw_availpages, "I", "");
200 vm_paddr_t phys_avail[PHYSMAP_ENTRIES*2+2];
201 vm_paddr_t dump_avail[PHYSMAP_ENTRIES*2+2];
204 static vm_offset_t buffer_sva, buffer_eva;
205 vm_offset_t clean_sva, clean_eva;
206 static vm_offset_t pager_sva, pager_eva;
207 static struct trapframe proc0_tf;
210 cpu_startup(void *dummy)
214 vm_offset_t firstaddr;
216 if (boothowto & RB_VERBOSE)
220 * Good {morning,afternoon,evening,night}.
222 kprintf("%s", version);
225 panicifcpuunsupported();
229 kprintf("real memory = %ju (%ju MB)\n",
231 (intmax_t)Realmem / 1024 / 1024);
233 * Display any holes after the first chunk of extended memory.
238 kprintf("Physical memory chunk(s):\n");
239 for (indx = 0; phys_avail[indx + 1] != 0; indx += 2) {
240 vm_paddr_t size1 = phys_avail[indx + 1] - phys_avail[indx];
242 kprintf("0x%08llx - 0x%08llx, %llu bytes (%llu pages)\n",
243 phys_avail[indx], phys_avail[indx + 1] - 1, size1,
249 * Allocate space for system data structures.
250 * The first available kernel virtual address is in "v".
251 * As pages of kernel virtual memory are allocated, "v" is incremented.
252 * As pages of memory are allocated and cleared,
253 * "firstaddr" is incremented.
254 * An index into the kernel page table corresponding to the
255 * virtual memory address maintained in "v" is kept in "mapaddr".
259 * Make two passes. The first pass calculates how much memory is
260 * needed and allocates it. The second pass assigns virtual
261 * addresses to the various data structures.
265 v = (caddr_t)firstaddr;
267 #define valloc(name, type, num) \
268 (name) = (type *)v; v = (caddr_t)((name)+(num))
269 #define valloclim(name, type, num, lim) \
270 (name) = (type *)v; v = (caddr_t)((lim) = ((name)+(num)))
273 * The nominal buffer size (and minimum KVA allocation) is BKVASIZE.
274 * For the first 64MB of ram nominally allocate sufficient buffers to
275 * cover 1/4 of our ram. Beyond the first 64MB allocate additional
276 * buffers to cover 1/20 of our ram over 64MB. When auto-sizing
277 * the buffer cache we limit the eventual kva reservation to
280 * factor represents the 1/4 x ram conversion.
283 int factor = 4 * BKVASIZE / 1024;
284 int kbytes = physmem * (PAGE_SIZE / 1024);
288 nbuf += min((kbytes - 4096) / factor, 65536 / factor);
290 nbuf += (kbytes - 65536) * 2 / (factor * 5);
291 if (maxbcache && nbuf > maxbcache / BKVASIZE)
292 nbuf = maxbcache / BKVASIZE;
296 * Do not allow the buffer_map to be more then 1/2 the size of the
299 if (nbuf > (virtual_end - virtual_start) / (BKVASIZE * 2)) {
300 nbuf = (virtual_end - virtual_start) / (BKVASIZE * 2);
301 kprintf("Warning: nbufs capped at %d\n", nbuf);
304 /* limit to 128 on i386 */
305 nswbuf = max(min(nbuf/4, 128), 16);
307 if (nswbuf < NSWBUF_MIN)
314 valloc(swbuf, struct buf, nswbuf);
315 valloc(buf, struct buf, nbuf);
318 * End of first pass, size has been calculated so allocate memory
320 if (firstaddr == 0) {
321 size = (vm_size_t)(v - firstaddr);
322 firstaddr = kmem_alloc(&kernel_map, round_page(size));
324 panic("startup: no room for tables");
329 * End of second pass, addresses have been assigned
331 if ((vm_size_t)(v - firstaddr) != size)
332 panic("startup: table size inconsistency");
334 kmem_suballoc(&kernel_map, &clean_map, &clean_sva, &clean_eva,
335 (nbuf*BKVASIZE) + (nswbuf*MAXPHYS) + pager_map_size);
336 kmem_suballoc(&clean_map, &buffer_map, &buffer_sva, &buffer_eva,
338 buffer_map.system_map = 1;
339 kmem_suballoc(&clean_map, &pager_map, &pager_sva, &pager_eva,
340 (nswbuf*MAXPHYS) + pager_map_size);
341 pager_map.system_map = 1;
343 #if defined(USERCONFIG)
345 cninit(); /* the preferred console may have changed */
348 kprintf("avail memory = %ju (%ju MB)\n",
349 (intmax_t)ptoa(vmstats.v_free_count),
350 (intmax_t)ptoa(vmstats.v_free_count) / 1024 / 1024);
353 * Set up buffers, so they can be used to read disk labels.
356 vm_pager_bufferinit();
358 /* Log ELCR information */
363 * OK, enough kmem_alloc/malloc state should be up, lets get on with it!
365 mp_start(); /* fire up the APs and APICs */
372 * Send an interrupt to process.
374 * Stack is set up to allow sigcode stored
375 * at top to call routine, followed by kcall
376 * to sigreturn routine below. After sigreturn
377 * resets the signal mask, the stack, and the
378 * frame pointer, it returns to the user
382 sendsig(sig_t catcher, int sig, sigset_t *mask, u_long code)
384 struct lwp *lp = curthread->td_lwp;
385 struct proc *p = lp->lwp_proc;
386 struct trapframe *regs;
387 struct sigacts *psp = p->p_sigacts;
388 struct sigframe sf, *sfp;
391 regs = lp->lwp_md.md_regs;
392 oonstack = (lp->lwp_sigstk.ss_flags & SS_ONSTACK) ? 1 : 0;
394 /* save user context */
395 bzero(&sf, sizeof(struct sigframe));
396 sf.sf_uc.uc_sigmask = *mask;
397 sf.sf_uc.uc_stack = lp->lwp_sigstk;
398 sf.sf_uc.uc_mcontext.mc_onstack = oonstack;
399 bcopy(regs, &sf.sf_uc.uc_mcontext.mc_gs, sizeof(struct trapframe));
401 /* make the size of the saved context visible to userland */
402 sf.sf_uc.uc_mcontext.mc_len = sizeof(sf.sf_uc.uc_mcontext);
404 /* save mailbox pending state for syscall interlock semantics */
405 if (p->p_flag & P_MAILBOX)
406 sf.sf_uc.uc_mcontext.mc_xflags |= PGEX_MAILBOX;
408 /* Allocate and validate space for the signal handler context. */
409 if ((lp->lwp_flag & LWP_ALTSTACK) != 0 && !oonstack &&
410 SIGISMEMBER(psp->ps_sigonstack, sig)) {
411 sfp = (struct sigframe *)(lp->lwp_sigstk.ss_sp +
412 lp->lwp_sigstk.ss_size - sizeof(struct sigframe));
413 lp->lwp_sigstk.ss_flags |= SS_ONSTACK;
415 sfp = (struct sigframe *)regs->tf_esp - 1;
418 /* Translate the signal is appropriate */
419 if (p->p_sysent->sv_sigtbl) {
420 if (sig <= p->p_sysent->sv_sigsize)
421 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)];
424 /* Build the argument list for the signal handler. */
426 sf.sf_ucontext = (register_t)&sfp->sf_uc;
427 if (SIGISMEMBER(psp->ps_siginfo, sig)) {
428 /* Signal handler installed with SA_SIGINFO. */
429 sf.sf_siginfo = (register_t)&sfp->sf_si;
430 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher;
432 /* fill siginfo structure */
433 sf.sf_si.si_signo = sig;
434 sf.sf_si.si_code = code;
435 sf.sf_si.si_addr = (void*)regs->tf_err;
438 /* Old FreeBSD-style arguments. */
439 sf.sf_siginfo = code;
440 sf.sf_addr = regs->tf_err;
441 sf.sf_ahu.sf_handler = catcher;
445 * If we're a vm86 process, we want to save the segment registers.
446 * We also change eflags to be our emulated eflags, not the actual
449 if (regs->tf_eflags & PSL_VM) {
450 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
451 struct vm86_kernel *vm86 = &lp->lwp_thread->td_pcb->pcb_ext->ext_vm86;
453 sf.sf_uc.uc_mcontext.mc_gs = tf->tf_vm86_gs;
454 sf.sf_uc.uc_mcontext.mc_fs = tf->tf_vm86_fs;
455 sf.sf_uc.uc_mcontext.mc_es = tf->tf_vm86_es;
456 sf.sf_uc.uc_mcontext.mc_ds = tf->tf_vm86_ds;
458 if (vm86->vm86_has_vme == 0)
459 sf.sf_uc.uc_mcontext.mc_eflags =
460 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) |
461 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP));
464 * Clear PSL_NT to inhibit T_TSSFLT faults on return from
465 * syscalls made by the signal handler. This just avoids
466 * wasting time for our lazy fixup of such faults. PSL_NT
467 * does nothing in vm86 mode, but vm86 programs can set it
468 * almost legitimately in probes for old cpu types.
470 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP);
474 * Save the FPU state and reinit the FP unit
476 npxpush(&sf.sf_uc.uc_mcontext);
479 * Copy the sigframe out to the user's stack.
481 if (copyout(&sf, sfp, sizeof(struct sigframe)) != 0) {
483 * Something is wrong with the stack pointer.
484 * ...Kill the process.
489 regs->tf_esp = (int)sfp;
490 regs->tf_eip = PS_STRINGS - *(p->p_sysent->sv_szsigcode);
493 * i386 abi specifies that the direction flag must be cleared
496 regs->tf_eflags &= ~(PSL_T|PSL_D);
498 regs->tf_cs = _ucodesel;
499 regs->tf_ds = _udatasel;
500 regs->tf_es = _udatasel;
503 * Allow the signal handler to inherit %fs in addition to %gs as
504 * the userland program might be using both.
506 * However, if a T_PROTFLT occured the segment registers could be
507 * totally broken. They must be reset in order to be able to
508 * return to userland.
510 if (regs->tf_trapno == T_PROTFLT) {
511 regs->tf_fs = _udatasel;
512 regs->tf_gs = _udatasel;
514 regs->tf_ss = _udatasel;
518 * Sanitize the trapframe for a virtual kernel passing control to a custom
519 * VM context. Remove any items that would otherwise create a privilage
522 * XXX at the moment we allow userland to set the resume flag. Is this a
526 cpu_sanitize_frame(struct trapframe *frame)
528 frame->tf_cs = _ucodesel;
529 frame->tf_ds = _udatasel;
530 frame->tf_es = _udatasel; /* XXX allow userland this one too? */
532 frame->tf_fs = _udatasel;
533 frame->tf_gs = _udatasel;
535 frame->tf_ss = _udatasel;
536 frame->tf_eflags &= (PSL_RF | PSL_USERCHANGE);
537 frame->tf_eflags |= PSL_RESERVED_DEFAULT | PSL_I;
542 cpu_sanitize_tls(struct savetls *tls)
544 struct segment_descriptor *desc;
547 for (i = 0; i < NGTLS; ++i) {
549 if (desc->sd_dpl == 0 && desc->sd_type == 0)
551 if (desc->sd_def32 == 0)
553 if (desc->sd_type != SDT_MEMRWA)
555 if (desc->sd_dpl != SEL_UPL)
557 if (desc->sd_xx != 0 || desc->sd_p != 1)
564 * sigreturn(ucontext_t *sigcntxp)
566 * System call to cleanup state after a signal
567 * has been taken. Reset signal mask and
568 * stack state from context left by sendsig (above).
569 * Return to previous pc and psl as specified by
570 * context left by sendsig. Check carefully to
571 * make sure that the user has not modified the
572 * state to gain improper privileges.
576 #define EFL_SECURE(ef, oef) ((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0)
577 #define CS_SECURE(cs) (ISPL(cs) == SEL_UPL)
580 sys_sigreturn(struct sigreturn_args *uap)
582 struct lwp *lp = curthread->td_lwp;
583 struct proc *p = lp->lwp_proc;
584 struct trapframe *regs;
592 * We have to copy the information into kernel space so userland
593 * can't modify it while we are sniffing it.
595 regs = lp->lwp_md.md_regs;
596 error = copyin(uap->sigcntxp, &uc, sizeof(uc));
600 eflags = ucp->uc_mcontext.mc_eflags;
602 if (eflags & PSL_VM) {
603 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
604 struct vm86_kernel *vm86;
607 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't
608 * set up the vm86 area, and we can't enter vm86 mode.
610 if (lp->lwp_thread->td_pcb->pcb_ext == 0)
612 vm86 = &lp->lwp_thread->td_pcb->pcb_ext->ext_vm86;
613 if (vm86->vm86_inited == 0)
616 /* go back to user mode if both flags are set */
617 if ((eflags & PSL_VIP) && (eflags & PSL_VIF))
618 trapsignal(lp, SIGBUS, 0);
620 if (vm86->vm86_has_vme) {
621 eflags = (tf->tf_eflags & ~VME_USERCHANGE) |
622 (eflags & VME_USERCHANGE) | PSL_VM;
624 vm86->vm86_eflags = eflags; /* save VIF, VIP */
625 eflags = (tf->tf_eflags & ~VM_USERCHANGE) |
626 (eflags & VM_USERCHANGE) | PSL_VM;
628 bcopy(&ucp->uc_mcontext.mc_gs, tf, sizeof(struct trapframe));
629 tf->tf_eflags = eflags;
630 tf->tf_vm86_ds = tf->tf_ds;
631 tf->tf_vm86_es = tf->tf_es;
632 tf->tf_vm86_fs = tf->tf_fs;
633 tf->tf_vm86_gs = tf->tf_gs;
634 tf->tf_ds = _udatasel;
635 tf->tf_es = _udatasel;
637 tf->tf_fs = _udatasel;
638 tf->tf_gs = _udatasel;
642 * Don't allow users to change privileged or reserved flags.
645 * XXX do allow users to change the privileged flag PSL_RF.
646 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers
647 * should sometimes set it there too. tf_eflags is kept in
648 * the signal context during signal handling and there is no
649 * other place to remember it, so the PSL_RF bit may be
650 * corrupted by the signal handler without us knowing.
651 * Corruption of the PSL_RF bit at worst causes one more or
652 * one less debugger trap, so allowing it is fairly harmless.
654 if (!EFL_SECURE(eflags & ~PSL_RF, regs->tf_eflags & ~PSL_RF)) {
655 kprintf("sigreturn: eflags = 0x%x\n", eflags);
660 * Don't allow users to load a valid privileged %cs. Let the
661 * hardware check for invalid selectors, excess privilege in
662 * other selectors, invalid %eip's and invalid %esp's.
664 cs = ucp->uc_mcontext.mc_cs;
665 if (!CS_SECURE(cs)) {
666 kprintf("sigreturn: cs = 0x%x\n", cs);
667 trapsignal(lp, SIGBUS, T_PROTFLT);
670 bcopy(&ucp->uc_mcontext.mc_gs, regs, sizeof(struct trapframe));
674 * Restore the FPU state from the frame
677 npxpop(&ucp->uc_mcontext);
680 * Merge saved signal mailbox pending flag to maintain interlock
681 * semantics against system calls.
683 if (ucp->uc_mcontext.mc_xflags & PGEX_MAILBOX)
684 p->p_flag |= P_MAILBOX;
686 if (ucp->uc_mcontext.mc_onstack & 1)
687 lp->lwp_sigstk.ss_flags |= SS_ONSTACK;
689 lp->lwp_sigstk.ss_flags &= ~SS_ONSTACK;
691 lp->lwp_sigmask = ucp->uc_sigmask;
692 SIG_CANTMASK(lp->lwp_sigmask);
698 * Stack frame on entry to function. %eax will contain the function vector,
699 * %ecx will contain the function data. flags, ecx, and eax will have
700 * already been pushed on the stack.
711 sendupcall(struct vmupcall *vu, int morepending)
713 struct lwp *lp = curthread->td_lwp;
714 struct trapframe *regs;
715 struct upcall upcall;
716 struct upc_frame upc_frame;
720 * If we are a virtual kernel running an emulated user process
721 * context, switch back to the virtual kernel context before
722 * trying to post the signal.
724 if (lp->lwp_vkernel && lp->lwp_vkernel->ve) {
725 lp->lwp_md.md_regs->tf_trapno = 0;
726 vkernel_trap(lp, lp->lwp_md.md_regs);
730 * Get the upcall data structure
732 if (copyin(lp->lwp_upcall, &upcall, sizeof(upcall)) ||
733 copyin((char *)upcall.upc_uthread + upcall.upc_critoff, &crit_count, sizeof(int))
736 kprintf("bad upcall address\n");
741 * If the data structure is already marked pending or has a critical
742 * section count, mark the data structure as pending and return
743 * without doing an upcall. vu_pending is left set.
745 if (upcall.upc_pending || crit_count >= vu->vu_pending) {
746 if (upcall.upc_pending < vu->vu_pending) {
747 upcall.upc_pending = vu->vu_pending;
748 copyout(&upcall.upc_pending, &lp->lwp_upcall->upc_pending,
749 sizeof(upcall.upc_pending));
755 * We can run this upcall now, clear vu_pending.
757 * Bump our critical section count and set or clear the
758 * user pending flag depending on whether more upcalls are
759 * pending. The user will be responsible for calling
760 * upc_dispatch(-1) to process remaining upcalls.
763 upcall.upc_pending = morepending;
765 copyout(&upcall.upc_pending, &lp->lwp_upcall->upc_pending,
766 sizeof(upcall.upc_pending));
767 copyout(&crit_count, (char *)upcall.upc_uthread + upcall.upc_critoff,
771 * Construct a stack frame and issue the upcall
773 regs = lp->lwp_md.md_regs;
774 upc_frame.eax = regs->tf_eax;
775 upc_frame.ecx = regs->tf_ecx;
776 upc_frame.edx = regs->tf_edx;
777 upc_frame.flags = regs->tf_eflags;
778 upc_frame.oldip = regs->tf_eip;
779 if (copyout(&upc_frame, (void *)(regs->tf_esp - sizeof(upc_frame)),
780 sizeof(upc_frame)) != 0) {
781 kprintf("bad stack on upcall\n");
783 regs->tf_eax = (register_t)vu->vu_func;
784 regs->tf_ecx = (register_t)vu->vu_data;
785 regs->tf_edx = (register_t)lp->lwp_upcall;
786 regs->tf_eip = (register_t)vu->vu_ctx;
787 regs->tf_esp -= sizeof(upc_frame);
792 * fetchupcall occurs in the context of a system call, which means that
793 * we have to return EJUSTRETURN in order to prevent eax and edx from
794 * being overwritten by the syscall return value.
796 * if vu is not NULL we return the new context in %edx, the new data in %ecx,
797 * and the function pointer in %eax.
800 fetchupcall(struct vmupcall *vu, int morepending, void *rsp)
802 struct upc_frame upc_frame;
803 struct lwp *lp = curthread->td_lwp;
804 struct trapframe *regs;
806 struct upcall upcall;
809 regs = lp->lwp_md.md_regs;
811 error = copyout(&morepending, &lp->lwp_upcall->upc_pending, sizeof(int));
815 * This jumps us to the next ready context.
818 error = copyin(lp->lwp_upcall, &upcall, sizeof(upcall));
821 error = copyin((char *)upcall.upc_uthread + upcall.upc_critoff, &crit_count, sizeof(int));
824 error = copyout(&crit_count, (char *)upcall.upc_uthread + upcall.upc_critoff, sizeof(int));
825 regs->tf_eax = (register_t)vu->vu_func;
826 regs->tf_ecx = (register_t)vu->vu_data;
827 regs->tf_edx = (register_t)lp->lwp_upcall;
828 regs->tf_eip = (register_t)vu->vu_ctx;
829 regs->tf_esp = (register_t)rsp;
832 * This returns us to the originally interrupted code.
834 error = copyin(rsp, &upc_frame, sizeof(upc_frame));
835 regs->tf_eax = upc_frame.eax;
836 regs->tf_ecx = upc_frame.ecx;
837 regs->tf_edx = upc_frame.edx;
838 regs->tf_eflags = (regs->tf_eflags & ~PSL_USERCHANGE) |
839 (upc_frame.flags & PSL_USERCHANGE);
840 regs->tf_eip = upc_frame.oldip;
841 regs->tf_esp = (register_t)((char *)rsp + sizeof(upc_frame));
850 * Machine dependent boot() routine
852 * I haven't seen anything to put here yet
853 * Possibly some stuff might be grafted back here from boot()
861 * Shutdown the CPU as much as possible
867 __asm__ __volatile("hlt");
871 * cpu_idle() represents the idle LWKT. You cannot return from this function
872 * (unless you want to blow things up!). Instead we look for runnable threads
873 * and loop or halt as appropriate. Giant is not held on entry to the thread.
875 * The main loop is entered with a critical section held, we must release
876 * the critical section before doing anything else. lwkt_switch() will
877 * check for pending interrupts due to entering and exiting its own
880 * NOTE: On an SMP system we rely on a scheduler IPI to wake a HLTed cpu up.
881 * However, there are cases where the idlethread will be entered with
882 * the possibility that no IPI will occur and in such cases
883 * lwkt_switch() sets RQF_WAKEUP. We usually check
884 * RQF_IDLECHECK_WK_MASK.
886 * NOTE: cpu_idle_hlt again defaults to 2 (use ACPI sleep states). Set to
887 * 1 to just use hlt and for debugging purposes.
889 static int cpu_idle_hlt = 2;
890 static int cpu_idle_hltcnt;
891 static int cpu_idle_spincnt;
892 static u_int cpu_idle_repeat = 4;
893 SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_hlt, CTLFLAG_RW,
894 &cpu_idle_hlt, 0, "Idle loop HLT enable");
895 SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_hltcnt, CTLFLAG_RW,
896 &cpu_idle_hltcnt, 0, "Idle loop entry halts");
897 SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_spincnt, CTLFLAG_RW,
898 &cpu_idle_spincnt, 0, "Idle loop entry spins");
899 SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_repeat, CTLFLAG_RW,
900 &cpu_idle_repeat, 0, "Idle entries before acpi hlt");
903 cpu_idle_default_hook(void)
906 * We must guarentee that hlt is exactly the instruction
909 __asm __volatile("sti; hlt");
912 /* Other subsystems (e.g., ACPI) can hook this later. */
913 void (*cpu_idle_hook)(void) = cpu_idle_default_hook;
918 globaldata_t gd = mycpu;
919 struct thread *td = gd->gd_curthread;
924 KKASSERT(td->td_critcount == 0);
927 * See if there are any LWKTs ready to go.
932 * When halting inside a cli we must check for reqflags
933 * races, particularly [re]schedule requests. Running
934 * splz() does the job.
937 * 0 Never halt, just spin
939 * 1 Always use HLT (or MONITOR/MWAIT if avail).
940 * This typically eats more power than the
943 * 2 Use HLT/MONITOR/MWAIT up to a point and then
944 * use the ACPI halt (default). This is a hybrid
945 * approach. See machdep.cpu_idle_repeat.
947 * 3 Always use the ACPI halt. This typically
948 * eats the least amount of power but the cpu
949 * will be slow waking up. Slows down e.g.
950 * compiles and other pipe/event oriented stuff.
953 * NOTE: Interrupts are enabled and we are not in a critical
956 * NOTE: Preemptions do not reset gd_idle_repeat. Also we
957 * don't bother capping gd_idle_repeat, it is ok if
960 ++gd->gd_idle_repeat;
961 reqflags = gd->gd_reqflags;
962 quick = (cpu_idle_hlt == 1) ||
964 gd->gd_idle_repeat < cpu_idle_repeat);
966 if (quick && (cpu_mi_feature & CPU_MI_MONITOR) &&
967 (reqflags & RQF_IDLECHECK_WK_MASK) == 0) {
968 cpu_mmw_pause_int(&gd->gd_reqflags, reqflags);
970 } else if (cpu_idle_hlt) {
971 __asm __volatile("cli");
973 if ((gd->gd_reqflags & RQF_IDLECHECK_WK_MASK) == 0) {
975 cpu_idle_default_hook();
979 __asm __volatile("sti");
983 __asm __volatile("sti");
992 * This routine is called if a spinlock has been held through the
993 * exponential backoff period and is seriously contested. On a real cpu
997 cpu_spinlock_contested(void)
1005 * Clear registers on exec
1008 exec_setregs(u_long entry, u_long stack, u_long ps_strings)
1010 struct thread *td = curthread;
1011 struct lwp *lp = td->td_lwp;
1012 struct pcb *pcb = td->td_pcb;
1013 struct trapframe *regs = lp->lwp_md.md_regs;
1015 /* was i386_user_cleanup() in NetBSD */
1018 bzero((char *)regs, sizeof(struct trapframe));
1019 regs->tf_eip = entry;
1020 regs->tf_esp = stack;
1021 regs->tf_eflags = PSL_USER | (regs->tf_eflags & PSL_T);
1022 regs->tf_ss = _udatasel;
1023 regs->tf_ds = _udatasel;
1024 regs->tf_es = _udatasel;
1025 regs->tf_fs = _udatasel;
1026 regs->tf_gs = _udatasel;
1027 regs->tf_cs = _ucodesel;
1029 /* PS_STRINGS value for BSD/OS binaries. It is 0 for non-BSD/OS. */
1030 regs->tf_ebx = ps_strings;
1033 * Reset the hardware debug registers if they were in use.
1034 * They won't have any meaning for the newly exec'd process.
1036 if (pcb->pcb_flags & PCB_DBREGS) {
1043 if (pcb == td->td_pcb) {
1045 * Clear the debug registers on the running
1046 * CPU, otherwise they will end up affecting
1047 * the next process we switch to.
1051 pcb->pcb_flags &= ~PCB_DBREGS;
1055 * Initialize the math emulator (if any) for the current process.
1056 * Actually, just clear the bit that says that the emulator has
1057 * been initialized. Initialization is delayed until the process
1058 * traps to the emulator (if it is done at all) mainly because
1059 * emulators don't provide an entry point for initialization.
1061 pcb->pcb_flags &= ~FP_SOFTFP;
1064 * note: do not set CR0_TS here. npxinit() must do it after clearing
1065 * gd_npxthread. Otherwise a preemptive interrupt thread may panic
1069 load_cr0(rcr0() | CR0_MP);
1072 /* Initialize the npx (if any) for the current process. */
1073 npxinit(__INITIAL_NPXCW__);
1078 * note: linux emulator needs edx to be 0x0 on entry, which is
1079 * handled in execve simply by setting the 64 bit syscall
1080 * return value to 0.
1090 cr0 |= CR0_NE; /* Done by npxinit() */
1091 cr0 |= CR0_MP | CR0_TS; /* Done at every execve() too. */
1092 cr0 |= CR0_WP | CR0_AM;
1098 sysctl_machdep_adjkerntz(SYSCTL_HANDLER_ARGS)
1101 error = sysctl_handle_int(oidp, oidp->oid_arg1, oidp->oid_arg2,
1103 if (!error && req->newptr)
1108 SYSCTL_PROC(_machdep, CPU_ADJKERNTZ, adjkerntz, CTLTYPE_INT|CTLFLAG_RW,
1109 &adjkerntz, 0, sysctl_machdep_adjkerntz, "I", "");
1111 SYSCTL_INT(_machdep, CPU_DISRTCSET, disable_rtc_set,
1112 CTLFLAG_RW, &disable_rtc_set, 0, "");
1114 SYSCTL_STRUCT(_machdep, CPU_BOOTINFO, bootinfo,
1115 CTLFLAG_RD, &bootinfo, bootinfo, "");
1117 SYSCTL_INT(_machdep, CPU_WALLCLOCK, wall_cmos_clock,
1118 CTLFLAG_RW, &wall_cmos_clock, 0, "");
1120 extern u_long bootdev; /* not a cdev_t - encoding is different */
1121 SYSCTL_ULONG(_machdep, OID_AUTO, guessed_bootdev,
1122 CTLFLAG_RD, &bootdev, 0, "Boot device (not in cdev_t format)");
1125 * Initialize 386 and configure to run kernel
1129 * Initialize segments & interrupt table
1133 union descriptor gdt[NGDT * MAXCPU]; /* global descriptor table */
1134 static struct gate_descriptor idt0[NIDT];
1135 struct gate_descriptor *idt = &idt0[0]; /* interrupt descriptor table */
1136 union descriptor ldt[NLDT]; /* local descriptor table */
1138 /* table descriptors - used to load tables by cpu */
1139 struct region_descriptor r_gdt, r_idt;
1141 #if defined(I586_CPU) && !defined(NO_F00F_HACK)
1142 extern int has_f00f_bug;
1145 static struct i386tss dblfault_tss;
1146 static char dblfault_stack[PAGE_SIZE];
1148 extern struct user *proc0paddr;
1151 /* software prototypes -- in more palatable form */
1152 struct soft_segment_descriptor gdt_segs[] = {
1153 /* GNULL_SEL 0 Null Descriptor */
1154 { 0x0, /* segment base address */
1156 0, /* segment type */
1157 0, /* segment descriptor priority level */
1158 0, /* segment descriptor present */
1160 0, /* default 32 vs 16 bit size */
1161 0 /* limit granularity (byte/page units)*/ },
1162 /* GCODE_SEL 1 Code Descriptor for kernel */
1163 { 0x0, /* segment base address */
1164 0xfffff, /* length - all address space */
1165 SDT_MEMERA, /* segment type */
1166 0, /* segment descriptor priority level */
1167 1, /* segment descriptor present */
1169 1, /* default 32 vs 16 bit size */
1170 1 /* limit granularity (byte/page units)*/ },
1171 /* GDATA_SEL 2 Data Descriptor for kernel */
1172 { 0x0, /* segment base address */
1173 0xfffff, /* length - all address space */
1174 SDT_MEMRWA, /* segment type */
1175 0, /* segment descriptor priority level */
1176 1, /* segment descriptor present */
1178 1, /* default 32 vs 16 bit size */
1179 1 /* limit granularity (byte/page units)*/ },
1180 /* GPRIV_SEL 3 SMP Per-Processor Private Data Descriptor */
1181 { 0x0, /* segment base address */
1182 0xfffff, /* length - all address space */
1183 SDT_MEMRWA, /* segment type */
1184 0, /* segment descriptor priority level */
1185 1, /* segment descriptor present */
1187 1, /* default 32 vs 16 bit size */
1188 1 /* limit granularity (byte/page units)*/ },
1189 /* GPROC0_SEL 4 Proc 0 Tss Descriptor */
1191 0x0, /* segment base address */
1192 sizeof(struct i386tss)-1,/* length - all address space */
1193 SDT_SYS386TSS, /* segment type */
1194 0, /* segment descriptor priority level */
1195 1, /* segment descriptor present */
1197 0, /* unused - default 32 vs 16 bit size */
1198 0 /* limit granularity (byte/page units)*/ },
1199 /* GLDT_SEL 5 LDT Descriptor */
1200 { (int) ldt, /* segment base address */
1201 sizeof(ldt)-1, /* length - all address space */
1202 SDT_SYSLDT, /* segment type */
1203 SEL_UPL, /* segment descriptor priority level */
1204 1, /* segment descriptor present */
1206 0, /* unused - default 32 vs 16 bit size */
1207 0 /* limit granularity (byte/page units)*/ },
1208 /* GUSERLDT_SEL 6 User LDT Descriptor per process */
1209 { (int) ldt, /* segment base address */
1210 (512 * sizeof(union descriptor)-1), /* length */
1211 SDT_SYSLDT, /* segment type */
1212 0, /* segment descriptor priority level */
1213 1, /* segment descriptor present */
1215 0, /* unused - default 32 vs 16 bit size */
1216 0 /* limit granularity (byte/page units)*/ },
1217 /* GTGATE_SEL 7 Null Descriptor - Placeholder */
1218 { 0x0, /* segment base address */
1219 0x0, /* length - all address space */
1220 0, /* segment type */
1221 0, /* segment descriptor priority level */
1222 0, /* segment descriptor present */
1224 0, /* default 32 vs 16 bit size */
1225 0 /* limit granularity (byte/page units)*/ },
1226 /* GBIOSLOWMEM_SEL 8 BIOS access to realmode segment 0x40, must be #8 in GDT */
1227 { 0x400, /* segment base address */
1228 0xfffff, /* length */
1229 SDT_MEMRWA, /* segment type */
1230 0, /* segment descriptor priority level */
1231 1, /* segment descriptor present */
1233 1, /* default 32 vs 16 bit size */
1234 1 /* limit granularity (byte/page units)*/ },
1235 /* GPANIC_SEL 9 Panic Tss Descriptor */
1236 { (int) &dblfault_tss, /* segment base address */
1237 sizeof(struct i386tss)-1,/* length - all address space */
1238 SDT_SYS386TSS, /* segment type */
1239 0, /* segment descriptor priority level */
1240 1, /* segment descriptor present */
1242 0, /* unused - default 32 vs 16 bit size */
1243 0 /* limit granularity (byte/page units)*/ },
1244 /* GBIOSCODE32_SEL 10 BIOS 32-bit interface (32bit Code) */
1245 { 0, /* segment base address (overwritten) */
1246 0xfffff, /* length */
1247 SDT_MEMERA, /* segment type */
1248 0, /* segment descriptor priority level */
1249 1, /* segment descriptor present */
1251 0, /* default 32 vs 16 bit size */
1252 1 /* limit granularity (byte/page units)*/ },
1253 /* GBIOSCODE16_SEL 11 BIOS 32-bit interface (16bit Code) */
1254 { 0, /* segment base address (overwritten) */
1255 0xfffff, /* length */
1256 SDT_MEMERA, /* segment type */
1257 0, /* segment descriptor priority level */
1258 1, /* segment descriptor present */
1260 0, /* default 32 vs 16 bit size */
1261 1 /* limit granularity (byte/page units)*/ },
1262 /* GBIOSDATA_SEL 12 BIOS 32-bit interface (Data) */
1263 { 0, /* segment base address (overwritten) */
1264 0xfffff, /* length */
1265 SDT_MEMRWA, /* segment type */
1266 0, /* segment descriptor priority level */
1267 1, /* segment descriptor present */
1269 1, /* default 32 vs 16 bit size */
1270 1 /* limit granularity (byte/page units)*/ },
1271 /* GBIOSUTIL_SEL 13 BIOS 16-bit interface (Utility) */
1272 { 0, /* segment base address (overwritten) */
1273 0xfffff, /* length */
1274 SDT_MEMRWA, /* segment type */
1275 0, /* segment descriptor priority level */
1276 1, /* segment descriptor present */
1278 0, /* default 32 vs 16 bit size */
1279 1 /* limit granularity (byte/page units)*/ },
1280 /* GBIOSARGS_SEL 14 BIOS 16-bit interface (Arguments) */
1281 { 0, /* segment base address (overwritten) */
1282 0xfffff, /* length */
1283 SDT_MEMRWA, /* segment type */
1284 0, /* segment descriptor priority level */
1285 1, /* segment descriptor present */
1287 0, /* default 32 vs 16 bit size */
1288 1 /* limit granularity (byte/page units)*/ },
1289 /* GTLS_START 15 TLS */
1290 { 0x0, /* segment base address */
1292 0, /* segment type */
1293 0, /* segment descriptor priority level */
1294 0, /* segment descriptor present */
1296 0, /* default 32 vs 16 bit size */
1297 0 /* limit granularity (byte/page units)*/ },
1298 /* GTLS_START+1 16 TLS */
1299 { 0x0, /* segment base address */
1301 0, /* segment type */
1302 0, /* segment descriptor priority level */
1303 0, /* segment descriptor present */
1305 0, /* default 32 vs 16 bit size */
1306 0 /* limit granularity (byte/page units)*/ },
1307 /* GTLS_END 17 TLS */
1308 { 0x0, /* segment base address */
1310 0, /* segment type */
1311 0, /* segment descriptor priority level */
1312 0, /* segment descriptor present */
1314 0, /* default 32 vs 16 bit size */
1315 0 /* limit granularity (byte/page units)*/ },
1318 static struct soft_segment_descriptor ldt_segs[] = {
1319 /* Null Descriptor - overwritten by call gate */
1320 { 0x0, /* segment base address */
1321 0x0, /* length - all address space */
1322 0, /* segment type */
1323 0, /* segment descriptor priority level */
1324 0, /* segment descriptor present */
1326 0, /* default 32 vs 16 bit size */
1327 0 /* limit granularity (byte/page units)*/ },
1328 /* Null Descriptor - overwritten by call gate */
1329 { 0x0, /* segment base address */
1330 0x0, /* length - all address space */
1331 0, /* segment type */
1332 0, /* segment descriptor priority level */
1333 0, /* segment descriptor present */
1335 0, /* default 32 vs 16 bit size */
1336 0 /* limit granularity (byte/page units)*/ },
1337 /* Null Descriptor - overwritten by call gate */
1338 { 0x0, /* segment base address */
1339 0x0, /* length - all address space */
1340 0, /* segment type */
1341 0, /* segment descriptor priority level */
1342 0, /* segment descriptor present */
1344 0, /* default 32 vs 16 bit size */
1345 0 /* limit granularity (byte/page units)*/ },
1346 /* Code Descriptor for user */
1347 { 0x0, /* segment base address */
1348 0xfffff, /* length - all address space */
1349 SDT_MEMERA, /* segment type */
1350 SEL_UPL, /* segment descriptor priority level */
1351 1, /* segment descriptor present */
1353 1, /* default 32 vs 16 bit size */
1354 1 /* limit granularity (byte/page units)*/ },
1355 /* Null Descriptor - overwritten by call gate */
1356 { 0x0, /* segment base address */
1357 0x0, /* length - all address space */
1358 0, /* segment type */
1359 0, /* segment descriptor priority level */
1360 0, /* segment descriptor present */
1362 0, /* default 32 vs 16 bit size */
1363 0 /* limit granularity (byte/page units)*/ },
1364 /* Data Descriptor for user */
1365 { 0x0, /* segment base address */
1366 0xfffff, /* length - all address space */
1367 SDT_MEMRWA, /* segment type */
1368 SEL_UPL, /* segment descriptor priority level */
1369 1, /* segment descriptor present */
1371 1, /* default 32 vs 16 bit size */
1372 1 /* limit granularity (byte/page units)*/ },
1376 setidt(int idx, inthand_t *func, int typ, int dpl, int selec)
1378 struct gate_descriptor *ip;
1381 ip->gd_looffset = (int)func;
1382 ip->gd_selector = selec;
1388 ip->gd_hioffset = ((int)func)>>16 ;
1391 #define IDTVEC(name) __CONCAT(X,name)
1394 IDTVEC(div), IDTVEC(dbg), IDTVEC(nmi), IDTVEC(bpt), IDTVEC(ofl),
1395 IDTVEC(bnd), IDTVEC(ill), IDTVEC(dna), IDTVEC(fpusegm),
1396 IDTVEC(tss), IDTVEC(missing), IDTVEC(stk), IDTVEC(prot),
1397 IDTVEC(page), IDTVEC(mchk), IDTVEC(fpu), IDTVEC(align),
1398 IDTVEC(xmm), IDTVEC(syscall),
1401 IDTVEC(int0x80_syscall);
1403 #ifdef DEBUG_INTERRUPTS
1404 extern inthand_t *Xrsvdary[256];
1408 sdtossd(struct segment_descriptor *sd, struct soft_segment_descriptor *ssd)
1410 ssd->ssd_base = (sd->sd_hibase << 24) | sd->sd_lobase;
1411 ssd->ssd_limit = (sd->sd_hilimit << 16) | sd->sd_lolimit;
1412 ssd->ssd_type = sd->sd_type;
1413 ssd->ssd_dpl = sd->sd_dpl;
1414 ssd->ssd_p = sd->sd_p;
1415 ssd->ssd_def32 = sd->sd_def32;
1416 ssd->ssd_gran = sd->sd_gran;
1420 * Populate the (physmap) array with base/bound pairs describing the
1421 * available physical memory in the system, then test this memory and
1422 * build the phys_avail array describing the actually-available memory.
1424 * If we cannot accurately determine the physical memory map, then use
1425 * value from the 0xE801 call, and failing that, the RTC.
1427 * Total memory size may be set by the kernel environment variable
1428 * hw.physmem or the compile-time define MAXMEM.
1431 getmemsize(int first)
1433 int i, physmap_idx, pa_indx, da_indx;
1435 u_int basemem, extmem;
1436 struct vm86frame vmf;
1437 struct vm86context vmc;
1439 vm_offset_t physmap[PHYSMAP_ENTRIES*2];
1447 quad_t dcons_addr, dcons_size;
1449 bzero(&vmf, sizeof(struct vm86frame));
1450 bzero(physmap, sizeof(physmap));
1454 * Some newer BIOSes has broken INT 12H implementation which cause
1455 * kernel panic immediately. In this case, we need to scan SMAP
1456 * with INT 15:E820 first, then determine base memory size.
1459 TUNABLE_INT_FETCH("hw.hasbrokenint12", &hasbrokenint12);
1460 if (hasbrokenint12) {
1465 * Perform "base memory" related probes & setup. If we get a crazy
1466 * value give the bios some scribble space just in case.
1468 vm86_intcall(0x12, &vmf);
1469 basemem = vmf.vmf_ax;
1470 if (basemem > 640) {
1471 kprintf("Preposterous BIOS basemem of %uK, "
1472 "truncating to < 640K\n", basemem);
1477 * XXX if biosbasemem is now < 640, there is a `hole'
1478 * between the end of base memory and the start of
1479 * ISA memory. The hole may be empty or it may
1480 * contain BIOS code or data. Map it read/write so
1481 * that the BIOS can write to it. (Memory from 0 to
1482 * the physical end of the kernel is mapped read-only
1483 * to begin with and then parts of it are remapped.
1484 * The parts that aren't remapped form holes that
1485 * remain read-only and are unused by the kernel.
1486 * The base memory area is below the physical end of
1487 * the kernel and right now forms a read-only hole.
1488 * The part of it from PAGE_SIZE to
1489 * (trunc_page(biosbasemem * 1024) - 1) will be
1490 * remapped and used by the kernel later.)
1492 * This code is similar to the code used in
1493 * pmap_mapdev, but since no memory needs to be
1494 * allocated we simply change the mapping.
1496 for (pa = trunc_page(basemem * 1024);
1497 pa < ISA_HOLE_START; pa += PAGE_SIZE) {
1498 pte = vtopte(pa + KERNBASE);
1499 *pte = pa | PG_RW | PG_V;
1503 * if basemem != 640, map pages r/w into vm86 page table so
1504 * that the bios can scribble on it.
1507 for (i = basemem / 4; i < 160; i++)
1508 pte[i] = (i << PAGE_SHIFT) | PG_V | PG_RW | PG_U;
1512 * map page 1 R/W into the kernel page table so we can use it
1513 * as a buffer. The kernel will unmap this page later.
1515 pte = vtopte(KERNBASE + (1 << PAGE_SHIFT));
1516 *pte = (1 << PAGE_SHIFT) | PG_RW | PG_V;
1519 * get memory map with INT 15:E820
1521 #define SMAPSIZ sizeof(*smap)
1522 #define SMAP_SIG 0x534D4150 /* 'SMAP' */
1525 smap = (void *)vm86_addpage(&vmc, 1, KERNBASE + (1 << PAGE_SHIFT));
1526 vm86_getptr(&vmc, (vm_offset_t)smap, &vmf.vmf_es, &vmf.vmf_di);
1531 vmf.vmf_eax = 0xE820;
1532 vmf.vmf_edx = SMAP_SIG;
1533 vmf.vmf_ecx = SMAPSIZ;
1534 i = vm86_datacall(0x15, &vmf, &vmc);
1535 if (i || vmf.vmf_eax != SMAP_SIG)
1537 if (boothowto & RB_VERBOSE)
1538 kprintf("SMAP type=%02x base=%08x %08x len=%08x %08x\n",
1540 *(u_int32_t *)((char *)&smap->base + 4),
1541 (u_int32_t)smap->base,
1542 *(u_int32_t *)((char *)&smap->length + 4),
1543 (u_int32_t)smap->length);
1545 if (smap->type != 0x01)
1548 if (smap->length == 0)
1551 Realmem += smap->length;
1553 if (smap->base >= 0xffffffffLLU) {
1554 kprintf("%ju MB of memory above 4GB ignored\n",
1555 (uintmax_t)(smap->length / 1024 / 1024));
1559 for (i = 0; i <= physmap_idx; i += 2) {
1560 if (smap->base < physmap[i + 1]) {
1561 if (boothowto & RB_VERBOSE) {
1562 kprintf("Overlapping or non-montonic "
1563 "memory region, ignoring "
1566 Realmem -= smap->length;
1571 if (smap->base == physmap[physmap_idx + 1]) {
1572 physmap[physmap_idx + 1] += smap->length;
1577 if (physmap_idx == PHYSMAP_ENTRIES*2) {
1578 kprintf("Too many segments in the physical "
1579 "address map, giving up\n");
1582 physmap[physmap_idx] = smap->base;
1583 physmap[physmap_idx + 1] = smap->base + smap->length;
1585 ; /* fix GCC3.x warning */
1586 } while (vmf.vmf_ebx != 0);
1589 * Perform "base memory" related probes & setup based on SMAP
1592 for (i = 0; i <= physmap_idx; i += 2) {
1593 if (physmap[i] == 0x00000000) {
1594 basemem = physmap[i + 1] / 1024;
1603 if (basemem > 640) {
1604 kprintf("Preposterous BIOS basemem of %uK, "
1605 "truncating to 640K\n", basemem);
1609 for (pa = trunc_page(basemem * 1024);
1610 pa < ISA_HOLE_START; pa += PAGE_SIZE) {
1611 pte = vtopte(pa + KERNBASE);
1612 *pte = pa | PG_RW | PG_V;
1616 for (i = basemem / 4; i < 160; i++)
1617 pte[i] = (i << PAGE_SHIFT) | PG_V | PG_RW | PG_U;
1620 if (physmap[1] != 0)
1624 * If we failed above, try memory map with INT 15:E801
1626 vmf.vmf_ax = 0xE801;
1627 if (vm86_intcall(0x15, &vmf) == 0) {
1628 extmem = vmf.vmf_cx + vmf.vmf_dx * 64;
1632 vm86_intcall(0x15, &vmf);
1633 extmem = vmf.vmf_ax;
1636 * Prefer the RTC value for extended memory.
1638 extmem = rtcin(RTC_EXTLO) + (rtcin(RTC_EXTHI) << 8);
1643 * Special hack for chipsets that still remap the 384k hole when
1644 * there's 16MB of memory - this really confuses people that
1645 * are trying to use bus mastering ISA controllers with the
1646 * "16MB limit"; they only have 16MB, but the remapping puts
1647 * them beyond the limit.
1649 * If extended memory is between 15-16MB (16-17MB phys address range),
1652 if ((extmem > 15 * 1024) && (extmem < 16 * 1024))
1656 physmap[1] = basemem * 1024;
1658 physmap[physmap_idx] = 0x100000;
1659 physmap[physmap_idx + 1] = physmap[physmap_idx] + extmem * 1024;
1663 * Now, physmap contains a map of physical memory.
1667 /* make hole for AP bootstrap code YYY */
1668 physmap[1] = mp_bootaddress(physmap[1]);
1670 /* Save EBDA address, if any */
1671 ebda_addr = (u_long)(*(u_short *)(KERNBASE + 0x40e));
1676 * Maxmem isn't the "maximum memory", it's one larger than the
1677 * highest page of the physical address space. It should be
1678 * called something like "Maxphyspage". We may adjust this
1679 * based on ``hw.physmem'' and the results of the memory test.
1681 Maxmem = atop(physmap[physmap_idx + 1]);
1684 Maxmem = MAXMEM / 4;
1687 if (kgetenv_quad("hw.physmem", &maxmem))
1688 Maxmem = atop(maxmem);
1690 if (atop(physmap[physmap_idx + 1]) != Maxmem &&
1691 (boothowto & RB_VERBOSE))
1692 kprintf("Physical memory use set to %lluK\n", Maxmem * 4);
1695 * If Maxmem has been increased beyond what the system has detected,
1696 * extend the last memory segment to the new limit.
1698 if (atop(physmap[physmap_idx + 1]) < Maxmem)
1699 physmap[physmap_idx + 1] = ptoa(Maxmem);
1701 /* call pmap initialization to make new kernel address space */
1702 pmap_bootstrap(first, 0);
1705 * Size up each available chunk of physical memory.
1707 physmap[0] = PAGE_SIZE; /* mask off page 0 */
1710 phys_avail[pa_indx++] = physmap[0];
1711 phys_avail[pa_indx] = physmap[0];
1712 dump_avail[da_indx] = physmap[0];
1717 * Get dcons buffer address
1719 if (kgetenv_quad("dcons.addr", &dcons_addr) == 0 ||
1720 kgetenv_quad("dcons.size", &dcons_size) == 0)
1724 * physmap is in bytes, so when converting to page boundaries,
1725 * round up the start address and round down the end address.
1727 for (i = 0; i <= physmap_idx; i += 2) {
1731 if (physmap[i + 1] < end)
1732 end = trunc_page(physmap[i + 1]);
1733 for (pa = round_page(physmap[i]); pa < end; pa += PAGE_SIZE) {
1734 int tmp, page_bad, full;
1738 int *ptr = (int *)CADDR1;
1743 * block out kernel memory as not available.
1745 if (pa >= 0x100000 && pa < first)
1749 * block out dcons buffer
1752 && pa >= trunc_page(dcons_addr)
1753 && pa < dcons_addr + dcons_size)
1759 * map page into kernel: valid, read/write,non-cacheable
1761 *pte = pa | PG_V | PG_RW | PG_N;
1766 * Test for alternating 1's and 0's
1768 *(volatile int *)ptr = 0xaaaaaaaa;
1769 if (*(volatile int *)ptr != 0xaaaaaaaa) {
1773 * Test for alternating 0's and 1's
1775 *(volatile int *)ptr = 0x55555555;
1776 if (*(volatile int *)ptr != 0x55555555) {
1782 *(volatile int *)ptr = 0xffffffff;
1783 if (*(volatile int *)ptr != 0xffffffff) {
1789 *(volatile int *)ptr = 0x0;
1790 if (*(volatile int *)ptr != 0x0) {
1794 * Restore original value.
1799 * Adjust array of valid/good pages.
1801 if (page_bad == TRUE) {
1805 * If this good page is a continuation of the
1806 * previous set of good pages, then just increase
1807 * the end pointer. Otherwise start a new chunk.
1808 * Note that "end" points one higher than end,
1809 * making the range >= start and < end.
1810 * If we're also doing a speculative memory
1811 * test and we at or past the end, bump up Maxmem
1812 * so that we keep going. The first bad page
1813 * will terminate the loop.
1815 if (phys_avail[pa_indx] == pa) {
1816 phys_avail[pa_indx] += PAGE_SIZE;
1819 if (pa_indx >= PHYSMAP_ENTRIES*2) {
1820 kprintf("Too many holes in the physical address space, giving up\n");
1825 phys_avail[pa_indx++] = pa; /* start */
1826 phys_avail[pa_indx] = pa + PAGE_SIZE; /* end */
1830 if (dump_avail[da_indx] == pa) {
1831 dump_avail[da_indx] += PAGE_SIZE;
1834 if (da_indx >= PHYSMAP_ENTRIES*2) {
1838 dump_avail[da_indx++] = pa; /* start */
1839 dump_avail[da_indx] = pa + PAGE_SIZE; /* end */
1852 * The last chunk must contain at least one page plus the message
1853 * buffer to avoid complicating other code (message buffer address
1854 * calculation, etc.).
1856 while (phys_avail[pa_indx - 1] + PAGE_SIZE +
1857 round_page(MSGBUF_SIZE) >= phys_avail[pa_indx]) {
1858 physmem -= atop(phys_avail[pa_indx] - phys_avail[pa_indx - 1]);
1859 phys_avail[pa_indx--] = 0;
1860 phys_avail[pa_indx--] = 0;
1863 Maxmem = atop(phys_avail[pa_indx]);
1865 /* Trim off space for the message buffer. */
1866 phys_avail[pa_indx] -= round_page(MSGBUF_SIZE);
1868 avail_end = phys_avail[pa_indx];
1873 int apic_io_enable = 1; /* Enabled by default for kernels compiled w/APIC_IO */
1875 int apic_io_enable = 0; /* Disabled by default for kernels compiled without */
1877 TUNABLE_INT("hw.apic_io_enable", &apic_io_enable);
1878 extern struct machintr_abi MachIntrABI_APIC;
1881 extern struct machintr_abi MachIntrABI_ICU;
1882 struct machintr_abi MachIntrABI;
1893 * 7 Device Not Available (x87)
1895 * 9 Coprocessor Segment overrun (unsupported, reserved)
1897 * 11 Segment not present
1899 * 13 General Protection
1902 * 16 x87 FP Exception pending
1903 * 17 Alignment Check
1905 * 19 SIMD floating point
1907 * 32-255 INTn/external sources
1912 struct gate_descriptor *gdp;
1913 int gsel_tss, metadata_missing, off, x;
1914 struct mdglobaldata *gd;
1917 * Prevent lowering of the ipl if we call tsleep() early.
1919 gd = &CPU_prvspace[0].mdglobaldata;
1920 bzero(gd, sizeof(*gd));
1922 gd->mi.gd_curthread = &thread0;
1923 thread0.td_gd = &gd->mi;
1925 atdevbase = ISA_HOLE_START + KERNBASE;
1927 metadata_missing = 0;
1928 if (bootinfo.bi_modulep) {
1929 preload_metadata = (caddr_t)bootinfo.bi_modulep + KERNBASE;
1930 preload_bootstrap_relocate(KERNBASE);
1932 metadata_missing = 1;
1934 if (bootinfo.bi_envp)
1935 kern_envp = (caddr_t)bootinfo.bi_envp + KERNBASE;
1938 * Default MachIntrABI to ICU
1940 MachIntrABI = MachIntrABI_ICU;
1942 TUNABLE_INT_FETCH("hw.apic_io_enable", &apic_io_enable);
1946 * start with one cpu. Note: with one cpu, ncpus2_shift, ncpus2_mask,
1947 * and ncpus_fit_mask remain 0.
1952 /* Init basic tunables, hz etc */
1956 * make gdt memory segments, the code segment goes up to end of the
1957 * page with etext in it, the data segment goes to the end of
1961 * XXX text protection is temporarily (?) disabled. The limit was
1962 * i386_btop(round_page(etext)) - 1.
1964 gdt_segs[GCODE_SEL].ssd_limit = atop(0 - 1);
1965 gdt_segs[GDATA_SEL].ssd_limit = atop(0 - 1);
1967 gdt_segs[GPRIV_SEL].ssd_limit =
1968 atop(sizeof(struct privatespace) - 1);
1969 gdt_segs[GPRIV_SEL].ssd_base = (int) &CPU_prvspace[0];
1970 gdt_segs[GPROC0_SEL].ssd_base =
1971 (int) &CPU_prvspace[0].mdglobaldata.gd_common_tss;
1973 gd->mi.gd_prvspace = &CPU_prvspace[0];
1976 * Note: on both UP and SMP curthread must be set non-NULL
1977 * early in the boot sequence because the system assumes
1978 * that 'curthread' is never NULL.
1981 for (x = 0; x < NGDT; x++) {
1983 /* avoid overwriting db entries with APM ones */
1984 if (x >= GAPMCODE32_SEL && x <= GAPMDATA_SEL)
1987 ssdtosd(&gdt_segs[x], &gdt[x].sd);
1990 r_gdt.rd_limit = NGDT * sizeof(gdt[0]) - 1;
1991 r_gdt.rd_base = (int) gdt;
1994 mi_gdinit(&gd->mi, 0);
1996 mi_proc0init(&gd->mi, proc0paddr);
1997 safepri = TDPRI_MAX;
1999 /* make ldt memory segments */
2001 * XXX - VM_MAX_USER_ADDRESS is an end address, not a max. And it
2002 * should be spelled ...MAX_USER...
2004 ldt_segs[LUCODE_SEL].ssd_limit = atop(VM_MAX_USER_ADDRESS - 1);
2005 ldt_segs[LUDATA_SEL].ssd_limit = atop(VM_MAX_USER_ADDRESS - 1);
2006 for (x = 0; x < sizeof ldt_segs / sizeof ldt_segs[0]; x++)
2007 ssdtosd(&ldt_segs[x], &ldt[x].sd);
2009 _default_ldt = GSEL(GLDT_SEL, SEL_KPL);
2011 gd->gd_currentldt = _default_ldt;
2012 /* spinlocks and the BGL */
2016 * Setup the hardware exception table. Most exceptions use
2017 * SDT_SYS386TGT, known as a 'trap gate'. Trap gates leave
2018 * interrupts enabled. VM page faults use SDT_SYS386IGT, known as
2019 * an 'interrupt trap gate', which disables interrupts on entry,
2020 * in order to be able to poll the appropriate CRn register to
2021 * determine the fault address.
2023 for (x = 0; x < NIDT; x++) {
2024 #ifdef DEBUG_INTERRUPTS
2025 setidt(x, Xrsvdary[x], SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2027 setidt(x, &IDTVEC(rsvd0), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2030 setidt(0, &IDTVEC(div), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2031 setidt(1, &IDTVEC(dbg), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2032 setidt(2, &IDTVEC(nmi), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2033 setidt(3, &IDTVEC(bpt), SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
2034 setidt(4, &IDTVEC(ofl), SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
2035 setidt(5, &IDTVEC(bnd), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2036 setidt(6, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2037 setidt(7, &IDTVEC(dna), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2038 setidt(8, 0, SDT_SYSTASKGT, SEL_KPL, GSEL(GPANIC_SEL, SEL_KPL));
2039 setidt(9, &IDTVEC(fpusegm), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2040 setidt(10, &IDTVEC(tss), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2041 setidt(11, &IDTVEC(missing), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2042 setidt(12, &IDTVEC(stk), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2043 setidt(13, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2044 setidt(14, &IDTVEC(page), SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2045 setidt(15, &IDTVEC(rsvd0), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2046 setidt(16, &IDTVEC(fpu), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2047 setidt(17, &IDTVEC(align), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2048 setidt(18, &IDTVEC(mchk), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2049 setidt(19, &IDTVEC(xmm), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2050 setidt(0x80, &IDTVEC(int0x80_syscall),
2051 SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
2053 r_idt.rd_limit = sizeof(idt0) - 1;
2054 r_idt.rd_base = (int) idt;
2058 * Initialize the console before we print anything out.
2062 if (metadata_missing)
2063 kprintf("WARNING: loader(8) metadata is missing!\n");
2073 if (boothowto & RB_KDB)
2074 Debugger("Boot flags requested debugger");
2077 finishidentcpu(); /* Final stage of CPU initialization */
2078 setidt(6, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2079 setidt(13, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2080 initializecpu(); /* Initialize CPU registers */
2083 * make an initial tss so cpu can get interrupt stack on syscall!
2084 * The 16 bytes is to save room for a VM86 context.
2086 gd->gd_common_tss.tss_esp0 = (int) thread0.td_pcb - 16;
2087 gd->gd_common_tss.tss_ss0 = GSEL(GDATA_SEL, SEL_KPL) ;
2088 gsel_tss = GSEL(GPROC0_SEL, SEL_KPL);
2089 gd->gd_tss_gdt = &gdt[GPROC0_SEL].sd;
2090 gd->gd_common_tssd = *gd->gd_tss_gdt;
2091 gd->gd_common_tss.tss_ioopt = (sizeof gd->gd_common_tss) << 16;
2094 dblfault_tss.tss_esp = dblfault_tss.tss_esp0 = dblfault_tss.tss_esp1 =
2095 dblfault_tss.tss_esp2 = (int) &dblfault_stack[sizeof(dblfault_stack)];
2096 dblfault_tss.tss_ss = dblfault_tss.tss_ss0 = dblfault_tss.tss_ss1 =
2097 dblfault_tss.tss_ss2 = GSEL(GDATA_SEL, SEL_KPL);
2098 dblfault_tss.tss_cr3 = (int)IdlePTD;
2099 dblfault_tss.tss_eip = (int) dblfault_handler;
2100 dblfault_tss.tss_eflags = PSL_KERNEL;
2101 dblfault_tss.tss_ds = dblfault_tss.tss_es =
2102 dblfault_tss.tss_gs = GSEL(GDATA_SEL, SEL_KPL);
2103 dblfault_tss.tss_fs = GSEL(GPRIV_SEL, SEL_KPL);
2104 dblfault_tss.tss_cs = GSEL(GCODE_SEL, SEL_KPL);
2105 dblfault_tss.tss_ldt = GSEL(GLDT_SEL, SEL_KPL);
2109 init_param2(physmem);
2111 /* now running on new page tables, configured,and u/iom is accessible */
2113 /* Map the message buffer. */
2114 for (off = 0; off < round_page(MSGBUF_SIZE); off += PAGE_SIZE)
2115 pmap_kenter((vm_offset_t)msgbufp + off, avail_end + off);
2117 msgbufinit(msgbufp, MSGBUF_SIZE);
2119 /* make a call gate to reenter kernel with */
2120 gdp = &ldt[LSYS5CALLS_SEL].gd;
2122 x = (int) &IDTVEC(syscall);
2123 gdp->gd_looffset = x++;
2124 gdp->gd_selector = GSEL(GCODE_SEL,SEL_KPL);
2126 gdp->gd_type = SDT_SYS386CGT;
2127 gdp->gd_dpl = SEL_UPL;
2129 gdp->gd_hioffset = ((int) &IDTVEC(syscall)) >>16;
2131 /* XXX does this work? */
2132 ldt[LBSDICALLS_SEL] = ldt[LSYS5CALLS_SEL];
2133 ldt[LSOL26CALLS_SEL] = ldt[LSYS5CALLS_SEL];
2135 /* transfer to user mode */
2137 _ucodesel = LSEL(LUCODE_SEL, SEL_UPL);
2138 _udatasel = LSEL(LUDATA_SEL, SEL_UPL);
2140 /* setup proc 0's pcb */
2141 thread0.td_pcb->pcb_flags = 0;
2142 thread0.td_pcb->pcb_cr3 = (int)IdlePTD; /* should already be setup */
2143 thread0.td_pcb->pcb_ext = 0;
2144 lwp0.lwp_md.md_regs = &proc0_tf;
2148 * Initialize machine-dependant portions of the global data structure.
2149 * Note that the global data area and cpu0's idlestack in the private
2150 * data space were allocated in locore.
2152 * Note: the idlethread's cpl is 0
2154 * WARNING! Called from early boot, 'mycpu' may not work yet.
2157 cpu_gdinit(struct mdglobaldata *gd, int cpu)
2160 gd->mi.gd_curthread = &gd->mi.gd_idlethread;
2162 lwkt_init_thread(&gd->mi.gd_idlethread,
2163 gd->mi.gd_prvspace->idlestack,
2164 sizeof(gd->mi.gd_prvspace->idlestack),
2166 lwkt_set_comm(&gd->mi.gd_idlethread, "idle_%d", cpu);
2167 gd->mi.gd_idlethread.td_switch = cpu_lwkt_switch;
2168 gd->mi.gd_idlethread.td_sp -= sizeof(void *);
2169 *(void **)gd->mi.gd_idlethread.td_sp = cpu_idle_restore;
2173 is_globaldata_space(vm_offset_t saddr, vm_offset_t eaddr)
2175 if (saddr >= (vm_offset_t)&CPU_prvspace[0] &&
2176 eaddr <= (vm_offset_t)&CPU_prvspace[MAXCPU]) {
2183 globaldata_find(int cpu)
2185 KKASSERT(cpu >= 0 && cpu < ncpus);
2186 return(&CPU_prvspace[cpu].mdglobaldata.mi);
2189 #if defined(I586_CPU) && !defined(NO_F00F_HACK)
2190 static void f00f_hack(void *unused);
2191 SYSINIT(f00f_hack, SI_BOOT2_BIOS, SI_ORDER_ANY, f00f_hack, NULL);
2194 f00f_hack(void *unused)
2196 struct gate_descriptor *new_idt;
2202 kprintf("Intel Pentium detected, installing workaround for F00F bug\n");
2204 r_idt.rd_limit = sizeof(idt0) - 1;
2206 tmp = kmem_alloc(&kernel_map, PAGE_SIZE * 2);
2208 panic("kmem_alloc returned 0");
2209 if (((unsigned int)tmp & (PAGE_SIZE-1)) != 0)
2210 panic("kmem_alloc returned non-page-aligned memory");
2211 /* Put the first seven entries in the lower page */
2212 new_idt = (struct gate_descriptor*)(tmp + PAGE_SIZE - (7*8));
2213 bcopy(idt, new_idt, sizeof(idt0));
2214 r_idt.rd_base = (int)new_idt;
2217 if (vm_map_protect(&kernel_map, tmp, tmp + PAGE_SIZE,
2218 VM_PROT_READ, FALSE) != KERN_SUCCESS)
2219 panic("vm_map_protect failed");
2222 #endif /* defined(I586_CPU) && !NO_F00F_HACK */
2225 ptrace_set_pc(struct lwp *lp, unsigned long addr)
2227 lp->lwp_md.md_regs->tf_eip = addr;
2232 ptrace_single_step(struct lwp *lp)
2234 lp->lwp_md.md_regs->tf_eflags |= PSL_T;
2239 fill_regs(struct lwp *lp, struct reg *regs)
2241 struct trapframe *tp;
2243 tp = lp->lwp_md.md_regs;
2244 regs->r_gs = tp->tf_gs;
2245 regs->r_fs = tp->tf_fs;
2246 regs->r_es = tp->tf_es;
2247 regs->r_ds = tp->tf_ds;
2248 regs->r_edi = tp->tf_edi;
2249 regs->r_esi = tp->tf_esi;
2250 regs->r_ebp = tp->tf_ebp;
2251 regs->r_ebx = tp->tf_ebx;
2252 regs->r_edx = tp->tf_edx;
2253 regs->r_ecx = tp->tf_ecx;
2254 regs->r_eax = tp->tf_eax;
2255 regs->r_eip = tp->tf_eip;
2256 regs->r_cs = tp->tf_cs;
2257 regs->r_eflags = tp->tf_eflags;
2258 regs->r_esp = tp->tf_esp;
2259 regs->r_ss = tp->tf_ss;
2264 set_regs(struct lwp *lp, struct reg *regs)
2266 struct trapframe *tp;
2268 tp = lp->lwp_md.md_regs;
2269 if (!EFL_SECURE(regs->r_eflags, tp->tf_eflags) ||
2270 !CS_SECURE(regs->r_cs))
2272 tp->tf_gs = regs->r_gs;
2273 tp->tf_fs = regs->r_fs;
2274 tp->tf_es = regs->r_es;
2275 tp->tf_ds = regs->r_ds;
2276 tp->tf_edi = regs->r_edi;
2277 tp->tf_esi = regs->r_esi;
2278 tp->tf_ebp = regs->r_ebp;
2279 tp->tf_ebx = regs->r_ebx;
2280 tp->tf_edx = regs->r_edx;
2281 tp->tf_ecx = regs->r_ecx;
2282 tp->tf_eax = regs->r_eax;
2283 tp->tf_eip = regs->r_eip;
2284 tp->tf_cs = regs->r_cs;
2285 tp->tf_eflags = regs->r_eflags;
2286 tp->tf_esp = regs->r_esp;
2287 tp->tf_ss = regs->r_ss;
2291 #ifndef CPU_DISABLE_SSE
2293 fill_fpregs_xmm(struct savexmm *sv_xmm, struct save87 *sv_87)
2295 struct env87 *penv_87 = &sv_87->sv_env;
2296 struct envxmm *penv_xmm = &sv_xmm->sv_env;
2299 /* FPU control/status */
2300 penv_87->en_cw = penv_xmm->en_cw;
2301 penv_87->en_sw = penv_xmm->en_sw;
2302 penv_87->en_tw = penv_xmm->en_tw;
2303 penv_87->en_fip = penv_xmm->en_fip;
2304 penv_87->en_fcs = penv_xmm->en_fcs;
2305 penv_87->en_opcode = penv_xmm->en_opcode;
2306 penv_87->en_foo = penv_xmm->en_foo;
2307 penv_87->en_fos = penv_xmm->en_fos;
2310 for (i = 0; i < 8; ++i)
2311 sv_87->sv_ac[i] = sv_xmm->sv_fp[i].fp_acc;
2313 sv_87->sv_ex_sw = sv_xmm->sv_ex_sw;
2317 set_fpregs_xmm(struct save87 *sv_87, struct savexmm *sv_xmm)
2319 struct env87 *penv_87 = &sv_87->sv_env;
2320 struct envxmm *penv_xmm = &sv_xmm->sv_env;
2323 /* FPU control/status */
2324 penv_xmm->en_cw = penv_87->en_cw;
2325 penv_xmm->en_sw = penv_87->en_sw;
2326 penv_xmm->en_tw = penv_87->en_tw;
2327 penv_xmm->en_fip = penv_87->en_fip;
2328 penv_xmm->en_fcs = penv_87->en_fcs;
2329 penv_xmm->en_opcode = penv_87->en_opcode;
2330 penv_xmm->en_foo = penv_87->en_foo;
2331 penv_xmm->en_fos = penv_87->en_fos;
2334 for (i = 0; i < 8; ++i)
2335 sv_xmm->sv_fp[i].fp_acc = sv_87->sv_ac[i];
2337 sv_xmm->sv_ex_sw = sv_87->sv_ex_sw;
2339 #endif /* CPU_DISABLE_SSE */
2342 fill_fpregs(struct lwp *lp, struct fpreg *fpregs)
2344 #ifndef CPU_DISABLE_SSE
2346 fill_fpregs_xmm(&lp->lwp_thread->td_pcb->pcb_save.sv_xmm,
2347 (struct save87 *)fpregs);
2350 #endif /* CPU_DISABLE_SSE */
2351 bcopy(&lp->lwp_thread->td_pcb->pcb_save.sv_87, fpregs, sizeof *fpregs);
2356 set_fpregs(struct lwp *lp, struct fpreg *fpregs)
2358 #ifndef CPU_DISABLE_SSE
2360 set_fpregs_xmm((struct save87 *)fpregs,
2361 &lp->lwp_thread->td_pcb->pcb_save.sv_xmm);
2364 #endif /* CPU_DISABLE_SSE */
2365 bcopy(fpregs, &lp->lwp_thread->td_pcb->pcb_save.sv_87, sizeof *fpregs);
2370 fill_dbregs(struct lwp *lp, struct dbreg *dbregs)
2373 dbregs->dr0 = rdr0();
2374 dbregs->dr1 = rdr1();
2375 dbregs->dr2 = rdr2();
2376 dbregs->dr3 = rdr3();
2377 dbregs->dr4 = rdr4();
2378 dbregs->dr5 = rdr5();
2379 dbregs->dr6 = rdr6();
2380 dbregs->dr7 = rdr7();
2384 pcb = lp->lwp_thread->td_pcb;
2385 dbregs->dr0 = pcb->pcb_dr0;
2386 dbregs->dr1 = pcb->pcb_dr1;
2387 dbregs->dr2 = pcb->pcb_dr2;
2388 dbregs->dr3 = pcb->pcb_dr3;
2391 dbregs->dr6 = pcb->pcb_dr6;
2392 dbregs->dr7 = pcb->pcb_dr7;
2398 set_dbregs(struct lwp *lp, struct dbreg *dbregs)
2401 load_dr0(dbregs->dr0);
2402 load_dr1(dbregs->dr1);
2403 load_dr2(dbregs->dr2);
2404 load_dr3(dbregs->dr3);
2405 load_dr4(dbregs->dr4);
2406 load_dr5(dbregs->dr5);
2407 load_dr6(dbregs->dr6);
2408 load_dr7(dbregs->dr7);
2411 struct ucred *ucred;
2413 uint32_t mask1, mask2;
2416 * Don't let an illegal value for dr7 get set. Specifically,
2417 * check for undefined settings. Setting these bit patterns
2418 * result in undefined behaviour and can lead to an unexpected
2421 for (i = 0, mask1 = 0x3<<16, mask2 = 0x2<<16; i < 8;
2422 i++, mask1 <<= 2, mask2 <<= 2)
2423 if ((dbregs->dr7 & mask1) == mask2)
2426 pcb = lp->lwp_thread->td_pcb;
2427 ucred = lp->lwp_proc->p_ucred;
2430 * Don't let a process set a breakpoint that is not within the
2431 * process's address space. If a process could do this, it
2432 * could halt the system by setting a breakpoint in the kernel
2433 * (if ddb was enabled). Thus, we need to check to make sure
2434 * that no breakpoints are being enabled for addresses outside
2435 * process's address space, unless, perhaps, we were called by
2438 * XXX - what about when the watched area of the user's
2439 * address space is written into from within the kernel
2440 * ... wouldn't that still cause a breakpoint to be generated
2441 * from within kernel mode?
2444 if (priv_check_cred(ucred, PRIV_ROOT, 0) != 0) {
2445 if (dbregs->dr7 & 0x3) {
2446 /* dr0 is enabled */
2447 if (dbregs->dr0 >= VM_MAX_USER_ADDRESS)
2451 if (dbregs->dr7 & (0x3<<2)) {
2452 /* dr1 is enabled */
2453 if (dbregs->dr1 >= VM_MAX_USER_ADDRESS)
2457 if (dbregs->dr7 & (0x3<<4)) {
2458 /* dr2 is enabled */
2459 if (dbregs->dr2 >= VM_MAX_USER_ADDRESS)
2463 if (dbregs->dr7 & (0x3<<6)) {
2464 /* dr3 is enabled */
2465 if (dbregs->dr3 >= VM_MAX_USER_ADDRESS)
2470 pcb->pcb_dr0 = dbregs->dr0;
2471 pcb->pcb_dr1 = dbregs->dr1;
2472 pcb->pcb_dr2 = dbregs->dr2;
2473 pcb->pcb_dr3 = dbregs->dr3;
2474 pcb->pcb_dr6 = dbregs->dr6;
2475 pcb->pcb_dr7 = dbregs->dr7;
2477 pcb->pcb_flags |= PCB_DBREGS;
2484 * Return > 0 if a hardware breakpoint has been hit, and the
2485 * breakpoint was in user space. Return 0, otherwise.
2488 user_dbreg_trap(void)
2490 u_int32_t dr7, dr6; /* debug registers dr6 and dr7 */
2491 u_int32_t bp; /* breakpoint bits extracted from dr6 */
2492 int nbp; /* number of breakpoints that triggered */
2493 caddr_t addr[4]; /* breakpoint addresses */
2497 if ((dr7 & 0x000000ff) == 0) {
2499 * all GE and LE bits in the dr7 register are zero,
2500 * thus the trap couldn't have been caused by the
2501 * hardware debug registers
2508 bp = dr6 & 0x0000000f;
2512 * None of the breakpoint bits are set meaning this
2513 * trap was not caused by any of the debug registers
2519 * at least one of the breakpoints were hit, check to see
2520 * which ones and if any of them are user space addresses
2524 addr[nbp++] = (caddr_t)rdr0();
2527 addr[nbp++] = (caddr_t)rdr1();
2530 addr[nbp++] = (caddr_t)rdr2();
2533 addr[nbp++] = (caddr_t)rdr3();
2536 for (i=0; i<nbp; i++) {
2538 (caddr_t)VM_MAX_USER_ADDRESS) {
2540 * addr[i] is in user space
2547 * None of the breakpoints are in user space.
2555 Debugger(const char *msg)
2557 kprintf("Debugger(\"%s\") called.\n", msg);
2564 * Provide inb() and outb() as functions. They are normally only
2565 * available as macros calling inlined functions, thus cannot be
2566 * called inside DDB.
2568 * The actual code is stolen from <machine/cpufunc.h>, and de-inlined.
2574 /* silence compiler warnings */
2576 void outb(u_int, u_char);
2583 * We use %%dx and not %1 here because i/o is done at %dx and not at
2584 * %edx, while gcc generates inferior code (movw instead of movl)
2585 * if we tell it to load (u_short) port.
2587 __asm __volatile("inb %%dx,%0" : "=a" (data) : "d" (port));
2592 outb(u_int port, u_char data)
2596 * Use an unnecessary assignment to help gcc's register allocator.
2597 * This make a large difference for gcc-1.40 and a tiny difference
2598 * for gcc-2.6.0. For gcc-1.40, al had to be ``asm("ax")'' for
2599 * best results. gcc-2.6.0 can't handle this.
2602 __asm __volatile("outb %0,%%dx" : : "a" (al), "d" (port));
2609 #include "opt_cpu.h"
2613 * initialize all the SMP locks
2616 /* critical region when masking or unmasking interupts */
2617 struct spinlock_deprecated imen_spinlock;
2619 /* critical region for old style disable_intr/enable_intr */
2620 struct spinlock_deprecated mpintr_spinlock;
2622 /* critical region around INTR() routines */
2623 struct spinlock_deprecated intr_spinlock;
2625 /* lock region used by kernel profiling */
2626 struct spinlock_deprecated mcount_spinlock;
2628 /* locks com (tty) data/hardware accesses: a FASTINTR() */
2629 struct spinlock_deprecated com_spinlock;
2631 /* lock regions around the clock hardware */
2632 struct spinlock_deprecated clock_spinlock;
2634 /* lock around the MP rendezvous */
2635 struct spinlock_deprecated smp_rv_spinlock;
2642 * Get the initial mplock with a count of 1 for the BSP.
2643 * This uses a LOGICAL cpu ID, ie BSP == 0.
2645 cpu_get_initial_mplock();
2648 spin_lock_init(&mcount_spinlock);
2649 spin_lock_init(&intr_spinlock);
2650 spin_lock_init(&mpintr_spinlock);
2651 spin_lock_init(&imen_spinlock);
2652 spin_lock_init(&smp_rv_spinlock);
2653 spin_lock_init(&com_spinlock);
2654 spin_lock_init(&clock_spinlock);
2656 /* our token pool needs to work early */
2657 lwkt_token_pool_init();