netinet{,6}: Assert in{,6}_inithead() are only used for system routing tables.
[dragonfly.git] / sys / dev / drm / radeon / radeon_drv.c
CommitLineData
926deccb
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1/**
2 * \file radeon_drv.c
3 * ATI Radeon driver
4 *
5 * \author Gareth Hughes <gareth@valinux.com>
7f3c3d6f 6 */
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7
8/*
7f3c3d6f
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9 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
10 * All Rights Reserved.
11 *
12 * Permission is hereby granted, free of charge, to any person obtaining a
13 * copy of this software and associated documentation files (the "Software"),
14 * to deal in the Software without restriction, including without limitation
15 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
16 * and/or sell copies of the Software, and to permit persons to whom the
17 * Software is furnished to do so, subject to the following conditions:
18 *
19 * The above copyright notice and this permission notice (including the next
20 * paragraph) shall be included in all copies or substantial portions of the
21 * Software.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
24 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
25 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
26 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
27 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
28 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
29 * OTHER DEALINGS IN THE SOFTWARE.
30 *
926deccb 31 * $FreeBSD: head/sys/dev/drm2/radeon/radeon_drv.c 254885 2013-08-25 19:37:15Z dumbbell $
7f3c3d6f
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32 */
33
18e26a6d 34#include <drm/drmP.h>
926deccb 35#include <uapi_drm/radeon_drm.h>
c4a9e910 36#include "radeon_drv.h"
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37#include "radeon_gem.h"
38#include "radeon_kms.h"
39#include "radeon_irq_kms.h"
40
18e26a6d 41#include <drm/drm_pciids.h>
c4ef309b 42#include <linux/module.h>
7f3c3d6f 43
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44/*
45 * KMS wrapper.
46 * - 2.0.0 - initial interface
47 * - 2.1.0 - add square tiling interface
48 * - 2.2.0 - add r6xx/r7xx const buffer support
49 * - 2.3.0 - add MSPOS + 3D texture + r500 VAP regs
50 * - 2.4.0 - add crtc id query
51 * - 2.5.0 - add get accel 2 to work around ddx breakage for evergreen
52 * - 2.6.0 - add tiling config query (r6xx+), add initial HiZ support (r300->r500)
53 * 2.7.0 - fixups for r600 2D tiling support. (no external ABI change), add eg dyn gpr regs
54 * 2.8.0 - pageflip support, r500 US_FORMAT regs. r500 ARGB2101010 colorbuf, r300->r500 CMASK, clock crystal query
55 * 2.9.0 - r600 tiling (s3tc,rgtc) working, SET_PREDICATION packet 3 on r600 + eg, backend query
56 * 2.10.0 - fusion 2D tiling
57 * 2.11.0 - backend map, initial compute support for the CS checker
58 * 2.12.0 - RADEON_CS_KEEP_TILING_FLAGS
59 * 2.13.0 - virtual memory support, streamout
60 * 2.14.0 - add evergreen tiling informations
61 * 2.15.0 - add max_pipes query
62 * 2.16.0 - fix evergreen 2D tiled surface calculation
63 * 2.17.0 - add STRMOUT_BASE_UPDATE for r7xx
64 * 2.18.0 - r600-eg: allow "invalid" DB formats
65 * 2.19.0 - r600-eg: MSAA textures
66 * 2.20.0 - r600-si: RADEON_INFO_TIMESTAMP query
67 * 2.21.0 - r600-r700: FMASK and CMASK
68 * 2.22.0 - r600 only: RESOLVE_BOX allowed
69 * 2.23.0 - allow STRMOUT_BASE_UPDATE on RS780 and RS880
70 * 2.24.0 - eg only: allow MIP_ADDRESS=0 for MSAA textures
71 * 2.25.0 - eg+: new info request for num SE and num SH
72 * 2.26.0 - r600-eg: fix htile size computation
73 * 2.27.0 - r600-SI: Add CS ioctl support for async DMA
74 * 2.28.0 - r600-eg: Add MEM_WRITE packet support
75 * 2.29.0 - R500 FP16 color clear registers
b403bed8 76 * 2.30.0 - fix for FMASK texturing
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77 * 2.31.0 - Add fastfb support for rs690
78 * 2.32.0 - new info request for rings working
79 * 2.33.0 - Add SI tiling mode array query
57e252bf 80 * 2.34.0 - Add CIK tiling mode array query
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81 */
82#define KMS_DRIVER_MAJOR 2
57e252bf 83#define KMS_DRIVER_MINOR 34
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84#define KMS_DRIVER_PATCHLEVEL 0
85int radeon_suspend_kms(struct drm_device *dev);
86int radeon_resume_kms(struct drm_device *dev);
87extern int radeon_get_crtc_scanoutpos(struct drm_device *dev, int crtc,
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88 unsigned int flags,
89 int *vpos, int *hpos, ktime_t *stime,
90 ktime_t *etime);
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91extern struct drm_ioctl_desc radeon_ioctls_kms[];
92extern int radeon_max_kms_ioctl;
93#ifdef DUMBBELL_WIP
94int radeon_mmap(struct file *filp, struct vm_area_struct *vma);
95#endif /* DUMBBELL_WIP */
96int radeon_mode_dumb_mmap(struct drm_file *filp,
97 struct drm_device *dev,
98 uint32_t handle, uint64_t *offset_p);
99int radeon_mode_dumb_create(struct drm_file *file_priv,
100 struct drm_device *dev,
101 struct drm_mode_create_dumb *args);
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102struct sg_table *radeon_gem_prime_get_sg_table(struct drm_gem_object *obj);
103struct drm_gem_object *radeon_gem_prime_import_sg_table(struct drm_device *dev,
104 size_t size,
105 struct sg_table *sg);
106int radeon_gem_prime_pin(struct drm_gem_object *obj);
57e252bf 107void radeon_gem_prime_unpin(struct drm_gem_object *obj);
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108void *radeon_gem_prime_vmap(struct drm_gem_object *obj);
109void radeon_gem_prime_vunmap(struct drm_gem_object *obj, void *vaddr);
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110
111#if defined(CONFIG_DEBUG_FS)
112int radeon_debugfs_init(struct drm_minor *minor);
113void radeon_debugfs_cleanup(struct drm_minor *minor);
114#endif
115
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116/* atpx handler */
117#if defined(CONFIG_VGA_SWITCHEROO)
118void radeon_register_atpx_handler(void);
119void radeon_unregister_atpx_handler(void);
120#else
121static inline void radeon_register_atpx_handler(void) {}
122static inline void radeon_unregister_atpx_handler(void) {}
123#endif
124
7f3c3d6f 125int radeon_no_wb;
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126int radeon_modeset = 1;
127int radeon_dynclks = -1;
128int radeon_r4xx_atom = 0;
129int radeon_agpmode = 0;
130int radeon_vram_limit = 0;
4cd92098 131int radeon_gart_size = -1; /* auto */
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132int radeon_benchmarking = 0;
133int radeon_testing = 0;
134int radeon_connector_table = 0;
135int radeon_tv = 1;
4cd92098 136int radeon_audio = -1;
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137int radeon_disp_priority = 0;
138int radeon_hw_i2c = 0;
139int radeon_pcie_gen2 = -1;
140int radeon_msi = -1;
141int radeon_lockup_timeout = 10000;
f43cf1b1 142int radeon_fastfb = 0;
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143int radeon_dpm = -1;
144int radeon_aspm = -1;
926deccb 145
bdd17f6f 146TUNABLE_INT("drm.radeon.no_wb", &radeon_no_wb);
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147MODULE_PARM_DESC(no_wb, "Disable AGP writeback for scratch registers");
148module_param_named(no_wb, radeon_no_wb, int, 0444);
149
150MODULE_PARM_DESC(modeset, "Disable/Enable modesetting");
151module_param_named(modeset, radeon_modeset, int, 0400);
152
bdd17f6f 153TUNABLE_INT("drm.radeon.dynclks", &radeon_dynclks);
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154MODULE_PARM_DESC(dynclks, "Disable/Enable dynamic clocks");
155module_param_named(dynclks, radeon_dynclks, int, 0444);
156
bdd17f6f 157TUNABLE_INT("drm.radeon.r4xx_atom", &radeon_r4xx_atom);
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158MODULE_PARM_DESC(r4xx_atom, "Enable ATOMBIOS modesetting for R4xx");
159module_param_named(r4xx_atom, radeon_r4xx_atom, int, 0444);
160
bdd17f6f 161TUNABLE_INT("drm.radeon.vram_limit", &radeon_vram_limit);
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162MODULE_PARM_DESC(vramlimit, "Restrict VRAM for testing");
163module_param_named(vramlimit, radeon_vram_limit, int, 0600);
164
bdd17f6f 165TUNABLE_INT("drm.radeon.agpmode", &radeon_agpmode);
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166MODULE_PARM_DESC(agpmode, "AGP Mode (-1 == PCI)");
167module_param_named(agpmode, radeon_agpmode, int, 0444);
168
bdd17f6f 169TUNABLE_INT("drm.radeon.gart_size", &radeon_gart_size);
4cd92098 170MODULE_PARM_DESC(gartsize, "Size of PCIE/IGP gart to setup in megabytes (32, 64, etc., -1 = auto)");
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171module_param_named(gartsize, radeon_gart_size, int, 0600);
172
bdd17f6f 173TUNABLE_INT("drm.radeon.benchmarking", &radeon_benchmarking);
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174MODULE_PARM_DESC(benchmark, "Run benchmark");
175module_param_named(benchmark, radeon_benchmarking, int, 0444);
176
bdd17f6f 177TUNABLE_INT("drm.radeon.testing", &radeon_testing);
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178MODULE_PARM_DESC(test, "Run tests");
179module_param_named(test, radeon_testing, int, 0444);
180
bdd17f6f 181TUNABLE_INT("drm.radeon.connector_table", &radeon_connector_table);
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182MODULE_PARM_DESC(connector_table, "Force connector table");
183module_param_named(connector_table, radeon_connector_table, int, 0444);
184
bdd17f6f 185TUNABLE_INT("drm.radeon.tv", &radeon_tv);
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186MODULE_PARM_DESC(tv, "TV enable (0 = disable)");
187module_param_named(tv, radeon_tv, int, 0444);
188
bdd17f6f 189TUNABLE_INT("drm.radeon.audio", &radeon_audio);
4cd92098 190MODULE_PARM_DESC(audio, "Audio enable (-1 = auto, 0 = disable, 1 = enable)");
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191module_param_named(audio, radeon_audio, int, 0444);
192
bdd17f6f 193TUNABLE_INT("drm.radeon.disp_priority", &radeon_disp_priority);
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194MODULE_PARM_DESC(disp_priority, "Display Priority (0 = auto, 1 = normal, 2 = high)");
195module_param_named(disp_priority, radeon_disp_priority, int, 0444);
196
bdd17f6f 197TUNABLE_INT("drm.radeon.hw_i2c", &radeon_hw_i2c);
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198MODULE_PARM_DESC(hw_i2c, "hw i2c engine enable (0 = disable)");
199module_param_named(hw_i2c, radeon_hw_i2c, int, 0444);
7f3c3d6f 200
bdd17f6f 201TUNABLE_INT("drm.radeon.pcie_gen2", &radeon_pcie_gen2);
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202MODULE_PARM_DESC(pcie_gen2, "PCIE Gen2 mode (-1 = auto, 0 = disable, 1 = enable)");
203module_param_named(pcie_gen2, radeon_pcie_gen2, int, 0444);
204
bdd17f6f 205TUNABLE_INT("drm.radeon.msi", &radeon_msi);
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206MODULE_PARM_DESC(msi, "MSI support (1 = enable, 0 = disable, -1 = auto)");
207module_param_named(msi, radeon_msi, int, 0444);
208
bdd17f6f 209TUNABLE_INT("drm.radeon.lockup_timeout", &radeon_lockup_timeout);
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210MODULE_PARM_DESC(lockup_timeout, "GPU lockup timeout in ms (defaul 10000 = 10 seconds, 0 = disable)");
211module_param_named(lockup_timeout, radeon_lockup_timeout, int, 0444);
212
bdd17f6f 213TUNABLE_INT("drm.radeon.fastfb", &radeon_fastfb);
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214MODULE_PARM_DESC(fastfb, "Direct FB access for IGP chips (0 = disable, 1 = enable)");
215module_param_named(fastfb, radeon_fastfb, int, 0444);
216
bdd17f6f 217TUNABLE_INT("drm.radeon.dpm", &radeon_dpm);
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218MODULE_PARM_DESC(dpm, "DPM support (1 = enable, 0 = disable, -1 = auto)");
219module_param_named(dpm, radeon_dpm, int, 0444);
220
bdd17f6f 221TUNABLE_INT("drm.radeon.aspm", &radeon_aspm);
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222MODULE_PARM_DESC(aspm, "ASPM support (1 = enable, 0 = disable, -1 = auto)");
223module_param_named(aspm, radeon_aspm, int, 0444);
224
bdd17f6f 225static drm_pci_id_list_t pciidlist[] = {
226 radeon_PCI_IDS
227};
228
229#ifdef CONFIG_DRM_RADEON_UMS
230
231#ifdef DUMBBELL_WIP
232
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233static int radeon_suspend(struct drm_device *dev, pm_message_t state)
234{
235 drm_radeon_private_t *dev_priv = dev->dev_private;
236
237 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
238 return 0;
239
240 /* Disable *all* interrupts */
241 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600)
242 RADEON_WRITE(R500_DxMODE_INT_MASK, 0);
243 RADEON_WRITE(RADEON_GEN_INT_CNTL, 0);
244 return 0;
245}
246
247static int radeon_resume(struct drm_device *dev)
248{
249 drm_radeon_private_t *dev_priv = dev->dev_private;
250
251 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
252 return 0;
253
254 /* Restore interrupt registers */
255 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600)
256 RADEON_WRITE(R500_DxMODE_INT_MASK, dev_priv->r500_disp_irq_reg);
257 RADEON_WRITE(RADEON_GEN_INT_CNTL, dev_priv->irq_enable_reg);
258 return 0;
259}
260#endif /* DUMBBELL_WIP */
261
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262#ifdef DUMBBELL_WIP
263static const struct file_operations radeon_driver_old_fops = {
264 .owner = THIS_MODULE,
265 .open = drm_open,
266 .release = drm_release,
267 .unlocked_ioctl = drm_ioctl,
268 .mmap = drm_mmap,
269 .poll = drm_poll,
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270 .read = drm_read,
271#ifdef CONFIG_COMPAT
272 .compat_ioctl = radeon_compat_ioctl,
273#endif
274 .llseek = noop_llseek,
275};
276
277static struct drm_driver driver_old = {
278 .driver_features =
9edbd4a0 279 DRIVER_USE_AGP | DRIVER_PCI_DMA | DRIVER_SG |
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280 DRIVER_HAVE_IRQ | DRIVER_HAVE_DMA | DRIVER_IRQ_SHARED,
281 .dev_priv_size = sizeof(drm_radeon_buf_priv_t),
282 .load = radeon_driver_load,
283 .firstopen = radeon_driver_firstopen,
284 .open = radeon_driver_open,
285 .preclose = radeon_driver_preclose,
286 .postclose = radeon_driver_postclose,
287 .lastclose = radeon_driver_lastclose,
288 .unload = radeon_driver_unload,
289#ifdef DUMBBELL_WIP
290 .suspend = radeon_suspend,
291 .resume = radeon_resume,
292#endif /* DUMBBELL_WIP */
293 .get_vblank_counter = radeon_get_vblank_counter,
294 .enable_vblank = radeon_enable_vblank,
295 .disable_vblank = radeon_disable_vblank,
296 .master_create = radeon_master_create,
297 .master_destroy = radeon_master_destroy,
298 .irq_preinstall = radeon_driver_irq_preinstall,
299 .irq_postinstall = radeon_driver_irq_postinstall,
300 .irq_uninstall = radeon_driver_irq_uninstall,
301 .irq_handler = radeon_driver_irq_handler,
302 .ioctls = radeon_ioctls,
303 .dma_ioctl = radeon_cp_buffers,
304 .fops = &radeon_driver_old_fops,
305 .name = DRIVER_NAME,
306 .desc = DRIVER_DESC,
307 .date = DRIVER_DATE,
308 .major = DRIVER_MAJOR,
309 .minor = DRIVER_MINOR,
310 .patchlevel = DRIVER_PATCHLEVEL,
311};
312#endif /* DUMBBELL_WIP */
313
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314#endif
315
9a567f76 316static struct drm_driver kms_driver;
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317
318#ifdef DUMBBELL_WIP
319static int radeon_kick_out_firmware_fb(struct pci_dev *pdev)
320{
321 struct apertures_struct *ap;
322 bool primary = false;
323
324 ap = alloc_apertures(1);
325 if (!ap)
326 return -ENOMEM;
327
328 ap->ranges[0].base = pci_resource_start(pdev, 0);
329 ap->ranges[0].size = pci_resource_len(pdev, 0);
330
331#ifdef CONFIG_X86
332 primary = pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW;
333#endif
334 remove_conflicting_framebuffers(ap, "radeondrmfb", primary);
335 kfree(ap);
336
337 return 0;
338}
339
340static int radeon_pci_probe(struct pci_dev *pdev,
341 const struct pci_device_id *ent)
342{
343 int ret;
344
345 /* Get rid of things like offb */
346 ret = radeon_kick_out_firmware_fb(pdev);
347 if (ret)
348 return ret;
349
350 return drm_get_pci_dev(pdev, ent, &kms_driver);
351}
352
353static void
354radeon_pci_remove(struct pci_dev *pdev)
355{
356 struct drm_device *dev = pci_get_drvdata(pdev);
357
358 drm_put_dev(dev);
359}
360
361static int
362radeon_pci_suspend(struct pci_dev *pdev, pm_message_t state)
363{
364 struct drm_device *dev = pci_get_drvdata(pdev);
365 return radeon_suspend_kms(dev, state);
366}
367
368static int
369radeon_pci_resume(struct pci_dev *pdev)
370{
371 struct drm_device *dev = pci_get_drvdata(pdev);
372 return radeon_resume_kms(dev);
373}
374
375static const struct file_operations radeon_driver_kms_fops = {
376 .owner = THIS_MODULE,
377 .open = drm_open,
378 .release = drm_release,
379 .unlocked_ioctl = drm_ioctl,
380 .mmap = radeon_mmap,
381 .poll = drm_poll,
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382 .read = drm_read,
383#ifdef CONFIG_COMPAT
384 .compat_ioctl = radeon_kms_compat_ioctl,
385#endif
386};
387#endif /* DUMBBELL_WIP */
388
9a567f76 389static struct drm_driver kms_driver = {
926deccb 390 .driver_features =
4cd92098 391 DRIVER_USE_AGP |
392 DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED | DRIVER_GEM |
393 DRIVER_PRIME | DRIVER_RENDER,
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394#ifdef DUMBBELL_WIP
395 .dev_priv_size = 0,
396#endif /* DUMBBELL_WIP */
397 .load = radeon_driver_load_kms,
398 .use_msi = radeon_msi_ok,
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399 .open = radeon_driver_open_kms,
400 .preclose = radeon_driver_preclose_kms,
401 .postclose = radeon_driver_postclose_kms,
402 .lastclose = radeon_driver_lastclose_kms,
403 .unload = radeon_driver_unload_kms,
404#ifdef DUMBBELL_WIP
405 .suspend = radeon_suspend_kms,
406 .resume = radeon_resume_kms,
407#endif /* DUMBBELL_WIP */
408 .get_vblank_counter = radeon_get_vblank_counter_kms,
409 .enable_vblank = radeon_enable_vblank_kms,
410 .disable_vblank = radeon_disable_vblank_kms,
411 .get_vblank_timestamp = radeon_get_vblank_timestamp_kms,
412 .get_scanout_position = radeon_get_crtc_scanoutpos,
413 .irq_preinstall = radeon_driver_irq_preinstall_kms,
414 .irq_postinstall = radeon_driver_irq_postinstall_kms,
415 .irq_uninstall = radeon_driver_irq_uninstall_kms,
416 .irq_handler = radeon_driver_irq_handler_kms,
417 .ioctls = radeon_ioctls_kms,
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418 .gem_free_object = radeon_gem_object_free,
419 .gem_open_object = radeon_gem_object_open,
420 .gem_close_object = radeon_gem_object_close,
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421 .dumb_create = radeon_mode_dumb_create,
422 .dumb_map_offset = radeon_mode_dumb_mmap,
4cd92098 423 .dumb_destroy = drm_gem_dumb_destroy,
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424#ifdef DUMBBELL_WIP
425 .fops = &radeon_driver_kms_fops,
426#endif /* DUMBBELL_WIP */
427
428#ifdef DUMBBELL_WIP
429 .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
430 .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
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431 .gem_prime_export = drm_gem_prime_export,
432 .gem_prime_import = drm_gem_prime_import,
433 .gem_prime_pin = radeon_gem_prime_pin,
57e252bf 434 .gem_prime_unpin = radeon_gem_prime_unpin,
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435 .gem_prime_get_sg_table = radeon_gem_prime_get_sg_table,
436 .gem_prime_import_sg_table = radeon_gem_prime_import_sg_table,
437 .gem_prime_vmap = radeon_gem_prime_vmap,
438 .gem_prime_vunmap = radeon_gem_prime_vunmap,
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439#endif /* DUMBBELL_WIP */
440
441 .name = DRIVER_NAME,
442 .desc = DRIVER_DESC,
443 .date = DRIVER_DATE,
444 .major = KMS_DRIVER_MAJOR,
445 .minor = KMS_DRIVER_MINOR,
446 .patchlevel = KMS_DRIVER_PATCHLEVEL,
447};
448
449#ifdef DUMBBELL_WIP
450static int __init radeon_init(void)
451{
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452 if (radeon_modeset == 1) {
453 DRM_INFO("radeon kernel modesetting enabled.\n");
454 driver = &kms_driver;
455 pdriver = &radeon_kms_pci_driver;
456 driver->driver_features |= DRIVER_MODESET;
457 driver->num_ioctls = radeon_max_kms_ioctl;
458 radeon_register_atpx_handler();
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459
460 } else {
461#ifdef CONFIG_DRM_RADEON_UMS
462 DRM_INFO("radeon userspace modesetting enabled.\n");
463 driver = &driver_old;
464 pdriver = &radeon_pci_driver;
465 driver->driver_features &= ~DRIVER_MODESET;
466 driver->num_ioctls = radeon_max_ioctl;
467#else
468 DRM_ERROR("No UMS support in radeon module!\n");
469 return -EINVAL;
470#endif
926deccb 471 }
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472
473 /* let modprobe override vga console setting */
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474 return drm_pci_init(driver, pdriver);
475}
476
477static void __exit radeon_exit(void)
7f3c3d6f 478{
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479 drm_pci_exit(driver, pdriver);
480 radeon_unregister_atpx_handler();
7f3c3d6f 481}
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482#endif /* DUMBBELL_WIP */
483
484/* =================================================================== */
7f3c3d6f 485
7f3c3d6f 486static int
b3705d71 487radeon_probe(device_t kdev)
7f3c3d6f 488{
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489
490 return drm_probe(kdev, pciidlist);
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491}
492
493static int
b3705d71 494radeon_attach(device_t kdev)
7f3c3d6f 495{
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496 struct drm_device *dev;
497
498 dev = device_get_softc(kdev);
499 if (radeon_modeset == 1) {
500 kms_driver.driver_features |= DRIVER_MODESET;
8e6138a1 501 kms_driver.num_ioctls = radeon_max_kms_ioctl;
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502 radeon_register_atpx_handler();
503 }
504 dev->driver = &kms_driver;
505 return (drm_attach(kdev, pciidlist));
506}
b3705d71 507
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508static int
509radeon_suspend(device_t kdev)
510{
511 struct drm_device *dev;
512 int ret;
7f3c3d6f 513
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514 dev = device_get_softc(kdev);
515 ret = radeon_suspend_kms(dev);
b3705d71 516
926deccb 517 return (-ret);
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518}
519
520static int
926deccb 521radeon_resume(device_t kdev)
b3705d71 522{
926deccb 523 struct drm_device *dev;
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524 int ret;
525
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526 dev = device_get_softc(kdev);
527 ret = radeon_resume_kms(dev);
b3705d71 528
926deccb 529 return (-ret);
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530}
531
532static device_method_t radeon_methods[] = {
533 /* Device interface */
534 DEVMETHOD(device_probe, radeon_probe),
535 DEVMETHOD(device_attach, radeon_attach),
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536 DEVMETHOD(device_suspend, radeon_suspend),
537 DEVMETHOD(device_resume, radeon_resume),
d0cc45b6 538 DEVMETHOD(device_detach, drm_release),
d3c9c58e 539 DEVMETHOD_END
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540};
541
542static driver_t radeon_driver = {
543 "drm",
544 radeon_methods,
b3705d71 545 sizeof(struct drm_device)
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546};
547
548extern devclass_t drm_devclass;
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549DRIVER_MODULE_ORDERED(radeonkms, vgapci, radeon_driver, drm_devclass,
550 NULL, NULL, SI_ORDER_ANY);
551MODULE_DEPEND(radeonkms, drm, 1, 1, 1);
552MODULE_DEPEND(radeonkms, agp, 1, 1, 1);
553MODULE_DEPEND(radeonkms, iicbus, 1, 1, 1);
554MODULE_DEPEND(radeonkms, iic, 1, 1, 1);
555MODULE_DEPEND(radeonkms, iicbb, 1, 1, 1);