Initial import from FreeBSD RELENG_4:
[dragonfly.git] / sys / dev / disk / ct / ct_isa.c
1 /* $FreeBSD: src/sys/dev/ct/ct_isa.c,v 1.3.2.3 2003/06/01 04:26:44 nyan Exp $ */
2 /*      $NecBSD: ct_isa.c,v 1.6 1999/07/26 06:32:01 honda Exp $ */
3 /*      $NetBSD$        */
4
5 /*
6  * [NetBSD for NEC PC-98 series]
7  *  Copyright (c) 1995, 1996, 1997, 1998
8  *      NetBSD/pc98 porting staff. All rights reserved.
9  * 
10  *  Redistribution and use in source and binary forms, with or without
11  *  modification, are permitted provided that the following conditions
12  *  are met:
13  *  1. Redistributions of source code must retain the above copyright
14  *     notice, this list of conditions and the following disclaimer.
15  *  2. Redistributions in binary form must reproduce the above copyright
16  *     notice, this list of conditions and the following disclaimer in the
17  *     documentation and/or other materials provided with the distribution.
18  *  3. The name of the author may not be used to endorse or promote products
19  *     derived from this software without specific prior written permission.
20  * 
21  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
22  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
23  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
24  * DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
25  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
26  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
27  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
28  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
29  * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
30  * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
31  * POSSIBILITY OF SUCH DAMAGE.
32  */
33
34 #define SCSIBUS_RESCAN
35
36 #include <sys/param.h>
37 #include <sys/systm.h>
38 #include <sys/kernel.h>
39 #include <sys/disklabel.h>
40 #if defined(__FreeBSD__) && __FreeBSD_version > 500001
41 #include <sys/bio.h>
42 #endif  /* __ FreeBSD__ */
43 #include <sys/buf.h>
44 #include <sys/queue.h>
45 #include <sys/malloc.h>
46 #include <sys/device_port.h>
47 #include <sys/errno.h>
48
49 #include <vm/vm.h>
50
51 #ifdef __NetBSD__
52 #include <machine/bus.h>
53 #include <machine/intr.h>
54
55 #include <dev/scsipi/scsi_all.h>
56 #include <dev/scsipi/scsipi_all.h>
57 #include <dev/scsipi/scsiconf.h>
58 #include <dev/scsipi/scsi_disk.h>
59
60 #include <dev/isa/isareg.h>
61 #include <dev/isa/isavar.h>
62 #include <dev/isa/isadmavar.h>
63
64 #include <machine/dvcfg.h>
65 #include <machine/physio_proc.h>
66 #include <machine/syspmgr.h>
67
68 #include <i386/Cbus/dev/scsi_low.h>
69
70 #include <dev/ic/wd33c93reg.h>
71 #include <i386/Cbus/dev/ct/ctvar.h>
72 #include <i386/Cbus/dev/ct/bshwvar.h>
73 #endif /* __NetBSD__ */
74
75 #ifdef __FreeBSD__
76 #include <machine/bus.h>
77 #include <machine/resource.h>
78 #include <sys/bus.h>
79 #include <sys/rman.h>
80 #include <machine/md_var.h>
81
82 #include <pc98/pc98/pc98.h>
83 #include <isa/isavar.h>
84
85 #include <machine/dvcfg.h>
86 #include <machine/physio_proc.h>
87
88 #include <cam/scsi/scsi_low.h>
89
90 #include <dev/ic/wd33c93reg.h>
91 #include <dev/ct/ctvar.h>
92 #include <dev/ct/bshwvar.h>
93 #endif /* __FreeBSD__ */
94
95 #define BSHW_IOSZ       0x08
96 #define BSHW_IOBASE     0xcc0
97 #define BSHW_MEMSZ      (PAGE_SIZE * 2)
98
99 static int ct_isa_match(device_t);
100 static int ct_isa_attach(device_t);
101 static int ct_space_map(device_t, struct bshw *,
102                         struct resource **, struct resource **);
103 static void ct_space_unmap(device_t, struct ct_softc *);
104 static struct bshw *ct_find_hw(device_t);
105 static void ct_dmamap(void *, bus_dma_segment_t *, int, int);
106 static void ct_isa_bus_access_weight __P((struct ct_bus_access_handle *));
107 static void ct_isa_dmasync_before __P((struct ct_softc *));
108 static void ct_isa_dmasync_after __P((struct ct_softc *));
109
110 struct ct_isa_softc {
111         struct ct_softc sc_ct;
112         struct bshw_softc sc_bshw;
113 };
114
115 static struct isa_pnp_id ct_pnp_ids[] = {
116         { 0x0100e7b1,   "Logitec LHA-301" },
117         { 0x110154dc,   "I-O DATA SC-98III" },
118         { 0x4120acb4,   "MELCO IFC-NN" },
119         { 0,            NULL }
120 };
121
122 static device_method_t ct_isa_methods[] = {
123         /* Device interface */
124         DEVMETHOD(device_probe,         ct_isa_match),
125         DEVMETHOD(device_attach,        ct_isa_attach),
126         { 0, 0 }
127 };
128
129 static driver_t ct_isa_driver = {
130         "ct", ct_isa_methods, sizeof(struct ct_isa_softc),
131 };
132
133 static devclass_t ct_devclass;
134
135 DRIVER_MODULE(ct, isa, ct_isa_driver, ct_devclass, 0, 0);
136
137 static int
138 ct_isa_match(device_t dev)
139 {
140         struct bshw *hw;
141         struct resource *port_res, *mem_res;
142         struct ct_bus_access_handle ch;
143         int rv;
144
145         if (ISA_PNP_PROBE(device_get_parent(dev), dev, ct_pnp_ids) == ENXIO)
146                 return ENXIO;
147
148         switch (isa_get_logicalid(dev)) {
149         case 0x0100e7b1:        /* LHA-301 */
150         case 0x110154dc:        /* SC-98III */
151         case 0x4120acb4:        /* IFC-NN */
152                 /* XXX - force to SMIT mode */
153                 device_set_flags(dev, device_get_flags(dev) | 0x40000);
154                 break;
155         }
156
157         if (isa_get_port(dev) == -1)
158                 bus_set_resource(dev, SYS_RES_IOPORT, 0,
159                                  BSHW_IOBASE, BSHW_IOSZ);
160
161         if ((hw = ct_find_hw(dev)) == NULL)
162                 return ENXIO;
163         if (ct_space_map(dev, hw, &port_res, &mem_res) != 0)
164                 return ENXIO;
165
166         bzero(&ch, sizeof(ch));
167         ch.ch_iot = rman_get_bustag(port_res);
168         ch.ch_ioh = rman_get_bushandle(port_res),
169         ch.ch_bus_weight = ct_isa_bus_access_weight;
170
171         rv = ctprobesubr(&ch, 0, BSHW_DEFAULT_HOSTID,
172                          BSHW_DEFAULT_CHIPCLK, NULL);
173         if (rv != 0)
174         {
175                 struct bshw_softc bshw_tab;
176                 struct bshw_softc *bs = &bshw_tab;
177
178                 memset(bs, 0, sizeof(*bs));
179                 bshw_read_settings(&ch, bs);
180                 bus_set_resource(dev, SYS_RES_IRQ, 0, bs->sc_irq, 1);
181                 bus_set_resource(dev, SYS_RES_DRQ, 0, bs->sc_drq, 1);
182         }
183
184         bus_release_resource(dev, SYS_RES_IOPORT, 0, port_res);
185         if (mem_res != NULL)
186                 bus_release_resource(dev, SYS_RES_MEMORY, 0, mem_res);
187
188         if (rv != 0)
189                 return 0;
190         return ENXIO;
191 }
192
193 static int
194 ct_isa_attach(device_t dev)
195 {
196         struct ct_isa_softc *pct = device_get_softc(dev);
197         struct ct_softc *ct = &pct->sc_ct;
198         struct ct_bus_access_handle *chp = &ct->sc_ch;
199         struct scsi_low_softc *slp = &ct->sc_sclow;
200         struct bshw_softc *bs = &pct->sc_bshw;
201         struct bshw *hw;
202         int irq_rid, drq_rid, chiprev;
203         u_int8_t *vaddr;
204         bus_addr_t addr;
205         intrmask_t s;
206
207         hw = ct_find_hw(dev);
208         if (ct_space_map(dev, hw, &ct->port_res, &ct->mem_res) != 0) {
209                 device_printf(dev, "bus io mem map failed\n");
210                 return ENXIO;
211         }
212
213         bzero(chp, sizeof(*chp));
214         chp->ch_iot = rman_get_bustag(ct->port_res);
215         chp->ch_ioh = rman_get_bushandle(ct->port_res);
216         if (ct->mem_res) {
217                 chp->ch_memt = rman_get_bustag(ct->mem_res);
218                 chp->ch_memh = rman_get_bushandle(ct->mem_res);
219         }
220         chp->ch_bus_weight = ct_isa_bus_access_weight;
221
222         irq_rid = 0;
223         ct->irq_res = bus_alloc_resource(dev, SYS_RES_IRQ, &irq_rid, 0, ~0,
224                                          1, RF_ACTIVE);
225         drq_rid = 0;
226         ct->drq_res = bus_alloc_resource(dev, SYS_RES_DRQ, &drq_rid, 0, ~0,
227                                          1, RF_ACTIVE);
228         if (ct->irq_res == NULL || ct->drq_res == NULL) {
229                 ct_space_unmap(dev, ct);
230                 return ENXIO;
231         }
232
233         if (ctprobesubr(chp, 0, BSHW_DEFAULT_HOSTID,
234                         BSHW_DEFAULT_CHIPCLK, &chiprev) == 0)
235         {
236                 device_printf(dev, "hardware missing\n");
237                 ct_space_unmap(dev, ct);
238                 return ENXIO;
239         }
240
241         /* setup DMA map */
242         if (bus_dma_tag_create(NULL, 1, 0,
243                                BUS_SPACE_MAXADDR_24BIT, BUS_SPACE_MAXADDR,
244                                NULL, NULL, MAXBSIZE, 1,
245                                BUS_SPACE_MAXSIZE_32BIT,
246                                BUS_DMA_ALLOCNOW, &ct->sc_dmat) != 0) {
247                 device_printf(dev, "can't set up ISA DMA map\n");
248                 ct_space_unmap(dev, ct);
249                 return ENXIO;
250         }
251
252         if (bus_dmamem_alloc(ct->sc_dmat, (void **)&vaddr, BUS_DMA_NOWAIT,
253                              &ct->sc_dmamapt) != 0) {
254                 device_printf(dev, "can't set up ISA DMA map\n");
255                 ct_space_unmap(dev, ct);
256                 return ENXIO;
257         }
258
259         bus_dmamap_load(ct->sc_dmat, ct->sc_dmamapt, vaddr, MAXBSIZE,
260                         ct_dmamap, &addr, 0);
261
262         /* setup machdep softc */
263         bs->sc_hw = hw;
264         bs->sc_io_control = 0;
265         bs->sc_bounce_phys = (u_int8_t *)addr;
266         bs->sc_bounce_addr = vaddr;
267         bs->sc_bounce_size = MAXBSIZE;
268         bs->sc_minphys = (1 << 24);
269         bs->sc_dmasync_before = ct_isa_dmasync_before;
270         bs->sc_dmasync_after = ct_isa_dmasync_after;
271         bshw_read_settings(chp, bs);
272
273         /* setup ct driver softc */
274         ct->ct_hw = bs;
275         ct->ct_dma_xfer_start = bshw_dma_xfer_start;
276         ct->ct_pio_xfer_start = bshw_smit_xfer_start;
277         ct->ct_dma_xfer_stop = bshw_dma_xfer_stop;
278         ct->ct_pio_xfer_stop = bshw_smit_xfer_stop;
279         ct->ct_bus_reset = bshw_bus_reset;
280         ct->ct_synch_setup = bshw_synch_setup;
281
282         ct->sc_xmode = CT_XMODE_DMA;
283         if (chp->ch_memh != NULL)
284                 ct->sc_xmode |= CT_XMODE_PIO;
285
286         ct->sc_chiprev = chiprev;
287         switch (chiprev)
288         {
289         case CT_WD33C93:
290                 /* s = "WD33C93"; */
291                 ct->sc_chipclk = 8;
292                 break;
293         case CT_WD33C93_A:
294                 if (DVCFG_MAJOR(device_get_flags(dev)) > 0)
295                 {
296                         /* s = "AM33C93_A"; */
297                         ct->sc_chipclk = 20;
298                         ct->sc_chiprev = CT_AM33C93_A;
299                 }
300                 else
301                 {
302                         /* s = "WD33C93_A"; */
303                         ct->sc_chipclk = 10;
304                 }
305                 break;
306
307         case CT_AM33C93_A:
308                 /* s = "AM33C93_A"; */
309                 ct->sc_chipclk = 20;
310                 break;
311
312         default:
313         case CT_WD33C93_B:
314                 /* s = "WD33C93_B"; */
315                 ct->sc_chipclk = 20;
316                 break;
317         }
318 #if     0
319         printf("%s: chiprev %s chipclk %d Mhz\n", 
320                 slp->sl_dev.dv_xname, s, ct->sc_chipclk);
321 #endif
322
323         slp->sl_dev = dev;
324         slp->sl_hostid = bs->sc_hostid;
325         slp->sl_irq = isa_get_irq(dev);
326         slp->sl_cfgflags = device_get_flags(dev);
327
328         s = splcam();
329         ctattachsubr(ct);
330         splx(s);
331
332         if (bus_setup_intr(dev, ct->irq_res, INTR_TYPE_CAM,
333                            (driver_intr_t *)ctintr, ct, &ct->sc_ih)) {
334                 ct_space_unmap(dev, ct);
335                 return ENXIO;
336         }
337
338         return 0;
339 }
340
341 static struct bshw *
342 ct_find_hw(device_t dev)
343 {
344         return DVCFG_HW(&bshw_hwsel, DVCFG_MAJOR(device_get_flags(dev)));
345 }
346
347 static int
348 ct_space_map(device_t dev, struct bshw *hw,
349              struct resource **iohp, struct resource **memhp)
350 {
351         int port_rid, mem_rid;
352
353         *memhp = NULL;
354
355         port_rid = 0;
356         *iohp = bus_alloc_resource(dev, SYS_RES_IOPORT, &port_rid, 0, ~0,
357                                    BSHW_IOSZ, RF_ACTIVE);
358         if (*iohp == NULL)
359                 return ENXIO;
360
361         if ((hw->hw_flags & BSHW_SMFIFO) == 0 || isa_get_maddr(dev) == -1)
362                 return 0;
363
364         mem_rid = 0;
365         *memhp = bus_alloc_resource(dev, SYS_RES_MEMORY, &mem_rid, 0, ~0,
366                                     BSHW_MEMSZ, RF_ACTIVE);
367         if (*memhp == NULL) {
368                 bus_release_resource(dev, SYS_RES_IOPORT, port_rid, *iohp);
369                 return ENXIO;
370         }
371
372         return 0;
373 }
374
375 static void
376 ct_space_unmap(device_t dev, struct ct_softc *ct)
377 {
378         if (ct->port_res != NULL)
379                 bus_release_resource(dev, SYS_RES_IOPORT, 0, ct->port_res);
380         if (ct->mem_res != NULL)
381                 bus_release_resource(dev, SYS_RES_MEMORY, 0, ct->mem_res);
382         if (ct->irq_res != NULL)
383                 bus_release_resource(dev, SYS_RES_IRQ, 0, ct->irq_res);
384         if (ct->drq_res != NULL)
385                 bus_release_resource(dev, SYS_RES_DRQ, 0, ct->drq_res);
386 }
387
388 static void
389 ct_dmamap(void *arg, bus_dma_segment_t *seg, int nseg, int error)
390 {
391         bus_addr_t *addr = (bus_addr_t *)arg;
392
393         *addr = seg->ds_addr;
394 }
395
396 static void
397 ct_isa_bus_access_weight(chp)
398         struct ct_bus_access_handle *chp;
399 {
400
401         outb(0x5f, 0);
402 }
403
404 static void
405 ct_isa_dmasync_before(ct)
406         struct ct_softc *ct;
407 {
408
409         if (need_pre_dma_flush)
410                 wbinvd();
411 }
412
413 static void
414 ct_isa_dmasync_after(ct)
415         struct ct_softc *ct;
416 {
417
418         if (need_post_dma_flush)
419                 invd();
420 }