3 * Bill Paul <wpaul@ee.columbia.edu>. All rights reserved.
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * 3. All advertising materials mentioning features or use of this software
14 * must display the following acknowledgement:
15 * This product includes software developed by Bill Paul.
16 * 4. Neither the name of the author nor the names of any co-contributors
17 * may be used to endorse or promote products derived from this software
18 * without specific prior written permission.
20 * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND
21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23 * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD
24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
30 * THE POSSIBILITY OF SUCH DAMAGE.
32 * $FreeBSD: src/sys/dev/mii/brgphy.c,v 1.1.2.7 2003/05/11 18:00:55 ps Exp $
36 * Driver for the Broadcom BCR5400 1000baseTX PHY. Speed is always
37 * 1000mbps; all we need to negotiate here is full or half duplex.
40 #include <sys/param.h>
41 #include <sys/systm.h>
42 #include <sys/kernel.h>
43 #include <sys/socket.h>
46 #include <machine/clock.h>
49 #include <net/if_media.h>
51 #include <dev/mii/mii.h>
52 #include <dev/mii/miivar.h>
53 #include <dev/mii/miidevs.h>
55 #include <dev/mii/brgphyreg.h>
57 #include "miibus_if.h"
60 static const char rcsid[] =
61 "$FreeBSD: src/sys/dev/mii/brgphy.c,v 1.1.2.7 2003/05/11 18:00:55 ps Exp $";
64 static int brgphy_probe(device_t);
65 static int brgphy_attach(device_t);
66 static int brgphy_detach(device_t);
68 static device_method_t brgphy_methods[] = {
69 /* device interface */
70 DEVMETHOD(device_probe, brgphy_probe),
71 DEVMETHOD(device_attach, brgphy_attach),
72 DEVMETHOD(device_detach, brgphy_detach),
73 DEVMETHOD(device_shutdown, bus_generic_shutdown),
77 static devclass_t brgphy_devclass;
79 static driver_t brgphy_driver = {
82 sizeof(struct mii_softc)
85 DRIVER_MODULE(brgphy, miibus, brgphy_driver, brgphy_devclass, 0, 0);
87 static int brgphy_service(struct mii_softc *, struct mii_data *, int);
88 static void brgphy_status(struct mii_softc *);
89 static int brgphy_mii_phy_auto(struct mii_softc *);
90 static void brgphy_reset(struct mii_softc *);
91 static void brgphy_loop(struct mii_softc *);
92 static void bcm5401_load_dspcode(struct mii_softc *);
93 static void bcm5411_load_dspcode(struct mii_softc *);
94 static void bcm5703_load_dspcode(struct mii_softc *);
95 static int brgphy_mii_model;
97 static int brgphy_probe(dev)
100 struct mii_attach_args *ma;
102 ma = device_get_ivars(dev);
104 if (MII_OUI(ma->mii_id1, ma->mii_id2) == MII_OUI_xxBROADCOM &&
105 MII_MODEL(ma->mii_id2) == MII_MODEL_xxBROADCOM_BCM5400) {
106 device_set_desc(dev, MII_STR_xxBROADCOM_BCM5400);
110 if (MII_OUI(ma->mii_id1, ma->mii_id2) == MII_OUI_xxBROADCOM &&
111 MII_MODEL(ma->mii_id2) == MII_MODEL_xxBROADCOM_BCM5401) {
112 device_set_desc(dev, MII_STR_xxBROADCOM_BCM5401);
116 if (MII_OUI(ma->mii_id1, ma->mii_id2) == MII_OUI_xxBROADCOM &&
117 MII_MODEL(ma->mii_id2) == MII_MODEL_xxBROADCOM_BCM5411) {
118 device_set_desc(dev, MII_STR_xxBROADCOM_BCM5411);
122 if (MII_OUI(ma->mii_id1, ma->mii_id2) == MII_OUI_xxBROADCOM &&
123 MII_MODEL(ma->mii_id2) == MII_MODEL_xxBROADCOM_BCM5701) {
124 device_set_desc(dev, MII_STR_xxBROADCOM_BCM5701);
128 if (MII_OUI(ma->mii_id1, ma->mii_id2) == MII_OUI_xxBROADCOM &&
129 MII_MODEL(ma->mii_id2) == MII_MODEL_xxBROADCOM_BCM5703) {
130 device_set_desc(dev, MII_STR_xxBROADCOM_BCM5703);
134 if (MII_OUI(ma->mii_id1, ma->mii_id2) == MII_OUI_xxBROADCOM &&
135 MII_MODEL(ma->mii_id2) == MII_MODEL_xxBROADCOM_BCM5704) {
136 device_set_desc(dev, MII_STR_xxBROADCOM_BCM5704);
147 struct mii_softc *sc;
148 struct mii_attach_args *ma;
149 struct mii_data *mii;
150 const char *sep = "";
152 sc = device_get_softc(dev);
153 ma = device_get_ivars(dev);
154 sc->mii_dev = device_get_parent(dev);
155 mii = device_get_softc(sc->mii_dev);
156 LIST_INSERT_HEAD(&mii->mii_phys, sc, mii_list);
158 sc->mii_inst = mii->mii_instance;
159 sc->mii_phy = ma->mii_phyno;
160 sc->mii_service = brgphy_service;
163 sc->mii_flags |= MIIF_NOISOLATE;
166 #define ADD(m, c) ifmedia_add(&mii->mii_media, (m), (c), NULL)
167 #define PRINT(s) printf("%s%s", sep, s); sep = ", "
169 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_NONE, 0, sc->mii_inst),
172 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, IFM_LOOP, sc->mii_inst),
173 BMCR_LOOP|BMCR_S100);
176 brgphy_mii_model = MII_MODEL(ma->mii_id2);
179 sc->mii_capabilities =
180 PHY_READ(sc, MII_BMSR) & ma->mii_capmask;
181 device_printf(dev, " ");
182 if (sc->mii_capabilities & BMSR_MEDIAMASK)
183 mii_add_media(mii, (sc->mii_capabilities & ~BMSR_ANEG),
185 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_TX, 0, sc->mii_inst),
187 PRINT(", 1000baseTX");
188 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_TX, IFM_FDX, sc->mii_inst), 0);
189 PRINT("1000baseTX-FDX");
190 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_AUTO, 0, sc->mii_inst), 0);
197 MIIBUS_MEDIAINIT(sc->mii_dev);
205 struct mii_softc *sc;
206 struct mii_data *mii;
208 sc = device_get_softc(dev);
209 mii = device_get_softc(device_get_parent(dev));
211 LIST_REMOVE(sc, mii_list);
217 brgphy_service(sc, mii, cmd)
218 struct mii_softc *sc;
219 struct mii_data *mii;
222 struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
228 * If we're not polling our PHY instance, just return.
230 if (IFM_INST(ife->ifm_media) != sc->mii_inst)
236 * If the media indicates a different PHY instance,
239 if (IFM_INST(ife->ifm_media) != sc->mii_inst) {
240 reg = PHY_READ(sc, MII_BMCR);
241 PHY_WRITE(sc, MII_BMCR, reg | BMCR_ISO);
246 * If the interface is not up, don't do anything.
248 if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
251 brgphy_reset(sc); /* XXX hardware bug work-around */
253 switch (IFM_SUBTYPE(ife->ifm_media)) {
257 * If we're already in auto mode, just return.
259 if (PHY_READ(sc, BRGPHY_MII_BMCR) & BRGPHY_BMCR_AUTOEN)
262 (void) brgphy_mii_phy_auto(sc);
265 speed = BRGPHY_S1000;
274 if ((ife->ifm_media & IFM_GMASK) == IFM_FDX) {
275 speed |= BRGPHY_BMCR_FDX;
276 gig = BRGPHY_1000CTL_AFD;
278 gig = BRGPHY_1000CTL_AHD;
281 PHY_WRITE(sc, BRGPHY_MII_1000CTL, 0);
282 PHY_WRITE(sc, BRGPHY_MII_BMCR, speed);
283 PHY_WRITE(sc, BRGPHY_MII_ANAR, BRGPHY_SEL_TYPE);
285 if (IFM_SUBTYPE(ife->ifm_media) != IFM_1000_TX)
288 PHY_WRITE(sc, BRGPHY_MII_1000CTL, gig);
289 PHY_WRITE(sc, BRGPHY_MII_BMCR,
290 speed|BRGPHY_BMCR_AUTOEN|BRGPHY_BMCR_STARTNEG);
292 if (brgphy_mii_model != MII_MODEL_xxBROADCOM_BCM5701)
296 * When settning the link manually, one side must
297 * be the master and the other the slave. However
298 * ifmedia doesn't give us a good way to specify
299 * this, so we fake it by using one of the LINK
300 * flags. If LINK0 is set, we program the PHY to
301 * be a master, otherwise it's a slave.
303 if ((mii->mii_ifp->if_flags & IFF_LINK0)) {
304 PHY_WRITE(sc, BRGPHY_MII_1000CTL,
305 gig|BRGPHY_1000CTL_MSE|BRGPHY_1000CTL_MSC);
307 PHY_WRITE(sc, BRGPHY_MII_1000CTL,
308 gig|BRGPHY_1000CTL_MSE);
313 PHY_WRITE(sc, MII_BMCR, BMCR_ISO|BMCR_PDOWN);
324 * If we're not currently selected, just return.
326 if (IFM_INST(ife->ifm_media) != sc->mii_inst)
330 * Only used for autonegotiation.
332 if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO)
336 * Is the interface even up?
338 if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
342 * Check to see if we have link. If we do, we don't
343 * need to restart the autonegotiation process. Read
344 * the BMSR twice in case it's latched.
346 reg = PHY_READ(sc, BRGPHY_MII_AUXSTS);
347 if (reg & BRGPHY_AUXSTS_LINK)
351 * Only retry autonegotiation every 5 seconds.
353 if (++sc->mii_ticks != 5)
357 brgphy_mii_phy_auto(sc);
361 /* Update the media status. */
365 * Callback if something changed. Note that we need to poke
366 * the DSP on the Broadcom PHYs if the media changes.
368 if (sc->mii_active != mii->mii_media_active || cmd == MII_MEDIACHG) {
369 MIIBUS_STATCHG(sc->mii_dev);
370 sc->mii_active = mii->mii_media_active;
371 switch (brgphy_mii_model) {
372 case MII_MODEL_xxBROADCOM_BCM5401:
373 bcm5401_load_dspcode(sc);
375 case MII_MODEL_xxBROADCOM_BCM5411:
376 bcm5411_load_dspcode(sc);
385 struct mii_softc *sc;
387 struct mii_data *mii = sc->mii_pdata;
388 struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
391 mii->mii_media_status = IFM_AVALID;
392 mii->mii_media_active = IFM_ETHER;
394 bmsr = PHY_READ(sc, BRGPHY_MII_BMSR);
395 if (PHY_READ(sc, BRGPHY_MII_AUXSTS) & BRGPHY_AUXSTS_LINK)
396 mii->mii_media_status |= IFM_ACTIVE;
398 bmcr = PHY_READ(sc, BRGPHY_MII_BMCR);
400 if (bmcr & BRGPHY_BMCR_LOOP)
401 mii->mii_media_active |= IFM_LOOP;
403 if (bmcr & BRGPHY_BMCR_AUTOEN) {
404 if ((bmsr & BRGPHY_BMSR_ACOMP) == 0) {
405 /* Erg, still trying, I guess... */
406 mii->mii_media_active |= IFM_NONE;
410 switch (PHY_READ(sc, BRGPHY_MII_AUXSTS) &
411 BRGPHY_AUXSTS_AN_RES) {
412 case BRGPHY_RES_1000FD:
413 mii->mii_media_active |= IFM_1000_TX | IFM_FDX;
415 case BRGPHY_RES_1000HD:
416 mii->mii_media_active |= IFM_1000_TX | IFM_HDX;
418 case BRGPHY_RES_100FD:
419 mii->mii_media_active |= IFM_100_TX | IFM_FDX;
421 case BRGPHY_RES_100T4:
422 mii->mii_media_active |= IFM_100_T4;
424 case BRGPHY_RES_100HD:
425 mii->mii_media_active |= IFM_100_TX | IFM_HDX;
427 case BRGPHY_RES_10FD:
428 mii->mii_media_active |= IFM_10_T | IFM_FDX;
430 case BRGPHY_RES_10HD:
431 mii->mii_media_active |= IFM_10_T | IFM_HDX;
434 mii->mii_media_active |= IFM_NONE;
440 mii->mii_media_active = ife->ifm_media;
447 brgphy_mii_phy_auto(mii)
448 struct mii_softc *mii;
454 ktcr = BRGPHY_1000CTL_AFD|BRGPHY_1000CTL_AHD;
455 if (brgphy_mii_model == MII_MODEL_xxBROADCOM_BCM5701)
456 ktcr |= BRGPHY_1000CTL_MSE|BRGPHY_1000CTL_MSC;
457 PHY_WRITE(mii, BRGPHY_MII_1000CTL, ktcr);
458 ktcr = PHY_READ(mii, BRGPHY_MII_1000CTL);
460 PHY_WRITE(mii, BRGPHY_MII_ANAR,
461 BMSR_MEDIA_TO_ANAR(mii->mii_capabilities) | ANAR_CSMA);
463 PHY_WRITE(mii, BRGPHY_MII_BMCR,
464 BRGPHY_BMCR_AUTOEN | BRGPHY_BMCR_STARTNEG);
465 PHY_WRITE(mii, BRGPHY_MII_IMR, 0xFF00);
466 return (EJUSTRETURN);
470 brgphy_loop(struct mii_softc *sc)
475 PHY_WRITE(sc, BRGPHY_MII_BMCR, BRGPHY_BMCR_LOOP);
476 for (i = 0; i < 15000; i++) {
477 bmsr = PHY_READ(sc, BRGPHY_MII_BMSR);
478 if (!(bmsr & BRGPHY_BMSR_LINK)) {
480 device_printf(sc->mii_dev, "looped %d\n", i);
488 /* Turn off tap power management on 5401. */
490 bcm5401_load_dspcode(struct mii_softc *sc)
492 static const struct {
496 { BRGPHY_MII_AUXCTL, 0x0c20 },
497 { BRGPHY_MII_DSP_ADDR_REG, 0x0012 },
498 { BRGPHY_MII_DSP_RW_PORT, 0x1804 },
499 { BRGPHY_MII_DSP_ADDR_REG, 0x0013 },
500 { BRGPHY_MII_DSP_RW_PORT, 0x1204 },
501 { BRGPHY_MII_DSP_ADDR_REG, 0x8006 },
502 { BRGPHY_MII_DSP_RW_PORT, 0x0132 },
503 { BRGPHY_MII_DSP_ADDR_REG, 0x8006 },
504 { BRGPHY_MII_DSP_RW_PORT, 0x0232 },
505 { BRGPHY_MII_DSP_ADDR_REG, 0x201f },
506 { BRGPHY_MII_DSP_RW_PORT, 0x0a20 },
511 for (i = 0; dspcode[i].reg != 0; i++)
512 PHY_WRITE(sc, dspcode[i].reg, dspcode[i].val);
517 bcm5411_load_dspcode(struct mii_softc *sc)
519 static const struct {
530 for (i = 0; dspcode[i].reg != 0; i++)
531 PHY_WRITE(sc, dspcode[i].reg, dspcode[i].val);
535 bcm5703_load_dspcode(struct mii_softc *sc)
537 static const struct {
541 { BRGPHY_MII_AUXCTL, 0x0c00 },
542 { BRGPHY_MII_DSP_ADDR_REG, 0x201f },
543 { BRGPHY_MII_DSP_RW_PORT, 0x2aaa },
548 for (i = 0; dspcode[i].reg != 0; i++)
549 PHY_WRITE(sc, dspcode[i].reg, dspcode[i].val);
553 bcm5704_load_dspcode(struct mii_softc *sc)
555 static const struct {
565 for (i = 0; dspcode[i].reg != 0; i++)
566 PHY_WRITE(sc, dspcode[i].reg, dspcode[i].val);
570 brgphy_reset(struct mii_softc *sc)
576 switch (brgphy_mii_model) {
577 case MII_MODEL_xxBROADCOM_BCM5401:
578 bcm5401_load_dspcode(sc);
580 case MII_MODEL_xxBROADCOM_BCM5411:
581 bcm5411_load_dspcode(sc);
583 case MII_MODEL_xxBROADCOM_BCM5703:
584 bcm5703_load_dspcode(sc);
586 case MII_MODEL_xxBROADCOM_BCM5704:
587 bcm5704_load_dspcode(sc);
591 /* Enable Ethernet@WireSpeed. */
592 PHY_WRITE(sc, BRGPHY_MII_AUXCTL, 0x7007);
593 val = PHY_READ(sc, BRGPHY_MII_AUXCTL);
594 PHY_WRITE(sc, BRGPHY_MII_AUXCTL, val | (1 << 15) || (1 << 4));