2 * Copyright (c) 1990 The Regents of the University of California.
4 * LWKT threads Copyright (c) 2003 Matthew Dillon
6 * This code is derived from software contributed to Berkeley by
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
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13 * notice, this list of conditions and the following disclaimer.
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19 * This product includes software developed by the University of
20 * California, Berkeley and its contributors.
21 * 4. Neither the name of the University nor the names of its contributors
22 * may be used to endorse or promote products derived from this software
23 * without specific prior written permission.
25 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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37 * $FreeBSD: src/sys/i386/i386/swtch.s,v 1.89.2.10 2003/01/23 03:36:24 ps Exp $
38 * $DragonFly: src/sys/platform/pc32/i386/swtch.s,v 1.23 2003/07/10 04:47:53 dillon Exp $
42 #include "opt_user_ldt.h"
44 #include <sys/rtprio.h>
46 #include <machine/asmacros.h>
47 #include <machine/ipl.h>
50 #include <machine/pmap.h>
51 #include <machine/smptests.h> /** GRAB_LOPRIO */
52 #include <machine/apic.h>
53 #include <machine/lock.h>
59 #define MPLOCKED lock ;
68 #if defined(SWTCH_OPTIM_STATS)
69 .globl swtch_optim_stats, tlb_flush_count
70 swtch_optim_stats: .long 0 /* number of _swtch_optims */
71 tlb_flush_count: .long 0
78 * cpu_heavy_switch(next_thread)
80 * Switch from the current thread to a new thread. This entry
81 * is normally called via the thread->td_switch function, and will
82 * only be called when the current thread is a heavy weight process.
84 * YYY disable interrupts once giant is removed.
86 ENTRY(cpu_heavy_switch)
87 movl PCPU(curthread),%ecx
88 movl TD_PROC(%ecx),%ecx
91 movl P_VMSPACE(%ecx), %edx
92 movl PCPU(cpuid), %eax
93 MPLOCKED btrl %eax, VM_PMAP+PM_ACTIVE(%edx)
98 movl P_THREAD(%ecx),%edx
99 movl TD_PCB(%edx),%edx
100 movl (%esp),%eax /* Hardware registers */
101 movl %eax,PCB_EIP(%edx)
102 movl %ebx,PCB_EBX(%edx)
103 movl %esp,PCB_ESP(%edx)
104 movl %ebp,PCB_EBP(%edx)
105 movl %esi,PCB_ESI(%edx)
106 movl %edi,PCB_EDI(%edx)
107 movl %gs,PCB_GS(%edx)
110 * Push the LWKT switch restore function, which resumes a heavy
111 * weight process. Note that the LWKT switcher is based on
112 * TD_SP, while the heavy weight process switcher is based on
113 * PCB_ESP. TD_SP is usually one pointer pushed relative to
116 movl P_THREAD(%ecx),%eax
117 pushl $cpu_heavy_restore
118 movl %esp,TD_SP(%eax)
121 * Save debug regs if necessary
123 movb PCB_FLAGS(%edx),%al
125 jz 1f /* no, skip over */
126 movl %dr7,%eax /* yes, do the save */
127 movl %eax,PCB_DR7(%edx)
128 andl $0x0000fc00, %eax /* disable all watchpoints */
131 movl %eax,PCB_DR6(%edx)
133 movl %eax,PCB_DR3(%edx)
135 movl %eax,PCB_DR2(%edx)
137 movl %eax,PCB_DR1(%edx)
139 movl %eax,PCB_DR0(%edx)
143 * Save the FP state if we have used the FP. Note that calling
144 * npxsave will NULL out PCPU(npxthread).
147 movl P_THREAD(%ecx),%ecx
148 cmpl %ecx,PCPU(npxthread)
150 addl $PCB_SAVEFPU,%edx /* h/w bugs make saving complicated */
152 call npxsave /* do it in a big C function */
155 /* %ecx,%edx trashed */
156 #endif /* NNPX > 0 */
159 * Switch to the next thread, which was passed as an argument
160 * to cpu_heavy_switch(). Due to the switch-restore function we pushed,
161 * the argument is at 8(%esp). Set the current thread, load the
162 * stack pointer, and 'ret' into the switch-restore function.
165 movl %eax,PCPU(curthread)
166 movl TD_SP(%eax),%esp
172 * The switch function is changed to this when a thread is going away
173 * for good. We have to ensure that the MMU state is not cached, and
174 * we don't bother saving the existing thread state before switching.
176 * At this point we are in a critical section and this cpu owns the
177 * thread's token, which serves as an interlock until the switchout is
180 ENTRY(cpu_exit_switch)
182 * Get us out of the vmspace
190 movl PCPU(curthread),%ecx
192 * Switch to the next thread.
196 movl %eax,PCPU(curthread)
197 movl TD_SP(%eax),%esp
200 * We are now the next thread, set the exited flag and wakeup
203 orl $TDF_EXITED,TD_FLAGS(%ecx)
204 #if 0 /* YYY MP lock may not be held by new target */
206 pushl %ecx /* wakeup(oldthread) */
209 popl %eax /* note: next thread expects curthread in %eax */
213 * Restore the next thread's state and resume it. Note: the
214 * restore function assumes that the next thread's address is
220 * cpu_heavy_restore() (current thread in %eax on entry)
222 * Restore the thread after an LWKT switch. This entry is normally
223 * called via the LWKT switch restore function, which was pulled
224 * off the thread stack and jumped to.
226 * This entry is only called if the thread was previously saved
227 * using cpu_heavy_switch() (the heavy weight process thread switcher).
229 * YYY theoretically we do not have to restore everything here, a lot
230 * of this junk can wait until we return to usermode. But for now
231 * we restore everything.
233 * YYY STI/CLI sequencing.
234 * YYY the PCB crap is really crap, it makes startup a bitch because
235 * we can't switch away.
237 * YYY note: spl check is done in mi_switch when it splx()'s.
240 ENTRY(cpu_heavy_restore)
241 /* interrupts are disabled */
242 movl TD_PCB(%eax),%edx
243 movl TD_PROC(%eax),%ecx
245 cmpb $SRUN,P_STAT(%ecx)
249 #if defined(SWTCH_OPTIM_STATS)
250 incl _swtch_optim_stats
253 * Tell the pmap that our cpu is using the VMSPACE now. We cannot
254 * safely test/reload %cr3 until after we have set the bit in the
255 * pmap (remember, we do not hold the MP lock in the switch code).
257 movl P_VMSPACE(%ecx), %ebx
258 movl PCPU(cpuid), %eax
259 MPLOCKED btsl %eax, VM_PMAP+PM_ACTIVE(%ebx)
262 * Restore the MMU address space. If it is the same as the last
263 * thread we don't have to invalidate the tlb (i.e. reload cr3).
264 * YYY which naturally also means that the PM_ACTIVE bit had better
265 * already have been set before we set it above, check? YYY
268 movl PCB_CR3(%edx),%ebx
271 #if defined(SWTCH_OPTIM_STATS)
272 decl _swtch_optim_stats
273 incl _tlb_flush_count
278 * Deal with the PCB extension, restore the private tss
280 movl PCB_EXT(%edx),%edi /* check for a PCB extension */
281 movl $1,%ebx /* maybe mark use of a private tss */
286 * Going back to the common_tss. We may need to update TSS_ESP0
287 * which sets the top of the supervisor stack when entering from
288 * usermode. The PCB is at the top of the stack but we need another
289 * 16 bytes to take vm86 into account.
292 movl %ebx, PCPU(common_tss) + TSS_ESP0
294 cmpl $0,PCPU(private_tss) /* don't have to reload if */
295 je 3f /* already using the common TSS */
297 subl %ebx,%ebx /* unmark use of private tss */
300 * Get the address of the common TSS descriptor for the ltr.
301 * There is no way to get the address of a segment-accessed variable
302 * so we store a self-referential pointer at the base of the per-cpu
303 * data area and add the appropriate offset.
305 movl $gd_common_tssd, %edi
309 * Move the correct TSS descriptor into the GDT slot, then reload
313 movl %ebx,PCPU(private_tss) /* mark/unmark private tss */
314 movl PCPU(tss_gdt), %ebx /* entry in GDT */
319 movl $GPROC0_SEL*8, %esi /* GSEL(entry, SEL_KPL) */
324 * Restore general registers.
326 movl PCB_EBX(%edx),%ebx
327 movl PCB_ESP(%edx),%esp
328 movl PCB_EBP(%edx),%ebp
329 movl PCB_ESI(%edx),%esi
330 movl PCB_EDI(%edx),%edi
331 movl PCB_EIP(%edx),%eax
335 * Restore the user LDT if we have one
338 cmpl $0, PCB_USERLDT(%edx)
340 movl _default_ldt,%eax
341 cmpl PCPU(currentldt),%eax
344 movl %eax,PCPU(currentldt)
352 * Restore the %gs segment register, which must be done after
353 * loading the user LDT. Since user processes can modify the
354 * register via procfs, this may result in a fault which is
355 * detected by checking the fault address against cpu_switch_load_gs
356 * in i386/i386/trap.c
358 .globl cpu_switch_load_gs
360 movl PCB_GS(%edx),%gs
363 * Restore the DEBUG register state if necessary.
365 movb PCB_FLAGS(%edx),%al
367 jz 1f /* no, skip over */
368 movl PCB_DR6(%edx),%eax /* yes, do the restore */
370 movl PCB_DR3(%edx),%eax
372 movl PCB_DR2(%edx),%eax
374 movl PCB_DR1(%edx),%eax
376 movl PCB_DR0(%edx),%eax
378 movl %dr7,%eax /* load dr7 so as not to disturb */
379 andl $0x0000fc00,%eax /* reserved bits */
381 movl PCB_DR7(%edx),%ebx
382 andl $~0x0000fc00,%ebx
391 CROSSJUMPTARGET(sw1a)
397 sw0_2: .asciz "cpu_switch: not SRUN"
401 * Update pcb, saving current processor state.
407 /* caller's return address - child won't execute this routine */
409 movl %eax,PCB_EIP(%ecx)
412 movl %eax,PCB_CR3(%ecx)
414 movl %ebx,PCB_EBX(%ecx)
415 movl %esp,PCB_ESP(%ecx)
416 movl %ebp,PCB_EBP(%ecx)
417 movl %esi,PCB_ESI(%ecx)
418 movl %edi,PCB_EDI(%ecx)
419 movl %gs,PCB_GS(%ecx)
423 * If npxthread == NULL, then the npx h/w state is irrelevant and the
424 * state had better already be in the pcb. This is true for forks
425 * but not for dumps (the old book-keeping with FP flags in the pcb
426 * always lost for dumps because the dump pcb has 0 flags).
428 * If npxthread != NULL, then we have to save the npx h/w state to
429 * npxthread's pcb and copy it to the requested pcb, or save to the
430 * requested pcb and reload. Copying is easier because we would
431 * have to handle h/w bugs for reloading. We used to lose the
432 * parent's npx state for forks by forgetting to reload.
434 movl PCPU(npxthread),%eax
439 movl TD_PCB(%eax),%eax
440 leal PCB_SAVEFPU(%eax),%eax
448 pushl $PCB_SAVEFPU_SIZE
449 leal PCB_SAVEFPU(%ecx),%ecx
454 #endif /* NNPX > 0 */
460 * cpu_idle_restore() (current thread in %eax on entry) (one-time execution)
462 * Don't bother setting up any regs other then %ebp so backtraces
463 * don't die. This restore function is used to bootstrap into the
464 * cpu_idle() LWKT only, after that cpu_lwkt_*() will be used for
467 * If we are an AP we have to call ap_init() before jumping to
468 * cpu_idle(). ap_init() will synchronize with the BP and finish
469 * setting up various ncpu-dependant globaldata fields. This may
470 * happen on UP as well as SMP if we happen to be simulating multiple
473 ENTRY(cpu_idle_restore)
488 * cpu_kthread_restore() (current thread is %eax on entry) (one-time execution)
490 * Don't bother setting up any regs other then %ebp so backtraces
491 * don't die. This restore function is used to bootstrap into an
492 * LWKT based kernel thread only. cpu_lwkt_switch() will be used
495 * Since all of our context is on the stack we are reentrant and
496 * we can release our critical section and enable interrupts early.
498 ENTRY(cpu_kthread_restore)
500 movl TD_PCB(%eax),%ebx
503 subl $TDPRI_CRIT,TD_PRI(%eax)
505 popl %edx /* kthread exit function */
506 pushl PCB_EBX(%ebx) /* argument to ESI function */
507 pushl %edx /* set exit func as return address */
508 movl PCB_ESI(%ebx),%eax
514 * Standard LWKT switching function. Only non-scratch registers are
515 * saved and we don't bother with the MMU state or anything else.
517 * This function is always called while in a critical section.
521 ENTRY(cpu_lwkt_switch)
528 movl PCPU(curthread),%ecx
529 pushl $cpu_lwkt_restore
531 movl %esp,TD_SP(%ecx)
532 movl %eax,PCPU(curthread)
533 movl TD_SP(%eax),%esp
537 * cpu_lwkt_restore() (current thread in %eax on entry)
539 * Standard LWKT restore function. This function is always called
540 * while in a critical section.
542 * Warning: due to preemption the restore function can be used to
543 * 'return' to the original thread. Interrupt disablement must be
544 * protected through the switch so we cannot run splz here.
546 * YYY we theoretically do not need to load IdlePTD into cr3, but if
547 * so we need a way to detect when the PTD we are using is being
548 * deleted due to a process exiting.
550 ENTRY(cpu_lwkt_restore)
551 movl IdlePTD,%ecx /* YYY borrow but beware desched/cpuchg/exit */