sys/dev/drm/i915/intel_sdvo.c

   1 /*
   2  * Copyright 2006 Dave Airlie <airlied@linux.ie>
   3  * Copyright © 2006-2007 Intel Corporation
   4  *   Jesse Barnes <jesse.barnes@intel.com>
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the "Software"),
   8  * to deal in the Software without restriction, including without limitation
   9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10  * and/or sell copies of the Software, and to permit persons to whom the
  11  * Software is furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice (including the next
  14  * paragraph) shall be included in all copies or substantial portions of the
  15  * Software.
  16  *
  17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  19  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  20  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  21  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  22  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  23  * DEALINGS IN THE SOFTWARE.
  24  *
  25  * Authors:
  26  *      Eric Anholt <eric@anholt.net>
  27  */
  28 #include <linux/i2c.h>
  29 #include <linux/delay.h>
  30 #include <linux/export.h>
  31 #include <drm/drmP.h>
  32 #include <drm/drm_crtc.h>
  33 #include <drm/drm_edid.h>
  34 #include "intel_drv.h"
  35 #include <drm/i915_drm.h>
  36 #include "i915_drv.h"
  37 #include "intel_sdvo_regs.h"
  38
  39 #include <bus/iicbus/iic.h>
  40 #include <bus/iicbus/iiconf.h>
  41 #include "iicbus_if.h"
  42
  43 #define SDVO_TMDS_MASK (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1)
  44 #define SDVO_RGB_MASK  (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1)
  45 #define SDVO_LVDS_MASK (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1)
  46 #define SDVO_TV_MASK   (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_SVID0 | SDVO_OUTPUT_YPRPB0)
  47
  48 #define SDVO_OUTPUT_MASK (SDVO_TMDS_MASK | SDVO_RGB_MASK | SDVO_LVDS_MASK |\
  49                         SDVO_TV_MASK)
  50
  51 #define IS_TV(c)        (c->output_flag & SDVO_TV_MASK)
  52 #define IS_TMDS(c)      (c->output_flag & SDVO_TMDS_MASK)
  53 #define IS_LVDS(c)      (c->output_flag & SDVO_LVDS_MASK)
  54 #define IS_TV_OR_LVDS(c) (c->output_flag & (SDVO_TV_MASK | SDVO_LVDS_MASK))
  55 #define IS_DIGITAL(c) (c->output_flag & (SDVO_TMDS_MASK | SDVO_LVDS_MASK))
  56
  57
  58 static const char *tv_format_names[] = {
  59         "NTSC_M"   , "NTSC_J"  , "NTSC_443",
  60         "PAL_B"    , "PAL_D"   , "PAL_G"   ,
  61         "PAL_H"    , "PAL_I"   , "PAL_M"   ,
  62         "PAL_N"    , "PAL_NC"  , "PAL_60"  ,
  63         "SECAM_B"  , "SECAM_D" , "SECAM_G" ,
  64         "SECAM_K"  , "SECAM_K1", "SECAM_L" ,
  65         "SECAM_60"
  66 };
  67
  68 #define TV_FORMAT_NUM  (sizeof(tv_format_names) / sizeof(*tv_format_names))
  69
  70 struct intel_sdvo {
  71         struct intel_encoder base;
  72
  73         struct device *i2c;
  74         u8 slave_addr;
  75
  76         device_t ddc_iic_bus, ddc;
  77
  78         /* Register for the SDVO device: SDVOB or SDVOC */
  79         uint32_t sdvo_reg;
  80
  81         /* Active outputs controlled by this SDVO output */
  82         uint16_t controlled_output;
  83
  84         /*
  85          * Capabilities of the SDVO device returned by
  86          * intel_sdvo_get_capabilities()
  87          */
  88         struct intel_sdvo_caps caps;
  89
  90         /* Pixel clock limitations reported by the SDVO device, in kHz */
  91         int pixel_clock_min, pixel_clock_max;
  92
  93         /*
  94         * For multiple function SDVO device,
  95         * this is for current attached outputs.
  96         */
  97         uint16_t attached_output;
  98
  99         /*
 100          * Hotplug activation bits for this device
 101          */
 102         uint16_t hotplug_active;
 103
 104         /**
 105          * This is used to select the color range of RBG outputs in HDMI mode.
 106          * It is only valid when using TMDS encoding and 8 bit per color mode.
 107          */
 108         uint32_t color_range;
 109         bool color_range_auto;
 110
 111         /**
 112          * This is set if we're going to treat the device as TV-out.
 113          *
 114          * While we have these nice friendly flags for output types that ought
 115          * to decide this for us, the S-Video output on our HDMI+S-Video card
 116          * shows up as RGB1 (VGA).
 117          */
 118         bool is_tv;
 119
 120         /* On different gens SDVOB is at different places. */
 121         bool is_sdvob;
 122
 123         /* This is for current tv format name */
 124         int tv_format_index;
 125
 126         /**
 127          * This is set if we treat the device as HDMI, instead of DVI.
 128          */
 129         bool is_hdmi;
 130         bool has_hdmi_monitor;
 131         bool has_hdmi_audio;
 132         bool rgb_quant_range_selectable;
 133
 134         /**
 135          * This is set if we detect output of sdvo device as LVDS and
 136          * have a valid fixed mode to use with the panel.
 137          */
 138         bool is_lvds;
 139
 140         /**
 141          * This is sdvo fixed pannel mode pointer
 142          */
 143         struct drm_display_mode *sdvo_lvds_fixed_mode;
 144
 145         /* DDC bus used by this SDVO encoder */
 146         uint8_t ddc_bus;
 147
 148         /*
 149          * the sdvo flag gets lost in round trip: dtd->adjusted_mode->dtd
 150          */
 151         uint8_t dtd_sdvo_flags;
 152 };
 153
 154 struct intel_sdvo_connector {
 155         struct intel_connector base;
 156
 157         /* Mark the type of connector */
 158         uint16_t output_flag;
 159
 160         enum hdmi_force_audio force_audio;
 161
 162         /* This contains all current supported TV format */
 163         u8 tv_format_supported[TV_FORMAT_NUM];
 164         int   format_supported_num;
 165         struct drm_property *tv_format;
 166
 167         /* add the property for the SDVO-TV */
 168         struct drm_property *left;
 169         struct drm_property *right;
 170         struct drm_property *top;
 171         struct drm_property *bottom;
 172         struct drm_property *hpos;
 173         struct drm_property *vpos;
 174         struct drm_property *contrast;
 175         struct drm_property *saturation;
 176         struct drm_property *hue;
 177         struct drm_property *sharpness;
 178         struct drm_property *flicker_filter;
 179         struct drm_property *flicker_filter_adaptive;
 180         struct drm_property *flicker_filter_2d;
 181         struct drm_property *tv_chroma_filter;
 182         struct drm_property *tv_luma_filter;
 183         struct drm_property *dot_crawl;
 184
 185         /* add the property for the SDVO-TV/LVDS */
 186         struct drm_property *brightness;
 187
 188         /* Add variable to record current setting for the above property */
 189         u32     left_margin, right_margin, top_margin, bottom_margin;
 190
 191         /* this is to get the range of margin.*/
 192         u32     max_hscan,  max_vscan;
 193         u32     max_hpos, cur_hpos;
 194         u32     max_vpos, cur_vpos;
 195         u32     cur_brightness, max_brightness;
 196         u32     cur_contrast,   max_contrast;
 197         u32     cur_saturation, max_saturation;
 198         u32     cur_hue,        max_hue;
 199         u32     cur_sharpness,  max_sharpness;
 200         u32     cur_flicker_filter,             max_flicker_filter;
 201         u32     cur_flicker_filter_adaptive,    max_flicker_filter_adaptive;
 202         u32     cur_flicker_filter_2d,          max_flicker_filter_2d;
 203         u32     cur_tv_chroma_filter,   max_tv_chroma_filter;
 204         u32     cur_tv_luma_filter,     max_tv_luma_filter;
 205         u32     cur_dot_crawl,  max_dot_crawl;
 206 };
 207
 208 static struct intel_sdvo *to_sdvo(struct intel_encoder *encoder)
 209 {
 210         return container_of(encoder, struct intel_sdvo, base);
 211 }
 212
 213 static struct intel_sdvo *intel_attached_sdvo(struct drm_connector *connector)
 214 {
 215         return to_sdvo(intel_attached_encoder(connector));
 216 }
 217
 218 static struct intel_sdvo_connector *to_intel_sdvo_connector(struct drm_connector *connector)
 219 {
 220         return container_of(to_intel_connector(connector), struct intel_sdvo_connector, base);
 221 }
 222
 223 static bool
 224 intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags);
 225 static bool
 226 intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
 227                               struct intel_sdvo_connector *intel_sdvo_connector,
 228                               int type);
 229 static bool
 230 intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
 231                                    struct intel_sdvo_connector *intel_sdvo_connector);
 232
 233 /**
 234  * Writes the SDVOB or SDVOC with the given value, but always writes both
 235  * SDVOB and SDVOC to work around apparent hardware issues (according to
 236  * comments in the BIOS).
 237  */
 238 static void intel_sdvo_write_sdvox(struct intel_sdvo *intel_sdvo, u32 val)
 239 {
 240         struct drm_device *dev = intel_sdvo->base.base.dev;
 241         struct drm_i915_private *dev_priv = dev->dev_private;
 242         u32 bval = val, cval = val;
 243         int i;
 244
 245         if (intel_sdvo->sdvo_reg == PCH_SDVOB) {
 246                 I915_WRITE(intel_sdvo->sdvo_reg, val);
 247                 I915_READ(intel_sdvo->sdvo_reg);
 248                 return;
 249         }
 250
 251         if (intel_sdvo->sdvo_reg == GEN3_SDVOB)
 252                 cval = I915_READ(GEN3_SDVOC);
 253         else
 254                 bval = I915_READ(GEN3_SDVOB);
 255
 256         /*
 257          * Write the registers twice for luck. Sometimes,
 258          * writing them only once doesn't appear to 'stick'.
 259          * The BIOS does this too. Yay, magic
 260          */
 261         for (i = 0; i < 2; i++)
 262         {
 263                 I915_WRITE(GEN3_SDVOB, bval);
 264                 I915_READ(GEN3_SDVOB);
 265                 I915_WRITE(GEN3_SDVOC, cval);
 266                 I915_READ(GEN3_SDVOC);
 267         }
 268 }
 269
 270 static bool intel_sdvo_read_byte(struct intel_sdvo *intel_sdvo, u8 addr, u8 *ch)
 271 {
 272         struct i2c_msg msgs[] = {
 273                 {
 274                         .slave = intel_sdvo->slave_addr << 1,
 275                         .flags = 0,
 276                         .len = 1,
 277                         .buf = &addr,
 278                 },
 279                 {
 280                         .slave = intel_sdvo->slave_addr << 1,
 281                         .flags = I2C_M_RD,
 282                         .len = 1,
 283                         .buf = ch,
 284                 }
 285         };
 286         int ret;
 287
 288         if ((ret = iicbus_transfer(intel_sdvo->i2c, msgs, 2)) == 0)
 289                 return true;
 290
 291         DRM_DEBUG_KMS("i2c transfer returned %d\n", ret);
 292         return false;
 293 }
 294
 295 #define SDVO_CMD_NAME_ENTRY(cmd) {cmd, #cmd}
 296 /** Mapping of command numbers to names, for debug output */
 297 static const struct _sdvo_cmd_name {
 298         u8 cmd;
 299         const char *name;
 300 } sdvo_cmd_names[] = {
 301         SDVO_CMD_NAME_ENTRY(SDVO_CMD_RESET),
 302         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DEVICE_CAPS),
 303         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FIRMWARE_REV),
 304         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TRAINED_INPUTS),
 305         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_OUTPUTS),
 306         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_OUTPUTS),
 307         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_IN_OUT_MAP),
 308         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_IN_OUT_MAP),
 309         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ATTACHED_DISPLAYS),
 310         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HOT_PLUG_SUPPORT),
 311         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_HOT_PLUG),
 312         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_HOT_PLUG),
 313         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INTERRUPT_EVENT_SOURCE),
 314         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_INPUT),
 315         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_OUTPUT),
 316         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART1),
 317         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART2),
 318         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
 319         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART2),
 320         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
 321         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART1),
 322         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART2),
 323         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART1),
 324         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART2),
 325         SDVO_CMD_NAME_ENTRY(SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING),
 326         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1),
 327         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2),
 328         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE),
 329         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_PIXEL_CLOCK_RANGE),
 330         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_CLOCK_RATE_MULTS),
 331         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CLOCK_RATE_MULT),
 332         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CLOCK_RATE_MULT),
 333         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_TV_FORMATS),
 334         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_FORMAT),
 335         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_FORMAT),
 336         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_POWER_STATES),
 337         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_POWER_STATE),
 338         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODER_POWER_STATE),
 339         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DISPLAY_POWER_STATE),
 340         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTROL_BUS_SWITCH),
 341         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT),
 342         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SCALED_HDTV_RESOLUTION_SUPPORT),
 343         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS),
 344
 345         /* Add the op code for SDVO enhancements */
 346         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HPOS),
 347         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HPOS),
 348         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HPOS),
 349         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_VPOS),
 350         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_VPOS),
 351         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_VPOS),
 352         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SATURATION),
 353         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SATURATION),
 354         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SATURATION),
 355         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HUE),
 356         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HUE),
 357         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HUE),
 358         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_CONTRAST),
 359         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CONTRAST),
 360         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTRAST),
 361         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_BRIGHTNESS),
 362         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_BRIGHTNESS),
 363         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_BRIGHTNESS),
 364         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_H),
 365         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_H),
 366         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_H),
 367         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_V),
 368         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_V),
 369         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_V),
 370         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER),
 371         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER),
 372         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER),
 373         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_ADAPTIVE),
 374         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_ADAPTIVE),
 375         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_ADAPTIVE),
 376         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_2D),
 377         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_2D),
 378         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_2D),
 379         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SHARPNESS),
 380         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SHARPNESS),
 381         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SHARPNESS),
 382         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DOT_CRAWL),
 383         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DOT_CRAWL),
 384         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_CHROMA_FILTER),
 385         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_CHROMA_FILTER),
 386         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_CHROMA_FILTER),
 387         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_LUMA_FILTER),
 388         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_LUMA_FILTER),
 389         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_LUMA_FILTER),
 390
 391         /* HDMI op code */
 392         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPP_ENCODE),
 393         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ENCODE),
 394         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODE),
 395         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_PIXEL_REPLI),
 396         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PIXEL_REPLI),
 397         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY_CAP),
 398         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_COLORIMETRY),
 399         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY),
 400         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_ENCRYPT_PREFER),
 401         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_AUDIO_STAT),
 402         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_STAT),
 403         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INDEX),
 404         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_INDEX),
 405         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INFO),
 406         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_AV_SPLIT),
 407         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_AV_SPLIT),
 408         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_TXRATE),
 409         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_TXRATE),
 410         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_DATA),
 411         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_DATA),
 412 };
 413
 414 #define SDVO_NAME(svdo) ((svdo)->is_sdvob ? "SDVOB" : "SDVOC")
 415
 416 static void intel_sdvo_debug_write(struct intel_sdvo *intel_sdvo, u8 cmd,
 417                                    const void *args, int args_len)
 418 {
 419         int i, pos = 0;
 420 #define BUF_LEN 256
 421         char buffer[BUF_LEN];
 422
 423 #define BUF_PRINT(args...) \
 424         pos += ksnprintf(buffer + pos, max_t(int, BUF_LEN - pos, 0), args)
 425
 426
 427         for (i = 0; i < args_len; i++) {
 428                 BUF_PRINT("%02X ", ((const u8 *)args)[i]);
 429         }
 430         for (; i < 8; i++) {
 431                 BUF_PRINT("   ");
 432         }
 433         for (i = 0; i < ARRAY_SIZE(sdvo_cmd_names); i++) {
 434                 if (cmd == sdvo_cmd_names[i].cmd) {
 435                         BUF_PRINT("(%s)", sdvo_cmd_names[i].name);
 436                         break;
 437                 }
 438         }
 439         if (i == ARRAY_SIZE(sdvo_cmd_names)) {
 440                 BUF_PRINT("(%02X)", cmd);
 441         }
 442         BUG_ON(pos >= BUF_LEN - 1);
 443 #undef BUF_PRINT
 444 #undef BUF_LEN
 445
 446         DRM_DEBUG_KMS("%s: W: %02X %s\n", SDVO_NAME(intel_sdvo), cmd, buffer);
 447 }
 448
 449 static const char *cmd_status_names[] = {
 450         "Power on",
 451         "Success",
 452         "Not supported",
 453         "Invalid arg",
 454         "Pending",
 455         "Target not specified",
 456         "Scaling not supported"
 457 };
 458
 459 static bool intel_sdvo_write_cmd(struct intel_sdvo *intel_sdvo, u8 cmd,
 460                                  const void *args, int args_len)
 461 {
 462         u8 *buf, status;
 463         struct i2c_msg *msgs;
 464         int i, ret = true;
 465
 466         /* Would be simpler to allocate both in one go ? */
 467         buf = kzalloc(args_len * 2 + 2, GFP_KERNEL);
 468         if (!buf)
 469                 return false;
 470
 471         msgs = kcalloc(args_len + 3, sizeof(*msgs), GFP_KERNEL);
 472         if (!msgs) {
 473                 kfree(buf);
 474                 return false;
 475         }
 476
 477         intel_sdvo_debug_write(intel_sdvo, cmd, args, args_len);
 478
 479         for (i = 0; i < args_len; i++) {
 480                 msgs[i].slave = intel_sdvo->slave_addr << 1;
 481                 msgs[i].flags = 0;
 482                 msgs[i].len = 2;
 483                 msgs[i].buf = buf + 2 *i;
 484                 buf[2*i + 0] = SDVO_I2C_ARG_0 - i;
 485                 buf[2*i + 1] = ((const u8*)args)[i];
 486         }
 487         msgs[i].slave = intel_sdvo->slave_addr << 1;
 488         msgs[i].flags = 0;
 489         msgs[i].len = 2;
 490         msgs[i].buf = buf + 2*i;
 491         buf[2*i + 0] = SDVO_I2C_OPCODE;
 492         buf[2*i + 1] = cmd;
 493
 494         /* the following two are to read the response */
 495         status = SDVO_I2C_CMD_STATUS;
 496         msgs[i+1].slave = intel_sdvo->slave_addr << 1;
 497         msgs[i+1].flags = 0;
 498         msgs[i+1].len = 1;
 499         msgs[i+1].buf = &status;
 500
 501         msgs[i+2].slave = intel_sdvo->slave_addr << 1;
 502         msgs[i+2].flags = I2C_M_RD;
 503         msgs[i+2].len = 1;
 504         msgs[i+2].buf = &status;
 505
 506         ret = iicbus_transfer(intel_sdvo->i2c, msgs, i+3);
 507         if (ret != 0) {
 508                 DRM_DEBUG_KMS("I2c transfer returned %d\n", ret);
 509                 ret = false;
 510                 goto out;
 511         }
 512 #if 0
 513         if (ret != i+3) {
 514                 /* failure in I2C transfer */
 515                 DRM_DEBUG_KMS("I2c transfer returned %d/%d\n", ret, i+3);
 516                 ret = false;
 517         }
 518 #endif
 519
 520 out:
 521         kfree(msgs);
 522         kfree(buf);
 523         return ret;
 524 }
 525
 526 static bool intel_sdvo_read_response(struct intel_sdvo *intel_sdvo,
 527                                      void *response, int response_len)
 528 {
 529         u8 retry = 15; /* 5 quick checks, followed by 10 long checks */
 530         u8 status;
 531         int i, pos = 0;
 532 #define BUF_LEN 256
 533         char buffer[BUF_LEN];
 534
 535
 536         /*
 537          * The documentation states that all commands will be
 538          * processed within 15µs, and that we need only poll
 539          * the status byte a maximum of 3 times in order for the
 540          * command to be complete.
 541          *
 542          * Check 5 times in case the hardware failed to read the docs.
 543          *
 544          * Also beware that the first response by many devices is to
 545          * reply PENDING and stall for time. TVs are notorious for
 546          * requiring longer than specified to complete their replies.
 547          * Originally (in the DDX long ago), the delay was only ever 15ms
 548          * with an additional delay of 30ms applied for TVs added later after
 549          * many experiments. To accommodate both sets of delays, we do a
 550          * sequence of slow checks if the device is falling behind and fails
 551          * to reply within 5*15µs.
 552          */
 553         if (!intel_sdvo_read_byte(intel_sdvo,
 554                                   SDVO_I2C_CMD_STATUS,
 555                                   &status))
 556                 goto log_fail;
 557
 558         while ((status == SDVO_CMD_STATUS_PENDING ||
 559                 status == SDVO_CMD_STATUS_TARGET_NOT_SPECIFIED) && --retry) {
 560                 if (retry < 10)
 561                         msleep(15);
 562                 else
 563                         udelay(15);
 564
 565                 if (!intel_sdvo_read_byte(intel_sdvo,
 566                                           SDVO_I2C_CMD_STATUS,
 567                                           &status))
 568                         goto log_fail;
 569         }
 570
 571 #define BUF_PRINT(args...) \
 572         pos += ksnprintf(buffer + pos, max_t(int, BUF_LEN - pos, 0), args)
 573
 574         if (status <= SDVO_CMD_STATUS_SCALING_NOT_SUPP)
 575                 BUF_PRINT("(%s)", cmd_status_names[status]);
 576         else
 577                 BUF_PRINT("(??? %d)", status);
 578
 579         if (status != SDVO_CMD_STATUS_SUCCESS)
 580                 goto log_fail;
 581
 582         /* Read the command response */
 583         for (i = 0; i < response_len; i++) {
 584                 if (!intel_sdvo_read_byte(intel_sdvo,
 585                                           SDVO_I2C_RETURN_0 + i,
 586                                           &((u8 *)response)[i]))
 587                         goto log_fail;
 588                 BUF_PRINT(" %02X", ((u8 *)response)[i]);
 589         }
 590         BUG_ON(pos >= BUF_LEN - 1);
 591 #undef BUF_PRINT
 592 #undef BUF_LEN
 593
 594         DRM_DEBUG_KMS("%s: R: %s\n", SDVO_NAME(intel_sdvo), buffer);
 595         return true;
 596
 597 log_fail:
 598         DRM_DEBUG_KMS("%s: R: ... failed\n", SDVO_NAME(intel_sdvo));
 599         return false;
 600 }
 601
 602 static int intel_sdvo_get_pixel_multiplier(struct drm_display_mode *mode)
 603 {
 604         if (mode->clock >= 100000)
 605                 return 1;
 606         else if (mode->clock >= 50000)
 607                 return 2;
 608         else
 609                 return 4;
 610 }
 611
 612 static bool intel_sdvo_set_control_bus_switch(struct intel_sdvo *intel_sdvo,
 613                                               u8 ddc_bus)
 614 {
 615         /* This must be the immediately preceding write before the i2c xfer */
 616         return intel_sdvo_write_cmd(intel_sdvo,
 617                                     SDVO_CMD_SET_CONTROL_BUS_SWITCH,
 618                                     &ddc_bus, 1);
 619 }
 620
 621 static bool intel_sdvo_set_value(struct intel_sdvo *intel_sdvo, u8 cmd, const void *data, int len)
 622 {
 623         if (!intel_sdvo_write_cmd(intel_sdvo, cmd, data, len))
 624                 return false;
 625
 626         return intel_sdvo_read_response(intel_sdvo, NULL, 0);
 627 }
 628
 629 static bool
 630 intel_sdvo_get_value(struct intel_sdvo *intel_sdvo, u8 cmd, void *value, int len)
 631 {
 632         if (!intel_sdvo_write_cmd(intel_sdvo, cmd, NULL, 0))
 633                 return false;
 634
 635         return intel_sdvo_read_response(intel_sdvo, value, len);
 636 }
 637
 638 static bool intel_sdvo_set_target_input(struct intel_sdvo *intel_sdvo)
 639 {
 640         struct intel_sdvo_set_target_input_args targets = {0};
 641         return intel_sdvo_set_value(intel_sdvo,
 642                                     SDVO_CMD_SET_TARGET_INPUT,
 643                                     &targets, sizeof(targets));
 644 }
 645
 646 /**
 647  * Return whether each input is trained.
 648  *
 649  * This function is making an assumption about the layout of the response,
 650  * which should be checked against the docs.
 651  */
 652 static bool intel_sdvo_get_trained_inputs(struct intel_sdvo *intel_sdvo, bool *input_1, bool *input_2)
 653 {
 654         struct intel_sdvo_get_trained_inputs_response response;
 655
 656         BUILD_BUG_ON(sizeof(response) != 1);
 657         if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_TRAINED_INPUTS,
 658                                   &response, sizeof(response)))
 659                 return false;
 660
 661         *input_1 = response.input0_trained;
 662         *input_2 = response.input1_trained;
 663         return true;
 664 }
 665
 666 static bool intel_sdvo_set_active_outputs(struct intel_sdvo *intel_sdvo,
 667                                           u16 outputs)
 668 {
 669         return intel_sdvo_set_value(intel_sdvo,
 670                                     SDVO_CMD_SET_ACTIVE_OUTPUTS,
 671                                     &outputs, sizeof(outputs));
 672 }
 673
 674 static bool intel_sdvo_get_active_outputs(struct intel_sdvo *intel_sdvo,
 675                                           u16 *outputs)
 676 {
 677         return intel_sdvo_get_value(intel_sdvo,
 678                                     SDVO_CMD_GET_ACTIVE_OUTPUTS,
 679                                     outputs, sizeof(*outputs));
 680 }
 681
 682 static bool intel_sdvo_set_encoder_power_state(struct intel_sdvo *intel_sdvo,
 683                                                int mode)
 684 {
 685         u8 state = SDVO_ENCODER_STATE_ON;
 686
 687         switch (mode) {
 688         case DRM_MODE_DPMS_ON:
 689                 state = SDVO_ENCODER_STATE_ON;
 690                 break;
 691         case DRM_MODE_DPMS_STANDBY:
 692                 state = SDVO_ENCODER_STATE_STANDBY;
 693                 break;
 694         case DRM_MODE_DPMS_SUSPEND:
 695                 state = SDVO_ENCODER_STATE_SUSPEND;
 696                 break;
 697         case DRM_MODE_DPMS_OFF:
 698                 state = SDVO_ENCODER_STATE_OFF;
 699                 break;
 700         }
 701
 702         return intel_sdvo_set_value(intel_sdvo,
 703                                     SDVO_CMD_SET_ENCODER_POWER_STATE, &state, sizeof(state));
 704 }
 705
 706 static bool intel_sdvo_get_input_pixel_clock_range(struct intel_sdvo *intel_sdvo,
 707                                                    int *clock_min,
 708                                                    int *clock_max)
 709 {
 710         struct intel_sdvo_pixel_clock_range clocks;
 711
 712         BUILD_BUG_ON(sizeof(clocks) != 4);
 713         if (!intel_sdvo_get_value(intel_sdvo,
 714                                   SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE,
 715                                   &clocks, sizeof(clocks)))
 716                 return false;
 717
 718         /* Convert the values from units of 10 kHz to kHz. */
 719         *clock_min = clocks.min * 10;
 720         *clock_max = clocks.max * 10;
 721         return true;
 722 }
 723
 724 static bool intel_sdvo_set_target_output(struct intel_sdvo *intel_sdvo,
 725                                          u16 outputs)
 726 {
 727         return intel_sdvo_set_value(intel_sdvo,
 728                                     SDVO_CMD_SET_TARGET_OUTPUT,
 729                                     &outputs, sizeof(outputs));
 730 }
 731
 732 static bool intel_sdvo_set_timing(struct intel_sdvo *intel_sdvo, u8 cmd,
 733                                   struct intel_sdvo_dtd *dtd)
 734 {
 735         return intel_sdvo_set_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) &&
 736                 intel_sdvo_set_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2));
 737 }
 738
 739 static bool intel_sdvo_get_timing(struct intel_sdvo *intel_sdvo, u8 cmd,
 740                                   struct intel_sdvo_dtd *dtd)
 741 {
 742         return intel_sdvo_get_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) &&
 743                 intel_sdvo_get_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2));
 744 }
 745
 746 static bool intel_sdvo_set_input_timing(struct intel_sdvo *intel_sdvo,
 747                                          struct intel_sdvo_dtd *dtd)
 748 {
 749         return intel_sdvo_set_timing(intel_sdvo,
 750                                      SDVO_CMD_SET_INPUT_TIMINGS_PART1, dtd);
 751 }
 752
 753 static bool intel_sdvo_set_output_timing(struct intel_sdvo *intel_sdvo,
 754                                          struct intel_sdvo_dtd *dtd)
 755 {
 756         return intel_sdvo_set_timing(intel_sdvo,
 757                                      SDVO_CMD_SET_OUTPUT_TIMINGS_PART1, dtd);
 758 }
 759
 760 static bool intel_sdvo_get_input_timing(struct intel_sdvo *intel_sdvo,
 761                                         struct intel_sdvo_dtd *dtd)
 762 {
 763         return intel_sdvo_get_timing(intel_sdvo,
 764                                      SDVO_CMD_GET_INPUT_TIMINGS_PART1, dtd);
 765 }
 766
 767 static bool
 768 intel_sdvo_create_preferred_input_timing(struct intel_sdvo *intel_sdvo,
 769                                          uint16_t clock,
 770                                          uint16_t width,
 771                                          uint16_t height)
 772 {
 773         struct intel_sdvo_preferred_input_timing_args args;
 774
 775         memset(&args, 0, sizeof(args));
 776         args.clock = clock;
 777         args.width = width;
 778         args.height = height;
 779         args.interlace = 0;
 780
 781         if (intel_sdvo->is_lvds &&
 782            (intel_sdvo->sdvo_lvds_fixed_mode->hdisplay != width ||
 783             intel_sdvo->sdvo_lvds_fixed_mode->vdisplay != height))
 784                 args.scaled = 1;
 785
 786         return intel_sdvo_set_value(intel_sdvo,
 787                                     SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING,
 788                                     &args, sizeof(args));
 789 }
 790
 791 static bool intel_sdvo_get_preferred_input_timing(struct intel_sdvo *intel_sdvo,
 792                                                   struct intel_sdvo_dtd *dtd)
 793 {
 794         BUILD_BUG_ON(sizeof(dtd->part1) != 8);
 795         BUILD_BUG_ON(sizeof(dtd->part2) != 8);
 796         return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1,
 797                                     &dtd->part1, sizeof(dtd->part1)) &&
 798                 intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2,
 799                                      &dtd->part2, sizeof(dtd->part2));
 800 }
 801
 802 static bool intel_sdvo_set_clock_rate_mult(struct intel_sdvo *intel_sdvo, u8 val)
 803 {
 804         return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_CLOCK_RATE_MULT, &val, 1);
 805 }
 806
 807 static void intel_sdvo_get_dtd_from_mode(struct intel_sdvo_dtd *dtd,
 808                                          const struct drm_display_mode *mode)
 809 {
 810         uint16_t width, height;
 811         uint16_t h_blank_len, h_sync_len, v_blank_len, v_sync_len;
 812         uint16_t h_sync_offset, v_sync_offset;
 813         int mode_clock;
 814
 815         memset(dtd, 0, sizeof(*dtd));
 816
 817         width = mode->hdisplay;
 818         height = mode->vdisplay;
 819
 820         /* do some mode translations */
 821         h_blank_len = mode->htotal - mode->hdisplay;
 822         h_sync_len = mode->hsync_end - mode->hsync_start;
 823
 824         v_blank_len = mode->vtotal - mode->vdisplay;
 825         v_sync_len = mode->vsync_end - mode->vsync_start;
 826
 827         h_sync_offset = mode->hsync_start - mode->hdisplay;
 828         v_sync_offset = mode->vsync_start - mode->vdisplay;
 829
 830         mode_clock = mode->clock;
 831         mode_clock /= 10;
 832         dtd->part1.clock = mode_clock;
 833
 834         dtd->part1.h_active = width & 0xff;
 835         dtd->part1.h_blank = h_blank_len & 0xff;
 836         dtd->part1.h_high = (((width >> 8) & 0xf) << 4) |
 837                 ((h_blank_len >> 8) & 0xf);
 838         dtd->part1.v_active = height & 0xff;
 839         dtd->part1.v_blank = v_blank_len & 0xff;
 840         dtd->part1.v_high = (((height >> 8) & 0xf) << 4) |
 841                 ((v_blank_len >> 8) & 0xf);
 842
 843         dtd->part2.h_sync_off = h_sync_offset & 0xff;
 844         dtd->part2.h_sync_width = h_sync_len & 0xff;
 845         dtd->part2.v_sync_off_width = (v_sync_offset & 0xf) << 4 |
 846                 (v_sync_len & 0xf);
 847         dtd->part2.sync_off_width_high = ((h_sync_offset & 0x300) >> 2) |
 848                 ((h_sync_len & 0x300) >> 4) | ((v_sync_offset & 0x30) >> 2) |
 849                 ((v_sync_len & 0x30) >> 4);
 850
 851         dtd->part2.dtd_flags = 0x18;
 852         if (mode->flags & DRM_MODE_FLAG_INTERLACE)
 853                 dtd->part2.dtd_flags |= DTD_FLAG_INTERLACE;
 854         if (mode->flags & DRM_MODE_FLAG_PHSYNC)
 855                 dtd->part2.dtd_flags |= DTD_FLAG_HSYNC_POSITIVE;
 856         if (mode->flags & DRM_MODE_FLAG_PVSYNC)
 857                 dtd->part2.dtd_flags |= DTD_FLAG_VSYNC_POSITIVE;
 858
 859         dtd->part2.v_sync_off_high = v_sync_offset & 0xc0;
 860 }
 861
 862 static void intel_sdvo_get_mode_from_dtd(struct drm_display_mode *pmode,
 863                                          const struct intel_sdvo_dtd *dtd)
 864 {
 865         struct drm_display_mode mode = {};
 866
 867         mode.hdisplay = dtd->part1.h_active;
 868         mode.hdisplay += ((dtd->part1.h_high >> 4) & 0x0f) << 8;
 869         mode.hsync_start = mode.hdisplay + dtd->part2.h_sync_off;
 870         mode.hsync_start += (dtd->part2.sync_off_width_high & 0xc0) << 2;
 871         mode.hsync_end = mode.hsync_start + dtd->part2.h_sync_width;
 872         mode.hsync_end += (dtd->part2.sync_off_width_high & 0x30) << 4;
 873         mode.htotal = mode.hdisplay + dtd->part1.h_blank;
 874         mode.htotal += (dtd->part1.h_high & 0xf) << 8;
 875
 876         mode.vdisplay = dtd->part1.v_active;
 877         mode.vdisplay += ((dtd->part1.v_high >> 4) & 0x0f) << 8;
 878         mode.vsync_start = mode.vdisplay;
 879         mode.vsync_start += (dtd->part2.v_sync_off_width >> 4) & 0xf;
 880         mode.vsync_start += (dtd->part2.sync_off_width_high & 0x0c) << 2;
 881         mode.vsync_start += dtd->part2.v_sync_off_high & 0xc0;
 882         mode.vsync_end = mode.vsync_start +
 883                 (dtd->part2.v_sync_off_width & 0xf);
 884         mode.vsync_end += (dtd->part2.sync_off_width_high & 0x3) << 4;
 885         mode.vtotal = mode.vdisplay + dtd->part1.v_blank;
 886         mode.vtotal += (dtd->part1.v_high & 0xf) << 8;
 887
 888         mode.clock = dtd->part1.clock * 10;
 889
 890         if (dtd->part2.dtd_flags & DTD_FLAG_INTERLACE)
 891                 mode.flags |= DRM_MODE_FLAG_INTERLACE;
 892         if (dtd->part2.dtd_flags & DTD_FLAG_HSYNC_POSITIVE)
 893                 mode.flags |= DRM_MODE_FLAG_PHSYNC;
 894         else
 895                 mode.flags |= DRM_MODE_FLAG_NHSYNC;
 896         if (dtd->part2.dtd_flags & DTD_FLAG_VSYNC_POSITIVE)
 897                 mode.flags |= DRM_MODE_FLAG_PVSYNC;
 898         else
 899                 mode.flags |= DRM_MODE_FLAG_NVSYNC;
 900
 901         drm_mode_set_crtcinfo(&mode, 0);
 902
 903         drm_mode_copy(pmode, &mode);
 904 }
 905
 906 static bool intel_sdvo_check_supp_encode(struct intel_sdvo *intel_sdvo)
 907 {
 908         struct intel_sdvo_encode encode;
 909
 910         BUILD_BUG_ON(sizeof(encode) != 2);
 911         return intel_sdvo_get_value(intel_sdvo,
 912                                   SDVO_CMD_GET_SUPP_ENCODE,
 913                                   &encode, sizeof(encode));
 914 }
 915
 916 static bool intel_sdvo_set_encode(struct intel_sdvo *intel_sdvo,
 917                                   uint8_t mode)
 918 {
 919         return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_ENCODE, &mode, 1);
 920 }
 921
 922 static bool intel_sdvo_set_colorimetry(struct intel_sdvo *intel_sdvo,
 923                                        uint8_t mode)
 924 {
 925         return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_COLORIMETRY, &mode, 1);
 926 }
 927
 928 #if 0
 929 static void intel_sdvo_dump_hdmi_buf(struct intel_sdvo *intel_sdvo)
 930 {
 931         int i, j;
 932         uint8_t set_buf_index[2];
 933         uint8_t av_split;
 934         uint8_t buf_size;
 935         uint8_t buf[48];
 936         uint8_t *pos;
 937
 938         intel_sdvo_get_value(encoder, SDVO_CMD_GET_HBUF_AV_SPLIT, &av_split, 1);
 939
 940         for (i = 0; i <= av_split; i++) {
 941                 set_buf_index[0] = i; set_buf_index[1] = 0;
 942                 intel_sdvo_write_cmd(encoder, SDVO_CMD_SET_HBUF_INDEX,
 943                                      set_buf_index, 2);
 944                 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_INFO, NULL, 0);
 945                 intel_sdvo_read_response(encoder, &buf_size, 1);
 946
 947                 pos = buf;
 948                 for (j = 0; j <= buf_size; j += 8) {
 949                         intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_DATA,
 950                                              NULL, 0);
 951                         intel_sdvo_read_response(encoder, pos, 8);
 952                         pos += 8;
 953                 }
 954         }
 955 }
 956 #endif
 957
 958 static bool intel_sdvo_write_infoframe(struct intel_sdvo *intel_sdvo,
 959                                        unsigned if_index, uint8_t tx_rate,
 960                                        const uint8_t *data, unsigned length)
 961 {
 962         uint8_t set_buf_index[2] = { if_index, 0 };
 963         uint8_t hbuf_size, tmp[8];
 964         int i;
 965
 966         if (!intel_sdvo_set_value(intel_sdvo,
 967                                   SDVO_CMD_SET_HBUF_INDEX,
 968                                   set_buf_index, 2))
 969                 return false;
 970
 971         if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HBUF_INFO,
 972                                   &hbuf_size, 1))
 973                 return false;
 974
 975         /* Buffer size is 0 based, hooray! */
 976         hbuf_size++;
 977
 978         DRM_DEBUG_KMS("writing sdvo hbuf: %i, hbuf_size %i, hbuf_size: %i\n",
 979                       if_index, length, hbuf_size);
 980
 981         for (i = 0; i < hbuf_size; i += 8) {
 982                 memset(tmp, 0, 8);
 983                 if (i < length)
 984                         memcpy(tmp, data + i, min_t(unsigned, 8, length - i));
 985
 986                 if (!intel_sdvo_set_value(intel_sdvo,
 987                                           SDVO_CMD_SET_HBUF_DATA,
 988                                           tmp, 8))
 989                         return false;
 990         }
 991
 992         return intel_sdvo_set_value(intel_sdvo,
 993                                     SDVO_CMD_SET_HBUF_TXRATE,
 994                                     &tx_rate, 1);
 995 }
 996
 997 static bool intel_sdvo_set_avi_infoframe(struct intel_sdvo *intel_sdvo,
 998                                          const struct drm_display_mode *adjusted_mode)
 999 {
1000         uint8_t sdvo_data[HDMI_INFOFRAME_SIZE(AVI)];
1001         struct drm_crtc *crtc = intel_sdvo->base.base.crtc;
1002         struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
1003         union hdmi_infoframe frame;
1004         int ret;
1005         ssize_t len;
1006
1007         ret = drm_hdmi_avi_infoframe_from_display_mode(&frame.avi,
1008                                                        adjusted_mode);
1009         if (ret < 0) {
1010                 DRM_ERROR("couldn't fill AVI infoframe\n");
1011                 return false;
1012         }
1013
1014         if (intel_sdvo->rgb_quant_range_selectable) {
1015                 if (intel_crtc->config.limited_color_range)
1016                         frame.avi.quantization_range =
1017                                 HDMI_QUANTIZATION_RANGE_LIMITED;
1018                 else
1019                         frame.avi.quantization_range =
1020                                 HDMI_QUANTIZATION_RANGE_FULL;
1021         }
1022
1023         len = hdmi_infoframe_pack(&frame, sdvo_data, sizeof(sdvo_data));
1024         if (len < 0)
1025                 return false;
1026
1027         return intel_sdvo_write_infoframe(intel_sdvo, SDVO_HBUF_INDEX_AVI_IF,
1028                                           SDVO_HBUF_TX_VSYNC,
1029                                           sdvo_data, sizeof(sdvo_data));
1030 }
1031
1032 static bool intel_sdvo_set_tv_format(struct intel_sdvo *intel_sdvo)
1033 {
1034         struct intel_sdvo_tv_format format;
1035         uint32_t format_map;
1036
1037         format_map = 1 << intel_sdvo->tv_format_index;
1038         memset(&format, 0, sizeof(format));
1039         memcpy(&format, &format_map, min(sizeof(format), sizeof(format_map)));
1040
1041         BUILD_BUG_ON(sizeof(format) != 6);
1042         return intel_sdvo_set_value(intel_sdvo,
1043                                     SDVO_CMD_SET_TV_FORMAT,
1044                                     &format, sizeof(format));
1045 }
1046
1047 static bool
1048 intel_sdvo_set_output_timings_from_mode(struct intel_sdvo *intel_sdvo,
1049                                         const struct drm_display_mode *mode)
1050 {
1051         struct intel_sdvo_dtd output_dtd;
1052
1053         if (!intel_sdvo_set_target_output(intel_sdvo,
1054                                           intel_sdvo->attached_output))
1055                 return false;
1056
1057         intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
1058         if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
1059                 return false;
1060
1061         return true;
1062 }
1063
1064 /* Asks the sdvo controller for the preferred input mode given the output mode.
1065  * Unfortunately we have to set up the full output mode to do that. */
1066 static bool
1067 intel_sdvo_get_preferred_input_mode(struct intel_sdvo *intel_sdvo,
1068                                     const struct drm_display_mode *mode,
1069                                     struct drm_display_mode *adjusted_mode)
1070 {
1071         struct intel_sdvo_dtd input_dtd;
1072
1073         /* Reset the input timing to the screen. Assume always input 0. */
1074         if (!intel_sdvo_set_target_input(intel_sdvo))
1075                 return false;
1076
1077         if (!intel_sdvo_create_preferred_input_timing(intel_sdvo,
1078                                                       mode->clock / 10,
1079                                                       mode->hdisplay,
1080                                                       mode->vdisplay))
1081                 return false;
1082
1083         if (!intel_sdvo_get_preferred_input_timing(intel_sdvo,
1084                                                    &input_dtd))
1085                 return false;
1086
1087         intel_sdvo_get_mode_from_dtd(adjusted_mode, &input_dtd);
1088         intel_sdvo->dtd_sdvo_flags = input_dtd.part2.sdvo_flags;
1089
1090         return true;
1091 }
1092
1093 static void i9xx_adjust_sdvo_tv_clock(struct intel_crtc_config *pipe_config)
1094 {
1095         unsigned dotclock = pipe_config->port_clock;
1096         struct dpll *clock = &pipe_config->dpll;
1097
1098         /* SDVO TV has fixed PLL values depend on its clock range,
1099            this mirrors vbios setting. */
1100         if (dotclock >= 100000 && dotclock < 140500) {
1101                 clock->p1 = 2;
1102                 clock->p2 = 10;
1103                 clock->n = 3;
1104                 clock->m1 = 16;
1105                 clock->m2 = 8;
1106         } else if (dotclock >= 140500 && dotclock <= 200000) {
1107                 clock->p1 = 1;
1108                 clock->p2 = 10;
1109                 clock->n = 6;
1110                 clock->m1 = 12;
1111                 clock->m2 = 8;
1112         } else {
1113                 WARN(1, "SDVO TV clock out of range: %i\n", dotclock);
1114         }
1115
1116         pipe_config->clock_set = true;
1117 }
1118
1119 static bool intel_sdvo_compute_config(struct intel_encoder *encoder,
1120                                       struct intel_crtc_config *pipe_config)
1121 {
1122         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1123         struct drm_display_mode *adjusted_mode = &pipe_config->adjusted_mode;
1124         struct drm_display_mode *mode = &pipe_config->requested_mode;
1125
1126         DRM_DEBUG_KMS("forcing bpc to 8 for SDVO\n");
1127         pipe_config->pipe_bpp = 8*3;
1128
1129         if (HAS_PCH_SPLIT(encoder->base.dev))
1130                 pipe_config->has_pch_encoder = true;
1131
1132         /* We need to construct preferred input timings based on our
1133          * output timings.  To do that, we have to set the output
1134          * timings, even though this isn't really the right place in
1135          * the sequence to do it. Oh well.
1136          */
1137         if (intel_sdvo->is_tv) {
1138                 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo, mode))
1139                         return false;
1140
1141                 (void) intel_sdvo_get_preferred_input_mode(intel_sdvo,
1142                                                            mode,
1143                                                            adjusted_mode);
1144                 pipe_config->sdvo_tv_clock = true;
1145         } else if (intel_sdvo->is_lvds) {
1146                 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo,
1147                                                              intel_sdvo->sdvo_lvds_fixed_mode))
1148                         return false;
1149
1150                 (void) intel_sdvo_get_preferred_input_mode(intel_sdvo,
1151                                                            mode,
1152                                                            adjusted_mode);
1153         }
1154
1155         /* Make the CRTC code factor in the SDVO pixel multiplier.  The
1156          * SDVO device will factor out the multiplier during mode_set.
1157          */
1158         pipe_config->pixel_multiplier =
1159                 intel_sdvo_get_pixel_multiplier(adjusted_mode);
1160
1161         pipe_config->has_hdmi_sink = intel_sdvo->has_hdmi_monitor;
1162
1163         if (intel_sdvo->color_range_auto) {
1164                 /* See CEA-861-E - 5.1 Default Encoding Parameters */
1165                 /* FIXME: This bit is only valid when using TMDS encoding and 8
1166                  * bit per color mode. */
1167                 if (pipe_config->has_hdmi_sink &&
1168                     drm_match_cea_mode(adjusted_mode) > 1)
1169                         pipe_config->limited_color_range = true;
1170         } else {
1171                 if (pipe_config->has_hdmi_sink &&
1172                     intel_sdvo->color_range == HDMI_COLOR_RANGE_16_235)
1173                         pipe_config->limited_color_range = true;
1174         }
1175
1176         /* Clock computation needs to happen after pixel multiplier. */
1177         if (intel_sdvo->is_tv)
1178                 i9xx_adjust_sdvo_tv_clock(pipe_config);
1179
1180         return true;
1181 }
1182
1183 static void intel_sdvo_pre_enable(struct intel_encoder *intel_encoder)
1184 {
1185         struct drm_device *dev = intel_encoder->base.dev;
1186         struct drm_i915_private *dev_priv = dev->dev_private;
1187         struct intel_crtc *crtc = to_intel_crtc(intel_encoder->base.crtc);
1188         struct drm_display_mode *adjusted_mode =
1189                 &crtc->config.adjusted_mode;
1190         struct drm_display_mode *mode = &crtc->config.requested_mode;
1191         struct intel_sdvo *intel_sdvo = to_sdvo(intel_encoder);
1192         u32 sdvox;
1193         struct intel_sdvo_in_out_map in_out;
1194         struct intel_sdvo_dtd input_dtd, output_dtd;
1195         int rate;
1196
1197         if (!mode)
1198                 return;
1199
1200         /* First, set the input mapping for the first input to our controlled
1201          * output. This is only correct if we're a single-input device, in
1202          * which case the first input is the output from the appropriate SDVO
1203          * channel on the motherboard.  In a two-input device, the first input
1204          * will be SDVOB and the second SDVOC.
1205          */
1206         in_out.in0 = intel_sdvo->attached_output;
1207         in_out.in1 = 0;
1208
1209         intel_sdvo_set_value(intel_sdvo,
1210                              SDVO_CMD_SET_IN_OUT_MAP,
1211                              &in_out, sizeof(in_out));
1212
1213         /* Set the output timings to the screen */
1214         if (!intel_sdvo_set_target_output(intel_sdvo,
1215                                           intel_sdvo->attached_output))
1216                 return;
1217
1218         /* lvds has a special fixed output timing. */
1219         if (intel_sdvo->is_lvds)
1220                 intel_sdvo_get_dtd_from_mode(&output_dtd,
1221                                              intel_sdvo->sdvo_lvds_fixed_mode);
1222         else
1223                 intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
1224         if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
1225                 DRM_INFO("Setting output timings on %s failed\n",
1226                          SDVO_NAME(intel_sdvo));
1227
1228         /* Set the input timing to the screen. Assume always input 0. */
1229         if (!intel_sdvo_set_target_input(intel_sdvo))
1230                 return;
1231
1232         if (crtc->config.has_hdmi_sink) {
1233                 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_HDMI);
1234                 intel_sdvo_set_colorimetry(intel_sdvo,
1235                                            SDVO_COLORIMETRY_RGB256);
1236                 intel_sdvo_set_avi_infoframe(intel_sdvo, adjusted_mode);
1237         } else
1238                 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_DVI);
1239
1240         if (intel_sdvo->is_tv &&
1241             !intel_sdvo_set_tv_format(intel_sdvo))
1242                 return;
1243
1244         intel_sdvo_get_dtd_from_mode(&input_dtd, adjusted_mode);
1245
1246         if (intel_sdvo->is_tv || intel_sdvo->is_lvds)
1247                 input_dtd.part2.sdvo_flags = intel_sdvo->dtd_sdvo_flags;
1248         if (!intel_sdvo_set_input_timing(intel_sdvo, &input_dtd))
1249                 DRM_INFO("Setting input timings on %s failed\n",
1250                          SDVO_NAME(intel_sdvo));
1251
1252         switch (crtc->config.pixel_multiplier) {
1253         default:
1254                 WARN(1, "unknown pixel mutlipler specified\n");
1255         case 1: rate = SDVO_CLOCK_RATE_MULT_1X; break;
1256         case 2: rate = SDVO_CLOCK_RATE_MULT_2X; break;
1257         case 4: rate = SDVO_CLOCK_RATE_MULT_4X; break;
1258         }
1259         if (!intel_sdvo_set_clock_rate_mult(intel_sdvo, rate))
1260                 return;
1261
1262         /* Set the SDVO control regs. */
1263         if (INTEL_INFO(dev)->gen >= 4) {
1264                 /* The real mode polarity is set by the SDVO commands, using
1265                  * struct intel_sdvo_dtd. */
1266                 sdvox = SDVO_VSYNC_ACTIVE_HIGH | SDVO_HSYNC_ACTIVE_HIGH;
1267                 if (!HAS_PCH_SPLIT(dev) && crtc->config.limited_color_range)
1268                         sdvox |= HDMI_COLOR_RANGE_16_235;
1269                 if (INTEL_INFO(dev)->gen < 5)
1270                         sdvox |= SDVO_BORDER_ENABLE;
1271         } else {
1272                 sdvox = I915_READ(intel_sdvo->sdvo_reg);
1273                 switch (intel_sdvo->sdvo_reg) {
1274                 case GEN3_SDVOB:
1275                         sdvox &= SDVOB_PRESERVE_MASK;
1276                         break;
1277                 case GEN3_SDVOC:
1278                         sdvox &= SDVOC_PRESERVE_MASK;
1279                         break;
1280                 }
1281                 sdvox |= (9 << 19) | SDVO_BORDER_ENABLE;
1282         }
1283
1284         if (INTEL_PCH_TYPE(dev) >= PCH_CPT)
1285                 sdvox |= SDVO_PIPE_SEL_CPT(crtc->pipe);
1286         else
1287                 sdvox |= SDVO_PIPE_SEL(crtc->pipe);
1288
1289         if (intel_sdvo->has_hdmi_audio)
1290                 sdvox |= SDVO_AUDIO_ENABLE;
1291
1292         if (INTEL_INFO(dev)->gen >= 4) {
1293                 /* done in crtc_mode_set as the dpll_md reg must be written early */
1294         } else if (IS_I945G(dev) || IS_I945GM(dev) || IS_G33(dev)) {
1295                 /* done in crtc_mode_set as it lives inside the dpll register */
1296         } else {
1297                 sdvox |= (crtc->config.pixel_multiplier - 1)
1298                         << SDVO_PORT_MULTIPLY_SHIFT;
1299         }
1300
1301         if (input_dtd.part2.sdvo_flags & SDVO_NEED_TO_STALL &&
1302             INTEL_INFO(dev)->gen < 5)
1303                 sdvox |= SDVO_STALL_SELECT;
1304         intel_sdvo_write_sdvox(intel_sdvo, sdvox);
1305 }
1306
1307 static bool intel_sdvo_connector_get_hw_state(struct intel_connector *connector)
1308 {
1309         struct intel_sdvo_connector *intel_sdvo_connector =
1310                 to_intel_sdvo_connector(&connector->base);
1311         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(&connector->base);
1312         u16 active_outputs = 0;
1313
1314         intel_sdvo_get_active_outputs(intel_sdvo, &active_outputs);
1315
1316         if (active_outputs & intel_sdvo_connector->output_flag)
1317                 return true;
1318         else
1319                 return false;
1320 }
1321
1322 static bool intel_sdvo_get_hw_state(struct intel_encoder *encoder,
1323                                     enum i915_pipe *pipe)
1324 {
1325         struct drm_device *dev = encoder->base.dev;
1326         struct drm_i915_private *dev_priv = dev->dev_private;
1327         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1328         u16 active_outputs = 0;
1329         u32 tmp;
1330
1331         tmp = I915_READ(intel_sdvo->sdvo_reg);
1332         intel_sdvo_get_active_outputs(intel_sdvo, &active_outputs);
1333
1334         if (!(tmp & SDVO_ENABLE) && (active_outputs == 0))
1335                 return false;
1336
1337         if (HAS_PCH_CPT(dev))
1338                 *pipe = PORT_TO_PIPE_CPT(tmp);
1339         else
1340                 *pipe = PORT_TO_PIPE(tmp);
1341
1342         return true;
1343 }
1344
1345 static void intel_sdvo_get_config(struct intel_encoder *encoder,
1346                                   struct intel_crtc_config *pipe_config)
1347 {
1348         struct drm_device *dev = encoder->base.dev;
1349         struct drm_i915_private *dev_priv = dev->dev_private;
1350         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1351         struct intel_sdvo_dtd dtd;
1352         int encoder_pixel_multiplier = 0;
1353         int dotclock;
1354         u32 flags = 0, sdvox;
1355         u8 val;
1356         bool ret;
1357
1358         sdvox = I915_READ(intel_sdvo->sdvo_reg);
1359
1360         ret = intel_sdvo_get_input_timing(intel_sdvo, &dtd);
1361         if (!ret) {
1362                 /* Some sdvo encoders are not spec compliant and don't
1363                  * implement the mandatory get_timings function. */
1364                 DRM_DEBUG_DRIVER("failed to retrieve SDVO DTD\n");
1365                 pipe_config->quirks |= PIPE_CONFIG_QUIRK_MODE_SYNC_FLAGS;
1366         } else {
1367                 if (dtd.part2.dtd_flags & DTD_FLAG_HSYNC_POSITIVE)
1368                         flags |= DRM_MODE_FLAG_PHSYNC;
1369                 else
1370                         flags |= DRM_MODE_FLAG_NHSYNC;
1371
1372                 if (dtd.part2.dtd_flags & DTD_FLAG_VSYNC_POSITIVE)
1373                         flags |= DRM_MODE_FLAG_PVSYNC;
1374                 else
1375                         flags |= DRM_MODE_FLAG_NVSYNC;
1376         }
1377
1378         pipe_config->adjusted_mode.flags |= flags;
1379
1380         /*
1381          * pixel multiplier readout is tricky: Only on i915g/gm it is stored in
1382          * the sdvo port register, on all other platforms it is part of the dpll
1383          * state. Since the general pipe state readout happens before the
1384          * encoder->get_config we so already have a valid pixel multplier on all
1385          * other platfroms.
1386          */
1387         if (IS_I915G(dev) || IS_I915GM(dev)) {
1388                 pipe_config->pixel_multiplier =
1389                         ((sdvox & SDVO_PORT_MULTIPLY_MASK)
1390                          >> SDVO_PORT_MULTIPLY_SHIFT) + 1;
1391         }
1392
1393         dotclock = pipe_config->port_clock;
1394         if (pipe_config->pixel_multiplier)
1395                 dotclock /= pipe_config->pixel_multiplier;
1396
1397         if (HAS_PCH_SPLIT(dev))
1398                 ironlake_check_encoder_dotclock(pipe_config, dotclock);
1399
1400         pipe_config->adjusted_mode.crtc_clock = dotclock;
1401
1402         /* Cross check the port pixel multiplier with the sdvo encoder state. */
1403         if (intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_CLOCK_RATE_MULT,
1404                                  &val, 1)) {
1405                 switch (val) {
1406                 case SDVO_CLOCK_RATE_MULT_1X:
1407                         encoder_pixel_multiplier = 1;
1408                         break;
1409                 case SDVO_CLOCK_RATE_MULT_2X:
1410                         encoder_pixel_multiplier = 2;
1411                         break;
1412                 case SDVO_CLOCK_RATE_MULT_4X:
1413                         encoder_pixel_multiplier = 4;
1414                         break;
1415                 }
1416         }
1417
1418         if (sdvox & HDMI_COLOR_RANGE_16_235)
1419                 pipe_config->limited_color_range = true;
1420
1421         if (intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_ENCODE,
1422                                  &val, 1)) {
1423                 if (val == SDVO_ENCODE_HDMI)
1424                         pipe_config->has_hdmi_sink = true;
1425         }
1426
1427         WARN(encoder_pixel_multiplier != pipe_config->pixel_multiplier,
1428              "SDVO pixel multiplier mismatch, port: %i, encoder: %i\n",
1429              pipe_config->pixel_multiplier, encoder_pixel_multiplier);
1430 }
1431
1432 static void intel_disable_sdvo(struct intel_encoder *encoder)
1433 {
1434         struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
1435         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1436         u32 temp;
1437
1438         intel_sdvo_set_active_outputs(intel_sdvo, 0);
1439         if (0)
1440                 intel_sdvo_set_encoder_power_state(intel_sdvo,
1441                                                    DRM_MODE_DPMS_OFF);
1442
1443         temp = I915_READ(intel_sdvo->sdvo_reg);
1444         if ((temp & SDVO_ENABLE) != 0) {
1445                 /* HW workaround for IBX, we need to move the port to
1446                  * transcoder A before disabling it. */
1447                 if (HAS_PCH_IBX(encoder->base.dev)) {
1448                         struct drm_crtc *crtc = encoder->base.crtc;
1449                         int pipe = crtc ? to_intel_crtc(crtc)->pipe : -1;
1450
1451                         if (temp & SDVO_PIPE_B_SELECT) {
1452                                 temp &= ~SDVO_PIPE_B_SELECT;
1453                                 I915_WRITE(intel_sdvo->sdvo_reg, temp);
1454                                 POSTING_READ(intel_sdvo->sdvo_reg);
1455
1456                                 /* Again we need to write this twice. */
1457                                 I915_WRITE(intel_sdvo->sdvo_reg, temp);
1458                                 POSTING_READ(intel_sdvo->sdvo_reg);
1459
1460                                 /* Transcoder selection bits only update
1461                                  * effectively on vblank. */
1462                                 if (crtc)
1463                                         intel_wait_for_vblank(encoder->base.dev, pipe);
1464                                 else
1465                                         msleep(50);
1466                         }
1467                 }
1468
1469                 intel_sdvo_write_sdvox(intel_sdvo, temp & ~SDVO_ENABLE);
1470         }
1471 }
1472
1473 static void intel_enable_sdvo(struct intel_encoder *encoder)
1474 {
1475         struct drm_device *dev = encoder->base.dev;
1476         struct drm_i915_private *dev_priv = dev->dev_private;
1477         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1478         struct intel_crtc *intel_crtc = to_intel_crtc(encoder->base.crtc);
1479         u32 temp;
1480         bool input1, input2;
1481         int i;
1482         bool success;
1483
1484         temp = I915_READ(intel_sdvo->sdvo_reg);
1485         if ((temp & SDVO_ENABLE) == 0) {
1486                 /* HW workaround for IBX, we need to move the port
1487                  * to transcoder A before disabling it, so restore it here. */
1488                 if (HAS_PCH_IBX(dev))
1489                         temp |= SDVO_PIPE_SEL(intel_crtc->pipe);
1490
1491                 intel_sdvo_write_sdvox(intel_sdvo, temp | SDVO_ENABLE);
1492         }
1493         for (i = 0; i < 2; i++)
1494                 intel_wait_for_vblank(dev, intel_crtc->pipe);
1495
1496         success = intel_sdvo_get_trained_inputs(intel_sdvo, &input1, &input2);
1497         /* Warn if the device reported failure to sync.
1498          * A lot of SDVO devices fail to notify of sync, but it's
1499          * a given it the status is a success, we succeeded.
1500          */
1501         if (success && !input1) {
1502                 DRM_DEBUG_KMS("First %s output reported failure to "
1503                                 "sync\n", SDVO_NAME(intel_sdvo));
1504         }
1505
1506         if (0)
1507                 intel_sdvo_set_encoder_power_state(intel_sdvo,
1508                                                    DRM_MODE_DPMS_ON);
1509         intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output);
1510 }
1511
1512 /* Special dpms function to support cloning between dvo/sdvo/crt. */
1513 static void intel_sdvo_dpms(struct drm_connector *connector, int mode)
1514 {
1515         struct drm_crtc *crtc;
1516         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1517
1518         /* dvo supports only 2 dpms states. */
1519         if (mode != DRM_MODE_DPMS_ON)
1520                 mode = DRM_MODE_DPMS_OFF;
1521
1522         if (mode == connector->dpms)
1523                 return;
1524
1525         connector->dpms = mode;
1526
1527         /* Only need to change hw state when actually enabled */
1528         crtc = intel_sdvo->base.base.crtc;
1529         if (!crtc) {
1530                 intel_sdvo->base.connectors_active = false;
1531                 return;
1532         }
1533
1534         /* We set active outputs manually below in case pipe dpms doesn't change
1535          * due to cloning. */
1536         if (mode != DRM_MODE_DPMS_ON) {
1537                 intel_sdvo_set_active_outputs(intel_sdvo, 0);
1538                 if (0)
1539                         intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
1540
1541                 intel_sdvo->base.connectors_active = false;
1542
1543                 intel_crtc_update_dpms(crtc);
1544         } else {
1545                 intel_sdvo->base.connectors_active = true;
1546
1547                 intel_crtc_update_dpms(crtc);
1548
1549                 if (0)
1550                         intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
1551                 intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output);
1552         }
1553
1554         intel_modeset_check_state(connector->dev);
1555 }
1556
1557 static enum drm_mode_status
1558 intel_sdvo_mode_valid(struct drm_connector *connector,
1559                       struct drm_display_mode *mode)
1560 {
1561         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1562
1563         if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
1564                 return MODE_NO_DBLESCAN;
1565
1566         if (intel_sdvo->pixel_clock_min > mode->clock)
1567                 return MODE_CLOCK_LOW;
1568
1569         if (intel_sdvo->pixel_clock_max < mode->clock)
1570                 return MODE_CLOCK_HIGH;
1571
1572         if (intel_sdvo->is_lvds) {
1573                 if (mode->hdisplay > intel_sdvo->sdvo_lvds_fixed_mode->hdisplay)
1574                         return MODE_PANEL;
1575
1576                 if (mode->vdisplay > intel_sdvo->sdvo_lvds_fixed_mode->vdisplay)
1577                         return MODE_PANEL;
1578         }
1579
1580         return MODE_OK;
1581 }
1582
1583 static bool intel_sdvo_get_capabilities(struct intel_sdvo *intel_sdvo, struct intel_sdvo_caps *caps)
1584 {
1585         BUILD_BUG_ON(sizeof(*caps) != 8);
1586         if (!intel_sdvo_get_value(intel_sdvo,
1587                                   SDVO_CMD_GET_DEVICE_CAPS,
1588                                   caps, sizeof(*caps)))
1589                 return false;
1590
1591         DRM_DEBUG_KMS("SDVO capabilities:\n"
1592                       "  vendor_id: %d\n"
1593                       "  device_id: %d\n"
1594                       "  device_rev_id: %d\n"
1595                       "  sdvo_version_major: %d\n"
1596                       "  sdvo_version_minor: %d\n"
1597                       "  sdvo_inputs_mask: %d\n"
1598                       "  smooth_scaling: %d\n"
1599                       "  sharp_scaling: %d\n"
1600                       "  up_scaling: %d\n"
1601                       "  down_scaling: %d\n"
1602                       "  stall_support: %d\n"
1603                       "  output_flags: %d\n",
1604                       caps->vendor_id,
1605                       caps->device_id,
1606                       caps->device_rev_id,
1607                       caps->sdvo_version_major,
1608                       caps->sdvo_version_minor,
1609                       caps->sdvo_inputs_mask,
1610                       caps->smooth_scaling,
1611                       caps->sharp_scaling,
1612                       caps->up_scaling,
1613                       caps->down_scaling,
1614                       caps->stall_support,
1615                       caps->output_flags);
1616
1617         return true;
1618 }
1619
1620 static uint16_t intel_sdvo_get_hotplug_support(struct intel_sdvo *intel_sdvo)
1621 {
1622         struct drm_device *dev = intel_sdvo->base.base.dev;
1623         uint16_t hotplug;
1624
1625         /* HW Erratum: SDVO Hotplug is broken on all i945G chips, there's noise
1626          * on the line. */
1627         if (IS_I945G(dev) || IS_I945GM(dev))
1628                 return 0;
1629
1630         if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT,
1631                                         &hotplug, sizeof(hotplug)))
1632                 return 0;
1633
1634         return hotplug;
1635 }
1636
1637 static void intel_sdvo_enable_hotplug(struct intel_encoder *encoder)
1638 {
1639         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1640
1641         intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG,
1642                         &intel_sdvo->hotplug_active, 2);
1643 }
1644
1645 static bool
1646 intel_sdvo_multifunc_encoder(struct intel_sdvo *intel_sdvo)
1647 {
1648         /* Is there more than one type of output? */
1649         return hweight16(intel_sdvo->caps.output_flags) > 1;
1650 }
1651
1652 static struct edid *
1653 intel_sdvo_get_edid(struct drm_connector *connector)
1654 {
1655         struct intel_sdvo *sdvo = intel_attached_sdvo(connector);
1656         return drm_get_edid(connector, sdvo->ddc);
1657 }
1658
1659 /* Mac mini hack -- use the same DDC as the analog connector */
1660 static struct edid *
1661 intel_sdvo_get_analog_edid(struct drm_connector *connector)
1662 {
1663         struct drm_i915_private *dev_priv = connector->dev->dev_private;
1664
1665         return drm_get_edid(connector,
1666                             intel_gmbus_get_adapter(dev_priv,
1667                                                     dev_priv->vbt.crt_ddc_pin));
1668 }
1669
1670 static enum drm_connector_status
1671 intel_sdvo_tmds_sink_detect(struct drm_connector *connector)
1672 {
1673         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1674         enum drm_connector_status status;
1675         struct edid *edid;
1676
1677         edid = intel_sdvo_get_edid(connector);
1678
1679         if (edid == NULL && intel_sdvo_multifunc_encoder(intel_sdvo)) {
1680                 u8 ddc, saved_ddc = intel_sdvo->ddc_bus;
1681
1682                 /*
1683                  * Don't use the 1 as the argument of DDC bus switch to get
1684                  * the EDID. It is used for SDVO SPD ROM.
1685                  */
1686                 for (ddc = intel_sdvo->ddc_bus >> 1; ddc > 1; ddc >>= 1) {
1687                         intel_sdvo->ddc_bus = ddc;
1688                         edid = intel_sdvo_get_edid(connector);
1689                         if (edid)
1690                                 break;
1691                 }
1692                 /*
1693                  * If we found the EDID on the other bus,
1694                  * assume that is the correct DDC bus.
1695                  */
1696                 if (edid == NULL)
1697                         intel_sdvo->ddc_bus = saved_ddc;
1698         }
1699
1700         /*
1701          * When there is no edid and no monitor is connected with VGA
1702          * port, try to use the CRT ddc to read the EDID for DVI-connector.
1703          */
1704         if (edid == NULL)
1705                 edid = intel_sdvo_get_analog_edid(connector);
1706
1707         status = connector_status_unknown;
1708         if (edid != NULL) {
1709                 /* DDC bus is shared, match EDID to connector type */
1710                 if (edid->input & DRM_EDID_INPUT_DIGITAL) {
1711                         status = connector_status_connected;
1712                         if (intel_sdvo->is_hdmi) {
1713                                 intel_sdvo->has_hdmi_monitor = drm_detect_hdmi_monitor(edid);
1714                                 intel_sdvo->has_hdmi_audio = drm_detect_monitor_audio(edid);
1715                                 intel_sdvo->rgb_quant_range_selectable =
1716                                         drm_rgb_quant_range_selectable(edid);
1717                         }
1718                 } else
1719                         status = connector_status_disconnected;
1720                 kfree(edid);
1721         }
1722
1723         if (status == connector_status_connected) {
1724                 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1725                 if (intel_sdvo_connector->force_audio != HDMI_AUDIO_AUTO)
1726                         intel_sdvo->has_hdmi_audio = (intel_sdvo_connector->force_audio == HDMI_AUDIO_ON);
1727         }
1728
1729         return status;
1730 }
1731
1732 static bool
1733 intel_sdvo_connector_matches_edid(struct intel_sdvo_connector *sdvo,
1734                                   struct edid *edid)
1735 {
1736         bool monitor_is_digital = !!(edid->input & DRM_EDID_INPUT_DIGITAL);
1737         bool connector_is_digital = !!IS_DIGITAL(sdvo);
1738
1739         DRM_DEBUG_KMS("connector_is_digital? %d, monitor_is_digital? %d\n",
1740                       connector_is_digital, monitor_is_digital);
1741         return connector_is_digital == monitor_is_digital;
1742 }
1743
1744 static enum drm_connector_status
1745 intel_sdvo_detect(struct drm_connector *connector, bool force)
1746 {
1747         uint16_t response;
1748         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1749         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1750         enum drm_connector_status ret;
1751
1752         DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
1753                       connector->base.id, connector->name);
1754
1755         if (!intel_sdvo_get_value(intel_sdvo,
1756                                   SDVO_CMD_GET_ATTACHED_DISPLAYS,
1757                                   &response, 2))
1758                 return connector_status_unknown;
1759
1760         DRM_DEBUG_KMS("SDVO response %d %d [%x]\n",
1761                       response & 0xff, response >> 8,
1762                       intel_sdvo_connector->output_flag);
1763
1764         if (response == 0)
1765                 return connector_status_disconnected;
1766
1767         intel_sdvo->attached_output = response;
1768
1769         intel_sdvo->has_hdmi_monitor = false;
1770         intel_sdvo->has_hdmi_audio = false;
1771         intel_sdvo->rgb_quant_range_selectable = false;
1772
1773         if ((intel_sdvo_connector->output_flag & response) == 0)
1774                 ret = connector_status_disconnected;
1775         else if (IS_TMDS(intel_sdvo_connector))
1776                 ret = intel_sdvo_tmds_sink_detect(connector);
1777         else {
1778                 struct edid *edid;
1779
1780                 /* if we have an edid check it matches the connection */
1781                 edid = intel_sdvo_get_edid(connector);
1782                 if (edid == NULL)
1783                         edid = intel_sdvo_get_analog_edid(connector);
1784                 if (edid != NULL) {
1785                         if (intel_sdvo_connector_matches_edid(intel_sdvo_connector,
1786                                                               edid))
1787                                 ret = connector_status_connected;
1788                         else
1789                                 ret = connector_status_disconnected;
1790
1791                         kfree(edid);
1792                 } else
1793                         ret = connector_status_connected;
1794         }
1795
1796         /* May update encoder flag for like clock for SDVO TV, etc.*/
1797         if (ret == connector_status_connected) {
1798                 intel_sdvo->is_tv = false;
1799                 intel_sdvo->is_lvds = false;
1800
1801                 if (response & SDVO_TV_MASK)
1802                         intel_sdvo->is_tv = true;
1803                 if (response & SDVO_LVDS_MASK)
1804                         intel_sdvo->is_lvds = intel_sdvo->sdvo_lvds_fixed_mode != NULL;
1805         }
1806
1807         return ret;
1808 }
1809
1810 static void intel_sdvo_get_ddc_modes(struct drm_connector *connector)
1811 {
1812         struct edid *edid;
1813
1814         DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
1815                       connector->base.id, connector->name);
1816
1817         /* set the bus switch and get the modes */
1818         edid = intel_sdvo_get_edid(connector);
1819
1820         /*
1821          * Mac mini hack.  On this device, the DVI-I connector shares one DDC
1822          * link between analog and digital outputs. So, if the regular SDVO
1823          * DDC fails, check to see if the analog output is disconnected, in
1824          * which case we'll look there for the digital DDC data.
1825          */
1826         if (edid == NULL)
1827                 edid = intel_sdvo_get_analog_edid(connector);
1828
1829         if (edid != NULL) {
1830                 if (intel_sdvo_connector_matches_edid(to_intel_sdvo_connector(connector),
1831                                                       edid)) {
1832                         drm_mode_connector_update_edid_property(connector, edid);
1833                         drm_add_edid_modes(connector, edid);
1834                 }
1835
1836                 kfree(edid);
1837         }
1838 }
1839
1840 /*
1841  * Set of SDVO TV modes.
1842  * Note!  This is in reply order (see loop in get_tv_modes).
1843  * XXX: all 60Hz refresh?
1844  */
1845 static const struct drm_display_mode sdvo_tv_modes[] = {
1846         { DRM_MODE("320x200", DRM_MODE_TYPE_DRIVER, 5815, 320, 321, 384,
1847                    416, 0, 200, 201, 232, 233, 0,
1848                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1849         { DRM_MODE("320x240", DRM_MODE_TYPE_DRIVER, 6814, 320, 321, 384,
1850                    416, 0, 240, 241, 272, 273, 0,
1851                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1852         { DRM_MODE("400x300", DRM_MODE_TYPE_DRIVER, 9910, 400, 401, 464,
1853                    496, 0, 300, 301, 332, 333, 0,
1854                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1855         { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 16913, 640, 641, 704,
1856                    736, 0, 350, 351, 382, 383, 0,
1857                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1858         { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 19121, 640, 641, 704,
1859                    736, 0, 400, 401, 432, 433, 0,
1860                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1861         { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 22654, 640, 641, 704,
1862                    736, 0, 480, 481, 512, 513, 0,
1863                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1864         { DRM_MODE("704x480", DRM_MODE_TYPE_DRIVER, 24624, 704, 705, 768,
1865                    800, 0, 480, 481, 512, 513, 0,
1866                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1867         { DRM_MODE("704x576", DRM_MODE_TYPE_DRIVER, 29232, 704, 705, 768,
1868                    800, 0, 576, 577, 608, 609, 0,
1869                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1870         { DRM_MODE("720x350", DRM_MODE_TYPE_DRIVER, 18751, 720, 721, 784,
1871                    816, 0, 350, 351, 382, 383, 0,
1872                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1873         { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 21199, 720, 721, 784,
1874                    816, 0, 400, 401, 432, 433, 0,
1875                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1876         { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 25116, 720, 721, 784,
1877                    816, 0, 480, 481, 512, 513, 0,
1878                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1879         { DRM_MODE("720x540", DRM_MODE_TYPE_DRIVER, 28054, 720, 721, 784,
1880                    816, 0, 540, 541, 572, 573, 0,
1881                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1882         { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 29816, 720, 721, 784,
1883                    816, 0, 576, 577, 608, 609, 0,
1884                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1885         { DRM_MODE("768x576", DRM_MODE_TYPE_DRIVER, 31570, 768, 769, 832,
1886                    864, 0, 576, 577, 608, 609, 0,
1887                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1888         { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 34030, 800, 801, 864,
1889                    896, 0, 600, 601, 632, 633, 0,
1890                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1891         { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 36581, 832, 833, 896,
1892                    928, 0, 624, 625, 656, 657, 0,
1893                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1894         { DRM_MODE("920x766", DRM_MODE_TYPE_DRIVER, 48707, 920, 921, 984,
1895                    1016, 0, 766, 767, 798, 799, 0,
1896                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1897         { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 53827, 1024, 1025, 1088,
1898                    1120, 0, 768, 769, 800, 801, 0,
1899                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1900         { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 87265, 1280, 1281, 1344,
1901                    1376, 0, 1024, 1025, 1056, 1057, 0,
1902                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1903 };
1904
1905 static void intel_sdvo_get_tv_modes(struct drm_connector *connector)
1906 {
1907         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1908         struct intel_sdvo_sdtv_resolution_request tv_res;
1909         uint32_t reply = 0, format_map = 0;
1910         int i;
1911
1912         DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
1913                       connector->base.id, connector->name);
1914
1915         /* Read the list of supported input resolutions for the selected TV
1916          * format.
1917          */
1918         format_map = 1 << intel_sdvo->tv_format_index;
1919         memcpy(&tv_res, &format_map,
1920                min(sizeof(format_map), sizeof(struct intel_sdvo_sdtv_resolution_request)));
1921
1922         if (!intel_sdvo_set_target_output(intel_sdvo, intel_sdvo->attached_output))
1923                 return;
1924
1925         BUILD_BUG_ON(sizeof(tv_res) != 3);
1926         if (!intel_sdvo_write_cmd(intel_sdvo,
1927                                   SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT,
1928                                   &tv_res, sizeof(tv_res)))
1929                 return;
1930         if (!intel_sdvo_read_response(intel_sdvo, &reply, 3))
1931                 return;
1932
1933         for (i = 0; i < ARRAY_SIZE(sdvo_tv_modes); i++)
1934                 if (reply & (1 << i)) {
1935                         struct drm_display_mode *nmode;
1936                         nmode = drm_mode_duplicate(connector->dev,
1937                                                    &sdvo_tv_modes[i]);
1938                         if (nmode)
1939                                 drm_mode_probed_add(connector, nmode);
1940                 }
1941 }
1942
1943 static void intel_sdvo_get_lvds_modes(struct drm_connector *connector)
1944 {
1945         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1946         struct drm_i915_private *dev_priv = connector->dev->dev_private;
1947         struct drm_display_mode *newmode;
1948
1949         DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
1950                       connector->base.id, connector->name);
1951
1952         /*
1953          * Fetch modes from VBT. For SDVO prefer the VBT mode since some
1954          * SDVO->LVDS transcoders can't cope with the EDID mode.
1955          */
1956         if (dev_priv->vbt.sdvo_lvds_vbt_mode != NULL) {
1957                 newmode = drm_mode_duplicate(connector->dev,
1958                                              dev_priv->vbt.sdvo_lvds_vbt_mode);
1959                 if (newmode != NULL) {
1960                         /* Guarantee the mode is preferred */
1961                         newmode->type = (DRM_MODE_TYPE_PREFERRED |
1962                                          DRM_MODE_TYPE_DRIVER);
1963                         drm_mode_probed_add(connector, newmode);
1964                 }
1965         }
1966
1967         /*
1968          * Attempt to get the mode list from DDC.
1969          * Assume that the preferred modes are
1970          * arranged in priority order.
1971          */
1972         intel_ddc_get_modes(connector, intel_sdvo->ddc);
1973
1974         list_for_each_entry(newmode, &connector->probed_modes, head) {
1975                 if (newmode->type & DRM_MODE_TYPE_PREFERRED) {
1976                         intel_sdvo->sdvo_lvds_fixed_mode =
1977                                 drm_mode_duplicate(connector->dev, newmode);
1978
1979                         intel_sdvo->is_lvds = true;
1980                         break;
1981                 }
1982         }
1983 }
1984
1985 static int intel_sdvo_get_modes(struct drm_connector *connector)
1986 {
1987         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1988
1989         if (IS_TV(intel_sdvo_connector))
1990                 intel_sdvo_get_tv_modes(connector);
1991         else if (IS_LVDS(intel_sdvo_connector))
1992                 intel_sdvo_get_lvds_modes(connector);
1993         else
1994                 intel_sdvo_get_ddc_modes(connector);
1995
1996         return !list_empty(&connector->probed_modes);
1997 }
1998
1999 static void
2000 intel_sdvo_destroy_enhance_property(struct drm_connector *connector)
2001 {
2002         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
2003         struct drm_device *dev = connector->dev;
2004
2005         if (intel_sdvo_connector->left)
2006                 drm_property_destroy(dev, intel_sdvo_connector->left);
2007         if (intel_sdvo_connector->right)
2008                 drm_property_destroy(dev, intel_sdvo_connector->right);
2009         if (intel_sdvo_connector->top)
2010                 drm_property_destroy(dev, intel_sdvo_connector->top);
2011         if (intel_sdvo_connector->bottom)
2012                 drm_property_destroy(dev, intel_sdvo_connector->bottom);
2013         if (intel_sdvo_connector->hpos)
2014                 drm_property_destroy(dev, intel_sdvo_connector->hpos);
2015         if (intel_sdvo_connector->vpos)
2016                 drm_property_destroy(dev, intel_sdvo_connector->vpos);
2017         if (intel_sdvo_connector->saturation)
2018                 drm_property_destroy(dev, intel_sdvo_connector->saturation);
2019         if (intel_sdvo_connector->contrast)
2020                 drm_property_destroy(dev, intel_sdvo_connector->contrast);
2021         if (intel_sdvo_connector->hue)
2022                 drm_property_destroy(dev, intel_sdvo_connector->hue);
2023         if (intel_sdvo_connector->sharpness)
2024                 drm_property_destroy(dev, intel_sdvo_connector->sharpness);
2025         if (intel_sdvo_connector->flicker_filter)
2026                 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter);
2027         if (intel_sdvo_connector->flicker_filter_2d)
2028                 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_2d);
2029         if (intel_sdvo_connector->flicker_filter_adaptive)
2030                 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_adaptive);
2031         if (intel_sdvo_connector->tv_luma_filter)
2032                 drm_property_destroy(dev, intel_sdvo_connector->tv_luma_filter);
2033         if (intel_sdvo_connector->tv_chroma_filter)
2034                 drm_property_destroy(dev, intel_sdvo_connector->tv_chroma_filter);
2035         if (intel_sdvo_connector->dot_crawl)
2036                 drm_property_destroy(dev, intel_sdvo_connector->dot_crawl);
2037         if (intel_sdvo_connector->brightness)
2038                 drm_property_destroy(dev, intel_sdvo_connector->brightness);
2039 }
2040
2041 static void intel_sdvo_destroy(struct drm_connector *connector)
2042 {
2043         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
2044
2045         if (intel_sdvo_connector->tv_format)
2046                 drm_property_destroy(connector->dev,
2047                                      intel_sdvo_connector->tv_format);
2048
2049         intel_sdvo_destroy_enhance_property(connector);
2050         drm_connector_cleanup(connector);
2051         kfree(intel_sdvo_connector);
2052 }
2053
2054 static bool intel_sdvo_detect_hdmi_audio(struct drm_connector *connector)
2055 {
2056         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
2057         struct edid *edid;
2058         bool has_audio = false;
2059
2060         if (!intel_sdvo->is_hdmi)
2061                 return false;
2062
2063         edid = intel_sdvo_get_edid(connector);
2064         if (edid != NULL && edid->input & DRM_EDID_INPUT_DIGITAL)
2065                 has_audio = drm_detect_monitor_audio(edid);
2066         kfree(edid);
2067
2068         return has_audio;
2069 }
2070
2071 static int
2072 intel_sdvo_set_property(struct drm_connector *connector,
2073                         struct drm_property *property,
2074                         uint64_t val)
2075 {
2076         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
2077         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
2078         struct drm_i915_private *dev_priv = connector->dev->dev_private;
2079         uint16_t temp_value;
2080         uint8_t cmd;
2081         int ret;
2082
2083         ret = drm_object_property_set_value(&connector->base, property, val);
2084         if (ret)
2085                 return ret;
2086
2087         if (property == dev_priv->force_audio_property) {
2088                 int i = val;
2089                 bool has_audio;
2090
2091                 if (i == intel_sdvo_connector->force_audio)
2092                         return 0;
2093
2094                 intel_sdvo_connector->force_audio = i;
2095
2096                 if (i == HDMI_AUDIO_AUTO)
2097                         has_audio = intel_sdvo_detect_hdmi_audio(connector);
2098                 else
2099                         has_audio = (i == HDMI_AUDIO_ON);
2100
2101                 if (has_audio == intel_sdvo->has_hdmi_audio)
2102                         return 0;
2103
2104                 intel_sdvo->has_hdmi_audio = has_audio;
2105                 goto done;
2106         }
2107
2108         if (property == dev_priv->broadcast_rgb_property) {
2109                 bool old_auto = intel_sdvo->color_range_auto;
2110                 uint32_t old_range = intel_sdvo->color_range;
2111
2112                 switch (val) {
2113                 case INTEL_BROADCAST_RGB_AUTO:
2114                         intel_sdvo->color_range_auto = true;
2115                         break;
2116                 case INTEL_BROADCAST_RGB_FULL:
2117                         intel_sdvo->color_range_auto = false;
2118                         intel_sdvo->color_range = 0;
2119                         break;
2120                 case INTEL_BROADCAST_RGB_LIMITED:
2121                         intel_sdvo->color_range_auto = false;
2122                         /* FIXME: this bit is only valid when using TMDS
2123                          * encoding and 8 bit per color mode. */
2124                         intel_sdvo->color_range = HDMI_COLOR_RANGE_16_235;
2125                         break;
2126                 default:
2127                         return -EINVAL;
2128                 }
2129
2130                 if (old_auto == intel_sdvo->color_range_auto &&
2131                     old_range == intel_sdvo->color_range)
2132                         return 0;
2133
2134                 goto done;
2135         }
2136
2137 #define CHECK_PROPERTY(name, NAME) \
2138         if (intel_sdvo_connector->name == property) { \
2139                 if (intel_sdvo_connector->cur_##name == temp_value) return 0; \
2140                 if (intel_sdvo_connector->max_##name < temp_value) return -EINVAL; \
2141                 cmd = SDVO_CMD_SET_##NAME; \
2142                 intel_sdvo_connector->cur_##name = temp_value; \
2143                 goto set_value; \
2144         }
2145
2146         if (property == intel_sdvo_connector->tv_format) {
2147                 if (val >= TV_FORMAT_NUM)
2148                         return -EINVAL;
2149
2150                 if (intel_sdvo->tv_format_index ==
2151                     intel_sdvo_connector->tv_format_supported[val])
2152                         return 0;
2153
2154                 intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[val];
2155                 goto done;
2156         } else if (IS_TV_OR_LVDS(intel_sdvo_connector)) {
2157                 temp_value = val;
2158                 if (intel_sdvo_connector->left == property) {
2159                         drm_object_property_set_value(&connector->base,
2160                                                          intel_sdvo_connector->right, val);
2161                         if (intel_sdvo_connector->left_margin == temp_value)
2162                                 return 0;
2163
2164                         intel_sdvo_connector->left_margin = temp_value;
2165                         intel_sdvo_connector->right_margin = temp_value;
2166                         temp_value = intel_sdvo_connector->max_hscan -
2167                                 intel_sdvo_connector->left_margin;
2168                         cmd = SDVO_CMD_SET_OVERSCAN_H;
2169                         goto set_value;
2170                 } else if (intel_sdvo_connector->right == property) {
2171                         drm_object_property_set_value(&connector->base,
2172                                                          intel_sdvo_connector->left, val);
2173                         if (intel_sdvo_connector->right_margin == temp_value)
2174                                 return 0;
2175
2176                         intel_sdvo_connector->left_margin = temp_value;
2177                         intel_sdvo_connector->right_margin = temp_value;
2178                         temp_value = intel_sdvo_connector->max_hscan -
2179                                 intel_sdvo_connector->left_margin;
2180                         cmd = SDVO_CMD_SET_OVERSCAN_H;
2181                         goto set_value;
2182                 } else if (intel_sdvo_connector->top == property) {
2183                         drm_object_property_set_value(&connector->base,
2184                                                          intel_sdvo_connector->bottom, val);
2185                         if (intel_sdvo_connector->top_margin == temp_value)
2186                                 return 0;
2187
2188                         intel_sdvo_connector->top_margin = temp_value;
2189                         intel_sdvo_connector->bottom_margin = temp_value;
2190                         temp_value = intel_sdvo_connector->max_vscan -
2191                                 intel_sdvo_connector->top_margin;
2192                         cmd = SDVO_CMD_SET_OVERSCAN_V;
2193                         goto set_value;
2194                 } else if (intel_sdvo_connector->bottom == property) {
2195                         drm_object_property_set_value(&connector->base,
2196                                                          intel_sdvo_connector->top, val);
2197                         if (intel_sdvo_connector->bottom_margin == temp_value)
2198                                 return 0;
2199
2200                         intel_sdvo_connector->top_margin = temp_value;
2201                         intel_sdvo_connector->bottom_margin = temp_value;
2202                         temp_value = intel_sdvo_connector->max_vscan -
2203                                 intel_sdvo_connector->top_margin;
2204                         cmd = SDVO_CMD_SET_OVERSCAN_V;
2205                         goto set_value;
2206                 }
2207                 CHECK_PROPERTY(hpos, HPOS)
2208                 CHECK_PROPERTY(vpos, VPOS)
2209                 CHECK_PROPERTY(saturation, SATURATION)
2210                 CHECK_PROPERTY(contrast, CONTRAST)
2211                 CHECK_PROPERTY(hue, HUE)
2212                 CHECK_PROPERTY(brightness, BRIGHTNESS)
2213                 CHECK_PROPERTY(sharpness, SHARPNESS)
2214                 CHECK_PROPERTY(flicker_filter, FLICKER_FILTER)
2215                 CHECK_PROPERTY(flicker_filter_2d, FLICKER_FILTER_2D)
2216                 CHECK_PROPERTY(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE)
2217                 CHECK_PROPERTY(tv_chroma_filter, TV_CHROMA_FILTER)
2218                 CHECK_PROPERTY(tv_luma_filter, TV_LUMA_FILTER)
2219                 CHECK_PROPERTY(dot_crawl, DOT_CRAWL)
2220         }
2221
2222         return -EINVAL; /* unknown property */
2223
2224 set_value:
2225         if (!intel_sdvo_set_value(intel_sdvo, cmd, &temp_value, 2))
2226                 return -EIO;
2227
2228
2229 done:
2230         if (intel_sdvo->base.base.crtc)
2231                 intel_crtc_restore_mode(intel_sdvo->base.base.crtc);
2232
2233         return 0;
2234 #undef CHECK_PROPERTY
2235 }
2236
2237 static const struct drm_connector_funcs intel_sdvo_connector_funcs = {
2238         .dpms = intel_sdvo_dpms,
2239         .detect = intel_sdvo_detect,
2240         .fill_modes = drm_helper_probe_single_connector_modes,
2241         .set_property = intel_sdvo_set_property,
2242         .destroy = intel_sdvo_destroy,
2243 };
2244
2245 static const struct drm_connector_helper_funcs intel_sdvo_connector_helper_funcs = {
2246         .get_modes = intel_sdvo_get_modes,
2247         .mode_valid = intel_sdvo_mode_valid,
2248         .best_encoder = intel_best_encoder,
2249 };
2250
2251 static void intel_sdvo_enc_destroy(struct drm_encoder *encoder)
2252 {
2253         struct intel_sdvo *intel_sdvo = to_sdvo(to_intel_encoder(encoder));
2254
2255         if (intel_sdvo->sdvo_lvds_fixed_mode != NULL)
2256                 drm_mode_destroy(encoder->dev,
2257                                  intel_sdvo->sdvo_lvds_fixed_mode);
2258
2259         device_delete_child(intel_sdvo->base.base.dev->dev,
2260             intel_sdvo->ddc_iic_bus);
2261         intel_encoder_destroy(encoder);
2262 }
2263
2264 static const struct drm_encoder_funcs intel_sdvo_enc_funcs = {
2265         .destroy = intel_sdvo_enc_destroy,
2266 };
2267
2268 static void
2269 intel_sdvo_guess_ddc_bus(struct intel_sdvo *sdvo)
2270 {
2271         uint16_t mask = 0;
2272         unsigned int num_bits;
2273
2274         /* Make a mask of outputs less than or equal to our own priority in the
2275          * list.
2276          */
2277         switch (sdvo->controlled_output) {
2278         case SDVO_OUTPUT_LVDS1:
2279                 mask |= SDVO_OUTPUT_LVDS1;
2280         case SDVO_OUTPUT_LVDS0:
2281                 mask |= SDVO_OUTPUT_LVDS0;
2282         case SDVO_OUTPUT_TMDS1:
2283                 mask |= SDVO_OUTPUT_TMDS1;
2284         case SDVO_OUTPUT_TMDS0:
2285                 mask |= SDVO_OUTPUT_TMDS0;
2286         case SDVO_OUTPUT_RGB1:
2287                 mask |= SDVO_OUTPUT_RGB1;
2288         case SDVO_OUTPUT_RGB0:
2289                 mask |= SDVO_OUTPUT_RGB0;
2290                 break;
2291         }
2292
2293         /* Count bits to find what number we are in the priority list. */
2294         mask &= sdvo->caps.output_flags;
2295         num_bits = hweight16(mask);
2296         /* If more than 3 outputs, default to DDC bus 3 for now. */
2297         if (num_bits > 3)
2298                 num_bits = 3;
2299
2300         /* Corresponds to SDVO_CONTROL_BUS_DDCx */
2301         sdvo->ddc_bus = 1 << num_bits;
2302 }
2303
2304 /**
2305  * Choose the appropriate DDC bus for control bus switch command for this
2306  * SDVO output based on the controlled output.
2307  *
2308  * DDC bus number assignment is in a priority order of RGB outputs, then TMDS
2309  * outputs, then LVDS outputs.
2310  */
2311 static void
2312 intel_sdvo_select_ddc_bus(struct drm_i915_private *dev_priv,
2313                           struct intel_sdvo *sdvo, u32 reg)
2314 {
2315         struct sdvo_device_mapping *mapping;
2316
2317         if (sdvo->is_sdvob)
2318                 mapping = &(dev_priv->sdvo_mappings[0]);
2319         else
2320                 mapping = &(dev_priv->sdvo_mappings[1]);
2321
2322         if (mapping->initialized)
2323                 sdvo->ddc_bus = 1 << ((mapping->ddc_pin & 0xf0) >> 4);
2324         else
2325                 intel_sdvo_guess_ddc_bus(sdvo);
2326 }
2327
2328 static void
2329 intel_sdvo_select_i2c_bus(struct drm_i915_private *dev_priv,
2330                           struct intel_sdvo *sdvo, u32 reg)
2331 {
2332         struct sdvo_device_mapping *mapping;
2333         u8 pin;
2334
2335         if (sdvo->is_sdvob)
2336                 mapping = &dev_priv->sdvo_mappings[0];
2337         else
2338                 mapping = &dev_priv->sdvo_mappings[1];
2339
2340         if (mapping->initialized && intel_gmbus_is_port_valid(mapping->i2c_pin))
2341                 pin = mapping->i2c_pin;
2342         else
2343                 pin = GMBUS_PORT_DPB;
2344
2345         sdvo->i2c = intel_gmbus_get_adapter(dev_priv, pin);
2346
2347         /* With gmbus we should be able to drive sdvo i2c at 2MHz, but somehow
2348          * our code totally fails once we start using gmbus. Hence fall back to
2349          * bit banging for now. */
2350         intel_gmbus_force_bit(sdvo->i2c, true);
2351 }
2352
2353 /* undo any changes intel_sdvo_select_i2c_bus() did to sdvo->i2c */
2354 static void
2355 intel_sdvo_unselect_i2c_bus(struct intel_sdvo *sdvo)
2356 {
2357         intel_gmbus_force_bit(sdvo->i2c, false);
2358 }
2359
2360 static bool
2361 intel_sdvo_is_hdmi_connector(struct intel_sdvo *intel_sdvo, int device)
2362 {
2363         return intel_sdvo_check_supp_encode(intel_sdvo);
2364 }
2365
2366 static u8
2367 intel_sdvo_get_slave_addr(struct drm_device *dev, struct intel_sdvo *sdvo)
2368 {
2369         struct drm_i915_private *dev_priv = dev->dev_private;
2370         struct sdvo_device_mapping *my_mapping, *other_mapping;
2371
2372         if (sdvo->is_sdvob) {
2373                 my_mapping = &dev_priv->sdvo_mappings[0];
2374                 other_mapping = &dev_priv->sdvo_mappings[1];
2375         } else {
2376                 my_mapping = &dev_priv->sdvo_mappings[1];
2377                 other_mapping = &dev_priv->sdvo_mappings[0];
2378         }
2379
2380         /* If the BIOS described our SDVO device, take advantage of it. */
2381         if (my_mapping->slave_addr)
2382                 return my_mapping->slave_addr;
2383
2384         /* If the BIOS only described a different SDVO device, use the
2385          * address that it isn't using.
2386          */
2387         if (other_mapping->slave_addr) {
2388                 if (other_mapping->slave_addr == 0x70)
2389                         return 0x72;
2390                 else
2391                         return 0x70;
2392         }
2393
2394         /* No SDVO device info is found for another DVO port,
2395          * so use mapping assumption we had before BIOS parsing.
2396          */
2397         if (sdvo->is_sdvob)
2398                 return 0x70;
2399         else
2400                 return 0x72;
2401 }
2402
2403 static void
2404 intel_sdvo_connector_unregister(struct intel_connector *intel_connector)
2405 {
2406         struct drm_connector *drm_connector;
2407         struct intel_sdvo *sdvo_encoder;
2408
2409         drm_connector = &intel_connector->base;
2410         sdvo_encoder = intel_attached_sdvo(&intel_connector->base);
2411
2412         intel_connector_unregister(intel_connector);
2413 }
2414
2415 static int
2416 intel_sdvo_connector_init(struct intel_sdvo_connector *connector,
2417                           struct intel_sdvo *encoder)
2418 {
2419         struct drm_connector *drm_connector;
2420         int ret;
2421
2422         drm_connector = &connector->base.base;
2423         ret = drm_connector_init(encoder->base.base.dev,
2424                            drm_connector,
2425                            &intel_sdvo_connector_funcs,
2426                            connector->base.base.connector_type);
2427         if (ret < 0)
2428                 return ret;
2429
2430         drm_connector_helper_add(drm_connector,
2431                                  &intel_sdvo_connector_helper_funcs);
2432
2433         connector->base.base.interlace_allowed = 1;
2434         connector->base.base.doublescan_allowed = 0;
2435         connector->base.base.display_info.subpixel_order = SubPixelHorizontalRGB;
2436         connector->base.get_hw_state = intel_sdvo_connector_get_hw_state;
2437         connector->base.unregister = intel_sdvo_connector_unregister;
2438
2439         intel_connector_attach_encoder(&connector->base, &encoder->base);
2440         ret = drm_sysfs_connector_add(drm_connector);
2441         if (ret < 0)
2442                 goto err1;
2443
2444 #if 0
2445         ret = sysfs_create_link(&encoder->ddc.dev.kobj,
2446                                 &drm_connector->kdev->kobj,
2447                                 encoder->ddc.dev.kobj.name);
2448         if (ret < 0)
2449                 goto err2;
2450
2451         return 0;
2452
2453 err2:
2454 #endif
2455         drm_sysfs_connector_remove(drm_connector);
2456 err1:
2457         drm_connector_cleanup(drm_connector);
2458
2459         return ret;
2460 }
2461
2462 static void
2463 intel_sdvo_add_hdmi_properties(struct intel_sdvo *intel_sdvo,
2464                                struct intel_sdvo_connector *connector)
2465 {
2466         struct drm_device *dev = connector->base.base.dev;
2467
2468         intel_attach_force_audio_property(&connector->base.base);
2469         if (INTEL_INFO(dev)->gen >= 4 && IS_MOBILE(dev)) {
2470                 intel_attach_broadcast_rgb_property(&connector->base.base);
2471                 intel_sdvo->color_range_auto = true;
2472         }
2473 }
2474
2475 static bool
2476 intel_sdvo_dvi_init(struct intel_sdvo *intel_sdvo, int device)
2477 {
2478         struct drm_encoder *encoder = &intel_sdvo->base.base;
2479         struct drm_connector *connector;
2480         struct intel_encoder *intel_encoder = to_intel_encoder(encoder);
2481         struct intel_connector *intel_connector;
2482         struct intel_sdvo_connector *intel_sdvo_connector;
2483
2484         DRM_DEBUG_KMS("initialising DVI device %d\n", device);
2485
2486         intel_sdvo_connector = kzalloc(sizeof(*intel_sdvo_connector), GFP_KERNEL);
2487         if (!intel_sdvo_connector)
2488                 return false;
2489
2490         if (device == 0) {
2491                 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS0;
2492                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS0;
2493         } else if (device == 1) {
2494                 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS1;
2495                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS1;
2496         }
2497
2498         intel_connector = &intel_sdvo_connector->base;
2499         connector = &intel_connector->base;
2500         if (intel_sdvo_get_hotplug_support(intel_sdvo) &
2501                 intel_sdvo_connector->output_flag) {
2502                 intel_sdvo->hotplug_active |= intel_sdvo_connector->output_flag;
2503                 /* Some SDVO devices have one-shot hotplug interrupts.
2504                  * Ensure that they get re-enabled when an interrupt happens.
2505                  */
2506                 intel_encoder->hot_plug = intel_sdvo_enable_hotplug;
2507                 intel_sdvo_enable_hotplug(intel_encoder);
2508         } else {
2509                 intel_connector->polled = DRM_CONNECTOR_POLL_CONNECT | DRM_CONNECTOR_POLL_DISCONNECT;
2510         }
2511         encoder->encoder_type = DRM_MODE_ENCODER_TMDS;
2512         connector->connector_type = DRM_MODE_CONNECTOR_DVID;
2513
2514         if (intel_sdvo_is_hdmi_connector(intel_sdvo, device)) {
2515                 connector->connector_type = DRM_MODE_CONNECTOR_HDMIA;
2516                 intel_sdvo->is_hdmi = true;
2517         }
2518
2519         if (intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo) < 0) {
2520                 kfree(intel_sdvo_connector);
2521                 return false;
2522         }
2523
2524         if (intel_sdvo->is_hdmi)
2525                 intel_sdvo_add_hdmi_properties(intel_sdvo, intel_sdvo_connector);
2526
2527         return true;
2528 }
2529
2530 static bool
2531 intel_sdvo_tv_init(struct intel_sdvo *intel_sdvo, int type)
2532 {
2533         struct drm_encoder *encoder = &intel_sdvo->base.base;
2534         struct drm_connector *connector;
2535         struct intel_connector *intel_connector;
2536         struct intel_sdvo_connector *intel_sdvo_connector;
2537
2538         DRM_DEBUG_KMS("initialising TV type %d\n", type);
2539
2540         intel_sdvo_connector = kzalloc(sizeof(*intel_sdvo_connector), GFP_KERNEL);
2541         if (!intel_sdvo_connector)
2542                 return false;
2543
2544         intel_connector = &intel_sdvo_connector->base;
2545         connector = &intel_connector->base;
2546         encoder->encoder_type = DRM_MODE_ENCODER_TVDAC;
2547         connector->connector_type = DRM_MODE_CONNECTOR_SVIDEO;
2548
2549         intel_sdvo->controlled_output |= type;
2550         intel_sdvo_connector->output_flag = type;
2551
2552         intel_sdvo->is_tv = true;
2553
2554         if (intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo) < 0) {
2555                 kfree(intel_sdvo_connector);
2556                 return false;
2557         }
2558
2559         if (!intel_sdvo_tv_create_property(intel_sdvo, intel_sdvo_connector, type))
2560                 goto err;
2561
2562         if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
2563                 goto err;
2564
2565         return true;
2566
2567 err:
2568         drm_sysfs_connector_remove(connector);
2569         intel_sdvo_destroy(connector);
2570         return false;
2571 }
2572
2573 static bool
2574 intel_sdvo_analog_init(struct intel_sdvo *intel_sdvo, int device)
2575 {
2576         struct drm_encoder *encoder = &intel_sdvo->base.base;
2577         struct drm_connector *connector;
2578         struct intel_connector *intel_connector;
2579         struct intel_sdvo_connector *intel_sdvo_connector;
2580
2581         DRM_DEBUG_KMS("initialising analog device %d\n", device);
2582
2583         intel_sdvo_connector = kzalloc(sizeof(*intel_sdvo_connector), GFP_KERNEL);
2584         if (!intel_sdvo_connector)
2585                 return false;
2586
2587         intel_connector = &intel_sdvo_connector->base;
2588         connector = &intel_connector->base;
2589         intel_connector->polled = DRM_CONNECTOR_POLL_CONNECT;
2590         encoder->encoder_type = DRM_MODE_ENCODER_DAC;
2591         connector->connector_type = DRM_MODE_CONNECTOR_VGA;
2592
2593         if (device == 0) {
2594                 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB0;
2595                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB0;
2596         } else if (device == 1) {
2597                 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB1;
2598                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB1;
2599         }
2600
2601         if (intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo) < 0) {
2602                 kfree(intel_sdvo_connector);
2603                 return false;
2604         }
2605
2606         return true;
2607 }
2608
2609 static bool
2610 intel_sdvo_lvds_init(struct intel_sdvo *intel_sdvo, int device)
2611 {
2612         struct drm_encoder *encoder = &intel_sdvo->base.base;
2613         struct drm_connector *connector;
2614         struct intel_connector *intel_connector;
2615         struct intel_sdvo_connector *intel_sdvo_connector;
2616
2617         DRM_DEBUG_KMS("initialising LVDS device %d\n", device);
2618
2619         intel_sdvo_connector = kzalloc(sizeof(*intel_sdvo_connector), GFP_KERNEL);
2620         if (!intel_sdvo_connector)
2621                 return false;
2622
2623         intel_connector = &intel_sdvo_connector->base;
2624         connector = &intel_connector->base;
2625         encoder->encoder_type = DRM_MODE_ENCODER_LVDS;
2626         connector->connector_type = DRM_MODE_CONNECTOR_LVDS;
2627
2628         if (device == 0) {
2629                 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS0;
2630                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS0;
2631         } else if (device == 1) {
2632                 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS1;
2633                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS1;
2634         }
2635
2636         if (intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo) < 0) {
2637                 kfree(intel_sdvo_connector);
2638                 return false;
2639         }
2640
2641         if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
2642                 goto err;
2643
2644         return true;
2645
2646 err:
2647         drm_sysfs_connector_remove(connector);
2648         intel_sdvo_destroy(connector);
2649         return false;
2650 }
2651
2652 static bool
2653 intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags)
2654 {
2655         intel_sdvo->is_tv = false;
2656         intel_sdvo->is_lvds = false;
2657
2658         /* SDVO requires XXX1 function may not exist unless it has XXX0 function.*/
2659
2660         if (flags & SDVO_OUTPUT_TMDS0)
2661                 if (!intel_sdvo_dvi_init(intel_sdvo, 0))
2662                         return false;
2663
2664         if ((flags & SDVO_TMDS_MASK) == SDVO_TMDS_MASK)
2665                 if (!intel_sdvo_dvi_init(intel_sdvo, 1))
2666                         return false;
2667
2668         /* TV has no XXX1 function block */
2669         if (flags & SDVO_OUTPUT_SVID0)
2670                 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_SVID0))
2671                         return false;
2672
2673         if (flags & SDVO_OUTPUT_CVBS0)
2674                 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_CVBS0))
2675                         return false;
2676
2677         if (flags & SDVO_OUTPUT_YPRPB0)
2678                 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_YPRPB0))
2679                         return false;
2680
2681         if (flags & SDVO_OUTPUT_RGB0)
2682                 if (!intel_sdvo_analog_init(intel_sdvo, 0))
2683                         return false;
2684
2685         if ((flags & SDVO_RGB_MASK) == SDVO_RGB_MASK)
2686                 if (!intel_sdvo_analog_init(intel_sdvo, 1))
2687                         return false;
2688
2689         if (flags & SDVO_OUTPUT_LVDS0)
2690                 if (!intel_sdvo_lvds_init(intel_sdvo, 0))
2691                         return false;
2692
2693         if ((flags & SDVO_LVDS_MASK) == SDVO_LVDS_MASK)
2694                 if (!intel_sdvo_lvds_init(intel_sdvo, 1))
2695                         return false;
2696
2697         if ((flags & SDVO_OUTPUT_MASK) == 0) {
2698                 unsigned char bytes[2];
2699
2700                 intel_sdvo->controlled_output = 0;
2701                 memcpy(bytes, &intel_sdvo->caps.output_flags, 2);
2702                 DRM_DEBUG_KMS("%s: Unknown SDVO output type (0x%02x%02x)\n",
2703                               SDVO_NAME(intel_sdvo),
2704                               bytes[0], bytes[1]);
2705                 return false;
2706         }
2707         intel_sdvo->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
2708
2709         return true;
2710 }
2711
2712 static void intel_sdvo_output_cleanup(struct intel_sdvo *intel_sdvo)
2713 {
2714         struct drm_device *dev = intel_sdvo->base.base.dev;
2715         struct drm_connector *connector, *tmp;
2716
2717         list_for_each_entry_safe(connector, tmp,
2718                                  &dev->mode_config.connector_list, head) {
2719                 if (intel_attached_encoder(connector) == &intel_sdvo->base) {
2720                         drm_sysfs_connector_remove(connector);
2721                         intel_sdvo_destroy(connector);
2722                 }
2723         }
2724 }
2725
2726 static bool intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
2727                                           struct intel_sdvo_connector *intel_sdvo_connector,
2728                                           int type)
2729 {
2730         struct drm_device *dev = intel_sdvo->base.base.dev;
2731         struct intel_sdvo_tv_format format;
2732         uint32_t format_map, i;
2733
2734         if (!intel_sdvo_set_target_output(intel_sdvo, type))
2735                 return false;
2736
2737         BUILD_BUG_ON(sizeof(format) != 6);
2738         if (!intel_sdvo_get_value(intel_sdvo,
2739                                   SDVO_CMD_GET_SUPPORTED_TV_FORMATS,
2740                                   &format, sizeof(format)))
2741                 return false;
2742
2743         memcpy(&format_map, &format, min(sizeof(format_map), sizeof(format)));
2744
2745         if (format_map == 0)
2746                 return false;
2747
2748         intel_sdvo_connector->format_supported_num = 0;
2749         for (i = 0 ; i < TV_FORMAT_NUM; i++)
2750                 if (format_map & (1 << i))
2751                         intel_sdvo_connector->tv_format_supported[intel_sdvo_connector->format_supported_num++] = i;
2752
2753
2754         intel_sdvo_connector->tv_format =
2755                         drm_property_create(dev, DRM_MODE_PROP_ENUM,
2756                                             "mode", intel_sdvo_connector->format_supported_num);
2757         if (!intel_sdvo_connector->tv_format)
2758                 return false;
2759
2760         for (i = 0; i < intel_sdvo_connector->format_supported_num; i++)
2761                 drm_property_add_enum(
2762                                 intel_sdvo_connector->tv_format, i,
2763                                 i, tv_format_names[intel_sdvo_connector->tv_format_supported[i]]);
2764
2765         intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[0];
2766         drm_object_attach_property(&intel_sdvo_connector->base.base.base,
2767                                       intel_sdvo_connector->tv_format, 0);
2768         return true;
2769
2770 }
2771
2772 #define ENHANCEMENT(name, NAME) do { \
2773         if (enhancements.name) { \
2774                 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_MAX_##NAME, &data_value, 4) || \
2775                     !intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_##NAME, &response, 2)) \
2776                         return false; \
2777                 intel_sdvo_connector->max_##name = data_value[0]; \
2778                 intel_sdvo_connector->cur_##name = response; \
2779                 intel_sdvo_connector->name = \
2780                         drm_property_create_range(dev, 0, #name, 0, data_value[0]); \
2781                 if (!intel_sdvo_connector->name) return false; \
2782                 drm_object_attach_property(&connector->base, \
2783                                               intel_sdvo_connector->name, \
2784                                               intel_sdvo_connector->cur_##name); \
2785                 DRM_DEBUG_KMS(#name ": max %d, default %d, current %d\n", \
2786                               data_value[0], data_value[1], response); \
2787         } \
2788 } while (0)
2789
2790 static bool
2791 intel_sdvo_create_enhance_property_tv(struct intel_sdvo *intel_sdvo,
2792                                       struct intel_sdvo_connector *intel_sdvo_connector,
2793                                       struct intel_sdvo_enhancements_reply enhancements)
2794 {
2795         struct drm_device *dev = intel_sdvo->base.base.dev;
2796         struct drm_connector *connector = &intel_sdvo_connector->base.base;
2797         uint16_t response, data_value[2];
2798
2799         /* when horizontal overscan is supported, Add the left/right  property */
2800         if (enhancements.overscan_h) {
2801                 if (!intel_sdvo_get_value(intel_sdvo,
2802                                           SDVO_CMD_GET_MAX_OVERSCAN_H,
2803                                           &data_value, 4))
2804                         return false;
2805
2806                 if (!intel_sdvo_get_value(intel_sdvo,
2807                                           SDVO_CMD_GET_OVERSCAN_H,
2808                                           &response, 2))
2809                         return false;
2810
2811                 intel_sdvo_connector->max_hscan = data_value[0];
2812                 intel_sdvo_connector->left_margin = data_value[0] - response;
2813                 intel_sdvo_connector->right_margin = intel_sdvo_connector->left_margin;
2814                 intel_sdvo_connector->left =
2815                         drm_property_create_range(dev, 0, "left_margin", 0, data_value[0]);
2816                 if (!intel_sdvo_connector->left)
2817                         return false;
2818
2819                 drm_object_attach_property(&connector->base,
2820                                               intel_sdvo_connector->left,
2821                                               intel_sdvo_connector->left_margin);
2822
2823                 intel_sdvo_connector->right =
2824                         drm_property_create_range(dev, 0, "right_margin", 0, data_value[0]);
2825                 if (!intel_sdvo_connector->right)
2826                         return false;
2827
2828                 drm_object_attach_property(&connector->base,
2829                                               intel_sdvo_connector->right,
2830                                               intel_sdvo_connector->right_margin);
2831                 DRM_DEBUG_KMS("h_overscan: max %d, "
2832                               "default %d, current %d\n",
2833                               data_value[0], data_value[1], response);
2834         }
2835
2836         if (enhancements.overscan_v) {
2837                 if (!intel_sdvo_get_value(intel_sdvo,
2838                                           SDVO_CMD_GET_MAX_OVERSCAN_V,
2839                                           &data_value, 4))
2840                         return false;
2841
2842                 if (!intel_sdvo_get_value(intel_sdvo,
2843                                           SDVO_CMD_GET_OVERSCAN_V,
2844                                           &response, 2))
2845                         return false;
2846
2847                 intel_sdvo_connector->max_vscan = data_value[0];
2848                 intel_sdvo_connector->top_margin = data_value[0] - response;
2849                 intel_sdvo_connector->bottom_margin = intel_sdvo_connector->top_margin;
2850                 intel_sdvo_connector->top =
2851                         drm_property_create_range(dev, 0,
2852                                             "top_margin", 0, data_value[0]);
2853                 if (!intel_sdvo_connector->top)
2854                         return false;
2855
2856                 drm_object_attach_property(&connector->base,
2857                                               intel_sdvo_connector->top,
2858                                               intel_sdvo_connector->top_margin);
2859
2860                 intel_sdvo_connector->bottom =
2861                         drm_property_create_range(dev, 0,
2862                                             "bottom_margin", 0, data_value[0]);
2863                 if (!intel_sdvo_connector->bottom)
2864                         return false;
2865
2866                 drm_object_attach_property(&connector->base,
2867                                               intel_sdvo_connector->bottom,
2868                                               intel_sdvo_connector->bottom_margin);
2869                 DRM_DEBUG_KMS("v_overscan: max %d, "
2870                               "default %d, current %d\n",
2871                               data_value[0], data_value[1], response);
2872         }
2873
2874         ENHANCEMENT(hpos, HPOS);
2875         ENHANCEMENT(vpos, VPOS);
2876         ENHANCEMENT(saturation, SATURATION);
2877         ENHANCEMENT(contrast, CONTRAST);
2878         ENHANCEMENT(hue, HUE);
2879         ENHANCEMENT(sharpness, SHARPNESS);
2880         ENHANCEMENT(brightness, BRIGHTNESS);
2881         ENHANCEMENT(flicker_filter, FLICKER_FILTER);
2882         ENHANCEMENT(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE);
2883         ENHANCEMENT(flicker_filter_2d, FLICKER_FILTER_2D);
2884         ENHANCEMENT(tv_chroma_filter, TV_CHROMA_FILTER);
2885         ENHANCEMENT(tv_luma_filter, TV_LUMA_FILTER);
2886
2887         if (enhancements.dot_crawl) {
2888                 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_DOT_CRAWL, &response, 2))
2889                         return false;
2890
2891                 intel_sdvo_connector->max_dot_crawl = 1;
2892                 intel_sdvo_connector->cur_dot_crawl = response & 0x1;
2893                 intel_sdvo_connector->dot_crawl =
2894                         drm_property_create_range(dev, 0, "dot_crawl", 0, 1);
2895                 if (!intel_sdvo_connector->dot_crawl)
2896                         return false;
2897
2898                 drm_object_attach_property(&connector->base,
2899                                               intel_sdvo_connector->dot_crawl,
2900                                               intel_sdvo_connector->cur_dot_crawl);
2901                 DRM_DEBUG_KMS("dot crawl: current %d\n", response);
2902         }
2903
2904         return true;
2905 }
2906
2907 static bool
2908 intel_sdvo_create_enhance_property_lvds(struct intel_sdvo *intel_sdvo,
2909                                         struct intel_sdvo_connector *intel_sdvo_connector,
2910                                         struct intel_sdvo_enhancements_reply enhancements)
2911 {
2912         struct drm_device *dev = intel_sdvo->base.base.dev;
2913         struct drm_connector *connector = &intel_sdvo_connector->base.base;
2914         uint16_t response, data_value[2];
2915
2916         ENHANCEMENT(brightness, BRIGHTNESS);
2917
2918         return true;
2919 }
2920 #undef ENHANCEMENT
2921
2922 static bool intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
2923                                                struct intel_sdvo_connector *intel_sdvo_connector)
2924 {
2925         union {
2926                 struct intel_sdvo_enhancements_reply reply;
2927                 uint16_t response;
2928         } enhancements;
2929
2930         BUILD_BUG_ON(sizeof(enhancements) != 2);
2931
2932         enhancements.response = 0;
2933         intel_sdvo_get_value(intel_sdvo,
2934                              SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS,
2935                              &enhancements, sizeof(enhancements));
2936         if (enhancements.response == 0) {
2937                 DRM_DEBUG_KMS("No enhancement is supported\n");
2938                 return true;
2939         }
2940
2941         if (IS_TV(intel_sdvo_connector))
2942                 return intel_sdvo_create_enhance_property_tv(intel_sdvo, intel_sdvo_connector, enhancements.reply);
2943         else if (IS_LVDS(intel_sdvo_connector))
2944                 return intel_sdvo_create_enhance_property_lvds(intel_sdvo, intel_sdvo_connector, enhancements.reply);
2945         else
2946                 return true;
2947 }
2948
2949 struct intel_sdvo_ddc_proxy_sc {
2950         struct intel_sdvo *intel_sdvo;
2951         device_t port;
2952 };
2953
2954 static int
2955 intel_sdvo_ddc_proxy_probe(device_t idev)
2956 {
2957
2958         return (BUS_PROBE_DEFAULT);
2959 }
2960
2961 static int
2962 intel_sdvo_ddc_proxy_attach(device_t idev)
2963 {
2964         struct intel_sdvo_ddc_proxy_sc *sc;
2965
2966         sc = device_get_softc(idev);
2967         sc->port = device_add_child(idev, "iicbus", -1);
2968         if (sc->port == NULL)
2969                 return (ENXIO);
2970         device_quiet(sc->port);
2971         bus_generic_attach(idev);
2972         return (0);
2973 }
2974
2975 static int
2976 intel_sdvo_ddc_proxy_detach(device_t idev)
2977 {
2978         struct intel_sdvo_ddc_proxy_sc *sc;
2979         device_t port;
2980
2981         sc = device_get_softc(idev);
2982         port = sc->port;
2983         bus_generic_detach(idev);
2984         if (port != NULL)
2985                 device_delete_child(idev, port);
2986         return (0);
2987 }
2988
2989 static int
2990 intel_sdvo_ddc_proxy_reset(device_t idev, u_char speed, u_char addr,
2991     u_char *oldaddr)
2992 {
2993         struct intel_sdvo_ddc_proxy_sc *sc;
2994         struct intel_sdvo *sdvo;
2995
2996         sc = device_get_softc(idev);
2997         sdvo = sc->intel_sdvo;
2998
2999         return (IICBUS_RESET(device_get_parent(sdvo->i2c), speed, addr,
3000             oldaddr));
3001 }
3002
3003 static int intel_sdvo_ddc_proxy_xfer(struct device *adapter,
3004                                      struct i2c_msg *msgs,
3005                                      int num)
3006 {
3007         struct intel_sdvo_ddc_proxy_sc *sc = device_get_softc(adapter);
3008         struct intel_sdvo *sdvo = sc->intel_sdvo;
3009
3010         if (!intel_sdvo_set_control_bus_switch(sdvo, sdvo->ddc_bus))
3011                 return -EIO;
3012
3013         return (iicbus_transfer(sdvo->i2c, msgs, num));
3014 }
3015
3016 static bool
3017 intel_sdvo_init_ddc_proxy(struct intel_sdvo *sdvo, struct drm_device *dev,
3018     int sdvo_reg)
3019 {
3020         struct intel_sdvo_ddc_proxy_sc *sc;
3021         int ret;
3022
3023         sdvo->ddc_iic_bus = device_add_child(dev->dev,
3024             "intel_sdvo_ddc_proxy", sdvo_reg);
3025         if (sdvo->ddc_iic_bus == NULL) {
3026                 DRM_ERROR("cannot create ddc proxy bus %d\n", sdvo_reg);
3027                 return (false);
3028         }
3029         device_quiet(sdvo->ddc_iic_bus);
3030         ret = device_probe_and_attach(sdvo->ddc_iic_bus);
3031         if (ret != 0) {
3032                 DRM_ERROR("cannot attach proxy bus %d error %d\n",
3033                     sdvo_reg, ret);
3034                 device_delete_child(dev->dev, sdvo->ddc_iic_bus);
3035                 return (false);
3036         }
3037         sc = device_get_softc(sdvo->ddc_iic_bus);
3038         sc->intel_sdvo = sdvo;
3039
3040         sdvo->ddc = sc->port;
3041         return (true);
3042 }
3043
3044 static device_method_t intel_sdvo_ddc_proxy_methods[] = {
3045         DEVMETHOD(device_probe,         intel_sdvo_ddc_proxy_probe),
3046         DEVMETHOD(device_attach,        intel_sdvo_ddc_proxy_attach),
3047         DEVMETHOD(device_detach,        intel_sdvo_ddc_proxy_detach),
3048         DEVMETHOD(iicbus_reset,         intel_sdvo_ddc_proxy_reset),
3049         DEVMETHOD(iicbus_transfer,      intel_sdvo_ddc_proxy_xfer),
3050         DEVMETHOD_END
3051 };
3052 static driver_t intel_sdvo_ddc_proxy_driver = {
3053         "intel_sdvo_ddc_proxy",
3054         intel_sdvo_ddc_proxy_methods,
3055         sizeof(struct intel_sdvo_ddc_proxy_sc)
3056 };
3057 static devclass_t intel_sdvo_devclass;
3058 DRIVER_MODULE_ORDERED(intel_sdvo_ddc_proxy, drm, intel_sdvo_ddc_proxy_driver,
3059     intel_sdvo_devclass, 0, 0, SI_ORDER_FIRST);
3060
3061 bool intel_sdvo_init(struct drm_device *dev, uint32_t sdvo_reg, bool is_sdvob)
3062 {
3063         struct drm_i915_private *dev_priv = dev->dev_private;
3064         struct intel_encoder *intel_encoder;
3065         struct intel_sdvo *intel_sdvo;
3066         int i;
3067         intel_sdvo = kzalloc(sizeof(*intel_sdvo), GFP_KERNEL);
3068         if (!intel_sdvo)
3069                 return false;
3070
3071         intel_sdvo->sdvo_reg = sdvo_reg;
3072         intel_sdvo->is_sdvob = is_sdvob;
3073         intel_sdvo->slave_addr = intel_sdvo_get_slave_addr(dev, intel_sdvo) >> 1;
3074         intel_sdvo_select_i2c_bus(dev_priv, intel_sdvo, sdvo_reg);
3075         if (!intel_sdvo_init_ddc_proxy(intel_sdvo, dev, sdvo_reg))
3076                 goto err_i2c_bus;
3077
3078         /* encoder type will be decided later */
3079         intel_encoder = &intel_sdvo->base;
3080         intel_encoder->type = INTEL_OUTPUT_SDVO;
3081         drm_encoder_init(dev, &intel_encoder->base, &intel_sdvo_enc_funcs, 0);
3082
3083         /* Read the regs to test if we can talk to the device */
3084         for (i = 0; i < 0x40; i++) {
3085                 u8 byte;
3086
3087                 if (!intel_sdvo_read_byte(intel_sdvo, i, &byte)) {
3088                         DRM_DEBUG_KMS("No SDVO device found on %s\n",
3089                                       SDVO_NAME(intel_sdvo));
3090                         goto err;
3091                 }
3092         }
3093
3094         intel_encoder->compute_config = intel_sdvo_compute_config;
3095         intel_encoder->disable = intel_disable_sdvo;
3096         intel_encoder->pre_enable = intel_sdvo_pre_enable;
3097         intel_encoder->enable = intel_enable_sdvo;
3098         intel_encoder->get_hw_state = intel_sdvo_get_hw_state;
3099         intel_encoder->get_config = intel_sdvo_get_config;
3100
3101         /* In default case sdvo lvds is false */
3102         if (!intel_sdvo_get_capabilities(intel_sdvo, &intel_sdvo->caps))
3103                 goto err;
3104
3105         if (intel_sdvo_output_setup(intel_sdvo,
3106                                     intel_sdvo->caps.output_flags) != true) {
3107                 DRM_DEBUG_KMS("SDVO output failed to setup on %s\n",
3108                               SDVO_NAME(intel_sdvo));
3109                 /* Output_setup can leave behind connectors! */
3110                 goto err_output;
3111         }
3112
3113         /* Only enable the hotplug irq if we need it, to work around noisy
3114          * hotplug lines.
3115          */
3116         if (intel_sdvo->hotplug_active) {
3117                 intel_encoder->hpd_pin =
3118                         intel_sdvo->is_sdvob ?  HPD_SDVO_B : HPD_SDVO_C;
3119         }
3120
3121         /*
3122          * Cloning SDVO with anything is often impossible, since the SDVO
3123          * encoder can request a special input timing mode. And even if that's
3124          * not the case we have evidence that cloning a plain unscaled mode with
3125          * VGA doesn't really work. Furthermore the cloning flags are way too
3126          * simplistic anyway to express such constraints, so just give up on
3127          * cloning for SDVO encoders.
3128          */
3129         intel_sdvo->base.cloneable = 0;
3130
3131         intel_sdvo_select_ddc_bus(dev_priv, intel_sdvo, sdvo_reg);
3132
3133         /* Set the input timing to the screen. Assume always input 0. */
3134         if (!intel_sdvo_set_target_input(intel_sdvo))
3135                 goto err_output;
3136
3137         if (!intel_sdvo_get_input_pixel_clock_range(intel_sdvo,
3138                                                     &intel_sdvo->pixel_clock_min,
3139                                                     &intel_sdvo->pixel_clock_max))
3140                 goto err_output;
3141
3142         DRM_DEBUG_KMS("%s device VID/DID: %02X:%02X.%02X, "
3143                         "clock range %dMHz - %dMHz, "
3144                         "input 1: %c, input 2: %c, "
3145                         "output 1: %c, output 2: %c\n",
3146                         SDVO_NAME(intel_sdvo),
3147                         intel_sdvo->caps.vendor_id, intel_sdvo->caps.device_id,
3148                         intel_sdvo->caps.device_rev_id,
3149                         intel_sdvo->pixel_clock_min / 1000,
3150                         intel_sdvo->pixel_clock_max / 1000,
3151                         (intel_sdvo->caps.sdvo_inputs_mask & 0x1) ? 'Y' : 'N',
3152                         (intel_sdvo->caps.sdvo_inputs_mask & 0x2) ? 'Y' : 'N',
3153                         /* check currently supported outputs */
3154                         intel_sdvo->caps.output_flags &
3155                         (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_RGB0) ? 'Y' : 'N',
3156                         intel_sdvo->caps.output_flags &
3157                         (SDVO_OUTPUT_TMDS1 | SDVO_OUTPUT_RGB1) ? 'Y' : 'N');
3158         return true;
3159
3160 err_output:
3161         intel_sdvo_output_cleanup(intel_sdvo);
3162
3163 err:
3164         drm_encoder_cleanup(&intel_encoder->base);
3165 err_i2c_bus:
3166         intel_sdvo_unselect_i2c_bus(intel_sdvo);
3167         kfree(intel_sdvo);
3168
3169         return false;
3170 }