1 ; Options for the IA-32 and AMD64 ports of the compiler.
3 ; Copyright (C) 2005-2015 Free Software Foundation, Inc.
5 ; This file is part of GCC.
7 ; GCC is free software; you can redistribute it and/or modify it under
8 ; the terms of the GNU General Public License as published by the Free
9 ; Software Foundation; either version 3, or (at your option) any later
12 ; GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 ; WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 ; FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 ; You should have received a copy of the GNU General Public License
18 ; along with GCC; see the file COPYING3. If not see
19 ; <http://www.gnu.org/licenses/>.
22 config/i386/i386-opts.h
24 ; Bit flags that specify the ISA we are compiling for.
26 HOST_WIDE_INT ix86_isa_flags = TARGET_64BIT_DEFAULT | TARGET_SUBTARGET_ISA_DEFAULT
28 ; A mask of ix86_isa_flags that includes bit X if X was set or cleared
29 ; on the command line.
31 HOST_WIDE_INT ix86_isa_flags_explicit
34 int recip_mask = RECIP_MASK_DEFAULT
37 int recip_mask_explicit
40 int x_recip_mask_explicit
42 ;; Definitions to add to the cl_target_option structure
51 ;; -march= processor-string
53 const char *x_ix86_arch_string
55 ;; -mtune= processor-string
57 const char *x_ix86_tune_string
61 unsigned char schedule
63 ;; True if processor has SSE prefetch instruction.
65 unsigned char prefetch_sse
69 unsigned char branch_cost
71 ;; which flags were passed by the user
73 HOST_WIDE_INT x_ix86_isa_flags_explicit
75 ;; which flags were passed by the user
77 int ix86_target_flags_explicit
79 ;; which flags were passed by the user
81 HOST_WIDE_INT x_ix86_target_flags_explicit
83 ;; whether -mtune was not specified
85 unsigned char tune_defaulted
87 ;; whether -march was specified
89 unsigned char arch_specified
93 enum cmodel x_ix86_cmodel
97 enum calling_abi x_ix86_abi
101 enum asm_dialect x_ix86_asm_dialect
105 int x_ix86_branch_cost
107 ;; -mdump-tune-features=
109 int x_ix86_dump_tunes
113 int x_ix86_force_align_arg_pointer
117 int x_ix86_force_drap
119 ;; -mincoming-stack-boundary=
121 int x_ix86_incoming_stack_boundary_arg
125 enum pmode x_ix86_pmode
127 ;; -mpreferred-stack-boundary=
129 int x_ix86_preferred_stack_boundary_arg
133 const char *x_ix86_recip_name
139 ;; -mlarge-data-threshold=
141 int x_ix86_section_threshold
147 ;; -mstack-protector-guard=
149 enum stack_protector_guard x_ix86_stack_protector_guard
151 ;; -mstringop-strategy=
153 enum stringop_alg x_ix86_stringop_alg
157 enum tls_dialect x_ix86_tls_dialect
161 const char *x_ix86_tune_ctrl_string
163 ;; -mmemcpy-strategy=
165 const char *x_ix86_tune_memcpy_strategy
167 ;; -mmemset-strategy=
169 const char *x_ix86_tune_memset_strategy
173 int x_ix86_tune_no_default
177 enum ix86_veclibabi x_ix86_veclibabi_type
181 Target RejectNegative Report Mask(128BIT_LONG_DOUBLE) Save
182 sizeof(long double) is 16
185 Target Report Mask(80387) Save
189 Target RejectNegative Report InverseMask(128BIT_LONG_DOUBLE) Save
190 sizeof(long double) is 12
193 Target Report RejectNegative Negative(mlong-double-64) InverseMask(LONG_DOUBLE_64) Save
194 Use 80-bit long double
197 Target Report RejectNegative Negative(mlong-double-128) Mask(LONG_DOUBLE_64) InverseMask(LONG_DOUBLE_128) Save
198 Use 64-bit long double
201 Target Report RejectNegative Negative(mlong-double-80) Mask(LONG_DOUBLE_128) InverseMask(LONG_DOUBLE_64) Save
202 Use 128-bit long double
204 maccumulate-outgoing-args
205 Target Report Mask(ACCUMULATE_OUTGOING_ARGS) Save
206 Reserve space for outgoing arguments in the function prologue
209 Target Report Mask(ALIGN_DOUBLE) Save
210 Align some doubles on dword boundary
213 Target RejectNegative Joined UInteger
214 Function starts are aligned to this power of 2
217 Target RejectNegative Joined UInteger
218 Jump targets are aligned to this power of 2
221 Target RejectNegative Joined UInteger
222 Loop code aligned to this power of 2
225 Target RejectNegative Report InverseMask(NO_ALIGN_STRINGOPS, ALIGN_STRINGOPS) Save
226 Align destination of the string operations
229 Target RejectNegative Joined Var(ix86_align_data_type) Enum(ix86_align_data) Init(ix86_align_data_type_compat)
230 Use the given data alignment
233 Name(ix86_align_data) Type(enum ix86_align_data)
234 Known data alignment choices (for use with the -malign-data= option):
237 Enum(ix86_align_data) String(compat) Value(ix86_align_data_type_compat)
240 Enum(ix86_align_data) String(abi) Value(ix86_align_data_type_abi)
243 Enum(ix86_align_data) String(cacheline) Value(ix86_align_data_type_cacheline)
246 Target RejectNegative Joined Var(ix86_arch_string)
247 Generate code for given CPU
250 Target RejectNegative Joined Enum(asm_dialect) Var(ix86_asm_dialect) Init(ASM_ATT)
251 Use given assembler dialect
254 Name(asm_dialect) Type(enum asm_dialect)
255 Known assembler dialects (for use with the -masm-dialect= option):
258 Enum(asm_dialect) String(intel) Value(ASM_INTEL)
261 Enum(asm_dialect) String(att) Value(ASM_ATT)
264 Target RejectNegative Joined UInteger Var(ix86_branch_cost)
265 Branches are this expensive (1-5, arbitrary units)
267 mlarge-data-threshold=
268 Target RejectNegative Joined UInteger Var(ix86_section_threshold) Init(DEFAULT_LARGE_SECTION_THRESHOLD)
269 Data greater than given threshold will go into .ldata section in x86-64 medium model
272 Target RejectNegative Joined Enum(cmodel) Var(ix86_cmodel) Init(CM_32)
273 Use given x86-64 code model
276 Name(cmodel) Type(enum cmodel)
277 Known code models (for use with the -mcmodel= option):
280 Enum(cmodel) String(small) Value(CM_SMALL)
283 Enum(cmodel) String(medium) Value(CM_MEDIUM)
286 Enum(cmodel) String(large) Value(CM_LARGE)
289 Enum(cmodel) String(32) Value(CM_32)
292 Enum(cmodel) String(kernel) Value(CM_KERNEL)
295 Target RejectNegative Joined Enum(pmode) Var(ix86_pmode) Init(PMODE_SI)
296 Use given address mode
299 Name(pmode) Type(enum pmode)
300 Known address mode (for use with the -maddress-mode= option):
303 Enum(pmode) String(short) Value(PMODE_SI)
306 Enum(pmode) String(long) Value(PMODE_DI)
309 Target RejectNegative Joined Undocumented Alias(mtune=) Warn(%<-mcpu=%> is deprecated; use %<-mtune=%> or %<-march=%> instead)
312 Target RejectNegative Report InverseMask(NO_FANCY_MATH_387, USE_FANCY_MATH_387) Save
313 Generate sin, cos, sqrt for FPU
316 Target Report Var(ix86_force_drap)
317 Always use Dynamic Realigned Argument Pointer (DRAP) to realign stack
320 Target Report Mask(FLOAT_RETURNS) Save
321 Return values of functions in FPU registers
324 Target RejectNegative Joined Var(ix86_fpmath) Enum(fpmath_unit) Init(FPMATH_387) Save
325 Generate floating point mathematics using given instruction set
328 Name(fpmath_unit) Type(enum fpmath_unit)
329 Valid arguments to -mfpmath=:
332 Enum(fpmath_unit) String(387) Value(FPMATH_387)
335 Enum(fpmath_unit) String(sse) Value(FPMATH_SSE)
338 Enum(fpmath_unit) String(387,sse) Value({(enum fpmath_unit) (FPMATH_SSE | FPMATH_387)})
341 Enum(fpmath_unit) String(387+sse) Value({(enum fpmath_unit) (FPMATH_SSE | FPMATH_387)})
344 Enum(fpmath_unit) String(sse,387) Value({(enum fpmath_unit) (FPMATH_SSE | FPMATH_387)})
347 Enum(fpmath_unit) String(sse+387) Value({(enum fpmath_unit) (FPMATH_SSE | FPMATH_387)})
350 Enum(fpmath_unit) String(both) Value({(enum fpmath_unit) (FPMATH_SSE | FPMATH_387)})
353 Target RejectNegative Mask(80387) Save
357 Target Report Mask(IEEE_FP) Save
358 Use IEEE math for fp comparisons
360 minline-all-stringops
361 Target Report Mask(INLINE_ALL_STRINGOPS) Save
362 Inline all known string operations
364 minline-stringops-dynamically
365 Target Report Mask(INLINE_STRINGOPS_DYNAMICALLY) Save
366 Inline memset/memcpy string operations, but perform inline version only for small blocks
369 Target Undocumented Alias(masm=, intel, att) Warn(%<-mintel-syntax%> and %<-mno-intel-syntax%> are deprecated; use %<-masm=intel%> and %<-masm=att%> instead)
373 Target Report Mask(MS_BITFIELD_LAYOUT) Save
374 Use native (MS) bitfield layout
377 Target RejectNegative Report Mask(NO_ALIGN_STRINGOPS) Undocumented Save
380 Target RejectNegative Report Mask(NO_FANCY_MATH_387) Undocumented Save
383 Target RejectNegative Report Mask(NO_PUSH_ARGS) Undocumented Save
386 Target RejectNegative Report Mask(NO_RED_ZONE) Undocumented Save
388 momit-leaf-frame-pointer
389 Target Report Mask(OMIT_LEAF_FRAME_POINTER) Save
390 Omit the frame pointer in leaf functions
393 Target RejectNegative Report
394 Set 80387 floating-point precision to 32-bit
397 Target RejectNegative Report
398 Set 80387 floating-point precision to 64-bit
401 Target RejectNegative Report
402 Set 80387 floating-point precision to 80-bit
404 mpreferred-stack-boundary=
405 Target RejectNegative Joined UInteger Var(ix86_preferred_stack_boundary_arg)
406 Attempt to keep stack aligned to this power of 2
408 mincoming-stack-boundary=
409 Target RejectNegative Joined UInteger Var(ix86_incoming_stack_boundary_arg)
410 Assume incoming stack aligned to this power of 2
413 Target Report InverseMask(NO_PUSH_ARGS, PUSH_ARGS) Save
414 Use push instructions to save outgoing arguments
417 Target RejectNegative Report InverseMask(NO_RED_ZONE, RED_ZONE) Save
418 Use red-zone in the x86-64 code
421 Target RejectNegative Joined UInteger Var(ix86_regparm)
422 Number of registers used to pass integer arguments
425 Target Report Mask(RTD) Save
426 Alternate calling convention
429 Target InverseMask(80387) Save
430 Do not use hardware fp
433 Target RejectNegative Mask(SSEREGPARM) Save
434 Use SSE register passing conventions for SF and DF mode
437 Target Report Var(ix86_force_align_arg_pointer) Init(-1)
438 Realign stack in prologue
441 Target Report Mask(STACK_PROBE) Save
445 Target RejectNegative Joined Var(ix86_tune_memcpy_strategy)
446 Specify memcpy expansion strategy when expected size is known
449 Target RejectNegative Joined Var(ix86_tune_memset_strategy)
450 Specify memset expansion strategy when expected size is known
453 Target RejectNegative Joined Enum(stringop_alg) Var(ix86_stringop_alg) Init(no_stringop)
454 Chose strategy to generate stringop using
457 Name(stringop_alg) Type(enum stringop_alg)
458 Valid arguments to -mstringop-strategy=:
461 Enum(stringop_alg) String(rep_byte) Value(rep_prefix_1_byte)
464 Enum(stringop_alg) String(libcall) Value(libcall)
467 Enum(stringop_alg) String(rep_4byte) Value(rep_prefix_4_byte)
470 Enum(stringop_alg) String(rep_8byte) Value(rep_prefix_8_byte)
473 Enum(stringop_alg) String(byte_loop) Value(loop_1_byte)
476 Enum(stringop_alg) String(loop) Value(loop)
479 Enum(stringop_alg) String(unrolled_loop) Value(unrolled_loop)
482 Enum(stringop_alg) String(vector_loop) Value(vector_loop)
485 Target RejectNegative Joined Var(ix86_tls_dialect) Enum(tls_dialect) Init(TLS_DIALECT_GNU)
486 Use given thread-local storage dialect
489 Name(tls_dialect) Type(enum tls_dialect)
490 Known TLS dialects (for use with the -mtls-dialect= option):
493 Enum(tls_dialect) String(gnu) Value(TLS_DIALECT_GNU)
496 Enum(tls_dialect) String(gnu2) Value(TLS_DIALECT_GNU2)
499 Target Report Mask(TLS_DIRECT_SEG_REFS)
500 Use direct references against %gs when accessing tls data
503 Target RejectNegative Joined Var(ix86_tune_string)
504 Schedule code for given CPU
507 Target RejectNegative Joined Var(ix86_tune_ctrl_string)
508 Fine grain control of tune features
511 Target RejectNegative Var(ix86_tune_no_default) Init(0)
512 Clear all tune features
515 Target RejectNegative Var(ix86_dump_tunes) Init(0)
518 Target RejectNegative Joined Var(ix86_abi) Enum(calling_abi) Init(SYSV_ABI)
519 Generate code that conforms to the given ABI
522 Name(calling_abi) Type(enum calling_abi)
523 Known ABIs (for use with the -mabi= option):
526 Enum(calling_abi) String(sysv) Value(SYSV_ABI)
529 Enum(calling_abi) String(ms) Value(MS_ABI)
532 Target RejectNegative Joined Var(ix86_veclibabi_type) Enum(ix86_veclibabi) Init(ix86_veclibabi_type_none)
533 Vector library ABI to use
536 Name(ix86_veclibabi) Type(enum ix86_veclibabi)
537 Known vectorization library ABIs (for use with the -mveclibabi= option):
540 Enum(ix86_veclibabi) String(svml) Value(ix86_veclibabi_type_svml)
543 Enum(ix86_veclibabi) String(acml) Value(ix86_veclibabi_type_acml)
546 Target Report Mask(VECT8_RETURNS) Save
547 Return 8-byte vectors in memory
550 Target Report Mask(RECIP) Save
551 Generate reciprocals instead of divss and sqrtss.
554 Target Report RejectNegative Joined Var(ix86_recip_name)
555 Control generation of reciprocal estimates.
558 Target Report Mask(CLD) Save
559 Generate cld instruction in the function prologue.
562 Target Report Mask(VZEROUPPER) Save
563 Generate vzeroupper instruction before a transfer of control flow out of
567 Target RejectNegative Var(flag_dispatch_scheduler)
568 Do dispatch scheduling if processor is bdver1 or bdver2 or bdver3 or bdver4 and Haifa scheduling
572 Target Report Mask(PREFER_AVX128) SAVE
573 Use 128-bit AVX instructions instead of 256-bit AVX instructions in the auto-vectorizer.
578 Target RejectNegative Negative(m64) Report InverseMask(ISA_64BIT) Var(ix86_isa_flags) Save
579 Generate 32bit i386 code
582 Target RejectNegative Negative(mx32) Report Mask(ABI_64) Var(ix86_isa_flags) Save
583 Generate 64bit x86-64 code
586 Target RejectNegative Negative(m16) Report Mask(ABI_X32) Var(ix86_isa_flags) Save
587 Generate 32bit x86-64 code
590 Target RejectNegative Negative(m32) Report Mask(CODE16) InverseMask(ISA_64BIT) Var(ix86_isa_flags) Save
591 Generate 16bit i386 code
594 Target Report Mask(ISA_MMX) Var(ix86_isa_flags) Save
595 Support MMX built-in functions
598 Target Report Mask(ISA_3DNOW) Var(ix86_isa_flags) Save
599 Support 3DNow! built-in functions
602 Target Undocumented Mask(ISA_3DNOW_A) Var(ix86_isa_flags) Save
603 Support Athlon 3Dnow! built-in functions
606 Target Report Mask(ISA_SSE) Var(ix86_isa_flags) Save
607 Support MMX and SSE built-in functions and code generation
610 Target Report Mask(ISA_SSE2) Var(ix86_isa_flags) Save
611 Support MMX, SSE and SSE2 built-in functions and code generation
614 Target Report Mask(ISA_SSE3) Var(ix86_isa_flags) Save
615 Support MMX, SSE, SSE2 and SSE3 built-in functions and code generation
618 Target Report Mask(ISA_SSSE3) Var(ix86_isa_flags) Save
619 Support MMX, SSE, SSE2, SSE3 and SSSE3 built-in functions and code generation
622 Target Report Mask(ISA_SSE4_1) Var(ix86_isa_flags) Save
623 Support MMX, SSE, SSE2, SSE3, SSSE3 and SSE4.1 built-in functions and code generation
626 Target Report Mask(ISA_SSE4_2) Var(ix86_isa_flags) Save
627 Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1 and SSE4.2 built-in functions and code generation
630 Target RejectNegative Report Mask(ISA_SSE4_2) Var(ix86_isa_flags) Save
631 Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1 and SSE4.2 built-in functions and code generation
634 Target RejectNegative Report InverseMask(ISA_SSE4_1) Var(ix86_isa_flags) Save
635 Do not support SSE4.1 and SSE4.2 built-in functions and code generation
638 Target Undocumented Alias(mavx) Warn(%<-msse5%> was removed)
642 Target Report Mask(ISA_AVX) Var(ix86_isa_flags) Save
643 Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2 and AVX built-in functions and code generation
646 Target Report Mask(ISA_AVX2) Var(ix86_isa_flags) Save
647 Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX and AVX2 built-in functions and code generation
650 Target Report Mask(ISA_AVX512F) Var(ix86_isa_flags) Save
651 Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2 and AVX512F built-in functions and code generation
654 Target Report Mask(ISA_AVX512PF) Var(ix86_isa_flags) Save
655 Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2 and AVX512F and AVX512PF built-in functions and code generation
658 Target Report Mask(ISA_AVX512ER) Var(ix86_isa_flags) Save
659 Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2 and AVX512F and AVX512ER built-in functions and code generation
662 Target Report Mask(ISA_AVX512CD) Var(ix86_isa_flags) Save
663 Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2 and AVX512F and AVX512CD built-in functions and code generation
666 Target Report Mask(ISA_AVX512DQ) Var(ix86_isa_flags) Save
667 Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2 and AVX512F and AVX512DQ built-in functions and code generation
670 Target Report Mask(ISA_AVX512BW) Var(ix86_isa_flags) Save
671 Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2 and AVX512F and AVX512BW built-in functions and code generation
674 Target Report Mask(ISA_AVX512VL) Var(ix86_isa_flags) Save
675 Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2 and AVX512F and AVX512VL built-in functions and code generation
678 Target Report Mask(ISA_AVX512IFMA) Var(ix86_isa_flags) Save
679 Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2 and AVX512F and AVX512IFMA built-in functions and code generation
682 Target Report Mask(ISA_AVX512VBMI) Var(ix86_isa_flags) Save
683 Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2 and AVX512F and AVX512VBMI built-in functions and code generation
686 Target Report Mask(ISA_FMA) Var(ix86_isa_flags) Save
687 Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX and FMA built-in functions and code generation
690 Target Report Mask(ISA_SSE4A) Var(ix86_isa_flags) Save
691 Support MMX, SSE, SSE2, SSE3 and SSE4A built-in functions and code generation
694 Target Report Mask(ISA_FMA4) Var(ix86_isa_flags) Save
695 Support FMA4 built-in functions and code generation
698 Target Report Mask(ISA_XOP) Var(ix86_isa_flags) Save
699 Support XOP built-in functions and code generation
702 Target Report Mask(ISA_LWP) Var(ix86_isa_flags) Save
703 Support LWP built-in functions and code generation
706 Target Report Mask(ISA_ABM) Var(ix86_isa_flags) Save
707 Support code generation of Advanced Bit Manipulation (ABM) instructions.
710 Target Report Mask(ISA_POPCNT) Var(ix86_isa_flags) Save
711 Support code generation of popcnt instruction.
714 Target Report Mask(ISA_BMI) Var(ix86_isa_flags) Save
715 Support BMI built-in functions and code generation
718 Target Report Mask(ISA_BMI2) Var(ix86_isa_flags) Save
719 Support BMI2 built-in functions and code generation
722 Target Report Mask(ISA_LZCNT) Var(ix86_isa_flags) Save
723 Support LZCNT built-in function and code generation
726 Target Report Mask(ISA_HLE) Var(ix86_isa_flags) Save
727 Support Hardware Lock Elision prefixes
730 Target Report Mask(ISA_RDSEED) Var(ix86_isa_flags) Save
731 Support RDSEED instruction
734 Target Report Mask(ISA_PRFCHW) Var(ix86_isa_flags) Save
735 Support PREFETCHW instruction
738 Target Report Mask(ISA_ADX) Var(ix86_isa_flags) Save
739 Support flag-preserving add-carry instructions
742 Target Report Mask(ISA_CLFLUSHOPT) Var(ix86_isa_flags) Save
743 Support CLFLUSHOPT instructions
746 Target Report Mask(ISA_CLWB) Var(ix86_isa_flags) Save
747 Support CLWB instruction
750 Target Report Mask(ISA_PCOMMIT) Var(ix86_isa_flags) Save
751 Support PCOMMIT instruction
754 Target Report Mask(ISA_FXSR) Var(ix86_isa_flags) Save
755 Support FXSAVE and FXRSTOR instructions
758 Target Report Mask(ISA_XSAVE) Var(ix86_isa_flags) Save
759 Support XSAVE and XRSTOR instructions
762 Target Report Mask(ISA_XSAVEOPT) Var(ix86_isa_flags) Save
763 Support XSAVEOPT instruction
766 Target Report Mask(ISA_XSAVEC) Var(ix86_isa_flags) Save
767 Support XSAVEC instructions
770 Target Report Mask(ISA_XSAVES) Var(ix86_isa_flags) Save
771 Support XSAVES and XRSTORS instructions
774 Target Report Mask(ISA_TBM) Var(ix86_isa_flags) Save
775 Support TBM built-in functions and code generation
778 Target Report Mask(ISA_CX16) Var(ix86_isa_flags) Save
779 Support code generation of cmpxchg16b instruction.
782 Target Report Mask(ISA_SAHF) Var(ix86_isa_flags) Save
783 Support code generation of sahf instruction in 64bit x86-64 code.
786 Target Report Mask(ISA_MOVBE) Var(ix86_isa_flags) Save
787 Support code generation of movbe instruction.
790 Target Report Mask(ISA_CRC32) Var(ix86_isa_flags) Save
791 Support code generation of crc32 instruction.
794 Target Report Mask(ISA_AES) Var(ix86_isa_flags) Save
795 Support AES built-in functions and code generation
798 Target Report Mask(ISA_SHA) Var(ix86_isa_flags) Save
799 Support SHA1 and SHA256 built-in functions and code generation
802 Target Report Mask(ISA_PCLMUL) Var(ix86_isa_flags) Save
803 Support PCLMUL built-in functions and code generation
806 Target Report Var(ix86_sse2avx)
807 Encode SSE instructions with VEX prefix
810 Target Report Mask(ISA_FSGSBASE) Var(ix86_isa_flags) Save
811 Support FSGSBASE built-in functions and code generation
814 Target Report Mask(ISA_RDRND) Var(ix86_isa_flags) Save
815 Support RDRND built-in functions and code generation
818 Target Report Mask(ISA_F16C) Var(ix86_isa_flags) Save
819 Support F16C built-in functions and code generation
822 Target Report Mask(ISA_PREFETCHWT1) Var(ix86_isa_flags) Save
823 Support PREFETCHWT1 built-in functions and code generation
826 Target Report Var(flag_fentry) Init(-1)
827 Emit profiling counter call at function entry before prologue.
830 Target Report Var(flag_record_mcount) Init(0)
831 Generate __mcount_loc section with all mcount or __fentry__ calls.
834 Target Report Var(flag_nop_mcount) Init(0)
835 Generate mcount/__fentry__ calls as nops. To activate they need to be
839 Target Report Var(flag_skip_rax_setup) Init(0)
840 Skip setting up RAX register when passing variable arguments.
843 Target Report Mask(USE_8BIT_IDIV) Save
844 Expand 32bit/64bit integer divide into 8bit unsigned integer divide with run-time check
846 mavx256-split-unaligned-load
847 Target Report Mask(AVX256_SPLIT_UNALIGNED_LOAD) Save
848 Split 32-byte AVX unaligned load
850 mavx256-split-unaligned-store
851 Target Report Mask(AVX256_SPLIT_UNALIGNED_STORE) Save
852 Split 32-byte AVX unaligned store
855 Target Report Mask(ISA_RTM) Var(ix86_isa_flags) Save
856 Support RTM built-in functions and code generation
859 Target Report Mask(ISA_MPX) Var(ix86_isa_flags) Save
860 Support MPX code generation
863 Target Report Mask(ISA_MWAITX) Var(ix86_isa_flags) Save
864 Support MWAITX and MONITORX built-in functions and code generation
866 mstack-protector-guard=
867 Target RejectNegative Joined Enum(stack_protector_guard) Var(ix86_stack_protector_guard) Init(SSP_TLS)
868 Use given stack-protector guard
871 Name(stack_protector_guard) Type(enum stack_protector_guard)
872 Known stack protector guard (for use with the -mstack-protector-guard= option):
875 Enum(stack_protector_guard) String(tls) Value(SSP_TLS)
878 Enum(stack_protector_guard) String(global) Value(SSP_GLOBAL)