2 * Copyright (c) 1982, 1987, 1990 The Regents of the University of California.
3 * Copyright (c) 1992 Terrence R. Lambert.
4 * Copyright (c) 2003 Peter Wemm.
5 * Copyright (c) 2008 The DragonFly Project.
8 * This code is derived from software contributed to Berkeley by
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
19 * 3. All advertising materials mentioning features or use of this software
20 * must display the following acknowledgement:
21 * This product includes software developed by the University of
22 * California, Berkeley and its contributors.
23 * 4. Neither the name of the University nor the names of its contributors
24 * may be used to endorse or promote products derived from this software
25 * without specific prior written permission.
27 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
28 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
29 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
30 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
31 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
32 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
33 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
34 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
35 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
36 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
39 * from: @(#)machdep.c 7.4 (Berkeley) 6/3/91
40 * $FreeBSD: src/sys/i386/i386/machdep.c,v 1.385.2.30 2003/05/31 08:48:05 alc Exp $
41 * $DragonFly: src/sys/platform/pc64/amd64/machdep.c,v 1.1 2008/08/29 17:07:10 dillon Exp $
44 #include "use_ether.h"
45 //#include "use_npx.h"
47 #include "opt_atalk.h"
48 #include "opt_compat.h"
51 #include "opt_directio.h"
54 #include "opt_msgbuf.h"
57 #include <sys/param.h>
58 #include <sys/systm.h>
59 #include <sys/sysproto.h>
60 #include <sys/signalvar.h>
61 #include <sys/kernel.h>
62 #include <sys/linker.h>
63 #include <sys/malloc.h>
67 #include <sys/reboot.h>
69 #include <sys/msgbuf.h>
70 #include <sys/sysent.h>
71 #include <sys/sysctl.h>
72 #include <sys/vmmeter.h>
74 #include <sys/upcall.h>
75 #include <sys/usched.h>
79 #include <vm/vm_param.h>
81 #include <vm/vm_kern.h>
82 #include <vm/vm_object.h>
83 #include <vm/vm_page.h>
84 #include <vm/vm_map.h>
85 #include <vm/vm_pager.h>
86 #include <vm/vm_extern.h>
88 #include <sys/thread2.h>
96 #include <machine/cpu.h>
97 #include <machine/clock.h>
98 #include <machine/specialreg.h>
100 #include <machine/bootinfo.h>
102 #include <machine/md_var.h>
103 #include <machine/metadata.h>
104 #include <machine/pc/bios.h>
105 #include <machine/pcb_ext.h> /* pcb.h included via sys/user.h */
106 #include <machine/globaldata.h> /* CPU_prvspace */
107 #include <machine/smp.h>
109 #include <machine/perfmon.h>
111 #include <machine/cputypes.h>
114 #include <bus/isa/isa_device.h>
116 #include <machine_base/isa/intr_machdep.h>
117 #include <bus/isa/rtc.h>
118 #include <sys/random.h>
119 #include <sys/ptrace.h>
120 #include <machine/sigframe.h>
122 #define PHYSMAP_ENTRIES 10
124 extern void init386(int first);
125 extern void dblfault_handler(void);
126 extern u_int64_t hammer_time(u_int64_t, u_int64_t);
128 extern void printcpuinfo(void); /* XXX header file */
129 extern void identify_cpu(void);
131 extern void finishidentcpu(void);
133 extern void panicifcpuunsupported(void);
134 extern void initializecpu(void);
136 extern void init_paging(vm_paddr_t *);
138 static void cpu_startup(void *);
139 #ifndef CPU_DISABLE_SSE
140 static void set_fpregs_xmm(struct save87 *, struct savexmm *);
141 static void fill_fpregs_xmm(struct savexmm *, struct save87 *);
142 #endif /* CPU_DISABLE_SSE */
144 extern void ffs_rawread_setup(void);
145 #endif /* DIRECTIO */
146 static void init_locks(void);
148 SYSINIT(cpu, SI_BOOT2_SMP, SI_ORDER_FIRST, cpu_startup, NULL)
151 extern vm_offset_t ksym_start, ksym_end;
159 struct privatespace CPU_prvspace[MAXCPU];
161 int _udatasel, _ucodesel, _ucode32sel;
164 int64_t tsc_offsets[MAXCPU];
166 int64_t tsc_offsets[1];
169 #if defined(SWTCH_OPTIM_STATS)
170 extern int swtch_optim_stats;
171 SYSCTL_INT(_debug, OID_AUTO, swtch_optim_stats,
172 CTLFLAG_RD, &swtch_optim_stats, 0, "");
173 SYSCTL_INT(_debug, OID_AUTO, tlb_flush_count,
174 CTLFLAG_RD, &tlb_flush_count, 0, "");
180 sysctl_hw_physmem(SYSCTL_HANDLER_ARGS)
182 int error = sysctl_handle_int(oidp, 0, ctob(physmem), req);
186 SYSCTL_PROC(_hw, HW_PHYSMEM, physmem, CTLTYPE_INT|CTLFLAG_RD,
187 0, 0, sysctl_hw_physmem, "IU", "");
190 sysctl_hw_usermem(SYSCTL_HANDLER_ARGS)
192 int error = sysctl_handle_int(oidp, 0,
193 ctob(physmem - vmstats.v_wire_count), req);
197 SYSCTL_PROC(_hw, HW_USERMEM, usermem, CTLTYPE_INT|CTLFLAG_RD,
198 0, 0, sysctl_hw_usermem, "IU", "");
201 sysctl_hw_availpages(SYSCTL_HANDLER_ARGS)
203 int error = sysctl_handle_int(oidp, 0,
204 amd64_btop(avail_end - avail_start), req);
208 SYSCTL_PROC(_hw, OID_AUTO, availpages, CTLTYPE_INT|CTLFLAG_RD,
209 0, 0, sysctl_hw_availpages, "I", "");
212 sysctl_machdep_msgbuf(SYSCTL_HANDLER_ARGS)
216 /* Unwind the buffer, so that it's linear (possibly starting with
217 * some initial nulls).
219 error=sysctl_handle_opaque(oidp,msgbufp->msg_ptr+msgbufp->msg_bufr,
220 msgbufp->msg_size-msgbufp->msg_bufr,req);
221 if(error) return(error);
222 if(msgbufp->msg_bufr>0) {
223 error=sysctl_handle_opaque(oidp,msgbufp->msg_ptr,
224 msgbufp->msg_bufr,req);
229 SYSCTL_PROC(_machdep, OID_AUTO, msgbuf, CTLTYPE_STRING|CTLFLAG_RD,
230 0, 0, sysctl_machdep_msgbuf, "A","Contents of kernel message buffer");
232 static int msgbuf_clear;
235 sysctl_machdep_msgbuf_clear(SYSCTL_HANDLER_ARGS)
238 error = sysctl_handle_int(oidp, oidp->oid_arg1, oidp->oid_arg2,
240 if (!error && req->newptr) {
241 /* Clear the buffer and reset write pointer */
242 bzero(msgbufp->msg_ptr,msgbufp->msg_size);
243 msgbufp->msg_bufr=msgbufp->msg_bufx=0;
249 SYSCTL_PROC(_machdep, OID_AUTO, msgbuf_clear, CTLTYPE_INT|CTLFLAG_RW,
250 &msgbuf_clear, 0, sysctl_machdep_msgbuf_clear, "I",
251 "Clear kernel message buffer");
253 vm_paddr_t Maxmem = 0;
256 * The number of PHYSMAP entries must be one less than the number of
257 * PHYSSEG entries because the PHYSMAP entry that spans the largest
258 * physical address that is accessible by ISA DMA is split into two
261 #define PHYSMAP_SIZE (2 * (VM_PHYSSEG_MAX - 1))
263 vm_paddr_t phys_avail[PHYSMAP_SIZE + 2];
264 vm_paddr_t dump_avail[PHYSMAP_SIZE + 2];
266 /* must be 2 less so 0 0 can signal end of chunks */
267 #define PHYS_AVAIL_ARRAY_END ((sizeof(phys_avail) / sizeof(phys_avail[0])) - 2)
268 #define DUMP_AVAIL_ARRAY_END ((sizeof(dump_avail) / sizeof(dump_avail[0])) - 2)
270 static vm_offset_t buffer_sva, buffer_eva;
271 vm_offset_t clean_sva, clean_eva;
272 static vm_offset_t pager_sva, pager_eva;
273 static struct trapframe proc0_tf;
276 cpu_startup(void *dummy)
280 vm_offset_t firstaddr;
282 if (boothowto & RB_VERBOSE)
286 * Good {morning,afternoon,evening,night}.
288 kprintf("%s", version);
291 panicifcpuunsupported();
295 kprintf("real memory = %llu (%lluK bytes)\n", ptoa(Maxmem), ptoa(Maxmem) / 1024);
297 * Display any holes after the first chunk of extended memory.
302 kprintf("Physical memory chunk(s):\n");
303 for (indx = 0; phys_avail[indx + 1] != 0; indx += 2) {
304 vm_paddr_t size1 = phys_avail[indx + 1] - phys_avail[indx];
306 kprintf("0x%08llx - 0x%08llx, %llu bytes (%llu pages)\n",
307 phys_avail[indx], phys_avail[indx + 1] - 1, size1,
313 * Allocate space for system data structures.
314 * The first available kernel virtual address is in "v".
315 * As pages of kernel virtual memory are allocated, "v" is incremented.
316 * As pages of memory are allocated and cleared,
317 * "firstaddr" is incremented.
318 * An index into the kernel page table corresponding to the
319 * virtual memory address maintained in "v" is kept in "mapaddr".
323 * Make two passes. The first pass calculates how much memory is
324 * needed and allocates it. The second pass assigns virtual
325 * addresses to the various data structures.
329 v = (caddr_t)firstaddr;
331 #define valloc(name, type, num) \
332 (name) = (type *)v; v = (caddr_t)((name)+(num))
333 #define valloclim(name, type, num, lim) \
334 (name) = (type *)v; v = (caddr_t)((lim) = ((name)+(num)))
337 * The nominal buffer size (and minimum KVA allocation) is BKVASIZE.
338 * For the first 64MB of ram nominally allocate sufficient buffers to
339 * cover 1/4 of our ram. Beyond the first 64MB allocate additional
340 * buffers to cover 1/20 of our ram over 64MB. When auto-sizing
341 * the buffer cache we limit the eventual kva reservation to
344 * factor represents the 1/4 x ram conversion.
347 int factor = 4 * BKVASIZE / 1024;
348 int kbytes = physmem * (PAGE_SIZE / 1024);
352 nbuf += min((kbytes - 4096) / factor, 65536 / factor);
354 nbuf += (kbytes - 65536) * 2 / (factor * 5);
355 if (maxbcache && nbuf > maxbcache / BKVASIZE)
356 nbuf = maxbcache / BKVASIZE;
360 * Do not allow the buffer_map to be more then 1/2 the size of the
363 if (nbuf > (virtual_end - virtual_start) / (BKVASIZE * 2)) {
364 nbuf = (virtual_end - virtual_start) / (BKVASIZE * 2);
365 kprintf("Warning: nbufs capped at %d\n", nbuf);
368 nswbuf = max(min(nbuf/4, 256), 16);
370 if (nswbuf < NSWBUF_MIN)
377 valloc(swbuf, struct buf, nswbuf);
378 valloc(buf, struct buf, nbuf);
381 * End of first pass, size has been calculated so allocate memory
383 if (firstaddr == 0) {
384 size = (vm_size_t)(v - firstaddr);
385 firstaddr = kmem_alloc(&kernel_map, round_page(size));
387 panic("startup: no room for tables");
392 * End of second pass, addresses have been assigned
394 if ((vm_size_t)(v - firstaddr) != size)
395 panic("startup: table size inconsistency");
397 kmem_suballoc(&kernel_map, &clean_map, &clean_sva, &clean_eva,
398 (nbuf*BKVASIZE) + (nswbuf*MAXPHYS) + pager_map_size);
399 kmem_suballoc(&clean_map, &buffer_map, &buffer_sva, &buffer_eva,
401 buffer_map.system_map = 1;
402 kmem_suballoc(&clean_map, &pager_map, &pager_sva, &pager_eva,
403 (nswbuf*MAXPHYS) + pager_map_size);
404 pager_map.system_map = 1;
406 #if defined(USERCONFIG)
408 cninit(); /* the preferred console may have changed */
411 kprintf("avail memory = %lu (%luK bytes)\n",
412 ptoa(vmstats.v_free_count),
413 ptoa(vmstats.v_free_count) / 1024);
416 * Set up buffers, so they can be used to read disk labels.
419 vm_pager_bufferinit();
423 * OK, enough kmem_alloc/malloc state should be up, lets get on with it!
425 mp_start(); /* fire up the APs and APICs */
432 * Send an interrupt to process.
434 * Stack is set up to allow sigcode stored
435 * at top to call routine, followed by kcall
436 * to sigreturn routine below. After sigreturn
437 * resets the signal mask, the stack, and the
438 * frame pointer, it returns to the user
442 sendsig(sig_t catcher, int sig, sigset_t *mask, u_long code)
444 struct lwp *lp = curthread->td_lwp;
445 struct proc *p = lp->lwp_proc;
446 struct trapframe *regs;
447 struct sigacts *psp = p->p_sigacts;
448 struct sigframe sf, *sfp;
452 regs = lp->lwp_md.md_regs;
453 oonstack = (lp->lwp_sigstk.ss_flags & SS_ONSTACK) ? 1 : 0;
455 /* Save user context */
456 bzero(&sf, sizeof(struct sigframe));
457 sf.sf_uc.uc_sigmask = *mask;
458 sf.sf_uc.uc_stack = lp->lwp_sigstk;
459 sf.sf_uc.uc_mcontext.mc_onstack = oonstack;
460 KKASSERT(__offsetof(struct trapframe, tf_rdi) == 0);
461 bcopy(regs, &sf.sf_uc.uc_mcontext.mc_rdi, sizeof(struct trapframe));
463 /* Make the size of the saved context visible to userland */
464 sf.sf_uc.uc_mcontext.mc_len = sizeof(sf.sf_uc.uc_mcontext);
466 /* Save mailbox pending state for syscall interlock semantics */
467 if (p->p_flag & P_MAILBOX)
468 sf.sf_uc.uc_mcontext.mc_xflags |= PGEX_MAILBOX;
470 /* Allocate and validate space for the signal handler context. */
471 if ((lp->lwp_flag & LWP_ALTSTACK) != 0 && !oonstack &&
472 SIGISMEMBER(psp->ps_sigonstack, sig)) {
473 sp = (char *)(lp->lwp_sigstk.ss_sp + lp->lwp_sigstk.ss_size -
474 sizeof(struct sigframe));
475 lp->lwp_sigstk.ss_flags |= SS_ONSTACK;
477 /* We take red zone into account */
478 sp = (char *)regs->tf_rsp - sizeof(struct sigframe) - 128;
481 /* Align to 16 bytes */
482 sfp = (struct sigframe *)((intptr_t)sp & ~0xFUL);
484 /* Translate the signal is appropriate */
485 if (p->p_sysent->sv_sigtbl) {
486 if (sig <= p->p_sysent->sv_sigsize)
487 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)];
491 * Build the argument list for the signal handler.
493 * Arguments are in registers (%rdi, %rsi, %rdx, %rcx)
495 regs->tf_rdi = sig; /* argument 1 */
496 regs->tf_rdx = (register_t)&sfp->sf_uc; /* argument 3 */
498 if (SIGISMEMBER(psp->ps_siginfo, sig)) {
500 * Signal handler installed with SA_SIGINFO.
502 * action(signo, siginfo, ucontext)
504 regs->tf_rsi = (register_t)&sfp->sf_si; /* argument 2 */
505 regs->tf_rcx = (register_t)regs->tf_err; /* argument 4 */
506 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher;
508 /* fill siginfo structure */
509 sf.sf_si.si_signo = sig;
510 sf.sf_si.si_code = code;
511 sf.sf_si.si_addr = (void *)regs->tf_err;
514 * Old FreeBSD-style arguments.
516 * handler (signo, code, [uc], addr)
518 regs->tf_rsi = (register_t)code; /* argument 2 */
519 regs->tf_rcx = (register_t)regs->tf_err; /* argument 4 */
520 sf.sf_ahu.sf_handler = catcher;
524 * If we're a vm86 process, we want to save the segment registers.
525 * We also change eflags to be our emulated eflags, not the actual
529 if (regs->tf_eflags & PSL_VM) {
530 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
531 struct vm86_kernel *vm86 = &lp->lwp_thread->td_pcb->pcb_ext->ext_vm86;
533 sf.sf_uc.uc_mcontext.mc_gs = tf->tf_vm86_gs;
534 sf.sf_uc.uc_mcontext.mc_fs = tf->tf_vm86_fs;
535 sf.sf_uc.uc_mcontext.mc_es = tf->tf_vm86_es;
536 sf.sf_uc.uc_mcontext.mc_ds = tf->tf_vm86_ds;
538 if (vm86->vm86_has_vme == 0)
539 sf.sf_uc.uc_mcontext.mc_eflags =
540 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) |
541 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP));
544 * Clear PSL_NT to inhibit T_TSSFLT faults on return from
545 * syscalls made by the signal handler. This just avoids
546 * wasting time for our lazy fixup of such faults. PSL_NT
547 * does nothing in vm86 mode, but vm86 programs can set it
548 * almost legitimately in probes for old cpu types.
550 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP);
555 * Save the FPU state and reinit the FP unit
557 npxpush(&sf.sf_uc.uc_mcontext);
560 * Copy the sigframe out to the user's stack.
562 if (copyout(&sf, sfp, sizeof(struct sigframe)) != 0) {
564 * Something is wrong with the stack pointer.
565 * ...Kill the process.
570 regs->tf_rsp = (register_t)sfp;
571 regs->tf_rip = PS_STRINGS - *(p->p_sysent->sv_szsigcode);
574 * i386 abi specifies that the direction flag must be cleared
577 regs->tf_rflags &= ~(PSL_T|PSL_D);
580 * 64 bit mode has a code and stack selector but
581 * no data or extra selector. %fs and %gs are not
584 regs->tf_cs = _ucodesel;
585 regs->tf_ss = _udatasel;
589 * Sanitize the trapframe for a virtual kernel passing control to a custom
590 * VM context. Remove any items that would otherwise create a privilage
593 * XXX at the moment we allow userland to set the resume flag. Is this a
597 cpu_sanitize_frame(struct trapframe *frame)
599 frame->tf_cs = _ucodesel;
600 frame->tf_ss = _udatasel;
601 /* XXX VM (8086) mode not supported? */
602 frame->tf_rflags &= (PSL_RF | PSL_USERCHANGE | PSL_VM_UNSUPP);
603 frame->tf_rflags |= PSL_RESERVED_DEFAULT | PSL_I;
609 * Sanitize the tls so loading the descriptor does not blow up
610 * on us. For AMD64 we don't have to do anything.
613 cpu_sanitize_tls(struct savetls *tls)
619 * sigreturn(ucontext_t *sigcntxp)
621 * System call to cleanup state after a signal
622 * has been taken. Reset signal mask and
623 * stack state from context left by sendsig (above).
624 * Return to previous pc and psl as specified by
625 * context left by sendsig. Check carefully to
626 * make sure that the user has not modified the
627 * state to gain improper privileges.
629 #define EFL_SECURE(ef, oef) ((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0)
630 #define CS_SECURE(cs) (ISPL(cs) == SEL_UPL)
633 sys_sigreturn(struct sigreturn_args *uap)
635 struct lwp *lp = curthread->td_lwp;
636 struct proc *p = lp->lwp_proc;
637 struct trapframe *regs;
645 * We have to copy the information into kernel space so userland
646 * can't modify it while we are sniffing it.
648 regs = lp->lwp_md.md_regs;
649 error = copyin(uap->sigcntxp, &uc, sizeof(uc));
653 rflags = ucp->uc_mcontext.mc_rflags;
655 /* VM (8086) mode not supported */
656 rflags &= ~PSL_VM_UNSUPP;
659 if (eflags & PSL_VM) {
660 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
661 struct vm86_kernel *vm86;
664 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't
665 * set up the vm86 area, and we can't enter vm86 mode.
667 if (lp->lwp_thread->td_pcb->pcb_ext == 0)
669 vm86 = &lp->lwp_thread->td_pcb->pcb_ext->ext_vm86;
670 if (vm86->vm86_inited == 0)
673 /* go back to user mode if both flags are set */
674 if ((eflags & PSL_VIP) && (eflags & PSL_VIF))
675 trapsignal(lp, SIGBUS, 0);
677 if (vm86->vm86_has_vme) {
678 eflags = (tf->tf_eflags & ~VME_USERCHANGE) |
679 (eflags & VME_USERCHANGE) | PSL_VM;
681 vm86->vm86_eflags = eflags; /* save VIF, VIP */
682 eflags = (tf->tf_eflags & ~VM_USERCHANGE) |
683 (eflags & VM_USERCHANGE) | PSL_VM;
685 bcopy(&ucp->uc_mcontext.mc_gs, tf, sizeof(struct trapframe));
686 tf->tf_eflags = eflags;
687 tf->tf_vm86_ds = tf->tf_ds;
688 tf->tf_vm86_es = tf->tf_es;
689 tf->tf_vm86_fs = tf->tf_fs;
690 tf->tf_vm86_gs = tf->tf_gs;
691 tf->tf_ds = _udatasel;
692 tf->tf_es = _udatasel;
693 tf->tf_fs = _udatasel;
694 tf->tf_gs = _udatasel;
699 * Don't allow users to change privileged or reserved flags.
702 * XXX do allow users to change the privileged flag PSL_RF.
703 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers
704 * should sometimes set it there too. tf_eflags is kept in
705 * the signal context during signal handling and there is no
706 * other place to remember it, so the PSL_RF bit may be
707 * corrupted by the signal handler without us knowing.
708 * Corruption of the PSL_RF bit at worst causes one more or
709 * one less debugger trap, so allowing it is fairly harmless.
711 if (!EFL_SECURE(rflags & ~PSL_RF, regs->tf_rflags & ~PSL_RF)) {
712 kprintf("sigreturn: rflags = 0x%lx\n", (long)rflags);
717 * Don't allow users to load a valid privileged %cs. Let the
718 * hardware check for invalid selectors, excess privilege in
719 * other selectors, invalid %eip's and invalid %esp's.
721 cs = ucp->uc_mcontext.mc_cs;
722 if (!CS_SECURE(cs)) {
723 kprintf("sigreturn: cs = 0x%x\n", cs);
724 trapsignal(lp, SIGBUS, T_PROTFLT);
727 bcopy(&ucp->uc_mcontext.mc_rdi, regs, sizeof(struct trapframe));
731 * Restore the FPU state from the frame
733 npxpop(&ucp->uc_mcontext);
736 * Merge saved signal mailbox pending flag to maintain interlock
737 * semantics against system calls.
739 if (ucp->uc_mcontext.mc_xflags & PGEX_MAILBOX)
740 p->p_flag |= P_MAILBOX;
742 if (ucp->uc_mcontext.mc_onstack & 1)
743 lp->lwp_sigstk.ss_flags |= SS_ONSTACK;
745 lp->lwp_sigstk.ss_flags &= ~SS_ONSTACK;
747 lp->lwp_sigmask = ucp->uc_sigmask;
748 SIG_CANTMASK(lp->lwp_sigmask);
753 * Stack frame on entry to function. %rax will contain the function vector,
754 * %rcx will contain the function data. flags, rcx, and rax will have
755 * already been pushed on the stack.
766 sendupcall(struct vmupcall *vu, int morepending)
768 struct lwp *lp = curthread->td_lwp;
769 struct trapframe *regs;
770 struct upcall upcall;
771 struct upc_frame upc_frame;
775 * If we are a virtual kernel running an emulated user process
776 * context, switch back to the virtual kernel context before
777 * trying to post the signal.
779 if (lp->lwp_vkernel && lp->lwp_vkernel->ve) {
780 lp->lwp_md.md_regs->tf_trapno = 0;
781 vkernel_trap(lp, lp->lwp_md.md_regs);
785 * Get the upcall data structure
787 if (copyin(lp->lwp_upcall, &upcall, sizeof(upcall)) ||
788 copyin((char *)upcall.upc_uthread + upcall.upc_critoff, &crit_count, sizeof(int))
791 kprintf("bad upcall address\n");
796 * If the data structure is already marked pending or has a critical
797 * section count, mark the data structure as pending and return
798 * without doing an upcall. vu_pending is left set.
800 if (upcall.upc_pending || crit_count >= vu->vu_pending) {
801 if (upcall.upc_pending < vu->vu_pending) {
802 upcall.upc_pending = vu->vu_pending;
803 copyout(&upcall.upc_pending, &lp->lwp_upcall->upc_pending,
804 sizeof(upcall.upc_pending));
810 * We can run this upcall now, clear vu_pending.
812 * Bump our critical section count and set or clear the
813 * user pending flag depending on whether more upcalls are
814 * pending. The user will be responsible for calling
815 * upc_dispatch(-1) to process remaining upcalls.
818 upcall.upc_pending = morepending;
819 crit_count += TDPRI_CRIT;
820 copyout(&upcall.upc_pending, &lp->lwp_upcall->upc_pending,
821 sizeof(upcall.upc_pending));
822 copyout(&crit_count, (char *)upcall.upc_uthread + upcall.upc_critoff,
826 * Construct a stack frame and issue the upcall
828 regs = lp->lwp_md.md_regs;
829 upc_frame.rax = regs->tf_rax;
830 upc_frame.rcx = regs->tf_rcx;
831 upc_frame.rdx = regs->tf_rdx;
832 upc_frame.flags = regs->tf_rflags;
833 upc_frame.oldip = regs->tf_rip;
834 if (copyout(&upc_frame, (void *)(regs->tf_rsp - sizeof(upc_frame)),
835 sizeof(upc_frame)) != 0) {
836 kprintf("bad stack on upcall\n");
838 regs->tf_rax = (register_t)vu->vu_func;
839 regs->tf_rcx = (register_t)vu->vu_data;
840 regs->tf_rdx = (register_t)lp->lwp_upcall;
841 regs->tf_rip = (register_t)vu->vu_ctx;
842 regs->tf_rsp -= sizeof(upc_frame);
847 * fetchupcall occurs in the context of a system call, which means that
848 * we have to return EJUSTRETURN in order to prevent eax and edx from
849 * being overwritten by the syscall return value.
851 * if vu is not NULL we return the new context in %edx, the new data in %ecx,
852 * and the function pointer in %eax.
855 fetchupcall(struct vmupcall *vu, int morepending, void *rsp)
857 struct upc_frame upc_frame;
858 struct lwp *lp = curthread->td_lwp;
859 struct trapframe *regs;
861 struct upcall upcall;
864 regs = lp->lwp_md.md_regs;
866 error = copyout(&morepending, &lp->lwp_upcall->upc_pending, sizeof(int));
870 * This jumps us to the next ready context.
873 error = copyin(lp->lwp_upcall, &upcall, sizeof(upcall));
876 error = copyin((char *)upcall.upc_uthread + upcall.upc_critoff, &crit_count, sizeof(int));
877 crit_count += TDPRI_CRIT;
879 error = copyout(&crit_count, (char *)upcall.upc_uthread + upcall.upc_critoff, sizeof(int));
880 regs->tf_rax = (register_t)vu->vu_func;
881 regs->tf_rcx = (register_t)vu->vu_data;
882 regs->tf_rdx = (register_t)lp->lwp_upcall;
883 regs->tf_rip = (register_t)vu->vu_ctx;
884 regs->tf_rsp = (register_t)rsp;
887 * This returns us to the originally interrupted code.
889 error = copyin(rsp, &upc_frame, sizeof(upc_frame));
890 regs->tf_rax = upc_frame.rax;
891 regs->tf_rcx = upc_frame.rcx;
892 regs->tf_rdx = upc_frame.rdx;
893 regs->tf_rflags = (regs->tf_rflags & ~PSL_USERCHANGE) |
894 (upc_frame.flags & PSL_USERCHANGE);
895 regs->tf_rip = upc_frame.oldip;
896 regs->tf_rsp = (register_t)((char *)rsp + sizeof(upc_frame));
905 * Machine dependent boot() routine
907 * I haven't seen anything to put here yet
908 * Possibly some stuff might be grafted back here from boot()
916 * Shutdown the CPU as much as possible
922 __asm__ __volatile("hlt");
926 * cpu_idle() represents the idle LWKT. You cannot return from this function
927 * (unless you want to blow things up!). Instead we look for runnable threads
928 * and loop or halt as appropriate. Giant is not held on entry to the thread.
930 * The main loop is entered with a critical section held, we must release
931 * the critical section before doing anything else. lwkt_switch() will
932 * check for pending interrupts due to entering and exiting its own
935 * Note on cpu_idle_hlt: On an SMP system we rely on a scheduler IPI
936 * to wake a HLTed cpu up. However, there are cases where the idlethread
937 * will be entered with the possibility that no IPI will occur and in such
938 * cases lwkt_switch() sets TDF_IDLE_NOHLT.
940 static int cpu_idle_hlt = 1;
941 static int cpu_idle_hltcnt;
942 static int cpu_idle_spincnt;
943 SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_hlt, CTLFLAG_RW,
944 &cpu_idle_hlt, 0, "Idle loop HLT enable");
945 SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_hltcnt, CTLFLAG_RW,
946 &cpu_idle_hltcnt, 0, "Idle loop entry halts");
947 SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_spincnt, CTLFLAG_RW,
948 &cpu_idle_spincnt, 0, "Idle loop entry spins");
951 cpu_idle_default_hook(void)
954 * We must guarentee that hlt is exactly the instruction
957 __asm __volatile("sti; hlt");
960 /* Other subsystems (e.g., ACPI) can hook this later. */
961 void (*cpu_idle_hook)(void) = cpu_idle_default_hook;
966 struct thread *td = curthread;
969 KKASSERT(td->td_pri < TDPRI_CRIT);
972 * See if there are any LWKTs ready to go.
977 * If we are going to halt call splz unconditionally after
978 * CLIing to catch any interrupt races. Note that we are
979 * at SPL0 and interrupts are enabled.
981 if (cpu_idle_hlt && !lwkt_runnable() &&
982 (td->td_flags & TDF_IDLE_NOHLT) == 0) {
983 __asm __volatile("cli");
985 if (!lwkt_runnable())
989 __asm __volatile("pause");
993 td->td_flags &= ~TDF_IDLE_NOHLT;
996 __asm __volatile("sti; pause");
998 __asm __volatile("sti");
1006 * This routine is called when the only runnable threads require
1007 * the MP lock, and the scheduler couldn't get it. On a real cpu
1008 * we let the scheduler spin.
1011 cpu_mplock_contested(void)
1017 * This routine is called if a spinlock has been held through the
1018 * exponential backoff period and is seriously contested. On a real cpu
1022 cpu_spinlock_contested(void)
1028 * Clear registers on exec
1031 exec_setregs(u_long entry, u_long stack, u_long ps_strings)
1033 struct thread *td = curthread;
1034 struct lwp *lp = td->td_lwp;
1035 struct pcb *pcb = td->td_pcb;
1036 struct trapframe *regs = lp->lwp_md.md_regs;
1038 /* was i386_user_cleanup() in NetBSD */
1041 bzero((char *)regs, sizeof(struct trapframe));
1042 regs->tf_rip = entry;
1043 regs->tf_rsp = ((stack - 8) & ~0xFul) + 8; /* align the stack */
1044 regs->tf_rdi = stack; /* argv */
1045 regs->tf_rflags = PSL_USER | (regs->tf_rflags & PSL_T);
1046 regs->tf_ss = _udatasel;
1047 regs->tf_cs = _ucodesel;
1048 regs->tf_rbx = ps_strings;
1051 * Reset the hardware debug registers if they were in use.
1052 * They won't have any meaning for the newly exec'd process.
1054 if (pcb->pcb_flags & PCB_DBREGS) {
1060 pcb->pcb_dr7 = 0; /* JG set bit 10? */
1061 if (pcb == td->td_pcb) {
1063 * Clear the debug registers on the running
1064 * CPU, otherwise they will end up affecting
1065 * the next process we switch to.
1069 pcb->pcb_flags &= ~PCB_DBREGS;
1073 * Initialize the math emulator (if any) for the current process.
1074 * Actually, just clear the bit that says that the emulator has
1075 * been initialized. Initialization is delayed until the process
1076 * traps to the emulator (if it is done at all) mainly because
1077 * emulators don't provide an entry point for initialization.
1079 pcb->pcb_flags &= ~FP_SOFTFP;
1082 * NOTE: do not set CR0_TS here. npxinit() must do it after clearing
1083 * gd_npxthread. Otherwise a preemptive interrupt thread
1084 * may panic in npxdna().
1087 load_cr0(rcr0() | CR0_MP);
1090 * NOTE: The MSR values must be correct so we can return to
1091 * userland. gd_user_fs/gs must be correct so the switch
1092 * code knows what the current MSR values are.
1094 pcb->pcb_fsbase = 0; /* Values loaded from PCB on switch */
1095 pcb->pcb_gsbase = 0;
1096 mdcpu->gd_user_fs = 0; /* Cache of current MSR values */
1097 mdcpu->gd_user_gs = 0;
1098 wrmsr(MSR_FSBASE, 0); /* Set MSR values for return to userland */
1099 wrmsr(MSR_KGSBASE, 0);
1101 /* Initialize the npx (if any) for the current process. */
1102 npxinit(__INITIAL_NPXCW__);
1105 pcb->pcb_ds = _udatasel;
1106 pcb->pcb_es = _udatasel;
1107 pcb->pcb_fs = _udatasel;
1108 pcb->pcb_gs = _udatasel;
1117 cr0 |= CR0_NE; /* Done by npxinit() */
1118 cr0 |= CR0_MP | CR0_TS; /* Done at every execve() too. */
1119 cr0 |= CR0_WP | CR0_AM;
1125 sysctl_machdep_adjkerntz(SYSCTL_HANDLER_ARGS)
1128 error = sysctl_handle_int(oidp, oidp->oid_arg1, oidp->oid_arg2,
1130 if (!error && req->newptr)
1135 SYSCTL_PROC(_machdep, CPU_ADJKERNTZ, adjkerntz, CTLTYPE_INT|CTLFLAG_RW,
1136 &adjkerntz, 0, sysctl_machdep_adjkerntz, "I", "");
1139 SYSCTL_INT(_machdep, CPU_DISRTCSET, disable_rtc_set,
1140 CTLFLAG_RW, &disable_rtc_set, 0, "");
1144 SYSCTL_STRUCT(_machdep, CPU_BOOTINFO, bootinfo,
1145 CTLFLAG_RD, &bootinfo, bootinfo, "");
1148 SYSCTL_INT(_machdep, CPU_WALLCLOCK, wall_cmos_clock,
1149 CTLFLAG_RW, &wall_cmos_clock, 0, "");
1151 extern u_long bootdev; /* not a cdev_t - encoding is different */
1152 SYSCTL_ULONG(_machdep, OID_AUTO, guessed_bootdev,
1153 CTLFLAG_RD, &bootdev, 0, "Boot device (not in cdev_t format)");
1156 * Initialize 386 and configure to run kernel
1160 * Initialize segments & interrupt table
1164 struct user_segment_descriptor gdt[NGDT * MAXCPU]; /* global descriptor table */
1165 static struct gate_descriptor idt0[NIDT];
1166 struct gate_descriptor *idt = &idt0[0]; /* interrupt descriptor table */
1168 union descriptor ldt[NLDT]; /* local descriptor table */
1171 /* table descriptors - used to load tables by cpu */
1172 struct region_descriptor r_gdt, r_idt;
1174 #if defined(I586_CPU) && !defined(NO_F00F_HACK)
1175 extern int has_f00f_bug;
1178 static char dblfault_stack[PAGE_SIZE] __aligned(16);
1180 /* JG proc0paddr is a virtual address */
1183 char proc0paddr_buff[LWKT_THREAD_STACK];
1186 /* software prototypes -- in more palatable form */
1187 struct soft_segment_descriptor gdt_segs[] = {
1188 /* GNULL_SEL 0 Null Descriptor */
1189 { 0x0, /* segment base address */
1191 0, /* segment type */
1192 0, /* segment descriptor priority level */
1193 0, /* segment descriptor present */
1195 0, /* default 32 vs 16 bit size */
1196 0 /* limit granularity (byte/page units)*/ },
1197 /* GCODE_SEL 1 Code Descriptor for kernel */
1198 { 0x0, /* segment base address */
1199 0xfffff, /* length - all address space */
1200 SDT_MEMERA, /* segment type */
1201 SEL_KPL, /* segment descriptor priority level */
1202 1, /* segment descriptor present */
1204 0, /* default 32 vs 16 bit size */
1205 1 /* limit granularity (byte/page units)*/ },
1206 /* GDATA_SEL 2 Data Descriptor for kernel */
1207 { 0x0, /* segment base address */
1208 0xfffff, /* length - all address space */
1209 SDT_MEMRWA, /* segment type */
1210 SEL_KPL, /* segment descriptor priority level */
1211 1, /* segment descriptor present */
1213 0, /* default 32 vs 16 bit size */
1214 1 /* limit granularity (byte/page units)*/ },
1215 /* GUCODE32_SEL 3 32 bit Code Descriptor for user */
1216 { 0x0, /* segment base address */
1217 0xfffff, /* length - all address space */
1218 SDT_MEMERA, /* segment type */
1219 SEL_UPL, /* segment descriptor priority level */
1220 1, /* segment descriptor present */
1222 1, /* default 32 vs 16 bit size */
1223 1 /* limit granularity (byte/page units)*/ },
1224 /* GUDATA_SEL 4 32/64 bit Data Descriptor for user */
1225 { 0x0, /* segment base address */
1226 0xfffff, /* length - all address space */
1227 SDT_MEMRWA, /* segment type */
1228 SEL_UPL, /* segment descriptor priority level */
1229 1, /* segment descriptor present */
1231 1, /* default 32 vs 16 bit size */
1232 1 /* limit granularity (byte/page units)*/ },
1233 /* GUCODE_SEL 5 64 bit Code Descriptor for user */
1234 { 0x0, /* segment base address */
1235 0xfffff, /* length - all address space */
1236 SDT_MEMERA, /* segment type */
1237 SEL_UPL, /* segment descriptor priority level */
1238 1, /* segment descriptor present */
1240 0, /* default 32 vs 16 bit size */
1241 1 /* limit granularity (byte/page units)*/ },
1242 /* GPROC0_SEL 6 Proc 0 Tss Descriptor */
1244 0x0, /* segment base address */
1245 sizeof(struct amd64tss)-1,/* length - all address space */
1246 SDT_SYSTSS, /* segment type */
1247 SEL_KPL, /* segment descriptor priority level */
1248 1, /* segment descriptor present */
1250 0, /* unused - default 32 vs 16 bit size */
1251 0 /* limit granularity (byte/page units)*/ },
1252 /* Actually, the TSS is a system descriptor which is double size */
1253 { 0x0, /* segment base address */
1255 0, /* segment type */
1256 0, /* segment descriptor priority level */
1257 0, /* segment descriptor present */
1259 0, /* default 32 vs 16 bit size */
1260 0 /* limit granularity (byte/page units)*/ },
1261 /* GUGS32_SEL 8 32 bit GS Descriptor for user */
1262 { 0x0, /* segment base address */
1263 0xfffff, /* length - all address space */
1264 SDT_MEMRWA, /* segment type */
1265 SEL_UPL, /* segment descriptor priority level */
1266 1, /* segment descriptor present */
1268 1, /* default 32 vs 16 bit size */
1269 1 /* limit granularity (byte/page units)*/ },
1273 setidt(int idx, inthand_t *func, int typ, int dpl, int ist)
1275 struct gate_descriptor *ip;
1278 ip->gd_looffset = (uintptr_t)func;
1279 ip->gd_selector = GSEL(GCODE_SEL, SEL_KPL);
1285 ip->gd_hioffset = ((uintptr_t)func)>>16 ;
1288 #define IDTVEC(name) __CONCAT(X,name)
1291 IDTVEC(div), IDTVEC(dbg), IDTVEC(nmi), IDTVEC(bpt), IDTVEC(ofl),
1292 IDTVEC(bnd), IDTVEC(ill), IDTVEC(dna), IDTVEC(fpusegm),
1293 IDTVEC(tss), IDTVEC(missing), IDTVEC(stk), IDTVEC(prot),
1294 IDTVEC(page), IDTVEC(mchk), IDTVEC(rsvd), IDTVEC(fpu), IDTVEC(align),
1295 IDTVEC(xmm), IDTVEC(dblfault),
1296 IDTVEC(fast_syscall), IDTVEC(fast_syscall32);
1298 #ifdef DEBUG_INTERRUPTS
1299 extern inthand_t *Xrsvdary[256];
1303 sdtossd(struct user_segment_descriptor *sd, struct soft_segment_descriptor *ssd)
1305 ssd->ssd_base = (sd->sd_hibase << 24) | sd->sd_lobase;
1306 ssd->ssd_limit = (sd->sd_hilimit << 16) | sd->sd_lolimit;
1307 ssd->ssd_type = sd->sd_type;
1308 ssd->ssd_dpl = sd->sd_dpl;
1309 ssd->ssd_p = sd->sd_p;
1310 ssd->ssd_def32 = sd->sd_def32;
1311 ssd->ssd_gran = sd->sd_gran;
1315 ssdtosd(struct soft_segment_descriptor *ssd, struct user_segment_descriptor *sd)
1318 sd->sd_lobase = (ssd->ssd_base) & 0xffffff;
1319 sd->sd_hibase = (ssd->ssd_base >> 24) & 0xff;
1320 sd->sd_lolimit = (ssd->ssd_limit) & 0xffff;
1321 sd->sd_hilimit = (ssd->ssd_limit >> 16) & 0xf;
1322 sd->sd_type = ssd->ssd_type;
1323 sd->sd_dpl = ssd->ssd_dpl;
1324 sd->sd_p = ssd->ssd_p;
1325 sd->sd_long = ssd->ssd_long;
1326 sd->sd_def32 = ssd->ssd_def32;
1327 sd->sd_gran = ssd->ssd_gran;
1331 ssdtosyssd(struct soft_segment_descriptor *ssd,
1332 struct system_segment_descriptor *sd)
1335 sd->sd_lobase = (ssd->ssd_base) & 0xffffff;
1336 sd->sd_hibase = (ssd->ssd_base >> 24) & 0xfffffffffful;
1337 sd->sd_lolimit = (ssd->ssd_limit) & 0xffff;
1338 sd->sd_hilimit = (ssd->ssd_limit >> 16) & 0xf;
1339 sd->sd_type = ssd->ssd_type;
1340 sd->sd_dpl = ssd->ssd_dpl;
1341 sd->sd_p = ssd->ssd_p;
1342 sd->sd_gran = ssd->ssd_gran;
1348 * Populate the (physmap) array with base/bound pairs describing the
1349 * available physical memory in the system, then test this memory and
1350 * build the phys_avail array describing the actually-available memory.
1352 * If we cannot accurately determine the physical memory map, then use
1353 * value from the 0xE801 call, and failing that, the RTC.
1355 * Total memory size may be set by the kernel environment variable
1356 * hw.physmem or the compile-time define MAXMEM.
1358 * XXX first should be vm_paddr_t.
1361 getmemsize(caddr_t kmdp, u_int64_t first)
1363 int i, off, physmap_idx, pa_indx, da_indx;
1364 vm_paddr_t pa, physmap[PHYSMAP_SIZE];
1365 u_long physmem_tunable;
1367 struct bios_smap *smapbase, *smap, *smapend;
1369 quad_t dcons_addr, dcons_size;
1371 bzero(physmap, sizeof(physmap));
1376 * get memory map from INT 15:E820, kindly supplied by the loader.
1378 * subr_module.c says:
1379 * "Consumer may safely assume that size value precedes data."
1380 * ie: an int32_t immediately precedes smap.
1382 smapbase = (struct bios_smap *)preload_search_info(kmdp,
1383 MODINFO_METADATA | MODINFOMD_SMAP);
1384 if (smapbase == NULL)
1385 panic("No BIOS smap info from loader!");
1387 smapsize = *((u_int32_t *)smapbase - 1);
1388 smapend = (struct bios_smap *)((uintptr_t)smapbase + smapsize);
1390 for (smap = smapbase; smap < smapend; smap++) {
1391 if (boothowto & RB_VERBOSE)
1392 kprintf("SMAP type=%02x base=%016lx len=%016lx\n",
1393 smap->type, smap->base, smap->length);
1395 if (smap->type != SMAP_TYPE_MEMORY)
1398 if (smap->length == 0)
1401 for (i = 0; i <= physmap_idx; i += 2) {
1402 if (smap->base < physmap[i + 1]) {
1403 if (boothowto & RB_VERBOSE)
1405 "Overlapping or non-monotonic memory region, ignoring second region\n");
1410 if (smap->base == physmap[physmap_idx + 1]) {
1411 physmap[physmap_idx + 1] += smap->length;
1416 if (physmap_idx == PHYSMAP_SIZE) {
1418 "Too many segments in the physical address map, giving up\n");
1421 physmap[physmap_idx] = smap->base;
1422 physmap[physmap_idx + 1] = smap->base + smap->length;
1426 * Find the 'base memory' segment for SMP
1429 for (i = 0; i <= physmap_idx; i += 2) {
1430 if (physmap[i] == 0x00000000) {
1431 basemem = physmap[i + 1] / 1024;
1436 panic("BIOS smap did not include a basemem segment!");
1439 /* make hole for AP bootstrap code */
1440 physmap[1] = mp_bootaddress(physmap[1] / 1024);
1442 /* look for the MP hardware - needed for apic addresses */
1447 * Maxmem isn't the "maximum memory", it's one larger than the
1448 * highest page of the physical address space. It should be
1449 * called something like "Maxphyspage". We may adjust this
1450 * based on ``hw.physmem'' and the results of the memory test.
1452 Maxmem = atop(physmap[physmap_idx + 1]);
1455 Maxmem = MAXMEM / 4;
1458 if (TUNABLE_ULONG_FETCH("hw.physmem", &physmem_tunable))
1459 Maxmem = atop(physmem_tunable);
1462 * Don't allow MAXMEM or hw.physmem to extend the amount of memory
1465 if (Maxmem > atop(physmap[physmap_idx + 1]))
1466 Maxmem = atop(physmap[physmap_idx + 1]);
1468 if (atop(physmap[physmap_idx + 1]) != Maxmem &&
1469 (boothowto & RB_VERBOSE))
1470 kprintf("Physical memory use set to %ldK\n", Maxmem * 4);
1472 /* call pmap initialization to make new kernel address space */
1473 pmap_bootstrap(&first);
1476 * Size up each available chunk of physical memory.
1478 physmap[0] = PAGE_SIZE; /* mask off page 0 */
1481 phys_avail[pa_indx++] = physmap[0];
1482 phys_avail[pa_indx] = physmap[0];
1483 dump_avail[da_indx] = physmap[0];
1487 * Get dcons buffer address
1489 if (kgetenv_quad("dcons.addr", &dcons_addr) == 0 ||
1490 kgetenv_quad("dcons.size", &dcons_size) == 0)
1494 * physmap is in bytes, so when converting to page boundaries,
1495 * round up the start address and round down the end address.
1497 for (i = 0; i <= physmap_idx; i += 2) {
1500 end = ptoa((vm_paddr_t)Maxmem);
1501 if (physmap[i + 1] < end)
1502 end = trunc_page(physmap[i + 1]);
1503 for (pa = round_page(physmap[i]); pa < end; pa += PAGE_SIZE) {
1504 int tmp, page_bad, full;
1505 int *ptr = (int *)CADDR1;
1509 * block out kernel memory as not available.
1511 if (pa >= 0x100000 && pa < first)
1515 * block out dcons buffer
1518 && pa >= trunc_page(dcons_addr)
1519 && pa < dcons_addr + dcons_size)
1525 * map page into kernel: valid, read/write,non-cacheable
1527 *pte = pa | PG_V | PG_RW | PG_N;
1532 * Test for alternating 1's and 0's
1534 *(volatile int *)ptr = 0xaaaaaaaa;
1535 if (*(volatile int *)ptr != 0xaaaaaaaa)
1538 * Test for alternating 0's and 1's
1540 *(volatile int *)ptr = 0x55555555;
1541 if (*(volatile int *)ptr != 0x55555555)
1546 *(volatile int *)ptr = 0xffffffff;
1547 if (*(volatile int *)ptr != 0xffffffff)
1552 *(volatile int *)ptr = 0x0;
1553 if (*(volatile int *)ptr != 0x0)
1556 * Restore original value.
1561 * Adjust array of valid/good pages.
1563 if (page_bad == TRUE)
1566 * If this good page is a continuation of the
1567 * previous set of good pages, then just increase
1568 * the end pointer. Otherwise start a new chunk.
1569 * Note that "end" points one higher than end,
1570 * making the range >= start and < end.
1571 * If we're also doing a speculative memory
1572 * test and we at or past the end, bump up Maxmem
1573 * so that we keep going. The first bad page
1574 * will terminate the loop.
1576 if (phys_avail[pa_indx] == pa) {
1577 phys_avail[pa_indx] += PAGE_SIZE;
1580 if (pa_indx == PHYS_AVAIL_ARRAY_END) {
1582 "Too many holes in the physical address space, giving up\n");
1587 phys_avail[pa_indx++] = pa; /* start */
1588 phys_avail[pa_indx] = pa + PAGE_SIZE; /* end */
1592 if (dump_avail[da_indx] == pa) {
1593 dump_avail[da_indx] += PAGE_SIZE;
1596 if (da_indx == DUMP_AVAIL_ARRAY_END) {
1600 dump_avail[da_indx++] = pa; /* start */
1601 dump_avail[da_indx] = pa + PAGE_SIZE; /* end */
1613 * The last chunk must contain at least one page plus the message
1614 * buffer to avoid complicating other code (message buffer address
1615 * calculation, etc.).
1617 while (phys_avail[pa_indx - 1] + PAGE_SIZE +
1618 round_page(MSGBUF_SIZE) >= phys_avail[pa_indx]) {
1619 physmem -= atop(phys_avail[pa_indx] - phys_avail[pa_indx - 1]);
1620 phys_avail[pa_indx--] = 0;
1621 phys_avail[pa_indx--] = 0;
1624 Maxmem = atop(phys_avail[pa_indx]);
1626 /* Trim off space for the message buffer. */
1627 phys_avail[pa_indx] -= round_page(MSGBUF_SIZE);
1629 avail_end = phys_avail[pa_indx];
1631 /* Map the message buffer. */
1632 for (off = 0; off < round_page(MSGBUF_SIZE); off += PAGE_SIZE)
1633 pmap_kenter((vm_offset_t)msgbufp + off, phys_avail[pa_indx] +
1646 * 7 Device Not Available (x87)
1648 * 9 Coprocessor Segment overrun (unsupported, reserved)
1650 * 11 Segment not present
1652 * 13 General Protection
1655 * 16 x87 FP Exception pending
1656 * 17 Alignment Check
1658 * 19 SIMD floating point
1660 * 32-255 INTn/external sources
1663 hammer_time(u_int64_t modulep, u_int64_t physfree)
1668 int metadata_missing, off;
1670 struct mdglobaldata *gd;
1676 * This must be done before the first references
1677 * to CPU_prvspace[0] are made.
1679 init_paging(&physfree);
1683 * Prevent lowering of the ipl if we call tsleep() early.
1685 gd = &CPU_prvspace[0].mdglobaldata;
1686 bzero(gd, sizeof(*gd));
1689 * Note: on both UP and SMP curthread must be set non-NULL
1690 * early in the boot sequence because the system assumes
1691 * that 'curthread' is never NULL.
1694 gd->mi.gd_curthread = &thread0;
1695 thread0.td_gd = &gd->mi;
1697 atdevbase = ISA_HOLE_START + PTOV_OFFSET;
1700 metadata_missing = 0;
1701 if (bootinfo.bi_modulep) {
1702 preload_metadata = (caddr_t)bootinfo.bi_modulep + KERNBASE;
1703 preload_bootstrap_relocate(KERNBASE);
1705 metadata_missing = 1;
1707 if (bootinfo.bi_envp)
1708 kern_envp = (caddr_t)bootinfo.bi_envp + KERNBASE;
1711 preload_metadata = (caddr_t)(uintptr_t)(modulep + PTOV_OFFSET);
1712 preload_bootstrap_relocate(PTOV_OFFSET);
1713 kmdp = preload_search_by_type("elf kernel");
1715 kmdp = preload_search_by_type("elf64 kernel");
1716 boothowto = MD_FETCH(kmdp, MODINFOMD_HOWTO, int);
1717 kern_envp = MD_FETCH(kmdp, MODINFOMD_ENVP, char *) + PTOV_OFFSET;
1719 ksym_start = MD_FETCH(kmdp, MODINFOMD_SSYM, uintptr_t);
1720 ksym_end = MD_FETCH(kmdp, MODINFOMD_ESYM, uintptr_t);
1724 * start with one cpu. Note: with one cpu, ncpus2_shift, ncpus2_mask,
1725 * and ncpus_fit_mask remain 0.
1730 /* Init basic tunables, hz etc */
1734 * make gdt memory segments
1736 gdt_segs[GPROC0_SEL].ssd_base =
1737 (uintptr_t) &CPU_prvspace[0].mdglobaldata.gd_common_tss;
1739 gd->mi.gd_prvspace = &CPU_prvspace[0];
1741 for (x = 0; x < NGDT; x++) {
1742 if (x != GPROC0_SEL && x != (GPROC0_SEL + 1))
1743 ssdtosd(&gdt_segs[x], &gdt[x]);
1745 ssdtosyssd(&gdt_segs[GPROC0_SEL],
1746 (struct system_segment_descriptor *)&gdt[GPROC0_SEL]);
1748 r_gdt.rd_limit = NGDT * sizeof(gdt[0]) - 1;
1749 r_gdt.rd_base = (long) gdt;
1752 wrmsr(MSR_FSBASE, 0); /* User value */
1753 wrmsr(MSR_GSBASE, (u_int64_t)&gd->mi);
1754 wrmsr(MSR_KGSBASE, 0); /* User value while in the kernel */
1756 mi_gdinit(&gd->mi, 0);
1758 proc0paddr = proc0paddr_buff;
1759 mi_proc0init(&gd->mi, proc0paddr);
1760 safepri = TDPRI_MAX;
1762 /* spinlocks and the BGL */
1766 for (x = 0; x < NIDT; x++)
1767 setidt(x, &IDTVEC(rsvd), SDT_SYSIGT, SEL_KPL, 0);
1768 setidt(IDT_DE, &IDTVEC(div), SDT_SYSIGT, SEL_KPL, 0);
1769 setidt(IDT_DB, &IDTVEC(dbg), SDT_SYSIGT, SEL_KPL, 0);
1770 setidt(IDT_NMI, &IDTVEC(nmi), SDT_SYSIGT, SEL_KPL, 1);
1771 setidt(IDT_BP, &IDTVEC(bpt), SDT_SYSIGT, SEL_UPL, 0);
1772 setidt(IDT_OF, &IDTVEC(ofl), SDT_SYSIGT, SEL_KPL, 0);
1773 setidt(IDT_BR, &IDTVEC(bnd), SDT_SYSIGT, SEL_KPL, 0);
1774 setidt(IDT_UD, &IDTVEC(ill), SDT_SYSIGT, SEL_KPL, 0);
1775 setidt(IDT_NM, &IDTVEC(dna), SDT_SYSIGT, SEL_KPL, 0);
1776 setidt(IDT_DF, &IDTVEC(dblfault), SDT_SYSIGT, SEL_KPL, 1);
1777 setidt(IDT_FPUGP, &IDTVEC(fpusegm), SDT_SYSIGT, SEL_KPL, 0);
1778 setidt(IDT_TS, &IDTVEC(tss), SDT_SYSIGT, SEL_KPL, 0);
1779 setidt(IDT_NP, &IDTVEC(missing), SDT_SYSIGT, SEL_KPL, 0);
1780 setidt(IDT_SS, &IDTVEC(stk), SDT_SYSIGT, SEL_KPL, 0);
1781 setidt(IDT_GP, &IDTVEC(prot), SDT_SYSIGT, SEL_KPL, 0);
1782 setidt(IDT_PF, &IDTVEC(page), SDT_SYSIGT, SEL_KPL, 0);
1783 setidt(IDT_MF, &IDTVEC(fpu), SDT_SYSIGT, SEL_KPL, 0);
1784 setidt(IDT_AC, &IDTVEC(align), SDT_SYSIGT, SEL_KPL, 0);
1785 setidt(IDT_MC, &IDTVEC(mchk), SDT_SYSIGT, SEL_KPL, 0);
1786 setidt(IDT_XF, &IDTVEC(xmm), SDT_SYSIGT, SEL_KPL, 0);
1788 r_idt.rd_limit = sizeof(idt0) - 1;
1789 r_idt.rd_base = (long) idt;
1793 * Initialize the console before we print anything out.
1798 if (metadata_missing)
1799 kprintf("WARNING: loader(8) metadata is missing!\n");
1809 if (boothowto & RB_KDB)
1810 Debugger("Boot flags requested debugger");
1814 finishidentcpu(); /* Final stage of CPU initialization */
1815 setidt(6, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1816 setidt(13, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1818 identify_cpu(); /* Final stage of CPU initialization */
1819 initializecpu(); /* Initialize CPU registers */
1821 /* make an initial tss so cpu can get interrupt stack on syscall! */
1822 gd->gd_common_tss.tss_rsp0 =
1823 (register_t)(thread0.td_kstack +
1824 KSTACK_PAGES * PAGE_SIZE - sizeof(struct pcb));
1825 /* Ensure the stack is aligned to 16 bytes */
1826 gd->gd_common_tss.tss_rsp0 &= ~0xFul;
1827 gd->gd_rsp0 = gd->gd_common_tss.tss_rsp0;
1829 /* doublefault stack space, runs on ist1 */
1830 gd->gd_common_tss.tss_ist1 = (long)&dblfault_stack[sizeof(dblfault_stack)];
1832 /* Set the IO permission bitmap (empty due to tss seg limit) */
1833 gd->gd_common_tss.tss_iobase = sizeof(struct amd64tss);
1835 gsel_tss = GSEL(GPROC0_SEL, SEL_KPL);
1836 gd->gd_tss_gdt = &gdt[GPROC0_SEL];
1837 gd->gd_common_tssd = *gd->gd_tss_gdt;
1840 /* Set up the fast syscall stuff */
1841 msr = rdmsr(MSR_EFER) | EFER_SCE;
1842 wrmsr(MSR_EFER, msr);
1843 wrmsr(MSR_LSTAR, (u_int64_t)IDTVEC(fast_syscall));
1844 wrmsr(MSR_CSTAR, (u_int64_t)IDTVEC(fast_syscall32));
1845 msr = ((u_int64_t)GSEL(GCODE_SEL, SEL_KPL) << 32) |
1846 ((u_int64_t)GSEL(GUCODE32_SEL, SEL_UPL) << 48);
1847 wrmsr(MSR_STAR, msr);
1848 wrmsr(MSR_SF_MASK, PSL_NT|PSL_T|PSL_I|PSL_C|PSL_D);
1850 getmemsize(kmdp, physfree);
1851 init_param2(physmem);
1853 /* now running on new page tables, configured,and u/iom is accessible */
1855 /* Map the message buffer. */
1857 for (off = 0; off < round_page(MSGBUF_SIZE); off += PAGE_SIZE)
1858 pmap_kenter((vm_offset_t)msgbufp + off, avail_end + off);
1861 msgbufinit(msgbufp, MSGBUF_SIZE);
1864 /* transfer to user mode */
1866 _ucodesel = GSEL(GUCODE_SEL, SEL_UPL);
1867 _udatasel = GSEL(GUDATA_SEL, SEL_UPL);
1868 _ucode32sel = GSEL(GUCODE32_SEL, SEL_UPL);
1874 /* setup proc 0's pcb */
1875 thread0.td_pcb->pcb_flags = 0;
1876 thread0.td_pcb->pcb_cr3 = KPML4phys;
1877 thread0.td_pcb->pcb_ext = 0;
1878 lwp0.lwp_md.md_regs = &proc0_tf;
1879 env = kgetenv("kernelname");
1881 strlcpy(kernelname, env, sizeof(kernelname));
1883 /* Location of kernel stack for locore */
1884 return ((u_int64_t)thread0.td_pcb);
1888 * Initialize machine-dependant portions of the global data structure.
1889 * Note that the global data area and cpu0's idlestack in the private
1890 * data space were allocated in locore.
1892 * Note: the idlethread's cpl is 0
1894 * WARNING! Called from early boot, 'mycpu' may not work yet.
1897 cpu_gdinit(struct mdglobaldata *gd, int cpu)
1900 gd->mi.gd_curthread = &gd->mi.gd_idlethread;
1902 lwkt_init_thread(&gd->mi.gd_idlethread,
1903 gd->mi.gd_prvspace->idlestack,
1904 sizeof(gd->mi.gd_prvspace->idlestack),
1905 TDF_MPSAFE, &gd->mi);
1906 lwkt_set_comm(&gd->mi.gd_idlethread, "idle_%d", cpu);
1907 gd->mi.gd_idlethread.td_switch = cpu_lwkt_switch;
1908 gd->mi.gd_idlethread.td_sp -= sizeof(void *);
1909 *(void **)gd->mi.gd_idlethread.td_sp = cpu_idle_restore;
1913 is_globaldata_space(vm_offset_t saddr, vm_offset_t eaddr)
1915 if (saddr >= (vm_offset_t)&CPU_prvspace[0] &&
1916 eaddr <= (vm_offset_t)&CPU_prvspace[MAXCPU]) {
1923 globaldata_find(int cpu)
1925 KKASSERT(cpu >= 0 && cpu < ncpus);
1926 return(&CPU_prvspace[cpu].mdglobaldata.mi);
1929 #if defined(I586_CPU) && !defined(NO_F00F_HACK)
1930 static void f00f_hack(void *unused);
1931 SYSINIT(f00f_hack, SI_BOOT2_BIOS, SI_ORDER_ANY, f00f_hack, NULL);
1934 f00f_hack(void *unused)
1936 struct gate_descriptor *new_idt;
1942 kprintf("Intel Pentium detected, installing workaround for F00F bug\n");
1944 r_idt.rd_limit = sizeof(idt0) - 1;
1946 tmp = kmem_alloc(&kernel_map, PAGE_SIZE * 2);
1948 panic("kmem_alloc returned 0");
1949 if (((unsigned int)tmp & (PAGE_SIZE-1)) != 0)
1950 panic("kmem_alloc returned non-page-aligned memory");
1951 /* Put the first seven entries in the lower page */
1952 new_idt = (struct gate_descriptor*)(tmp + PAGE_SIZE - (7*8));
1953 bcopy(idt, new_idt, sizeof(idt0));
1954 r_idt.rd_base = (int)new_idt;
1957 if (vm_map_protect(&kernel_map, tmp, tmp + PAGE_SIZE,
1958 VM_PROT_READ, FALSE) != KERN_SUCCESS)
1959 panic("vm_map_protect failed");
1962 #endif /* defined(I586_CPU) && !NO_F00F_HACK */
1965 ptrace_set_pc(struct lwp *lp, unsigned long addr)
1967 lp->lwp_md.md_regs->tf_rip = addr;
1972 ptrace_single_step(struct lwp *lp)
1974 lp->lwp_md.md_regs->tf_rflags |= PSL_T;
1979 fill_regs(struct lwp *lp, struct reg *regs)
1982 struct trapframe *tp;
1984 tp = lp->lwp_md.md_regs;
1985 bcopy(&tp->tf_rdi, ®s->r_rdi, sizeof(*regs));
1987 pcb = lp->lwp_thread->td_pcb;
1992 set_regs(struct lwp *lp, struct reg *regs)
1995 struct trapframe *tp;
1997 tp = lp->lwp_md.md_regs;
1998 if (!EFL_SECURE(regs->r_rflags, tp->tf_rflags) ||
1999 !CS_SECURE(regs->r_cs))
2001 bcopy(®s->r_rdi, &tp->tf_rdi, sizeof(*regs));
2002 pcb = lp->lwp_thread->td_pcb;
2006 #ifndef CPU_DISABLE_SSE
2008 fill_fpregs_xmm(struct savexmm *sv_xmm, struct save87 *sv_87)
2010 struct env87 *penv_87 = &sv_87->sv_env;
2011 struct envxmm *penv_xmm = &sv_xmm->sv_env;
2014 /* FPU control/status */
2015 penv_87->en_cw = penv_xmm->en_cw;
2016 penv_87->en_sw = penv_xmm->en_sw;
2017 penv_87->en_tw = penv_xmm->en_tw;
2018 penv_87->en_fip = penv_xmm->en_fip;
2019 penv_87->en_fcs = penv_xmm->en_fcs;
2020 penv_87->en_opcode = penv_xmm->en_opcode;
2021 penv_87->en_foo = penv_xmm->en_foo;
2022 penv_87->en_fos = penv_xmm->en_fos;
2025 for (i = 0; i < 8; ++i)
2026 sv_87->sv_ac[i] = sv_xmm->sv_fp[i].fp_acc;
2028 sv_87->sv_ex_sw = sv_xmm->sv_ex_sw;
2032 set_fpregs_xmm(struct save87 *sv_87, struct savexmm *sv_xmm)
2034 struct env87 *penv_87 = &sv_87->sv_env;
2035 struct envxmm *penv_xmm = &sv_xmm->sv_env;
2038 /* FPU control/status */
2039 penv_xmm->en_cw = penv_87->en_cw;
2040 penv_xmm->en_sw = penv_87->en_sw;
2041 penv_xmm->en_tw = penv_87->en_tw;
2042 penv_xmm->en_fip = penv_87->en_fip;
2043 penv_xmm->en_fcs = penv_87->en_fcs;
2044 penv_xmm->en_opcode = penv_87->en_opcode;
2045 penv_xmm->en_foo = penv_87->en_foo;
2046 penv_xmm->en_fos = penv_87->en_fos;
2049 for (i = 0; i < 8; ++i)
2050 sv_xmm->sv_fp[i].fp_acc = sv_87->sv_ac[i];
2052 sv_xmm->sv_ex_sw = sv_87->sv_ex_sw;
2054 #endif /* CPU_DISABLE_SSE */
2057 fill_fpregs(struct lwp *lp, struct fpreg *fpregs)
2059 #ifndef CPU_DISABLE_SSE
2061 fill_fpregs_xmm(&lp->lwp_thread->td_pcb->pcb_save.sv_xmm,
2062 (struct save87 *)fpregs);
2065 #endif /* CPU_DISABLE_SSE */
2066 bcopy(&lp->lwp_thread->td_pcb->pcb_save.sv_87, fpregs, sizeof *fpregs);
2071 set_fpregs(struct lwp *lp, struct fpreg *fpregs)
2073 #ifndef CPU_DISABLE_SSE
2075 set_fpregs_xmm((struct save87 *)fpregs,
2076 &lp->lwp_thread->td_pcb->pcb_save.sv_xmm);
2079 #endif /* CPU_DISABLE_SSE */
2080 bcopy(fpregs, &lp->lwp_thread->td_pcb->pcb_save.sv_87, sizeof *fpregs);
2085 fill_dbregs(struct lwp *lp, struct dbreg *dbregs)
2088 dbregs->dr[0] = rdr0();
2089 dbregs->dr[1] = rdr1();
2090 dbregs->dr[2] = rdr2();
2091 dbregs->dr[3] = rdr3();
2092 dbregs->dr[4] = rdr4();
2093 dbregs->dr[5] = rdr5();
2094 dbregs->dr[6] = rdr6();
2095 dbregs->dr[7] = rdr7();
2099 pcb = lp->lwp_thread->td_pcb;
2100 dbregs->dr[0] = pcb->pcb_dr0;
2101 dbregs->dr[1] = pcb->pcb_dr1;
2102 dbregs->dr[2] = pcb->pcb_dr2;
2103 dbregs->dr[3] = pcb->pcb_dr3;
2106 dbregs->dr[6] = pcb->pcb_dr6;
2107 dbregs->dr[7] = pcb->pcb_dr7;
2113 set_dbregs(struct lwp *lp, struct dbreg *dbregs)
2116 load_dr0(dbregs->dr[0]);
2117 load_dr1(dbregs->dr[1]);
2118 load_dr2(dbregs->dr[2]);
2119 load_dr3(dbregs->dr[3]);
2120 load_dr4(dbregs->dr[4]);
2121 load_dr5(dbregs->dr[5]);
2122 load_dr6(dbregs->dr[6]);
2123 load_dr7(dbregs->dr[7]);
2126 struct ucred *ucred;
2128 uint64_t mask1, mask2;
2131 * Don't let an illegal value for dr7 get set. Specifically,
2132 * check for undefined settings. Setting these bit patterns
2133 * result in undefined behaviour and can lead to an unexpected
2136 /* JG this loop looks unreadable */
2137 /* Check 4 2-bit fields for invalid patterns.
2138 * These fields are R/Wi, for i = 0..3
2140 /* Is 10 in LENi allowed when running in compatibility mode? */
2141 /* Pattern 10 in R/Wi might be used to indicate
2142 * breakpoint on I/O. Further analysis should be
2143 * carried to decide if it is safe and useful to
2144 * provide access to that capability
2146 for (i = 0, mask1 = 0x3<<16, mask2 = 0x2<<16; i < 4;
2147 i++, mask1 <<= 4, mask2 <<= 4)
2148 if ((dbregs->dr[7] & mask1) == mask2)
2151 pcb = lp->lwp_thread->td_pcb;
2152 ucred = lp->lwp_proc->p_ucred;
2155 * Don't let a process set a breakpoint that is not within the
2156 * process's address space. If a process could do this, it
2157 * could halt the system by setting a breakpoint in the kernel
2158 * (if ddb was enabled). Thus, we need to check to make sure
2159 * that no breakpoints are being enabled for addresses outside
2160 * process's address space, unless, perhaps, we were called by
2163 * XXX - what about when the watched area of the user's
2164 * address space is written into from within the kernel
2165 * ... wouldn't that still cause a breakpoint to be generated
2166 * from within kernel mode?
2169 if (priv_check_cred(ucred, PRIV_ROOT, 0) != 0) {
2170 if (dbregs->dr[7] & 0x3) {
2171 /* dr0 is enabled */
2172 if (dbregs->dr[0] >= VM_MAX_USER_ADDRESS)
2176 if (dbregs->dr[7] & (0x3<<2)) {
2177 /* dr1 is enabled */
2178 if (dbregs->dr[1] >= VM_MAX_USER_ADDRESS)
2182 if (dbregs->dr[7] & (0x3<<4)) {
2183 /* dr2 is enabled */
2184 if (dbregs->dr[2] >= VM_MAX_USER_ADDRESS)
2188 if (dbregs->dr[7] & (0x3<<6)) {
2189 /* dr3 is enabled */
2190 if (dbregs->dr[3] >= VM_MAX_USER_ADDRESS)
2195 pcb->pcb_dr0 = dbregs->dr[0];
2196 pcb->pcb_dr1 = dbregs->dr[1];
2197 pcb->pcb_dr2 = dbregs->dr[2];
2198 pcb->pcb_dr3 = dbregs->dr[3];
2199 pcb->pcb_dr6 = dbregs->dr[6];
2200 pcb->pcb_dr7 = dbregs->dr[7];
2202 pcb->pcb_flags |= PCB_DBREGS;
2209 * Return > 0 if a hardware breakpoint has been hit, and the
2210 * breakpoint was in user space. Return 0, otherwise.
2213 user_dbreg_trap(void)
2215 u_int64_t dr7, dr6; /* debug registers dr6 and dr7 */
2216 u_int64_t bp; /* breakpoint bits extracted from dr6 */
2217 int nbp; /* number of breakpoints that triggered */
2218 caddr_t addr[4]; /* breakpoint addresses */
2222 if ((dr7 & 0xff) == 0) {
2224 * all GE and LE bits in the dr7 register are zero,
2225 * thus the trap couldn't have been caused by the
2226 * hardware debug registers
2237 * None of the breakpoint bits are set meaning this
2238 * trap was not caused by any of the debug registers
2244 * at least one of the breakpoints were hit, check to see
2245 * which ones and if any of them are user space addresses
2249 addr[nbp++] = (caddr_t)rdr0();
2252 addr[nbp++] = (caddr_t)rdr1();
2255 addr[nbp++] = (caddr_t)rdr2();
2258 addr[nbp++] = (caddr_t)rdr3();
2261 for (i=0; i<nbp; i++) {
2263 (caddr_t)VM_MAX_USER_ADDRESS) {
2265 * addr[i] is in user space
2272 * None of the breakpoints are in user space.
2280 Debugger(const char *msg)
2282 kprintf("Debugger(\"%s\") called.\n", msg);
2289 * Provide inb() and outb() as functions. They are normally only
2290 * available as macros calling inlined functions, thus cannot be
2291 * called inside DDB.
2293 * The actual code is stolen from <machine/cpufunc.h>, and de-inlined.
2299 /* silence compiler warnings */
2301 void outb(u_int, u_char);
2308 * We use %%dx and not %1 here because i/o is done at %dx and not at
2309 * %edx, while gcc generates inferior code (movw instead of movl)
2310 * if we tell it to load (u_short) port.
2312 __asm __volatile("inb %%dx,%0" : "=a" (data) : "d" (port));
2317 outb(u_int port, u_char data)
2321 * Use an unnecessary assignment to help gcc's register allocator.
2322 * This make a large difference for gcc-1.40 and a tiny difference
2323 * for gcc-2.6.0. For gcc-1.40, al had to be ``asm("ax")'' for
2324 * best results. gcc-2.6.0 can't handle this.
2327 __asm __volatile("outb %0,%%dx" : : "a" (al), "d" (port));
2334 #include "opt_cpu.h"
2338 * initialize all the SMP locks
2341 /* critical region when masking or unmasking interupts */
2342 struct spinlock_deprecated imen_spinlock;
2344 /* Make FAST_INTR() routines sequential */
2345 struct spinlock_deprecated fast_intr_spinlock;
2347 /* critical region for old style disable_intr/enable_intr */
2348 struct spinlock_deprecated mpintr_spinlock;
2350 /* critical region around INTR() routines */
2351 struct spinlock_deprecated intr_spinlock;
2353 /* lock region used by kernel profiling */
2354 struct spinlock_deprecated mcount_spinlock;
2356 /* locks com (tty) data/hardware accesses: a FASTINTR() */
2357 struct spinlock_deprecated com_spinlock;
2359 /* locks kernel kprintfs */
2360 struct spinlock_deprecated cons_spinlock;
2362 /* lock regions around the clock hardware */
2363 struct spinlock_deprecated clock_spinlock;
2365 /* lock around the MP rendezvous */
2366 struct spinlock_deprecated smp_rv_spinlock;
2372 * mp_lock = 0; BSP already owns the MP lock
2375 * Get the initial mp_lock with a count of 1 for the BSP.
2376 * This uses a LOGICAL cpu ID, ie BSP == 0.
2379 cpu_get_initial_mplock();
2382 spin_lock_init(&mcount_spinlock);
2383 spin_lock_init(&fast_intr_spinlock);
2384 spin_lock_init(&intr_spinlock);
2385 spin_lock_init(&mpintr_spinlock);
2386 spin_lock_init(&imen_spinlock);
2387 spin_lock_init(&smp_rv_spinlock);
2388 spin_lock_init(&com_spinlock);
2389 spin_lock_init(&clock_spinlock);
2390 spin_lock_init(&cons_spinlock);
2392 /* our token pool needs to work early */
2393 lwkt_token_pool_init();