2 * Copyright (c) 1982, 1987, 1990 The Regents of the University of California.
3 * Copyright (c) 1992 Terrence R. Lambert.
4 * Copyright (c) 2003 Peter Wemm.
5 * Copyright (c) 2008 The DragonFly Project.
8 * This code is derived from software contributed to Berkeley by
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
19 * 3. All advertising materials mentioning features or use of this software
20 * must display the following acknowledgement:
21 * This product includes software developed by the University of
22 * California, Berkeley and its contributors.
23 * 4. Neither the name of the University nor the names of its contributors
24 * may be used to endorse or promote products derived from this software
25 * without specific prior written permission.
27 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
28 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
29 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
30 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
31 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
32 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
33 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
34 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
35 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
36 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
39 * from: @(#)machdep.c 7.4 (Berkeley) 6/3/91
40 * $FreeBSD: src/sys/i386/i386/machdep.c,v 1.385.2.30 2003/05/31 08:48:05 alc Exp $
41 * $DragonFly: src/sys/platform/pc64/amd64/machdep.c,v 1.1 2008/08/29 17:07:10 dillon Exp $
44 #include "use_ether.h"
45 //#include "use_npx.h"
47 #include "opt_atalk.h"
48 #include "opt_compat.h"
51 #include "opt_directio.h"
54 #include "opt_msgbuf.h"
57 #include <sys/param.h>
58 #include <sys/systm.h>
59 #include <sys/sysproto.h>
60 #include <sys/signalvar.h>
61 #include <sys/kernel.h>
62 #include <sys/linker.h>
63 #include <sys/malloc.h>
67 #include <sys/reboot.h>
69 #include <sys/msgbuf.h>
70 #include <sys/sysent.h>
71 #include <sys/sysctl.h>
72 #include <sys/vmmeter.h>
74 #include <sys/upcall.h>
75 #include <sys/usched.h>
79 #include <vm/vm_param.h>
81 #include <vm/vm_kern.h>
82 #include <vm/vm_object.h>
83 #include <vm/vm_page.h>
84 #include <vm/vm_map.h>
85 #include <vm/vm_pager.h>
86 #include <vm/vm_extern.h>
88 #include <sys/thread2.h>
96 #include <machine/cpu.h>
97 #include <machine/clock.h>
98 #include <machine/specialreg.h>
100 #include <machine/bootinfo.h>
102 #include <machine/intr_machdep.h> /* for inthand_t */
103 #include <machine/md_var.h>
104 #include <machine/metadata.h>
105 #include <machine/pc/bios.h>
106 #include <machine/pcb_ext.h> /* pcb.h included via sys/user.h */
107 #include <machine/globaldata.h> /* CPU_prvspace */
108 #include <machine/smp.h>
110 #include <machine/perfmon.h>
112 #include <machine/cputypes.h>
115 #include <bus/isa/i386/isa_device.h>
117 #include <machine_base/isa/intr_machdep.h>
118 #include <bus/isa/rtc.h>
119 #include <sys/random.h>
120 #include <sys/ptrace.h>
121 #include <machine/sigframe.h>
123 #define PHYSMAP_ENTRIES 10
125 extern void init386(int first);
126 extern void dblfault_handler(void);
127 extern u_int64_t hammer_time(u_int64_t, u_int64_t);
129 extern void printcpuinfo(void); /* XXX header file */
130 extern void identify_cpu(void);
132 extern void finishidentcpu(void);
134 extern void panicifcpuunsupported(void);
135 extern void initializecpu(void);
137 extern void init_paging(vm_paddr_t *);
139 static void cpu_startup(void *);
140 #ifndef CPU_DISABLE_SSE
141 static void set_fpregs_xmm(struct save87 *, struct savexmm *);
142 static void fill_fpregs_xmm(struct savexmm *, struct save87 *);
143 #endif /* CPU_DISABLE_SSE */
145 extern void ffs_rawread_setup(void);
146 #endif /* DIRECTIO */
147 static void init_locks(void);
149 SYSINIT(cpu, SI_BOOT2_SMP, SI_ORDER_FIRST, cpu_startup, NULL)
152 extern vm_offset_t ksym_start, ksym_end;
155 uint64_t common_lvl4_phys;
156 uint64_t common_lvl3_phys;
161 pdp_entry_t *link_pdpe;
164 int _udatasel, _ucodesel, _ucode32sel;
167 int64_t tsc_offsets[MAXCPU];
169 int64_t tsc_offsets[1];
172 #if defined(SWTCH_OPTIM_STATS)
173 extern int swtch_optim_stats;
174 SYSCTL_INT(_debug, OID_AUTO, swtch_optim_stats,
175 CTLFLAG_RD, &swtch_optim_stats, 0, "");
176 SYSCTL_INT(_debug, OID_AUTO, tlb_flush_count,
177 CTLFLAG_RD, &tlb_flush_count, 0, "");
183 sysctl_hw_physmem(SYSCTL_HANDLER_ARGS)
185 int error = sysctl_handle_int(oidp, 0, ctob(physmem), req);
189 SYSCTL_PROC(_hw, HW_PHYSMEM, physmem, CTLTYPE_INT|CTLFLAG_RD,
190 0, 0, sysctl_hw_physmem, "IU", "");
193 sysctl_hw_usermem(SYSCTL_HANDLER_ARGS)
195 int error = sysctl_handle_int(oidp, 0,
196 ctob(physmem - vmstats.v_wire_count), req);
200 SYSCTL_PROC(_hw, HW_USERMEM, usermem, CTLTYPE_INT|CTLFLAG_RD,
201 0, 0, sysctl_hw_usermem, "IU", "");
204 sysctl_hw_availpages(SYSCTL_HANDLER_ARGS)
207 int error = sysctl_handle_int(oidp, 0,
208 i386_btop(avail_end - avail_start), req);
215 SYSCTL_PROC(_hw, OID_AUTO, availpages, CTLTYPE_INT|CTLFLAG_RD,
216 0, 0, sysctl_hw_availpages, "I", "");
219 sysctl_machdep_msgbuf(SYSCTL_HANDLER_ARGS)
223 /* Unwind the buffer, so that it's linear (possibly starting with
224 * some initial nulls).
226 error=sysctl_handle_opaque(oidp,msgbufp->msg_ptr+msgbufp->msg_bufr,
227 msgbufp->msg_size-msgbufp->msg_bufr,req);
228 if(error) return(error);
229 if(msgbufp->msg_bufr>0) {
230 error=sysctl_handle_opaque(oidp,msgbufp->msg_ptr,
231 msgbufp->msg_bufr,req);
236 SYSCTL_PROC(_machdep, OID_AUTO, msgbuf, CTLTYPE_STRING|CTLFLAG_RD,
237 0, 0, sysctl_machdep_msgbuf, "A","Contents of kernel message buffer");
239 static int msgbuf_clear;
242 sysctl_machdep_msgbuf_clear(SYSCTL_HANDLER_ARGS)
245 error = sysctl_handle_int(oidp, oidp->oid_arg1, oidp->oid_arg2,
247 if (!error && req->newptr) {
248 /* Clear the buffer and reset write pointer */
249 bzero(msgbufp->msg_ptr,msgbufp->msg_size);
250 msgbufp->msg_bufr=msgbufp->msg_bufx=0;
256 SYSCTL_PROC(_machdep, OID_AUTO, msgbuf_clear, CTLTYPE_INT|CTLFLAG_RW,
257 &msgbuf_clear, 0, sysctl_machdep_msgbuf_clear, "I",
258 "Clear kernel message buffer");
260 vm_paddr_t Maxmem = 0;
263 * The number of PHYSMAP entries must be one less than the number of
264 * PHYSSEG entries because the PHYSMAP entry that spans the largest
265 * physical address that is accessible by ISA DMA is split into two
268 #define PHYSMAP_SIZE (2 * (VM_PHYSSEG_MAX - 1))
270 vm_paddr_t phys_avail[PHYSMAP_SIZE + 2];
271 vm_paddr_t dump_avail[PHYSMAP_SIZE + 2];
273 /* must be 2 less so 0 0 can signal end of chunks */
274 #define PHYS_AVAIL_ARRAY_END ((sizeof(phys_avail) / sizeof(phys_avail[0])) - 2)
275 #define DUMP_AVAIL_ARRAY_END ((sizeof(dump_avail) / sizeof(dump_avail[0])) - 2)
277 static vm_offset_t buffer_sva, buffer_eva;
278 vm_offset_t clean_sva, clean_eva;
279 static vm_offset_t pager_sva, pager_eva;
280 static struct trapframe proc0_tf;
283 cpu_startup(void *dummy)
287 vm_offset_t firstaddr;
289 if (boothowto & RB_VERBOSE)
293 * Good {morning,afternoon,evening,night}.
295 kprintf("%s", version);
298 panicifcpuunsupported();
302 kprintf("real memory = %llu (%lluK bytes)\n",
303 (long long)ptoa(Maxmem), (long long)ptoa(Maxmem) / 1024);
305 * Display any holes after the first chunk of extended memory.
310 kprintf("Physical memory chunk(s):\n");
311 for (indx = 0; phys_avail[indx + 1] != 0; indx += 2) {
312 vm_paddr_t size1 = phys_avail[indx + 1] - phys_avail[indx];
314 kprintf("0x%08llx - 0x%08llx, %llu bytes (%llu pages)\n",
315 (long long)phys_avail[indx],
316 (long long)phys_avail[indx + 1] - 1,
318 (long long)(size1 / PAGE_SIZE));
323 * Allocate space for system data structures.
324 * The first available kernel virtual address is in "v".
325 * As pages of kernel virtual memory are allocated, "v" is incremented.
326 * As pages of memory are allocated and cleared,
327 * "firstaddr" is incremented.
328 * An index into the kernel page table corresponding to the
329 * virtual memory address maintained in "v" is kept in "mapaddr".
333 * Make two passes. The first pass calculates how much memory is
334 * needed and allocates it. The second pass assigns virtual
335 * addresses to the various data structures.
339 v = (caddr_t)firstaddr;
341 #define valloc(name, type, num) \
342 (name) = (type *)v; v = (caddr_t)((name)+(num))
343 #define valloclim(name, type, num, lim) \
344 (name) = (type *)v; v = (caddr_t)((lim) = ((name)+(num)))
347 * The nominal buffer size (and minimum KVA allocation) is BKVASIZE.
348 * For the first 64MB of ram nominally allocate sufficient buffers to
349 * cover 1/4 of our ram. Beyond the first 64MB allocate additional
350 * buffers to cover 1/20 of our ram over 64MB. When auto-sizing
351 * the buffer cache we limit the eventual kva reservation to
354 * factor represents the 1/4 x ram conversion.
357 int factor = 4 * BKVASIZE / 1024;
358 int kbytes = physmem * (PAGE_SIZE / 1024);
362 nbuf += min((kbytes - 4096) / factor, 65536 / factor);
364 nbuf += (kbytes - 65536) * 2 / (factor * 5);
365 if (maxbcache && nbuf > maxbcache / BKVASIZE)
366 nbuf = maxbcache / BKVASIZE;
370 * Do not allow the buffer_map to be more then 1/2 the size of the
373 if (nbuf > (virtual_end - virtual_start) / (BKVASIZE * 2)) {
374 nbuf = (virtual_end - virtual_start) / (BKVASIZE * 2);
375 kprintf("Warning: nbufs capped at %d\n", nbuf);
378 nswbuf = max(min(nbuf/4, 256), 16);
380 if (nswbuf < NSWBUF_MIN)
387 valloc(swbuf, struct buf, nswbuf);
388 valloc(buf, struct buf, nbuf);
391 * End of first pass, size has been calculated so allocate memory
393 if (firstaddr == 0) {
394 size = (vm_size_t)(v - firstaddr);
395 firstaddr = kmem_alloc(&kernel_map, round_page(size));
397 panic("startup: no room for tables");
402 * End of second pass, addresses have been assigned
404 if ((vm_size_t)(v - firstaddr) != size)
405 panic("startup: table size inconsistency");
407 kmem_suballoc(&kernel_map, &clean_map, &clean_sva, &clean_eva,
408 (nbuf*BKVASIZE) + (nswbuf*MAXPHYS) + pager_map_size);
409 kmem_suballoc(&clean_map, &buffer_map, &buffer_sva, &buffer_eva,
411 buffer_map.system_map = 1;
412 kmem_suballoc(&clean_map, &pager_map, &pager_sva, &pager_eva,
413 (nswbuf*MAXPHYS) + pager_map_size);
414 pager_map.system_map = 1;
416 #if defined(USERCONFIG)
418 cninit(); /* the preferred console may have changed */
421 kprintf("avail memory = %lu (%luK bytes)\n",
422 ptoa(vmstats.v_free_count),
423 ptoa(vmstats.v_free_count) / 1024);
426 * Set up buffers, so they can be used to read disk labels.
429 vm_pager_bufferinit();
433 * OK, enough kmem_alloc/malloc state should be up, lets get on with it!
435 mp_start(); /* fire up the APs and APICs */
442 * Send an interrupt to process.
444 * Stack is set up to allow sigcode stored
445 * at top to call routine, followed by kcall
446 * to sigreturn routine below. After sigreturn
447 * resets the signal mask, the stack, and the
448 * frame pointer, it returns to the user
452 sendsig(sig_t catcher, int sig, sigset_t *mask, u_long code)
454 kprintf0("sendsig\n");
455 struct lwp *lp = curthread->td_lwp;
456 struct proc *p = lp->lwp_proc;
457 struct trapframe *regs;
458 struct sigacts *psp = p->p_sigacts;
459 struct sigframe sf, *sfp;
462 regs = lp->lwp_md.md_regs;
463 oonstack = (lp->lwp_sigstk.ss_flags & SS_ONSTACK) ? 1 : 0;
465 /* save user context */
466 bzero(&sf, sizeof(struct sigframe));
467 sf.sf_uc.uc_sigmask = *mask;
468 sf.sf_uc.uc_stack = lp->lwp_sigstk;
469 sf.sf_uc.uc_mcontext.mc_onstack = oonstack;
470 KKASSERT(__offsetof(struct trapframe, tf_rdi) == 0);
471 bcopy(regs, &sf.sf_uc.uc_mcontext.mc_rdi, sizeof(struct trapframe));
473 /* make the size of the saved context visible to userland */
474 sf.sf_uc.uc_mcontext.mc_len = sizeof(sf.sf_uc.uc_mcontext);
476 /* save mailbox pending state for syscall interlock semantics */
477 if (p->p_flag & P_MAILBOX)
478 sf.sf_uc.uc_mcontext.mc_xflags |= PGEX_MAILBOX;
480 /* Allocate and validate space for the signal handler context. */
481 if ((lp->lwp_flag & LWP_ALTSTACK) != 0 && !oonstack &&
482 SIGISMEMBER(psp->ps_sigonstack, sig)) {
483 sfp = (struct sigframe *)(lp->lwp_sigstk.ss_sp +
484 lp->lwp_sigstk.ss_size - sizeof(struct sigframe));
485 lp->lwp_sigstk.ss_flags |= SS_ONSTACK;
487 sfp = (struct sigframe *)regs->tf_rsp - 1;
490 /* Translate the signal is appropriate */
491 if (p->p_sysent->sv_sigtbl) {
492 if (sig <= p->p_sysent->sv_sigsize)
493 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)];
496 /* Build the argument list for the signal handler. */
498 sf.sf_ucontext = (register_t)&sfp->sf_uc;
499 if (SIGISMEMBER(psp->ps_siginfo, sig)) {
500 /* Signal handler installed with SA_SIGINFO. */
501 sf.sf_siginfo = (register_t)&sfp->sf_si;
502 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher;
504 /* fill siginfo structure */
505 sf.sf_si.si_signo = sig;
506 sf.sf_si.si_code = code;
507 sf.sf_si.si_addr = (void*)regs->tf_err;
510 /* Old FreeBSD-style arguments. */
511 sf.sf_siginfo = code;
512 sf.sf_addr = regs->tf_err;
513 sf.sf_ahu.sf_handler = catcher;
517 * If we're a vm86 process, we want to save the segment registers.
518 * We also change eflags to be our emulated eflags, not the actual
522 if (regs->tf_eflags & PSL_VM) {
523 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
524 struct vm86_kernel *vm86 = &lp->lwp_thread->td_pcb->pcb_ext->ext_vm86;
526 sf.sf_uc.uc_mcontext.mc_gs = tf->tf_vm86_gs;
527 sf.sf_uc.uc_mcontext.mc_fs = tf->tf_vm86_fs;
528 sf.sf_uc.uc_mcontext.mc_es = tf->tf_vm86_es;
529 sf.sf_uc.uc_mcontext.mc_ds = tf->tf_vm86_ds;
531 if (vm86->vm86_has_vme == 0)
532 sf.sf_uc.uc_mcontext.mc_eflags =
533 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) |
534 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP));
537 * Clear PSL_NT to inhibit T_TSSFLT faults on return from
538 * syscalls made by the signal handler. This just avoids
539 * wasting time for our lazy fixup of such faults. PSL_NT
540 * does nothing in vm86 mode, but vm86 programs can set it
541 * almost legitimately in probes for old cpu types.
543 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP);
548 * Save the FPU state and reinit the FP unit
550 npxpush(&sf.sf_uc.uc_mcontext);
553 * Copy the sigframe out to the user's stack.
555 if (copyout(&sf, sfp, sizeof(struct sigframe)) != 0) {
557 * Something is wrong with the stack pointer.
558 * ...Kill the process.
563 regs->tf_rsp = (register_t)sfp;
564 regs->tf_rip = PS_STRINGS - *(p->p_sysent->sv_szsigcode);
567 * i386 abi specifies that the direction flag must be cleared
570 regs->tf_rflags &= ~(PSL_T|PSL_D);
572 regs->tf_cs = _ucodesel;
576 * Set a degenerate SS. We don't have to worry about %fs or %gs?
578 regs->tf_ss = _udatasel;
582 * Sanitize the trapframe for a virtual kernel passing control to a custom
583 * VM context. Remove any items that would otherwise create a privilage
586 * XXX at the moment we allow userland to set the resume flag. Is this a
590 cpu_sanitize_frame(struct trapframe *frame)
592 kprintf0("cpu_sanitize_frame\n");
593 frame->tf_cs = _ucodesel;
594 frame->tf_ss = _udatasel;
595 /* XXX VM (8086) mode not supported? */
596 frame->tf_rflags &= (PSL_RF | PSL_USERCHANGE | PSL_VM_UNSUPP);
597 frame->tf_rflags |= PSL_RESERVED_DEFAULT | PSL_I;
603 * Sanitize the tls so loading the descriptor does not blow up
604 * on us. For AMD64 we don't have to do anything.
607 cpu_sanitize_tls(struct savetls *tls)
613 * sigreturn(ucontext_t *sigcntxp)
615 * System call to cleanup state after a signal
616 * has been taken. Reset signal mask and
617 * stack state from context left by sendsig (above).
618 * Return to previous pc and psl as specified by
619 * context left by sendsig. Check carefully to
620 * make sure that the user has not modified the
621 * state to gain improper privileges.
623 #define EFL_SECURE(ef, oef) ((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0)
624 #define CS_SECURE(cs) (ISPL(cs) == SEL_UPL)
627 sys_sigreturn(struct sigreturn_args *uap)
629 struct lwp *lp = curthread->td_lwp;
630 struct proc *p = lp->lwp_proc;
631 struct trapframe *regs;
639 * We have to copy the information into kernel space so userland
640 * can't modify it while we are sniffing it.
642 regs = lp->lwp_md.md_regs;
643 error = copyin(uap->sigcntxp, &uc, sizeof(uc));
647 rflags = ucp->uc_mcontext.mc_rflags;
649 /* VM (8086) mode not supported */
650 rflags &= ~PSL_VM_UNSUPP;
653 if (eflags & PSL_VM) {
654 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
655 struct vm86_kernel *vm86;
658 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't
659 * set up the vm86 area, and we can't enter vm86 mode.
661 if (lp->lwp_thread->td_pcb->pcb_ext == 0)
663 vm86 = &lp->lwp_thread->td_pcb->pcb_ext->ext_vm86;
664 if (vm86->vm86_inited == 0)
667 /* go back to user mode if both flags are set */
668 if ((eflags & PSL_VIP) && (eflags & PSL_VIF))
669 trapsignal(lp, SIGBUS, 0);
671 if (vm86->vm86_has_vme) {
672 eflags = (tf->tf_eflags & ~VME_USERCHANGE) |
673 (eflags & VME_USERCHANGE) | PSL_VM;
675 vm86->vm86_eflags = eflags; /* save VIF, VIP */
676 eflags = (tf->tf_eflags & ~VM_USERCHANGE) |
677 (eflags & VM_USERCHANGE) | PSL_VM;
679 bcopy(&ucp->uc_mcontext.mc_gs, tf, sizeof(struct trapframe));
680 tf->tf_eflags = eflags;
681 tf->tf_vm86_ds = tf->tf_ds;
682 tf->tf_vm86_es = tf->tf_es;
683 tf->tf_vm86_fs = tf->tf_fs;
684 tf->tf_vm86_gs = tf->tf_gs;
685 tf->tf_ds = _udatasel;
686 tf->tf_es = _udatasel;
687 tf->tf_fs = _udatasel;
688 tf->tf_gs = _udatasel;
693 * Don't allow users to change privileged or reserved flags.
696 * XXX do allow users to change the privileged flag PSL_RF.
697 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers
698 * should sometimes set it there too. tf_eflags is kept in
699 * the signal context during signal handling and there is no
700 * other place to remember it, so the PSL_RF bit may be
701 * corrupted by the signal handler without us knowing.
702 * Corruption of the PSL_RF bit at worst causes one more or
703 * one less debugger trap, so allowing it is fairly harmless.
705 if (!EFL_SECURE(rflags & ~PSL_RF, regs->tf_rflags & ~PSL_RF)) {
706 kprintf("sigreturn: rflags = 0x%lx\n", (long)rflags);
711 * Don't allow users to load a valid privileged %cs. Let the
712 * hardware check for invalid selectors, excess privilege in
713 * other selectors, invalid %eip's and invalid %esp's.
715 cs = ucp->uc_mcontext.mc_cs;
716 if (!CS_SECURE(cs)) {
717 kprintf("sigreturn: cs = 0x%x\n", cs);
718 trapsignal(lp, SIGBUS, T_PROTFLT);
721 bcopy(&ucp->uc_mcontext.mc_rdi, regs, sizeof(struct trapframe));
725 * Restore the FPU state from the frame
727 npxpop(&ucp->uc_mcontext);
730 * Merge saved signal mailbox pending flag to maintain interlock
731 * semantics against system calls.
733 if (ucp->uc_mcontext.mc_xflags & PGEX_MAILBOX)
734 p->p_flag |= P_MAILBOX;
736 if (ucp->uc_mcontext.mc_onstack & 1)
737 lp->lwp_sigstk.ss_flags |= SS_ONSTACK;
739 lp->lwp_sigstk.ss_flags &= ~SS_ONSTACK;
741 lp->lwp_sigmask = ucp->uc_sigmask;
742 SIG_CANTMASK(lp->lwp_sigmask);
747 * Stack frame on entry to function. %rax will contain the function vector,
748 * %rcx will contain the function data. flags, rcx, and rax will have
749 * already been pushed on the stack.
760 sendupcall(struct vmupcall *vu, int morepending)
762 struct lwp *lp = curthread->td_lwp;
763 struct trapframe *regs;
764 struct upcall upcall;
765 struct upc_frame upc_frame;
769 * If we are a virtual kernel running an emulated user process
770 * context, switch back to the virtual kernel context before
771 * trying to post the signal.
773 if (lp->lwp_vkernel && lp->lwp_vkernel->ve) {
774 lp->lwp_md.md_regs->tf_trapno = 0;
775 vkernel_trap(lp, lp->lwp_md.md_regs);
779 * Get the upcall data structure
781 if (copyin(lp->lwp_upcall, &upcall, sizeof(upcall)) ||
782 copyin((char *)upcall.upc_uthread + upcall.upc_critoff, &crit_count, sizeof(int))
785 kprintf("bad upcall address\n");
790 * If the data structure is already marked pending or has a critical
791 * section count, mark the data structure as pending and return
792 * without doing an upcall. vu_pending is left set.
794 if (upcall.upc_pending || crit_count >= vu->vu_pending) {
795 if (upcall.upc_pending < vu->vu_pending) {
796 upcall.upc_pending = vu->vu_pending;
797 copyout(&upcall.upc_pending, &lp->lwp_upcall->upc_pending,
798 sizeof(upcall.upc_pending));
804 * We can run this upcall now, clear vu_pending.
806 * Bump our critical section count and set or clear the
807 * user pending flag depending on whether more upcalls are
808 * pending. The user will be responsible for calling
809 * upc_dispatch(-1) to process remaining upcalls.
812 upcall.upc_pending = morepending;
813 crit_count += TDPRI_CRIT;
814 copyout(&upcall.upc_pending, &lp->lwp_upcall->upc_pending,
815 sizeof(upcall.upc_pending));
816 copyout(&crit_count, (char *)upcall.upc_uthread + upcall.upc_critoff,
820 * Construct a stack frame and issue the upcall
822 regs = lp->lwp_md.md_regs;
823 upc_frame.rax = regs->tf_rax;
824 upc_frame.rcx = regs->tf_rcx;
825 upc_frame.rdx = regs->tf_rdx;
826 upc_frame.flags = regs->tf_rflags;
827 upc_frame.oldip = regs->tf_rip;
828 if (copyout(&upc_frame, (void *)(regs->tf_rsp - sizeof(upc_frame)),
829 sizeof(upc_frame)) != 0) {
830 kprintf("bad stack on upcall\n");
832 regs->tf_rax = (register_t)vu->vu_func;
833 regs->tf_rcx = (register_t)vu->vu_data;
834 regs->tf_rdx = (register_t)lp->lwp_upcall;
835 regs->tf_rip = (register_t)vu->vu_ctx;
836 regs->tf_rsp -= sizeof(upc_frame);
841 * fetchupcall occurs in the context of a system call, which means that
842 * we have to return EJUSTRETURN in order to prevent eax and edx from
843 * being overwritten by the syscall return value.
845 * if vu is not NULL we return the new context in %edx, the new data in %ecx,
846 * and the function pointer in %eax.
849 fetchupcall(struct vmupcall *vu, int morepending, void *rsp)
851 struct upc_frame upc_frame;
852 struct lwp *lp = curthread->td_lwp;
853 struct trapframe *regs;
855 struct upcall upcall;
858 regs = lp->lwp_md.md_regs;
860 error = copyout(&morepending, &lp->lwp_upcall->upc_pending, sizeof(int));
864 * This jumps us to the next ready context.
867 error = copyin(lp->lwp_upcall, &upcall, sizeof(upcall));
870 error = copyin((char *)upcall.upc_uthread + upcall.upc_critoff, &crit_count, sizeof(int));
871 crit_count += TDPRI_CRIT;
873 error = copyout(&crit_count, (char *)upcall.upc_uthread + upcall.upc_critoff, sizeof(int));
874 regs->tf_rax = (register_t)vu->vu_func;
875 regs->tf_rcx = (register_t)vu->vu_data;
876 regs->tf_rdx = (register_t)lp->lwp_upcall;
877 regs->tf_rip = (register_t)vu->vu_ctx;
878 regs->tf_rsp = (register_t)rsp;
881 * This returns us to the originally interrupted code.
883 error = copyin(rsp, &upc_frame, sizeof(upc_frame));
884 regs->tf_rax = upc_frame.rax;
885 regs->tf_rcx = upc_frame.rcx;
886 regs->tf_rdx = upc_frame.rdx;
887 regs->tf_rflags = (regs->tf_rflags & ~PSL_USERCHANGE) |
888 (upc_frame.flags & PSL_USERCHANGE);
889 regs->tf_rip = upc_frame.oldip;
890 regs->tf_rsp = (register_t)((char *)rsp + sizeof(upc_frame));
899 * Machine dependent boot() routine
901 * I haven't seen anything to put here yet
902 * Possibly some stuff might be grafted back here from boot()
910 * Shutdown the CPU as much as possible
916 __asm__ __volatile("hlt");
920 * cpu_idle() represents the idle LWKT. You cannot return from this function
921 * (unless you want to blow things up!). Instead we look for runnable threads
922 * and loop or halt as appropriate. Giant is not held on entry to the thread.
924 * The main loop is entered with a critical section held, we must release
925 * the critical section before doing anything else. lwkt_switch() will
926 * check for pending interrupts due to entering and exiting its own
929 * Note on cpu_idle_hlt: On an SMP system we rely on a scheduler IPI
930 * to wake a HLTed cpu up. However, there are cases where the idlethread
931 * will be entered with the possibility that no IPI will occur and in such
932 * cases lwkt_switch() sets TDF_IDLE_NOHLT.
934 static int cpu_idle_hlt = 1;
935 static int cpu_idle_hltcnt;
936 static int cpu_idle_spincnt;
937 SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_hlt, CTLFLAG_RW,
938 &cpu_idle_hlt, 0, "Idle loop HLT enable");
939 SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_hltcnt, CTLFLAG_RW,
940 &cpu_idle_hltcnt, 0, "Idle loop entry halts");
941 SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_spincnt, CTLFLAG_RW,
942 &cpu_idle_spincnt, 0, "Idle loop entry spins");
945 cpu_idle_default_hook(void)
948 * We must guarentee that hlt is exactly the instruction
951 __asm __volatile("sti; hlt");
954 /* Other subsystems (e.g., ACPI) can hook this later. */
955 void (*cpu_idle_hook)(void) = cpu_idle_default_hook;
960 struct thread *td = curthread;
963 KKASSERT(td->td_pri < TDPRI_CRIT);
966 * See if there are any LWKTs ready to go.
971 * If we are going to halt call splz unconditionally after
972 * CLIing to catch any interrupt races. Note that we are
973 * at SPL0 and interrupts are enabled.
975 if (cpu_idle_hlt && !lwkt_runnable() &&
976 (td->td_flags & TDF_IDLE_NOHLT) == 0) {
977 __asm __volatile("cli");
979 if (!lwkt_runnable())
983 __asm __volatile("pause");
987 td->td_flags &= ~TDF_IDLE_NOHLT;
990 __asm __volatile("sti; pause");
992 __asm __volatile("sti");
1000 * This routine is called when the only runnable threads require
1001 * the MP lock, and the scheduler couldn't get it. On a real cpu
1002 * we let the scheduler spin.
1005 cpu_mplock_contested(void)
1011 * This routine is called if a spinlock has been held through the
1012 * exponential backoff period and is seriously contested. On a real cpu
1016 cpu_spinlock_contested(void)
1022 * Clear registers on exec
1025 exec_setregs(u_long entry, u_long stack, u_long ps_strings)
1027 struct thread *td = curthread;
1028 struct lwp *lp = td->td_lwp;
1029 struct pcb *pcb = td->td_pcb;
1030 struct trapframe *regs = lp->lwp_md.md_regs;
1032 kprintf0("exec_setregs\n");
1034 /* was i386_user_cleanup() in NetBSD */
1037 bzero((char *)regs, sizeof(struct trapframe));
1038 regs->tf_rip = entry;
1039 regs->tf_rsp = ((stack - 8) & ~0xFul) + 8; /* align the stack */
1040 regs->tf_rdi = stack; /* argv */
1041 regs->tf_rflags = PSL_USER | (regs->tf_rflags & PSL_T);
1042 regs->tf_ss = _udatasel;
1043 regs->tf_cs = _ucodesel;
1044 regs->tf_rbx = ps_strings;
1047 * Reset the hardware debug registers if they were in use.
1048 * They won't have any meaning for the newly exec'd process.
1050 if (pcb->pcb_flags & PCB_DBREGS) {
1056 pcb->pcb_dr7 = 0; /* JG set bit 10? */
1057 if (pcb == td->td_pcb) {
1059 * Clear the debug registers on the running
1060 * CPU, otherwise they will end up affecting
1061 * the next process we switch to.
1065 pcb->pcb_flags &= ~PCB_DBREGS;
1069 * Initialize the math emulator (if any) for the current process.
1070 * Actually, just clear the bit that says that the emulator has
1071 * been initialized. Initialization is delayed until the process
1072 * traps to the emulator (if it is done at all) mainly because
1073 * emulators don't provide an entry point for initialization.
1075 pcb->pcb_flags &= ~FP_SOFTFP;
1078 * NOTE: do not set CR0_TS here. npxinit() must do it after clearing
1079 * gd_npxthread. Otherwise a preemptive interrupt thread
1080 * may panic in npxdna().
1083 load_cr0(rcr0() | CR0_MP);
1086 * NOTE: The MSR values must be correct so we can return to
1087 * userland. gd_user_fs/gs must be correct so the switch
1088 * code knows what the current MSR values are.
1090 pcb->pcb_fsbase = 0; /* Values loaded from PCB on switch */
1091 pcb->pcb_gsbase = 0;
1092 mdcpu->gd_user_fs = 0; /* Cache of current MSR values */
1093 mdcpu->gd_user_gs = 0;
1094 wrmsr(MSR_FSBASE, 0); /* Set MSR values for return to userland */
1095 wrmsr(MSR_KGSBASE, 0);
1098 /* Initialize the npx (if any) for the current process. */
1099 npxinit(__INITIAL_NPXCW__);
1103 pcb->pcb_ds = _udatasel;
1104 pcb->pcb_es = _udatasel;
1105 pcb->pcb_fs = _udatasel;
1106 pcb->pcb_gs = _udatasel;
1115 cr0 |= CR0_NE; /* Done by npxinit() */
1116 cr0 |= CR0_MP | CR0_TS; /* Done at every execve() too. */
1117 cr0 |= CR0_WP | CR0_AM;
1123 sysctl_machdep_adjkerntz(SYSCTL_HANDLER_ARGS)
1126 error = sysctl_handle_int(oidp, oidp->oid_arg1, oidp->oid_arg2,
1128 if (!error && req->newptr)
1133 SYSCTL_PROC(_machdep, CPU_ADJKERNTZ, adjkerntz, CTLTYPE_INT|CTLFLAG_RW,
1134 &adjkerntz, 0, sysctl_machdep_adjkerntz, "I", "");
1137 SYSCTL_INT(_machdep, CPU_DISRTCSET, disable_rtc_set,
1138 CTLFLAG_RW, &disable_rtc_set, 0, "");
1142 SYSCTL_STRUCT(_machdep, CPU_BOOTINFO, bootinfo,
1143 CTLFLAG_RD, &bootinfo, bootinfo, "");
1146 SYSCTL_INT(_machdep, CPU_WALLCLOCK, wall_cmos_clock,
1147 CTLFLAG_RW, &wall_cmos_clock, 0, "");
1149 extern u_long bootdev; /* not a cdev_t - encoding is different */
1150 SYSCTL_ULONG(_machdep, OID_AUTO, guessed_bootdev,
1151 CTLFLAG_RD, &bootdev, 0, "Boot device (not in cdev_t format)");
1154 * Initialize 386 and configure to run kernel
1158 * Initialize segments & interrupt table
1162 struct user_segment_descriptor gdt[NGDT * MAXCPU]; /* global descriptor table */
1163 static struct gate_descriptor idt0[NIDT];
1164 struct gate_descriptor *idt = &idt0[0]; /* interrupt descriptor table */
1166 union descriptor ldt[NLDT]; /* local descriptor table */
1169 /* table descriptors - used to load tables by cpu */
1170 struct region_descriptor r_gdt, r_idt;
1172 #if defined(I586_CPU) && !defined(NO_F00F_HACK)
1173 extern int has_f00f_bug;
1176 static char dblfault_stack[PAGE_SIZE] __aligned(16);
1178 /* JG proc0paddr is a virtual address */
1181 char proc0paddr_buff[LWKT_THREAD_STACK];
1184 /* software prototypes -- in more palatable form */
1185 struct soft_segment_descriptor gdt_segs[] = {
1186 /* GNULL_SEL 0 Null Descriptor */
1187 { 0x0, /* segment base address */
1189 0, /* segment type */
1190 0, /* segment descriptor priority level */
1191 0, /* segment descriptor present */
1193 0, /* default 32 vs 16 bit size */
1194 0 /* limit granularity (byte/page units)*/ },
1195 /* GCODE_SEL 1 Code Descriptor for kernel */
1196 { 0x0, /* segment base address */
1197 0xfffff, /* length - all address space */
1198 SDT_MEMERA, /* segment type */
1199 SEL_KPL, /* segment descriptor priority level */
1200 1, /* segment descriptor present */
1202 0, /* default 32 vs 16 bit size */
1203 1 /* limit granularity (byte/page units)*/ },
1204 /* GDATA_SEL 2 Data Descriptor for kernel */
1205 { 0x0, /* segment base address */
1206 0xfffff, /* length - all address space */
1207 SDT_MEMRWA, /* segment type */
1208 SEL_KPL, /* segment descriptor priority level */
1209 1, /* segment descriptor present */
1211 0, /* default 32 vs 16 bit size */
1212 1 /* limit granularity (byte/page units)*/ },
1213 /* GUCODE32_SEL 3 32 bit Code Descriptor for user */
1214 { 0x0, /* segment base address */
1215 0xfffff, /* length - all address space */
1216 SDT_MEMERA, /* segment type */
1217 SEL_UPL, /* segment descriptor priority level */
1218 1, /* segment descriptor present */
1220 1, /* default 32 vs 16 bit size */
1221 1 /* limit granularity (byte/page units)*/ },
1222 /* GUDATA_SEL 4 32/64 bit Data Descriptor for user */
1223 { 0x0, /* segment base address */
1224 0xfffff, /* length - all address space */
1225 SDT_MEMRWA, /* segment type */
1226 SEL_UPL, /* segment descriptor priority level */
1227 1, /* segment descriptor present */
1229 1, /* default 32 vs 16 bit size */
1230 1 /* limit granularity (byte/page units)*/ },
1231 /* GUCODE_SEL 5 64 bit Code Descriptor for user */
1232 { 0x0, /* segment base address */
1233 0xfffff, /* length - all address space */
1234 SDT_MEMERA, /* segment type */
1235 SEL_UPL, /* segment descriptor priority level */
1236 1, /* segment descriptor present */
1238 0, /* default 32 vs 16 bit size */
1239 1 /* limit granularity (byte/page units)*/ },
1240 /* GPROC0_SEL 6 Proc 0 Tss Descriptor */
1242 0x0, /* segment base address */
1243 sizeof(struct amd64tss)-1,/* length - all address space */
1244 SDT_SYSTSS, /* segment type */
1245 SEL_KPL, /* segment descriptor priority level */
1246 1, /* segment descriptor present */
1248 0, /* unused - default 32 vs 16 bit size */
1249 0 /* limit granularity (byte/page units)*/ },
1250 /* Actually, the TSS is a system descriptor which is double size */
1251 { 0x0, /* segment base address */
1253 0, /* segment type */
1254 0, /* segment descriptor priority level */
1255 0, /* segment descriptor present */
1257 0, /* default 32 vs 16 bit size */
1258 0 /* limit granularity (byte/page units)*/ },
1259 /* GUGS32_SEL 8 32 bit GS Descriptor for user */
1260 { 0x0, /* segment base address */
1261 0xfffff, /* length - all address space */
1262 SDT_MEMRWA, /* segment type */
1263 SEL_UPL, /* segment descriptor priority level */
1264 1, /* segment descriptor present */
1266 1, /* default 32 vs 16 bit size */
1267 1 /* limit granularity (byte/page units)*/ },
1271 setidt(int idx, inthand_t *func, int typ, int dpl, int ist)
1273 struct gate_descriptor *ip;
1276 ip->gd_looffset = (uintptr_t)func;
1277 ip->gd_selector = GSEL(GCODE_SEL, SEL_KPL);
1283 ip->gd_hioffset = ((uintptr_t)func)>>16 ;
1286 #define IDTVEC(name) __CONCAT(X,name)
1289 IDTVEC(div), IDTVEC(dbg), IDTVEC(nmi), IDTVEC(bpt), IDTVEC(ofl),
1290 IDTVEC(bnd), IDTVEC(ill), IDTVEC(dna), IDTVEC(fpusegm),
1291 IDTVEC(tss), IDTVEC(missing), IDTVEC(stk), IDTVEC(prot),
1292 IDTVEC(page), IDTVEC(mchk), IDTVEC(rsvd), IDTVEC(fpu), IDTVEC(align),
1293 IDTVEC(xmm), IDTVEC(dblfault),
1294 IDTVEC(fast_syscall), IDTVEC(fast_syscall32);
1296 #ifdef DEBUG_INTERRUPTS
1297 extern inthand_t *Xrsvdary[256];
1301 sdtossd(struct user_segment_descriptor *sd, struct soft_segment_descriptor *ssd)
1303 ssd->ssd_base = (sd->sd_hibase << 24) | sd->sd_lobase;
1304 ssd->ssd_limit = (sd->sd_hilimit << 16) | sd->sd_lolimit;
1305 ssd->ssd_type = sd->sd_type;
1306 ssd->ssd_dpl = sd->sd_dpl;
1307 ssd->ssd_p = sd->sd_p;
1308 ssd->ssd_def32 = sd->sd_def32;
1309 ssd->ssd_gran = sd->sd_gran;
1313 ssdtosd(struct soft_segment_descriptor *ssd, struct user_segment_descriptor *sd)
1316 sd->sd_lobase = (ssd->ssd_base) & 0xffffff;
1317 sd->sd_hibase = (ssd->ssd_base >> 24) & 0xff;
1318 sd->sd_lolimit = (ssd->ssd_limit) & 0xffff;
1319 sd->sd_hilimit = (ssd->ssd_limit >> 16) & 0xf;
1320 sd->sd_type = ssd->ssd_type;
1321 sd->sd_dpl = ssd->ssd_dpl;
1322 sd->sd_p = ssd->ssd_p;
1323 sd->sd_long = ssd->ssd_long;
1324 sd->sd_def32 = ssd->ssd_def32;
1325 sd->sd_gran = ssd->ssd_gran;
1329 ssdtosyssd(struct soft_segment_descriptor *ssd,
1330 struct system_segment_descriptor *sd)
1333 sd->sd_lobase = (ssd->ssd_base) & 0xffffff;
1334 sd->sd_hibase = (ssd->ssd_base >> 24) & 0xfffffffffful;
1335 sd->sd_lolimit = (ssd->ssd_limit) & 0xffff;
1336 sd->sd_hilimit = (ssd->ssd_limit >> 16) & 0xf;
1337 sd->sd_type = ssd->ssd_type;
1338 sd->sd_dpl = ssd->ssd_dpl;
1339 sd->sd_p = ssd->ssd_p;
1340 sd->sd_gran = ssd->ssd_gran;
1346 * Populate the (physmap) array with base/bound pairs describing the
1347 * available physical memory in the system, then test this memory and
1348 * build the phys_avail array describing the actually-available memory.
1350 * If we cannot accurately determine the physical memory map, then use
1351 * value from the 0xE801 call, and failing that, the RTC.
1353 * Total memory size may be set by the kernel environment variable
1354 * hw.physmem or the compile-time define MAXMEM.
1356 * XXX first should be vm_paddr_t.
1359 getmemsize(caddr_t kmdp, u_int64_t first)
1361 int i, off, physmap_idx, pa_indx, da_indx;
1362 vm_paddr_t pa, physmap[PHYSMAP_SIZE];
1363 u_long physmem_tunable;
1365 struct bios_smap *smapbase, *smap, *smapend;
1367 quad_t dcons_addr, dcons_size;
1369 bzero(physmap, sizeof(physmap));
1374 * get memory map from INT 15:E820, kindly supplied by the loader.
1376 * subr_module.c says:
1377 * "Consumer may safely assume that size value precedes data."
1378 * ie: an int32_t immediately precedes smap.
1380 smapbase = (struct bios_smap *)preload_search_info(kmdp,
1381 MODINFO_METADATA | MODINFOMD_SMAP);
1382 if (smapbase == NULL)
1383 panic("No BIOS smap info from loader!");
1385 smapsize = *((u_int32_t *)smapbase - 1);
1386 smapend = (struct bios_smap *)((uintptr_t)smapbase + smapsize);
1388 for (smap = smapbase; smap < smapend; smap++) {
1389 if (boothowto & RB_VERBOSE)
1390 kprintf("SMAP type=%02x base=%016lx len=%016lx\n",
1391 smap->type, smap->base, smap->length);
1393 if (smap->type != SMAP_TYPE_MEMORY)
1396 if (smap->length == 0)
1399 for (i = 0; i <= physmap_idx; i += 2) {
1400 if (smap->base < physmap[i + 1]) {
1401 if (boothowto & RB_VERBOSE)
1403 "Overlapping or non-monotonic memory region, ignoring second region\n");
1408 if (smap->base == physmap[physmap_idx + 1]) {
1409 physmap[physmap_idx + 1] += smap->length;
1414 if (physmap_idx == PHYSMAP_SIZE) {
1416 "Too many segments in the physical address map, giving up\n");
1419 physmap[physmap_idx] = smap->base;
1420 physmap[physmap_idx + 1] = smap->base + smap->length;
1424 * Find the 'base memory' segment for SMP
1427 for (i = 0; i <= physmap_idx; i += 2) {
1428 if (physmap[i] == 0x00000000) {
1429 basemem = physmap[i + 1] / 1024;
1434 panic("BIOS smap did not include a basemem segment!");
1437 /* make hole for AP bootstrap code */
1438 physmap[1] = mp_bootaddress(physmap[1] / 1024);
1442 * Maxmem isn't the "maximum memory", it's one larger than the
1443 * highest page of the physical address space. It should be
1444 * called something like "Maxphyspage". We may adjust this
1445 * based on ``hw.physmem'' and the results of the memory test.
1447 Maxmem = atop(physmap[physmap_idx + 1]);
1450 Maxmem = MAXMEM / 4;
1453 if (TUNABLE_ULONG_FETCH("hw.physmem", &physmem_tunable))
1454 Maxmem = atop(physmem_tunable);
1457 * Don't allow MAXMEM or hw.physmem to extend the amount of memory
1460 if (Maxmem > atop(physmap[physmap_idx + 1]))
1461 Maxmem = atop(physmap[physmap_idx + 1]);
1463 if (atop(physmap[physmap_idx + 1]) != Maxmem &&
1464 (boothowto & RB_VERBOSE))
1465 kprintf("Physical memory use set to %ldK\n", Maxmem * 4);
1467 /* call pmap initialization to make new kernel address space */
1468 pmap_bootstrap(&first, 0);
1471 * Size up each available chunk of physical memory.
1473 physmap[0] = PAGE_SIZE; /* mask off page 0 */
1476 phys_avail[pa_indx++] = physmap[0];
1477 phys_avail[pa_indx] = physmap[0];
1478 dump_avail[da_indx] = physmap[0];
1482 * Get dcons buffer address
1484 if (kgetenv_quad("dcons.addr", &dcons_addr) == 0 ||
1485 kgetenv_quad("dcons.size", &dcons_size) == 0)
1489 * physmap is in bytes, so when converting to page boundaries,
1490 * round up the start address and round down the end address.
1492 for (i = 0; i <= physmap_idx; i += 2) {
1495 end = ptoa((vm_paddr_t)Maxmem);
1496 if (physmap[i + 1] < end)
1497 end = trunc_page(physmap[i + 1]);
1498 for (pa = round_page(physmap[i]); pa < end; pa += PAGE_SIZE) {
1499 int tmp, page_bad, full;
1500 int *ptr = (int *)CADDR1;
1504 * block out kernel memory as not available.
1506 if (pa >= 0x100000 && pa < first)
1510 * block out dcons buffer
1513 && pa >= trunc_page(dcons_addr)
1514 && pa < dcons_addr + dcons_size)
1520 * map page into kernel: valid, read/write,non-cacheable
1522 *pte = pa | PG_V | PG_RW | PG_N;
1527 * Test for alternating 1's and 0's
1529 *(volatile int *)ptr = 0xaaaaaaaa;
1530 if (*(volatile int *)ptr != 0xaaaaaaaa)
1533 * Test for alternating 0's and 1's
1535 *(volatile int *)ptr = 0x55555555;
1536 if (*(volatile int *)ptr != 0x55555555)
1541 *(volatile int *)ptr = 0xffffffff;
1542 if (*(volatile int *)ptr != 0xffffffff)
1547 *(volatile int *)ptr = 0x0;
1548 if (*(volatile int *)ptr != 0x0)
1551 * Restore original value.
1556 * Adjust array of valid/good pages.
1558 if (page_bad == TRUE)
1561 * If this good page is a continuation of the
1562 * previous set of good pages, then just increase
1563 * the end pointer. Otherwise start a new chunk.
1564 * Note that "end" points one higher than end,
1565 * making the range >= start and < end.
1566 * If we're also doing a speculative memory
1567 * test and we at or past the end, bump up Maxmem
1568 * so that we keep going. The first bad page
1569 * will terminate the loop.
1571 if (phys_avail[pa_indx] == pa) {
1572 phys_avail[pa_indx] += PAGE_SIZE;
1575 if (pa_indx == PHYS_AVAIL_ARRAY_END) {
1577 "Too many holes in the physical address space, giving up\n");
1582 phys_avail[pa_indx++] = pa; /* start */
1583 phys_avail[pa_indx] = pa + PAGE_SIZE; /* end */
1587 if (dump_avail[da_indx] == pa) {
1588 dump_avail[da_indx] += PAGE_SIZE;
1591 if (da_indx == DUMP_AVAIL_ARRAY_END) {
1595 dump_avail[da_indx++] = pa; /* start */
1596 dump_avail[da_indx] = pa + PAGE_SIZE; /* end */
1608 * The last chunk must contain at least one page plus the message
1609 * buffer to avoid complicating other code (message buffer address
1610 * calculation, etc.).
1612 while (phys_avail[pa_indx - 1] + PAGE_SIZE +
1613 round_page(MSGBUF_SIZE) >= phys_avail[pa_indx]) {
1614 physmem -= atop(phys_avail[pa_indx] - phys_avail[pa_indx - 1]);
1615 phys_avail[pa_indx--] = 0;
1616 phys_avail[pa_indx--] = 0;
1619 Maxmem = atop(phys_avail[pa_indx]);
1621 /* Trim off space for the message buffer. */
1622 phys_avail[pa_indx] -= round_page(MSGBUF_SIZE);
1624 /* Map the message buffer. */
1625 for (off = 0; off < round_page(MSGBUF_SIZE); off += PAGE_SIZE)
1626 pmap_kenter((vm_offset_t)msgbufp + off, phys_avail[pa_indx] +
1639 * 7 Device Not Available (x87)
1641 * 9 Coprocessor Segment overrun (unsupported, reserved)
1643 * 11 Segment not present
1645 * 13 General Protection
1648 * 16 x87 FP Exception pending
1649 * 17 Alignment Check
1651 * 19 SIMD floating point
1653 * 32-255 INTn/external sources
1656 hammer_time(u_int64_t modulep, u_int64_t physfree)
1661 int metadata_missing, off;
1663 struct mdglobaldata *gd;
1668 * This must be done before the first references
1669 * to CPU_prvspace[0] are made.
1671 init_paging(&physfree);
1674 * Prevent lowering of the ipl if we call tsleep() early.
1676 gd = &CPU_prvspace[0].mdglobaldata;
1677 bzero(gd, sizeof(*gd));
1680 * Note: on both UP and SMP curthread must be set non-NULL
1681 * early in the boot sequence because the system assumes
1682 * that 'curthread' is never NULL.
1685 gd->mi.gd_curthread = &thread0;
1686 thread0.td_gd = &gd->mi;
1688 atdevbase = ISA_HOLE_START + PTOV_OFFSET;
1691 metadata_missing = 0;
1692 if (bootinfo.bi_modulep) {
1693 preload_metadata = (caddr_t)bootinfo.bi_modulep + KERNBASE;
1694 preload_bootstrap_relocate(KERNBASE);
1696 metadata_missing = 1;
1698 if (bootinfo.bi_envp)
1699 kern_envp = (caddr_t)bootinfo.bi_envp + KERNBASE;
1702 preload_metadata = (caddr_t)(uintptr_t)(modulep + PTOV_OFFSET);
1703 preload_bootstrap_relocate(PTOV_OFFSET);
1704 kmdp = preload_search_by_type("elf kernel");
1706 kmdp = preload_search_by_type("elf64 kernel");
1707 boothowto = MD_FETCH(kmdp, MODINFOMD_HOWTO, int);
1708 kern_envp = MD_FETCH(kmdp, MODINFOMD_ENVP, char *) + PTOV_OFFSET;
1710 ksym_start = MD_FETCH(kmdp, MODINFOMD_SSYM, uintptr_t);
1711 ksym_end = MD_FETCH(kmdp, MODINFOMD_ESYM, uintptr_t);
1715 * start with one cpu. Note: with one cpu, ncpus2_shift, ncpus2_mask,
1716 * and ncpus_fit_mask remain 0.
1721 /* Init basic tunables, hz etc */
1725 * make gdt memory segments
1727 gdt_segs[GPROC0_SEL].ssd_base =
1728 (uintptr_t) &CPU_prvspace[0].mdglobaldata.gd_common_tss;
1730 gd->mi.gd_prvspace = &CPU_prvspace[0];
1732 for (x = 0; x < NGDT; x++) {
1733 if (x != GPROC0_SEL && x != (GPROC0_SEL + 1))
1734 ssdtosd(&gdt_segs[x], &gdt[x]);
1736 ssdtosyssd(&gdt_segs[GPROC0_SEL],
1737 (struct system_segment_descriptor *)&gdt[GPROC0_SEL]);
1738 r_gdt.rd_limit = NGDT * sizeof(gdt[0]) - 1;
1739 r_gdt.rd_base = (long) gdt;
1742 wrmsr(MSR_FSBASE, 0); /* User value */
1743 wrmsr(MSR_GSBASE, (u_int64_t)&gd->mi);
1744 wrmsr(MSR_KGSBASE, 0); /* User value while in the kernel */
1746 mi_gdinit(&gd->mi, 0);
1748 proc0paddr = proc0paddr_buff;
1749 mi_proc0init(&gd->mi, proc0paddr);
1750 safepri = TDPRI_MAX;
1752 /* spinlocks and the BGL */
1756 for (x = 0; x < NIDT; x++)
1757 setidt(x, &IDTVEC(rsvd), SDT_SYSIGT, SEL_KPL, 0);
1758 setidt(IDT_DE, &IDTVEC(div), SDT_SYSIGT, SEL_KPL, 0);
1759 setidt(IDT_DB, &IDTVEC(dbg), SDT_SYSIGT, SEL_KPL, 0);
1760 setidt(IDT_NMI, &IDTVEC(nmi), SDT_SYSIGT, SEL_KPL, 1);
1761 setidt(IDT_BP, &IDTVEC(bpt), SDT_SYSIGT, SEL_UPL, 0);
1762 setidt(IDT_OF, &IDTVEC(ofl), SDT_SYSIGT, SEL_KPL, 0);
1763 setidt(IDT_BR, &IDTVEC(bnd), SDT_SYSIGT, SEL_KPL, 0);
1764 setidt(IDT_UD, &IDTVEC(ill), SDT_SYSIGT, SEL_KPL, 0);
1765 setidt(IDT_NM, &IDTVEC(dna), SDT_SYSIGT, SEL_KPL, 0);
1766 setidt(IDT_DF, &IDTVEC(dblfault), SDT_SYSIGT, SEL_KPL, 1);
1767 setidt(IDT_FPUGP, &IDTVEC(fpusegm), SDT_SYSIGT, SEL_KPL, 0);
1768 setidt(IDT_TS, &IDTVEC(tss), SDT_SYSIGT, SEL_KPL, 0);
1769 setidt(IDT_NP, &IDTVEC(missing), SDT_SYSIGT, SEL_KPL, 0);
1770 setidt(IDT_SS, &IDTVEC(stk), SDT_SYSIGT, SEL_KPL, 0);
1771 setidt(IDT_GP, &IDTVEC(prot), SDT_SYSIGT, SEL_KPL, 0);
1772 setidt(IDT_PF, &IDTVEC(page), SDT_SYSIGT, SEL_KPL, 0);
1773 setidt(IDT_MF, &IDTVEC(fpu), SDT_SYSIGT, SEL_KPL, 0);
1774 setidt(IDT_AC, &IDTVEC(align), SDT_SYSIGT, SEL_KPL, 0);
1775 setidt(IDT_MC, &IDTVEC(mchk), SDT_SYSIGT, SEL_KPL, 0);
1776 setidt(IDT_XF, &IDTVEC(xmm), SDT_SYSIGT, SEL_KPL, 0);
1778 r_idt.rd_limit = sizeof(idt0) - 1;
1779 r_idt.rd_base = (long) idt;
1783 * Initialize the console before we print anything out.
1788 if (metadata_missing)
1789 kprintf("WARNING: loader(8) metadata is missing!\n");
1799 if (boothowto & RB_KDB)
1800 Debugger("Boot flags requested debugger");
1804 finishidentcpu(); /* Final stage of CPU initialization */
1805 setidt(6, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1806 setidt(13, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1808 identify_cpu(); /* Final stage of CPU initialization */
1809 initializecpu(); /* Initialize CPU registers */
1811 /* make an initial tss so cpu can get interrupt stack on syscall! */
1812 gd->gd_common_tss.tss_rsp0 =
1813 (register_t)(thread0.td_kstack +
1814 KSTACK_PAGES * PAGE_SIZE - sizeof(struct pcb));
1815 /* Ensure the stack is aligned to 16 bytes */
1816 gd->gd_common_tss.tss_rsp0 &= ~0xFul;
1817 gd->gd_rsp0 = gd->gd_common_tss.tss_rsp0;
1819 /* doublefault stack space, runs on ist1 */
1820 gd->gd_common_tss.tss_ist1 = (long)&dblfault_stack[sizeof(dblfault_stack)];
1822 /* Set the IO permission bitmap (empty due to tss seg limit) */
1823 gd->gd_common_tss.tss_iobase = sizeof(struct amd64tss);
1825 gsel_tss = GSEL(GPROC0_SEL, SEL_KPL);
1826 gd->gd_tss_gdt = &gdt[GPROC0_SEL];
1827 gd->gd_common_tssd = *gd->gd_tss_gdt;
1830 /* Set up the fast syscall stuff */
1831 msr = rdmsr(MSR_EFER) | EFER_SCE;
1832 wrmsr(MSR_EFER, msr);
1833 wrmsr(MSR_LSTAR, (u_int64_t)IDTVEC(fast_syscall));
1834 wrmsr(MSR_CSTAR, (u_int64_t)IDTVEC(fast_syscall32));
1835 msr = ((u_int64_t)GSEL(GCODE_SEL, SEL_KPL) << 32) |
1836 ((u_int64_t)GSEL(GUCODE32_SEL, SEL_UPL) << 48);
1837 wrmsr(MSR_STAR, msr);
1838 wrmsr(MSR_SF_MASK, PSL_NT|PSL_T|PSL_I|PSL_C|PSL_D);
1840 getmemsize(kmdp, physfree);
1841 init_param2(physmem);
1843 /* now running on new page tables, configured,and u/iom is accessible */
1845 /* Map the message buffer. */
1847 for (off = 0; off < round_page(MSGBUF_SIZE); off += PAGE_SIZE)
1848 pmap_kenter((vm_offset_t)msgbufp + off, avail_end + off);
1851 msgbufinit(msgbufp, MSGBUF_SIZE);
1854 /* transfer to user mode */
1856 _ucodesel = GSEL(GUCODE_SEL, SEL_UPL);
1857 _udatasel = GSEL(GUDATA_SEL, SEL_UPL);
1858 _ucode32sel = GSEL(GUCODE32_SEL, SEL_UPL);
1864 /* setup proc 0's pcb */
1865 thread0.td_pcb->pcb_flags = 0;
1867 thread0.td_pcb->pcb_cr3 = KPML4phys;
1869 thread0.td_pcb->pcb_cr3 = IdlePTD;
1871 thread0.td_pcb->pcb_ext = 0;
1872 lwp0.lwp_md.md_regs = &proc0_tf;
1873 env = kgetenv("kernelname");
1875 strlcpy(kernelname, env, sizeof(kernelname));
1877 /* Location of kernel stack for locore */
1878 return ((u_int64_t)thread0.td_pcb);
1882 * Initialize machine-dependant portions of the global data structure.
1883 * Note that the global data area and cpu0's idlestack in the private
1884 * data space were allocated in locore.
1886 * Note: the idlethread's cpl is 0
1888 * WARNING! Called from early boot, 'mycpu' may not work yet.
1891 cpu_gdinit(struct mdglobaldata *gd, int cpu)
1894 gd->mi.gd_curthread = &gd->mi.gd_idlethread;
1896 lwkt_init_thread(&gd->mi.gd_idlethread,
1897 gd->mi.gd_prvspace->idlestack,
1898 sizeof(gd->mi.gd_prvspace->idlestack),
1899 TDF_MPSAFE, &gd->mi);
1900 lwkt_set_comm(&gd->mi.gd_idlethread, "idle_%d", cpu);
1901 gd->mi.gd_idlethread.td_switch = cpu_lwkt_switch;
1902 gd->mi.gd_idlethread.td_sp -= sizeof(void *);
1903 *(void **)gd->mi.gd_idlethread.td_sp = cpu_idle_restore;
1907 is_globaldata_space(vm_offset_t saddr, vm_offset_t eaddr)
1909 if (saddr >= (vm_offset_t)&CPU_prvspace[0] &&
1910 eaddr <= (vm_offset_t)&CPU_prvspace[MAXCPU]) {
1917 globaldata_find(int cpu)
1919 KKASSERT(cpu >= 0 && cpu < ncpus);
1920 return(&CPU_prvspace[cpu].mdglobaldata.mi);
1923 #if defined(I586_CPU) && !defined(NO_F00F_HACK)
1924 static void f00f_hack(void *unused);
1925 SYSINIT(f00f_hack, SI_BOOT2_BIOS, SI_ORDER_ANY, f00f_hack, NULL);
1928 f00f_hack(void *unused)
1930 struct gate_descriptor *new_idt;
1936 kprintf("Intel Pentium detected, installing workaround for F00F bug\n");
1938 r_idt.rd_limit = sizeof(idt0) - 1;
1940 tmp = kmem_alloc(&kernel_map, PAGE_SIZE * 2);
1942 panic("kmem_alloc returned 0");
1943 if (((unsigned int)tmp & (PAGE_SIZE-1)) != 0)
1944 panic("kmem_alloc returned non-page-aligned memory");
1945 /* Put the first seven entries in the lower page */
1946 new_idt = (struct gate_descriptor*)(tmp + PAGE_SIZE - (7*8));
1947 bcopy(idt, new_idt, sizeof(idt0));
1948 r_idt.rd_base = (int)new_idt;
1951 if (vm_map_protect(&kernel_map, tmp, tmp + PAGE_SIZE,
1952 VM_PROT_READ, FALSE) != KERN_SUCCESS)
1953 panic("vm_map_protect failed");
1956 #endif /* defined(I586_CPU) && !NO_F00F_HACK */
1959 ptrace_set_pc(struct lwp *lp, unsigned long addr)
1961 lp->lwp_md.md_regs->tf_rip = addr;
1966 ptrace_single_step(struct lwp *lp)
1968 lp->lwp_md.md_regs->tf_rflags |= PSL_T;
1973 fill_regs(struct lwp *lp, struct reg *regs)
1976 struct trapframe *tp;
1978 tp = lp->lwp_md.md_regs;
1979 bcopy(&tp->tf_rdi, ®s->r_rdi, sizeof(*regs));
1981 pcb = lp->lwp_thread->td_pcb;
1986 set_regs(struct lwp *lp, struct reg *regs)
1989 struct trapframe *tp;
1991 tp = lp->lwp_md.md_regs;
1992 if (!EFL_SECURE(regs->r_rflags, tp->tf_rflags) ||
1993 !CS_SECURE(regs->r_cs))
1995 bcopy(®s->r_rdi, &tp->tf_rdi, sizeof(*regs));
1996 pcb = lp->lwp_thread->td_pcb;
2000 #ifndef CPU_DISABLE_SSE
2002 fill_fpregs_xmm(struct savexmm *sv_xmm, struct save87 *sv_87)
2004 struct env87 *penv_87 = &sv_87->sv_env;
2005 struct envxmm *penv_xmm = &sv_xmm->sv_env;
2008 /* FPU control/status */
2009 penv_87->en_cw = penv_xmm->en_cw;
2010 penv_87->en_sw = penv_xmm->en_sw;
2011 penv_87->en_tw = penv_xmm->en_tw;
2012 penv_87->en_fip = penv_xmm->en_fip;
2013 penv_87->en_fcs = penv_xmm->en_fcs;
2014 penv_87->en_opcode = penv_xmm->en_opcode;
2015 penv_87->en_foo = penv_xmm->en_foo;
2016 penv_87->en_fos = penv_xmm->en_fos;
2019 for (i = 0; i < 8; ++i)
2020 sv_87->sv_ac[i] = sv_xmm->sv_fp[i].fp_acc;
2022 sv_87->sv_ex_sw = sv_xmm->sv_ex_sw;
2026 set_fpregs_xmm(struct save87 *sv_87, struct savexmm *sv_xmm)
2028 struct env87 *penv_87 = &sv_87->sv_env;
2029 struct envxmm *penv_xmm = &sv_xmm->sv_env;
2032 /* FPU control/status */
2033 penv_xmm->en_cw = penv_87->en_cw;
2034 penv_xmm->en_sw = penv_87->en_sw;
2035 penv_xmm->en_tw = penv_87->en_tw;
2036 penv_xmm->en_fip = penv_87->en_fip;
2037 penv_xmm->en_fcs = penv_87->en_fcs;
2038 penv_xmm->en_opcode = penv_87->en_opcode;
2039 penv_xmm->en_foo = penv_87->en_foo;
2040 penv_xmm->en_fos = penv_87->en_fos;
2043 for (i = 0; i < 8; ++i)
2044 sv_xmm->sv_fp[i].fp_acc = sv_87->sv_ac[i];
2046 sv_xmm->sv_ex_sw = sv_87->sv_ex_sw;
2048 #endif /* CPU_DISABLE_SSE */
2051 fill_fpregs(struct lwp *lp, struct fpreg *fpregs)
2053 #ifndef CPU_DISABLE_SSE
2055 fill_fpregs_xmm(&lp->lwp_thread->td_pcb->pcb_save.sv_xmm,
2056 (struct save87 *)fpregs);
2059 #endif /* CPU_DISABLE_SSE */
2060 bcopy(&lp->lwp_thread->td_pcb->pcb_save.sv_87, fpregs, sizeof *fpregs);
2065 set_fpregs(struct lwp *lp, struct fpreg *fpregs)
2067 #ifndef CPU_DISABLE_SSE
2069 set_fpregs_xmm((struct save87 *)fpregs,
2070 &lp->lwp_thread->td_pcb->pcb_save.sv_xmm);
2073 #endif /* CPU_DISABLE_SSE */
2074 bcopy(fpregs, &lp->lwp_thread->td_pcb->pcb_save.sv_87, sizeof *fpregs);
2079 fill_dbregs(struct lwp *lp, struct dbreg *dbregs)
2082 dbregs->dr[0] = rdr0();
2083 dbregs->dr[1] = rdr1();
2084 dbregs->dr[2] = rdr2();
2085 dbregs->dr[3] = rdr3();
2086 dbregs->dr[4] = rdr4();
2087 dbregs->dr[5] = rdr5();
2088 dbregs->dr[6] = rdr6();
2089 dbregs->dr[7] = rdr7();
2093 pcb = lp->lwp_thread->td_pcb;
2094 dbregs->dr[0] = pcb->pcb_dr0;
2095 dbregs->dr[1] = pcb->pcb_dr1;
2096 dbregs->dr[2] = pcb->pcb_dr2;
2097 dbregs->dr[3] = pcb->pcb_dr3;
2100 dbregs->dr[6] = pcb->pcb_dr6;
2101 dbregs->dr[7] = pcb->pcb_dr7;
2107 set_dbregs(struct lwp *lp, struct dbreg *dbregs)
2110 load_dr0(dbregs->dr[0]);
2111 load_dr1(dbregs->dr[1]);
2112 load_dr2(dbregs->dr[2]);
2113 load_dr3(dbregs->dr[3]);
2114 load_dr4(dbregs->dr[4]);
2115 load_dr5(dbregs->dr[5]);
2116 load_dr6(dbregs->dr[6]);
2117 load_dr7(dbregs->dr[7]);
2120 struct ucred *ucred;
2122 uint64_t mask1, mask2;
2125 * Don't let an illegal value for dr7 get set. Specifically,
2126 * check for undefined settings. Setting these bit patterns
2127 * result in undefined behaviour and can lead to an unexpected
2130 /* JG this loop looks unreadable */
2131 /* Check 4 2-bit fields for invalid patterns.
2132 * These fields are R/Wi, for i = 0..3
2134 /* Is 10 in LENi allowed when running in compatibility mode? */
2135 /* Pattern 10 in R/Wi might be used to indicate
2136 * breakpoint on I/O. Further analysis should be
2137 * carried to decide if it is safe and useful to
2138 * provide access to that capability
2140 for (i = 0, mask1 = 0x3<<16, mask2 = 0x2<<16; i < 4;
2141 i++, mask1 <<= 4, mask2 <<= 4)
2142 if ((dbregs->dr[7] & mask1) == mask2)
2145 pcb = lp->lwp_thread->td_pcb;
2146 ucred = lp->lwp_proc->p_ucred;
2149 * Don't let a process set a breakpoint that is not within the
2150 * process's address space. If a process could do this, it
2151 * could halt the system by setting a breakpoint in the kernel
2152 * (if ddb was enabled). Thus, we need to check to make sure
2153 * that no breakpoints are being enabled for addresses outside
2154 * process's address space, unless, perhaps, we were called by
2157 * XXX - what about when the watched area of the user's
2158 * address space is written into from within the kernel
2159 * ... wouldn't that still cause a breakpoint to be generated
2160 * from within kernel mode?
2163 if (priv_check_cred(ucred, PRIV_ROOT, 0) != 0) {
2164 if (dbregs->dr[7] & 0x3) {
2165 /* dr0 is enabled */
2166 if (dbregs->dr[0] >= VM_MAX_USER_ADDRESS)
2170 if (dbregs->dr[7] & (0x3<<2)) {
2171 /* dr1 is enabled */
2172 if (dbregs->dr[1] >= VM_MAX_USER_ADDRESS)
2176 if (dbregs->dr[7] & (0x3<<4)) {
2177 /* dr2 is enabled */
2178 if (dbregs->dr[2] >= VM_MAX_USER_ADDRESS)
2182 if (dbregs->dr[7] & (0x3<<6)) {
2183 /* dr3 is enabled */
2184 if (dbregs->dr[3] >= VM_MAX_USER_ADDRESS)
2189 pcb->pcb_dr0 = dbregs->dr[0];
2190 pcb->pcb_dr1 = dbregs->dr[1];
2191 pcb->pcb_dr2 = dbregs->dr[2];
2192 pcb->pcb_dr3 = dbregs->dr[3];
2193 pcb->pcb_dr6 = dbregs->dr[6];
2194 pcb->pcb_dr7 = dbregs->dr[7];
2196 pcb->pcb_flags |= PCB_DBREGS;
2203 * Return > 0 if a hardware breakpoint has been hit, and the
2204 * breakpoint was in user space. Return 0, otherwise.
2207 user_dbreg_trap(void)
2209 u_int64_t dr7, dr6; /* debug registers dr6 and dr7 */
2210 u_int64_t bp; /* breakpoint bits extracted from dr6 */
2211 int nbp; /* number of breakpoints that triggered */
2212 caddr_t addr[4]; /* breakpoint addresses */
2216 if ((dr7 & 0xff) == 0) {
2218 * all GE and LE bits in the dr7 register are zero,
2219 * thus the trap couldn't have been caused by the
2220 * hardware debug registers
2231 * None of the breakpoint bits are set meaning this
2232 * trap was not caused by any of the debug registers
2238 * at least one of the breakpoints were hit, check to see
2239 * which ones and if any of them are user space addresses
2243 addr[nbp++] = (caddr_t)rdr0();
2246 addr[nbp++] = (caddr_t)rdr1();
2249 addr[nbp++] = (caddr_t)rdr2();
2252 addr[nbp++] = (caddr_t)rdr3();
2255 for (i=0; i<nbp; i++) {
2257 (caddr_t)VM_MAX_USER_ADDRESS) {
2259 * addr[i] is in user space
2266 * None of the breakpoints are in user space.
2274 Debugger(const char *msg)
2276 kprintf("Debugger(\"%s\") called.\n", msg);
2283 * Provide inb() and outb() as functions. They are normally only
2284 * available as macros calling inlined functions, thus cannot be
2285 * called inside DDB.
2287 * The actual code is stolen from <machine/cpufunc.h>, and de-inlined.
2293 /* silence compiler warnings */
2295 void outb(u_int, u_char);
2302 * We use %%dx and not %1 here because i/o is done at %dx and not at
2303 * %edx, while gcc generates inferior code (movw instead of movl)
2304 * if we tell it to load (u_short) port.
2306 __asm __volatile("inb %%dx,%0" : "=a" (data) : "d" (port));
2311 outb(u_int port, u_char data)
2315 * Use an unnecessary assignment to help gcc's register allocator.
2316 * This make a large difference for gcc-1.40 and a tiny difference
2317 * for gcc-2.6.0. For gcc-1.40, al had to be ``asm("ax")'' for
2318 * best results. gcc-2.6.0 can't handle this.
2321 __asm __volatile("outb %0,%%dx" : : "a" (al), "d" (port));
2328 #include "opt_cpu.h"
2332 * initialize all the SMP locks
2335 /* critical region when masking or unmasking interupts */
2336 struct spinlock_deprecated imen_spinlock;
2338 /* Make FAST_INTR() routines sequential */
2339 struct spinlock_deprecated fast_intr_spinlock;
2341 /* critical region for old style disable_intr/enable_intr */
2342 struct spinlock_deprecated mpintr_spinlock;
2344 /* critical region around INTR() routines */
2345 struct spinlock_deprecated intr_spinlock;
2347 /* lock region used by kernel profiling */
2348 struct spinlock_deprecated mcount_spinlock;
2350 /* locks com (tty) data/hardware accesses: a FASTINTR() */
2351 struct spinlock_deprecated com_spinlock;
2353 /* locks kernel kprintfs */
2354 struct spinlock_deprecated cons_spinlock;
2356 /* lock regions around the clock hardware */
2357 struct spinlock_deprecated clock_spinlock;
2359 /* lock around the MP rendezvous */
2360 struct spinlock_deprecated smp_rv_spinlock;
2366 * mp_lock = 0; BSP already owns the MP lock
2369 * Get the initial mp_lock with a count of 1 for the BSP.
2370 * This uses a LOGICAL cpu ID, ie BSP == 0.
2373 cpu_get_initial_mplock();
2376 spin_lock_init(&mcount_spinlock);
2377 spin_lock_init(&fast_intr_spinlock);
2378 spin_lock_init(&intr_spinlock);
2379 spin_lock_init(&mpintr_spinlock);
2380 spin_lock_init(&imen_spinlock);
2381 spin_lock_init(&smp_rv_spinlock);
2382 spin_lock_init(&com_spinlock);
2383 spin_lock_init(&clock_spinlock);
2384 spin_lock_init(&cons_spinlock);
2386 /* our token pool needs to work early */
2387 lwkt_token_pool_init();