sys/dev/netif/ipw/if_ipw.c

   1 /*-
   2  * Copyright (c) 2004, 2005
   3  *      Damien Bergamini <damien.bergamini@free.fr>. All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions
   7  * are met:
   8  * 1. Redistributions of source code must retain the above copyright
   9  *    notice unmodified, this list of conditions, and the following
  10  *    disclaimer.
  11  * 2. Redistributions in binary form must reproduce the above copyright
  12  *    notice, this list of conditions and the following disclaimer in the
  13  *    documentation and/or other materials provided with the distribution.
  14  *
  15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
  16  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  17  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  18  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
  19  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  20  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  21  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  22  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  23  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  24  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  25  * SUCH DAMAGE.
  26  *
  27  *
  28  * $Id: if_ipw.c,v 1.7.2.1 2005/01/13 20:01:03 damien Exp $
  29  * $FreeBSD: src/sys/dev/ipw/if_ipw.c,v 1.7.2.4 2006/01/29 15:13:01 damien Exp $
  30  * $DragonFly: src/sys/dev/netif/ipw/Attic/if_ipw.c,v 1.14 2006/05/18 13:51:45 sephe Exp $
  31  */
  32
  33 /*-
  34  * Intel(R) PRO/Wireless 2100 MiniPCI driver
  35  * http://www.intel.com/network/connectivity/products/wireless/prowireless_mobile.htm
  36  */
  37
  38 #include <sys/param.h>
  39 #include <sys/sysctl.h>
  40 #include <sys/sockio.h>
  41 #include <sys/mbuf.h>
  42 #include <sys/kernel.h>
  43 #include <sys/socket.h>
  44 #include <sys/systm.h>
  45 #include <sys/malloc.h>
  46 #include <sys/module.h>
  47 #include <sys/bus.h>
  48 #include <sys/endian.h>
  49 #include <sys/proc.h>
  50 #include <sys/ucred.h>
  51 #include <sys/serialize.h>
  52 #include <sys/thread2.h>
  53
  54 #include <machine/bus.h>
  55 #include <machine/resource.h>
  56 #include <machine/clock.h>
  57 #include <sys/rman.h>
  58
  59 #include <bus/pci/pcireg.h>
  60 #include <bus/pci/pcivar.h>
  61 #include <bus/pci/pcidevs.h>
  62
  63 #include <net/bpf.h>
  64 #include <net/if.h>
  65 #include <net/if_arp.h>
  66 #include <net/ethernet.h>
  67 #include <net/if_dl.h>
  68 #include <net/if_media.h>
  69 #include <net/if_types.h>
  70 #include <net/ifq_var.h>
  71
  72 #include <netinet/in.h>
  73 #include <netinet/in_systm.h>
  74 #include <netinet/in_var.h>
  75 #include <netinet/ip.h>
  76 #include <netinet/if_ether.h>
  77
  78 #include <netproto/802_11/ieee80211_var.h>
  79 #include <netproto/802_11/ieee80211_ioctl.h>
  80 #include <netproto/802_11/ieee80211_radiotap.h>
  81 #include <netproto/802_11/if_wavelan_ieee.h>
  82
  83 #include <dev/netif/ipw/if_ipwreg.h>
  84 #include <dev/netif/ipw/if_ipwvar.h>
  85
  86 #ifdef IPW_DEBUG
  87 #define DPRINTF(x)      if (ipw_debug > 0) printf x
  88 #define DPRINTFN(n, x)  if (ipw_debug >= (n)) printf x
  89 int ipw_debug = 0;
  90 SYSCTL_INT(_debug, OID_AUTO, ipw, CTLFLAG_RW, &ipw_debug, 0, "ipw debug level");
  91 #else
  92 #define DPRINTF(x)
  93 #define DPRINTFN(n, x)
  94 #endif
  95
  96 MODULE_DEPEND(ipw, pci,  1, 1, 1);
  97 MODULE_DEPEND(ipw, wlan, 1, 1, 1);
  98
  99 struct ipw_ident {
 100         u_int16_t       vendor;
 101         u_int16_t       device;
 102         const char      *name;
 103 };
 104
 105 static const struct ipw_ident ipw_ident_table[] = {
 106         { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PRO_WL_2100,
 107           "Intel(R) PRO/Wireless 2100 MiniPCI" },
 108
 109         { 0, 0, NULL }
 110 };
 111
 112 static const struct ieee80211_rateset ipw_rateset_11b =
 113         { 4, { 2, 4, 11, 22 } };
 114
 115 static int              ipw_dma_alloc(device_t);
 116 static void             ipw_release(struct ipw_softc *);
 117 static int              ipw_media_change(struct ifnet *);
 118 static void             ipw_media_status(struct ifnet *, struct ifmediareq *);
 119 static int              ipw_newstate(struct ieee80211com *,
 120                             enum ieee80211_state, int);
 121 static u_int16_t        ipw_read_prom_word(struct ipw_softc *, u_int8_t);
 122 static void             ipw_command_intr(struct ipw_softc *,
 123                             struct ipw_soft_buf *);
 124 static void             ipw_newstate_intr(struct ipw_softc *,
 125                             struct ipw_soft_buf *);
 126 static void             ipw_data_intr(struct ipw_softc *, struct ipw_status *,
 127                             struct ipw_soft_bd *, struct ipw_soft_buf *);
 128 static void             ipw_notification_intr(struct ipw_softc *,
 129                             struct ipw_soft_buf *);
 130 static void             ipw_rx_intr(struct ipw_softc *);
 131 static void             ipw_release_sbd(struct ipw_softc *,
 132                             struct ipw_soft_bd *);
 133 static void             ipw_tx_intr(struct ipw_softc *);
 134 static void             ipw_intr(void *);
 135 static void             ipw_dma_map_txbuf(void *, bus_dma_segment_t *, int,
 136                             bus_size_t, int);
 137 static void             ipw_dma_map_addr(void *, bus_dma_segment_t *, int, int);
 138 static int              ipw_cmd(struct ipw_softc *, u_int32_t, void *,
 139                             u_int32_t);
 140 static int              ipw_tx_start(struct ifnet *, struct mbuf *,
 141                             struct ieee80211_node *);
 142 static void             ipw_start(struct ifnet *);
 143 static void             ipw_watchdog(struct ifnet *);
 144 static int              ipw_ioctl(struct ifnet *, u_long, caddr_t,
 145                                 struct ucred *cr);
 146 static void             ipw_stop_master(struct ipw_softc *);
 147 static int              ipw_reset(struct ipw_softc *);
 148 static int              ipw_load_ucode(struct ipw_softc *, u_char *, int);
 149 static int              ipw_load_firmware(struct ipw_softc *, u_char *, int);
 150 static int              ipw_cache_firmware(struct ipw_softc *, void *);
 151 static void             ipw_free_firmware(struct ipw_softc *);
 152 static int              ipw_config(struct ipw_softc *);
 153 static void             ipw_init(void *);
 154 static void             ipw_stop(void *);
 155 static int              ipw_sysctl_stats(SYSCTL_HANDLER_ARGS);
 156 static int              ipw_sysctl_radio(SYSCTL_HANDLER_ARGS);
 157 static u_int32_t        ipw_read_table1(struct ipw_softc *, u_int32_t);
 158 static void             ipw_write_table1(struct ipw_softc *, u_int32_t,
 159                             u_int32_t);
 160 static int              ipw_read_table2(struct ipw_softc *, u_int32_t, void *,
 161                             u_int32_t *);
 162 static void             ipw_read_mem_1(struct ipw_softc *, bus_size_t,
 163                             u_int8_t *, bus_size_t);
 164 static void             ipw_write_mem_1(struct ipw_softc *, bus_size_t,
 165                             u_int8_t *, bus_size_t);
 166
 167 static __inline u_int8_t MEM_READ_1(struct ipw_softc *sc, u_int32_t addr)
 168 {
 169         CSR_WRITE_4(sc, IPW_CSR_INDIRECT_ADDR, addr);
 170         return CSR_READ_1(sc, IPW_CSR_INDIRECT_DATA);
 171 }
 172
 173 static __inline u_int32_t MEM_READ_4(struct ipw_softc *sc, u_int32_t addr)
 174 {
 175         CSR_WRITE_4(sc, IPW_CSR_INDIRECT_ADDR, addr);
 176         return CSR_READ_4(sc, IPW_CSR_INDIRECT_DATA);
 177 }
 178
 179 static int ipw_probe(device_t);
 180 static int ipw_attach(device_t);
 181 static int ipw_detach(device_t);
 182 static int ipw_shutdown(device_t);
 183 static int ipw_suspend(device_t);
 184 static int ipw_resume(device_t);
 185
 186 static device_method_t ipw_methods[] = {
 187         /* Device interface */
 188         DEVMETHOD(device_probe,         ipw_probe),
 189         DEVMETHOD(device_attach,        ipw_attach),
 190         DEVMETHOD(device_detach,        ipw_detach),
 191         DEVMETHOD(device_shutdown,      ipw_shutdown),
 192         DEVMETHOD(device_suspend,       ipw_suspend),
 193         DEVMETHOD(device_resume,        ipw_resume),
 194
 195         { 0, 0 }
 196 };
 197
 198 static DEFINE_CLASS_0(ipw, ipw_driver, ipw_methods, sizeof(struct ipw_softc));
 199 static devclass_t ipw_devclass;
 200
 201 DRIVER_MODULE(ipw, pci, ipw_driver, ipw_devclass, 0, 0);
 202
 203 static int
 204 ipw_probe(device_t dev)
 205 {
 206         const struct ipw_ident *ident;
 207
 208         for (ident = ipw_ident_table; ident->name != NULL; ident++) {
 209                 if (pci_get_vendor(dev) == ident->vendor &&
 210                     pci_get_device(dev) == ident->device) {
 211                         device_set_desc(dev, ident->name);
 212                         return 0;
 213                 }
 214         }
 215         return ENXIO;
 216 }
 217
 218 /* Base Address Register */
 219 #define IPW_PCI_BAR0    0x10
 220
 221 static int
 222 ipw_attach(device_t dev)
 223 {
 224         struct ipw_softc *sc = device_get_softc(dev);
 225         struct ieee80211com *ic = &sc->sc_ic;
 226         struct ifnet *ifp = &ic->ic_if;
 227         struct sysctl_oid *sysctl_tree;
 228         u_int16_t val;
 229         int error, i;
 230
 231         if (pci_get_powerstate(dev) != PCI_POWERSTATE_D0) {
 232                 device_printf(dev, "chip is in D%d power mode "
 233                     "-- setting to D0\n", pci_get_powerstate(dev));
 234                 pci_set_powerstate(dev, PCI_POWERSTATE_D0);
 235         }
 236
 237         pci_write_config(dev, 0x41, 0, 1);
 238
 239         /* enable bus-mastering */
 240         pci_enable_busmaster(dev);
 241
 242         /* map the register window */
 243         sc->mem_rid = IPW_PCI_BAR0;
 244         sc->mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &sc->mem_rid,
 245                                          RF_ACTIVE);
 246         if (sc->mem == NULL) {
 247                 device_printf(dev, "could not allocate memory resource\n");
 248                 goto fail;
 249         }
 250
 251         sc->sc_st = rman_get_bustag(sc->mem);
 252         sc->sc_sh = rman_get_bushandle(sc->mem);
 253
 254         sc->irq_rid = 0;
 255         sc->irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &sc->irq_rid,
 256                                          RF_ACTIVE | RF_SHAREABLE);
 257         if (sc->irq == NULL) {
 258                 device_printf(dev, "could not allocate interrupt resource\n");
 259                 goto fail;
 260         }
 261
 262         if_initname(ifp, device_get_name(dev), device_get_unit(dev));
 263
 264         if (ipw_reset(sc) != 0) {
 265                 device_printf(dev, "could not reset adapter\n");
 266                 goto fail;
 267         }
 268
 269         sysctl_ctx_init(&sc->sysctl_ctx);
 270         sysctl_tree = SYSCTL_ADD_NODE(&sc->sysctl_ctx,
 271                 SYSCTL_STATIC_CHILDREN(_hw),
 272                 OID_AUTO,
 273                 device_get_nameunit(dev),
 274                 CTLFLAG_RD,
 275                 0, "");
 276
 277         if (ipw_dma_alloc(dev) != 0) {
 278                 device_printf(dev, "could not allocate DMA resources\n");
 279                 goto fail;
 280         }
 281
 282         ic->ic_phytype = IEEE80211_T_DS;
 283         ic->ic_opmode = IEEE80211_M_STA;
 284         ic->ic_state = IEEE80211_S_INIT;
 285
 286         /* set device capabilities */
 287        ic->ic_caps = IEEE80211_C_SHPREAMBLE | IEEE80211_C_TXPMGT |
 288            IEEE80211_C_PMGT | IEEE80211_C_IBSS | IEEE80211_C_MONITOR |
 289            IEEE80211_C_WEP;
 290
 291         /* read MAC address from EEPROM */
 292         val = ipw_read_prom_word(sc, IPW_EEPROM_MAC + 0);
 293         ic->ic_myaddr[0] = val >> 8;
 294         ic->ic_myaddr[1] = val & 0xff;
 295         val = ipw_read_prom_word(sc, IPW_EEPROM_MAC + 1);
 296         ic->ic_myaddr[2] = val >> 8;
 297         ic->ic_myaddr[3] = val & 0xff;
 298         val = ipw_read_prom_word(sc, IPW_EEPROM_MAC + 2);
 299         ic->ic_myaddr[4] = val >> 8;
 300         ic->ic_myaddr[5] = val & 0xff;
 301
 302         /* set supported .11b rates */
 303         ic->ic_sup_rates[IEEE80211_MODE_11B] = ipw_rateset_11b;
 304
 305         /* set supported .11b channels (read from EEPROM) */
 306         if ((val = ipw_read_prom_word(sc, IPW_EEPROM_CHANNEL_LIST)) == 0)
 307                 val = 0x7ff; /* default to channels 1-11 */
 308         val <<= 1;
 309         for (i = 1; i < 16; i++) {
 310                 if (val & (1 << i)) {
 311                         ic->ic_channels[i].ic_freq =
 312                             ieee80211_ieee2mhz(i, IEEE80211_CHAN_B);
 313                         ic->ic_channels[i].ic_flags = IEEE80211_CHAN_B;
 314                 }
 315         }
 316
 317         /* check support for radio transmitter switch in EEPROM */
 318         if (!(ipw_read_prom_word(sc, IPW_EEPROM_RADIO) & 8))
 319                 sc->flags |= IPW_FLAG_HAS_RADIO_SWITCH;
 320
 321         /* IBSS channel undefined for now */
 322         ic->ic_ibss_chan = &ic->ic_channels[0];
 323
 324         ifp->if_softc = sc;
 325         ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
 326         ifp->if_init = ipw_init;
 327         ifp->if_ioctl = ipw_ioctl;
 328         ifp->if_start = ipw_start;
 329         ifp->if_watchdog = ipw_watchdog;
 330         ifq_set_maxlen(&ifp->if_snd, IFQ_MAXLEN);
 331         ifq_set_ready(&ifp->if_snd);
 332
 333         ieee80211_ifattach(ic);
 334         /* override state transition machine */
 335         sc->sc_newstate = ic->ic_newstate;
 336         ic->ic_newstate = ipw_newstate;
 337         ieee80211_media_init(ic, ipw_media_change, ipw_media_status);
 338
 339         bpfattach_dlt(ifp, DLT_IEEE802_11_RADIO,
 340             sizeof (struct ieee80211_frame) + 64, &sc->sc_drvbpf);
 341
 342         sc->sc_rxtap_len = sizeof sc->sc_rxtapu;
 343         sc->sc_rxtap.wr_ihdr.it_len = htole16(sc->sc_rxtap_len);
 344         sc->sc_rxtap.wr_ihdr.it_present = htole32(IPW_RX_RADIOTAP_PRESENT);
 345
 346         sc->sc_txtap_len = sizeof sc->sc_txtapu;
 347         sc->sc_txtap.wt_ihdr.it_len = htole16(sc->sc_txtap_len);
 348         sc->sc_txtap.wt_ihdr.it_present = htole32(IPW_TX_RADIOTAP_PRESENT);
 349
 350         sc->dwelltime = 100;
 351
 352         SYSCTL_ADD_PROC(&sc->sysctl_ctx,
 353             SYSCTL_CHILDREN(sysctl_tree), OID_AUTO, "radio",
 354             CTLTYPE_INT | CTLFLAG_RD, sc, 0, ipw_sysctl_radio, "I",
 355             "Radio transmitter switch");
 356
 357         SYSCTL_ADD_PROC(&sc->sysctl_ctx,
 358             SYSCTL_CHILDREN(sysctl_tree), OID_AUTO, "stats",
 359             CTLTYPE_OPAQUE | CTLFLAG_RD, sc, 0, ipw_sysctl_stats, "S",
 360             "Statistics");
 361
 362         SYSCTL_ADD_INT(&sc->sysctl_ctx,
 363             SYSCTL_CHILDREN(sysctl_tree), OID_AUTO, "dwell",
 364             CTLFLAG_RW, &sc->dwelltime, 0,
 365             "Channel dwell time (ms) for AP/station scanning");
 366
 367         /*
 368          * Hook our interrupt after all initialization is complete
 369          */
 370         error = bus_setup_intr(dev, sc->irq, INTR_MPSAFE,
 371                                ipw_intr, sc, &sc->sc_ih, ifp->if_serializer);
 372         if (error != 0) {
 373                 device_printf(dev, "could not set up interrupt\n");
 374                 bpfdetach(ifp);
 375                 ieee80211_ifdetach(ic);
 376                 goto fail;
 377         }
 378
 379         if (bootverbose)
 380                 ieee80211_announce(ic);
 381
 382         return 0;
 383
 384 fail:
 385         ipw_detach(dev);
 386         return ENXIO;
 387 }
 388
 389 static int
 390 ipw_detach(device_t dev)
 391 {
 392         struct ipw_softc *sc = device_get_softc(dev);
 393         struct ifnet *ifp = &sc->sc_ic.ic_if;
 394
 395         if (device_is_attached(dev)) {
 396                 lwkt_serialize_enter(ifp->if_serializer);
 397                 ipw_stop(sc);
 398                 ipw_free_firmware(sc);
 399                 bus_teardown_intr(dev, sc->irq, sc->sc_ih);
 400                 lwkt_serialize_exit(ifp->if_serializer);
 401
 402                 bpfdetach(ifp);
 403                 ieee80211_ifdetach(&sc->sc_ic);
 404         }
 405
 406         ipw_release(sc);
 407
 408         if (sc->irq != NULL)
 409                 bus_release_resource(dev, SYS_RES_IRQ, sc->irq_rid, sc->irq);
 410
 411         if (sc->mem != NULL)
 412                 bus_release_resource(dev, SYS_RES_MEMORY, sc->mem_rid, sc->mem);
 413
 414         sysctl_ctx_free(&sc->sysctl_ctx);
 415
 416         return 0;
 417 }
 418
 419 static int
 420 ipw_dma_alloc(device_t dev)
 421 {
 422         struct ipw_soft_bd *sbd;
 423         struct ipw_soft_hdr *shdr;
 424         struct ipw_soft_buf *sbuf;
 425         bus_addr_t physaddr;
 426         int error, i;
 427         struct ipw_softc *sc;
 428
 429         sc = device_get_softc(dev);
 430         /*
 431          * Allocate and map tx ring
 432          */
 433         error = bus_dma_tag_create(NULL, 4, 0, BUS_SPACE_MAXADDR_32BIT,
 434             BUS_SPACE_MAXADDR, NULL, NULL, IPW_TBD_SZ, 1, IPW_TBD_SZ, 0,
 435             &sc->tbd_dmat);
 436         if (error != 0) {
 437                 device_printf(dev, "could not create tx ring DMA tag\n");
 438                 goto fail;
 439         }
 440
 441         error = bus_dmamem_alloc(sc->tbd_dmat, (void **)&sc->tbd_list,
 442             BUS_DMA_WAITOK | BUS_DMA_ZERO, &sc->tbd_map);
 443         if (error != 0) {
 444                 device_printf(dev, "could not allocate tx ring DMA memory\n");
 445                 goto fail;
 446         }
 447
 448         error = bus_dmamap_load(sc->tbd_dmat, sc->tbd_map, sc->tbd_list,
 449             IPW_TBD_SZ, ipw_dma_map_addr, &sc->tbd_phys, 0);
 450         if (error != 0) {
 451                 device_printf(dev, "could not map tx ring DMA memory\n");
 452                 goto fail;
 453         }
 454
 455         /*
 456          * Allocate and map rx ring
 457          */
 458         error = bus_dma_tag_create(NULL, 4, 0, BUS_SPACE_MAXADDR_32BIT,
 459             BUS_SPACE_MAXADDR, NULL, NULL, IPW_RBD_SZ, 1, IPW_RBD_SZ, 0,
 460             &sc->rbd_dmat);
 461         if (error != 0) {
 462                 device_printf(dev, "could not create rx ring DMA tag\n");
 463                 goto fail;
 464         }
 465
 466         error = bus_dmamem_alloc(sc->rbd_dmat, (void **)&sc->rbd_list,
 467             BUS_DMA_WAITOK | BUS_DMA_ZERO, &sc->rbd_map);
 468         if (error != 0) {
 469                 device_printf(dev, "could not allocate rx ring DMA memory\n");
 470                 goto fail;
 471         }
 472
 473         error = bus_dmamap_load(sc->rbd_dmat, sc->rbd_map, sc->rbd_list,
 474             IPW_RBD_SZ, ipw_dma_map_addr, &sc->rbd_phys, 0);
 475         if (error != 0) {
 476                 device_printf(dev, "could not map rx ring DMA memory\n");
 477                 goto fail;
 478         }
 479
 480         /*
 481          * Allocate and map status ring
 482          */
 483         error = bus_dma_tag_create(NULL, 4, 0, BUS_SPACE_MAXADDR_32BIT,
 484             BUS_SPACE_MAXADDR, NULL, NULL, IPW_STATUS_SZ, 1, IPW_STATUS_SZ, 0,
 485             &sc->status_dmat);
 486         if (error != 0) {
 487                 device_printf(dev, "could not create status ring DMA tag\n");
 488                 goto fail;
 489         }
 490
 491         error = bus_dmamem_alloc(sc->status_dmat, (void **)&sc->status_list,
 492             BUS_DMA_WAITOK | BUS_DMA_ZERO, &sc->status_map);
 493         if (error != 0) {
 494                 device_printf(dev,
 495                     "could not allocate status ring DMA memory\n");
 496                 goto fail;
 497         }
 498
 499         error = bus_dmamap_load(sc->status_dmat, sc->status_map,
 500             sc->status_list, IPW_STATUS_SZ, ipw_dma_map_addr, &sc->status_phys,
 501             0);
 502         if (error != 0) {
 503                 device_printf(dev, "could not map status ring DMA memory\n");
 504                 goto fail;
 505         }
 506
 507         /*
 508          * Allocate command DMA map
 509          */
 510         error = bus_dma_tag_create(NULL, 1, 0, BUS_SPACE_MAXADDR_32BIT,
 511             BUS_SPACE_MAXADDR, NULL, NULL, sizeof (struct ipw_cmd), 1,
 512             sizeof (struct ipw_cmd), 0, &sc->cmd_dmat);
 513         if (error != 0) {
 514                 device_printf(dev, "could not create command DMA tag\n");
 515                 goto fail;
 516         }
 517
 518         error = bus_dmamap_create(sc->cmd_dmat, 0, &sc->cmd_map);
 519         if (error != 0) {
 520                 device_printf(dev, "could not create command DMA map\n");
 521                 goto fail;
 522         }
 523
 524         /*
 525          * Allocate headers DMA maps
 526          */
 527         error = bus_dma_tag_create(NULL, 1, 0, BUS_SPACE_MAXADDR_32BIT,
 528             BUS_SPACE_MAXADDR, NULL, NULL, sizeof (struct ipw_hdr), 1,
 529             sizeof (struct ipw_hdr), 0, &sc->hdr_dmat);
 530         if (error != 0) {
 531                 device_printf(dev, "could not create header DMA tag\n");
 532                 goto fail;
 533         }
 534
 535         SLIST_INIT(&sc->free_shdr);
 536         for (i = 0; i < IPW_NDATA; i++) {
 537                 shdr = &sc->shdr_list[i];
 538                 error = bus_dmamap_create(sc->hdr_dmat, 0, &shdr->map);
 539                 if (error != 0) {
 540                         device_printf(dev, "could not create header DMA map\n");
 541                         goto fail;
 542                 }
 543                 SLIST_INSERT_HEAD(&sc->free_shdr, shdr, next);
 544         }
 545
 546         /*
 547          * Allocate tx buffers DMA maps
 548          */
 549         error = bus_dma_tag_create(NULL, 1, 0, BUS_SPACE_MAXADDR_32BIT,
 550             BUS_SPACE_MAXADDR, NULL, NULL, MCLBYTES, IPW_MAX_NSEG, MCLBYTES, 0,
 551             &sc->txbuf_dmat);
 552         if (error != 0) {
 553                 device_printf(dev, "could not create tx DMA tag\n");
 554                 goto fail;
 555         }
 556
 557         SLIST_INIT(&sc->free_sbuf);
 558         for (i = 0; i < IPW_NDATA; i++) {
 559                 sbuf = &sc->tx_sbuf_list[i];
 560                 error = bus_dmamap_create(sc->txbuf_dmat, 0, &sbuf->map);
 561                 if (error != 0) {
 562                         device_printf(dev, "could not create tx DMA map\n");
 563                         goto fail;
 564                 }
 565                 SLIST_INSERT_HEAD(&sc->free_sbuf, sbuf, next);
 566         }
 567
 568         /*
 569          * Initialize tx ring
 570          */
 571         for (i = 0; i < IPW_NTBD; i++) {
 572                 sbd = &sc->stbd_list[i];
 573                 sbd->bd = &sc->tbd_list[i];
 574                 sbd->type = IPW_SBD_TYPE_NOASSOC;
 575         }
 576
 577         /*
 578          * Pre-allocate rx buffers and DMA maps
 579          */
 580         error = bus_dma_tag_create(NULL, 1, 0, BUS_SPACE_MAXADDR_32BIT,
 581             BUS_SPACE_MAXADDR, NULL, NULL, MCLBYTES, IPW_NRBD, MCLBYTES, 0,
 582             &sc->rxbuf_dmat);
 583         if (error != 0) {
 584                 device_printf(dev, "could not create rx DMA tag\n");
 585                 goto fail;
 586         }
 587
 588         for (i = 0; i < IPW_NRBD; i++) {
 589                 sbd = &sc->srbd_list[i];
 590                 sbuf = &sc->rx_sbuf_list[i];
 591                 sbd->bd = &sc->rbd_list[i];
 592
 593                 sbuf->m = m_getcl(MB_DONTWAIT, MT_DATA, M_PKTHDR);
 594                 if (sbuf->m == NULL) {
 595                         device_printf(dev, "could not allocate rx mbuf\n");
 596                         error = ENOMEM;
 597                         goto fail;
 598                 }
 599
 600                 error = bus_dmamap_create(sc->rxbuf_dmat, 0, &sbuf->map);
 601                 if (error != 0) {
 602                         device_printf(dev, "could not create rx DMA map\n");
 603                         goto fail;
 604                 }
 605
 606                 error = bus_dmamap_load(sc->rxbuf_dmat, sbuf->map,
 607                     mtod(sbuf->m, void *), MCLBYTES, ipw_dma_map_addr,
 608                     &physaddr, 0);
 609                 if (error != 0) {
 610                         device_printf(dev, "could not map rx DMA memory\n");
 611                         goto fail;
 612                 }
 613
 614                 sbd->type = IPW_SBD_TYPE_DATA;
 615                 sbd->priv = sbuf;
 616                 sbd->bd->physaddr = htole32(physaddr);
 617                 sbd->bd->len = htole32(MCLBYTES);
 618         }
 619
 620         bus_dmamap_sync(sc->rbd_dmat, sc->rbd_map, BUS_DMASYNC_PREWRITE);
 621
 622         return 0;
 623
 624 fail:   ipw_release(sc);
 625         return error;
 626 }
 627
 628 static void
 629 ipw_release(struct ipw_softc *sc)
 630 {
 631         struct ipw_soft_buf *sbuf;
 632         int i;
 633
 634         if (sc->tbd_dmat != NULL) {
 635                 if (sc->stbd_list != NULL) {
 636                         bus_dmamap_sync(sc->tbd_dmat, sc->tbd_map,
 637                             BUS_DMASYNC_POSTWRITE);
 638                         bus_dmamap_unload(sc->tbd_dmat, sc->tbd_map);
 639                         bus_dmamem_free(sc->tbd_dmat, sc->tbd_list,
 640                             sc->tbd_map);
 641                 }
 642                 bus_dma_tag_destroy(sc->tbd_dmat);
 643         }
 644
 645         if (sc->rbd_dmat != NULL) {
 646                 if (sc->rbd_list != NULL) {
 647                         bus_dmamap_sync(sc->rbd_dmat, sc->rbd_map,
 648                             BUS_DMASYNC_POSTWRITE);
 649                         bus_dmamap_unload(sc->rbd_dmat, sc->rbd_map);
 650                         bus_dmamem_free(sc->rbd_dmat, sc->rbd_list,
 651                             sc->rbd_map);
 652                 }
 653                 bus_dma_tag_destroy(sc->rbd_dmat);
 654         }
 655
 656         if (sc->status_dmat != NULL) {
 657                 if (sc->status_list != NULL) {
 658                         bus_dmamap_sync(sc->status_dmat, sc->status_map,
 659                             BUS_DMASYNC_POSTWRITE);
 660                         bus_dmamap_unload(sc->status_dmat, sc->status_map);
 661                         bus_dmamem_free(sc->status_dmat, sc->status_list,
 662                             sc->status_map);
 663                 }
 664                 bus_dma_tag_destroy(sc->status_dmat);
 665         }
 666
 667         for (i = 0; i < IPW_NTBD; i++)
 668                 ipw_release_sbd(sc, &sc->stbd_list[i]);
 669
 670         if (sc->cmd_dmat != NULL) {
 671                 bus_dmamap_destroy(sc->cmd_dmat, sc->cmd_map);
 672                 bus_dma_tag_destroy(sc->cmd_dmat);
 673         }
 674
 675         if (sc->hdr_dmat != NULL) {
 676                 for (i = 0; i < IPW_NDATA; i++)
 677                         bus_dmamap_destroy(sc->hdr_dmat, sc->shdr_list[i].map);
 678                 bus_dma_tag_destroy(sc->hdr_dmat);
 679         }
 680
 681         if (sc->txbuf_dmat != NULL) {
 682                 for (i = 0; i < IPW_NDATA; i++) {
 683                         bus_dmamap_destroy(sc->txbuf_dmat,
 684                             sc->tx_sbuf_list[i].map);
 685                 }
 686                 bus_dma_tag_destroy(sc->txbuf_dmat);
 687         }
 688
 689         if (sc->rxbuf_dmat != NULL) {
 690                 for (i = 0; i < IPW_NRBD; i++) {
 691                         sbuf = &sc->rx_sbuf_list[i];
 692                         if (sbuf->m != NULL) {
 693                                 bus_dmamap_sync(sc->rxbuf_dmat, sbuf->map,
 694                                     BUS_DMASYNC_POSTREAD);
 695                                 bus_dmamap_unload(sc->rxbuf_dmat, sbuf->map);
 696                                 m_freem(sbuf->m);
 697                         }
 698                         bus_dmamap_destroy(sc->rxbuf_dmat, sbuf->map);
 699                 }
 700                 bus_dma_tag_destroy(sc->rxbuf_dmat);
 701         }
 702 }
 703
 704 static int
 705 ipw_shutdown(device_t dev)
 706 {
 707         struct ipw_softc *sc = device_get_softc(dev);
 708         struct ifnet *ifp = &sc->sc_ic.ic_if;
 709
 710         lwkt_serialize_enter(ifp->if_serializer);
 711         ipw_stop(sc);
 712         lwkt_serialize_exit(ifp->if_serializer);
 713
 714         return 0;
 715 }
 716
 717 static int
 718 ipw_suspend(device_t dev)
 719 {
 720         struct ipw_softc *sc = device_get_softc(dev);
 721         struct ifnet *ifp = &sc->sc_ic.ic_if;
 722
 723         lwkt_serialize_enter(ifp->if_serializer);
 724         ipw_stop(sc);
 725         lwkt_serialize_exit(ifp->if_serializer);
 726
 727         return 0;
 728 }
 729
 730 static int
 731 ipw_resume(device_t dev)
 732 {
 733         struct ipw_softc *sc = device_get_softc(dev);
 734         struct ifnet *ifp = &sc->sc_ic.ic_if;
 735
 736         lwkt_serialize_enter(ifp->if_serializer);
 737         pci_write_config(dev, 0x41, 0, 1);
 738
 739         if (ifp->if_flags & IFF_UP) {
 740                 ifp->if_init(ifp->if_softc);
 741                 if (ifp->if_flags & IFF_RUNNING)
 742                         ifp->if_start(ifp);
 743         }
 744         lwkt_serialize_exit(ifp->if_serializer);
 745
 746         return 0;
 747 }
 748
 749 static int
 750 ipw_media_change(struct ifnet *ifp)
 751 {
 752         struct ipw_softc *sc = ifp->if_softc;
 753         int error;
 754
 755         error = ieee80211_media_change(ifp);
 756         if (error != ENETRESET)
 757                 return error;
 758
 759         if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == (IFF_UP | IFF_RUNNING))
 760                 ipw_init(sc);
 761
 762         return 0;
 763 }
 764
 765 static void
 766 ipw_media_status(struct ifnet *ifp, struct ifmediareq *imr)
 767 {
 768         struct ipw_softc *sc = ifp->if_softc;
 769         struct ieee80211com *ic = &sc->sc_ic;
 770 #define N(a)    (sizeof (a) / sizeof (a[0]))
 771         static const struct {
 772                 u_int32_t       val;
 773                 int             rate;
 774         } rates[] = {
 775                 { IPW_RATE_DS1,   2 },
 776                 { IPW_RATE_DS2,   4 },
 777                 { IPW_RATE_DS5,  11 },
 778                 { IPW_RATE_DS11, 22 },
 779         };
 780         u_int32_t val, i;
 781         int rate;
 782
 783         imr->ifm_status = IFM_AVALID;
 784         imr->ifm_active = IFM_IEEE80211;
 785         if (ic->ic_state == IEEE80211_S_RUN)
 786                 imr->ifm_status |= IFM_ACTIVE;
 787
 788         /* read current transmission rate from adapter */
 789         val = ipw_read_table1(sc, IPW_INFO_CURRENT_TX_RATE) & 0xf;
 790
 791         /* convert rate to 802.11 rate */
 792         for (i = 0; i < N(rates) && rates[i].val != val; i++);
 793         rate = (i < N(rates)) ? rates[i].rate : 0;
 794
 795         imr->ifm_active |= IFM_IEEE80211_11B;
 796         imr->ifm_active |= ieee80211_rate2media(ic, rate, IEEE80211_MODE_11B);
 797         switch (ic->ic_opmode) {
 798         case IEEE80211_M_STA:
 799                 break;
 800
 801         case IEEE80211_M_IBSS:
 802                 imr->ifm_active |= IFM_IEEE80211_IBSS;
 803                 break;
 804
 805         case IEEE80211_M_MONITOR:
 806                 imr->ifm_active |= IFM_IEEE80211_MONITOR;
 807                 break;
 808
 809         case IEEE80211_M_AHDEMO:
 810         case IEEE80211_M_HOSTAP:
 811                 /* should not get there */
 812                 break;
 813         }
 814 #undef N
 815 }
 816
 817 static int
 818 ipw_newstate(struct ieee80211com *ic, enum ieee80211_state nstate, int arg __unused)
 819 {
 820         struct ipw_softc *sc = ic->ic_if.if_softc;
 821         struct ieee80211_node *ni;
 822         uint8_t macaddr[IEEE80211_ADDR_LEN];
 823         uint32_t len;
 824
 825         switch (nstate) {
 826         case IEEE80211_S_RUN:
 827                 DELAY(200); /* firmware needs a short delay here */
 828
 829                 len = IEEE80211_ADDR_LEN;
 830                 ipw_read_table2(sc, IPW_INFO_CURRENT_BSSID, macaddr, &len);
 831                 ni = ieee80211_find_node(&ic->ic_scan, macaddr);
 832                 if (ni == NULL)
 833                         break;
 834
 835                 ieee80211_ref_node(ni);
 836                 ieee80211_sta_join(ic, ni);
 837                 ieee80211_node_authorize(ni);
 838
 839                 if (ic->ic_opmode == IEEE80211_M_STA)
 840                         ieee80211_notify_node_join(ic, ni, 1);
 841                 break;
 842
 843         case IEEE80211_S_INIT:
 844         case IEEE80211_S_SCAN:
 845         case IEEE80211_S_AUTH:
 846         case IEEE80211_S_ASSOC:
 847                 break;
 848         }
 849
 850         ic->ic_state = nstate;
 851         return 0;
 852 }
 853
 854 /*
 855  * Read 16 bits at address 'addr' from the Microwire EEPROM.
 856  * DON'T PLAY WITH THIS CODE UNLESS YOU KNOW *EXACTLY* WHAT YOU'RE DOING!
 857  */
 858 static u_int16_t
 859 ipw_read_prom_word(struct ipw_softc *sc, u_int8_t addr)
 860 {
 861         u_int32_t tmp;
 862         u_int16_t val;
 863         int n;
 864
 865         /* Clock C once before the first command */
 866         IPW_EEPROM_CTL(sc, 0);
 867         IPW_EEPROM_CTL(sc, IPW_EEPROM_S);
 868         IPW_EEPROM_CTL(sc, IPW_EEPROM_S | IPW_EEPROM_C);
 869         IPW_EEPROM_CTL(sc, IPW_EEPROM_S);
 870
 871         /* Write start bit (1) */
 872         IPW_EEPROM_CTL(sc, IPW_EEPROM_S | IPW_EEPROM_D);
 873         IPW_EEPROM_CTL(sc, IPW_EEPROM_S | IPW_EEPROM_D | IPW_EEPROM_C);
 874
 875         /* Write READ opcode (10) */
 876         IPW_EEPROM_CTL(sc, IPW_EEPROM_S | IPW_EEPROM_D);
 877         IPW_EEPROM_CTL(sc, IPW_EEPROM_S | IPW_EEPROM_D | IPW_EEPROM_C);
 878         IPW_EEPROM_CTL(sc, IPW_EEPROM_S);
 879         IPW_EEPROM_CTL(sc, IPW_EEPROM_S | IPW_EEPROM_C);
 880
 881         /* Write address A7-A0 */
 882         for (n = 7; n >= 0; n--) {
 883                 IPW_EEPROM_CTL(sc, IPW_EEPROM_S |
 884                     (((addr >> n) & 1) << IPW_EEPROM_SHIFT_D));
 885                 IPW_EEPROM_CTL(sc, IPW_EEPROM_S |
 886                     (((addr >> n) & 1) << IPW_EEPROM_SHIFT_D) | IPW_EEPROM_C);
 887         }
 888
 889         IPW_EEPROM_CTL(sc, IPW_EEPROM_S);
 890
 891         /* Read data Q15-Q0 */
 892         val = 0;
 893         for (n = 15; n >= 0; n--) {
 894                 IPW_EEPROM_CTL(sc, IPW_EEPROM_S | IPW_EEPROM_C);
 895                 IPW_EEPROM_CTL(sc, IPW_EEPROM_S);
 896                 tmp = MEM_READ_4(sc, IPW_MEM_EEPROM_CTL);
 897                 val |= ((tmp & IPW_EEPROM_Q) >> IPW_EEPROM_SHIFT_Q) << n;
 898         }
 899
 900         IPW_EEPROM_CTL(sc, 0);
 901
 902         /* Clear Chip Select and clock C */
 903         IPW_EEPROM_CTL(sc, IPW_EEPROM_S);
 904         IPW_EEPROM_CTL(sc, 0);
 905         IPW_EEPROM_CTL(sc, IPW_EEPROM_C);
 906
 907         return le16toh(val);
 908 }
 909
 910 static void
 911 ipw_command_intr(struct ipw_softc *sc, struct ipw_soft_buf *sbuf)
 912 {
 913         struct ipw_cmd *cmd;
 914
 915         bus_dmamap_sync(sc->rxbuf_dmat, sbuf->map, BUS_DMASYNC_POSTREAD);
 916
 917         cmd = mtod(sbuf->m, struct ipw_cmd *);
 918
 919         DPRINTFN(2, ("RX!CMD!%u!%u!%u!%u!%u\n",
 920             le32toh(cmd->type), le32toh(cmd->subtype), le32toh(cmd->seq),
 921             le32toh(cmd->len), le32toh(cmd->status)));
 922
 923         wakeup(sc);
 924 }
 925
 926 static void
 927 ipw_newstate_intr(struct ipw_softc *sc, struct ipw_soft_buf *sbuf)
 928 {
 929         struct ieee80211com *ic = &sc->sc_ic;
 930         u_int32_t state;
 931
 932         bus_dmamap_sync(sc->rxbuf_dmat, sbuf->map, BUS_DMASYNC_POSTREAD);
 933
 934         state = le32toh(*mtod(sbuf->m, u_int32_t *));
 935
 936         DPRINTFN(2, ("RX!NEWSTATE!%u\n", state));
 937
 938         switch (state) {
 939         case IPW_STATE_ASSOCIATED:
 940                 ieee80211_new_state(ic, IEEE80211_S_RUN, -1);
 941                 break;
 942
 943         case IPW_STATE_SCANNING:
 944                 /* don't leave run state on background scan */
 945                 if (ic->ic_state != IEEE80211_S_RUN)
 946                         ieee80211_new_state(ic, IEEE80211_S_SCAN, -1);
 947
 948                 ic->ic_flags |= IEEE80211_F_SCAN;
 949                 break;
 950
 951         case IPW_STATE_SCAN_COMPLETE:
 952                 ieee80211_notify_scan_done(ic);
 953                 ic->ic_flags &= ~IEEE80211_F_SCAN;
 954                 break;
 955
 956         case IPW_STATE_ASSOCIATION_LOST:
 957                 ieee80211_new_state(ic, IEEE80211_S_INIT, -1);
 958                 break;
 959
 960         case IPW_STATE_RADIO_DISABLED:
 961                 ic->ic_if.if_flags &= ~IFF_UP;
 962                 ipw_stop(sc);
 963                 break;
 964         }
 965 }
 966
 967 /*
 968  * XXX: Hack to set the current channel to the value advertised in beacons or
 969  * probe responses. Only used during AP detection.
 970  */
 971 static void
 972 ipw_fix_channel(struct ieee80211com *ic, struct mbuf *m)
 973 {
 974         struct ieee80211_frame *wh;
 975         uint8_t subtype;
 976         uint8_t *frm, *efrm;
 977
 978         wh = mtod(m, struct ieee80211_frame *);
 979
 980         if ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) != IEEE80211_FC0_TYPE_MGT)
 981                 return;
 982
 983         subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK;
 984
 985         if (subtype != IEEE80211_FC0_SUBTYPE_BEACON &&
 986             subtype != IEEE80211_FC0_SUBTYPE_PROBE_RESP)
 987                 return;
 988
 989         frm = (uint8_t *)(wh + 1);
 990         efrm = mtod(m, uint8_t *) + m->m_len;
 991
 992         frm += 12;      /* skip tstamp, bintval and capinfo fields */
 993         while (frm < efrm) {
 994                 if (*frm == IEEE80211_ELEMID_DSPARMS)
 995 #if IEEE80211_CHAN_MAX < 255
 996                 if (frm[2] <= IEEE80211_CHAN_MAX)
 997 #endif
 998                         ic->ic_curchan = &ic->ic_channels[frm[2]];
 999
1000                 frm += frm[1] + 2;
1001         }
1002 }
1003
1004 static void
1005 ipw_data_intr(struct ipw_softc *sc, struct ipw_status *status,
1006     struct ipw_soft_bd *sbd, struct ipw_soft_buf *sbuf)
1007 {
1008         struct ieee80211com *ic = &sc->sc_ic;
1009         struct ifnet *ifp = &ic->ic_if;
1010         struct mbuf *mnew, *m;
1011         struct ieee80211_frame *wh;
1012         struct ieee80211_node *ni;
1013         bus_addr_t physaddr;
1014         int error;
1015
1016         DPRINTFN(5, ("RX!DATA!%u!%u\n", le32toh(status->len), status->rssi));
1017
1018         if (le32toh(status->len) < sizeof (struct ieee80211_frame_min) ||
1019             le32toh(status->len) > MCLBYTES) {
1020                 if_printf(ifp, "bad frame length\n");
1021                 return;
1022         }
1023
1024         /*
1025          * Try to allocate a new mbuf for this ring element and load it before
1026          * processing the current mbuf. If the ring element cannot be loaded,
1027          * drop the received packet and reuse the old mbuf. In the unlikely
1028          * case that the old mbuf can't be reloaded either, explicitly panic.
1029          */
1030         mnew = m_getcl(MB_DONTWAIT, MT_DATA, M_PKTHDR);
1031         if (mnew == NULL) {
1032                 ifp->if_ierrors++;
1033                 return;
1034         }
1035
1036         bus_dmamap_sync(sc->rxbuf_dmat, sbuf->map, BUS_DMASYNC_POSTREAD);
1037         bus_dmamap_unload(sc->rxbuf_dmat, sbuf->map);
1038
1039         error = bus_dmamap_load(sc->rxbuf_dmat, sbuf->map, mtod(mnew, void *),
1040             MCLBYTES, ipw_dma_map_addr, &physaddr, 0);
1041         if (error != 0) {
1042                 m_freem(mnew);
1043
1044                 /* try to reload the old mbuf */
1045                 error = bus_dmamap_load(sc->rxbuf_dmat, sbuf->map,
1046                     mtod(sbuf->m, void *), MCLBYTES, ipw_dma_map_addr,
1047                     &physaddr, 0);
1048                 if (error != 0) /* XXX very unlikely that it will fail... */
1049                         panic("%s: could not load old rx mbuf", ifp->if_xname);
1050                 ifp->if_ierrors++;
1051                 return;
1052         }
1053
1054         /*
1055          * New mbuf successfully loaded, update Rx ring and continue
1056          * processing.
1057          */
1058         m = sbuf->m;
1059         sbuf->m = mnew;
1060         sbd->bd->physaddr = htole32(physaddr);
1061
1062         /* finalize mbuf */
1063         m->m_pkthdr.rcvif = ifp;
1064         m->m_pkthdr.len = m->m_len = le32toh(status->len);
1065
1066         if (sc->sc_drvbpf != NULL) {
1067                 struct ipw_rx_radiotap_header *tap = &sc->sc_rxtap;
1068
1069                 tap->wr_flags = 0;
1070                 tap->wr_antsignal = status->rssi;
1071                 tap->wr_chan_freq = htole16(ic->ic_ibss_chan->ic_freq);
1072                 tap->wr_chan_flags = htole16(ic->ic_ibss_chan->ic_flags);
1073
1074                 bpf_ptap(sc->sc_drvbpf, m, tap, sc->sc_rxtap_len);
1075         }
1076
1077         if (ic->ic_state == IEEE80211_S_SCAN)
1078                 ipw_fix_channel(ic, m);
1079
1080         wh = mtod(m, struct ieee80211_frame *);
1081         ni = ieee80211_find_rxnode(ic, (struct ieee80211_frame_min *)wh);
1082
1083         /* send the frame to the 802.11 layer */
1084         ieee80211_input(ic, m, ni, status->rssi, 0);
1085
1086         /* node is no longer needed */
1087         ieee80211_free_node(ni);
1088
1089         bus_dmamap_sync(sc->rbd_dmat, sc->rbd_map, BUS_DMASYNC_PREWRITE);
1090 }
1091
1092 static void
1093 ipw_notification_intr(struct ipw_softc *sc __unused, struct ipw_soft_buf *sbuf __unused)
1094 {
1095         DPRINTFN(2, ("RX!NOTIFICATION\n"));
1096 }
1097
1098 static void
1099 ipw_rx_intr(struct ipw_softc *sc)
1100 {
1101         struct ipw_status *status;
1102         struct ipw_soft_bd *sbd;
1103         struct ipw_soft_buf *sbuf;
1104         u_int32_t r, i;
1105
1106         if (!(sc->flags & IPW_FLAG_FW_INITED))
1107                 return;
1108
1109         r = CSR_READ_4(sc, IPW_CSR_RX_READ_INDEX);
1110
1111         bus_dmamap_sync(sc->status_dmat, sc->status_map, BUS_DMASYNC_POSTREAD);
1112
1113         for (i = (sc->rxcur + 1) % IPW_NRBD; i != r; i = (i + 1) % IPW_NRBD) {
1114
1115                 status = &sc->status_list[i];
1116                 sbd = &sc->srbd_list[i];
1117                 sbuf = sbd->priv;
1118
1119                 switch (le16toh(status->code) & 0xf) {
1120                 case IPW_STATUS_CODE_COMMAND:
1121                         ipw_command_intr(sc, sbuf);
1122                         break;
1123
1124                 case IPW_STATUS_CODE_NEWSTATE:
1125                         ipw_newstate_intr(sc, sbuf);
1126                         break;
1127
1128                 case IPW_STATUS_CODE_DATA_802_3:
1129                 case IPW_STATUS_CODE_DATA_802_11:
1130                         ipw_data_intr(sc, status, sbd, sbuf);
1131                         break;
1132
1133                 case IPW_STATUS_CODE_NOTIFICATION:
1134                         ipw_notification_intr(sc, sbuf);
1135                         break;
1136
1137                 default:
1138                         if_printf(&sc->sc_ic.ic_if, "unknown status code %u\n",
1139                                   le16toh(status->code));
1140                 }
1141
1142                 /* firmware was killed, stop processing received frames */
1143                 if (!(sc->flags & IPW_FLAG_FW_INITED))
1144                         return;
1145
1146                 sbd->bd->flags = 0;
1147         }
1148         /* Some buffer descriptors may have changed */
1149         bus_dmamap_sync(sc->rbd_dmat, sc->rbd_map, BUS_DMASYNC_PREWRITE);
1150
1151         /* Tell the firmware what we have processed */
1152         sc->rxcur = (r == 0) ? IPW_NRBD - 1 : r - 1;
1153         CSR_WRITE_4(sc, IPW_CSR_RX_WRITE_INDEX, sc->rxcur);
1154 }
1155
1156 static void
1157 ipw_release_sbd(struct ipw_softc *sc, struct ipw_soft_bd *sbd)
1158 {
1159         struct ipw_soft_hdr *shdr;
1160         struct ipw_soft_buf *sbuf;
1161
1162         switch (sbd->type) {
1163         case IPW_SBD_TYPE_COMMAND:
1164                 bus_dmamap_sync(sc->cmd_dmat, sc->cmd_map,
1165                     BUS_DMASYNC_POSTWRITE);
1166                 bus_dmamap_unload(sc->cmd_dmat, sc->cmd_map);
1167                 break;
1168
1169         case IPW_SBD_TYPE_HEADER:
1170                 shdr = sbd->priv;
1171                 bus_dmamap_sync(sc->hdr_dmat, shdr->map, BUS_DMASYNC_POSTWRITE);
1172                 bus_dmamap_unload(sc->hdr_dmat, shdr->map);
1173                 SLIST_INSERT_HEAD(&sc->free_shdr, shdr, next);
1174                 break;
1175
1176         case IPW_SBD_TYPE_DATA:
1177                 sbuf = sbd->priv;
1178                 bus_dmamap_sync(sc->txbuf_dmat, sbuf->map,
1179                     BUS_DMASYNC_POSTWRITE);
1180                 bus_dmamap_unload(sc->txbuf_dmat, sbuf->map);
1181                 SLIST_INSERT_HEAD(&sc->free_sbuf, sbuf, next);
1182
1183                 m_freem(sbuf->m);
1184                 ieee80211_free_node(sbuf->ni);
1185
1186                 /* kill watchdog timer */
1187                 sc->sc_tx_timer = 0;
1188                 break;
1189         }
1190         sbd->type = IPW_SBD_TYPE_NOASSOC;
1191 }
1192
1193 static void
1194 ipw_tx_intr(struct ipw_softc *sc)
1195 {
1196         struct ifnet *ifp = &sc->sc_ic.ic_if;
1197         u_int32_t r, i;
1198
1199         if (!(sc->flags & IPW_FLAG_FW_INITED))
1200                 return;
1201
1202         r = CSR_READ_4(sc, IPW_CSR_TX_READ_INDEX);
1203
1204         for (i = (sc->txold + 1) % IPW_NTBD; i != r; i = (i + 1) % IPW_NTBD) {
1205                 struct ipw_soft_bd *sbd;
1206
1207                 sbd = &sc->stbd_list[i];
1208                 if (sbd->type == IPW_SBD_TYPE_DATA)
1209                         ifp->if_opackets++;
1210
1211                 ipw_release_sbd(sc, sbd);
1212                 sc->txfree++;
1213         }
1214
1215         /* Remember what the firmware has processed */
1216         sc->txold = (r == 0) ? IPW_NTBD - 1 : r - 1;
1217
1218         /* Call start() since some buffer descriptors have been released */
1219         ifp->if_flags &= ~IFF_OACTIVE;
1220         (*ifp->if_start)(ifp);
1221 }
1222
1223 static void
1224 ipw_intr(void *arg)
1225 {
1226         struct ipw_softc *sc = arg;
1227         u_int32_t r;
1228
1229         if ((r = CSR_READ_4(sc, IPW_CSR_INTR)) == 0 || r == 0xffffffff)
1230                 return;
1231
1232         /* Disable interrupts */
1233         CSR_WRITE_4(sc, IPW_CSR_INTR_MASK, 0);
1234
1235         DPRINTFN(8, ("INTR!0x%08x\n", r));
1236
1237         if (r & (IPW_INTR_FATAL_ERROR | IPW_INTR_PARITY_ERROR)) {
1238                 if_printf(&sc->sc_ic.ic_if, "fatal error\n");
1239                 sc->sc_ic.ic_if.if_flags &= ~IFF_UP;
1240                 ipw_stop(sc);
1241         }
1242
1243         if (r & IPW_INTR_FW_INIT_DONE) {
1244                 if (!(r & (IPW_INTR_FATAL_ERROR | IPW_INTR_PARITY_ERROR)))
1245                         wakeup(sc);
1246         }
1247
1248         if (r & IPW_INTR_RX_TRANSFER)
1249                 ipw_rx_intr(sc);
1250
1251         if (r & IPW_INTR_TX_TRANSFER)
1252                 ipw_tx_intr(sc);
1253
1254         /* Acknowledge interrupts */
1255         CSR_WRITE_4(sc, IPW_CSR_INTR, r);
1256
1257         /* Re-enable interrupts */
1258         CSR_WRITE_4(sc, IPW_CSR_INTR_MASK, IPW_INTR_MASK);
1259 }
1260
1261 static void
1262 ipw_dma_map_txbuf(void *arg, bus_dma_segment_t *segs, int nseg,
1263     bus_size_t mapsize, int error)
1264 {
1265         struct ipw_dma_mapping *map = arg;
1266
1267         if (error != 0)
1268                 return;
1269
1270         KASSERT(nseg <= IPW_MAX_NSEG, ("too many DMA segments %d", nseg));
1271
1272         bcopy(segs, map->segs, nseg * sizeof (bus_dma_segment_t));
1273         map->nseg = nseg;
1274         map->mapsize = mapsize;
1275 }
1276
1277 static void
1278 ipw_dma_map_addr(void *arg, bus_dma_segment_t *segs, int nseg __unused, int error)
1279 {
1280         if (error != 0)
1281                 return;
1282
1283         KASSERT(nseg == 1, ("too many DMA segments, %d should be 1", nseg));
1284
1285         *(bus_addr_t *)arg = segs[0].ds_addr;
1286 }
1287
1288 static int
1289 ipw_cmd(struct ipw_softc *sc, u_int32_t type, void *data, u_int32_t len)
1290 {
1291         struct ifnet *ifp = &sc->sc_ic.ic_if;
1292         struct ipw_soft_bd *sbd;
1293         bus_addr_t physaddr;
1294         int error;
1295
1296         sbd = &sc->stbd_list[sc->txcur];
1297
1298         error = bus_dmamap_load(sc->cmd_dmat, sc->cmd_map, &sc->cmd,
1299             sizeof (struct ipw_cmd), ipw_dma_map_addr, &physaddr, 0);
1300         if (error != 0) {
1301                 if_printf(&sc->sc_ic.ic_if,
1302                           "could not map command DMA memory\n");
1303                 return error;
1304         }
1305
1306         sc->cmd.type = htole32(type);
1307         sc->cmd.subtype = htole32(0);
1308         sc->cmd.len = htole32(len);
1309         sc->cmd.seq = htole32(0);
1310         if (data != NULL)
1311                 bcopy(data, sc->cmd.data, len);
1312
1313         sbd->type = IPW_SBD_TYPE_COMMAND;
1314         sbd->bd->physaddr = htole32(physaddr);
1315         sbd->bd->len = htole32(sizeof (struct ipw_cmd));
1316         sbd->bd->nfrag = 1;
1317         sbd->bd->flags = IPW_BD_FLAG_TX_FRAME_COMMAND |
1318                          IPW_BD_FLAG_TX_LAST_FRAGMENT;
1319
1320         bus_dmamap_sync(sc->cmd_dmat, sc->cmd_map, BUS_DMASYNC_PREWRITE);
1321         bus_dmamap_sync(sc->tbd_dmat, sc->tbd_map, BUS_DMASYNC_PREWRITE);
1322
1323         /* kick firmware */
1324         sc->txcur = (sc->txcur + 1) % IPW_NTBD;
1325         sc->txfree--;
1326         CSR_WRITE_4(sc, IPW_CSR_TX_WRITE_INDEX, sc->txcur);
1327
1328         /*
1329          * This is kinda messy.  Since we may be MP, a combination of
1330          * a critical section for a local cpu interrupt and
1331          * tsleep_interlock() for a remote cpu interrupt is required to
1332          * avoid command completion racing the tsleep.
1333          */
1334         crit_enter();
1335         tsleep_interlock(sc);
1336         CSR_WRITE_4(sc, IPW_CSR_TX_WRITE_INDEX, sc->txcur);
1337         lwkt_serialize_exit(ifp->if_serializer);
1338         error = tsleep(sc, 0, "ipwcmd", hz);
1339         crit_exit();
1340         lwkt_serialize_enter(ifp->if_serializer);
1341         return (error);
1342 }
1343
1344 static int
1345 ipw_tx_start(struct ifnet *ifp, struct mbuf *m0, struct ieee80211_node *ni)
1346 {
1347         struct ipw_softc *sc = ifp->if_softc;
1348         struct ieee80211com *ic = &sc->sc_ic;
1349         struct ieee80211_frame *wh;
1350         struct ipw_dma_mapping map;
1351         struct ipw_soft_bd *sbd;
1352         struct ipw_soft_hdr *shdr;
1353         struct ipw_soft_buf *sbuf;
1354         struct mbuf *mnew;
1355         bus_addr_t physaddr;
1356         int error, i;
1357
1358         wh = mtod(m0, struct ieee80211_frame *);
1359         if (wh->i_fc[1] & IEEE80211_FC1_WEP) {
1360                 if (ieee80211_crypto_encap(ic, ni, m0) == NULL) {
1361                         m_freem(m0);
1362                         return ENOBUFS;
1363                 }
1364
1365                 /* packet header may have moved, reset our local pointer */
1366                 wh = mtod(m0, struct ieee80211_frame *);
1367         }
1368
1369         if (sc->sc_drvbpf != NULL) {
1370                 struct ipw_tx_radiotap_header *tap = &sc->sc_txtap;
1371
1372                 tap->wt_flags = 0;
1373                 tap->wt_chan_freq = htole16(ic->ic_ibss_chan->ic_freq);
1374                 tap->wt_chan_flags = htole16(ic->ic_ibss_chan->ic_flags);
1375
1376                 bpf_ptap(sc->sc_drvbpf, m0, tap, sc->sc_txtap_len);
1377         }
1378
1379         shdr = SLIST_FIRST(&sc->free_shdr);
1380         sbuf = SLIST_FIRST(&sc->free_sbuf);
1381         KASSERT(shdr != NULL && sbuf != NULL, ("empty sw hdr/buf pool"));
1382
1383         shdr->hdr.type = htole32(IPW_HDR_TYPE_SEND);
1384         shdr->hdr.subtype = htole32(0);
1385         shdr->hdr.encrypted = (wh->i_fc[1] & IEEE80211_FC1_WEP) ? 1 : 0;
1386         shdr->hdr.encrypt = 0;
1387         shdr->hdr.keyidx = 0;
1388         shdr->hdr.keysz = 0;
1389         shdr->hdr.fragmentsz = htole16(0);
1390         IEEE80211_ADDR_COPY(shdr->hdr.src_addr, wh->i_addr2);
1391         if (ic->ic_opmode == IEEE80211_M_STA)
1392                 IEEE80211_ADDR_COPY(shdr->hdr.dst_addr, wh->i_addr3);
1393         else
1394                 IEEE80211_ADDR_COPY(shdr->hdr.dst_addr, wh->i_addr1);
1395
1396         /* trim IEEE802.11 header */
1397         m_adj(m0, sizeof (struct ieee80211_frame));
1398
1399         error = bus_dmamap_load_mbuf(sc->txbuf_dmat, sbuf->map, m0,
1400             ipw_dma_map_txbuf, &map, 0);
1401         if (error != 0 && error != EFBIG) {
1402                 if_printf(ifp, "could not map mbuf (error %d)\n", error);
1403                 m_freem(m0);
1404                 return error;
1405         }
1406         if (error != 0) {
1407                 mnew = m_defrag(m0, MB_DONTWAIT);
1408                 if (mnew == NULL) {
1409                         if_printf(ifp, "could not defragment mbuf\n");
1410                         m_freem(m0);
1411                         return ENOBUFS;
1412                 }
1413                 m0 = mnew;
1414
1415                 error = bus_dmamap_load_mbuf(sc->txbuf_dmat, sbuf->map, m0,
1416                     ipw_dma_map_txbuf, &map, 0);
1417                 if (error != 0) {
1418                         if_printf(ifp,
1419                                   "could not map mbuf (error %d)\n", error);
1420                         m_freem(m0);
1421                         return error;
1422                 }
1423         }
1424
1425         error = bus_dmamap_load(sc->hdr_dmat, shdr->map, &shdr->hdr,
1426             sizeof (struct ipw_hdr), ipw_dma_map_addr, &physaddr, 0);
1427         if (error != 0) {
1428                 if_printf(ifp, "could not map header DMA memory\n");
1429                 bus_dmamap_unload(sc->txbuf_dmat, sbuf->map);
1430                 m_freem(m0);
1431                 return error;
1432         }
1433
1434         SLIST_REMOVE_HEAD(&sc->free_sbuf, next);
1435         SLIST_REMOVE_HEAD(&sc->free_shdr, next);
1436
1437         sbd = &sc->stbd_list[sc->txcur];
1438         sbd->type = IPW_SBD_TYPE_HEADER;
1439         sbd->priv = shdr;
1440         sbd->bd->physaddr = htole32(physaddr);
1441         sbd->bd->len = htole32(sizeof (struct ipw_hdr));
1442         sbd->bd->nfrag = 1 + map.nseg;
1443         sbd->bd->flags = IPW_BD_FLAG_TX_FRAME_802_3 |
1444                          IPW_BD_FLAG_TX_NOT_LAST_FRAGMENT;
1445
1446         DPRINTFN(5, ("TX!HDR!%u!%u!%u!%u!%6D!%6D\n", shdr->hdr.type,
1447             shdr->hdr.subtype, shdr->hdr.encrypted, shdr->hdr.encrypt,
1448             shdr->hdr.src_addr, ":", shdr->hdr.dst_addr, ":"));
1449         sc->txcur = (sc->txcur + 1) % IPW_NTBD;
1450         sc->txfree--;
1451
1452         sbuf->m = m0;
1453         sbuf->ni = ni;
1454
1455         for (i = 0; i < map.nseg; i++) {
1456                 sbd = &sc->stbd_list[sc->txcur];
1457
1458                 sbd->bd->physaddr = htole32(map.segs[i].ds_addr);
1459                 sbd->bd->len = htole32(map.segs[i].ds_len);
1460                 sbd->bd->nfrag = 0; /* used only in first bd */
1461                 sbd->bd->flags = IPW_BD_FLAG_TX_FRAME_802_3;
1462                 if (i == map.nseg - 1) {
1463                         sbd->type = IPW_SBD_TYPE_DATA;
1464                         sbd->priv = sbuf;
1465                         sbd->bd->flags |= IPW_BD_FLAG_TX_LAST_FRAGMENT;
1466                 } else {
1467                         sbd->type = IPW_SBD_TYPE_NOASSOC;
1468                         sbd->bd->flags |= IPW_BD_FLAG_TX_NOT_LAST_FRAGMENT;
1469                 }
1470
1471                 DPRINTFN(5, ("TX!FRAG!%d!%d\n", i, map.segs[i].ds_len));
1472                 sc->txcur = (sc->txcur + 1) % IPW_NTBD;
1473                 sc->txfree--;
1474         }
1475
1476         bus_dmamap_sync(sc->hdr_dmat, shdr->map, BUS_DMASYNC_PREWRITE);
1477         bus_dmamap_sync(sc->txbuf_dmat, sbuf->map, BUS_DMASYNC_PREWRITE);
1478         bus_dmamap_sync(sc->tbd_dmat, sc->tbd_map, BUS_DMASYNC_PREWRITE);
1479
1480         /* Inform firmware about this new packet */
1481         CSR_WRITE_4(sc, IPW_CSR_TX_WRITE_INDEX, sc->txcur);
1482
1483         return 0;
1484 }
1485
1486 static void
1487 ipw_start(struct ifnet *ifp)
1488 {
1489         struct ipw_softc *sc = ifp->if_softc;
1490         struct ieee80211com *ic = &sc->sc_ic;
1491         struct mbuf *m0;
1492         struct ieee80211_node *ni;
1493
1494         if (ic->ic_state != IEEE80211_S_RUN) {
1495                 return;
1496         }
1497
1498         for (;;) {
1499                 struct ether_header *eh;
1500
1501                 m0 = ifq_poll(&ifp->if_snd);
1502                 if (m0 == NULL)
1503                         break;
1504                 if (sc->txfree < 1 + IPW_MAX_NSEG) {
1505                         ifp->if_flags |= IFF_OACTIVE;
1506                         break;
1507                 }
1508                 ifq_dequeue(&ifp->if_snd, m0);
1509
1510                 if (m0->m_len < sizeof (struct ether_header) &&
1511                     (m0 = m_pullup(m0, sizeof (struct ether_header))) == NULL)
1512                         continue;
1513
1514                 eh = mtod(m0, struct ether_header *);
1515                 ni = ieee80211_find_txnode(ic, eh->ether_dhost);
1516                 if (ni == NULL) {
1517                         m_freem(m0);
1518                         continue;
1519                 }
1520
1521                 BPF_MTAP(ifp, m0);
1522
1523                 m0 = ieee80211_encap(ic, m0, ni);
1524                 if (m0 == NULL) {
1525                         ieee80211_free_node(ni);
1526                         continue;
1527                 }
1528
1529                 if (ic->ic_rawbpf != NULL)
1530                         bpf_mtap(ic->ic_rawbpf, m0);
1531
1532                 if (ipw_tx_start(ifp, m0, ni) != 0) {
1533                         ieee80211_free_node(ni);
1534                         ifp->if_oerrors++;
1535                         break;
1536                 }
1537
1538                 /* start watchdog timer */
1539                 sc->sc_tx_timer = 5;
1540                 ifp->if_timer = 1;
1541         }
1542 }
1543
1544 static void
1545 ipw_watchdog(struct ifnet *ifp)
1546 {
1547         struct ipw_softc *sc = ifp->if_softc;
1548
1549         ifp->if_timer = 0;
1550
1551         if (sc->sc_tx_timer > 0) {
1552                 if (--sc->sc_tx_timer == 0) {
1553                         if_printf(ifp, "device timeout\n");
1554                         ifp->if_oerrors++;
1555                         ifp->if_flags &= ~IFF_UP;
1556                         ipw_stop(sc);
1557                         return;
1558                 }
1559                 ifp->if_timer = 1;
1560         }
1561
1562         ieee80211_watchdog(&sc->sc_ic);
1563 }
1564
1565 static int
1566 ipw_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data, struct ucred *cr)
1567 {
1568         struct ipw_softc *sc = ifp->if_softc;
1569         struct ieee80211com *ic = &sc->sc_ic;
1570         struct ifreq *ifr;
1571         int error = 0;
1572
1573         switch (cmd) {
1574         case SIOCSIFFLAGS:
1575                 if (ifp->if_flags & IFF_UP) {
1576                         if (!(ifp->if_flags & IFF_RUNNING))
1577                                 ipw_init(sc);
1578                 } else {
1579                         if (ifp->if_flags & IFF_RUNNING)
1580                                 ipw_stop(sc);
1581                 }
1582                 break;
1583
1584         case SIOCSLOADFW:
1585                 /* only super-user can do that! */
1586                 if ((error = suser(curthread)) != 0)
1587                         break;
1588
1589                 ifr = (struct ifreq *)data;
1590                 error = ipw_cache_firmware(sc, ifr->ifr_data);
1591                 break;
1592
1593         case SIOCSKILLFW:
1594                 /* only super-user can do that! */
1595                 if ((error = suser(curthread)) != 0)
1596                         break;
1597
1598                 ifp->if_flags &= ~IFF_UP;
1599                 ipw_stop(sc);
1600                 ipw_free_firmware(sc);
1601                 break;
1602
1603         default:
1604                 error = ieee80211_ioctl(ic, cmd, data, cr);
1605         }
1606
1607         if (error == ENETRESET) {
1608                 if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) ==
1609                     (IFF_UP | IFF_RUNNING))
1610                         ipw_init(sc);
1611                 error = 0;
1612         }
1613
1614         return error;
1615 }
1616
1617 static void
1618 ipw_stop_master(struct ipw_softc *sc)
1619 {
1620         int ntries;
1621
1622         /* Disable interrupts */
1623         CSR_WRITE_4(sc, IPW_CSR_INTR_MASK, 0);
1624
1625         CSR_WRITE_4(sc, IPW_CSR_RST, IPW_RST_STOP_MASTER);
1626         for (ntries = 0; ntries < 50; ntries++) {
1627                 if (CSR_READ_4(sc, IPW_CSR_RST) & IPW_RST_MASTER_DISABLED)
1628                         break;
1629                 DELAY(10);
1630         }
1631         if (ntries == 50)
1632                 if_printf(&sc->sc_ic.ic_if, "timeout waiting for master\n");
1633
1634         CSR_WRITE_4(sc, IPW_CSR_RST, CSR_READ_4(sc, IPW_CSR_RST) |
1635             IPW_RST_PRINCETON_RESET);
1636
1637         sc->flags &= ~IPW_FLAG_FW_INITED;
1638 }
1639
1640 static int
1641 ipw_reset(struct ipw_softc *sc)
1642 {
1643         int ntries;
1644
1645         ipw_stop_master(sc);
1646
1647         /* Move adapter to D0 state */
1648         CSR_WRITE_4(sc, IPW_CSR_CTL, CSR_READ_4(sc, IPW_CSR_CTL) |
1649             IPW_CTL_INIT);
1650
1651         /* Wait for clock stabilization */
1652         for (ntries = 0; ntries < 1000; ntries++) {
1653                 if (CSR_READ_4(sc, IPW_CSR_CTL) & IPW_CTL_CLOCK_READY)
1654                         break;
1655                 DELAY(200);
1656         }
1657         if (ntries == 1000)
1658                 return EIO;
1659
1660         CSR_WRITE_4(sc, IPW_CSR_RST, CSR_READ_4(sc, IPW_CSR_RST) |
1661             IPW_RST_SW_RESET);
1662
1663         DELAY(10);
1664
1665         CSR_WRITE_4(sc, IPW_CSR_CTL, CSR_READ_4(sc, IPW_CSR_CTL) |
1666             IPW_CTL_INIT);
1667
1668         return 0;
1669 }
1670
1671 static int
1672 ipw_load_ucode(struct ipw_softc *sc, u_char *uc, int size)
1673 {
1674         int ntries;
1675
1676         MEM_WRITE_4(sc, 0x3000e0, 0x80000000);
1677         CSR_WRITE_4(sc, IPW_CSR_RST, 0);
1678
1679         MEM_WRITE_2(sc, 0x220000, 0x0703);
1680         MEM_WRITE_2(sc, 0x220000, 0x0707);
1681
1682         MEM_WRITE_1(sc, 0x210014, 0x72);
1683         MEM_WRITE_1(sc, 0x210014, 0x72);
1684
1685         MEM_WRITE_1(sc, 0x210000, 0x40);
1686         MEM_WRITE_1(sc, 0x210000, 0x00);
1687         MEM_WRITE_1(sc, 0x210000, 0x40);
1688
1689         MEM_WRITE_MULTI_1(sc, 0x210010, uc, size);
1690
1691         MEM_WRITE_1(sc, 0x210000, 0x00);
1692         MEM_WRITE_1(sc, 0x210000, 0x00);
1693         MEM_WRITE_1(sc, 0x210000, 0x80);
1694
1695         MEM_WRITE_2(sc, 0x220000, 0x0703);
1696         MEM_WRITE_2(sc, 0x220000, 0x0707);
1697
1698         MEM_WRITE_1(sc, 0x210014, 0x72);
1699         MEM_WRITE_1(sc, 0x210014, 0x72);
1700
1701         MEM_WRITE_1(sc, 0x210000, 0x00);
1702         MEM_WRITE_1(sc, 0x210000, 0x80);
1703
1704         for (ntries = 0; ntries < 100; ntries++) {
1705                 if (MEM_READ_1(sc, 0x210000) & 1)
1706                         break;
1707                 DELAY(1000);
1708         }
1709         if (ntries == 100) {
1710                 if_printf(&sc->sc_ic.ic_if,
1711                           "timeout waiting for ucode to initialize\n");
1712                 return EIO;
1713         }
1714
1715         MEM_WRITE_4(sc, 0x3000e0, 0);
1716
1717         return 0;
1718 }
1719
1720 /* set of macros to handle unaligned little endian data in firmware image */
1721 #define GETLE32(p) ((p)[0] | (p)[1] << 8 | (p)[2] << 16 | (p)[3] << 24)
1722 #define GETLE16(p) ((p)[0] | (p)[1] << 8)
1723 static int
1724 ipw_load_firmware(struct ipw_softc *sc, u_char *fw, int size)
1725 {
1726         struct ifnet *ifp = &sc->sc_ic.ic_if;
1727         u_char *p, *end;
1728         u_int32_t dst;
1729         u_int16_t len;
1730         int error;
1731
1732         p = fw;
1733         end = fw + size;
1734         while (p < end) {
1735                 if (p + 6 > end)
1736                         return EINVAL;
1737
1738                 dst = GETLE32(p); p += 4;
1739                 len = GETLE16(p); p += 2;
1740
1741                 if (p + len > end)
1742                         return EINVAL;
1743
1744                 ipw_write_mem_1(sc, dst, p, len);
1745                 p += len;
1746         }
1747
1748         CSR_WRITE_4(sc, IPW_CSR_IO, IPW_IO_GPIO1_ENABLE | IPW_IO_GPIO3_MASK |
1749             IPW_IO_LED_OFF);
1750
1751         /* Allow interrupts so we know when the firmware is inited */
1752         CSR_WRITE_4(sc, IPW_CSR_INTR_MASK, IPW_INTR_MASK);
1753
1754         /*
1755          * Tell the adapter to initialize the firmware.
1756          *
1757          * This is kinda messy.  Since we may be MP, a combination of
1758          * a critical section for a local cpu interrupt and
1759          * tsleep_interlock() for a remote cpu interrupt is required to
1760          * avoid command completion racing the tsleep.
1761          */
1762         crit_enter();
1763         CSR_WRITE_4(sc, IPW_CSR_RST, 0);
1764         CSR_WRITE_4(sc, IPW_CSR_CTL, CSR_READ_4(sc, IPW_CSR_CTL) |
1765             IPW_CTL_ALLOW_STANDBY);
1766
1767         tsleep_interlock(sc);
1768         lwkt_serialize_exit(ifp->if_serializer);
1769         error = tsleep(sc, 0, "ipwinit", hz);
1770         crit_exit();
1771         lwkt_serialize_enter(ifp->if_serializer);
1772         if (error) {
1773                 if_printf(&sc->sc_ic.ic_if, "timeout waiting for firmware "
1774                     "initialization to complete\n");
1775                 return error;
1776         }
1777
1778         CSR_WRITE_4(sc, IPW_CSR_IO, CSR_READ_4(sc, IPW_CSR_IO) |
1779             IPW_IO_GPIO1_MASK | IPW_IO_GPIO3_MASK);
1780
1781         return 0;
1782 }
1783
1784 /*
1785  * Store firmware into kernel memory so we can download it when we need to,
1786  * e.g when the adapter wakes up from suspend mode.
1787  */
1788 static int
1789 ipw_cache_firmware(struct ipw_softc *sc, void *data)
1790 {
1791         struct ipw_firmware *fw = &sc->fw;
1792         struct ipw_firmware_hdr hdr;
1793         u_char *p = data;
1794         int error;
1795
1796         ipw_free_firmware(sc);
1797
1798         /*
1799          * mutex(9): no mutexes should be held across functions which access
1800          * memory in userspace, such as copyin(9) [...]
1801          */
1802
1803         if ((error = copyin(data, &hdr, sizeof hdr)) != 0)
1804                 goto fail1;
1805
1806         fw->main_size  = le32toh(hdr.main_size);
1807         fw->ucode_size = le32toh(hdr.ucode_size);
1808         p += sizeof hdr;
1809
1810         fw->main = malloc(fw->main_size, M_DEVBUF, M_WAITOK);
1811         if (fw->main == NULL) {
1812                 error = ENOMEM;
1813                 goto fail1;
1814         }
1815
1816         fw->ucode = malloc(fw->ucode_size, M_DEVBUF, M_WAITOK);
1817         if (fw->ucode == NULL) {
1818                 error = ENOMEM;
1819                 goto fail2;
1820         }
1821
1822         if ((error = copyin(p, fw->main, fw->main_size)) != 0)
1823                 goto fail3;
1824
1825         p += fw->main_size;
1826         if ((error = copyin(p, fw->ucode, fw->ucode_size)) != 0)
1827                 goto fail3;
1828
1829         DPRINTF(("Firmware cached: main %u, ucode %u\n", fw->main_size,
1830             fw->ucode_size));
1831
1832         sc->flags |= IPW_FLAG_FW_CACHED;
1833
1834         return 0;
1835
1836 fail3:  free(fw->ucode, M_DEVBUF);
1837 fail2:  free(fw->main, M_DEVBUF);
1838 fail1:
1839
1840         return error;
1841 }
1842
1843 static void
1844 ipw_free_firmware(struct ipw_softc *sc)
1845 {
1846         if (!(sc->flags & IPW_FLAG_FW_CACHED))
1847                 return;
1848
1849         free(sc->fw.main, M_DEVBUF);
1850         free(sc->fw.ucode, M_DEVBUF);
1851
1852         sc->flags &= ~IPW_FLAG_FW_CACHED;
1853 }
1854
1855 static int
1856 ipw_config(struct ipw_softc *sc)
1857 {
1858         struct ieee80211com *ic = &sc->sc_ic;
1859         struct ifnet *ifp = &ic->ic_if;
1860         struct ipw_security security;
1861         struct ieee80211_key *k;
1862         struct ipw_wep_key wepkey;
1863         struct ipw_scan_options options;
1864         struct ipw_configuration config;
1865         u_int32_t data;
1866         int error, i;
1867
1868         switch (ic->ic_opmode) {
1869         case IEEE80211_M_STA:
1870         case IEEE80211_M_HOSTAP:
1871                 data = htole32(IPW_MODE_BSS);
1872                 break;
1873
1874         case IEEE80211_M_IBSS:
1875         case IEEE80211_M_AHDEMO:
1876                 data = htole32(IPW_MODE_IBSS);
1877                 break;
1878
1879         case IEEE80211_M_MONITOR:
1880                 data = htole32(IPW_MODE_MONITOR);
1881                 break;
1882         }
1883         DPRINTF(("Setting mode to %u\n", le32toh(data)));
1884         error = ipw_cmd(sc, IPW_CMD_SET_MODE, &data, sizeof data);
1885         if (error != 0)
1886                 return error;
1887
1888         if (ic->ic_opmode == IEEE80211_M_IBSS ||
1889             ic->ic_opmode == IEEE80211_M_MONITOR) {
1890                 data = htole32(ieee80211_chan2ieee(ic, ic->ic_ibss_chan));
1891                 DPRINTF(("Setting channel to %u\n", le32toh(data)));
1892                 error = ipw_cmd(sc, IPW_CMD_SET_CHANNEL, &data, sizeof data);
1893                 if (error != 0)
1894                         return error;
1895         }
1896
1897         if (ic->ic_opmode == IEEE80211_M_MONITOR) {
1898                 DPRINTF(("Enabling adapter\n"));
1899                 return ipw_cmd(sc, IPW_CMD_ENABLE, NULL, 0);
1900         }
1901
1902         IEEE80211_ADDR_COPY(((struct arpcom *)ifp)->ac_enaddr, ic->ic_myaddr);
1903         IEEE80211_ADDR_COPY(IF_LLADDR(ifp), ic->ic_myaddr);
1904         DPRINTF(("Setting MAC address to %6D\n", ic->ic_myaddr, ":"));
1905         error = ipw_cmd(sc, IPW_CMD_SET_MAC_ADDRESS, ic->ic_myaddr,
1906             IEEE80211_ADDR_LEN);
1907         if (error != 0)
1908                 return error;
1909
1910         config.flags = htole32(IPW_CFG_BSS_MASK | IPW_CFG_IBSS_MASK |
1911             IPW_CFG_PREAMBLE_AUTO | IPW_CFG_802_1x_ENABLE);
1912         if (ic->ic_opmode == IEEE80211_M_IBSS)
1913                 config.flags |= htole32(IPW_CFG_IBSS_AUTO_START);
1914         if (ifp->if_flags & IFF_PROMISC)
1915                 config.flags |= htole32(IPW_CFG_PROMISCUOUS);
1916         config.bss_chan = htole32(0x3fff); /* channels 1-14 */
1917         config.ibss_chan = htole32(0x7ff); /* channels 1-11 */
1918         DPRINTF(("Setting configuration to 0x%x\n", le32toh(config.flags)));
1919         error = ipw_cmd(sc, IPW_CMD_SET_CONFIGURATION, &config, sizeof config);
1920         if (error != 0)
1921                 return error;
1922
1923         data = htole32(0x3); /* 1, 2 */
1924         DPRINTF(("Setting basic tx rates to 0x%x\n", le32toh(data)));
1925         error = ipw_cmd(sc, IPW_CMD_SET_BASIC_TX_RATES, &data, sizeof data);
1926         if (error != 0)
1927                 return error;
1928
1929         data = htole32(0xf); /* 1, 2, 5.5, 11 */
1930         DPRINTF(("Setting tx rates to 0x%x\n", le32toh(data)));
1931         error = ipw_cmd(sc, IPW_CMD_SET_TX_RATES, &data, sizeof data);
1932         if (error != 0)
1933                 return error;
1934
1935         data = htole32(IPW_POWER_MODE_CAM);
1936         DPRINTF(("Setting power mode to %u\n", le32toh(data)));
1937         error = ipw_cmd(sc, IPW_CMD_SET_POWER_MODE, &data, sizeof data);
1938         if (error != 0)
1939                 return error;
1940
1941         if (ic->ic_opmode == IEEE80211_M_IBSS) {
1942                 data = htole32(32); /* default value */
1943                 DPRINTF(("Setting tx power index to %u\n", le32toh(data)));
1944                 error = ipw_cmd(sc, IPW_CMD_SET_TX_POWER_INDEX, &data,
1945                     sizeof data);
1946                 if (error != 0)
1947                         return error;
1948         }
1949
1950         data = htole32(ic->ic_rtsthreshold);
1951         DPRINTF(("Setting RTS threshold to %u\n", le32toh(data)));
1952         error = ipw_cmd(sc, IPW_CMD_SET_RTS_THRESHOLD, &data, sizeof data);
1953         if (error != 0)
1954                 return error;
1955
1956         data = htole32(ic->ic_fragthreshold);
1957         DPRINTF(("Setting frag threshold to %u\n", le32toh(data)));
1958         error = ipw_cmd(sc, IPW_CMD_SET_FRAG_THRESHOLD, &data, sizeof data);
1959         if (error != 0)
1960                 return error;
1961
1962 #ifdef IPW_DEBUG
1963         if (ipw_debug > 0) {
1964                 printf("Setting ESSID to ");
1965                 ieee80211_print_essid(ic->ic_des_essid, ic->ic_des_esslen);
1966                 printf("\n");
1967         }
1968 #endif
1969         error = ipw_cmd(sc, IPW_CMD_SET_ESSID, ic->ic_des_essid,
1970             ic->ic_des_esslen);
1971         if (error != 0)
1972                 return error;
1973
1974         /* no mandatory BSSID */
1975         DPRINTF(("Setting mandatory BSSID to null\n"));
1976         error = ipw_cmd(sc, IPW_CMD_SET_MANDATORY_BSSID, NULL, 0);
1977         if (error != 0)
1978                 return error;
1979
1980         if (ic->ic_flags & IEEE80211_F_DESBSSID) {
1981                 DPRINTF(("Setting desired BSSID to %6D\n", ic->ic_des_bssid,
1982                     ":"));
1983                 error = ipw_cmd(sc, IPW_CMD_SET_DESIRED_BSSID,
1984                     ic->ic_des_bssid, IEEE80211_ADDR_LEN);
1985                 if (error != 0)
1986                         return error;
1987         }
1988
1989         bzero(&security, sizeof security);
1990         security.authmode = (ic->ic_bss->ni_authmode == IEEE80211_AUTH_SHARED) ?
1991             IPW_AUTH_SHARED : IPW_AUTH_OPEN;
1992         security.ciphers = htole32(IPW_CIPHER_NONE);
1993         DPRINTF(("Setting authmode to %u\n", security.authmode));
1994         error = ipw_cmd(sc, IPW_CMD_SET_SECURITY_INFORMATION, &security,
1995             sizeof security);
1996         if (error != 0)
1997                 return error;
1998
1999         if (ic->ic_flags & IEEE80211_F_PRIVACY) {
2000                 k = ic->ic_crypto.cs_nw_keys;
2001                 for (i = 0; i < IEEE80211_WEP_NKID; i++, k++) {
2002                         if (k->wk_keylen == 0)
2003                                 continue;
2004
2005                         wepkey.idx = i;
2006                         wepkey.len = k->wk_keylen;
2007                         bzero(wepkey.key, sizeof wepkey.key);
2008                         bcopy(k->wk_key, wepkey.key, k->wk_keylen);
2009                         DPRINTF(("Setting wep key index %u len %u\n",
2010                             wepkey.idx, wepkey.len));
2011                         error = ipw_cmd(sc, IPW_CMD_SET_WEP_KEY, &wepkey,
2012                             sizeof wepkey);
2013                         if (error != 0)
2014                                 return error;
2015                 }
2016
2017                 data = htole32(ic->ic_crypto.cs_def_txkey);
2018                 DPRINTF(("Setting wep tx key index to %u\n", le32toh(data)));
2019                 error = ipw_cmd(sc, IPW_CMD_SET_WEP_KEY_INDEX, &data,
2020                     sizeof data);
2021                 if (error != 0)
2022                         return error;
2023         }
2024
2025         data = htole32((ic->ic_flags & IEEE80211_F_PRIVACY) ? IPW_WEPON : 0);
2026         DPRINTF(("Setting wep flags to 0x%x\n", le32toh(data)));
2027         error = ipw_cmd(sc, IPW_CMD_SET_WEP_FLAGS, &data, sizeof data);
2028         if (error != 0)
2029                 return error;
2030
2031 #if 0
2032         struct ipw_wpa_ie ie;
2033
2034         memset(&ie, 0, sizeof ie);
2035         ie.len = htole32(sizeof (struct ieee80211_ie_wpa));
2036         DPRINTF(("Setting wpa ie\n"));
2037         error = ipw_cmd(sc, IPW_CMD_SET_WPA_IE, &ie, sizeof ie);
2038         if (error != 0)
2039                 return error;
2040 #endif
2041
2042         if (ic->ic_opmode == IEEE80211_M_IBSS ||
2043             ic->ic_opmode == IEEE80211_M_HOSTAP) {
2044                 data = htole32(ic->ic_bintval);
2045                 DPRINTF(("Setting beacon interval to %u\n", le32toh(data)));
2046                 error = ipw_cmd(sc, IPW_CMD_SET_BEACON_INTERVAL, &data,
2047                     sizeof data);
2048                 if (error != 0)
2049                         return error;
2050         }
2051
2052         options.flags = htole32(0);
2053         options.channels = htole32(0x3fff); /* scan channels 1-14 */
2054         DPRINTF(("Setting scan options to 0x%x\n", le32toh(options.flags)));
2055         error = ipw_cmd(sc, IPW_CMD_SET_SCAN_OPTIONS, &options, sizeof options);
2056         if (error != 0)
2057                 return error;
2058
2059         /* finally, enable adapter (start scanning for an access point) */
2060         DPRINTF(("Enabling adapter\n"));
2061         return ipw_cmd(sc, IPW_CMD_ENABLE, NULL, 0);
2062 }
2063
2064 static void
2065 ipw_init(void *priv)
2066 {
2067         struct ipw_softc *sc = priv;
2068         struct ieee80211com *ic = &sc->sc_ic;
2069         struct ifnet *ifp = &ic->ic_if;
2070         struct ipw_firmware *fw = &sc->fw;
2071
2072         /* exit immediately if firmware has not been ioctl'd */
2073         if (!(sc->flags & IPW_FLAG_FW_CACHED)) {
2074                 if (!(sc->flags & IPW_FLAG_FW_WARNED))
2075                         if_printf(ifp, "Please load firmware\n");
2076                 sc->flags |= IPW_FLAG_FW_WARNED;
2077                 ifp->if_flags &= ~IFF_UP;
2078                 return;
2079         }
2080
2081         ipw_stop(sc);
2082
2083         if (ipw_reset(sc) != 0) {
2084                 if_printf(ifp, "could not reset adapter\n");
2085                 goto fail;
2086         }
2087
2088         if (ipw_load_ucode(sc, fw->ucode, fw->ucode_size) != 0) {
2089                 if_printf(ifp, "could not load microcode\n");
2090                 goto fail;
2091         }
2092
2093         ipw_stop_master(sc);
2094
2095         /*
2096          * Setup tx, rx and status rings
2097          */
2098         CSR_WRITE_4(sc, IPW_CSR_TX_BD_BASE, sc->tbd_phys);
2099         CSR_WRITE_4(sc, IPW_CSR_TX_BD_SIZE, IPW_NTBD);
2100         CSR_WRITE_4(sc, IPW_CSR_TX_READ_INDEX, 0);
2101         CSR_WRITE_4(sc, IPW_CSR_TX_WRITE_INDEX, 0);
2102         sc->txold = IPW_NTBD - 1; /* latest bd index ack'ed by firmware */
2103         sc->txcur = 0; /* bd index to write to */
2104         sc->txfree = IPW_NTBD - 2;
2105
2106         CSR_WRITE_4(sc, IPW_CSR_RX_BD_BASE, sc->rbd_phys);
2107         CSR_WRITE_4(sc, IPW_CSR_RX_BD_SIZE, IPW_NRBD);
2108         CSR_WRITE_4(sc, IPW_CSR_RX_READ_INDEX, 0);
2109         CSR_WRITE_4(sc, IPW_CSR_RX_WRITE_INDEX, IPW_NRBD - 1);
2110         sc->rxcur = IPW_NRBD - 1; /* latest bd index I've read */
2111
2112         CSR_WRITE_4(sc, IPW_CSR_RX_STATUS_BASE, sc->status_phys);
2113
2114         if (ipw_load_firmware(sc, fw->main, fw->main_size) != 0) {
2115                 if_printf(ifp, "could not load firmware\n");
2116                 goto fail;
2117         }
2118
2119         sc->flags |= IPW_FLAG_FW_INITED;
2120
2121         /* Retrieve information tables base addresses */
2122         sc->table1_base = CSR_READ_4(sc, IPW_CSR_TABLE1_BASE);
2123         sc->table2_base = CSR_READ_4(sc, IPW_CSR_TABLE2_BASE);
2124
2125         ipw_write_table1(sc, IPW_INFO_LOCK, 0);
2126
2127         if (ipw_config(sc) != 0) {
2128                 if_printf(ifp, "device configuration failed\n");
2129                 goto fail;
2130         }
2131
2132         ifp->if_flags &= ~IFF_OACTIVE;
2133         ifp->if_flags |= IFF_RUNNING;
2134
2135         return;
2136
2137 fail:   ifp->if_flags &= ~IFF_UP;
2138         ipw_stop(sc);
2139 }
2140
2141 static void
2142 ipw_stop(void *priv)
2143 {
2144         struct ipw_softc *sc = priv;
2145         struct ieee80211com *ic = &sc->sc_ic;
2146         struct ifnet *ifp = &ic->ic_if;
2147         int i;
2148
2149         ipw_stop_master(sc);
2150         CSR_WRITE_4(sc, IPW_CSR_RST, IPW_RST_SW_RESET);
2151
2152         /*
2153          * Release tx buffers
2154          */
2155         for (i = 0; i < IPW_NTBD; i++)
2156                 ipw_release_sbd(sc, &sc->stbd_list[i]);
2157
2158         sc->sc_tx_timer = 0;
2159         ifp->if_timer = 0;
2160         ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE);
2161
2162         ieee80211_new_state(ic, IEEE80211_S_INIT, -1);
2163 }
2164
2165 static int
2166 ipw_sysctl_stats(SYSCTL_HANDLER_ARGS)
2167 {
2168         struct ipw_softc *sc = arg1;
2169         struct ifnet *ifp = &sc->sc_ic.ic_if;
2170         u_int32_t i, size, buf[256];
2171
2172         (void)arg2; /* silence WARNS == 6 */
2173         (void)oidp; /* silence WARNS == 6 */
2174
2175         lwkt_serialize_enter(ifp->if_serializer);
2176
2177         if (!(sc->flags & IPW_FLAG_FW_INITED)) {
2178                 bzero(buf, sizeof buf);
2179                 goto back;
2180         }
2181
2182         CSR_WRITE_4(sc, IPW_CSR_AUTOINC_ADDR, sc->table1_base);
2183
2184         size = min(CSR_READ_4(sc, IPW_CSR_AUTOINC_DATA), 256);
2185         for (i = 1; i < size; i++)
2186                 buf[i] = MEM_READ_4(sc, CSR_READ_4(sc, IPW_CSR_AUTOINC_DATA));
2187 back:
2188         lwkt_serialize_exit(ifp->if_serializer);
2189         return SYSCTL_OUT(req, buf, sizeof buf);
2190 }
2191
2192 static int
2193 ipw_sysctl_radio(SYSCTL_HANDLER_ARGS)
2194 {
2195         struct ipw_softc *sc = arg1;
2196         struct ifnet *ifp = &sc->sc_ic.ic_if;
2197         int val;
2198
2199         (void)arg2; /* silence WARNS == 6 */
2200         (void)oidp; /* silence WARNS == 6 */
2201
2202         lwkt_serialize_enter(ifp->if_serializer);
2203         val = !((sc->flags & IPW_FLAG_HAS_RADIO_SWITCH) &&
2204                 (CSR_READ_4(sc, IPW_CSR_IO) & IPW_IO_RADIO_DISABLED));
2205         lwkt_serialize_exit(ifp->if_serializer);
2206
2207         return SYSCTL_OUT(req, &val, sizeof val);
2208 }
2209
2210 static u_int32_t
2211 ipw_read_table1(struct ipw_softc *sc, u_int32_t off)
2212 {
2213         return MEM_READ_4(sc, MEM_READ_4(sc, sc->table1_base + off));
2214 }
2215
2216 static void
2217 ipw_write_table1(struct ipw_softc *sc, u_int32_t off, u_int32_t info)
2218 {
2219         MEM_WRITE_4(sc, MEM_READ_4(sc, sc->table1_base + off), info);
2220 }
2221
2222 static int
2223 ipw_read_table2(struct ipw_softc *sc, u_int32_t off, void *buf, u_int32_t *len)
2224 {
2225         u_int32_t addr, info;
2226         u_int16_t count, size;
2227         u_int32_t total;
2228
2229         /* addr[4] + count[2] + size[2] */
2230         addr = MEM_READ_4(sc, sc->table2_base + off);
2231         info = MEM_READ_4(sc, sc->table2_base + off + 4);
2232
2233         count = info >> 16;
2234         size = info & 0xffff;
2235         total = count * size;
2236
2237         if (total > *len) {
2238                 *len = total;
2239                 return EINVAL;
2240         }
2241
2242         *len = total;
2243         ipw_read_mem_1(sc, addr, buf, total);
2244
2245         return 0;
2246 }
2247
2248 static void
2249 ipw_read_mem_1(struct ipw_softc *sc, bus_size_t offset, u_int8_t *datap,
2250     bus_size_t count)
2251 {
2252         for (; count > 0; offset++, datap++, count--) {
2253                 CSR_WRITE_4(sc, IPW_CSR_INDIRECT_ADDR, offset & ~3);
2254                 *datap = CSR_READ_1(sc, IPW_CSR_INDIRECT_DATA + (offset & 3));
2255         }
2256 }
2257
2258 static void
2259 ipw_write_mem_1(struct ipw_softc *sc, bus_size_t offset, u_int8_t *datap,
2260     bus_size_t count)
2261 {
2262         for (; count > 0; offset++, datap++, count--) {
2263                 CSR_WRITE_4(sc, IPW_CSR_INDIRECT_ADDR, offset & ~3);
2264                 CSR_WRITE_1(sc, IPW_CSR_INDIRECT_DATA + (offset & 3), *datap);
2265         }
2266 }