1 /* $FreeBSD: src/sys/dev/mpt/mpt_freebsd.h,v 1.3.2.3 2002/09/24 21:37:25 mjacob Exp $ */
2 /* $DragonFly: src/sys/dev/disk/mpt/mpt_freebsd.h,v 1.2 2003/06/17 04:28:28 dillon Exp $ */
4 * LSI MPT Host Adapter FreeBSD Wrapper Definitions (CAM version)
6 * Copyright (c) 2000, 2001 by Greg Ansley, Adam Prewett
8 * Partially derived from Matty Jacobs ISP driver.
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
13 * 1. Redistributions of source code must retain the above copyright
14 * notice immediately at the beginning of the file, without modification,
15 * this list of conditions, and the following disclaimer.
16 * 2. The name of the author may not be used to endorse or promote products
17 * derived from this software without specific prior written permission.
19 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
23 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
24 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
25 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
27 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
30 * Additional Copyright (c) 2002 by Matthew Jacob under same license.
33 #ifndef _MPT_FREEBSD_H_
34 #define _MPT_FREEBSD_H_
38 #include <sys/param.h>
39 #include <sys/systm.h>
41 #include <sys/kernel.h>
42 #include <sys/queue.h>
43 #include <sys/malloc.h>
45 #include <sys/endian.h>
47 #include <sys/malloc.h>
48 #include <sys/mutex.h>
49 #include <sys/condvar.h>
54 #include <machine/bus_memio.h>
55 #include <machine/bus_pio.h>
56 #include <machine/bus.h>
57 #include <machine/clock.h>
58 #include <machine/cpu.h>
61 #include <cam/cam_debug.h>
62 #include <cam/cam_ccb.h>
63 #include <cam/cam_sim.h>
64 #include <cam/cam_xpt.h>
65 #include <cam/cam_xpt_sim.h>
66 #include <cam/cam_debug.h>
67 #include <cam/scsi/scsi_all.h>
68 #include <cam/scsi/scsi_message.h>
72 #include "dev/mpt/mpilib/mpi_type.h"
73 #include "dev/mpt/mpilib/mpi.h"
74 #include "dev/mpt/mpilib/mpi_cnfg.h"
75 #include "dev/mpt/mpilib/mpi_fc.h"
76 #include "dev/mpt/mpilib/mpi_init.h"
77 #include "dev/mpt/mpilib/mpi_ioc.h"
78 #include "dev/mpt/mpilib/mpi_lan.h"
79 #include "dev/mpt/mpilib/mpi_targ.h"
82 #define INLINE __inline
85 #define MPT_IFLAGS INTR_TYPE_CAM
86 #define MPT_LOCK(mpt) mpt_lockspl(mpt)
87 #define MPT_UNLOCK(mpt) mpt_unlockspl(mpt)
88 #define MPTLOCK_2_CAMLOCK MPT_UNLOCK
89 #define CAMLOCK_2_MPTLOCK MPT_LOCK
90 #define MPT_LOCK_SETUP(mpt)
91 #define MPT_LOCK_DESTROY(mpt)
93 #if LOCKING_WORKED_AS_IT_SHOULD
94 #define MPT_IFLAGS INTR_TYPE_CAM | INTR_ENTROPY | INTR_MPSAFE
95 #define MPT_LOCK_SETUP(mpt) \
96 mtx_init(&mpt->mpt_lock, "mpt", NULL, MTX_DEF); \
97 mpt->mpt_locksetup = 1
98 #define MPT_LOCK_DESTROY(mpt) \
99 if (mpt->mpt_locksetup) { \
100 mtx_destroy(&mpt->mpt_lock); \
101 mpt->mpt_locksetup = 0; \
104 #define MPT_LOCK(mpt) mtx_lock(&(mpt)->mpt_lock)
105 #define MPT_UNLOCK(mpt) mtx_unlock(&(mpt)->mpt_lock)
106 #define MPTLOCK_2_CAMLOCK(mpt) \
107 mtx_unlock(&(mpt)->mpt_lock); mtx_lock(&Giant)
108 #define CAMLOCK_2_MPTLOCK(mpt) \
109 mtx_unlock(&Giant); mtx_lock(&(mpt)->mpt_lock)
111 #define MPT_IFLAGS INTR_TYPE_CAM | INTR_ENTROPY
112 #define MPT_LOCK_SETUP(mpt) do { } while (0)
113 #define MPT_LOCK_DESTROY(mpt) do { } while (0)
114 #define MPT_LOCK(mpt) do { } while (0)
115 #define MPT_UNLOCK(mpt) do { } while (0)
116 #define MPTLOCK_2_CAMLOCK(mpt) do { } while (0)
117 #define CAMLOCK_2_MPTLOCK(mpt) do { } while (0)
123 /* Max MPT Reply we are willing to accept (must be power of 2) */
124 #define MPT_REPLY_SIZE 128
126 #define MPT_MAX_REQUESTS(mpt) ((mpt)->is_fc? 1024 : 256)
127 #define MPT_REQUEST_AREA 512
128 #define MPT_SENSE_SIZE 32 /* included in MPT_REQUEST_SIZE */
129 #define MPT_REQ_MEM_SIZE(mpt) (MPT_MAX_REQUESTS(mpt) * MPT_REQUEST_AREA)
132 * We cannot tell prior to getting IOC facts how big the IOC's request
133 * area is. Because of this we cannot tell at compile time how many
134 * simple SG elements we can fit within an IOC request prior to having
135 * to put in a chain element.
137 * Experimentally we know that the Ultra4 parts have a 96 byte request
138 * element size and the Fibre Channel units have a 144 byte request
139 * element size. Therefore, if we have 512-32 (== 480) bytes of request
140 * area to play with, we have room for between 3 and 5 request sized
141 * regions- the first of which is the command plus a simple SG list,
142 * the rest of which are chained continuation SG lists. Given that the
143 * normal request we use is 48 bytes w/o the first SG element, we can
144 * assume we have 480-48 == 432 bytes to have simple SG elements and/or
145 * chain elements. If we assume 32 bit addressing, this works out to
146 * 54 SG or chain elements. If we assume 5 chain elements, then we have
147 * a maximum of 49 seperate actual SG segments.
150 #define MPT_SGL_MAX 49
152 #define MPT_RQSL(mpt) (mpt->request_frame_size << 2)
153 #define MPT_NSGL(mpt) (MPT_RQSL(mpt) / sizeof (SGE_SIMPLE32))
155 #define MPT_NSGL_FIRST(mpt) \
156 (((mpt->request_frame_size << 2) - \
157 sizeof (MSG_SCSI_IO_REQUEST) - \
158 sizeof (SGE_IO_UNION)) / sizeof (SGE_SIMPLE32))
161 * Convert a physical address returned from IOC to kvm address
162 * needed to access the data.
164 #define MPT_REPLY_PTOV(m, x) \
165 ((void *)(&m->reply[((x << 1) - m->reply_phys)]))
167 #define ccb_mpt_ptr sim_priv.entries[0].ptr
168 #define ccb_req_ptr sim_priv.entries[1].ptr
171 REQ_FREE, REQ_IN_PROGRESS, REQ_TIMEOUT, REQ_ON_CHIP, REQ_DONE
173 typedef struct req_entry {
174 u_int16_t index; /* Index of this entry */
175 union ccb * ccb; /* CAM request */
176 void * req_vbuf; /* Virtual Address of Entry */
177 void * sense_vbuf; /* Virtual Address of sense data */
178 bus_addr_t req_pbuf; /* Physical Address of Entry */
179 bus_addr_t sense_pbuf; /* Physical Address of sense data */
180 bus_dmamap_t dmap; /* DMA map for data buffer */
181 SLIST_ENTRY(req_entry) link; /* Pointer to next in list */
182 enum mpt_req_state debug; /* Debugging */
183 u_int32_t sequence; /* Sequence Number */
187 /* Structure for saving proper values for modifyable PCI configuration registers */
190 u_int16_t LatencyTimer_LineSize;
192 u_int32_t Mem0_BAR[2];
193 u_int32_t Mem1_BAR[2];
199 typedef struct mpt_softc {
203 u_int32_t mpt_islocked;
214 bus : 1; /* FC929/1030 have two busses */
219 u_int16_t mpt_global_credits;
220 u_int16_t request_frame_size;
221 u_int8_t mpt_max_devices;
222 u_int8_t mpt_max_buses;
227 u_int16_t mpt_ini_id;
231 * Device Configuration Information
235 fCONFIG_PAGE_SCSI_PORT_0 _port_page0;
236 fCONFIG_PAGE_SCSI_PORT_1 _port_page1;
237 fCONFIG_PAGE_SCSI_PORT_2 _port_page2;
238 fCONFIG_PAGE_SCSI_DEVICE_0 _dev_page0[16];
239 fCONFIG_PAGE_SCSI_DEVICE_1 _dev_page1[16];
240 uint16_t _tag_enable;
241 uint16_t _disc_enable;
242 uint16_t _update_params0;
243 uint16_t _update_params1;
245 #define mpt_port_page0 cfg.spi._port_page0
246 #define mpt_port_page1 cfg.spi._port_page1
247 #define mpt_port_page2 cfg.spi._port_page2
248 #define mpt_dev_page0 cfg.spi._dev_page0
249 #define mpt_dev_page1 cfg.spi._dev_page1
250 #define mpt_tag_enable cfg.spi._tag_enable
251 #define mpt_disc_enable cfg.spi._disc_enable
252 #define mpt_update_params0 cfg.spi._update_params0
253 #define mpt_update_params1 cfg.spi._update_params1
262 struct resource * pci_irq; /* Interrupt map for chip */
263 void * ih; /* Interupt handle */
264 struct mpt_pci_cfg pci_cfg; /* saved PCI conf registers */
270 struct resource * pci_reg; /* Register map for chip */
271 int pci_reg_id; /* Resource ID */
272 bus_space_tag_t pci_st; /* Bus tag for registers */
273 bus_space_handle_t pci_sh; /* Bus handle for registers */
274 vm_offset_t pci_pa; /* Physical Address */
276 bus_dma_tag_t parent_dmat; /* DMA tag for parent PCI bus */
277 bus_dma_tag_t reply_dmat; /* DMA tag for reply memory */
278 bus_dmamap_t reply_dmap; /* DMA map for reply memory */
279 char * reply; /* KVA of reply memory */
280 bus_addr_t reply_phys; /* BusAddr of reply memory */
283 bus_dma_tag_t buffer_dmat; /* DMA tag for buffers */
284 bus_dma_tag_t request_dmat; /* DMA tag for request memroy */
285 bus_dmamap_t request_dmap; /* DMA map for request memroy */
286 char * request; /* KVA of Request memory */
287 bus_addr_t request_phys; /* BusADdr of request memory */
290 * CAM && Software Management
293 request_t * request_pool;
294 SLIST_HEAD(req_queue, req_entry) request_free_list;
296 struct cam_sim * sim;
297 struct cam_path * path;
299 u_int32_t sequence; /* Sequence Number */
300 u_int32_t timeouts; /* timeout count */
301 u_int32_t success; /* successes afer timeout */
303 /* Opposing port in a 929 or 1030, or NULL */
304 struct mpt_softc * mpt2;
308 #include <dev/mpt/mpt.h>
311 static INLINE void mpt_write(mpt_softc_t *, size_t, u_int32_t);
312 static INLINE u_int32_t mpt_read(mpt_softc_t *, int);
315 mpt_write(mpt_softc_t *mpt, size_t offset, u_int32_t val)
317 bus_space_write_4(mpt->pci_st, mpt->pci_sh, offset, val);
320 static INLINE u_int32_t
321 mpt_read(mpt_softc_t *mpt, int offset)
323 return (bus_space_read_4(mpt->pci_st, mpt->pci_sh, offset));
326 void mpt_cam_attach(mpt_softc_t *);
327 void mpt_cam_detach(mpt_softc_t *);
328 void mpt_done(mpt_softc_t *, u_int32_t);
329 void mpt_set_config_regs(mpt_softc_t *);
332 static INLINE void mpt_lockspl(mpt_softc_t *);
333 static INLINE void mpt_unlockspl(mpt_softc_t *);
336 mpt_lockspl(mpt_softc_t *mpt)
339 if (mpt->mpt_islocked++ == 0) {
340 mpt->mpt_splsaved = s;
347 mpt_unlockspl(mpt_softc_t *mpt)
349 if (mpt->mpt_islocked) {
350 if (--mpt->mpt_islocked == 0) {
351 splx(mpt->mpt_splsaved);
357 #endif /* _MPT_FREEBSD_H */