sys/dev/agp/agp_i810.c

   1 /*
   2  * Copyright (c) 2000 Doug Rabson
   3  * Copyright (c) 2000 Ruslan Ermilov
   4  * Copyright (c) 2011 The FreeBSD Foundation
   5  * All rights reserved.
   6  *
   7  * Portions of this software were developed by Konstantin Belousov
   8  * under sponsorship from the FreeBSD Foundation.
   9  *
  10  * Redistribution and use in source and binary forms, with or without
  11  * modification, are permitted provided that the following conditions
  12  * are met:
  13  * 1. Redistributions of source code must retain the above copyright
  14  *    notice, this list of conditions and the following disclaimer.
  15  * 2. Redistributions in binary form must reproduce the above copyright
  16  *    notice, this list of conditions and the following disclaimer in the
  17  *    documentation and/or other materials provided with the distribution.
  18  *
  19  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
  20  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  21  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  22  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
  23  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  24  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  25  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  26  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  27  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  28  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  29  * SUCH DAMAGE.
  30  */
  31
  32 /*
  33  * Fixes for 830/845G support: David Dawes <dawes@xfree86.org>
  34  * 852GM/855GM/865G support added by David Dawes <dawes@xfree86.org>
  35  *
  36  * This is generic Intel GTT handling code, morphed from the AGP
  37  * bridge code.
  38  */
  39
  40 #if 0
  41 #define KTR_AGP_I810    KTR_DEV
  42 #else
  43 #define KTR_AGP_I810    0
  44 #endif
  45
  46 #include <sys/param.h>
  47 #include <sys/systm.h>
  48 #include <sys/malloc.h>
  49 #include <sys/kernel.h>
  50 #include <sys/bus.h>
  51 #include <sys/lock.h>
  52 #include <sys/rman.h>
  53
  54 #include "pcidevs.h"
  55 #include <bus/pci/pcivar.h>
  56 #include <bus/pci/pcireg.h>
  57 #include "agppriv.h"
  58 #include "agpreg.h"
  59 #include <drm/intel-gtt.h>
  60
  61 #include <vm/vm.h>
  62 #include <vm/vm_object.h>
  63 #include <vm/vm_page.h>
  64 #include <vm/vm_pageout.h>
  65 #include <vm/pmap.h>
  66
  67 #include <machine/md_var.h>
  68
  69 #define bus_read_1(r, o) \
  70                    bus_space_read_1((r)->r_bustag, (r)->r_bushandle, (o))
  71 #define bus_read_4(r, o) \
  72                    bus_space_read_4((r)->r_bustag, (r)->r_bushandle, (o))
  73 #define bus_write_4(r, o, v) \
  74                     bus_space_write_4((r)->r_bustag, (r)->r_bushandle, (o), (v))
  75
  76 MALLOC_DECLARE(M_AGP);
  77
  78 struct agp_i810_match;
  79
  80 static int agp_i915_check_active(device_t bridge_dev);
  81 static int agp_sb_check_active(device_t bridge_dev);
  82
  83 static void agp_i810_set_desc(device_t dev, const struct agp_i810_match *match);
  84
  85 static void agp_i915_dump_regs(device_t dev);
  86 static void agp_i965_dump_regs(device_t dev);
  87 static void agp_sb_dump_regs(device_t dev);
  88
  89 static int agp_i915_get_stolen_size(device_t dev);
  90 static int agp_sb_get_stolen_size(device_t dev);
  91 static int agp_gen8_get_stolen_size(device_t dev);
  92
  93 static int agp_i915_get_gtt_mappable_entries(device_t dev);
  94
  95 static int agp_i810_get_gtt_total_entries(device_t dev);
  96 static int agp_i965_get_gtt_total_entries(device_t dev);
  97 static int agp_gen5_get_gtt_total_entries(device_t dev);
  98 static int agp_sb_get_gtt_total_entries(device_t dev);
  99 static int agp_gen8_get_gtt_total_entries(device_t dev);
 100
 101 static int agp_i830_install_gatt(device_t dev);
 102
 103 static void agp_i830_deinstall_gatt(device_t dev);
 104
 105 static void agp_i915_install_gtt_pte(device_t dev, u_int index,
 106     vm_offset_t physical, int flags);
 107 static void agp_i965_install_gtt_pte(device_t dev, u_int index,
 108     vm_offset_t physical, int flags);
 109 static void agp_g4x_install_gtt_pte(device_t dev, u_int index,
 110     vm_offset_t physical, int flags);
 111 static void agp_sb_install_gtt_pte(device_t dev, u_int index,
 112     vm_offset_t physical, int flags);
 113 static void agp_gen8_install_gtt_pte(device_t dev, u_int index,
 114     vm_offset_t physical, int flags);
 115
 116 static void agp_i915_write_gtt(device_t dev, u_int index, uint32_t pte);
 117 static void agp_i965_write_gtt(device_t dev, u_int index, uint32_t pte);
 118 static void agp_g4x_write_gtt(device_t dev, u_int index, uint32_t pte);
 119 static void agp_sb_write_gtt(device_t dev, u_int index, uint32_t pte);
 120
 121 static void agp_i915_sync_gtt_pte(device_t dev, u_int index);
 122 static void agp_i965_sync_gtt_pte(device_t dev, u_int index);
 123 static void agp_g4x_sync_gtt_pte(device_t dev, u_int index);
 124
 125 static int agp_i915_set_aperture(device_t dev, u_int32_t aperture);
 126
 127 static int agp_i810_chipset_flush_setup(device_t dev);
 128 static int agp_i915_chipset_flush_setup(device_t dev);
 129 static int agp_i965_chipset_flush_setup(device_t dev);
 130
 131 static void agp_i810_chipset_flush_teardown(device_t dev);
 132 static void agp_i915_chipset_flush_teardown(device_t dev);
 133 static void agp_i965_chipset_flush_teardown(device_t dev);
 134
 135 static void agp_i810_chipset_flush(device_t dev);
 136 static void agp_i915_chipset_flush(device_t dev);
 137
 138 enum {
 139         CHIP_I810,      /* i810/i815 */
 140         CHIP_I830,      /* 830M/845G */
 141         CHIP_I855,      /* 852GM/855GM/865G */
 142         CHIP_I915,      /* 915G/915GM */
 143         CHIP_I965,      /* G965 */
 144         CHIP_G33,       /* G33/Q33/Q35 */
 145         CHIP_IGD,       /* Pineview */
 146         CHIP_G4X,       /* G45/Q45 */
 147         CHIP_SB,        /* SandyBridge */
 148 };
 149
 150 /* The i810 through i855 have the registers at BAR 1, and the GATT gets
 151  * allocated by us.  The i915 has registers in BAR 0 and the GATT is at the
 152  * start of the stolen memory, and should only be accessed by the OS through
 153  * BAR 3.  The G965 has registers and GATT in the same BAR (0) -- first 512KB
 154  * is registers, second 512KB is GATT.
 155  */
 156 static struct resource_spec agp_i915_res_spec[] = {
 157         { SYS_RES_MEMORY, AGP_I915_MMADR, RF_ACTIVE | RF_SHAREABLE },
 158         { SYS_RES_MEMORY, AGP_I915_GTTADR, RF_ACTIVE | RF_SHAREABLE },
 159         { -1, 0 }
 160 };
 161
 162 static struct resource_spec agp_i965_res_spec[] = {
 163         { SYS_RES_MEMORY, AGP_I965_GTTMMADR, RF_ACTIVE | RF_SHAREABLE },
 164         { -1, 0 }
 165 };
 166
 167 static struct resource_spec agp_g4x_res_spec[] = {
 168         { SYS_RES_MEMORY, AGP_G4X_MMADR, RF_ACTIVE | RF_SHAREABLE },
 169         { SYS_RES_MEMORY, AGP_G4X_GTTADR, RF_ACTIVE | RF_SHAREABLE },
 170         { -1, 0 }
 171 };
 172
 173 struct agp_i810_softc {
 174         struct agp_softc agp;
 175         u_int32_t initial_aperture;     /* aperture size at startup */
 176         struct agp_gatt *gatt;
 177         u_int32_t dcache_size;          /* i810 only */
 178         u_int32_t stolen;               /* number of i830/845 gtt
 179                                            entries for stolen memory */
 180         u_int stolen_size;              /* BIOS-reserved graphics memory */
 181         u_int gtt_total_entries;        /* Total number of gtt ptes */
 182         u_int gtt_mappable_entries;     /* Number of gtt ptes mappable by CPU */
 183         device_t bdev;                  /* bridge device */
 184         void *argb_cursor;              /* contigmalloc area for ARGB cursor */
 185         struct resource *sc_res[2];
 186         const struct agp_i810_match *match;
 187         int sc_flush_page_rid;
 188         struct resource *sc_flush_page_res;
 189         void *sc_flush_page_vaddr;
 190         int sc_bios_allocated_flush_page;
 191 };
 192
 193 static device_t intel_agp;
 194
 195 struct agp_i810_driver {
 196         int chiptype;
 197         int gen;
 198         int busdma_addr_mask_sz;
 199         struct resource_spec *res_spec;
 200         int (*check_active)(device_t);
 201         void (*set_desc)(device_t, const struct agp_i810_match *);
 202         void (*dump_regs)(device_t);
 203         int (*get_stolen_size)(device_t);
 204         int (*get_gtt_total_entries)(device_t);
 205         int (*get_gtt_mappable_entries)(device_t);
 206         int (*install_gatt)(device_t);
 207         void (*deinstall_gatt)(device_t);
 208         void (*write_gtt)(device_t, u_int, uint32_t);
 209         void (*install_gtt_pte)(device_t, u_int, vm_offset_t, int);
 210         void (*sync_gtt_pte)(device_t, u_int);
 211         int (*set_aperture)(device_t, u_int32_t);
 212         int (*chipset_flush_setup)(device_t);
 213         void (*chipset_flush_teardown)(device_t);
 214         void (*chipset_flush)(device_t);
 215 };
 216
 217 static struct {
 218         struct intel_gtt base;
 219 } intel_private;
 220
 221 static const struct agp_i810_driver agp_i810_i915_driver = {
 222         .chiptype = CHIP_I915,
 223         .gen = 3,
 224         .busdma_addr_mask_sz = 32,
 225         .res_spec = agp_i915_res_spec,
 226         .check_active = agp_i915_check_active,
 227         .set_desc = agp_i810_set_desc,
 228         .dump_regs = agp_i915_dump_regs,
 229         .get_stolen_size = agp_i915_get_stolen_size,
 230         .get_gtt_mappable_entries = agp_i915_get_gtt_mappable_entries,
 231         .get_gtt_total_entries = agp_i810_get_gtt_total_entries,
 232         .install_gatt = agp_i830_install_gatt,
 233         .deinstall_gatt = agp_i830_deinstall_gatt,
 234         .write_gtt = agp_i915_write_gtt,
 235         .install_gtt_pte = agp_i915_install_gtt_pte,
 236         .sync_gtt_pte = agp_i915_sync_gtt_pte,
 237         .set_aperture = agp_i915_set_aperture,
 238         .chipset_flush_setup = agp_i915_chipset_flush_setup,
 239         .chipset_flush_teardown = agp_i915_chipset_flush_teardown,
 240         .chipset_flush = agp_i915_chipset_flush,
 241 };
 242
 243 static const struct agp_i810_driver agp_i810_g965_driver = {
 244         .chiptype = CHIP_I965,
 245         .gen = 4,
 246         .busdma_addr_mask_sz = 36,
 247         .res_spec = agp_i965_res_spec,
 248         .check_active = agp_i915_check_active,
 249         .set_desc = agp_i810_set_desc,
 250         .dump_regs = agp_i965_dump_regs,
 251         .get_stolen_size = agp_i915_get_stolen_size,
 252         .get_gtt_mappable_entries = agp_i915_get_gtt_mappable_entries,
 253         .get_gtt_total_entries = agp_i965_get_gtt_total_entries,
 254         .install_gatt = agp_i830_install_gatt,
 255         .deinstall_gatt = agp_i830_deinstall_gatt,
 256         .write_gtt = agp_i965_write_gtt,
 257         .install_gtt_pte = agp_i965_install_gtt_pte,
 258         .sync_gtt_pte = agp_i965_sync_gtt_pte,
 259         .set_aperture = agp_i915_set_aperture,
 260         .chipset_flush_setup = agp_i965_chipset_flush_setup,
 261         .chipset_flush_teardown = agp_i965_chipset_flush_teardown,
 262         .chipset_flush = agp_i915_chipset_flush,
 263 };
 264
 265 static const struct agp_i810_driver agp_i810_g33_driver = {
 266         .chiptype = CHIP_G33,
 267         .gen = 3,
 268         .busdma_addr_mask_sz = 36,
 269         .res_spec = agp_i915_res_spec,
 270         .check_active = agp_i915_check_active,
 271         .set_desc = agp_i810_set_desc,
 272         .dump_regs = agp_i965_dump_regs,
 273         .get_stolen_size = agp_i915_get_stolen_size,
 274         .get_gtt_mappable_entries = agp_i915_get_gtt_mappable_entries,
 275         .get_gtt_total_entries = agp_i965_get_gtt_total_entries,
 276         .install_gatt = agp_i830_install_gatt,
 277         .deinstall_gatt = agp_i830_deinstall_gatt,
 278         .write_gtt = agp_i915_write_gtt,
 279         .install_gtt_pte = agp_i965_install_gtt_pte,
 280         .sync_gtt_pte = agp_i915_sync_gtt_pte,
 281         .set_aperture = agp_i915_set_aperture,
 282         .chipset_flush_setup = agp_i965_chipset_flush_setup,
 283         .chipset_flush_teardown = agp_i965_chipset_flush_teardown,
 284         .chipset_flush = agp_i915_chipset_flush,
 285 };
 286
 287 static const struct agp_i810_driver pineview_gtt_driver = {
 288         .chiptype = CHIP_IGD,
 289         .gen = 3,
 290         .busdma_addr_mask_sz = 36,
 291         .res_spec = agp_i915_res_spec,
 292         .check_active = agp_i915_check_active,
 293         .set_desc = agp_i810_set_desc,
 294         .dump_regs = agp_i915_dump_regs,
 295         .get_stolen_size = agp_i915_get_stolen_size,
 296         .get_gtt_mappable_entries = agp_i915_get_gtt_mappable_entries,
 297         .get_gtt_total_entries = agp_i965_get_gtt_total_entries,
 298         .install_gatt = agp_i830_install_gatt,
 299         .deinstall_gatt = agp_i830_deinstall_gatt,
 300         .write_gtt = agp_i915_write_gtt,
 301         .install_gtt_pte = agp_i965_install_gtt_pte,
 302         .sync_gtt_pte = agp_i915_sync_gtt_pte,
 303         .set_aperture = agp_i915_set_aperture,
 304         .chipset_flush_setup = agp_i965_chipset_flush_setup,
 305         .chipset_flush_teardown = agp_i965_chipset_flush_teardown,
 306         .chipset_flush = agp_i915_chipset_flush,
 307 };
 308
 309 static const struct agp_i810_driver agp_i810_g4x_driver = {
 310         .chiptype = CHIP_G4X,
 311         .gen = 5,
 312         .busdma_addr_mask_sz = 36,
 313         .res_spec = agp_i965_res_spec,
 314         .check_active = agp_i915_check_active,
 315         .set_desc = agp_i810_set_desc,
 316         .dump_regs = agp_i965_dump_regs,
 317         .get_stolen_size = agp_i915_get_stolen_size,
 318         .get_gtt_mappable_entries = agp_i915_get_gtt_mappable_entries,
 319         .get_gtt_total_entries = agp_gen5_get_gtt_total_entries,
 320         .install_gatt = agp_i830_install_gatt,
 321         .deinstall_gatt = agp_i830_deinstall_gatt,
 322         .write_gtt = agp_g4x_write_gtt,
 323         .install_gtt_pte = agp_g4x_install_gtt_pte,
 324         .sync_gtt_pte = agp_g4x_sync_gtt_pte,
 325         .set_aperture = agp_i915_set_aperture,
 326         .chipset_flush_setup = agp_i965_chipset_flush_setup,
 327         .chipset_flush_teardown = agp_i965_chipset_flush_teardown,
 328         .chipset_flush = agp_i915_chipset_flush,
 329 };
 330
 331 static const struct agp_i810_driver agp_i810_sb_driver = {
 332         .chiptype = CHIP_SB,
 333         .gen = 6,
 334         .busdma_addr_mask_sz = 40,
 335         .res_spec = agp_g4x_res_spec,
 336         .check_active = agp_sb_check_active,
 337         .set_desc = agp_i810_set_desc,
 338         .dump_regs = agp_sb_dump_regs,
 339         .get_stolen_size = agp_sb_get_stolen_size,
 340         .get_gtt_mappable_entries = agp_i915_get_gtt_mappable_entries,
 341         .get_gtt_total_entries = agp_sb_get_gtt_total_entries,
 342         .install_gatt = agp_i830_install_gatt,
 343         .deinstall_gatt = agp_i830_deinstall_gatt,
 344         .write_gtt = agp_sb_write_gtt,
 345         .install_gtt_pte = agp_sb_install_gtt_pte,
 346         .sync_gtt_pte = agp_g4x_sync_gtt_pte,
 347         .set_aperture = agp_i915_set_aperture,
 348         .chipset_flush_setup = agp_i810_chipset_flush_setup,
 349         .chipset_flush_teardown = agp_i810_chipset_flush_teardown,
 350         .chipset_flush = agp_i810_chipset_flush,
 351 };
 352
 353 static const struct agp_i810_driver valleyview_gtt_driver = {
 354         .chiptype = CHIP_SB,
 355         .gen = 7,
 356         .busdma_addr_mask_sz = 40,
 357         .res_spec = agp_g4x_res_spec,
 358         .check_active = agp_sb_check_active,
 359         .set_desc = agp_i810_set_desc,
 360         .dump_regs = agp_sb_dump_regs,
 361         .get_stolen_size = agp_sb_get_stolen_size,
 362         .get_gtt_mappable_entries = agp_i915_get_gtt_mappable_entries,
 363         .get_gtt_total_entries = agp_sb_get_gtt_total_entries,
 364         .install_gatt = agp_i830_install_gatt,
 365         .deinstall_gatt = agp_i830_deinstall_gatt,
 366         .write_gtt = agp_sb_write_gtt,
 367         .install_gtt_pte = agp_sb_install_gtt_pte,
 368         .sync_gtt_pte = agp_g4x_sync_gtt_pte,
 369         .set_aperture = agp_i915_set_aperture,
 370         .chipset_flush_setup = agp_i810_chipset_flush_setup,
 371         .chipset_flush_teardown = agp_i810_chipset_flush_teardown,
 372         .chipset_flush = agp_i810_chipset_flush,
 373 };
 374
 375 static const struct agp_i810_driver broadwell_gtt_driver = {
 376         .chiptype = CHIP_SB,
 377         .gen = 8,
 378         .busdma_addr_mask_sz = 40,
 379         .res_spec = agp_g4x_res_spec,
 380         .check_active = agp_sb_check_active,
 381         .set_desc = agp_i810_set_desc,
 382         .dump_regs = agp_sb_dump_regs,
 383         .get_stolen_size = agp_gen8_get_stolen_size,
 384         .get_gtt_mappable_entries = agp_i915_get_gtt_mappable_entries,
 385         .get_gtt_total_entries = agp_gen8_get_gtt_total_entries,
 386         .install_gatt = agp_i830_install_gatt,
 387         .deinstall_gatt = agp_i830_deinstall_gatt,
 388         .write_gtt = NULL,
 389         .install_gtt_pte = agp_gen8_install_gtt_pte,
 390         .sync_gtt_pte = agp_g4x_sync_gtt_pte,
 391         .set_aperture = agp_i915_set_aperture,
 392         .chipset_flush_setup = agp_i810_chipset_flush_setup,
 393         .chipset_flush_teardown = agp_i810_chipset_flush_teardown,
 394         .chipset_flush = agp_i810_chipset_flush,
 395 };
 396
 397 /* For adding new devices, devid is the id of the graphics controller
 398  * (pci:0:2:0, for example).  The placeholder (usually at pci:0:2:1) for the
 399  * second head should never be added.  The bridge_offset is the offset to
 400  * subtract from devid to get the id of the hostb that the device is on.
 401  */
 402 static const struct agp_i810_match {
 403         uint16_t devid;
 404         char *name;
 405         const struct agp_i810_driver *driver;
 406 } agp_i810_matches[] = {
 407         {
 408                 .devid = 0x2582,
 409                 .name = "Intel 82915G (915G GMCH) SVGA controller",
 410                 .driver = &agp_i810_i915_driver
 411         },
 412         {
 413                 .devid = 0x258A,
 414                 .name = "Intel E7221 SVGA controller",
 415                 .driver = &agp_i810_i915_driver
 416         },
 417         {
 418                 .devid = 0x2592,
 419                 .name = "Intel 82915GM (915GM GMCH) SVGA controller",
 420                 .driver = &agp_i810_i915_driver
 421         },
 422         {
 423                 .devid = 0x2772,
 424                 .name = "Intel 82945G (945G GMCH) SVGA controller",
 425                 .driver = &agp_i810_i915_driver
 426         },
 427         {
 428                 .devid = 0x27A2,
 429                 .name = "Intel 82945GM (945GM GMCH) SVGA controller",
 430                 .driver = &agp_i810_i915_driver
 431         },
 432         {
 433                 .devid = 0x27AE,
 434                 .name = "Intel 945GME SVGA controller",
 435                 .driver = &agp_i810_i915_driver
 436         },
 437         {
 438                 .devid = 0x2972,
 439                 .name = "Intel 946GZ SVGA controller",
 440                 .driver = &agp_i810_g965_driver
 441         },
 442         {
 443                 .devid = 0x2982,
 444                 .name = "Intel G965 SVGA controller",
 445                 .driver = &agp_i810_g965_driver
 446         },
 447         {
 448                 .devid = 0x2992,
 449                 .name = "Intel Q965 SVGA controller",
 450                 .driver = &agp_i810_g965_driver
 451         },
 452         {
 453                 .devid = 0x29A2,
 454                 .name = "Intel G965 SVGA controller",
 455                 .driver = &agp_i810_g965_driver
 456         },
 457         {
 458                 .devid = 0x29B2,
 459                 .name = "Intel Q35 SVGA controller",
 460                 .driver = &agp_i810_g33_driver
 461         },
 462         {
 463                 .devid = 0x29C2,
 464                 .name = "Intel G33 SVGA controller",
 465                 .driver = &agp_i810_g33_driver
 466         },
 467         {
 468                 .devid = 0x29D2,
 469                 .name = "Intel Q33 SVGA controller",
 470                 .driver = &agp_i810_g33_driver
 471         },
 472         {
 473                 .devid = 0xA001,
 474                 .name = "Intel Pineview SVGA controller",
 475                 .driver = &pineview_gtt_driver
 476         },
 477         {
 478                 .devid = 0xA011,
 479                 .name = "Intel Pineview (M) SVGA controller",
 480                 .driver = &pineview_gtt_driver
 481         },
 482         {
 483                 .devid = 0x2A02,
 484                 .name = "Intel GM965 SVGA controller",
 485                 .driver = &agp_i810_g965_driver
 486         },
 487         {
 488                 .devid = 0x2A12,
 489                 .name = "Intel GME965 SVGA controller",
 490                 .driver = &agp_i810_g965_driver
 491         },
 492         {
 493                 .devid = 0x2A42,
 494                 .name = "Intel GM45 SVGA controller",
 495                 .driver = &agp_i810_g4x_driver
 496         },
 497         {
 498                 .devid = 0x2E02,
 499                 .name = "Intel Eaglelake SVGA controller",
 500                 .driver = &agp_i810_g4x_driver
 501         },
 502         {
 503                 .devid = 0x2E12,
 504                 .name = "Intel Q45 SVGA controller",
 505                 .driver = &agp_i810_g4x_driver
 506         },
 507         {
 508                 .devid = 0x2E22,
 509                 .name = "Intel G45 SVGA controller",
 510                 .driver = &agp_i810_g4x_driver
 511         },
 512         {
 513                 .devid = 0x2E32,
 514                 .name = "Intel G41 SVGA controller",
 515                 .driver = &agp_i810_g4x_driver
 516         },
 517         {
 518                 .devid = 0x0042,
 519                 .name = "Intel Ironlake (D) SVGA controller",
 520                 .driver = &agp_i810_g4x_driver
 521         },
 522         {
 523                 .devid = 0x0046,
 524                 .name = "Intel Ironlake (M) SVGA controller",
 525                 .driver = &agp_i810_g4x_driver
 526         },
 527         {
 528                 .devid = 0x0102,
 529                 .name = "SandyBridge desktop GT1 IG",
 530                 .driver = &agp_i810_sb_driver
 531         },
 532         {
 533                 .devid = 0x0112,
 534                 .name = "SandyBridge desktop GT2 IG",
 535                 .driver = &agp_i810_sb_driver
 536         },
 537         {
 538                 .devid = 0x0122,
 539                 .name = "SandyBridge desktop GT2+ IG",
 540                 .driver = &agp_i810_sb_driver
 541         },
 542         {
 543                 .devid = 0x0106,
 544                 .name = "SandyBridge mobile GT1 IG",
 545                 .driver = &agp_i810_sb_driver
 546         },
 547         {
 548                 .devid = 0x0116,
 549                 .name = "SandyBridge mobile GT2 IG",
 550                 .driver = &agp_i810_sb_driver
 551         },
 552         {
 553                 .devid = 0x0126,
 554                 .name = "SandyBridge mobile GT2+ IG",
 555                 .driver = &agp_i810_sb_driver
 556         },
 557         {
 558                 .devid = 0x010a,
 559                 .name = "SandyBridge server IG",
 560                 .driver = &agp_i810_sb_driver
 561         },
 562         {
 563                 .devid = 0x0152,
 564                 .name = "IvyBridge desktop GT1 IG",
 565                 .driver = &agp_i810_sb_driver
 566         },
 567         {
 568                 .devid = 0x0162,
 569                 .name = "IvyBridge desktop GT2 IG",
 570                 .driver = &agp_i810_sb_driver
 571         },
 572         {
 573                 .devid = 0x0156,
 574                 .name = "IvyBridge mobile GT1 IG",
 575                 .driver = &agp_i810_sb_driver
 576         },
 577         {
 578                 .devid = 0x0166,
 579                 .name = "IvyBridge mobile GT2 IG",
 580                 .driver = &agp_i810_sb_driver
 581         },
 582         {
 583                 .devid = 0x015a,
 584                 .name = "IvyBridge server GT1 IG",
 585                 .driver = &agp_i810_sb_driver
 586         },
 587         {
 588                 .devid = 0x016a,
 589                 .name = "IvyBridge server GT2 IG",
 590                 .driver = &agp_i810_sb_driver
 591         },
 592         {
 593                 .devid = 0x0f30,
 594                 .name = "ValleyView",
 595                 .driver = &valleyview_gtt_driver
 596         },
 597         {
 598                 .devid = 0x0402,
 599                 .name = "Haswell desktop GT1 IG",
 600                 .driver = &agp_i810_sb_driver
 601         },
 602         {
 603                 .devid = 0x0412,
 604                 .name = "Haswell desktop GT2 IG",
 605                 .driver = &agp_i810_sb_driver
 606         },
 607         {       0x041e, "Haswell", &agp_i810_sb_driver },
 608         {       0x0422, "Haswell", &agp_i810_sb_driver },
 609         {
 610                 .devid = 0x0406,
 611                 .name = "Haswell mobile GT1 IG",
 612                 .driver = &agp_i810_sb_driver
 613         },
 614         {
 615                 .devid = 0x0416,
 616                 .name = "Haswell mobile GT2 IG",
 617                 .driver = &agp_i810_sb_driver
 618         },
 619         {       0x0426, "Haswell", &agp_i810_sb_driver },
 620         {
 621                 .devid = 0x040a,
 622                 .name = "Haswell server GT1 IG",
 623                 .driver = &agp_i810_sb_driver
 624         },
 625         {
 626                 .devid = 0x041a,
 627                 .name = "Haswell server GT2 IG",
 628                 .driver = &agp_i810_sb_driver
 629         },
 630         {       0x042a, "Haswell", &agp_i810_sb_driver },
 631         {       0x0c02, "Haswell", &agp_i810_sb_driver },
 632         {       0x0c12, "Haswell", &agp_i810_sb_driver },
 633         {       0x0c22, "Haswell", &agp_i810_sb_driver },
 634         {       0x0c06, "Haswell", &agp_i810_sb_driver },
 635         {
 636                 .devid = 0x0c16,
 637                 .name = "Haswell SDV",
 638                 .driver = &agp_i810_sb_driver
 639         },
 640         {       0x0c26, "Haswell", &agp_i810_sb_driver },
 641         {       0x0c0a, "Haswell", &agp_i810_sb_driver },
 642         {       0x0c1a, "Haswell", &agp_i810_sb_driver },
 643         {       0x0c2a, "Haswell", &agp_i810_sb_driver },
 644         {       0x0a02, "Haswell", &agp_i810_sb_driver },
 645         {       0x0a12, "Haswell", &agp_i810_sb_driver },
 646         {       0x0a22, "Haswell", &agp_i810_sb_driver },
 647         {       0x0a06, "Haswell", &agp_i810_sb_driver },
 648         {       0x0a16, "Haswell", &agp_i810_sb_driver },
 649         {       0x0a26, "Haswell", &agp_i810_sb_driver },
 650         {       0x0a0a, "Haswell", &agp_i810_sb_driver },
 651         {       0x0a1a, "Haswell", &agp_i810_sb_driver },
 652         {       0x0a2a, "Haswell", &agp_i810_sb_driver },
 653         {       0x0d12, "Haswell", &agp_i810_sb_driver },
 654         {       0x0d22, "Haswell", &agp_i810_sb_driver },
 655         {       0x0d32, "Haswell", &agp_i810_sb_driver },
 656         {       0x0d16, "Haswell", &agp_i810_sb_driver },
 657         {       0x0d26, "Haswell", &agp_i810_sb_driver },
 658         {       0x0d36, "Haswell", &agp_i810_sb_driver },
 659         {       0x0d1a, "Haswell", &agp_i810_sb_driver },
 660         {       0x0d2a, "Haswell", &agp_i810_sb_driver },
 661         {       0x0d3a, "Haswell", &agp_i810_sb_driver },
 662
 663         {       0x1602, "Broadwell", &broadwell_gtt_driver }, /* m */
 664         {       0x1606, "Broadwell", &broadwell_gtt_driver },
 665         {       0x160B, "Broadwell", &broadwell_gtt_driver },
 666         {       0x160E, "Broadwell", &broadwell_gtt_driver },
 667         {       0x1616, "Broadwell", &broadwell_gtt_driver },
 668         {       0x161E, "Broadwell", &broadwell_gtt_driver },
 669
 670         {       0x160A, "Broadwell", &broadwell_gtt_driver }, /* d */
 671         {       0x160D, "Broadwell", &broadwell_gtt_driver },
 672         {
 673                 .devid = 0,
 674         }
 675 };
 676
 677 static const struct agp_i810_match*
 678 agp_i810_match(device_t dev)
 679 {
 680         int i, devid;
 681
 682         if (pci_get_vendor(dev) != PCI_VENDOR_INTEL)
 683                 return (NULL);
 684
 685         devid = pci_get_device(dev);
 686         for (i = 0; agp_i810_matches[i].devid != 0; i++) {
 687                 if (agp_i810_matches[i].devid == devid)
 688                         break;
 689         }
 690         if (agp_i810_matches[i].devid == 0)
 691                 return (NULL);
 692         else
 693                 return (&agp_i810_matches[i]);
 694 }
 695
 696 /*
 697  * Find bridge device.
 698  */
 699 static device_t
 700 agp_i810_find_bridge(device_t dev)
 701 {
 702
 703         return (pci_find_dbsf(0, 0, 0, 0));
 704 }
 705
 706 static void
 707 agp_i810_identify(driver_t *driver, device_t parent)
 708 {
 709
 710         if (device_find_child(parent, "agp", -1) == NULL &&
 711             agp_i810_match(parent))
 712                 device_add_child(parent, "agp", -1);
 713 }
 714
 715 static int
 716 agp_i915_check_active(device_t bridge_dev)
 717 {
 718         int deven;
 719
 720         deven = pci_read_config(bridge_dev, AGP_I915_DEVEN, 4);
 721         if ((deven & AGP_I915_DEVEN_D2F0) == AGP_I915_DEVEN_D2F0_DISABLED)
 722                 return (ENXIO);
 723         return (0);
 724 }
 725
 726 static int
 727 agp_sb_check_active(device_t bridge_dev)
 728 {
 729         int deven;
 730
 731         deven = pci_read_config(bridge_dev, AGP_I915_DEVEN, 4);
 732         if ((deven & AGP_SB_DEVEN_D2EN) == AGP_SB_DEVEN_D2EN_DISABLED)
 733                 return (ENXIO);
 734         return (0);
 735 }
 736
 737 static void
 738 agp_i810_set_desc(device_t dev, const struct agp_i810_match *match)
 739 {
 740
 741         device_set_desc(dev, match->name);
 742 }
 743
 744 static int
 745 agp_i810_probe(device_t dev)
 746 {
 747         device_t bdev;
 748         const struct agp_i810_match *match;
 749         int err;
 750
 751         if (resource_disabled("agp", device_get_unit(dev)))
 752                 return (ENXIO);
 753         match = agp_i810_match(dev);
 754         if (match == NULL)
 755                 return (ENXIO);
 756
 757         bdev = agp_i810_find_bridge(dev);
 758         if (bdev == NULL) {
 759                 if (bootverbose)
 760                         kprintf("I810: can't find bridge device\n");
 761                 return (ENXIO);
 762         }
 763
 764         /*
 765          * checking whether internal graphics device has been activated.
 766          */
 767         err = match->driver->check_active(bdev);
 768         if (err != 0) {
 769                 if (bootverbose)
 770                         kprintf("i810: disabled, not probing\n");
 771                 return (err);
 772         }
 773
 774         match->driver->set_desc(dev, match);
 775         return (BUS_PROBE_DEFAULT);
 776 }
 777
 778 static void
 779 agp_i915_dump_regs(device_t dev)
 780 {
 781         struct agp_i810_softc *sc = device_get_softc(dev);
 782
 783         device_printf(dev, "AGP_I810_PGTBL_CTL: %08x\n",
 784             bus_read_4(sc->sc_res[0], AGP_I810_PGTBL_CTL));
 785         device_printf(dev, "AGP_I855_GCC1: 0x%02x\n",
 786             pci_read_config(sc->bdev, AGP_I855_GCC1, 1));
 787         device_printf(dev, "AGP_I915_MSAC: 0x%02x\n",
 788             pci_read_config(sc->bdev, AGP_I915_MSAC, 1));
 789 }
 790
 791 static void
 792 agp_i965_dump_regs(device_t dev)
 793 {
 794         struct agp_i810_softc *sc = device_get_softc(dev);
 795
 796         device_printf(dev, "AGP_I965_PGTBL_CTL2: %08x\n",
 797             bus_read_4(sc->sc_res[0], AGP_I965_PGTBL_CTL2));
 798         device_printf(dev, "AGP_I855_GCC1: 0x%02x\n",
 799             pci_read_config(sc->bdev, AGP_I855_GCC1, 1));
 800         device_printf(dev, "AGP_I965_MSAC: 0x%02x\n",
 801             pci_read_config(sc->bdev, AGP_I965_MSAC, 1));
 802 }
 803
 804 static void
 805 agp_sb_dump_regs(device_t dev)
 806 {
 807         struct agp_i810_softc *sc = device_get_softc(dev);
 808
 809         device_printf(dev, "AGP_SNB_GFX_MODE: %08x\n",
 810             bus_read_4(sc->sc_res[0], AGP_SNB_GFX_MODE));
 811         device_printf(dev, "AGP_SNB_GCC1: 0x%04x\n",
 812             pci_read_config(sc->bdev, AGP_SNB_GCC1, 2));
 813 }
 814
 815 static int
 816 agp_i915_get_stolen_size(device_t dev)
 817 {
 818         struct agp_i810_softc *sc;
 819         unsigned int gcc1, stolen, gtt_size;
 820
 821         sc = device_get_softc(dev);
 822
 823         /*
 824          * Stolen memory is set up at the beginning of the aperture by
 825          * the BIOS, consisting of the GATT followed by 4kb for the
 826          * BIOS display.
 827          */
 828         switch (sc->match->driver->chiptype) {
 829         case CHIP_I855:
 830                 gtt_size = 128;
 831                 break;
 832         case CHIP_I915:
 833                 gtt_size = 256;
 834                 break;
 835         case CHIP_I965:
 836                 switch (bus_read_4(sc->sc_res[0], AGP_I810_PGTBL_CTL) &
 837                         AGP_I810_PGTBL_SIZE_MASK) {
 838                 case AGP_I810_PGTBL_SIZE_128KB:
 839                         gtt_size = 128;
 840                         break;
 841                 case AGP_I810_PGTBL_SIZE_256KB:
 842                         gtt_size = 256;
 843                         break;
 844                 case AGP_I810_PGTBL_SIZE_512KB:
 845                         gtt_size = 512;
 846                         break;
 847                 case AGP_I965_PGTBL_SIZE_1MB:
 848                         gtt_size = 1024;
 849                         break;
 850                 case AGP_I965_PGTBL_SIZE_2MB:
 851                         gtt_size = 2048;
 852                         break;
 853                 case AGP_I965_PGTBL_SIZE_1_5MB:
 854                         gtt_size = 1024 + 512;
 855                         break;
 856                 default:
 857                         device_printf(dev, "Bad PGTBL size\n");
 858                         return (EINVAL);
 859                 }
 860                 break;
 861         case CHIP_G33:
 862                 gcc1 = pci_read_config(sc->bdev, AGP_I855_GCC1, 2);
 863                 switch (gcc1 & AGP_G33_MGGC_GGMS_MASK) {
 864                 case AGP_G33_MGGC_GGMS_SIZE_1M:
 865                         gtt_size = 1024;
 866                         break;
 867                 case AGP_G33_MGGC_GGMS_SIZE_2M:
 868                         gtt_size = 2048;
 869                         break;
 870                 default:
 871                         device_printf(dev, "Bad PGTBL size\n");
 872                         return (EINVAL);
 873                 }
 874                 break;
 875         case CHIP_IGD:
 876         case CHIP_G4X:
 877                 gtt_size = 0;
 878                 break;
 879         default:
 880                 device_printf(dev, "Bad chiptype\n");
 881                 return (EINVAL);
 882         }
 883
 884         /* GCC1 is called MGGC on i915+ */
 885         gcc1 = pci_read_config(sc->bdev, AGP_I855_GCC1, 1);
 886         switch (gcc1 & AGP_I855_GCC1_GMS) {
 887         case AGP_I855_GCC1_GMS_STOLEN_1M:
 888                 stolen = 1024;
 889                 break;
 890         case AGP_I855_GCC1_GMS_STOLEN_4M:
 891                 stolen = 4 * 1024;
 892                 break;
 893         case AGP_I855_GCC1_GMS_STOLEN_8M:
 894                 stolen = 8 * 1024;
 895                 break;
 896         case AGP_I855_GCC1_GMS_STOLEN_16M:
 897                 stolen = 16 * 1024;
 898                 break;
 899         case AGP_I855_GCC1_GMS_STOLEN_32M:
 900                 stolen = 32 * 1024;
 901                 break;
 902         case AGP_I915_GCC1_GMS_STOLEN_48M:
 903                 stolen = sc->match->driver->gen > 2 ? 48 * 1024 : 0;
 904                 break;
 905         case AGP_I915_GCC1_GMS_STOLEN_64M:
 906                 stolen = sc->match->driver->gen > 2 ? 64 * 1024 : 0;
 907                 break;
 908         case AGP_G33_GCC1_GMS_STOLEN_128M:
 909                 stolen = sc->match->driver->gen > 2 ? 128 * 1024 : 0;
 910                 break;
 911         case AGP_G33_GCC1_GMS_STOLEN_256M:
 912                 stolen = sc->match->driver->gen > 2 ? 256 * 1024 : 0;
 913                 break;
 914         case AGP_G4X_GCC1_GMS_STOLEN_96M:
 915                 if (sc->match->driver->chiptype == CHIP_I965 ||
 916                     sc->match->driver->chiptype == CHIP_G4X)
 917                         stolen = 96 * 1024;
 918                 else
 919                         stolen = 0;
 920                 break;
 921         case AGP_G4X_GCC1_GMS_STOLEN_160M:
 922                 if (sc->match->driver->chiptype == CHIP_I965 ||
 923                     sc->match->driver->chiptype == CHIP_G4X)
 924                         stolen = 160 * 1024;
 925                 else
 926                         stolen = 0;
 927                 break;
 928         case AGP_G4X_GCC1_GMS_STOLEN_224M:
 929                 if (sc->match->driver->chiptype == CHIP_I965 ||
 930                     sc->match->driver->chiptype == CHIP_G4X)
 931                         stolen = 224 * 1024;
 932                 else
 933                         stolen = 0;
 934                 break;
 935         case AGP_G4X_GCC1_GMS_STOLEN_352M:
 936                 if (sc->match->driver->chiptype == CHIP_I965 ||
 937                     sc->match->driver->chiptype == CHIP_G4X)
 938                         stolen = 352 * 1024;
 939                 else
 940                         stolen = 0;
 941                 break;
 942         default:
 943                 device_printf(dev,
 944                     "unknown memory configuration, disabling (GCC1 %x)\n",
 945                     gcc1);
 946                 return (EINVAL);
 947         }
 948
 949         gtt_size += 4;
 950         sc->stolen_size = stolen * 1024;
 951         sc->stolen = (stolen - gtt_size) * 1024 / 4096;
 952
 953         return (0);
 954 }
 955
 956 static int
 957 agp_sb_get_stolen_size(device_t dev)
 958 {
 959         struct agp_i810_softc *sc;
 960         uint16_t gmch_ctl;
 961
 962         sc = device_get_softc(dev);
 963         gmch_ctl = pci_read_config(sc->bdev, AGP_SNB_GCC1, 2);
 964         switch (gmch_ctl & AGP_SNB_GMCH_GMS_STOLEN_MASK) {
 965         case AGP_SNB_GMCH_GMS_STOLEN_32M:
 966                 sc->stolen_size = 32 * 1024 * 1024;
 967                 break;
 968         case AGP_SNB_GMCH_GMS_STOLEN_64M:
 969                 sc->stolen_size = 64 * 1024 * 1024;
 970                 break;
 971         case AGP_SNB_GMCH_GMS_STOLEN_96M:
 972                 sc->stolen_size = 96 * 1024 * 1024;
 973                 break;
 974         case AGP_SNB_GMCH_GMS_STOLEN_128M:
 975                 sc->stolen_size = 128 * 1024 * 1024;
 976                 break;
 977         case AGP_SNB_GMCH_GMS_STOLEN_160M:
 978                 sc->stolen_size = 160 * 1024 * 1024;
 979                 break;
 980         case AGP_SNB_GMCH_GMS_STOLEN_192M:
 981                 sc->stolen_size = 192 * 1024 * 1024;
 982                 break;
 983         case AGP_SNB_GMCH_GMS_STOLEN_224M:
 984                 sc->stolen_size = 224 * 1024 * 1024;
 985                 break;
 986         case AGP_SNB_GMCH_GMS_STOLEN_256M:
 987                 sc->stolen_size = 256 * 1024 * 1024;
 988                 break;
 989         case AGP_SNB_GMCH_GMS_STOLEN_288M:
 990                 sc->stolen_size = 288 * 1024 * 1024;
 991                 break;
 992         case AGP_SNB_GMCH_GMS_STOLEN_320M:
 993                 sc->stolen_size = 320 * 1024 * 1024;
 994                 break;
 995         case AGP_SNB_GMCH_GMS_STOLEN_352M:
 996                 sc->stolen_size = 352 * 1024 * 1024;
 997                 break;
 998         case AGP_SNB_GMCH_GMS_STOLEN_384M:
 999                 sc->stolen_size = 384 * 1024 * 1024;
1000                 break;
1001         case AGP_SNB_GMCH_GMS_STOLEN_416M:
1002                 sc->stolen_size = 416 * 1024 * 1024;
1003                 break;
1004         case AGP_SNB_GMCH_GMS_STOLEN_448M:
1005                 sc->stolen_size = 448 * 1024 * 1024;
1006                 break;
1007         case AGP_SNB_GMCH_GMS_STOLEN_480M:
1008                 sc->stolen_size = 480 * 1024 * 1024;
1009                 break;
1010         case AGP_SNB_GMCH_GMS_STOLEN_512M:
1011                 sc->stolen_size = 512 * 1024 * 1024;
1012                 break;
1013         }
1014         sc->stolen = (sc->stolen_size - 4) / 4096;
1015         return (0);
1016 }
1017
1018 static int
1019 agp_gen8_get_stolen_size(device_t dev)
1020 {
1021         struct agp_i810_softc *sc;
1022         uint16_t gcc1;
1023         int v;
1024
1025         sc = device_get_softc(dev);
1026         gcc1 = pci_read_config(sc->bdev, AGP_SNB_GCC1, 2);
1027         v = (gcc1 >> 8) & 0xFF;
1028         sc->stolen_size = v * (32L * 1024 * 1024);      /* 32MB increments */
1029         kprintf("GTT STOLEN %ld\n", (long)sc->stolen_size);
1030
1031         return 0;
1032 }
1033
1034 static int
1035 agp_i915_get_gtt_mappable_entries(device_t dev)
1036 {
1037         struct agp_i810_softc *sc;
1038         uint32_t ap;
1039
1040         sc = device_get_softc(dev);
1041         ap = AGP_GET_APERTURE(dev);
1042         sc->gtt_mappable_entries = ap >> AGP_PAGE_SHIFT;
1043         return (0);
1044 }
1045
1046 static int
1047 agp_i810_get_gtt_total_entries(device_t dev)
1048 {
1049         struct agp_i810_softc *sc;
1050
1051         sc = device_get_softc(dev);
1052         sc->gtt_total_entries = sc->gtt_mappable_entries;
1053         return (0);
1054 }
1055
1056 static int
1057 agp_i965_get_gtt_total_entries(device_t dev)
1058 {
1059         struct agp_i810_softc *sc;
1060         uint32_t pgetbl_ctl;
1061         int error;
1062
1063         sc = device_get_softc(dev);
1064         error = 0;
1065         pgetbl_ctl = bus_read_4(sc->sc_res[0], AGP_I810_PGTBL_CTL);
1066         switch (pgetbl_ctl & AGP_I810_PGTBL_SIZE_MASK) {
1067         case AGP_I810_PGTBL_SIZE_128KB:
1068                 sc->gtt_total_entries = 128 * 1024 / 4;
1069                 break;
1070         case AGP_I810_PGTBL_SIZE_256KB:
1071                 sc->gtt_total_entries = 256 * 1024 / 4;
1072                 break;
1073         case AGP_I810_PGTBL_SIZE_512KB:
1074                 sc->gtt_total_entries = 512 * 1024 / 4;
1075                 break;
1076         /* GTT pagetable sizes bigger than 512KB are not possible on G33! */
1077         case AGP_I810_PGTBL_SIZE_1MB:
1078                 sc->gtt_total_entries = 1024 * 1024 / 4;
1079                 break;
1080         case AGP_I810_PGTBL_SIZE_2MB:
1081                 sc->gtt_total_entries = 2 * 1024 * 1024 / 4;
1082                 break;
1083         case AGP_I810_PGTBL_SIZE_1_5MB:
1084                 sc->gtt_total_entries = (1024 + 512) * 1024 / 4;
1085                 break;
1086         default:
1087                 device_printf(dev, "Unknown page table size\n");
1088                 error = ENXIO;
1089         }
1090         return (error);
1091 }
1092
1093 static void
1094 agp_gen5_adjust_pgtbl_size(device_t dev, uint32_t sz)
1095 {
1096         struct agp_i810_softc *sc;
1097         uint32_t pgetbl_ctl, pgetbl_ctl2;
1098
1099         sc = device_get_softc(dev);
1100
1101         /* Disable per-process page table. */
1102         pgetbl_ctl2 = bus_read_4(sc->sc_res[0], AGP_I965_PGTBL_CTL2);
1103         pgetbl_ctl2 &= ~AGP_I810_PGTBL_ENABLED;
1104         bus_write_4(sc->sc_res[0], AGP_I965_PGTBL_CTL2, pgetbl_ctl2);
1105
1106         /* Write the new ggtt size. */
1107         pgetbl_ctl = bus_read_4(sc->sc_res[0], AGP_I810_PGTBL_CTL);
1108         pgetbl_ctl &= ~AGP_I810_PGTBL_SIZE_MASK;
1109         pgetbl_ctl |= sz;
1110         bus_write_4(sc->sc_res[0], AGP_I810_PGTBL_CTL, pgetbl_ctl);
1111 }
1112
1113 static int
1114 agp_gen5_get_gtt_total_entries(device_t dev)
1115 {
1116         struct agp_i810_softc *sc;
1117         uint16_t gcc1;
1118
1119         sc = device_get_softc(dev);
1120
1121         gcc1 = pci_read_config(sc->bdev, AGP_I830_GCC1, 2);
1122         switch (gcc1 & AGP_G4x_GCC1_SIZE_MASK) {
1123         case AGP_G4x_GCC1_SIZE_1M:
1124         case AGP_G4x_GCC1_SIZE_VT_1M:
1125                 agp_gen5_adjust_pgtbl_size(dev, AGP_I810_PGTBL_SIZE_1MB);
1126                 break;
1127         case AGP_G4x_GCC1_SIZE_VT_1_5M:
1128                 agp_gen5_adjust_pgtbl_size(dev, AGP_I810_PGTBL_SIZE_1_5MB);
1129                 break;
1130         case AGP_G4x_GCC1_SIZE_2M:
1131         case AGP_G4x_GCC1_SIZE_VT_2M:
1132                 agp_gen5_adjust_pgtbl_size(dev, AGP_I810_PGTBL_SIZE_2MB);
1133                 break;
1134         default:
1135                 device_printf(dev, "Unknown page table size\n");
1136                 return (ENXIO);
1137         }
1138
1139         return (agp_i965_get_gtt_total_entries(dev));
1140 }
1141
1142 static int
1143 agp_sb_get_gtt_total_entries(device_t dev)
1144 {
1145         struct agp_i810_softc *sc;
1146         uint16_t gcc1;
1147
1148         sc = device_get_softc(dev);
1149
1150         gcc1 = pci_read_config(sc->bdev, AGP_SNB_GCC1, 2);
1151         switch (gcc1 & AGP_SNB_GTT_SIZE_MASK) {
1152         default:
1153         case AGP_SNB_GTT_SIZE_0M:
1154                 kprintf("Bad GTT size mask: 0x%04x\n", gcc1);
1155                 return (ENXIO);
1156         case AGP_SNB_GTT_SIZE_1M:
1157                 sc->gtt_total_entries = 1024 * 1024 / 4;
1158                 break;
1159         case AGP_SNB_GTT_SIZE_2M:
1160                 sc->gtt_total_entries = 2 * 1024 * 1024 / 4;
1161                 break;
1162         }
1163         return (0);
1164 }
1165
1166 static int
1167 agp_gen8_get_gtt_total_entries(device_t dev)
1168 {
1169         struct agp_i810_softc *sc;
1170         uint16_t gcc1;
1171         int v;
1172
1173         sc = device_get_softc(dev);
1174
1175         gcc1 = pci_read_config(sc->bdev, AGP_SNB_GCC1, 2);
1176         v = (gcc1 >> 6) & 3;
1177         if (v)
1178                 v = 1 << v;
1179         sc->gtt_total_entries = (v << 20) / 8;
1180
1181         /*
1182          * XXX limit to 2GB due to misc integer overflows calculated on
1183          * this field.
1184          */
1185         while ((long)sc->gtt_total_entries * PAGE_SIZE >= 4LL*1024*1024*1024)
1186                 sc->gtt_total_entries >>= 1;
1187
1188         kprintf("GTT SIZE %ld representing %ldM vmap\n",
1189                 (long)sc->gtt_total_entries * 8,
1190                 (long)sc->gtt_total_entries * PAGE_SIZE);
1191
1192         return 0;
1193 }
1194
1195 static int
1196 agp_i830_install_gatt(device_t dev)
1197 {
1198         struct agp_i810_softc *sc;
1199         uint32_t pgtblctl;
1200
1201         sc = device_get_softc(dev);
1202
1203         /*
1204          * The i830 automatically initializes the 128k gatt on boot.
1205          * GATT address is already in there, make sure it's enabled.
1206          */
1207         pgtblctl = bus_read_4(sc->sc_res[0], AGP_I810_PGTBL_CTL);
1208         pgtblctl |= 1;
1209         bus_write_4(sc->sc_res[0], AGP_I810_PGTBL_CTL, pgtblctl);
1210
1211         sc->gatt->ag_physical = pgtblctl & ~1;
1212         return (0);
1213 }
1214
1215 static int
1216 agp_i810_attach(device_t dev)
1217 {
1218         struct agp_i810_softc *sc;
1219         int error;
1220
1221         sc = device_get_softc(dev);
1222         sc->bdev = agp_i810_find_bridge(dev);
1223         if (sc->bdev == NULL)
1224                 return (ENOENT);
1225
1226         sc->match = agp_i810_match(dev);
1227
1228         agp_set_aperture_resource(dev, sc->match->driver->gen <= 2 ?
1229             AGP_APBASE : AGP_I915_GMADR);
1230         error = agp_generic_attach(dev);
1231         if (error)
1232                 return (error);
1233
1234         if (ptoa((vm_paddr_t)Maxmem) >
1235             (1ULL << sc->match->driver->busdma_addr_mask_sz) - 1) {
1236                 device_printf(dev, "agp_i810 does not support physical "
1237                     "memory above %ju.\n", (uintmax_t)(1ULL <<
1238                     sc->match->driver->busdma_addr_mask_sz) - 1);
1239                 return (ENOENT);
1240         }
1241
1242         if (bus_alloc_resources(dev, sc->match->driver->res_spec, sc->sc_res)) {
1243                 agp_generic_detach(dev);
1244                 return (ENODEV);
1245         }
1246
1247         sc->initial_aperture = AGP_GET_APERTURE(dev);
1248         sc->gatt = kmalloc(sizeof(struct agp_gatt), M_AGP, M_WAITOK);
1249         sc->gatt->ag_entries = AGP_GET_APERTURE(dev) >> AGP_PAGE_SHIFT;
1250
1251         if ((error = sc->match->driver->get_stolen_size(dev)) != 0 ||
1252             (error = sc->match->driver->install_gatt(dev)) != 0 ||
1253             (error = sc->match->driver->get_gtt_mappable_entries(dev)) != 0 ||
1254             (error = sc->match->driver->get_gtt_total_entries(dev)) != 0 ||
1255             (error = sc->match->driver->chipset_flush_setup(dev)) != 0) {
1256                 bus_release_resources(dev, sc->match->driver->res_spec,
1257                     sc->sc_res);
1258                 kfree(sc->gatt, M_AGP);
1259                 agp_generic_detach(dev);
1260                 return (error);
1261         }
1262
1263         intel_agp = dev;
1264         device_printf(dev, "aperture size is %dM",
1265             sc->initial_aperture / 1024 / 1024);
1266         if (sc->stolen > 0)
1267                 kprintf(", detected %dk stolen memory\n", sc->stolen * 4);
1268         else
1269                 kprintf("\n");
1270         if (bootverbose) {
1271                 sc->match->driver->dump_regs(dev);
1272                 device_printf(dev, "Mappable GTT entries: %d\n",
1273                     sc->gtt_mappable_entries);
1274                 device_printf(dev, "Total GTT entries: %d\n",
1275                     sc->gtt_total_entries);
1276         }
1277         return (0);
1278 }
1279
1280 static void
1281 agp_i830_deinstall_gatt(device_t dev)
1282 {
1283         struct agp_i810_softc *sc;
1284         unsigned int pgtblctl;
1285
1286         sc = device_get_softc(dev);
1287         pgtblctl = bus_read_4(sc->sc_res[0], AGP_I810_PGTBL_CTL);
1288         pgtblctl &= ~1;
1289         bus_write_4(sc->sc_res[0], AGP_I810_PGTBL_CTL, pgtblctl);
1290 }
1291
1292 static int
1293 agp_i810_detach(device_t dev)
1294 {
1295         struct agp_i810_softc *sc;
1296
1297         sc = device_get_softc(dev);
1298         agp_free_cdev(dev);
1299
1300         /* Clear the GATT base. */
1301         sc->match->driver->deinstall_gatt(dev);
1302
1303         sc->match->driver->chipset_flush_teardown(dev);
1304
1305         /* Put the aperture back the way it started. */
1306         AGP_SET_APERTURE(dev, sc->initial_aperture);
1307
1308         kfree(sc->gatt, M_AGP);
1309         bus_release_resources(dev, sc->match->driver->res_spec, sc->sc_res);
1310         agp_free_res(dev);
1311
1312         return (0);
1313 }
1314
1315 static int
1316 agp_i810_resume(device_t dev)
1317 {
1318         struct agp_i810_softc *sc;
1319         sc = device_get_softc(dev);
1320
1321         AGP_SET_APERTURE(dev, sc->initial_aperture);
1322
1323         /* Install the GATT. */
1324         bus_write_4(sc->sc_res[0], AGP_I810_PGTBL_CTL,
1325         sc->gatt->ag_physical | 1);
1326
1327         return (bus_generic_resume(dev));
1328 }
1329
1330 /**
1331  * Sets the PCI resource size of the aperture on i830-class and below chipsets,
1332  * while returning failure on later chipsets when an actual change is
1333  * requested.
1334  *
1335  * This whole function is likely bogus, as the kernel would probably need to
1336  * reconfigure the placement of the AGP aperture if a larger size is requested,
1337  * which doesn't happen currently.
1338  */
1339
1340 static int
1341 agp_i915_set_aperture(device_t dev, u_int32_t aperture)
1342 {
1343
1344         return (agp_generic_set_aperture(dev, aperture));
1345 }
1346
1347 static int
1348 agp_i810_method_set_aperture(device_t dev, u_int32_t aperture)
1349 {
1350         struct agp_i810_softc *sc;
1351
1352         sc = device_get_softc(dev);
1353         return (sc->match->driver->set_aperture(dev, aperture));
1354 }
1355
1356 /**
1357  * Writes a GTT entry mapping the page at the given offset from the
1358  * beginning of the aperture to the given physical address.  Setup the
1359  * caching mode according to flags.
1360  *
1361  * For gen 1, 2 and 3, GTT start is located at AGP_I810_GTT offset
1362  * from corresponding BAR start. For gen 4, offset is 512KB +
1363  * AGP_I810_GTT, for gen 5 and 6 it is 2MB + AGP_I810_GTT.
1364  *
1365  * Also, the bits of the physical page address above 4GB needs to be
1366  * placed into bits 40-32 of PTE.
1367  */
1368 static void
1369 agp_i915_install_gtt_pte(device_t dev, u_int index, vm_offset_t physical,
1370     int flags)
1371 {
1372         uint32_t pte;
1373
1374         pte = (u_int32_t)physical | I810_PTE_VALID;
1375         if (flags == AGP_USER_CACHED_MEMORY)
1376                 pte |= I830_PTE_SYSTEM_CACHED;
1377
1378         agp_i915_write_gtt(dev, index, pte);
1379 }
1380
1381 static void
1382 agp_i915_write_gtt(device_t dev, u_int index, uint32_t pte)
1383 {
1384         struct agp_i810_softc *sc;
1385
1386         sc = device_get_softc(dev);
1387         bus_write_4(sc->sc_res[1], index * 4, pte);
1388 }
1389
1390 static void
1391 agp_i965_install_gtt_pte(device_t dev, u_int index, vm_offset_t physical,
1392     int flags)
1393 {
1394         uint32_t pte;
1395
1396         pte = (u_int32_t)physical | I810_PTE_VALID;
1397         if (flags == AGP_USER_CACHED_MEMORY)
1398                 pte |= I830_PTE_SYSTEM_CACHED;
1399
1400         pte |= (physical >> 28) & 0xf0;
1401         agp_i965_write_gtt(dev, index, pte);
1402 }
1403
1404 static void
1405 agp_i965_write_gtt(device_t dev, u_int index, uint32_t pte)
1406 {
1407         struct agp_i810_softc *sc;
1408
1409         sc = device_get_softc(dev);
1410         bus_write_4(sc->sc_res[0], index * 4 + (512 * 1024), pte);
1411 }
1412
1413 static void
1414 agp_g4x_install_gtt_pte(device_t dev, u_int index, vm_offset_t physical,
1415     int flags)
1416 {
1417         uint32_t pte;
1418
1419         pte = (u_int32_t)physical | I810_PTE_VALID;
1420         if (flags == AGP_USER_CACHED_MEMORY)
1421                 pte |= I830_PTE_SYSTEM_CACHED;
1422
1423         pte |= (physical >> 28) & 0xf0;
1424         agp_g4x_write_gtt(dev, index, pte);
1425 }
1426
1427 static void
1428 agp_g4x_write_gtt(device_t dev, u_int index, uint32_t pte)
1429 {
1430         struct agp_i810_softc *sc;
1431
1432         sc = device_get_softc(dev);
1433         bus_write_4(sc->sc_res[0], index * 4 + (2 * 1024 * 1024), pte);
1434 }
1435
1436 static void
1437 agp_sb_install_gtt_pte(device_t dev, u_int index,
1438                        vm_offset_t physical, int flags)
1439 {
1440         int type_mask, gfdt;
1441         uint32_t pte;
1442
1443         pte = (u_int32_t)physical | I810_PTE_VALID;
1444         type_mask = flags & ~AGP_USER_CACHED_MEMORY_GFDT;
1445         gfdt = (flags & AGP_USER_CACHED_MEMORY_GFDT) != 0 ? GEN6_PTE_GFDT : 0;
1446
1447         if (type_mask == AGP_USER_MEMORY)
1448                 pte |= GEN6_PTE_UNCACHED;
1449         else if (type_mask == AGP_USER_CACHED_MEMORY_LLC_MLC)
1450                 pte |= GEN6_PTE_LLC_MLC | gfdt;
1451         else
1452                 pte |= GEN6_PTE_LLC | gfdt;
1453
1454         pte |= (physical & 0x000000ff00000000ull) >> 28;
1455         agp_sb_write_gtt(dev, index, pte);
1456 }
1457
1458 static void
1459 agp_gen8_install_gtt_pte(device_t dev, u_int index,
1460                        vm_offset_t physical, int flags)
1461 {
1462         struct agp_i810_softc *sc;
1463         int type_mask;
1464         uint64_t pte;
1465
1466         pte = (u_int64_t)physical | GEN8_PTE_PRESENT | GEN8_PTE_RW;
1467         type_mask = flags & ~AGP_USER_CACHED_MEMORY_GFDT;
1468
1469         if (type_mask == AGP_USER_MEMORY)
1470                 pte |= GEN8_PTE_PWT;    /* XXX */
1471         else if (type_mask == AGP_USER_CACHED_MEMORY_LLC_MLC)
1472                 pte |= GEN8_PTE_PWT;    /* XXX */
1473         else
1474                 pte |= GEN8_PTE_PWT;    /* XXX */
1475
1476         sc = device_get_softc(dev);
1477         bus_write_4(sc->sc_res[0], index * 8 + (2 * 1024 * 1024),
1478                     (uint32_t)pte);
1479         bus_write_4(sc->sc_res[0], index * 8 + (2 * 1024 * 1024) + 4,
1480                     (uint32_t)(pte >> 32));
1481 }
1482
1483 static void
1484 agp_sb_write_gtt(device_t dev, u_int index, uint32_t pte)
1485 {
1486         struct agp_i810_softc *sc;
1487
1488         sc = device_get_softc(dev);
1489         bus_write_4(sc->sc_res[0], index * 4 + (2 * 1024 * 1024), pte);
1490 }
1491
1492 static int
1493 agp_i810_bind_page(device_t dev, vm_offset_t offset, vm_offset_t physical)
1494 {
1495         struct agp_i810_softc *sc = device_get_softc(dev);
1496         u_int index;
1497
1498         if (offset >= (sc->gatt->ag_entries << AGP_PAGE_SHIFT)) {
1499                 device_printf(dev, "failed: offset is 0x%08jx, "
1500                     "shift is %d, entries is %d\n", (intmax_t)offset,
1501                     AGP_PAGE_SHIFT, sc->gatt->ag_entries);
1502                 return (EINVAL);
1503         }
1504         index = offset >> AGP_PAGE_SHIFT;
1505         if (sc->stolen != 0 && index < sc->stolen) {
1506                 device_printf(dev, "trying to bind into stolen memory\n");
1507                 return (EINVAL);
1508         }
1509         sc->match->driver->install_gtt_pte(dev, index, physical, 0);
1510         return (0);
1511 }
1512
1513 static int
1514 agp_i810_unbind_page(device_t dev, vm_offset_t offset)
1515 {
1516         struct agp_i810_softc *sc;
1517         u_int index;
1518
1519         sc = device_get_softc(dev);
1520         if (offset >= (sc->gatt->ag_entries << AGP_PAGE_SHIFT))
1521                 return (EINVAL);
1522         index = offset >> AGP_PAGE_SHIFT;
1523         if (sc->stolen != 0 && index < sc->stolen) {
1524                 device_printf(dev, "trying to unbind from stolen memory\n");
1525                 return (EINVAL);
1526         }
1527         sc->match->driver->install_gtt_pte(dev, index, 0, 0);
1528         return (0);
1529 }
1530
1531 static void
1532 agp_i915_sync_gtt_pte(device_t dev, u_int index)
1533 {
1534         struct agp_i810_softc *sc;
1535
1536         sc = device_get_softc(dev);
1537         bus_read_4(sc->sc_res[1], index * 4);
1538 }
1539
1540 static void
1541 agp_i965_sync_gtt_pte(device_t dev, u_int index)
1542 {
1543         struct agp_i810_softc *sc;
1544
1545         sc = device_get_softc(dev);
1546         bus_read_4(sc->sc_res[0], index * 4 + (512 * 1024));
1547 }
1548
1549 static void
1550 agp_g4x_sync_gtt_pte(device_t dev, u_int index)
1551 {
1552         struct agp_i810_softc *sc;
1553
1554         sc = device_get_softc(dev);
1555         bus_read_4(sc->sc_res[0], index * 4 + (2 * 1024 * 1024));
1556 }
1557
1558 /*
1559  * Writing via memory mapped registers already flushes all TLBs.
1560  */
1561 static void
1562 agp_i810_flush_tlb(device_t dev)
1563 {
1564 }
1565
1566 static int
1567 agp_i810_enable(device_t dev, u_int32_t mode)
1568 {
1569
1570         return (0);
1571 }
1572
1573 static struct agp_memory *
1574 agp_i810_alloc_memory(device_t dev, int type, vm_size_t size)
1575 {
1576         struct agp_i810_softc *sc;
1577         struct agp_memory *mem;
1578         vm_page_t m;
1579
1580         sc = device_get_softc(dev);
1581
1582         if ((size & (AGP_PAGE_SIZE - 1)) != 0 ||
1583             sc->agp.as_allocated + size > sc->agp.as_maxmem)
1584                 return (0);
1585
1586         if (type == 1) {
1587                 /*
1588                  * Mapping local DRAM into GATT.
1589                  */
1590                 if (sc->match->driver->chiptype != CHIP_I810)
1591                         return (0);
1592                 if (size != sc->dcache_size)
1593                         return (0);
1594         } else if (type == 2) {
1595                 /*
1596                  * Type 2 is the contiguous physical memory type, that hands
1597                  * back a physical address.  This is used for cursors on i810.
1598                  * Hand back as many single pages with physical as the user
1599                  * wants, but only allow one larger allocation (ARGB cursor)
1600                  * for simplicity.
1601                  */
1602                 if (size != AGP_PAGE_SIZE) {
1603                         if (sc->argb_cursor != NULL)
1604                                 return (0);
1605
1606                         /* Allocate memory for ARGB cursor, if we can. */
1607                         sc->argb_cursor = contigmalloc(size, M_AGP,
1608                            0, 0, ~0, PAGE_SIZE, 0);
1609                         if (sc->argb_cursor == NULL)
1610                                 return (0);
1611                 }
1612         }
1613
1614         mem = kmalloc(sizeof *mem, M_AGP, M_INTWAIT);
1615         mem->am_id = sc->agp.as_nextid++;
1616         mem->am_size = size;
1617         mem->am_type = type;
1618         if (type != 1 && (type != 2 || size == AGP_PAGE_SIZE))
1619                 mem->am_obj = vm_object_allocate(OBJT_DEFAULT,
1620                     atop(round_page(size)));
1621         else
1622                 mem->am_obj = 0;
1623
1624         if (type == 2) {
1625                 if (size == AGP_PAGE_SIZE) {
1626                         /*
1627                          * Allocate and wire down the page now so that we can
1628                          * get its physical address.
1629                          */
1630                         VM_OBJECT_LOCK(mem->am_obj);
1631                         m = vm_page_grab(mem->am_obj, 0, VM_ALLOC_NORMAL |
1632                                                          VM_ALLOC_ZERO |
1633                                                          VM_ALLOC_RETRY);
1634                         vm_page_wire(m);
1635                         VM_OBJECT_UNLOCK(mem->am_obj);
1636                         mem->am_physical = VM_PAGE_TO_PHYS(m);
1637                         vm_page_wakeup(m);
1638                 } else {
1639                         /* Our allocation is already nicely wired down for us.
1640                          * Just grab the physical address.
1641                          */
1642                         mem->am_physical = vtophys(sc->argb_cursor);
1643                 }
1644         } else
1645                 mem->am_physical = 0;
1646
1647         mem->am_offset = 0;
1648         mem->am_is_bound = 0;
1649         TAILQ_INSERT_TAIL(&sc->agp.as_memory, mem, am_link);
1650         sc->agp.as_allocated += size;
1651
1652         return (mem);
1653 }
1654
1655 static int
1656 agp_i810_free_memory(device_t dev, struct agp_memory *mem)
1657 {
1658         struct agp_i810_softc *sc;
1659
1660         if (mem->am_is_bound)
1661                 return (EBUSY);
1662
1663         sc = device_get_softc(dev);
1664
1665         if (mem->am_type == 2) {
1666                 if (mem->am_size == AGP_PAGE_SIZE) {
1667                         /*
1668                          * Unwire the page which we wired in alloc_memory.
1669                          */
1670                         vm_page_t m;
1671
1672                         vm_object_hold(mem->am_obj);
1673                         m = vm_page_lookup_busy_wait(mem->am_obj, 0,
1674                                                      FALSE, "agppg");
1675                         vm_object_drop(mem->am_obj);
1676                         vm_page_unwire(m, 0);
1677                         vm_page_wakeup(m);
1678                 } else {
1679                         contigfree(sc->argb_cursor, mem->am_size, M_AGP);
1680                         sc->argb_cursor = NULL;
1681                 }
1682         }
1683
1684         sc->agp.as_allocated -= mem->am_size;
1685         TAILQ_REMOVE(&sc->agp.as_memory, mem, am_link);
1686         if (mem->am_obj)
1687                 vm_object_deallocate(mem->am_obj);
1688         kfree(mem, M_AGP);
1689         return (0);
1690 }
1691
1692 static int
1693 agp_i810_bind_memory(device_t dev, struct agp_memory *mem, vm_offset_t offset)
1694 {
1695         struct agp_i810_softc *sc;
1696         vm_offset_t i;
1697
1698         /* Do some sanity checks first. */
1699         if ((offset & (AGP_PAGE_SIZE - 1)) != 0 ||
1700             offset + mem->am_size > AGP_GET_APERTURE(dev)) {
1701                 device_printf(dev, "binding memory at bad offset %#x\n",
1702                     (int)offset);
1703                 return (EINVAL);
1704         }
1705
1706         sc = device_get_softc(dev);
1707         if (mem->am_type == 2 && mem->am_size != AGP_PAGE_SIZE) {
1708                 lockmgr(&sc->agp.as_lock, LK_EXCLUSIVE);
1709                 if (mem->am_is_bound) {
1710                         lockmgr(&sc->agp.as_lock, LK_RELEASE);
1711                         return EINVAL;
1712                 }
1713                 /* The memory's already wired down, just stick it in the GTT. */
1714                 for (i = 0; i < mem->am_size; i += AGP_PAGE_SIZE) {
1715                         sc->match->driver->install_gtt_pte(dev, (offset + i) >>
1716                             AGP_PAGE_SHIFT, mem->am_physical + i, 0);
1717                 }
1718                 agp_flush_cache();
1719                 mem->am_offset = offset;
1720                 mem->am_is_bound = 1;
1721                 lockmgr(&sc->agp.as_lock, LK_RELEASE);
1722                 return (0);
1723         }
1724
1725         if (mem->am_type != 1)
1726                 return (agp_generic_bind_memory(dev, mem, offset));
1727
1728         /*
1729          * Mapping local DRAM into GATT.
1730          */
1731         if (sc->match->driver->chiptype != CHIP_I810)
1732                 return (EINVAL);
1733         for (i = 0; i < mem->am_size; i += AGP_PAGE_SIZE)
1734                 bus_write_4(sc->sc_res[0],
1735                     AGP_I810_GTT + (i >> AGP_PAGE_SHIFT) * 4, i | 3);
1736
1737         return (0);
1738 }
1739
1740 static int
1741 agp_i810_unbind_memory(device_t dev, struct agp_memory *mem)
1742 {
1743         struct agp_i810_softc *sc;
1744         vm_offset_t i;
1745
1746         sc = device_get_softc(dev);
1747
1748         if (mem->am_type == 2 && mem->am_size != AGP_PAGE_SIZE) {
1749                 lockmgr(&sc->agp.as_lock, LK_EXCLUSIVE);
1750                 if (!mem->am_is_bound) {
1751                         lockmgr(&sc->agp.as_lock, LK_RELEASE);
1752                         return (EINVAL);
1753                 }
1754
1755                 for (i = 0; i < mem->am_size; i += AGP_PAGE_SIZE) {
1756                         sc->match->driver->install_gtt_pte(dev,
1757                             (mem->am_offset + i) >> AGP_PAGE_SHIFT, 0, 0);
1758                 }
1759                 agp_flush_cache();
1760                 mem->am_is_bound = 0;
1761                 lockmgr(&sc->agp.as_lock, LK_RELEASE);
1762                 return (0);
1763         }
1764
1765         if (mem->am_type != 1)
1766                 return (agp_generic_unbind_memory(dev, mem));
1767
1768         if (sc->match->driver->chiptype != CHIP_I810)
1769                 return (EINVAL);
1770         for (i = 0; i < mem->am_size; i += AGP_PAGE_SIZE) {
1771                 sc->match->driver->install_gtt_pte(dev, i >> AGP_PAGE_SHIFT,
1772                     0, 0);
1773         }
1774         return (0);
1775 }
1776
1777 static device_method_t agp_i810_methods[] = {
1778         /* Device interface */
1779         DEVMETHOD(device_identify,      agp_i810_identify),
1780         DEVMETHOD(device_probe,         agp_i810_probe),
1781         DEVMETHOD(device_attach,        agp_i810_attach),
1782         DEVMETHOD(device_detach,        agp_i810_detach),
1783         DEVMETHOD(device_suspend,       bus_generic_suspend),
1784         DEVMETHOD(device_resume,        agp_i810_resume),
1785
1786         /* AGP interface */
1787         DEVMETHOD(agp_get_aperture,     agp_generic_get_aperture),
1788         DEVMETHOD(agp_set_aperture,     agp_i810_method_set_aperture),
1789         DEVMETHOD(agp_bind_page,        agp_i810_bind_page),
1790         DEVMETHOD(agp_unbind_page,      agp_i810_unbind_page),
1791         DEVMETHOD(agp_flush_tlb,        agp_i810_flush_tlb),
1792         DEVMETHOD(agp_enable,           agp_i810_enable),
1793         DEVMETHOD(agp_alloc_memory,     agp_i810_alloc_memory),
1794         DEVMETHOD(agp_free_memory,      agp_i810_free_memory),
1795         DEVMETHOD(agp_bind_memory,      agp_i810_bind_memory),
1796         DEVMETHOD(agp_unbind_memory,    agp_i810_unbind_memory),
1797         DEVMETHOD(agp_chipset_flush,    agp_intel_gtt_chipset_flush),
1798
1799         DEVMETHOD_END
1800 };
1801
1802 static driver_t agp_i810_driver = {
1803         "agp",
1804         agp_i810_methods,
1805         sizeof(struct agp_i810_softc),
1806 };
1807
1808 static devclass_t agp_devclass;
1809
1810 DRIVER_MODULE(agp_i810, vgapci, agp_i810_driver, agp_devclass, NULL, NULL);
1811 MODULE_DEPEND(agp_i810, agp, 1, 1, 1);
1812 MODULE_DEPEND(agp_i810, pci, 1, 1, 1);
1813
1814 extern vm_page_t bogus_page;
1815
1816 void
1817 agp_intel_gtt_clear_range(device_t dev, u_int first_entry, u_int num_entries)
1818 {
1819         struct agp_i810_softc *sc;
1820         u_int i;
1821
1822         sc = device_get_softc(dev);
1823         for (i = 0; i < num_entries; i++)
1824                 sc->match->driver->install_gtt_pte(dev, first_entry + i,
1825                     VM_PAGE_TO_PHYS(bogus_page), 0);
1826         sc->match->driver->sync_gtt_pte(dev, first_entry + num_entries - 1);
1827 }
1828
1829 void
1830 agp_intel_gtt_insert_pages(device_t dev, u_int first_entry, u_int num_entries,
1831     vm_page_t *pages, u_int flags)
1832 {
1833         struct agp_i810_softc *sc;
1834         u_int i;
1835
1836         sc = device_get_softc(dev);
1837         for (i = 0; i < num_entries; i++) {
1838                 KKASSERT(pages[i]->valid == VM_PAGE_BITS_ALL);
1839                 KKASSERT(pages[i]->wire_count > 0);
1840                 sc->match->driver->install_gtt_pte(dev, first_entry + i,
1841                     VM_PAGE_TO_PHYS(pages[i]), flags);
1842         }
1843         sc->match->driver->sync_gtt_pte(dev, first_entry + num_entries - 1);
1844 }
1845
1846 struct intel_gtt
1847 agp_intel_gtt_get(device_t dev)
1848 {
1849         struct agp_i810_softc *sc;
1850         struct intel_gtt res;
1851
1852         sc = device_get_softc(dev);
1853         res.stolen_size = sc->stolen_size;
1854         res.gtt_total_entries = sc->gtt_total_entries;
1855         res.gtt_mappable_entries = sc->gtt_mappable_entries;
1856         res.do_idle_maps = 0;
1857         res.scratch_page_dma = VM_PAGE_TO_PHYS(bogus_page);
1858         return (res);
1859 }
1860
1861 static int
1862 agp_i810_chipset_flush_setup(device_t dev)
1863 {
1864
1865         return (0);
1866 }
1867
1868 static void
1869 agp_i810_chipset_flush_teardown(device_t dev)
1870 {
1871
1872         /* Nothing to do. */
1873 }
1874
1875 static void
1876 agp_i810_chipset_flush(device_t dev)
1877 {
1878
1879         /* Nothing to do. */
1880 }
1881
1882 static int
1883 agp_i915_chipset_flush_alloc_page(device_t dev, uint64_t start, uint64_t end)
1884 {
1885         struct agp_i810_softc *sc;
1886         device_t vga;
1887
1888         sc = device_get_softc(dev);
1889         vga = device_get_parent(dev);
1890         sc->sc_flush_page_rid = 100;
1891         sc->sc_flush_page_res = BUS_ALLOC_RESOURCE(device_get_parent(vga), dev,
1892             SYS_RES_MEMORY, &sc->sc_flush_page_rid, start, end, PAGE_SIZE,
1893             RF_ACTIVE, -1);
1894         if (sc->sc_flush_page_res == NULL) {
1895                 device_printf(dev, "Failed to allocate flush page at 0x%jx\n",
1896                     (uintmax_t)start);
1897                 return (EINVAL);
1898         }
1899         sc->sc_flush_page_vaddr = rman_get_virtual(sc->sc_flush_page_res);
1900         if (bootverbose) {
1901                 device_printf(dev, "Allocated flush page phys 0x%jx virt %p\n",
1902                     (uintmax_t)rman_get_start(sc->sc_flush_page_res),
1903                     sc->sc_flush_page_vaddr);
1904         }
1905         return (0);
1906 }
1907
1908 static void
1909 agp_i915_chipset_flush_free_page(device_t dev)
1910 {
1911         struct agp_i810_softc *sc;
1912         device_t vga;
1913
1914         sc = device_get_softc(dev);
1915         vga = device_get_parent(dev);
1916         if (sc->sc_flush_page_res == NULL)
1917                 return;
1918         BUS_DEACTIVATE_RESOURCE(device_get_parent(vga), dev, SYS_RES_MEMORY,
1919             sc->sc_flush_page_rid, sc->sc_flush_page_res);
1920         BUS_RELEASE_RESOURCE(device_get_parent(vga), dev, SYS_RES_MEMORY,
1921             sc->sc_flush_page_rid, sc->sc_flush_page_res);
1922 }
1923
1924 static int
1925 agp_i915_chipset_flush_setup(device_t dev)
1926 {
1927         struct agp_i810_softc *sc;
1928         uint32_t temp;
1929         int error;
1930
1931         sc = device_get_softc(dev);
1932         temp = pci_read_config(sc->bdev, AGP_I915_IFPADDR, 4);
1933         if ((temp & 1) != 0) {
1934                 temp &= ~1;
1935                 if (bootverbose)
1936                         device_printf(dev,
1937                             "Found already configured flush page at 0x%jx\n",
1938                             (uintmax_t)temp);
1939                 sc->sc_bios_allocated_flush_page = 1;
1940                 /*
1941                  * In the case BIOS initialized the flush pointer (?)
1942                  * register, expect that BIOS also set up the resource
1943                  * for the page.
1944                  */
1945                 error = agp_i915_chipset_flush_alloc_page(dev, temp,
1946                     temp + PAGE_SIZE - 1);
1947                 if (error != 0)
1948                         return (error);
1949         } else {
1950                 sc->sc_bios_allocated_flush_page = 0;
1951                 error = agp_i915_chipset_flush_alloc_page(dev, 0, 0xffffffff);
1952                 if (error != 0)
1953                         return (error);
1954                 temp = rman_get_start(sc->sc_flush_page_res);
1955                 pci_write_config(sc->bdev, AGP_I915_IFPADDR, temp | 1, 4);
1956         }
1957         return (0);
1958 }
1959
1960 static void
1961 agp_i915_chipset_flush_teardown(device_t dev)
1962 {
1963         struct agp_i810_softc *sc;
1964         uint32_t temp;
1965
1966         sc = device_get_softc(dev);
1967         if (sc->sc_flush_page_res == NULL)
1968                 return;
1969         if (!sc->sc_bios_allocated_flush_page) {
1970                 temp = pci_read_config(sc->bdev, AGP_I915_IFPADDR, 4);
1971                 temp &= ~1;
1972                 pci_write_config(sc->bdev, AGP_I915_IFPADDR, temp, 4);
1973         }
1974         agp_i915_chipset_flush_free_page(dev);
1975 }
1976
1977 static int
1978 agp_i965_chipset_flush_setup(device_t dev)
1979 {
1980         struct agp_i810_softc *sc;
1981         uint64_t temp;
1982         uint32_t temp_hi, temp_lo;
1983         int error;
1984
1985         sc = device_get_softc(dev);
1986
1987         temp_hi = pci_read_config(sc->bdev, AGP_I965_IFPADDR + 4, 4);
1988         temp_lo = pci_read_config(sc->bdev, AGP_I965_IFPADDR, 4);
1989
1990         if ((temp_lo & 1) != 0) {
1991                 temp = ((uint64_t)temp_hi << 32) | (temp_lo & ~1);
1992                 if (bootverbose)
1993                         device_printf(dev,
1994                             "Found already configured flush page at 0x%jx\n",
1995                             (uintmax_t)temp);
1996                 sc->sc_bios_allocated_flush_page = 1;
1997                 /*
1998                  * In the case BIOS initialized the flush pointer (?)
1999                  * register, expect that BIOS also set up the resource
2000                  * for the page.
2001                  */
2002                 error = agp_i915_chipset_flush_alloc_page(dev, temp,
2003                     temp + PAGE_SIZE - 1);
2004                 if (error != 0)
2005                         return (error);
2006         } else {
2007                 sc->sc_bios_allocated_flush_page = 0;
2008                 error = agp_i915_chipset_flush_alloc_page(dev, 0, ~0);
2009                 if (error != 0)
2010                         return (error);
2011                 temp = rman_get_start(sc->sc_flush_page_res);
2012                 pci_write_config(sc->bdev, AGP_I965_IFPADDR + 4,
2013                     (temp >> 32) & UINT32_MAX, 4);
2014                 pci_write_config(sc->bdev, AGP_I965_IFPADDR,
2015                     (temp & UINT32_MAX) | 1, 4);
2016         }
2017         return (0);
2018 }
2019
2020 static void
2021 agp_i965_chipset_flush_teardown(device_t dev)
2022 {
2023         struct agp_i810_softc *sc;
2024         uint32_t temp_lo;
2025
2026         sc = device_get_softc(dev);
2027         if (sc->sc_flush_page_res == NULL)
2028                 return;
2029         if (!sc->sc_bios_allocated_flush_page) {
2030                 temp_lo = pci_read_config(sc->bdev, AGP_I965_IFPADDR, 4);
2031                 temp_lo &= ~1;
2032                 pci_write_config(sc->bdev, AGP_I965_IFPADDR, temp_lo, 4);
2033         }
2034         agp_i915_chipset_flush_free_page(dev);
2035 }
2036
2037 static void
2038 agp_i915_chipset_flush(device_t dev)
2039 {
2040         struct agp_i810_softc *sc;
2041
2042         sc = device_get_softc(dev);
2043         *(uint32_t *)sc->sc_flush_page_vaddr = 1;
2044 }
2045
2046 int
2047 agp_intel_gtt_chipset_flush(device_t dev)
2048 {
2049         struct agp_i810_softc *sc;
2050
2051         sc = device_get_softc(dev);
2052         sc->match->driver->chipset_flush(dev);
2053         return (0);
2054 }
2055
2056 void
2057 agp_intel_gtt_unmap_memory(device_t dev, struct sglist *sg_list)
2058 {
2059 }
2060
2061 int
2062 agp_intel_gtt_map_memory(device_t dev, vm_page_t *pages, u_int num_entries,
2063     struct sglist **sg_list)
2064 {
2065 #if 0
2066         struct agp_i810_softc *sc;
2067 #endif
2068         struct sglist *sg;
2069         int i;
2070 #if 0
2071         int error;
2072         bus_dma_tag_t dmat;
2073 #endif
2074
2075         if (*sg_list != NULL)
2076                 return (0);
2077 #if 0
2078         sc = device_get_softc(dev);
2079 #endif
2080         sg = sglist_alloc(num_entries, M_WAITOK /* XXXKIB */);
2081         for (i = 0; i < num_entries; i++) {
2082                 sg->sg_segs[i].ss_paddr = VM_PAGE_TO_PHYS(pages[i]);
2083                 sg->sg_segs[i].ss_len = PAGE_SIZE;
2084         }
2085
2086 #if 0
2087         error = bus_dma_tag_create(bus_get_dma_tag(dev),
2088             1 /* alignment */, 0 /* boundary */,
2089             1ULL << sc->match->busdma_addr_mask_sz /* lowaddr */,
2090             BUS_SPACE_MAXADDR /* highaddr */,
2091             NULL /* filtfunc */, NULL /* filtfuncarg */,
2092             BUS_SPACE_MAXADDR /* maxsize */,
2093             BUS_SPACE_UNRESTRICTED /* nsegments */,
2094             BUS_SPACE_MAXADDR /* maxsegsz */,
2095             0 /* flags */, NULL /* lockfunc */, NULL /* lockfuncarg */,
2096             &dmat);
2097         if (error != 0) {
2098                 sglist_free(sg);
2099                 return (error);
2100         }
2101         /* XXXKIB */
2102 #endif
2103         *sg_list = sg;
2104         return (0);
2105 }
2106
2107 void
2108 agp_intel_gtt_insert_sg_entries(device_t dev, struct sglist *sg_list,
2109     u_int first_entry, u_int flags)
2110 {
2111         struct agp_i810_softc *sc;
2112         vm_paddr_t spaddr;
2113         size_t slen;
2114         u_int i, j;
2115
2116         sc = device_get_softc(dev);
2117         for (i = j = 0; j < sg_list->sg_nseg; j++) {
2118                 spaddr = sg_list->sg_segs[i].ss_paddr;
2119                 slen = sg_list->sg_segs[i].ss_len;
2120                 for (; slen > 0; i++) {
2121                         sc->match->driver->install_gtt_pte(dev, first_entry + i,
2122                             spaddr, flags);
2123                         spaddr += AGP_PAGE_SIZE;
2124                         slen -= AGP_PAGE_SIZE;
2125                 }
2126         }
2127         sc->match->driver->sync_gtt_pte(dev, first_entry + i - 1);
2128 }
2129
2130 void
2131 intel_gtt_clear_range(u_int first_entry, u_int num_entries)
2132 {
2133
2134         agp_intel_gtt_clear_range(intel_agp, first_entry, num_entries);
2135 }
2136
2137 void
2138 intel_gtt_insert_pages(u_int first_entry, u_int num_entries, vm_page_t *pages,
2139     u_int flags)
2140 {
2141
2142         agp_intel_gtt_insert_pages(intel_agp, first_entry, num_entries,
2143             pages, flags);
2144 }
2145
2146 void intel_gtt_get(size_t *gtt_total, size_t *stolen_size,
2147                    phys_addr_t *mappable_base, unsigned long *mappable_end)
2148 {
2149         intel_private.base = agp_intel_gtt_get(intel_agp);
2150
2151         *gtt_total = intel_private.base.gtt_total_entries << PAGE_SHIFT;
2152         *stolen_size = intel_private.base.stolen_size;
2153         *mappable_base = intel_private.base.gma_bus_addr;
2154         *mappable_end = intel_private.base.gtt_mappable_entries << PAGE_SHIFT;
2155 }
2156
2157 int
2158 intel_gtt_chipset_flush(void)
2159 {
2160
2161         return (agp_intel_gtt_chipset_flush(intel_agp));
2162 }
2163
2164 void
2165 intel_gtt_unmap_memory(struct sglist *sg_list)
2166 {
2167
2168         agp_intel_gtt_unmap_memory(intel_agp, sg_list);
2169 }
2170
2171 int
2172 intel_gtt_map_memory(vm_page_t *pages, u_int num_entries,
2173     struct sglist **sg_list)
2174 {
2175
2176         return (agp_intel_gtt_map_memory(intel_agp, pages, num_entries,
2177             sg_list));
2178 }
2179
2180 void
2181 intel_gtt_insert_sg_entries(struct sglist *sg_list, u_int first_entry,
2182     u_int flags)
2183 {
2184
2185         agp_intel_gtt_insert_sg_entries(intel_agp, sg_list, first_entry, flags);
2186 }
2187
2188 /*
2189  * Only used by gen6
2190  */
2191 void
2192 intel_gtt_sync_pte(u_int entry)
2193 {
2194         struct agp_i810_softc *sc;
2195
2196         sc = device_get_softc(intel_agp);
2197         sc->match->driver->sync_gtt_pte(intel_agp, entry);
2198 }
2199
2200 /*
2201  * Only used by gen6
2202  */
2203 void
2204 intel_gtt_write(u_int entry, uint32_t val)
2205 {
2206         struct agp_i810_softc *sc;
2207
2208         sc = device_get_softc(intel_agp);
2209         sc->match->driver->write_gtt(intel_agp, entry, val);
2210 }