sys/dev/netif/em/if_em.c

   1 /*
   2  * Copyright (c) 2004 Joerg Sonnenberger <joerg@bec.de>.  All rights reserved.
   3  *
   4  * Copyright (c) 2001-2014, Intel Corporation
   5  * All rights reserved.
   6  *
   7  * Redistribution and use in source and binary forms, with or without
   8  * modification, are permitted provided that the following conditions are met:
   9  *
  10  *  1. Redistributions of source code must retain the above copyright notice,
  11  *     this list of conditions and the following disclaimer.
  12  *
  13  *  2. Redistributions in binary form must reproduce the above copyright
  14  *     notice, this list of conditions and the following disclaimer in the
  15  *     documentation and/or other materials provided with the distribution.
  16  *
  17  *  3. Neither the name of the Intel Corporation nor the names of its
  18  *     contributors may be used to endorse or promote products derived from
  19  *     this software without specific prior written permission.
  20  *
  21  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  22  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  23  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  24  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
  25  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  26  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  27  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  28  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  29  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  30  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  31  * POSSIBILITY OF SUCH DAMAGE.
  32  *
  33  *
  34  * Copyright (c) 2005 The DragonFly Project.  All rights reserved.
  35  *
  36  * This code is derived from software contributed to The DragonFly Project
  37  * by Matthew Dillon <dillon@backplane.com>
  38  *
  39  * Redistribution and use in source and binary forms, with or without
  40  * modification, are permitted provided that the following conditions
  41  * are met:
  42  *
  43  * 1. Redistributions of source code must retain the above copyright
  44  *    notice, this list of conditions and the following disclaimer.
  45  * 2. Redistributions in binary form must reproduce the above copyright
  46  *    notice, this list of conditions and the following disclaimer in
  47  *    the documentation and/or other materials provided with the
  48  *    distribution.
  49  * 3. Neither the name of The DragonFly Project nor the names of its
  50  *    contributors may be used to endorse or promote products derived
  51  *    from this software without specific, prior written permission.
  52  *
  53  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  54  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  55  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
  56  * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
  57  * COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
  58  * INCIDENTAL, SPECIAL, EXEMPLARY OR CONSEQUENTIAL DAMAGES (INCLUDING,
  59  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  60  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
  61  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  62  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
  63  * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  64  * SUCH DAMAGE.
  65  *
  66  */
  67 /*
  68  * SERIALIZATION API RULES:
  69  *
  70  * - We must call lwkt_serialize_handler_enable() prior to enabling the
  71  *   hardware interrupt and lwkt_serialize_handler_disable() after disabling
  72  *   the hardware interrupt in order to avoid handler execution races from
  73  *   scheduled interrupt threads.
  74  */
  75
  76 #include "opt_ifpoll.h"
  77
  78 #include <sys/param.h>
  79 #include <sys/bus.h>
  80 #include <sys/endian.h>
  81 #include <sys/interrupt.h>
  82 #include <sys/kernel.h>
  83 #include <sys/ktr.h>
  84 #include <sys/malloc.h>
  85 #include <sys/mbuf.h>
  86 #include <sys/proc.h>
  87 #include <sys/rman.h>
  88 #include <sys/serialize.h>
  89 #include <sys/socket.h>
  90 #include <sys/sockio.h>
  91 #include <sys/sysctl.h>
  92 #include <sys/systm.h>
  93
  94 #include <net/bpf.h>
  95 #include <net/ethernet.h>
  96 #include <net/if.h>
  97 #include <net/if_arp.h>
  98 #include <net/if_dl.h>
  99 #include <net/if_media.h>
 100 #include <net/if_poll.h>
 101 #include <net/ifq_var.h>
 102 #include <net/vlan/if_vlan_var.h>
 103 #include <net/vlan/if_vlan_ether.h>
 104
 105 #include <netinet/ip.h>
 106 #include <netinet/tcp.h>
 107 #include <netinet/udp.h>
 108
 109 #include <bus/pci/pcivar.h>
 110 #include <bus/pci/pcireg.h>
 111
 112 #include <dev/netif/ig_hal/e1000_api.h>
 113 #include <dev/netif/ig_hal/e1000_82571.h>
 114 #include <dev/netif/ig_hal/e1000_dragonfly.h>
 115 #include <dev/netif/em/if_em.h>
 116
 117 #define DEBUG_HW 0
 118
 119 #define EM_NAME "Intel(R) PRO/1000 Network Connection "
 120 #define EM_VER  " 7.4.2"
 121
 122 #define _EM_DEVICE(id, ret)     \
 123         { EM_VENDOR_ID, E1000_DEV_ID_##id, ret, EM_NAME #id EM_VER }
 124 #define EM_EMX_DEVICE(id)       _EM_DEVICE(id, -100)
 125 #define EM_DEVICE(id)           _EM_DEVICE(id, 0)
 126 #define EM_DEVICE_NULL  { 0, 0, 0, NULL }
 127
 128 static const struct em_vendor_info em_vendor_info_array[] = {
 129         EM_DEVICE(82540EM),
 130         EM_DEVICE(82540EM_LOM),
 131         EM_DEVICE(82540EP),
 132         EM_DEVICE(82540EP_LOM),
 133         EM_DEVICE(82540EP_LP),
 134
 135         EM_DEVICE(82541EI),
 136         EM_DEVICE(82541ER),
 137         EM_DEVICE(82541ER_LOM),
 138         EM_DEVICE(82541EI_MOBILE),
 139         EM_DEVICE(82541GI),
 140         EM_DEVICE(82541GI_LF),
 141         EM_DEVICE(82541GI_MOBILE),
 142
 143         EM_DEVICE(82542),
 144
 145         EM_DEVICE(82543GC_FIBER),
 146         EM_DEVICE(82543GC_COPPER),
 147
 148         EM_DEVICE(82544EI_COPPER),
 149         EM_DEVICE(82544EI_FIBER),
 150         EM_DEVICE(82544GC_COPPER),
 151         EM_DEVICE(82544GC_LOM),
 152
 153         EM_DEVICE(82545EM_COPPER),
 154         EM_DEVICE(82545EM_FIBER),
 155         EM_DEVICE(82545GM_COPPER),
 156         EM_DEVICE(82545GM_FIBER),
 157         EM_DEVICE(82545GM_SERDES),
 158
 159         EM_DEVICE(82546EB_COPPER),
 160         EM_DEVICE(82546EB_FIBER),
 161         EM_DEVICE(82546EB_QUAD_COPPER),
 162         EM_DEVICE(82546GB_COPPER),
 163         EM_DEVICE(82546GB_FIBER),
 164         EM_DEVICE(82546GB_SERDES),
 165         EM_DEVICE(82546GB_PCIE),
 166         EM_DEVICE(82546GB_QUAD_COPPER),
 167         EM_DEVICE(82546GB_QUAD_COPPER_KSP3),
 168
 169         EM_DEVICE(82547EI),
 170         EM_DEVICE(82547EI_MOBILE),
 171         EM_DEVICE(82547GI),
 172
 173         EM_EMX_DEVICE(82571EB_COPPER),
 174         EM_EMX_DEVICE(82571EB_FIBER),
 175         EM_EMX_DEVICE(82571EB_SERDES),
 176         EM_EMX_DEVICE(82571EB_SERDES_DUAL),
 177         EM_EMX_DEVICE(82571EB_SERDES_QUAD),
 178         EM_EMX_DEVICE(82571EB_QUAD_COPPER),
 179         EM_EMX_DEVICE(82571EB_QUAD_COPPER_BP),
 180         EM_EMX_DEVICE(82571EB_QUAD_COPPER_LP),
 181         EM_EMX_DEVICE(82571EB_QUAD_FIBER),
 182         EM_EMX_DEVICE(82571PT_QUAD_COPPER),
 183
 184         EM_EMX_DEVICE(82572EI_COPPER),
 185         EM_EMX_DEVICE(82572EI_FIBER),
 186         EM_EMX_DEVICE(82572EI_SERDES),
 187         EM_EMX_DEVICE(82572EI),
 188
 189         EM_EMX_DEVICE(82573E),
 190         EM_EMX_DEVICE(82573E_IAMT),
 191         EM_EMX_DEVICE(82573L),
 192
 193         EM_DEVICE(82583V),
 194
 195         EM_EMX_DEVICE(80003ES2LAN_COPPER_SPT),
 196         EM_EMX_DEVICE(80003ES2LAN_SERDES_SPT),
 197         EM_EMX_DEVICE(80003ES2LAN_COPPER_DPT),
 198         EM_EMX_DEVICE(80003ES2LAN_SERDES_DPT),
 199
 200         EM_DEVICE(ICH8_IGP_M_AMT),
 201         EM_DEVICE(ICH8_IGP_AMT),
 202         EM_DEVICE(ICH8_IGP_C),
 203         EM_DEVICE(ICH8_IFE),
 204         EM_DEVICE(ICH8_IFE_GT),
 205         EM_DEVICE(ICH8_IFE_G),
 206         EM_DEVICE(ICH8_IGP_M),
 207         EM_DEVICE(ICH8_82567V_3),
 208
 209         EM_DEVICE(ICH9_IGP_M_AMT),
 210         EM_DEVICE(ICH9_IGP_AMT),
 211         EM_DEVICE(ICH9_IGP_C),
 212         EM_DEVICE(ICH9_IGP_M),
 213         EM_DEVICE(ICH9_IGP_M_V),
 214         EM_DEVICE(ICH9_IFE),
 215         EM_DEVICE(ICH9_IFE_GT),
 216         EM_DEVICE(ICH9_IFE_G),
 217         EM_DEVICE(ICH9_BM),
 218
 219         EM_EMX_DEVICE(82574L),
 220         EM_EMX_DEVICE(82574LA),
 221
 222         EM_DEVICE(ICH10_R_BM_LM),
 223         EM_DEVICE(ICH10_R_BM_LF),
 224         EM_DEVICE(ICH10_R_BM_V),
 225         EM_DEVICE(ICH10_D_BM_LM),
 226         EM_DEVICE(ICH10_D_BM_LF),
 227         EM_DEVICE(ICH10_D_BM_V),
 228
 229         EM_DEVICE(PCH_M_HV_LM),
 230         EM_DEVICE(PCH_M_HV_LC),
 231         EM_DEVICE(PCH_D_HV_DM),
 232         EM_DEVICE(PCH_D_HV_DC),
 233
 234         EM_DEVICE(PCH2_LV_LM),
 235         EM_DEVICE(PCH2_LV_V),
 236
 237         EM_EMX_DEVICE(PCH_LPT_I217_LM),
 238         EM_EMX_DEVICE(PCH_LPT_I217_V),
 239         EM_EMX_DEVICE(PCH_LPTLP_I218_LM),
 240         EM_EMX_DEVICE(PCH_LPTLP_I218_V),
 241         EM_EMX_DEVICE(PCH_I218_LM2),
 242         EM_EMX_DEVICE(PCH_I218_V2),
 243         EM_EMX_DEVICE(PCH_I218_LM3),
 244         EM_EMX_DEVICE(PCH_I218_V3),
 245
 246         /* required last entry */
 247         EM_DEVICE_NULL
 248 };
 249
 250 static int      em_probe(device_t);
 251 static int      em_attach(device_t);
 252 static int      em_detach(device_t);
 253 static int      em_shutdown(device_t);
 254 static int      em_suspend(device_t);
 255 static int      em_resume(device_t);
 256
 257 static void     em_init(void *);
 258 static void     em_stop(struct adapter *);
 259 static int      em_ioctl(struct ifnet *, u_long, caddr_t, struct ucred *);
 260 static void     em_start(struct ifnet *, struct ifaltq_subque *);
 261 #ifdef IFPOLL_ENABLE
 262 static void     em_npoll(struct ifnet *, struct ifpoll_info *);
 263 static void     em_npoll_compat(struct ifnet *, void *, int);
 264 #endif
 265 static void     em_watchdog(struct ifnet *);
 266 static void     em_media_status(struct ifnet *, struct ifmediareq *);
 267 static int      em_media_change(struct ifnet *);
 268 static void     em_timer(void *);
 269
 270 static void     em_intr(void *);
 271 static void     em_intr_mask(void *);
 272 static void     em_intr_body(struct adapter *, boolean_t);
 273 static void     em_rxeof(struct adapter *, int);
 274 static void     em_txeof(struct adapter *);
 275 static void     em_tx_collect(struct adapter *);
 276 static void     em_tx_purge(struct adapter *);
 277 static void     em_enable_intr(struct adapter *);
 278 static void     em_disable_intr(struct adapter *);
 279
 280 static int      em_dma_malloc(struct adapter *, bus_size_t,
 281                     struct em_dma_alloc *);
 282 static void     em_dma_free(struct adapter *, struct em_dma_alloc *);
 283 static void     em_init_tx_ring(struct adapter *);
 284 static int      em_init_rx_ring(struct adapter *);
 285 static int      em_create_tx_ring(struct adapter *);
 286 static int      em_create_rx_ring(struct adapter *);
 287 static void     em_destroy_tx_ring(struct adapter *, int);
 288 static void     em_destroy_rx_ring(struct adapter *, int);
 289 static int      em_newbuf(struct adapter *, int, int);
 290 static int      em_encap(struct adapter *, struct mbuf **, int *, int *);
 291 static void     em_rxcsum(struct adapter *, struct e1000_rx_desc *,
 292                     struct mbuf *);
 293 static int      em_txcsum(struct adapter *, struct mbuf *,
 294                     uint32_t *, uint32_t *);
 295 static int      em_tso_pullup(struct adapter *, struct mbuf **);
 296 static int      em_tso_setup(struct adapter *, struct mbuf *,
 297                     uint32_t *, uint32_t *);
 298
 299 static int      em_get_hw_info(struct adapter *);
 300 static int      em_is_valid_eaddr(const uint8_t *);
 301 static int      em_alloc_pci_res(struct adapter *);
 302 static void     em_free_pci_res(struct adapter *);
 303 static int      em_reset(struct adapter *);
 304 static void     em_setup_ifp(struct adapter *);
 305 static void     em_init_tx_unit(struct adapter *);
 306 static void     em_init_rx_unit(struct adapter *);
 307 static void     em_update_stats(struct adapter *);
 308 static void     em_set_promisc(struct adapter *);
 309 static void     em_disable_promisc(struct adapter *);
 310 static void     em_set_multi(struct adapter *);
 311 static void     em_update_link_status(struct adapter *);
 312 static void     em_smartspeed(struct adapter *);
 313 static void     em_set_itr(struct adapter *, uint32_t);
 314 static void     em_disable_aspm(struct adapter *);
 315
 316 /* Hardware workarounds */
 317 static int      em_82547_fifo_workaround(struct adapter *, int);
 318 static void     em_82547_update_fifo_head(struct adapter *, int);
 319 static int      em_82547_tx_fifo_reset(struct adapter *);
 320 static void     em_82547_move_tail(void *);
 321 static void     em_82547_move_tail_serialized(struct adapter *);
 322 static uint32_t em_82544_fill_desc(bus_addr_t, uint32_t, PDESC_ARRAY);
 323
 324 static void     em_print_debug_info(struct adapter *);
 325 static void     em_print_nvm_info(struct adapter *);
 326 static void     em_print_hw_stats(struct adapter *);
 327
 328 static int      em_sysctl_stats(SYSCTL_HANDLER_ARGS);
 329 static int      em_sysctl_debug_info(SYSCTL_HANDLER_ARGS);
 330 static int      em_sysctl_int_throttle(SYSCTL_HANDLER_ARGS);
 331 static int      em_sysctl_int_tx_nsegs(SYSCTL_HANDLER_ARGS);
 332 static void     em_add_sysctl(struct adapter *adapter);
 333
 334 /* Management and WOL Support */
 335 static void     em_get_mgmt(struct adapter *);
 336 static void     em_rel_mgmt(struct adapter *);
 337 static void     em_get_hw_control(struct adapter *);
 338 static void     em_rel_hw_control(struct adapter *);
 339 static void     em_enable_wol(device_t);
 340
 341 static device_method_t em_methods[] = {
 342         /* Device interface */
 343         DEVMETHOD(device_probe,         em_probe),
 344         DEVMETHOD(device_attach,        em_attach),
 345         DEVMETHOD(device_detach,        em_detach),
 346         DEVMETHOD(device_shutdown,      em_shutdown),
 347         DEVMETHOD(device_suspend,       em_suspend),
 348         DEVMETHOD(device_resume,        em_resume),
 349         DEVMETHOD_END
 350 };
 351
 352 static driver_t em_driver = {
 353         "em",
 354         em_methods,
 355         sizeof(struct adapter),
 356 };
 357
 358 static devclass_t em_devclass;
 359
 360 DECLARE_DUMMY_MODULE(if_em);
 361 MODULE_DEPEND(em, ig_hal, 1, 1, 1);
 362 DRIVER_MODULE(if_em, pci, em_driver, em_devclass, NULL, NULL);
 363
 364 /*
 365  * Tunables
 366  */
 367 static int      em_int_throttle_ceil = EM_DEFAULT_ITR;
 368 static int      em_rxd = EM_DEFAULT_RXD;
 369 static int      em_txd = EM_DEFAULT_TXD;
 370 static int      em_smart_pwr_down = 0;
 371
 372 /* Controls whether promiscuous also shows bad packets */
 373 static int      em_debug_sbp = FALSE;
 374
 375 static int      em_82573_workaround = 1;
 376 static int      em_msi_enable = 1;
 377
 378 static char     em_flowctrl[IFM_ETH_FC_STRLEN] = IFM_ETH_FC_RXPAUSE;
 379
 380 TUNABLE_INT("hw.em.int_throttle_ceil", &em_int_throttle_ceil);
 381 TUNABLE_INT("hw.em.rxd", &em_rxd);
 382 TUNABLE_INT("hw.em.txd", &em_txd);
 383 TUNABLE_INT("hw.em.smart_pwr_down", &em_smart_pwr_down);
 384 TUNABLE_INT("hw.em.sbp", &em_debug_sbp);
 385 TUNABLE_INT("hw.em.82573_workaround", &em_82573_workaround);
 386 TUNABLE_INT("hw.em.msi.enable", &em_msi_enable);
 387 TUNABLE_STR("hw.em.flow_ctrl", em_flowctrl, sizeof(em_flowctrl));
 388
 389 /* Global used in WOL setup with multiport cards */
 390 static int      em_global_quad_port_a = 0;
 391
 392 /* Set this to one to display debug statistics */
 393 static int      em_display_debug_stats = 0;
 394
 395 #if !defined(KTR_IF_EM)
 396 #define KTR_IF_EM       KTR_ALL
 397 #endif
 398 KTR_INFO_MASTER(if_em);
 399 KTR_INFO(KTR_IF_EM, if_em, intr_beg, 0, "intr begin");
 400 KTR_INFO(KTR_IF_EM, if_em, intr_end, 1, "intr end");
 401 KTR_INFO(KTR_IF_EM, if_em, pkt_receive, 4, "rx packet");
 402 KTR_INFO(KTR_IF_EM, if_em, pkt_txqueue, 5, "tx packet");
 403 KTR_INFO(KTR_IF_EM, if_em, pkt_txclean, 6, "tx clean");
 404 #define logif(name)     KTR_LOG(if_em_ ## name)
 405
 406 static int
 407 em_probe(device_t dev)
 408 {
 409         const struct em_vendor_info *ent;
 410         uint16_t vid, did;
 411
 412         vid = pci_get_vendor(dev);
 413         did = pci_get_device(dev);
 414
 415         for (ent = em_vendor_info_array; ent->desc != NULL; ++ent) {
 416                 if (vid == ent->vendor_id && did == ent->device_id) {
 417                         device_set_desc(dev, ent->desc);
 418                         device_set_async_attach(dev, TRUE);
 419                         return (ent->ret);
 420                 }
 421         }
 422         return (ENXIO);
 423 }
 424
 425 static int
 426 em_attach(device_t dev)
 427 {
 428         struct adapter *adapter = device_get_softc(dev);
 429         struct ifnet *ifp = &adapter->arpcom.ac_if;
 430         int tsize, rsize;
 431         int error = 0;
 432         uint16_t eeprom_data, device_id, apme_mask;
 433         driver_intr_t *intr_func;
 434         char flowctrl[IFM_ETH_FC_STRLEN];
 435
 436         adapter->dev = adapter->osdep.dev = dev;
 437
 438         callout_init_mp(&adapter->timer);
 439         callout_init_mp(&adapter->tx_fifo_timer);
 440
 441         ifmedia_init(&adapter->media, IFM_IMASK | IFM_ETH_FCMASK,
 442             em_media_change, em_media_status);
 443
 444         /* Determine hardware and mac info */
 445         error = em_get_hw_info(adapter);
 446         if (error) {
 447                 device_printf(dev, "Identify hardware failed\n");
 448                 goto fail;
 449         }
 450
 451         /* Setup PCI resources */
 452         error = em_alloc_pci_res(adapter);
 453         if (error) {
 454                 device_printf(dev, "Allocation of PCI resources failed\n");
 455                 goto fail;
 456         }
 457
 458         /*
 459          * For ICH8 and family we need to map the flash memory,
 460          * and this must happen after the MAC is identified.
 461          */
 462         if (adapter->hw.mac.type == e1000_ich8lan ||
 463             adapter->hw.mac.type == e1000_ich9lan ||
 464             adapter->hw.mac.type == e1000_ich10lan ||
 465             adapter->hw.mac.type == e1000_pchlan ||
 466             adapter->hw.mac.type == e1000_pch2lan ||
 467             adapter->hw.mac.type == e1000_pch_lpt) {
 468                 adapter->flash_rid = EM_BAR_FLASH;
 469
 470                 adapter->flash = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
 471                                         &adapter->flash_rid, RF_ACTIVE);
 472                 if (adapter->flash == NULL) {
 473                         device_printf(dev, "Mapping of Flash failed\n");
 474                         error = ENXIO;
 475                         goto fail;
 476                 }
 477                 adapter->osdep.flash_bus_space_tag =
 478                     rman_get_bustag(adapter->flash);
 479                 adapter->osdep.flash_bus_space_handle =
 480                     rman_get_bushandle(adapter->flash);
 481
 482                 /*
 483                  * This is used in the shared code
 484                  * XXX this goof is actually not used.
 485                  */
 486                 adapter->hw.flash_address = (uint8_t *)adapter->flash;
 487         }
 488
 489         switch (adapter->hw.mac.type) {
 490         case e1000_82571:
 491         case e1000_82572:
 492         case e1000_pch_lpt:
 493                 /*
 494                  * Pullup extra 4bytes into the first data segment for
 495                  * TSO, see:
 496                  * 82571/82572 specification update errata #7
 497                  *
 498                  * Same applies to I217 (and maybe I218).
 499                  *
 500                  * NOTE:
 501                  * 4bytes instead of 2bytes, which are mentioned in the
 502                  * errata, are pulled; mainly to keep rest of the data
 503                  * properly aligned.
 504                  */
 505                 adapter->flags |= EM_FLAG_TSO_PULLEX;
 506                 /* FALL THROUGH */
 507
 508         default:
 509                 if (pci_is_pcie(dev))
 510                         adapter->flags |= EM_FLAG_TSO;
 511                 break;
 512         }
 513
 514         /* Do Shared Code initialization */
 515         if (e1000_setup_init_funcs(&adapter->hw, TRUE)) {
 516                 device_printf(dev, "Setup of Shared code failed\n");
 517                 error = ENXIO;
 518                 goto fail;
 519         }
 520
 521         e1000_get_bus_info(&adapter->hw);
 522
 523         /*
 524          * Validate number of transmit and receive descriptors.  It
 525          * must not exceed hardware maximum, and must be multiple
 526          * of E1000_DBA_ALIGN.
 527          */
 528         if ((em_txd * sizeof(struct e1000_tx_desc)) % EM_DBA_ALIGN != 0 ||
 529             (adapter->hw.mac.type >= e1000_82544 && em_txd > EM_MAX_TXD) ||
 530             (adapter->hw.mac.type < e1000_82544 && em_txd > EM_MAX_TXD_82543) ||
 531             em_txd < EM_MIN_TXD) {
 532                 if (adapter->hw.mac.type < e1000_82544)
 533                         adapter->num_tx_desc = EM_MAX_TXD_82543;
 534                 else
 535                         adapter->num_tx_desc = EM_DEFAULT_TXD;
 536                 device_printf(dev, "Using %d TX descriptors instead of %d!\n",
 537                     adapter->num_tx_desc, em_txd);
 538         } else {
 539                 adapter->num_tx_desc = em_txd;
 540         }
 541         if ((em_rxd * sizeof(struct e1000_rx_desc)) % EM_DBA_ALIGN != 0 ||
 542             (adapter->hw.mac.type >= e1000_82544 && em_rxd > EM_MAX_RXD) ||
 543             (adapter->hw.mac.type < e1000_82544 && em_rxd > EM_MAX_RXD_82543) ||
 544             em_rxd < EM_MIN_RXD) {
 545                 if (adapter->hw.mac.type < e1000_82544)
 546                         adapter->num_rx_desc = EM_MAX_RXD_82543;
 547                 else
 548                         adapter->num_rx_desc = EM_DEFAULT_RXD;
 549                 device_printf(dev, "Using %d RX descriptors instead of %d!\n",
 550                     adapter->num_rx_desc, em_rxd);
 551         } else {
 552                 adapter->num_rx_desc = em_rxd;
 553         }
 554
 555         adapter->hw.mac.autoneg = DO_AUTO_NEG;
 556         adapter->hw.phy.autoneg_wait_to_complete = FALSE;
 557         adapter->hw.phy.autoneg_advertised = AUTONEG_ADV_DEFAULT;
 558         adapter->rx_buffer_len = MCLBYTES;
 559
 560         /*
 561          * Interrupt throttle rate
 562          */
 563         if (em_int_throttle_ceil == 0) {
 564                 adapter->int_throttle_ceil = 0;
 565         } else {
 566                 int throttle = em_int_throttle_ceil;
 567
 568                 if (throttle < 0)
 569                         throttle = EM_DEFAULT_ITR;
 570
 571                 /* Recalculate the tunable value to get the exact frequency. */
 572                 throttle = 1000000000 / 256 / throttle;
 573
 574                 /* Upper 16bits of ITR is reserved and should be zero */
 575                 if (throttle & 0xffff0000)
 576                         throttle = 1000000000 / 256 / EM_DEFAULT_ITR;
 577
 578                 adapter->int_throttle_ceil = 1000000000 / 256 / throttle;
 579         }
 580
 581         e1000_init_script_state_82541(&adapter->hw, TRUE);
 582         e1000_set_tbi_compatibility_82543(&adapter->hw, TRUE);
 583
 584         /* Copper options */
 585         if (adapter->hw.phy.media_type == e1000_media_type_copper) {
 586                 adapter->hw.phy.mdix = AUTO_ALL_MODES;
 587                 adapter->hw.phy.disable_polarity_correction = FALSE;
 588                 adapter->hw.phy.ms_type = EM_MASTER_SLAVE;
 589         }
 590
 591         /* Set the frame limits assuming standard ethernet sized frames. */
 592         adapter->hw.mac.max_frame_size =
 593             ETHERMTU + ETHER_HDR_LEN + ETHER_CRC_LEN;
 594         adapter->min_frame_size = ETH_ZLEN + ETHER_CRC_LEN;
 595
 596         /* This controls when hardware reports transmit completion status. */
 597         adapter->hw.mac.report_tx_early = 1;
 598
 599         /*
 600          * Create top level busdma tag
 601          */
 602         error = bus_dma_tag_create(NULL, 1, 0,
 603                         BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR,
 604                         NULL, NULL,
 605                         BUS_SPACE_MAXSIZE_32BIT, 0, BUS_SPACE_MAXSIZE_32BIT,
 606                         0, &adapter->parent_dtag);
 607         if (error) {
 608                 device_printf(dev, "could not create top level DMA tag\n");
 609                 goto fail;
 610         }
 611
 612         /*
 613          * Allocate Transmit Descriptor ring
 614          */
 615         tsize = roundup2(adapter->num_tx_desc * sizeof(struct e1000_tx_desc),
 616                          EM_DBA_ALIGN);
 617         error = em_dma_malloc(adapter, tsize, &adapter->txdma);
 618         if (error) {
 619                 device_printf(dev, "Unable to allocate tx_desc memory\n");
 620                 goto fail;
 621         }
 622         adapter->tx_desc_base = adapter->txdma.dma_vaddr;
 623
 624         /*
 625          * Allocate Receive Descriptor ring
 626          */
 627         rsize = roundup2(adapter->num_rx_desc * sizeof(struct e1000_rx_desc),
 628                          EM_DBA_ALIGN);
 629         error = em_dma_malloc(adapter, rsize, &adapter->rxdma);
 630         if (error) {
 631                 device_printf(dev, "Unable to allocate rx_desc memory\n");
 632                 goto fail;
 633         }
 634         adapter->rx_desc_base = adapter->rxdma.dma_vaddr;
 635
 636         /* Allocate multicast array memory. */
 637         adapter->mta = kmalloc(ETH_ADDR_LEN * MAX_NUM_MULTICAST_ADDRESSES,
 638             M_DEVBUF, M_WAITOK);
 639
 640         /* Indicate SOL/IDER usage */
 641         if (e1000_check_reset_block(&adapter->hw)) {
 642                 device_printf(dev,
 643                     "PHY reset is blocked due to SOL/IDER session.\n");
 644         }
 645
 646         /* Disable EEE */
 647         adapter->hw.dev_spec.ich8lan.eee_disable = 1;
 648
 649         /*
 650          * Start from a known state, this is important in reading the
 651          * nvm and mac from that.
 652          */
 653         e1000_reset_hw(&adapter->hw);
 654
 655         /* Make sure we have a good EEPROM before we read from it */
 656         if (e1000_validate_nvm_checksum(&adapter->hw) < 0) {
 657                 /*
 658                  * Some PCI-E parts fail the first check due to
 659                  * the link being in sleep state, call it again,
 660                  * if it fails a second time its a real issue.
 661                  */
 662                 if (e1000_validate_nvm_checksum(&adapter->hw) < 0) {
 663                         device_printf(dev,
 664                             "The EEPROM Checksum Is Not Valid\n");
 665                         error = EIO;
 666                         goto fail;
 667                 }
 668         }
 669
 670         /* Copy the permanent MAC address out of the EEPROM */
 671         if (e1000_read_mac_addr(&adapter->hw) < 0) {
 672                 device_printf(dev, "EEPROM read error while reading MAC"
 673                     " address\n");
 674                 error = EIO;
 675                 goto fail;
 676         }
 677         if (!em_is_valid_eaddr(adapter->hw.mac.addr)) {
 678                 device_printf(dev, "Invalid MAC address\n");
 679                 error = EIO;
 680                 goto fail;
 681         }
 682
 683         /* Disable ULP support */
 684         e1000_disable_ulp_lpt_lp(&adapter->hw, TRUE);
 685
 686         /* Allocate transmit descriptors and buffers */
 687         error = em_create_tx_ring(adapter);
 688         if (error) {
 689                 device_printf(dev, "Could not setup transmit structures\n");
 690                 goto fail;
 691         }
 692
 693         /* Allocate receive descriptors and buffers */
 694         error = em_create_rx_ring(adapter);
 695         if (error) {
 696                 device_printf(dev, "Could not setup receive structures\n");
 697                 goto fail;
 698         }
 699
 700         /* Manually turn off all interrupts */
 701         E1000_WRITE_REG(&adapter->hw, E1000_IMC, 0xffffffff);
 702
 703         /* Determine if we have to control management hardware */
 704         if (e1000_enable_mng_pass_thru(&adapter->hw))
 705                 adapter->flags |= EM_FLAG_HAS_MGMT;
 706
 707         /*
 708          * Setup Wake-on-Lan
 709          */
 710         apme_mask = EM_EEPROM_APME;
 711         eeprom_data = 0;
 712         switch (adapter->hw.mac.type) {
 713         case e1000_82542:
 714         case e1000_82543:
 715                 break;
 716
 717         case e1000_82573:
 718         case e1000_82583:
 719                 adapter->flags |= EM_FLAG_HAS_AMT;
 720                 /* FALL THROUGH */
 721
 722         case e1000_82546:
 723         case e1000_82546_rev_3:
 724         case e1000_82571:
 725         case e1000_82572:
 726         case e1000_80003es2lan:
 727                 if (adapter->hw.bus.func == 1) {
 728                         e1000_read_nvm(&adapter->hw,
 729                             NVM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
 730                 } else {
 731                         e1000_read_nvm(&adapter->hw,
 732                             NVM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
 733                 }
 734                 break;
 735
 736         case e1000_ich8lan:
 737         case e1000_ich9lan:
 738         case e1000_ich10lan:
 739         case e1000_pchlan:
 740         case e1000_pch2lan:
 741                 apme_mask = E1000_WUC_APME;
 742                 adapter->flags |= EM_FLAG_HAS_AMT;
 743                 eeprom_data = E1000_READ_REG(&adapter->hw, E1000_WUC);
 744                 break;
 745
 746         default:
 747                 e1000_read_nvm(&adapter->hw,
 748                     NVM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
 749                 break;
 750         }
 751         if (eeprom_data & apme_mask)
 752                 adapter->wol = E1000_WUFC_MAG | E1000_WUFC_MC;
 753
 754         /*
 755          * We have the eeprom settings, now apply the special cases
 756          * where the eeprom may be wrong or the board won't support
 757          * wake on lan on a particular port
 758          */
 759         device_id = pci_get_device(dev);
 760         switch (device_id) {
 761         case E1000_DEV_ID_82546GB_PCIE:
 762                 adapter->wol = 0;
 763                 break;
 764
 765         case E1000_DEV_ID_82546EB_FIBER:
 766         case E1000_DEV_ID_82546GB_FIBER:
 767         case E1000_DEV_ID_82571EB_FIBER:
 768                 /*
 769                  * Wake events only supported on port A for dual fiber
 770                  * regardless of eeprom setting
 771                  */
 772                 if (E1000_READ_REG(&adapter->hw, E1000_STATUS) &
 773                     E1000_STATUS_FUNC_1)
 774                         adapter->wol = 0;
 775                 break;
 776
 777         case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
 778         case E1000_DEV_ID_82571EB_QUAD_COPPER:
 779         case E1000_DEV_ID_82571EB_QUAD_FIBER:
 780         case E1000_DEV_ID_82571EB_QUAD_COPPER_LP:
 781                 /* if quad port adapter, disable WoL on all but port A */
 782                 if (em_global_quad_port_a != 0)
 783                         adapter->wol = 0;
 784                 /* Reset for multiple quad port adapters */
 785                 if (++em_global_quad_port_a == 4)
 786                         em_global_quad_port_a = 0;
 787                 break;
 788         }
 789
 790         /* XXX disable wol */
 791         adapter->wol = 0;
 792
 793         /* Setup flow control. */
 794         device_getenv_string(dev, "flow_ctrl", flowctrl, sizeof(flowctrl),
 795             em_flowctrl);
 796         adapter->ifm_flowctrl = ifmedia_str2ethfc(flowctrl);
 797         if (adapter->hw.mac.type == e1000_pchlan) {
 798                 /* Only PAUSE reception is supported on PCH */
 799                 adapter->ifm_flowctrl &= ~IFM_ETH_TXPAUSE;
 800         }
 801
 802         /* Setup OS specific network interface */
 803         em_setup_ifp(adapter);
 804
 805         /* Add sysctl tree, must after em_setup_ifp() */
 806         em_add_sysctl(adapter);
 807
 808 #ifdef IFPOLL_ENABLE
 809         /* Polling setup */
 810         ifpoll_compat_setup(&adapter->npoll,
 811             device_get_sysctl_ctx(dev), device_get_sysctl_tree(dev),
 812             device_get_unit(dev), ifp->if_serializer);
 813 #endif
 814
 815         /* Reset the hardware */
 816         error = em_reset(adapter);
 817         if (error) {
 818                 /*
 819                  * Some 82573 parts fail the first reset, call it again,
 820                  * if it fails a second time its a real issue.
 821                  */
 822                 error = em_reset(adapter);
 823                 if (error) {
 824                         device_printf(dev, "Unable to reset the hardware\n");
 825                         ether_ifdetach(ifp);
 826                         goto fail;
 827                 }
 828         }
 829
 830         /* Initialize statistics */
 831         em_update_stats(adapter);
 832
 833         adapter->hw.mac.get_link_status = 1;
 834         em_update_link_status(adapter);
 835
 836         /* Do we need workaround for 82544 PCI-X adapter? */
 837         if (adapter->hw.bus.type == e1000_bus_type_pcix &&
 838             adapter->hw.mac.type == e1000_82544)
 839                 adapter->pcix_82544 = TRUE;
 840         else
 841                 adapter->pcix_82544 = FALSE;
 842
 843         if (adapter->pcix_82544) {
 844                 /*
 845                  * 82544 on PCI-X may split one TX segment
 846                  * into two TX descs, so we double its number
 847                  * of spare TX desc here.
 848                  */
 849                 adapter->spare_tx_desc = 2 * EM_TX_SPARE;
 850         } else {
 851                 adapter->spare_tx_desc = EM_TX_SPARE;
 852         }
 853         if (adapter->flags & EM_FLAG_TSO)
 854                 adapter->spare_tx_desc = EM_TX_SPARE_TSO;
 855         adapter->tx_wreg_nsegs = EM_DEFAULT_TXWREG;
 856
 857         /*
 858          * Keep following relationship between spare_tx_desc, oact_tx_desc
 859          * and tx_int_nsegs:
 860          * (spare_tx_desc + EM_TX_RESERVED) <=
 861          * oact_tx_desc <= EM_TX_OACTIVE_MAX <= tx_int_nsegs
 862          */
 863         adapter->oact_tx_desc = adapter->num_tx_desc / 8;
 864         if (adapter->oact_tx_desc > EM_TX_OACTIVE_MAX)
 865                 adapter->oact_tx_desc = EM_TX_OACTIVE_MAX;
 866         if (adapter->oact_tx_desc < adapter->spare_tx_desc + EM_TX_RESERVED)
 867                 adapter->oact_tx_desc = adapter->spare_tx_desc + EM_TX_RESERVED;
 868
 869         adapter->tx_int_nsegs = adapter->num_tx_desc / 16;
 870         if (adapter->tx_int_nsegs < adapter->oact_tx_desc)
 871                 adapter->tx_int_nsegs = adapter->oact_tx_desc;
 872
 873         /* Non-AMT based hardware can now take control from firmware */
 874         if ((adapter->flags & (EM_FLAG_HAS_MGMT | EM_FLAG_HAS_AMT)) ==
 875             EM_FLAG_HAS_MGMT && adapter->hw.mac.type >= e1000_82571)
 876                 em_get_hw_control(adapter);
 877
 878         ifq_set_cpuid(&ifp->if_snd, rman_get_cpuid(adapter->intr_res));
 879
 880         /*
 881          * Missing Interrupt Following ICR read:
 882          *
 883          * 82571/82572 specification update errata #76
 884          * 82573 specification update errata #31
 885          * 82574 specification update errata #12
 886          * 82583 specification update errata #4
 887          */
 888         intr_func = em_intr;
 889         if ((adapter->flags & EM_FLAG_SHARED_INTR) &&
 890             (adapter->hw.mac.type == e1000_82571 ||
 891              adapter->hw.mac.type == e1000_82572 ||
 892              adapter->hw.mac.type == e1000_82573 ||
 893              adapter->hw.mac.type == e1000_82574 ||
 894              adapter->hw.mac.type == e1000_82583))
 895                 intr_func = em_intr_mask;
 896
 897         error = bus_setup_intr(dev, adapter->intr_res, INTR_MPSAFE,
 898                                intr_func, adapter, &adapter->intr_tag,
 899                                ifp->if_serializer);
 900         if (error) {
 901                 device_printf(dev, "Failed to register interrupt handler");
 902                 ether_ifdetach(ifp);
 903                 goto fail;
 904         }
 905         return (0);
 906 fail:
 907         em_detach(dev);
 908         return (error);
 909 }
 910
 911 static int
 912 em_detach(device_t dev)
 913 {
 914         struct adapter *adapter = device_get_softc(dev);
 915
 916         if (device_is_attached(dev)) {
 917                 struct ifnet *ifp = &adapter->arpcom.ac_if;
 918
 919                 lwkt_serialize_enter(ifp->if_serializer);
 920
 921                 em_stop(adapter);
 922
 923                 e1000_phy_hw_reset(&adapter->hw);
 924
 925                 em_rel_mgmt(adapter);
 926                 em_rel_hw_control(adapter);
 927
 928                 if (adapter->wol) {
 929                         E1000_WRITE_REG(&adapter->hw, E1000_WUC,
 930                                         E1000_WUC_PME_EN);
 931                         E1000_WRITE_REG(&adapter->hw, E1000_WUFC, adapter->wol);
 932                         em_enable_wol(dev);
 933                 }
 934
 935                 bus_teardown_intr(dev, adapter->intr_res, adapter->intr_tag);
 936
 937                 lwkt_serialize_exit(ifp->if_serializer);
 938
 939                 ether_ifdetach(ifp);
 940         } else if (adapter->memory != NULL) {
 941                 em_rel_hw_control(adapter);
 942         }
 943
 944         ifmedia_removeall(&adapter->media);
 945         bus_generic_detach(dev);
 946
 947         em_free_pci_res(adapter);
 948
 949         em_destroy_tx_ring(adapter, adapter->num_tx_desc);
 950         em_destroy_rx_ring(adapter, adapter->num_rx_desc);
 951
 952         /* Free Transmit Descriptor ring */
 953         if (adapter->tx_desc_base)
 954                 em_dma_free(adapter, &adapter->txdma);
 955
 956         /* Free Receive Descriptor ring */
 957         if (adapter->rx_desc_base)
 958                 em_dma_free(adapter, &adapter->rxdma);
 959
 960         /* Free top level busdma tag */
 961         if (adapter->parent_dtag != NULL)
 962                 bus_dma_tag_destroy(adapter->parent_dtag);
 963
 964         if (adapter->mta != NULL)
 965                 kfree(adapter->mta, M_DEVBUF);
 966
 967         return (0);
 968 }
 969
 970 static int
 971 em_shutdown(device_t dev)
 972 {
 973         return em_suspend(dev);
 974 }
 975
 976 static int
 977 em_suspend(device_t dev)
 978 {
 979         struct adapter *adapter = device_get_softc(dev);
 980         struct ifnet *ifp = &adapter->arpcom.ac_if;
 981
 982         lwkt_serialize_enter(ifp->if_serializer);
 983
 984         em_stop(adapter);
 985
 986         em_rel_mgmt(adapter);
 987         em_rel_hw_control(adapter);
 988
 989         if (adapter->wol) {
 990                 E1000_WRITE_REG(&adapter->hw, E1000_WUC, E1000_WUC_PME_EN);
 991                 E1000_WRITE_REG(&adapter->hw, E1000_WUFC, adapter->wol);
 992                 em_enable_wol(dev);
 993         }
 994
 995         lwkt_serialize_exit(ifp->if_serializer);
 996
 997         return bus_generic_suspend(dev);
 998 }
 999
1000 static int
1001 em_resume(device_t dev)
1002 {
1003         struct adapter *adapter = device_get_softc(dev);
1004         struct ifnet *ifp = &adapter->arpcom.ac_if;
1005
1006         lwkt_serialize_enter(ifp->if_serializer);
1007
1008         if (adapter->hw.mac.type == e1000_pch2lan)
1009                 e1000_resume_workarounds_pchlan(&adapter->hw);
1010
1011         em_init(adapter);
1012         em_get_mgmt(adapter);
1013         if_devstart(ifp);
1014
1015         lwkt_serialize_exit(ifp->if_serializer);
1016
1017         return bus_generic_resume(dev);
1018 }
1019
1020 static void
1021 em_start(struct ifnet *ifp, struct ifaltq_subque *ifsq)
1022 {
1023         struct adapter *adapter = ifp->if_softc;
1024         struct mbuf *m_head;
1025         int idx = -1, nsegs = 0;
1026
1027         ASSERT_ALTQ_SQ_DEFAULT(ifp, ifsq);
1028         ASSERT_SERIALIZED(ifp->if_serializer);
1029
1030         if ((ifp->if_flags & IFF_RUNNING) == 0 || ifq_is_oactive(&ifp->if_snd))
1031                 return;
1032
1033         if (!adapter->link_active) {
1034                 ifq_purge(&ifp->if_snd);
1035                 return;
1036         }
1037
1038         while (!ifq_is_empty(&ifp->if_snd)) {
1039                 /* Now do we at least have a minimal? */
1040                 if (EM_IS_OACTIVE(adapter)) {
1041                         em_tx_collect(adapter);
1042                         if (EM_IS_OACTIVE(adapter)) {
1043                                 ifq_set_oactive(&ifp->if_snd);
1044                                 adapter->no_tx_desc_avail1++;
1045                                 break;
1046                         }
1047                 }
1048
1049                 logif(pkt_txqueue);
1050                 m_head = ifq_dequeue(&ifp->if_snd);
1051                 if (m_head == NULL)
1052                         break;
1053
1054                 if (em_encap(adapter, &m_head, &nsegs, &idx)) {
1055                         IFNET_STAT_INC(ifp, oerrors, 1);
1056                         em_tx_collect(adapter);
1057                         continue;
1058                 }
1059
1060                 /*
1061                  * TX interrupt are aggressively aggregated, so increasing
1062                  * opackets at TX interrupt time will make the opackets
1063                  * statistics vastly inaccurate; we do the opackets increment
1064                  * now.
1065                  */
1066                 IFNET_STAT_INC(ifp, opackets, 1);
1067
1068                 if (nsegs >= adapter->tx_wreg_nsegs && idx >= 0) {
1069                         E1000_WRITE_REG(&adapter->hw, E1000_TDT(0), idx);
1070                         nsegs = 0;
1071                         idx = -1;
1072                 }
1073
1074                 /* Send a copy of the frame to the BPF listener */
1075                 ETHER_BPF_MTAP(ifp, m_head);
1076
1077                 /* Set timeout in case hardware has problems transmitting. */
1078                 ifp->if_timer = EM_TX_TIMEOUT;
1079         }
1080         if (idx >= 0)
1081                 E1000_WRITE_REG(&adapter->hw, E1000_TDT(0), idx);
1082 }
1083
1084 static int
1085 em_ioctl(struct ifnet *ifp, u_long command, caddr_t data, struct ucred *cr)
1086 {
1087         struct adapter *adapter = ifp->if_softc;
1088         struct ifreq *ifr = (struct ifreq *)data;
1089         uint16_t eeprom_data = 0;
1090         int max_frame_size, mask, reinit;
1091         int error = 0;
1092
1093         ASSERT_SERIALIZED(ifp->if_serializer);
1094
1095         switch (command) {
1096         case SIOCSIFMTU:
1097                 switch (adapter->hw.mac.type) {
1098                 case e1000_82573:
1099                         /*
1100                          * 82573 only supports jumbo frames
1101                          * if ASPM is disabled.
1102                          */
1103                         e1000_read_nvm(&adapter->hw,
1104                             NVM_INIT_3GIO_3, 1, &eeprom_data);
1105                         if (eeprom_data & NVM_WORD1A_ASPM_MASK) {
1106                                 max_frame_size = ETHER_MAX_LEN;
1107                                 break;
1108                         }
1109                         /* FALL THROUGH */
1110
1111                 /* Limit Jumbo Frame size */
1112                 case e1000_82571:
1113                 case e1000_82572:
1114                 case e1000_ich9lan:
1115                 case e1000_ich10lan:
1116                 case e1000_pch2lan:
1117                 case e1000_pch_lpt:
1118                 case e1000_82574:
1119                 case e1000_82583:
1120                 case e1000_80003es2lan:
1121                         max_frame_size = 9234;
1122                         break;
1123
1124                 case e1000_pchlan:
1125                         max_frame_size = 4096;
1126                         break;
1127
1128                 /* Adapters that do not support jumbo frames */
1129                 case e1000_82542:
1130                 case e1000_ich8lan:
1131                         max_frame_size = ETHER_MAX_LEN;
1132                         break;
1133
1134                 default:
1135                         max_frame_size = MAX_JUMBO_FRAME_SIZE;
1136                         break;
1137                 }
1138                 if (ifr->ifr_mtu > max_frame_size - ETHER_HDR_LEN -
1139                     ETHER_CRC_LEN) {
1140                         error = EINVAL;
1141                         break;
1142                 }
1143
1144                 ifp->if_mtu = ifr->ifr_mtu;
1145                 adapter->hw.mac.max_frame_size =
1146                     ifp->if_mtu + ETHER_HDR_LEN + ETHER_CRC_LEN;
1147
1148                 if (ifp->if_flags & IFF_RUNNING)
1149                         em_init(adapter);
1150                 break;
1151
1152         case SIOCSIFFLAGS:
1153                 if (ifp->if_flags & IFF_UP) {
1154                         if ((ifp->if_flags & IFF_RUNNING)) {
1155                                 if ((ifp->if_flags ^ adapter->if_flags) &
1156                                     (IFF_PROMISC | IFF_ALLMULTI)) {
1157                                         em_disable_promisc(adapter);
1158                                         em_set_promisc(adapter);
1159                                 }
1160                         } else {
1161                                 em_init(adapter);
1162                         }
1163                 } else if (ifp->if_flags & IFF_RUNNING) {
1164                         em_stop(adapter);
1165                 }
1166                 adapter->if_flags = ifp->if_flags;
1167                 break;
1168
1169         case SIOCADDMULTI:
1170         case SIOCDELMULTI:
1171                 if (ifp->if_flags & IFF_RUNNING) {
1172                         em_disable_intr(adapter);
1173                         em_set_multi(adapter);
1174                         if (adapter->hw.mac.type == e1000_82542 &&
1175                             adapter->hw.revision_id == E1000_REVISION_2)
1176                                 em_init_rx_unit(adapter);
1177 #ifdef IFPOLL_ENABLE
1178                         if (!(ifp->if_flags & IFF_NPOLLING))
1179 #endif
1180                                 em_enable_intr(adapter);
1181                 }
1182                 break;
1183
1184         case SIOCSIFMEDIA:
1185                 /* Check SOL/IDER usage */
1186                 if (e1000_check_reset_block(&adapter->hw)) {
1187                         device_printf(adapter->dev, "Media change is"
1188                             " blocked due to SOL/IDER session.\n");
1189                         break;
1190                 }
1191                 /* FALL THROUGH */
1192
1193         case SIOCGIFMEDIA:
1194                 error = ifmedia_ioctl(ifp, ifr, &adapter->media, command);
1195                 break;
1196
1197         case SIOCSIFCAP:
1198                 reinit = 0;
1199                 mask = ifr->ifr_reqcap ^ ifp->if_capenable;
1200                 if (mask & IFCAP_RXCSUM) {
1201                         ifp->if_capenable ^= IFCAP_RXCSUM;
1202                         reinit = 1;
1203                 }
1204                 if (mask & IFCAP_TXCSUM) {
1205                         ifp->if_capenable ^= IFCAP_TXCSUM;
1206                         if (ifp->if_capenable & IFCAP_TXCSUM)
1207                                 ifp->if_hwassist |= EM_CSUM_FEATURES;
1208                         else
1209                                 ifp->if_hwassist &= ~EM_CSUM_FEATURES;
1210                 }
1211                 if (mask & IFCAP_TSO) {
1212                         ifp->if_capenable ^= IFCAP_TSO;
1213                         if (ifp->if_capenable & IFCAP_TSO)
1214                                 ifp->if_hwassist |= CSUM_TSO;
1215                         else
1216                                 ifp->if_hwassist &= ~CSUM_TSO;
1217                 }
1218                 if (mask & IFCAP_VLAN_HWTAGGING) {
1219                         ifp->if_capenable ^= IFCAP_VLAN_HWTAGGING;
1220                         reinit = 1;
1221                 }
1222                 if (reinit && (ifp->if_flags & IFF_RUNNING))
1223                         em_init(adapter);
1224                 break;
1225
1226         default:
1227                 error = ether_ioctl(ifp, command, data);
1228                 break;
1229         }
1230         return (error);
1231 }
1232
1233 static void
1234 em_watchdog(struct ifnet *ifp)
1235 {
1236         struct adapter *adapter = ifp->if_softc;
1237
1238         ASSERT_SERIALIZED(ifp->if_serializer);
1239
1240         /*
1241          * The timer is set to 5 every time start queues a packet.
1242          * Then txeof keeps resetting it as long as it cleans at
1243          * least one descriptor.
1244          * Finally, anytime all descriptors are clean the timer is
1245          * set to 0.
1246          */
1247
1248         if (E1000_READ_REG(&adapter->hw, E1000_TDT(0)) ==
1249             E1000_READ_REG(&adapter->hw, E1000_TDH(0))) {
1250                 /*
1251                  * If we reach here, all TX jobs are completed and
1252                  * the TX engine should have been idled for some time.
1253                  * We don't need to call if_devstart() here.
1254                  */
1255                 ifq_clr_oactive(&ifp->if_snd);
1256                 ifp->if_timer = 0;
1257                 return;
1258         }
1259
1260         /*
1261          * If we are in this routine because of pause frames, then
1262          * don't reset the hardware.
1263          */
1264         if (E1000_READ_REG(&adapter->hw, E1000_STATUS) &
1265             E1000_STATUS_TXOFF) {
1266                 ifp->if_timer = EM_TX_TIMEOUT;
1267                 return;
1268         }
1269
1270         if (e1000_check_for_link(&adapter->hw) == 0)
1271                 if_printf(ifp, "watchdog timeout -- resetting\n");
1272
1273         IFNET_STAT_INC(ifp, oerrors, 1);
1274         adapter->watchdog_events++;
1275
1276         em_init(adapter);
1277
1278         if (!ifq_is_empty(&ifp->if_snd))
1279                 if_devstart(ifp);
1280 }
1281
1282 static void
1283 em_init(void *xsc)
1284 {
1285         struct adapter *adapter = xsc;
1286         struct ifnet *ifp = &adapter->arpcom.ac_if;
1287         device_t dev = adapter->dev;
1288
1289         ASSERT_SERIALIZED(ifp->if_serializer);
1290
1291         em_stop(adapter);
1292
1293         /* Get the latest mac address, User can use a LAA */
1294         bcopy(IF_LLADDR(ifp), adapter->hw.mac.addr, ETHER_ADDR_LEN);
1295
1296         /* Put the address into the Receive Address Array */
1297         e1000_rar_set(&adapter->hw, adapter->hw.mac.addr, 0);
1298
1299         /*
1300          * With the 82571 adapter, RAR[0] may be overwritten
1301          * when the other port is reset, we make a duplicate
1302          * in RAR[14] for that eventuality, this assures
1303          * the interface continues to function.
1304          */
1305         if (adapter->hw.mac.type == e1000_82571) {
1306                 e1000_set_laa_state_82571(&adapter->hw, TRUE);
1307                 e1000_rar_set(&adapter->hw, adapter->hw.mac.addr,
1308                     E1000_RAR_ENTRIES - 1);
1309         }
1310
1311         /* Reset the hardware */
1312         if (em_reset(adapter)) {
1313                 device_printf(dev, "Unable to reset the hardware\n");
1314                 /* XXX em_stop()? */
1315                 return;
1316         }
1317         em_update_link_status(adapter);
1318
1319         /* Setup VLAN support, basic and offload if available */
1320         E1000_WRITE_REG(&adapter->hw, E1000_VET, ETHERTYPE_VLAN);
1321
1322         if (ifp->if_capenable & IFCAP_VLAN_HWTAGGING) {
1323                 uint32_t ctrl;
1324
1325                 ctrl = E1000_READ_REG(&adapter->hw, E1000_CTRL);
1326                 ctrl |= E1000_CTRL_VME;
1327                 E1000_WRITE_REG(&adapter->hw, E1000_CTRL, ctrl);
1328         }
1329
1330         /* Configure for OS presence */
1331         em_get_mgmt(adapter);
1332
1333         /* Prepare transmit descriptors and buffers */
1334         em_init_tx_ring(adapter);
1335         em_init_tx_unit(adapter);
1336
1337         /* Setup Multicast table */
1338         em_set_multi(adapter);
1339
1340         /* Prepare receive descriptors and buffers */
1341         if (em_init_rx_ring(adapter)) {
1342                 device_printf(dev, "Could not setup receive structures\n");
1343                 em_stop(adapter);
1344                 return;
1345         }
1346         em_init_rx_unit(adapter);
1347
1348         /* Don't lose promiscuous settings */
1349         em_set_promisc(adapter);
1350
1351         ifp->if_flags |= IFF_RUNNING;
1352         ifq_clr_oactive(&ifp->if_snd);
1353
1354         callout_reset(&adapter->timer, hz, em_timer, adapter);
1355         e1000_clear_hw_cntrs_base_generic(&adapter->hw);
1356
1357         /* MSI/X configuration for 82574 */
1358         if (adapter->hw.mac.type == e1000_82574) {
1359                 int tmp;
1360
1361                 tmp = E1000_READ_REG(&adapter->hw, E1000_CTRL_EXT);
1362                 tmp |= E1000_CTRL_EXT_PBA_CLR;
1363                 E1000_WRITE_REG(&adapter->hw, E1000_CTRL_EXT, tmp);
1364                 /*
1365                  * XXX MSIX
1366                  * Set the IVAR - interrupt vector routing.
1367                  * Each nibble represents a vector, high bit
1368                  * is enable, other 3 bits are the MSIX table
1369                  * entry, we map RXQ0 to 0, TXQ0 to 1, and
1370                  * Link (other) to 2, hence the magic number.
1371                  */
1372                 E1000_WRITE_REG(&adapter->hw, E1000_IVAR, 0x800A0908);
1373         }
1374
1375 #ifdef IFPOLL_ENABLE
1376         /*
1377          * Only enable interrupts if we are not polling, make sure
1378          * they are off otherwise.
1379          */
1380         if (ifp->if_flags & IFF_NPOLLING)
1381                 em_disable_intr(adapter);
1382         else
1383 #endif /* IFPOLL_ENABLE */
1384                 em_enable_intr(adapter);
1385
1386         /* AMT based hardware can now take control from firmware */
1387         if ((adapter->flags & (EM_FLAG_HAS_MGMT | EM_FLAG_HAS_AMT)) ==
1388             (EM_FLAG_HAS_MGMT | EM_FLAG_HAS_AMT) &&
1389             adapter->hw.mac.type >= e1000_82571)
1390                 em_get_hw_control(adapter);
1391 }
1392
1393 #ifdef IFPOLL_ENABLE
1394
1395 static void
1396 em_npoll_compat(struct ifnet *ifp, void *arg __unused, int count)
1397 {
1398         struct adapter *adapter = ifp->if_softc;
1399
1400         ASSERT_SERIALIZED(ifp->if_serializer);
1401
1402         if (adapter->npoll.ifpc_stcount-- == 0) {
1403                 uint32_t reg_icr;
1404
1405                 adapter->npoll.ifpc_stcount = adapter->npoll.ifpc_stfrac;
1406
1407                 reg_icr = E1000_READ_REG(&adapter->hw, E1000_ICR);
1408                 if (reg_icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
1409                         callout_stop(&adapter->timer);
1410                         adapter->hw.mac.get_link_status = 1;
1411                         em_update_link_status(adapter);
1412                         callout_reset(&adapter->timer, hz, em_timer, adapter);
1413                 }
1414         }
1415
1416         em_rxeof(adapter, count);
1417         em_txeof(adapter);
1418
1419         if (!ifq_is_empty(&ifp->if_snd))
1420                 if_devstart(ifp);
1421 }
1422
1423 static void
1424 em_npoll(struct ifnet *ifp, struct ifpoll_info *info)
1425 {
1426         struct adapter *adapter = ifp->if_softc;
1427
1428         ASSERT_SERIALIZED(ifp->if_serializer);
1429
1430         if (info != NULL) {
1431                 int cpuid = adapter->npoll.ifpc_cpuid;
1432
1433                 info->ifpi_rx[cpuid].poll_func = em_npoll_compat;
1434                 info->ifpi_rx[cpuid].arg = NULL;
1435                 info->ifpi_rx[cpuid].serializer = ifp->if_serializer;
1436
1437                 if (ifp->if_flags & IFF_RUNNING)
1438                         em_disable_intr(adapter);
1439                 ifq_set_cpuid(&ifp->if_snd, cpuid);
1440         } else {
1441                 if (ifp->if_flags & IFF_RUNNING)
1442                         em_enable_intr(adapter);
1443                 ifq_set_cpuid(&ifp->if_snd, rman_get_cpuid(adapter->intr_res));
1444         }
1445 }
1446
1447 #endif /* IFPOLL_ENABLE */
1448
1449 static void
1450 em_intr(void *xsc)
1451 {
1452         em_intr_body(xsc, TRUE);
1453 }
1454
1455 static void
1456 em_intr_body(struct adapter *adapter, boolean_t chk_asserted)
1457 {
1458         struct ifnet *ifp = &adapter->arpcom.ac_if;
1459         uint32_t reg_icr;
1460
1461         logif(intr_beg);
1462         ASSERT_SERIALIZED(ifp->if_serializer);
1463
1464         reg_icr = E1000_READ_REG(&adapter->hw, E1000_ICR);
1465
1466         if (chk_asserted &&
1467             ((adapter->hw.mac.type >= e1000_82571 &&
1468               (reg_icr & E1000_ICR_INT_ASSERTED) == 0) ||
1469              reg_icr == 0)) {
1470                 logif(intr_end);
1471                 return;
1472         }
1473
1474         /*
1475          * XXX: some laptops trigger several spurious interrupts
1476          * on em(4) when in the resume cycle. The ICR register
1477          * reports all-ones value in this case. Processing such
1478          * interrupts would lead to a freeze. I don't know why.
1479          */
1480         if (reg_icr == 0xffffffff) {
1481                 logif(intr_end);
1482                 return;
1483         }
1484
1485         if (ifp->if_flags & IFF_RUNNING) {
1486                 if (reg_icr &
1487                     (E1000_ICR_RXT0 | E1000_ICR_RXDMT0 | E1000_ICR_RXO))
1488                         em_rxeof(adapter, -1);
1489                 if (reg_icr & E1000_ICR_TXDW) {
1490                         em_txeof(adapter);
1491                         if (!ifq_is_empty(&ifp->if_snd))
1492                                 if_devstart(ifp);
1493                 }
1494         }
1495
1496         /* Link status change */
1497         if (reg_icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
1498                 callout_stop(&adapter->timer);
1499                 adapter->hw.mac.get_link_status = 1;
1500                 em_update_link_status(adapter);
1501
1502                 /* Deal with TX cruft when link lost */
1503                 em_tx_purge(adapter);
1504
1505                 callout_reset(&adapter->timer, hz, em_timer, adapter);
1506         }
1507
1508         if (reg_icr & E1000_ICR_RXO)
1509                 adapter->rx_overruns++;
1510
1511         logif(intr_end);
1512 }
1513
1514 static void
1515 em_intr_mask(void *xsc)
1516 {
1517         struct adapter *adapter = xsc;
1518
1519         E1000_WRITE_REG(&adapter->hw, E1000_IMC, 0xffffffff);
1520         /*
1521          * NOTE:
1522          * ICR.INT_ASSERTED bit will never be set if IMS is 0,
1523          * so don't check it.
1524          */
1525         em_intr_body(adapter, FALSE);
1526         E1000_WRITE_REG(&adapter->hw, E1000_IMS, IMS_ENABLE_MASK);
1527 }
1528
1529 static void
1530 em_media_status(struct ifnet *ifp, struct ifmediareq *ifmr)
1531 {
1532         struct adapter *adapter = ifp->if_softc;
1533
1534         ASSERT_SERIALIZED(ifp->if_serializer);
1535
1536         em_update_link_status(adapter);
1537
1538         ifmr->ifm_status = IFM_AVALID;
1539         ifmr->ifm_active = IFM_ETHER;
1540
1541         if (!adapter->link_active) {
1542                 if (adapter->hw.mac.autoneg)
1543                         ifmr->ifm_active |= IFM_NONE;
1544                 else
1545                         ifmr->ifm_active = adapter->media.ifm_media;
1546                 return;
1547         }
1548
1549         ifmr->ifm_status |= IFM_ACTIVE;
1550         if (adapter->ifm_flowctrl & IFM_ETH_FORCEPAUSE)
1551                 ifmr->ifm_active |= adapter->ifm_flowctrl;
1552
1553         if (adapter->hw.phy.media_type == e1000_media_type_fiber ||
1554             adapter->hw.phy.media_type == e1000_media_type_internal_serdes) {
1555                 u_char fiber_type = IFM_1000_SX;
1556
1557                 if (adapter->hw.mac.type == e1000_82545)
1558                         fiber_type = IFM_1000_LX;
1559                 ifmr->ifm_active |= fiber_type | IFM_FDX;
1560         } else {
1561                 switch (adapter->link_speed) {
1562                 case 10:
1563                         ifmr->ifm_active |= IFM_10_T;
1564                         break;
1565                 case 100:
1566                         ifmr->ifm_active |= IFM_100_TX;
1567                         break;
1568
1569                 case 1000:
1570                         ifmr->ifm_active |= IFM_1000_T;
1571                         break;
1572                 }
1573                 if (adapter->link_duplex == FULL_DUPLEX)
1574                         ifmr->ifm_active |= IFM_FDX;
1575                 else
1576                         ifmr->ifm_active |= IFM_HDX;
1577         }
1578         if (ifmr->ifm_active & IFM_FDX) {
1579                 ifmr->ifm_active |=
1580                     e1000_fc2ifmedia(adapter->hw.fc.current_mode);
1581         }
1582 }
1583
1584 static int
1585 em_media_change(struct ifnet *ifp)
1586 {
1587         struct adapter *adapter = ifp->if_softc;
1588         struct ifmedia *ifm = &adapter->media;
1589
1590         ASSERT_SERIALIZED(ifp->if_serializer);
1591
1592         if (IFM_TYPE(ifm->ifm_media) != IFM_ETHER)
1593                 return (EINVAL);
1594
1595         if (adapter->hw.mac.type == e1000_pchlan &&
1596             (IFM_OPTIONS(ifm->ifm_media) & IFM_ETH_TXPAUSE)) {
1597                 if (bootverbose)
1598                         if_printf(ifp, "TX PAUSE is not supported on PCH\n");
1599                 return EINVAL;
1600         }
1601
1602         switch (IFM_SUBTYPE(ifm->ifm_media)) {
1603         case IFM_AUTO:
1604                 adapter->hw.mac.autoneg = DO_AUTO_NEG;
1605                 adapter->hw.phy.autoneg_advertised = AUTONEG_ADV_DEFAULT;
1606                 break;
1607
1608         case IFM_1000_LX:
1609         case IFM_1000_SX:
1610         case IFM_1000_T:
1611                 adapter->hw.mac.autoneg = DO_AUTO_NEG;
1612                 adapter->hw.phy.autoneg_advertised = ADVERTISE_1000_FULL;
1613                 break;
1614
1615         case IFM_100_TX:
1616                 if (IFM_OPTIONS(ifm->ifm_media) & IFM_FDX) {
1617                         adapter->hw.mac.forced_speed_duplex = ADVERTISE_100_FULL;
1618                 } else {
1619                         if (IFM_OPTIONS(ifm->ifm_media) &
1620                             (IFM_ETH_RXPAUSE | IFM_ETH_TXPAUSE)) {
1621                                 if (bootverbose) {
1622                                         if_printf(ifp, "Flow control is not "
1623                                             "allowed for half-duplex\n");
1624                                 }
1625                                 return EINVAL;
1626                         }
1627                         adapter->hw.mac.forced_speed_duplex = ADVERTISE_100_HALF;
1628                 }
1629                 adapter->hw.mac.autoneg = FALSE;
1630                 adapter->hw.phy.autoneg_advertised = 0;
1631                 break;
1632
1633         case IFM_10_T:
1634                 if (IFM_OPTIONS(ifm->ifm_media) & IFM_FDX) {
1635                         adapter->hw.mac.forced_speed_duplex = ADVERTISE_10_FULL;
1636                 } else {
1637                         if (IFM_OPTIONS(ifm->ifm_media) &
1638                             (IFM_ETH_RXPAUSE | IFM_ETH_TXPAUSE)) {
1639                                 if (bootverbose) {
1640                                         if_printf(ifp, "Flow control is not "
1641                                             "allowed for half-duplex\n");
1642                                 }
1643                                 return EINVAL;
1644                         }
1645                         adapter->hw.mac.forced_speed_duplex = ADVERTISE_10_HALF;
1646                 }
1647                 adapter->hw.mac.autoneg = FALSE;
1648                 adapter->hw.phy.autoneg_advertised = 0;
1649                 break;
1650
1651         default:
1652                 if (bootverbose) {
1653                         if_printf(ifp, "Unsupported media type %d\n",
1654                             IFM_SUBTYPE(ifm->ifm_media));
1655                 }
1656                 return EINVAL;
1657         }
1658         adapter->ifm_flowctrl = ifm->ifm_media & IFM_ETH_FCMASK;
1659
1660         if (ifp->if_flags & IFF_RUNNING)
1661                 em_init(adapter);
1662
1663         return (0);
1664 }
1665
1666 static int
1667 em_encap(struct adapter *adapter, struct mbuf **m_headp,
1668     int *segs_used, int *idx)
1669 {
1670         bus_dma_segment_t segs[EM_MAX_SCATTER];
1671         bus_dmamap_t map;
1672         struct em_buffer *tx_buffer, *tx_buffer_mapped;
1673         struct e1000_tx_desc *ctxd = NULL;
1674         struct mbuf *m_head = *m_headp;
1675         uint32_t txd_upper, txd_lower, txd_used, cmd = 0;
1676         int maxsegs, nsegs, i, j, first, last = 0, error;
1677
1678         if (m_head->m_pkthdr.csum_flags & CSUM_TSO) {
1679                 error = em_tso_pullup(adapter, m_headp);
1680                 if (error)
1681                         return error;
1682                 m_head = *m_headp;
1683         }
1684
1685         txd_upper = txd_lower = 0;
1686         txd_used = 0;
1687
1688         /*
1689          * Capture the first descriptor index, this descriptor
1690          * will have the index of the EOP which is the only one
1691          * that now gets a DONE bit writeback.
1692          */
1693         first = adapter->next_avail_tx_desc;
1694         tx_buffer = &adapter->tx_buffer_area[first];
1695         tx_buffer_mapped = tx_buffer;
1696         map = tx_buffer->map;
1697
1698         maxsegs = adapter->num_tx_desc_avail - EM_TX_RESERVED;
1699         KASSERT(maxsegs >= adapter->spare_tx_desc,
1700                 ("not enough spare TX desc"));
1701         if (adapter->pcix_82544) {
1702                 /* Half it; see the comment in em_attach() */
1703                 maxsegs >>= 1;
1704         }
1705         if (maxsegs > EM_MAX_SCATTER)
1706                 maxsegs = EM_MAX_SCATTER;
1707
1708         error = bus_dmamap_load_mbuf_defrag(adapter->txtag, map, m_headp,
1709                         segs, maxsegs, &nsegs, BUS_DMA_NOWAIT);
1710         if (error) {
1711                 if (error == ENOBUFS)
1712                         adapter->mbuf_alloc_failed++;
1713                 else
1714                         adapter->no_tx_dma_setup++;
1715
1716                 m_freem(*m_headp);
1717                 *m_headp = NULL;
1718                 return error;
1719         }
1720         bus_dmamap_sync(adapter->txtag, map, BUS_DMASYNC_PREWRITE);
1721
1722         m_head = *m_headp;
1723         adapter->tx_nsegs += nsegs;
1724         *segs_used += nsegs;
1725
1726         if (m_head->m_pkthdr.csum_flags & CSUM_TSO) {
1727                 /* TSO will consume one TX desc */
1728                 i = em_tso_setup(adapter, m_head, &txd_upper, &txd_lower);
1729                 adapter->tx_nsegs += i;
1730                 *segs_used += i;
1731         } else if (m_head->m_pkthdr.csum_flags & EM_CSUM_FEATURES) {
1732                 /* TX csum offloading will consume one TX desc */
1733                 i = em_txcsum(adapter, m_head, &txd_upper, &txd_lower);
1734                 adapter->tx_nsegs += i;
1735                 *segs_used += i;
1736         }
1737
1738         /* Handle VLAN tag */
1739         if (m_head->m_flags & M_VLANTAG) {
1740                 /* Set the vlan id. */
1741                 txd_upper |= (htole16(m_head->m_pkthdr.ether_vlantag) << 16);
1742                 /* Tell hardware to add tag */
1743                 txd_lower |= htole32(E1000_TXD_CMD_VLE);
1744         }
1745
1746         i = adapter->next_avail_tx_desc;
1747
1748         /* Set up our transmit descriptors */
1749         for (j = 0; j < nsegs; j++) {
1750                 /* If adapter is 82544 and on PCIX bus */
1751                 if(adapter->pcix_82544) {
1752                         DESC_ARRAY desc_array;
1753                         uint32_t array_elements, counter;
1754
1755                         /*
1756                          * Check the Address and Length combination and
1757                          * split the data accordingly
1758                          */
1759                         array_elements = em_82544_fill_desc(segs[j].ds_addr,
1760                                                 segs[j].ds_len, &desc_array);
1761                         for (counter = 0; counter < array_elements; counter++) {
1762                                 KKASSERT(txd_used < adapter->num_tx_desc_avail);
1763
1764                                 tx_buffer = &adapter->tx_buffer_area[i];
1765                                 ctxd = &adapter->tx_desc_base[i];
1766
1767                                 ctxd->buffer_addr = htole64(
1768                                     desc_array.descriptor[counter].address);
1769                                 ctxd->lower.data = htole32(
1770                                     E1000_TXD_CMD_IFCS | txd_lower |
1771                                     desc_array.descriptor[counter].length);
1772                                 ctxd->upper.data = htole32(txd_upper);
1773
1774                                 last = i;
1775                                 if (++i == adapter->num_tx_desc)
1776                                         i = 0;
1777
1778                                 txd_used++;
1779                         }
1780                 } else {
1781                         tx_buffer = &adapter->tx_buffer_area[i];
1782                         ctxd = &adapter->tx_desc_base[i];
1783
1784                         ctxd->buffer_addr = htole64(segs[j].ds_addr);
1785                         ctxd->lower.data = htole32(E1000_TXD_CMD_IFCS |
1786                                                    txd_lower | segs[j].ds_len);
1787                         ctxd->upper.data = htole32(txd_upper);
1788
1789                         last = i;
1790                         if (++i == adapter->num_tx_desc)
1791                                 i = 0;
1792                 }
1793         }
1794
1795         adapter->next_avail_tx_desc = i;
1796         if (adapter->pcix_82544) {
1797                 KKASSERT(adapter->num_tx_desc_avail > txd_used);
1798                 adapter->num_tx_desc_avail -= txd_used;
1799         } else {
1800                 KKASSERT(adapter->num_tx_desc_avail > nsegs);
1801                 adapter->num_tx_desc_avail -= nsegs;
1802         }
1803
1804         tx_buffer->m_head = m_head;
1805         tx_buffer_mapped->map = tx_buffer->map;
1806         tx_buffer->map = map;
1807
1808         if (adapter->tx_nsegs >= adapter->tx_int_nsegs) {
1809                 adapter->tx_nsegs = 0;
1810
1811                 /*
1812                  * Report Status (RS) is turned on
1813                  * every tx_int_nsegs descriptors.
1814                  */
1815                 cmd = E1000_TXD_CMD_RS;
1816
1817                 /*
1818                  * Keep track of the descriptor, which will
1819                  * be written back by hardware.
1820                  */
1821                 adapter->tx_dd[adapter->tx_dd_tail] = last;
1822                 EM_INC_TXDD_IDX(adapter->tx_dd_tail);
1823                 KKASSERT(adapter->tx_dd_tail != adapter->tx_dd_head);
1824         }
1825
1826         /*
1827          * Last Descriptor of Packet needs End Of Packet (EOP)
1828          */
1829         ctxd->lower.data |= htole32(E1000_TXD_CMD_EOP | cmd);
1830
1831         if (adapter->hw.mac.type == e1000_82547) {
1832                 /*
1833                  * Advance the Transmit Descriptor Tail (TDT), this tells the
1834                  * E1000 that this frame is available to transmit.
1835                  */
1836                 if (adapter->link_duplex == HALF_DUPLEX) {
1837                         em_82547_move_tail_serialized(adapter);
1838                 } else {
1839                         E1000_WRITE_REG(&adapter->hw, E1000_TDT(0), i);
1840                         em_82547_update_fifo_head(adapter,
1841                             m_head->m_pkthdr.len);
1842                 }
1843         } else {
1844                 /*
1845                  * Defer TDT updating, until enough descriptors are setup
1846                  */
1847                 *idx = i;
1848         }
1849         return (0);
1850 }
1851
1852 /*
1853  * 82547 workaround to avoid controller hang in half-duplex environment.
1854  * The workaround is to avoid queuing a large packet that would span
1855  * the internal Tx FIFO ring boundary.  We need to reset the FIFO pointers
1856  * in this case.  We do that only when FIFO is quiescent.
1857  */
1858 static void
1859 em_82547_move_tail_serialized(struct adapter *adapter)
1860 {
1861         struct e1000_tx_desc *tx_desc;
1862         uint16_t hw_tdt, sw_tdt, length = 0;
1863         bool eop = 0;
1864
1865         ASSERT_SERIALIZED(adapter->arpcom.ac_if.if_serializer);
1866
1867         hw_tdt = E1000_READ_REG(&adapter->hw, E1000_TDT(0));
1868         sw_tdt = adapter->next_avail_tx_desc;
1869
1870         while (hw_tdt != sw_tdt) {
1871                 tx_desc = &adapter->tx_desc_base[hw_tdt];
1872                 length += tx_desc->lower.flags.length;
1873                 eop = tx_desc->lower.data & E1000_TXD_CMD_EOP;
1874                 if (++hw_tdt == adapter->num_tx_desc)
1875                         hw_tdt = 0;
1876
1877                 if (eop) {
1878                         if (em_82547_fifo_workaround(adapter, length)) {
1879                                 adapter->tx_fifo_wrk_cnt++;
1880                                 callout_reset(&adapter->tx_fifo_timer, 1,
1881                                         em_82547_move_tail, adapter);
1882                                 break;
1883                         }
1884                         E1000_WRITE_REG(&adapter->hw, E1000_TDT(0), hw_tdt);
1885                         em_82547_update_fifo_head(adapter, length);
1886                         length = 0;
1887                 }
1888         }
1889 }
1890
1891 static void
1892 em_82547_move_tail(void *xsc)
1893 {
1894         struct adapter *adapter = xsc;
1895         struct ifnet *ifp = &adapter->arpcom.ac_if;
1896
1897         lwkt_serialize_enter(ifp->if_serializer);
1898         em_82547_move_tail_serialized(adapter);
1899         lwkt_serialize_exit(ifp->if_serializer);
1900 }
1901
1902 static int
1903 em_82547_fifo_workaround(struct adapter *adapter, int len)
1904 {
1905         int fifo_space, fifo_pkt_len;
1906
1907         fifo_pkt_len = roundup2(len + EM_FIFO_HDR, EM_FIFO_HDR);
1908
1909         if (adapter->link_duplex == HALF_DUPLEX) {
1910                 fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head;
1911
1912                 if (fifo_pkt_len >= (EM_82547_PKT_THRESH + fifo_space)) {
1913                         if (em_82547_tx_fifo_reset(adapter))
1914                                 return (0);
1915                         else
1916                                 return (1);
1917                 }
1918         }
1919         return (0);
1920 }
1921
1922 static void
1923 em_82547_update_fifo_head(struct adapter *adapter, int len)
1924 {
1925         int fifo_pkt_len = roundup2(len + EM_FIFO_HDR, EM_FIFO_HDR);
1926
1927         /* tx_fifo_head is always 16 byte aligned */
1928         adapter->tx_fifo_head += fifo_pkt_len;
1929         if (adapter->tx_fifo_head >= adapter->tx_fifo_size)
1930                 adapter->tx_fifo_head -= adapter->tx_fifo_size;
1931 }
1932
1933 static int
1934 em_82547_tx_fifo_reset(struct adapter *adapter)
1935 {
1936         uint32_t tctl;
1937
1938         if ((E1000_READ_REG(&adapter->hw, E1000_TDT(0)) ==
1939              E1000_READ_REG(&adapter->hw, E1000_TDH(0))) &&
1940             (E1000_READ_REG(&adapter->hw, E1000_TDFT) ==
1941              E1000_READ_REG(&adapter->hw, E1000_TDFH)) &&
1942             (E1000_READ_REG(&adapter->hw, E1000_TDFTS) ==
1943              E1000_READ_REG(&adapter->hw, E1000_TDFHS)) &&
1944             (E1000_READ_REG(&adapter->hw, E1000_TDFPC) == 0)) {
1945                 /* Disable TX unit */
1946                 tctl = E1000_READ_REG(&adapter->hw, E1000_TCTL);
1947                 E1000_WRITE_REG(&adapter->hw, E1000_TCTL,
1948                     tctl & ~E1000_TCTL_EN);
1949
1950                 /* Reset FIFO pointers */
1951                 E1000_WRITE_REG(&adapter->hw, E1000_TDFT,
1952                     adapter->tx_head_addr);
1953                 E1000_WRITE_REG(&adapter->hw, E1000_TDFH,
1954                     adapter->tx_head_addr);
1955                 E1000_WRITE_REG(&adapter->hw, E1000_TDFTS,
1956                     adapter->tx_head_addr);
1957                 E1000_WRITE_REG(&adapter->hw, E1000_TDFHS,
1958                     adapter->tx_head_addr);
1959
1960                 /* Re-enable TX unit */
1961                 E1000_WRITE_REG(&adapter->hw, E1000_TCTL, tctl);
1962                 E1000_WRITE_FLUSH(&adapter->hw);
1963
1964                 adapter->tx_fifo_head = 0;
1965                 adapter->tx_fifo_reset_cnt++;
1966
1967                 return (TRUE);
1968         } else {
1969                 return (FALSE);
1970         }
1971 }
1972
1973 static void
1974 em_set_promisc(struct adapter *adapter)
1975 {
1976         struct ifnet *ifp = &adapter->arpcom.ac_if;
1977         uint32_t reg_rctl;
1978
1979         reg_rctl = E1000_READ_REG(&adapter->hw, E1000_RCTL);
1980
1981         if (ifp->if_flags & IFF_PROMISC) {
1982                 reg_rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
1983                 /* Turn this on if you want to see bad packets */
1984                 if (em_debug_sbp)
1985                         reg_rctl |= E1000_RCTL_SBP;
1986                 E1000_WRITE_REG(&adapter->hw, E1000_RCTL, reg_rctl);
1987         } else if (ifp->if_flags & IFF_ALLMULTI) {
1988                 reg_rctl |= E1000_RCTL_MPE;
1989                 reg_rctl &= ~E1000_RCTL_UPE;
1990                 E1000_WRITE_REG(&adapter->hw, E1000_RCTL, reg_rctl);
1991         }
1992 }
1993
1994 static void
1995 em_disable_promisc(struct adapter *adapter)
1996 {
1997         uint32_t reg_rctl;
1998
1999         reg_rctl = E1000_READ_REG(&adapter->hw, E1000_RCTL);
2000
2001         reg_rctl &= ~E1000_RCTL_UPE;
2002         reg_rctl &= ~E1000_RCTL_MPE;
2003         reg_rctl &= ~E1000_RCTL_SBP;
2004         E1000_WRITE_REG(&adapter->hw, E1000_RCTL, reg_rctl);
2005 }
2006
2007 static void
2008 em_set_multi(struct adapter *adapter)
2009 {
2010         struct ifnet *ifp = &adapter->arpcom.ac_if;
2011         struct ifmultiaddr *ifma;
2012         uint32_t reg_rctl = 0;
2013         uint8_t *mta;
2014         int mcnt = 0;
2015
2016         mta = adapter->mta;
2017         bzero(mta, ETH_ADDR_LEN * MAX_NUM_MULTICAST_ADDRESSES);
2018
2019         if (adapter->hw.mac.type == e1000_82542 &&
2020             adapter->hw.revision_id == E1000_REVISION_2) {
2021                 reg_rctl = E1000_READ_REG(&adapter->hw, E1000_RCTL);
2022                 if (adapter->hw.bus.pci_cmd_word & CMD_MEM_WRT_INVALIDATE)
2023                         e1000_pci_clear_mwi(&adapter->hw);
2024                 reg_rctl |= E1000_RCTL_RST;
2025                 E1000_WRITE_REG(&adapter->hw, E1000_RCTL, reg_rctl);
2026                 msec_delay(5);
2027         }
2028
2029         TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) {
2030                 if (ifma->ifma_addr->sa_family != AF_LINK)
2031                         continue;
2032
2033                 if (mcnt == MAX_NUM_MULTICAST_ADDRESSES)
2034                         break;
2035
2036                 bcopy(LLADDR((struct sockaddr_dl *)ifma->ifma_addr),
2037                     &mta[mcnt * ETHER_ADDR_LEN], ETHER_ADDR_LEN);
2038                 mcnt++;
2039         }
2040
2041         if (mcnt >= MAX_NUM_MULTICAST_ADDRESSES) {
2042                 reg_rctl = E1000_READ_REG(&adapter->hw, E1000_RCTL);
2043                 reg_rctl |= E1000_RCTL_MPE;
2044                 E1000_WRITE_REG(&adapter->hw, E1000_RCTL, reg_rctl);
2045         } else {
2046                 e1000_update_mc_addr_list(&adapter->hw, mta, mcnt);
2047         }
2048
2049         if (adapter->hw.mac.type == e1000_82542 &&
2050             adapter->hw.revision_id == E1000_REVISION_2) {
2051                 reg_rctl = E1000_READ_REG(&adapter->hw, E1000_RCTL);
2052                 reg_rctl &= ~E1000_RCTL_RST;
2053                 E1000_WRITE_REG(&adapter->hw, E1000_RCTL, reg_rctl);
2054                 msec_delay(5);
2055                 if (adapter->hw.bus.pci_cmd_word & CMD_MEM_WRT_INVALIDATE)
2056                         e1000_pci_set_mwi(&adapter->hw);
2057         }
2058 }
2059
2060 /*
2061  * This routine checks for link status and updates statistics.
2062  */
2063 static void
2064 em_timer(void *xsc)
2065 {
2066         struct adapter *adapter = xsc;
2067         struct ifnet *ifp = &adapter->arpcom.ac_if;
2068
2069         lwkt_serialize_enter(ifp->if_serializer);
2070
2071         em_update_link_status(adapter);
2072         em_update_stats(adapter);
2073
2074         /* Reset LAA into RAR[0] on 82571 */
2075         if (e1000_get_laa_state_82571(&adapter->hw) == TRUE)
2076                 e1000_rar_set(&adapter->hw, adapter->hw.mac.addr, 0);
2077
2078         if (em_display_debug_stats && (ifp->if_flags & IFF_RUNNING))
2079                 em_print_hw_stats(adapter);
2080
2081         em_smartspeed(adapter);
2082
2083         callout_reset(&adapter->timer, hz, em_timer, adapter);
2084
2085         lwkt_serialize_exit(ifp->if_serializer);
2086 }
2087
2088 static void
2089 em_update_link_status(struct adapter *adapter)
2090 {
2091         struct e1000_hw *hw = &adapter->hw;
2092         struct ifnet *ifp = &adapter->arpcom.ac_if;
2093         device_t dev = adapter->dev;
2094         uint32_t link_check = 0;
2095
2096         /* Get the cached link value or read phy for real */
2097         switch (hw->phy.media_type) {
2098         case e1000_media_type_copper:
2099                 if (hw->mac.get_link_status) {
2100                         /* Do the work to read phy */
2101                         e1000_check_for_link(hw);
2102                         link_check = !hw->mac.get_link_status;
2103                         if (link_check) /* ESB2 fix */
2104                                 e1000_cfg_on_link_up(hw);
2105                 } else {
2106                         link_check = TRUE;
2107                 }
2108                 break;
2109
2110         case e1000_media_type_fiber:
2111                 e1000_check_for_link(hw);
2112                 link_check =
2113                         E1000_READ_REG(hw, E1000_STATUS) & E1000_STATUS_LU;
2114                 break;
2115
2116         case e1000_media_type_internal_serdes:
2117                 e1000_check_for_link(hw);
2118                 link_check = adapter->hw.mac.serdes_has_link;
2119                 break;
2120
2121         case e1000_media_type_unknown:
2122         default:
2123                 break;
2124         }
2125
2126         /* Now check for a transition */
2127         if (link_check && adapter->link_active == 0) {
2128                 e1000_get_speed_and_duplex(hw, &adapter->link_speed,
2129                     &adapter->link_duplex);
2130
2131                 /*
2132                  * Check if we should enable/disable SPEED_MODE bit on
2133                  * 82571/82572
2134                  */
2135                 if (adapter->link_speed != SPEED_1000 &&
2136                     (hw->mac.type == e1000_82571 ||
2137                      hw->mac.type == e1000_82572)) {
2138                         int tarc0;
2139
2140                         tarc0 = E1000_READ_REG(hw, E1000_TARC(0));
2141                         tarc0 &= ~SPEED_MODE_BIT;
2142                         E1000_WRITE_REG(hw, E1000_TARC(0), tarc0);
2143                 }
2144                 if (bootverbose) {
2145                         char flowctrl[IFM_ETH_FC_STRLEN];
2146
2147                         e1000_fc2str(hw->fc.current_mode, flowctrl,
2148                             sizeof(flowctrl));
2149                         device_printf(dev, "Link is up %d Mbps %s, "
2150                             "Flow control: %s\n",
2151                             adapter->link_speed,
2152                             (adapter->link_duplex == FULL_DUPLEX) ?
2153                             "Full Duplex" : "Half Duplex",
2154                             flowctrl);
2155                 }
2156                 if (adapter->ifm_flowctrl & IFM_ETH_FORCEPAUSE)
2157                         e1000_force_flowctrl(hw, adapter->ifm_flowctrl);
2158                 adapter->link_active = 1;
2159                 adapter->smartspeed = 0;
2160                 ifp->if_baudrate = adapter->link_speed * 1000000;
2161                 ifp->if_link_state = LINK_STATE_UP;
2162                 if_link_state_change(ifp);
2163         } else if (!link_check && adapter->link_active == 1) {
2164                 ifp->if_baudrate = adapter->link_speed = 0;
2165                 adapter->link_duplex = 0;
2166                 if (bootverbose)
2167                         device_printf(dev, "Link is Down\n");
2168                 adapter->link_active = 0;
2169 #if 0
2170                 /* Link down, disable watchdog */
2171                 if->if_timer = 0;
2172 #endif
2173                 ifp->if_link_state = LINK_STATE_DOWN;
2174                 if_link_state_change(ifp);
2175         }
2176 }
2177
2178 static void
2179 em_stop(struct adapter *adapter)
2180 {
2181         struct ifnet *ifp = &adapter->arpcom.ac_if;
2182         int i;
2183
2184         ASSERT_SERIALIZED(ifp->if_serializer);
2185
2186         em_disable_intr(adapter);
2187
2188         callout_stop(&adapter->timer);
2189         callout_stop(&adapter->tx_fifo_timer);
2190
2191         ifp->if_flags &= ~IFF_RUNNING;
2192         ifq_clr_oactive(&ifp->if_snd);
2193         ifp->if_timer = 0;
2194
2195         e1000_reset_hw(&adapter->hw);
2196         if (adapter->hw.mac.type >= e1000_82544)
2197                 E1000_WRITE_REG(&adapter->hw, E1000_WUC, 0);
2198
2199         for (i = 0; i < adapter->num_tx_desc; i++) {
2200                 struct em_buffer *tx_buffer = &adapter->tx_buffer_area[i];
2201
2202                 if (tx_buffer->m_head != NULL) {
2203                         bus_dmamap_unload(adapter->txtag, tx_buffer->map);
2204                         m_freem(tx_buffer->m_head);
2205                         tx_buffer->m_head = NULL;
2206                 }
2207         }
2208
2209         for (i = 0; i < adapter->num_rx_desc; i++) {
2210                 struct em_buffer *rx_buffer = &adapter->rx_buffer_area[i];
2211
2212                 if (rx_buffer->m_head != NULL) {
2213                         bus_dmamap_unload(adapter->rxtag, rx_buffer->map);
2214                         m_freem(rx_buffer->m_head);
2215                         rx_buffer->m_head = NULL;
2216                 }
2217         }
2218
2219         if (adapter->fmp != NULL)
2220                 m_freem(adapter->fmp);
2221         adapter->fmp = NULL;
2222         adapter->lmp = NULL;
2223
2224         adapter->csum_flags = 0;
2225         adapter->csum_lhlen = 0;
2226         adapter->csum_iphlen = 0;
2227         adapter->csum_thlen = 0;
2228         adapter->csum_mss = 0;
2229         adapter->csum_pktlen = 0;
2230
2231         adapter->tx_dd_head = 0;
2232         adapter->tx_dd_tail = 0;
2233         adapter->tx_nsegs = 0;
2234 }
2235
2236 static int
2237 em_get_hw_info(struct adapter *adapter)
2238 {
2239         device_t dev = adapter->dev;
2240
2241         /* Save off the information about this board */
2242         adapter->hw.vendor_id = pci_get_vendor(dev);
2243         adapter->hw.device_id = pci_get_device(dev);
2244         adapter->hw.revision_id = pci_get_revid(dev);
2245         adapter->hw.subsystem_vendor_id = pci_get_subvendor(dev);
2246         adapter->hw.subsystem_device_id = pci_get_subdevice(dev);
2247
2248         /* Do Shared Code Init and Setup */
2249         if (e1000_set_mac_type(&adapter->hw))
2250                 return ENXIO;
2251         return 0;
2252 }
2253
2254 static int
2255 em_alloc_pci_res(struct adapter *adapter)
2256 {
2257         device_t dev = adapter->dev;
2258         u_int intr_flags;
2259         int val, rid, msi_enable;
2260
2261         /* Enable bus mastering */
2262         pci_enable_busmaster(dev);
2263
2264         adapter->memory_rid = EM_BAR_MEM;
2265         adapter->memory = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
2266                                 &adapter->memory_rid, RF_ACTIVE);
2267         if (adapter->memory == NULL) {
2268                 device_printf(dev, "Unable to allocate bus resource: memory\n");
2269                 return (ENXIO);
2270         }
2271         adapter->osdep.mem_bus_space_tag =
2272             rman_get_bustag(adapter->memory);
2273         adapter->osdep.mem_bus_space_handle =
2274             rman_get_bushandle(adapter->memory);
2275
2276         /* XXX This is quite goofy, it is not actually used */
2277         adapter->hw.hw_addr = (uint8_t *)&adapter->osdep.mem_bus_space_handle;
2278
2279         /* Only older adapters use IO mapping */
2280         if (adapter->hw.mac.type > e1000_82543 &&
2281             adapter->hw.mac.type < e1000_82571) {
2282                 /* Figure our where our IO BAR is ? */
2283                 for (rid = PCIR_BAR(0); rid < PCIR_CARDBUSCIS;) {
2284                         val = pci_read_config(dev, rid, 4);
2285                         if (EM_BAR_TYPE(val) == EM_BAR_TYPE_IO) {
2286                                 adapter->io_rid = rid;
2287                                 break;
2288                         }
2289                         rid += 4;
2290                         /* check for 64bit BAR */
2291                         if (EM_BAR_MEM_TYPE(val) == EM_BAR_MEM_TYPE_64BIT)
2292                                 rid += 4;
2293                 }
2294                 if (rid >= PCIR_CARDBUSCIS) {
2295                         device_printf(dev, "Unable to locate IO BAR\n");
2296                         return (ENXIO);
2297                 }
2298                 adapter->ioport = bus_alloc_resource_any(dev, SYS_RES_IOPORT,
2299                                         &adapter->io_rid, RF_ACTIVE);
2300                 if (adapter->ioport == NULL) {
2301                         device_printf(dev, "Unable to allocate bus resource: "
2302                             "ioport\n");
2303                         return (ENXIO);
2304                 }
2305                 adapter->hw.io_base = 0;
2306                 adapter->osdep.io_bus_space_tag =
2307                     rman_get_bustag(adapter->ioport);
2308                 adapter->osdep.io_bus_space_handle =
2309                     rman_get_bushandle(adapter->ioport);
2310         }
2311
2312         /*
2313          * Don't enable MSI-X on 82574, see:
2314          * 82574 specification update errata #15
2315          *
2316          * Don't enable MSI on PCI/PCI-X chips, see:
2317          * 82540 specification update errata #6
2318          * 82545 specification update errata #4
2319          *
2320          * Don't enable MSI on 82571/82572, see:
2321          * 82571/82572 specification update errata #63
2322          */
2323         msi_enable = em_msi_enable;
2324         if (msi_enable &&
2325             (!pci_is_pcie(dev) ||
2326              adapter->hw.mac.type == e1000_82571 ||
2327              adapter->hw.mac.type == e1000_82572))
2328                 msi_enable = 0;
2329
2330         adapter->intr_type = pci_alloc_1intr(dev, msi_enable,
2331             &adapter->intr_rid, &intr_flags);
2332
2333         if (adapter->intr_type == PCI_INTR_TYPE_LEGACY) {
2334                 int unshared;
2335
2336                 unshared = device_getenv_int(dev, "irq.unshared", 0);
2337                 if (!unshared) {
2338                         adapter->flags |= EM_FLAG_SHARED_INTR;
2339                         if (bootverbose)
2340                                 device_printf(dev, "IRQ shared\n");
2341                 } else {
2342                         intr_flags &= ~RF_SHAREABLE;
2343                         if (bootverbose)
2344                                 device_printf(dev, "IRQ unshared\n");
2345                 }
2346         }
2347
2348         adapter->intr_res = bus_alloc_resource_any(dev, SYS_RES_IRQ,
2349             &adapter->intr_rid, intr_flags);
2350         if (adapter->intr_res == NULL) {
2351                 device_printf(dev, "Unable to allocate bus resource: "
2352                     "interrupt\n");
2353                 return (ENXIO);
2354         }
2355
2356         adapter->hw.bus.pci_cmd_word = pci_read_config(dev, PCIR_COMMAND, 2);
2357         adapter->hw.back = &adapter->osdep;
2358         return (0);
2359 }
2360
2361 static void
2362 em_free_pci_res(struct adapter *adapter)
2363 {
2364         device_t dev = adapter->dev;
2365
2366         if (adapter->intr_res != NULL) {
2367                 bus_release_resource(dev, SYS_RES_IRQ,
2368                     adapter->intr_rid, adapter->intr_res);
2369         }
2370
2371         if (adapter->intr_type == PCI_INTR_TYPE_MSI)
2372                 pci_release_msi(dev);
2373
2374         if (adapter->memory != NULL) {
2375                 bus_release_resource(dev, SYS_RES_MEMORY,
2376                     adapter->memory_rid, adapter->memory);
2377         }
2378
2379         if (adapter->flash != NULL) {
2380                 bus_release_resource(dev, SYS_RES_MEMORY,
2381                     adapter->flash_rid, adapter->flash);
2382         }
2383
2384         if (adapter->ioport != NULL) {
2385                 bus_release_resource(dev, SYS_RES_IOPORT,
2386                     adapter->io_rid, adapter->ioport);
2387         }
2388 }
2389
2390 static int
2391 em_reset(struct adapter *adapter)
2392 {
2393         device_t dev = adapter->dev;
2394         uint16_t rx_buffer_size;
2395         uint32_t pba;
2396
2397         /* When hardware is reset, fifo_head is also reset */
2398         adapter->tx_fifo_head = 0;
2399
2400         /* Set up smart power down as default off on newer adapters. */
2401         if (!em_smart_pwr_down &&
2402             (adapter->hw.mac.type == e1000_82571 ||
2403              adapter->hw.mac.type == e1000_82572)) {
2404                 uint16_t phy_tmp = 0;
2405
2406                 /* Speed up time to link by disabling smart power down. */
2407                 e1000_read_phy_reg(&adapter->hw,
2408                     IGP02E1000_PHY_POWER_MGMT, &phy_tmp);
2409                 phy_tmp &= ~IGP02E1000_PM_SPD;
2410                 e1000_write_phy_reg(&adapter->hw,
2411                     IGP02E1000_PHY_POWER_MGMT, phy_tmp);
2412         }
2413
2414         /*
2415          * Packet Buffer Allocation (PBA)
2416          * Writing PBA sets the receive portion of the buffer
2417          * the remainder is used for the transmit buffer.
2418          *
2419          * Devices before the 82547 had a Packet Buffer of 64K.
2420          *   Default allocation: PBA=48K for Rx, leaving 16K for Tx.
2421          * After the 82547 the buffer was reduced to 40K.
2422          *   Default allocation: PBA=30K for Rx, leaving 10K for Tx.
2423          *   Note: default does not leave enough room for Jumbo Frame >10k.
2424          */
2425         switch (adapter->hw.mac.type) {
2426         case e1000_82547:
2427         case e1000_82547_rev_2: /* 82547: Total Packet Buffer is 40K */
2428                 if (adapter->hw.mac.max_frame_size > 8192)
2429                         pba = E1000_PBA_22K; /* 22K for Rx, 18K for Tx */
2430                 else
2431                         pba = E1000_PBA_30K; /* 30K for Rx, 10K for Tx */
2432                 adapter->tx_fifo_head = 0;
2433                 adapter->tx_head_addr = pba << EM_TX_HEAD_ADDR_SHIFT;
2434                 adapter->tx_fifo_size =
2435                     (E1000_PBA_40K - pba) << EM_PBA_BYTES_SHIFT;
2436                 break;
2437
2438         /* Total Packet Buffer on these is 48K */
2439         case e1000_82571:
2440         case e1000_82572:
2441         case e1000_80003es2lan:
2442                 pba = E1000_PBA_32K; /* 32K for Rx, 16K for Tx */
2443                 break;
2444
2445         case e1000_82573: /* 82573: Total Packet Buffer is 32K */
2446                 pba = E1000_PBA_12K; /* 12K for Rx, 20K for Tx */
2447                 break;
2448
2449         case e1000_82574:
2450         case e1000_82583:
2451                 pba = E1000_PBA_20K; /* 20K for Rx, 20K for Tx */
2452                 break;
2453
2454         case e1000_ich8lan:
2455                 pba = E1000_PBA_8K;
2456                 break;
2457
2458         case e1000_ich9lan:
2459         case e1000_ich10lan:
2460 #define E1000_PBA_10K   0x000A
2461                 pba = E1000_PBA_10K;
2462                 break;
2463
2464         case e1000_pchlan:
2465         case e1000_pch2lan:
2466         case e1000_pch_lpt:
2467                 pba = E1000_PBA_26K;
2468                 break;
2469
2470         default:
2471                 /* Devices before 82547 had a Packet Buffer of 64K.   */
2472                 if (adapter->hw.mac.max_frame_size > 8192)
2473                         pba = E1000_PBA_40K; /* 40K for Rx, 24K for Tx */
2474                 else
2475                         pba = E1000_PBA_48K; /* 48K for Rx, 16K for Tx */
2476         }
2477         E1000_WRITE_REG(&adapter->hw, E1000_PBA, pba);
2478
2479         /*
2480          * These parameters control the automatic generation (Tx) and
2481          * response (Rx) to Ethernet PAUSE frames.
2482          * - High water mark should allow for at least two frames to be
2483          *   received after sending an XOFF.
2484          * - Low water mark works best when it is very near the high water mark.
2485          *   This allows the receiver to restart by sending XON when it has
2486          *   drained a bit. Here we use an arbitary value of 1500 which will
2487          *   restart after one full frame is pulled from the buffer. There
2488          *   could be several smaller frames in the buffer and if so they will
2489          *   not trigger the XON until their total number reduces the buffer
2490          *   by 1500.
2491          * - The pause time is fairly large at 1000 x 512ns = 512 usec.
2492          */
2493         rx_buffer_size =
2494                 (E1000_READ_REG(&adapter->hw, E1000_PBA) & 0xffff) << 10;
2495
2496         adapter->hw.fc.high_water = rx_buffer_size -
2497             roundup2(adapter->hw.mac.max_frame_size, 1024);
2498         adapter->hw.fc.low_water = adapter->hw.fc.high_water - 1500;
2499
2500         if (adapter->hw.mac.type == e1000_80003es2lan)
2501                 adapter->hw.fc.pause_time = 0xFFFF;
2502         else
2503                 adapter->hw.fc.pause_time = EM_FC_PAUSE_TIME;
2504
2505         adapter->hw.fc.send_xon = TRUE;
2506
2507         adapter->hw.fc.requested_mode = e1000_ifmedia2fc(adapter->ifm_flowctrl);
2508
2509         /*
2510          * Device specific overrides/settings
2511          */
2512         switch (adapter->hw.mac.type) {
2513         case e1000_pchlan:
2514                 KASSERT(adapter->hw.fc.requested_mode == e1000_fc_rx_pause ||
2515                     adapter->hw.fc.requested_mode == e1000_fc_none,
2516                     ("unsupported flow control on PCH %d",
2517                      adapter->hw.fc.requested_mode));
2518                 adapter->hw.fc.pause_time = 0xFFFF; /* override */
2519                 if (adapter->arpcom.ac_if.if_mtu > ETHERMTU) {
2520                         adapter->hw.fc.high_water = 0x3500;
2521                         adapter->hw.fc.low_water = 0x1500;
2522                 } else {
2523                         adapter->hw.fc.high_water = 0x5000;
2524                         adapter->hw.fc.low_water = 0x3000;
2525                 }
2526                 adapter->hw.fc.refresh_time = 0x1000;
2527                 break;
2528
2529         case e1000_pch2lan:
2530         case e1000_pch_lpt:
2531                 adapter->hw.fc.high_water = 0x5C20;
2532                 adapter->hw.fc.low_water = 0x5048;
2533                 adapter->hw.fc.pause_time = 0x0650;
2534                 adapter->hw.fc.refresh_time = 0x0400;
2535                 /* Jumbos need adjusted PBA */
2536                 if (adapter->arpcom.ac_if.if_mtu > ETHERMTU)
2537                         E1000_WRITE_REG(&adapter->hw, E1000_PBA, 12);
2538                 else
2539                         E1000_WRITE_REG(&adapter->hw, E1000_PBA, 26);
2540                 break;
2541
2542         case e1000_ich9lan:
2543         case e1000_ich10lan:
2544                 if (adapter->arpcom.ac_if.if_mtu > ETHERMTU) {
2545                         adapter->hw.fc.high_water = 0x2800;
2546                         adapter->hw.fc.low_water =
2547                             adapter->hw.fc.high_water - 8;
2548                         break;
2549                 }
2550                 /* FALL THROUGH */
2551         default:
2552                 if (adapter->hw.mac.type == e1000_80003es2lan)
2553                         adapter->hw.fc.pause_time = 0xFFFF;
2554                 break;
2555         }
2556
2557         /* Issue a global reset */
2558         e1000_reset_hw(&adapter->hw);
2559         if (adapter->hw.mac.type >= e1000_82544)
2560                 E1000_WRITE_REG(&adapter->hw, E1000_WUC, 0);
2561         em_disable_aspm(adapter);
2562
2563         if (e1000_init_hw(&adapter->hw) < 0) {
2564                 device_printf(dev, "Hardware Initialization Failed\n");
2565                 return (EIO);
2566         }
2567
2568         E1000_WRITE_REG(&adapter->hw, E1000_VET, ETHERTYPE_VLAN);
2569         e1000_get_phy_info(&adapter->hw);
2570         e1000_check_for_link(&adapter->hw);
2571
2572         return (0);
2573 }
2574
2575 static void
2576 em_setup_ifp(struct adapter *adapter)
2577 {
2578         struct ifnet *ifp = &adapter->arpcom.ac_if;
2579
2580         if_initname(ifp, device_get_name(adapter->dev),
2581                     device_get_unit(adapter->dev));
2582         ifp->if_softc = adapter;
2583         ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
2584         ifp->if_init =  em_init;
2585         ifp->if_ioctl = em_ioctl;
2586         ifp->if_start = em_start;
2587 #ifdef IFPOLL_ENABLE
2588         ifp->if_npoll = em_npoll;
2589 #endif
2590         ifp->if_watchdog = em_watchdog;
2591         ifp->if_nmbclusters = adapter->num_rx_desc;
2592         ifq_set_maxlen(&ifp->if_snd, adapter->num_tx_desc - 1);
2593         ifq_set_ready(&ifp->if_snd);
2594
2595         ether_ifattach(ifp, adapter->hw.mac.addr, NULL);
2596
2597         ifp->if_capabilities = IFCAP_VLAN_HWTAGGING | IFCAP_VLAN_MTU;
2598         if (adapter->hw.mac.type >= e1000_82543)
2599                 ifp->if_capabilities |= IFCAP_HWCSUM;
2600         if (adapter->flags & EM_FLAG_TSO)
2601                 ifp->if_capabilities |= IFCAP_TSO;
2602         ifp->if_capenable = ifp->if_capabilities;
2603
2604         if (ifp->if_capenable & IFCAP_TXCSUM)
2605                 ifp->if_hwassist |= EM_CSUM_FEATURES;
2606         if (ifp->if_capenable & IFCAP_TSO)
2607                 ifp->if_hwassist |= CSUM_TSO;
2608
2609         /*
2610          * Tell the upper layer(s) we support long frames.
2611          */
2612         ifp->if_data.ifi_hdrlen = sizeof(struct ether_vlan_header);
2613
2614         /*
2615          * Specify the media types supported by this adapter and register
2616          * callbacks to update media and link information
2617          */
2618         if (adapter->hw.phy.media_type == e1000_media_type_fiber ||
2619             adapter->hw.phy.media_type == e1000_media_type_internal_serdes) {
2620                 u_char fiber_type = IFM_1000_SX; /* default type */
2621
2622                 if (adapter->hw.mac.type == e1000_82545)
2623                         fiber_type = IFM_1000_LX;
2624                 ifmedia_add(&adapter->media, IFM_ETHER | fiber_type | IFM_FDX,
2625                             0, NULL);
2626         } else {
2627                 ifmedia_add(&adapter->media, IFM_ETHER | IFM_10_T, 0, NULL);
2628                 ifmedia_add(&adapter->media, IFM_ETHER | IFM_10_T | IFM_FDX,
2629                             0, NULL);
2630                 ifmedia_add(&adapter->media, IFM_ETHER | IFM_100_TX,
2631                             0, NULL);
2632                 ifmedia_add(&adapter->media, IFM_ETHER | IFM_100_TX | IFM_FDX,
2633                             0, NULL);
2634                 if (adapter->hw.phy.type != e1000_phy_ife) {
2635                         ifmedia_add(&adapter->media,
2636                                 IFM_ETHER | IFM_1000_T | IFM_FDX, 0, NULL);
2637                 }
2638         }
2639         ifmedia_add(&adapter->media, IFM_ETHER | IFM_AUTO, 0, NULL);
2640         ifmedia_set(&adapter->media, IFM_ETHER | IFM_AUTO |
2641             adapter->ifm_flowctrl);
2642 }
2643
2644
2645 /*
2646  * Workaround for SmartSpeed on 82541 and 82547 controllers
2647  */
2648 static void
2649 em_smartspeed(struct adapter *adapter)
2650 {
2651         uint16_t phy_tmp;
2652
2653         if (adapter->link_active || adapter->hw.phy.type != e1000_phy_igp ||
2654             adapter->hw.mac.autoneg == 0 ||
2655             (adapter->hw.phy.autoneg_advertised & ADVERTISE_1000_FULL) == 0)
2656                 return;
2657
2658         if (adapter->smartspeed == 0) {
2659                 /*
2660                  * If Master/Slave config fault is asserted twice,
2661                  * we assume back-to-back
2662                  */
2663                 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_tmp);
2664                 if (!(phy_tmp & SR_1000T_MS_CONFIG_FAULT))
2665                         return;
2666                 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_tmp);
2667                 if (phy_tmp & SR_1000T_MS_CONFIG_FAULT) {
2668                         e1000_read_phy_reg(&adapter->hw,
2669                             PHY_1000T_CTRL, &phy_tmp);
2670                         if (phy_tmp & CR_1000T_MS_ENABLE) {
2671                                 phy_tmp &= ~CR_1000T_MS_ENABLE;
2672                                 e1000_write_phy_reg(&adapter->hw,
2673                                     PHY_1000T_CTRL, phy_tmp);
2674                                 adapter->smartspeed++;
2675                                 if (adapter->hw.mac.autoneg &&
2676                                     !e1000_phy_setup_autoneg(&adapter->hw) &&
2677                                     !e1000_read_phy_reg(&adapter->hw,
2678                                      PHY_CONTROL, &phy_tmp)) {
2679                                         phy_tmp |= MII_CR_AUTO_NEG_EN |
2680                                                    MII_CR_RESTART_AUTO_NEG;
2681                                         e1000_write_phy_reg(&adapter->hw,
2682                                             PHY_CONTROL, phy_tmp);
2683                                 }
2684                         }
2685                 }
2686                 return;
2687         } else if (adapter->smartspeed == EM_SMARTSPEED_DOWNSHIFT) {
2688                 /* If still no link, perhaps using 2/3 pair cable */
2689                 e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_tmp);
2690                 phy_tmp |= CR_1000T_MS_ENABLE;
2691                 e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL, phy_tmp);
2692                 if (adapter->hw.mac.autoneg &&
2693                     !e1000_phy_setup_autoneg(&adapter->hw) &&
2694                     !e1000_read_phy_reg(&adapter->hw, PHY_CONTROL, &phy_tmp)) {
2695                         phy_tmp |= MII_CR_AUTO_NEG_EN | MII_CR_RESTART_AUTO_NEG;
2696                         e1000_write_phy_reg(&adapter->hw, PHY_CONTROL, phy_tmp);
2697                 }
2698         }
2699
2700         /* Restart process after EM_SMARTSPEED_MAX iterations */
2701         if (adapter->smartspeed++ == EM_SMARTSPEED_MAX)
2702                 adapter->smartspeed = 0;
2703 }
2704
2705 static int
2706 em_dma_malloc(struct adapter *adapter, bus_size_t size,
2707               struct em_dma_alloc *dma)
2708 {
2709         dma->dma_vaddr = bus_dmamem_coherent_any(adapter->parent_dtag,
2710                                 EM_DBA_ALIGN, size, BUS_DMA_WAITOK,
2711                                 &dma->dma_tag, &dma->dma_map,
2712                                 &dma->dma_paddr);
2713         if (dma->dma_vaddr == NULL)
2714                 return ENOMEM;
2715         else
2716                 return 0;
2717 }
2718
2719 static void
2720 em_dma_free(struct adapter *adapter, struct em_dma_alloc *dma)
2721 {
2722         if (dma->dma_tag == NULL)
2723                 return;
2724         bus_dmamap_unload(dma->dma_tag, dma->dma_map);
2725         bus_dmamem_free(dma->dma_tag, dma->dma_vaddr, dma->dma_map);
2726         bus_dma_tag_destroy(dma->dma_tag);
2727 }
2728
2729 static int
2730 em_create_tx_ring(struct adapter *adapter)
2731 {
2732         device_t dev = adapter->dev;
2733         struct em_buffer *tx_buffer;
2734         int error, i;
2735
2736         adapter->tx_buffer_area =
2737                 kmalloc(sizeof(struct em_buffer) * adapter->num_tx_desc,
2738                         M_DEVBUF, M_WAITOK | M_ZERO);
2739
2740         /*
2741          * Create DMA tags for tx buffers
2742          */
2743         error = bus_dma_tag_create(adapter->parent_dtag, /* parent */
2744                         1, 0,                   /* alignment, bounds */
2745                         BUS_SPACE_MAXADDR,      /* lowaddr */
2746                         BUS_SPACE_MAXADDR,      /* highaddr */
2747                         NULL, NULL,             /* filter, filterarg */
2748                         EM_TSO_SIZE,            /* maxsize */
2749                         EM_MAX_SCATTER,         /* nsegments */
2750                         PAGE_SIZE,              /* maxsegsize */
2751                         BUS_DMA_WAITOK | BUS_DMA_ALLOCNOW |
2752                         BUS_DMA_ONEBPAGE,       /* flags */
2753                         &adapter->txtag);
2754         if (error) {
2755                 device_printf(dev, "Unable to allocate TX DMA tag\n");
2756                 kfree(adapter->tx_buffer_area, M_DEVBUF);
2757                 adapter->tx_buffer_area = NULL;
2758                 return error;
2759         }
2760
2761         /*
2762          * Create DMA maps for tx buffers
2763          */
2764         for (i = 0; i < adapter->num_tx_desc; i++) {
2765                 tx_buffer = &adapter->tx_buffer_area[i];
2766
2767                 error = bus_dmamap_create(adapter->txtag,
2768                                           BUS_DMA_WAITOK | BUS_DMA_ONEBPAGE,
2769                                           &tx_buffer->map);
2770                 if (error) {
2771                         device_printf(dev, "Unable to create TX DMA map\n");
2772                         em_destroy_tx_ring(adapter, i);
2773                         return error;
2774                 }
2775         }
2776         return (0);
2777 }
2778
2779 static void
2780 em_init_tx_ring(struct adapter *adapter)
2781 {
2782         /* Clear the old ring contents */
2783         bzero(adapter->tx_desc_base,
2784             (sizeof(struct e1000_tx_desc)) * adapter->num_tx_desc);
2785
2786         /* Reset state */
2787         adapter->next_avail_tx_desc = 0;
2788         adapter->next_tx_to_clean = 0;
2789         adapter->num_tx_desc_avail = adapter->num_tx_desc;
2790 }
2791
2792 static void
2793 em_init_tx_unit(struct adapter *adapter)
2794 {
2795         uint32_t tctl, tarc, tipg = 0;
2796         uint64_t bus_addr;
2797
2798         /* Setup the Base and Length of the Tx Descriptor Ring */
2799         bus_addr = adapter->txdma.dma_paddr;
2800         E1000_WRITE_REG(&adapter->hw, E1000_TDLEN(0),
2801             adapter->num_tx_desc * sizeof(struct e1000_tx_desc));
2802         E1000_WRITE_REG(&adapter->hw, E1000_TDBAH(0),
2803             (uint32_t)(bus_addr >> 32));
2804         E1000_WRITE_REG(&adapter->hw, E1000_TDBAL(0),
2805             (uint32_t)bus_addr);
2806         /* Setup the HW Tx Head and Tail descriptor pointers */
2807         E1000_WRITE_REG(&adapter->hw, E1000_TDT(0), 0);
2808         E1000_WRITE_REG(&adapter->hw, E1000_TDH(0), 0);
2809
2810         /* Set the default values for the Tx Inter Packet Gap timer */
2811         switch (adapter->hw.mac.type) {
2812         case e1000_82542:
2813                 tipg = DEFAULT_82542_TIPG_IPGT;
2814                 tipg |= DEFAULT_82542_TIPG_IPGR1 << E1000_TIPG_IPGR1_SHIFT;
2815                 tipg |= DEFAULT_82542_TIPG_IPGR2 << E1000_TIPG_IPGR2_SHIFT;
2816                 break;
2817
2818         case e1000_80003es2lan:
2819                 tipg = DEFAULT_82543_TIPG_IPGR1;
2820                 tipg |= DEFAULT_80003ES2LAN_TIPG_IPGR2 <<
2821                     E1000_TIPG_IPGR2_SHIFT;
2822                 break;
2823
2824         default:
2825                 if (adapter->hw.phy.media_type == e1000_media_type_fiber ||
2826                     adapter->hw.phy.media_type ==
2827                     e1000_media_type_internal_serdes)
2828                         tipg = DEFAULT_82543_TIPG_IPGT_FIBER;
2829                 else
2830                         tipg = DEFAULT_82543_TIPG_IPGT_COPPER;
2831                 tipg |= DEFAULT_82543_TIPG_IPGR1 << E1000_TIPG_IPGR1_SHIFT;
2832                 tipg |= DEFAULT_82543_TIPG_IPGR2 << E1000_TIPG_IPGR2_SHIFT;
2833                 break;
2834         }
2835
2836         E1000_WRITE_REG(&adapter->hw, E1000_TIPG, tipg);
2837
2838         /* NOTE: 0 is not allowed for TIDV */
2839         E1000_WRITE_REG(&adapter->hw, E1000_TIDV, 1);
2840         if(adapter->hw.mac.type >= e1000_82540)
2841                 E1000_WRITE_REG(&adapter->hw, E1000_TADV, 0);
2842
2843         if (adapter->hw.mac.type == e1000_82571 ||
2844             adapter->hw.mac.type == e1000_82572) {
2845                 tarc = E1000_READ_REG(&adapter->hw, E1000_TARC(0));
2846                 tarc |= SPEED_MODE_BIT;
2847                 E1000_WRITE_REG(&adapter->hw, E1000_TARC(0), tarc);
2848         } else if (adapter->hw.mac.type == e1000_80003es2lan) {
2849                 tarc = E1000_READ_REG(&adapter->hw, E1000_TARC(0));
2850                 tarc |= 1;
2851                 E1000_WRITE_REG(&adapter->hw, E1000_TARC(0), tarc);
2852                 tarc = E1000_READ_REG(&adapter->hw, E1000_TARC(1));
2853                 tarc |= 1;
2854                 E1000_WRITE_REG(&adapter->hw, E1000_TARC(1), tarc);
2855         }
2856
2857         /* Program the Transmit Control Register */
2858         tctl = E1000_READ_REG(&adapter->hw, E1000_TCTL);
2859         tctl &= ~E1000_TCTL_CT;
2860         tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC | E1000_TCTL_EN |
2861                 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
2862
2863         if (adapter->hw.mac.type >= e1000_82571)
2864                 tctl |= E1000_TCTL_MULR;
2865
2866         /* This write will effectively turn on the transmit unit. */
2867         E1000_WRITE_REG(&adapter->hw, E1000_TCTL, tctl);
2868
2869         if (adapter->hw.mac.type == e1000_82571 ||
2870             adapter->hw.mac.type == e1000_82572 ||
2871             adapter->hw.mac.type == e1000_80003es2lan) {
2872                 /* Bit 28 of TARC1 must be cleared when MULR is enabled */
2873                 tarc = E1000_READ_REG(&adapter->hw, E1000_TARC(1));
2874                 tarc &= ~(1 << 28);
2875                 E1000_WRITE_REG(&adapter->hw, E1000_TARC(1), tarc);
2876         }
2877 }
2878
2879 static void
2880 em_destroy_tx_ring(struct adapter *adapter, int ndesc)
2881 {
2882         struct em_buffer *tx_buffer;
2883         int i;
2884
2885         if (adapter->tx_buffer_area == NULL)
2886                 return;
2887
2888         for (i = 0; i < ndesc; i++) {
2889                 tx_buffer = &adapter->tx_buffer_area[i];
2890
2891                 KKASSERT(tx_buffer->m_head == NULL);
2892                 bus_dmamap_destroy(adapter->txtag, tx_buffer->map);
2893         }
2894         bus_dma_tag_destroy(adapter->txtag);
2895
2896         kfree(adapter->tx_buffer_area, M_DEVBUF);
2897         adapter->tx_buffer_area = NULL;
2898 }
2899
2900 /*
2901  * The offload context needs to be set when we transfer the first
2902  * packet of a particular protocol (TCP/UDP).  This routine has been
2903  * enhanced to deal with inserted VLAN headers.
2904  *
2905  * If the new packet's ether header length, ip header length and
2906  * csum offloading type are same as the previous packet, we should
2907  * avoid allocating a new csum context descriptor; mainly to take
2908  * advantage of the pipeline effect of the TX data read request.
2909  *
2910  * This function returns number of TX descrptors allocated for
2911  * csum context.
2912  */
2913 static int
2914 em_txcsum(struct adapter *adapter, struct mbuf *mp,
2915           uint32_t *txd_upper, uint32_t *txd_lower)
2916 {
2917         struct e1000_context_desc *TXD;
2918         int curr_txd, ehdrlen, csum_flags;
2919         uint32_t cmd, hdr_len, ip_hlen;
2920
2921         csum_flags = mp->m_pkthdr.csum_flags & EM_CSUM_FEATURES;
2922         ip_hlen = mp->m_pkthdr.csum_iphlen;
2923         ehdrlen = mp->m_pkthdr.csum_lhlen;
2924
2925         if (adapter->csum_lhlen == ehdrlen &&
2926             adapter->csum_iphlen == ip_hlen &&
2927             adapter->csum_flags == csum_flags) {
2928                 /*
2929                  * Same csum offload context as the previous packets;
2930                  * just return.
2931                  */
2932                 *txd_upper = adapter->csum_txd_upper;
2933                 *txd_lower = adapter->csum_txd_lower;
2934                 return 0;
2935         }
2936
2937         /*
2938          * Setup a new csum offload context.
2939          */
2940
2941         curr_txd = adapter->next_avail_tx_desc;
2942         TXD = (struct e1000_context_desc *)&adapter->tx_desc_base[curr_txd];
2943
2944         cmd = 0;
2945
2946         /* Setup of IP header checksum. */
2947         if (csum_flags & CSUM_IP) {
2948                 /*
2949                  * Start offset for header checksum calculation.
2950                  * End offset for header checksum calculation.
2951                  * Offset of place to put the checksum.
2952                  */
2953                 TXD->lower_setup.ip_fields.ipcss = ehdrlen;
2954                 TXD->lower_setup.ip_fields.ipcse =
2955                     htole16(ehdrlen + ip_hlen - 1);
2956                 TXD->lower_setup.ip_fields.ipcso =
2957                     ehdrlen + offsetof(struct ip, ip_sum);
2958                 cmd |= E1000_TXD_CMD_IP;
2959                 *txd_upper |= E1000_TXD_POPTS_IXSM << 8;
2960         }
2961         hdr_len = ehdrlen + ip_hlen;
2962
2963         if (csum_flags & CSUM_TCP) {
2964                 /*
2965                  * Start offset for payload checksum calculation.
2966                  * End offset for payload checksum calculation.
2967                  * Offset of place to put the checksum.
2968                  */
2969                 TXD->upper_setup.tcp_fields.tucss = hdr_len;
2970                 TXD->upper_setup.tcp_fields.tucse = htole16(0);
2971                 TXD->upper_setup.tcp_fields.tucso =
2972                     hdr_len + offsetof(struct tcphdr, th_sum);
2973                 cmd |= E1000_TXD_CMD_TCP;
2974                 *txd_upper |= E1000_TXD_POPTS_TXSM << 8;
2975         } else if (csum_flags & CSUM_UDP) {
2976                 /*
2977                  * Start offset for header checksum calculation.
2978                  * End offset for header checksum calculation.
2979                  * Offset of place to put the checksum.
2980                  */
2981                 TXD->upper_setup.tcp_fields.tucss = hdr_len;
2982                 TXD->upper_setup.tcp_fields.tucse = htole16(0);
2983                 TXD->upper_setup.tcp_fields.tucso =
2984                     hdr_len + offsetof(struct udphdr, uh_sum);
2985                 *txd_upper |= E1000_TXD_POPTS_TXSM << 8;
2986         }
2987
2988         *txd_lower = E1000_TXD_CMD_DEXT |       /* Extended descr type */
2989                      E1000_TXD_DTYP_D;          /* Data descr */
2990
2991         /* Save the information for this csum offloading context */
2992         adapter->csum_lhlen = ehdrlen;
2993         adapter->csum_iphlen = ip_hlen;
2994         adapter->csum_flags = csum_flags;
2995         adapter->csum_txd_upper = *txd_upper;
2996         adapter->csum_txd_lower = *txd_lower;
2997
2998         TXD->tcp_seg_setup.data = htole32(0);
2999         TXD->cmd_and_length =
3000             htole32(E1000_TXD_CMD_IFCS | E1000_TXD_CMD_DEXT | cmd);
3001
3002         if (++curr_txd == adapter->num_tx_desc)
3003                 curr_txd = 0;
3004
3005         KKASSERT(adapter->num_tx_desc_avail > 0);
3006         adapter->num_tx_desc_avail--;
3007
3008         adapter->next_avail_tx_desc = curr_txd;
3009         return 1;
3010 }
3011
3012 static void
3013 em_txeof(struct adapter *adapter)
3014 {
3015         struct ifnet *ifp = &adapter->arpcom.ac_if;
3016         struct em_buffer *tx_buffer;
3017         int first, num_avail;
3018
3019         if (adapter->tx_dd_head == adapter->tx_dd_tail)
3020                 return;
3021
3022         if (adapter->num_tx_desc_avail == adapter->num_tx_desc)
3023                 return;
3024
3025         num_avail = adapter->num_tx_desc_avail;
3026         first = adapter->next_tx_to_clean;
3027
3028         while (adapter->tx_dd_head != adapter->tx_dd_tail) {
3029                 struct e1000_tx_desc *tx_desc;
3030                 int dd_idx = adapter->tx_dd[adapter->tx_dd_head];
3031
3032                 tx_desc = &adapter->tx_desc_base[dd_idx];
3033                 if (tx_desc->upper.fields.status & E1000_TXD_STAT_DD) {
3034                         EM_INC_TXDD_IDX(adapter->tx_dd_head);
3035
3036                         if (++dd_idx == adapter->num_tx_desc)
3037                                 dd_idx = 0;
3038
3039                         while (first != dd_idx) {
3040                                 logif(pkt_txclean);
3041
3042                                 num_avail++;
3043
3044                                 tx_buffer = &adapter->tx_buffer_area[first];
3045                                 if (tx_buffer->m_head) {
3046                                         bus_dmamap_unload(adapter->txtag,
3047                                                           tx_buffer->map);
3048                                         m_freem(tx_buffer->m_head);
3049                                         tx_buffer->m_head = NULL;
3050                                 }
3051
3052                                 if (++first == adapter->num_tx_desc)
3053                                         first = 0;
3054                         }
3055                 } else {
3056                         break;
3057                 }
3058         }
3059         adapter->next_tx_to_clean = first;
3060         adapter->num_tx_desc_avail = num_avail;
3061
3062         if (adapter->tx_dd_head == adapter->tx_dd_tail) {
3063                 adapter->tx_dd_head = 0;
3064                 adapter->tx_dd_tail = 0;
3065         }
3066
3067         if (!EM_IS_OACTIVE(adapter)) {
3068                 ifq_clr_oactive(&ifp->if_snd);
3069
3070                 /* All clean, turn off the timer */
3071                 if (adapter->num_tx_desc_avail == adapter->num_tx_desc)
3072                         ifp->if_timer = 0;
3073         }
3074 }
3075
3076 static void
3077 em_tx_collect(struct adapter *adapter)
3078 {
3079         struct ifnet *ifp = &adapter->arpcom.ac_if;
3080         struct em_buffer *tx_buffer;
3081         int tdh, first, num_avail, dd_idx = -1;
3082
3083         if (adapter->num_tx_desc_avail == adapter->num_tx_desc)
3084                 return;
3085
3086         tdh = E1000_READ_REG(&adapter->hw, E1000_TDH(0));
3087         if (tdh == adapter->next_tx_to_clean)
3088                 return;
3089
3090         if (adapter->tx_dd_head != adapter->tx_dd_tail)
3091                 dd_idx = adapter->tx_dd[adapter->tx_dd_head];
3092
3093         num_avail = adapter->num_tx_desc_avail;
3094         first = adapter->next_tx_to_clean;
3095
3096         while (first != tdh) {
3097                 logif(pkt_txclean);
3098
3099                 num_avail++;
3100
3101                 tx_buffer = &adapter->tx_buffer_area[first];
3102                 if (tx_buffer->m_head) {
3103                         bus_dmamap_unload(adapter->txtag,
3104                                           tx_buffer->map);
3105                         m_freem(tx_buffer->m_head);
3106                         tx_buffer->m_head = NULL;
3107                 }
3108
3109                 if (first == dd_idx) {
3110                         EM_INC_TXDD_IDX(adapter->tx_dd_head);
3111                         if (adapter->tx_dd_head == adapter->tx_dd_tail) {
3112                                 adapter->tx_dd_head = 0;
3113                                 adapter->tx_dd_tail = 0;
3114                                 dd_idx = -1;
3115                         } else {
3116                                 dd_idx = adapter->tx_dd[adapter->tx_dd_head];
3117                         }
3118                 }
3119
3120                 if (++first == adapter->num_tx_desc)
3121                         first = 0;
3122         }
3123         adapter->next_tx_to_clean = first;
3124         adapter->num_tx_desc_avail = num_avail;
3125
3126         if (!EM_IS_OACTIVE(adapter)) {
3127                 ifq_clr_oactive(&ifp->if_snd);
3128
3129                 /* All clean, turn off the timer */
3130                 if (adapter->num_tx_desc_avail == adapter->num_tx_desc)
3131                         ifp->if_timer = 0;
3132         }
3133 }
3134
3135 /*
3136  * When Link is lost sometimes there is work still in the TX ring
3137  * which will result in a watchdog, rather than allow that do an
3138  * attempted cleanup and then reinit here.  Note that this has been
3139  * seens mostly with fiber adapters.
3140  */
3141 static void
3142 em_tx_purge(struct adapter *adapter)
3143 {
3144         struct ifnet *ifp = &adapter->arpcom.ac_if;
3145
3146         if (!adapter->link_active && ifp->if_timer) {
3147                 em_tx_collect(adapter);
3148                 if (ifp->if_timer) {
3149                         if_printf(ifp, "Link lost, TX pending, reinit\n");
3150                         ifp->if_timer = 0;
3151                         em_init(adapter);
3152                 }
3153         }
3154 }
3155
3156 static int
3157 em_newbuf(struct adapter *adapter, int i, int init)
3158 {
3159         struct mbuf *m;
3160         bus_dma_segment_t seg;
3161         bus_dmamap_t map;
3162         struct em_buffer *rx_buffer;
3163         int error, nseg;
3164
3165         m = m_getcl(init ? M_WAITOK : M_NOWAIT, MT_DATA, M_PKTHDR);
3166         if (m == NULL) {
3167                 adapter->mbuf_cluster_failed++;
3168                 if (init) {
3169                         if_printf(&adapter->arpcom.ac_if,
3170                                   "Unable to allocate RX mbuf\n");
3171                 }
3172                 return (ENOBUFS);
3173         }
3174         m->m_len = m->m_pkthdr.len = MCLBYTES;
3175
3176         if (adapter->hw.mac.max_frame_size <= MCLBYTES - ETHER_ALIGN)
3177                 m_adj(m, ETHER_ALIGN);
3178
3179         error = bus_dmamap_load_mbuf_segment(adapter->rxtag,
3180                         adapter->rx_sparemap, m,
3181                         &seg, 1, &nseg, BUS_DMA_NOWAIT);
3182         if (error) {
3183                 m_freem(m);
3184                 if (init) {
3185                         if_printf(&adapter->arpcom.ac_if,
3186                                   "Unable to load RX mbuf\n");
3187                 }
3188                 return (error);
3189         }
3190
3191         rx_buffer = &adapter->rx_buffer_area[i];
3192         if (rx_buffer->m_head != NULL)
3193                 bus_dmamap_unload(adapter->rxtag, rx_buffer->map);
3194
3195         map = rx_buffer->map;
3196         rx_buffer->map = adapter->rx_sparemap;
3197         adapter->rx_sparemap = map;
3198
3199         rx_buffer->m_head = m;
3200
3201         adapter->rx_desc_base[i].buffer_addr = htole64(seg.ds_addr);
3202         return (0);
3203 }
3204
3205 static int
3206 em_create_rx_ring(struct adapter *adapter)
3207 {
3208         device_t dev = adapter->dev;
3209         struct em_buffer *rx_buffer;
3210         int i, error;
3211
3212         adapter->rx_buffer_area =
3213                 kmalloc(sizeof(struct em_buffer) * adapter->num_rx_desc,
3214                         M_DEVBUF, M_WAITOK | M_ZERO);
3215
3216         /*
3217          * Create DMA tag for rx buffers
3218          */
3219         error = bus_dma_tag_create(adapter->parent_dtag, /* parent */
3220                         1, 0,                   /* alignment, bounds */
3221                         BUS_SPACE_MAXADDR,      /* lowaddr */
3222                         BUS_SPACE_MAXADDR,      /* highaddr */
3223                         NULL, NULL,             /* filter, filterarg */
3224                         MCLBYTES,               /* maxsize */
3225                         1,                      /* nsegments */
3226                         MCLBYTES,               /* maxsegsize */
3227                         BUS_DMA_WAITOK | BUS_DMA_ALLOCNOW, /* flags */
3228                         &adapter->rxtag);
3229         if (error) {
3230                 device_printf(dev, "Unable to allocate RX DMA tag\n");
3231                 kfree(adapter->rx_buffer_area, M_DEVBUF);
3232                 adapter->rx_buffer_area = NULL;
3233                 return error;
3234         }
3235
3236         /*
3237          * Create spare DMA map for rx buffers
3238          */
3239         error = bus_dmamap_create(adapter->rxtag, BUS_DMA_WAITOK,
3240                                   &adapter->rx_sparemap);
3241         if (error) {
3242                 device_printf(dev, "Unable to create spare RX DMA map\n");
3243                 bus_dma_tag_destroy(adapter->rxtag);
3244                 kfree(adapter->rx_buffer_area, M_DEVBUF);
3245                 adapter->rx_buffer_area = NULL;
3246                 return error;
3247         }
3248
3249         /*
3250          * Create DMA maps for rx buffers
3251          */
3252         for (i = 0; i < adapter->num_rx_desc; i++) {
3253                 rx_buffer = &adapter->rx_buffer_area[i];
3254
3255                 error = bus_dmamap_create(adapter->rxtag, BUS_DMA_WAITOK,
3256                                           &rx_buffer->map);
3257                 if (error) {
3258                         device_printf(dev, "Unable to create RX DMA map\n");
3259                         em_destroy_rx_ring(adapter, i);
3260                         return error;
3261                 }
3262         }
3263         return (0);
3264 }
3265
3266 static int
3267 em_init_rx_ring(struct adapter *adapter)
3268 {
3269         int i, error;
3270
3271         /* Reset descriptor ring */
3272         bzero(adapter->rx_desc_base,
3273             (sizeof(struct e1000_rx_desc)) * adapter->num_rx_desc);
3274
3275         /* Allocate new ones. */
3276         for (i = 0; i < adapter->num_rx_desc; i++) {
3277                 error = em_newbuf(adapter, i, 1);
3278                 if (error)
3279                         return (error);
3280         }
3281
3282         /* Setup our descriptor pointers */
3283         adapter->next_rx_desc_to_check = 0;
3284
3285         return (0);
3286 }
3287
3288 static void
3289 em_init_rx_unit(struct adapter *adapter)
3290 {
3291         struct ifnet *ifp = &adapter->arpcom.ac_if;
3292         uint64_t bus_addr;
3293         uint32_t rctl;
3294
3295         /*
3296          * Make sure receives are disabled while setting
3297          * up the descriptor ring
3298          */
3299         rctl = E1000_READ_REG(&adapter->hw, E1000_RCTL);
3300         E1000_WRITE_REG(&adapter->hw, E1000_RCTL, rctl & ~E1000_RCTL_EN);
3301
3302         if (adapter->hw.mac.type >= e1000_82540) {
3303                 uint32_t itr;
3304
3305                 /*
3306                  * Set the interrupt throttling rate. Value is calculated
3307                  * as ITR = 1 / (INT_THROTTLE_CEIL * 256ns)
3308                  */
3309                 if (adapter->int_throttle_ceil)
3310                         itr = 1000000000 / 256 / adapter->int_throttle_ceil;
3311                 else
3312                         itr = 0;
3313                 em_set_itr(adapter, itr);
3314         }
3315
3316         /* Disable accelerated ackknowledge */
3317         if (adapter->hw.mac.type == e1000_82574) {
3318                 E1000_WRITE_REG(&adapter->hw,
3319                     E1000_RFCTL, E1000_RFCTL_ACK_DIS);
3320         }
3321
3322         /* Receive Checksum Offload for TCP and UDP */
3323         if (ifp->if_capenable & IFCAP_RXCSUM) {
3324                 uint32_t rxcsum;
3325
3326                 rxcsum = E1000_READ_REG(&adapter->hw, E1000_RXCSUM);
3327                 rxcsum |= (E1000_RXCSUM_IPOFL | E1000_RXCSUM_TUOFL);
3328                 E1000_WRITE_REG(&adapter->hw, E1000_RXCSUM, rxcsum);
3329         }
3330
3331         /*
3332          * XXX TEMPORARY WORKAROUND: on some systems with 82573
3333          * long latencies are observed, like Lenovo X60. This
3334          * change eliminates the problem, but since having positive
3335          * values in RDTR is a known source of problems on other
3336          * platforms another solution is being sought.
3337          */
3338         if (em_82573_workaround && adapter->hw.mac.type == e1000_82573) {
3339                 E1000_WRITE_REG(&adapter->hw, E1000_RADV, EM_RADV_82573);
3340                 E1000_WRITE_REG(&adapter->hw, E1000_RDTR, EM_RDTR_82573);
3341         }
3342
3343         /*
3344          * Setup the Base and Length of the Rx Descriptor Ring
3345          */
3346         bus_addr = adapter->rxdma.dma_paddr;
3347         E1000_WRITE_REG(&adapter->hw, E1000_RDLEN(0),
3348             adapter->num_rx_desc * sizeof(struct e1000_rx_desc));
3349         E1000_WRITE_REG(&adapter->hw, E1000_RDBAH(0),
3350             (uint32_t)(bus_addr >> 32));
3351         E1000_WRITE_REG(&adapter->hw, E1000_RDBAL(0),
3352             (uint32_t)bus_addr);
3353
3354         /*
3355          * Setup the HW Rx Head and Tail Descriptor Pointers
3356          */
3357         E1000_WRITE_REG(&adapter->hw, E1000_RDH(0), 0);
3358         E1000_WRITE_REG(&adapter->hw, E1000_RDT(0), adapter->num_rx_desc - 1);
3359
3360         /* Set PTHRESH for improved jumbo performance */
3361         if (((adapter->hw.mac.type == e1000_ich9lan) ||
3362             (adapter->hw.mac.type == e1000_pch2lan) ||
3363             (adapter->hw.mac.type == e1000_ich10lan)) &&
3364             (ifp->if_mtu > ETHERMTU)) {
3365                 uint32_t rxdctl;
3366
3367                 rxdctl = E1000_READ_REG(&adapter->hw, E1000_RXDCTL(0));
3368                 E1000_WRITE_REG(&adapter->hw, E1000_RXDCTL(0), rxdctl | 3);
3369         }
3370
3371         if (adapter->hw.mac.type >= e1000_pch2lan) {
3372                 if (ifp->if_mtu > ETHERMTU)
3373                         e1000_lv_jumbo_workaround_ich8lan(&adapter->hw, TRUE);
3374                 else
3375                         e1000_lv_jumbo_workaround_ich8lan(&adapter->hw, FALSE);
3376         }
3377
3378         /* Setup the Receive Control Register */
3379         rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
3380         rctl |= E1000_RCTL_EN | E1000_RCTL_BAM | E1000_RCTL_LBM_NO |
3381                 E1000_RCTL_RDMTS_HALF |
3382                 (adapter->hw.mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
3383
3384         /* Make sure VLAN Filters are off */
3385         rctl &= ~E1000_RCTL_VFE;
3386
3387         if (e1000_tbi_sbp_enabled_82543(&adapter->hw))
3388                 rctl |= E1000_RCTL_SBP;
3389         else
3390                 rctl &= ~E1000_RCTL_SBP;
3391
3392         switch (adapter->rx_buffer_len) {
3393         default:
3394         case 2048:
3395                 rctl |= E1000_RCTL_SZ_2048;
3396                 break;
3397
3398         case 4096:
3399                 rctl |= E1000_RCTL_SZ_4096 |
3400                     E1000_RCTL_BSEX | E1000_RCTL_LPE;
3401                 break;
3402
3403         case 8192:
3404                 rctl |= E1000_RCTL_SZ_8192 |
3405                     E1000_RCTL_BSEX | E1000_RCTL_LPE;
3406                 break;
3407
3408         case 16384:
3409                 rctl |= E1000_RCTL_SZ_16384 |
3410                     E1000_RCTL_BSEX | E1000_RCTL_LPE;
3411                 break;
3412         }
3413
3414         if (ifp->if_mtu > ETHERMTU)
3415                 rctl |= E1000_RCTL_LPE;
3416         else
3417                 rctl &= ~E1000_RCTL_LPE;
3418
3419         /* Enable Receives */
3420         E1000_WRITE_REG(&adapter->hw, E1000_RCTL, rctl);
3421 }
3422
3423 static void
3424 em_destroy_rx_ring(struct adapter *adapter, int ndesc)
3425 {
3426         struct em_buffer *rx_buffer;
3427         int i;
3428
3429         if (adapter->rx_buffer_area == NULL)
3430                 return;
3431
3432         for (i = 0; i < ndesc; i++) {
3433                 rx_buffer = &adapter->rx_buffer_area[i];
3434
3435                 KKASSERT(rx_buffer->m_head == NULL);
3436                 bus_dmamap_destroy(adapter->rxtag, rx_buffer->map);
3437         }
3438         bus_dmamap_destroy(adapter->rxtag, adapter->rx_sparemap);
3439         bus_dma_tag_destroy(adapter->rxtag);
3440
3441         kfree(adapter->rx_buffer_area, M_DEVBUF);
3442         adapter->rx_buffer_area = NULL;
3443 }
3444
3445 static void
3446 em_rxeof(struct adapter *adapter, int count)
3447 {
3448         struct ifnet *ifp = &adapter->arpcom.ac_if;
3449         uint8_t status, accept_frame = 0, eop = 0;
3450         uint16_t len, desc_len, prev_len_adj;
3451         struct e1000_rx_desc *current_desc;
3452         struct mbuf *mp;
3453         int i;
3454
3455         i = adapter->next_rx_desc_to_check;
3456         current_desc = &adapter->rx_desc_base[i];
3457
3458         if (!(current_desc->status & E1000_RXD_STAT_DD))
3459                 return;
3460
3461         while ((current_desc->status & E1000_RXD_STAT_DD) && count != 0) {
3462                 struct mbuf *m = NULL;
3463
3464                 logif(pkt_receive);
3465
3466                 mp = adapter->rx_buffer_area[i].m_head;
3467
3468                 /*
3469                  * Can't defer bus_dmamap_sync(9) because TBI_ACCEPT
3470                  * needs to access the last received byte in the mbuf.
3471                  */
3472                 bus_dmamap_sync(adapter->rxtag, adapter->rx_buffer_area[i].map,
3473                                 BUS_DMASYNC_POSTREAD);
3474
3475                 accept_frame = 1;
3476                 prev_len_adj = 0;
3477                 desc_len = le16toh(current_desc->length);
3478                 status = current_desc->status;
3479                 if (status & E1000_RXD_STAT_EOP) {
3480                         count--;
3481                         eop = 1;
3482                         if (desc_len < ETHER_CRC_LEN) {
3483                                 len = 0;
3484                                 prev_len_adj = ETHER_CRC_LEN - desc_len;
3485                         } else {
3486                                 len = desc_len - ETHER_CRC_LEN;
3487                         }
3488                 } else {
3489                         eop = 0;
3490                         len = desc_len;
3491                 }
3492
3493                 if (current_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK) {
3494                         uint8_t last_byte;
3495                         uint32_t pkt_len = desc_len;
3496
3497                         if (adapter->fmp != NULL)
3498                                 pkt_len += adapter->fmp->m_pkthdr.len;
3499
3500                         last_byte = *(mtod(mp, caddr_t) + desc_len - 1);
3501                         if (TBI_ACCEPT(&adapter->hw, status,
3502                             current_desc->errors, pkt_len, last_byte,
3503                             adapter->min_frame_size,
3504                             adapter->hw.mac.max_frame_size)) {
3505                                 e1000_tbi_adjust_stats_82543(&adapter->hw,
3506                                     &adapter->stats, pkt_len,
3507                                     adapter->hw.mac.addr,
3508                                     adapter->hw.mac.max_frame_size);
3509                                 if (len > 0)
3510                                         len--;
3511                         } else {
3512                                 accept_frame = 0;
3513                         }
3514                 }
3515
3516                 if (accept_frame) {
3517                         if (em_newbuf(adapter, i, 0) != 0) {
3518                                 IFNET_STAT_INC(ifp, iqdrops, 1);
3519                                 goto discard;
3520                         }
3521
3522                         /* Assign correct length to the current fragment */
3523                         mp->m_len = len;
3524
3525                         if (adapter->fmp == NULL) {
3526                                 mp->m_pkthdr.len = len;
3527                                 adapter->fmp = mp; /* Store the first mbuf */
3528                                 adapter->lmp = mp;
3529                         } else {
3530                                 /*
3531                                  * Chain mbuf's together
3532                                  */
3533
3534                                 /*
3535                                  * Adjust length of previous mbuf in chain if
3536                                  * we received less than 4 bytes in the last
3537                                  * descriptor.
3538                                  */
3539                                 if (prev_len_adj > 0) {
3540                                         adapter->lmp->m_len -= prev_len_adj;
3541                                         adapter->fmp->m_pkthdr.len -=
3542                                             prev_len_adj;
3543                                 }
3544                                 adapter->lmp->m_next = mp;
3545                                 adapter->lmp = adapter->lmp->m_next;
3546                                 adapter->fmp->m_pkthdr.len += len;
3547                         }
3548
3549                         if (eop) {
3550                                 adapter->fmp->m_pkthdr.rcvif = ifp;
3551                                 IFNET_STAT_INC(ifp, ipackets, 1);
3552
3553                                 if (ifp->if_capenable & IFCAP_RXCSUM) {
3554                                         em_rxcsum(adapter, current_desc,
3555                                                   adapter->fmp);
3556                                 }
3557
3558                                 if (status & E1000_RXD_STAT_VP) {
3559                                         adapter->fmp->m_pkthdr.ether_vlantag =
3560                                             (le16toh(current_desc->special) &
3561                                             E1000_RXD_SPC_VLAN_MASK);
3562                                         adapter->fmp->m_flags |= M_VLANTAG;
3563                                 }
3564                                 m = adapter->fmp;
3565                                 adapter->fmp = NULL;
3566                                 adapter->lmp = NULL;
3567                         }
3568                 } else {
3569                         IFNET_STAT_INC(ifp, ierrors, 1);
3570 discard:
3571 #ifdef foo
3572                         /* Reuse loaded DMA map and just update mbuf chain */
3573                         mp = adapter->rx_buffer_area[i].m_head;
3574                         mp->m_len = mp->m_pkthdr.len = MCLBYTES;
3575                         mp->m_data = mp->m_ext.ext_buf;
3576                         mp->m_next = NULL;
3577                         if (adapter->hw.mac.max_frame_size <=
3578                             (MCLBYTES - ETHER_ALIGN))
3579                                 m_adj(mp, ETHER_ALIGN);
3580 #endif
3581                         if (adapter->fmp != NULL) {
3582                                 m_freem(adapter->fmp);
3583                                 adapter->fmp = NULL;
3584                                 adapter->lmp = NULL;
3585                         }
3586                         m = NULL;
3587                 }
3588
3589                 /* Zero out the receive descriptors status. */
3590                 current_desc->status = 0;
3591
3592                 if (m != NULL)
3593                         ifp->if_input(ifp, m, NULL, -1);
3594
3595                 /* Advance our pointers to the next descriptor. */
3596                 if (++i == adapter->num_rx_desc)
3597                         i = 0;
3598                 current_desc = &adapter->rx_desc_base[i];
3599         }
3600         adapter->next_rx_desc_to_check = i;
3601
3602         /* Advance the E1000's Receive Queue #0  "Tail Pointer". */
3603         if (--i < 0)
3604                 i = adapter->num_rx_desc - 1;
3605         E1000_WRITE_REG(&adapter->hw, E1000_RDT(0), i);
3606 }
3607
3608 static void
3609 em_rxcsum(struct adapter *adapter, struct e1000_rx_desc *rx_desc,
3610           struct mbuf *mp)
3611 {
3612         /* 82543 or newer only */
3613         if (adapter->hw.mac.type < e1000_82543 ||
3614             /* Ignore Checksum bit is set */
3615             (rx_desc->status & E1000_RXD_STAT_IXSM))
3616                 return;
3617
3618         if ((rx_desc->status & E1000_RXD_STAT_IPCS) &&
3619             !(rx_desc->errors & E1000_RXD_ERR_IPE)) {
3620                 /* IP Checksum Good */
3621                 mp->m_pkthdr.csum_flags |= CSUM_IP_CHECKED | CSUM_IP_VALID;
3622         }
3623
3624         if ((rx_desc->status & E1000_RXD_STAT_TCPCS) &&
3625             !(rx_desc->errors & E1000_RXD_ERR_TCPE)) {
3626                 mp->m_pkthdr.csum_flags |= CSUM_DATA_VALID |
3627                                            CSUM_PSEUDO_HDR |
3628                                            CSUM_FRAG_NOT_CHECKED;
3629                 mp->m_pkthdr.csum_data = htons(0xffff);
3630         }
3631 }
3632
3633 static void
3634 em_enable_intr(struct adapter *adapter)
3635 {
3636         uint32_t ims_mask = IMS_ENABLE_MASK;
3637
3638         lwkt_serialize_handler_enable(adapter->arpcom.ac_if.if_serializer);
3639
3640 #if 0
3641         /* XXX MSIX */
3642         if (adapter->hw.mac.type == e1000_82574) {
3643                 E1000_WRITE_REG(&adapter->hw, EM_EIAC, EM_MSIX_MASK);
3644                 ims_mask |= EM_MSIX_MASK;
3645         }
3646 #endif
3647         E1000_WRITE_REG(&adapter->hw, E1000_IMS, ims_mask);
3648 }
3649
3650 static void
3651 em_disable_intr(struct adapter *adapter)
3652 {
3653         uint32_t clear = 0xffffffff;
3654
3655         /*
3656          * The first version of 82542 had an errata where when link was forced
3657          * it would stay up even up even if the cable was disconnected.
3658          * Sequence errors were used to detect the disconnect and then the
3659          * driver would unforce the link.  This code in the in the ISR.  For
3660          * this to work correctly the Sequence error interrupt had to be
3661          * enabled all the time.
3662          */
3663         if (adapter->hw.mac.type == e1000_82542 &&
3664             adapter->hw.revision_id == E1000_REVISION_2)
3665                 clear &= ~E1000_ICR_RXSEQ;
3666         else if (adapter->hw.mac.type == e1000_82574)
3667                 E1000_WRITE_REG(&adapter->hw, EM_EIAC, 0);
3668
3669         E1000_WRITE_REG(&adapter->hw, E1000_IMC, clear);
3670
3671         adapter->npoll.ifpc_stcount = 0;
3672
3673         lwkt_serialize_handler_disable(adapter->arpcom.ac_if.if_serializer);
3674 }
3675
3676 /*
3677  * Bit of a misnomer, what this really means is
3678  * to enable OS management of the system... aka
3679  * to disable special hardware management features
3680  */
3681 static void
3682 em_get_mgmt(struct adapter *adapter)
3683 {
3684         /* A shared code workaround */
3685 #define E1000_82542_MANC2H E1000_MANC2H
3686         if (adapter->flags & EM_FLAG_HAS_MGMT) {
3687                 int manc2h = E1000_READ_REG(&adapter->hw, E1000_MANC2H);
3688                 int manc = E1000_READ_REG(&adapter->hw, E1000_MANC);
3689
3690                 /* disable hardware interception of ARP */
3691                 manc &= ~(E1000_MANC_ARP_EN);
3692
3693                 /* enable receiving management packets to the host */
3694                 if (adapter->hw.mac.type >= e1000_82571) {
3695                         manc |= E1000_MANC_EN_MNG2HOST;
3696 #define E1000_MNG2HOST_PORT_623 (1 << 5)
3697 #define E1000_MNG2HOST_PORT_664 (1 << 6)
3698                         manc2h |= E1000_MNG2HOST_PORT_623;
3699                         manc2h |= E1000_MNG2HOST_PORT_664;
3700                         E1000_WRITE_REG(&adapter->hw, E1000_MANC2H, manc2h);
3701                 }
3702
3703                 E1000_WRITE_REG(&adapter->hw, E1000_MANC, manc);
3704         }
3705 }
3706
3707 /*
3708  * Give control back to hardware management
3709  * controller if there is one.
3710  */
3711 static void
3712 em_rel_mgmt(struct adapter *adapter)
3713 {
3714         if (adapter->flags & EM_FLAG_HAS_MGMT) {
3715                 int manc = E1000_READ_REG(&adapter->hw, E1000_MANC);
3716
3717                 /* re-enable hardware interception of ARP */
3718                 manc |= E1000_MANC_ARP_EN;
3719
3720                 if (adapter->hw.mac.type >= e1000_82571)
3721                         manc &= ~E1000_MANC_EN_MNG2HOST;
3722
3723                 E1000_WRITE_REG(&adapter->hw, E1000_MANC, manc);
3724         }
3725 }
3726
3727 /*
3728  * em_get_hw_control() sets {CTRL_EXT|FWSM}:DRV_LOAD bit.
3729  * For ASF and Pass Through versions of f/w this means that
3730  * the driver is loaded.  For AMT version (only with 82573)
3731  * of the f/w this means that the network i/f is open.
3732  */
3733 static void
3734 em_get_hw_control(struct adapter *adapter)
3735 {
3736         /* Let firmware know the driver has taken over */
3737         if (adapter->hw.mac.type == e1000_82573) {
3738                 uint32_t swsm;
3739
3740                 swsm = E1000_READ_REG(&adapter->hw, E1000_SWSM);
3741                 E1000_WRITE_REG(&adapter->hw, E1000_SWSM,
3742                     swsm | E1000_SWSM_DRV_LOAD);
3743         } else {
3744                 uint32_t ctrl_ext;
3745
3746                 ctrl_ext = E1000_READ_REG(&adapter->hw, E1000_CTRL_EXT);
3747                 E1000_WRITE_REG(&adapter->hw, E1000_CTRL_EXT,
3748                     ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
3749         }
3750         adapter->flags |= EM_FLAG_HW_CTRL;
3751 }
3752
3753 /*
3754  * em_rel_hw_control() resets {CTRL_EXT|FWSM}:DRV_LOAD bit.
3755  * For ASF and Pass Through versions of f/w this means that the
3756  * driver is no longer loaded.  For AMT version (only with 82573)
3757  * of the f/w this means that the network i/f is closed.
3758  */
3759 static void
3760 em_rel_hw_control(struct adapter *adapter)
3761 {
3762         if ((adapter->flags & EM_FLAG_HW_CTRL) == 0)
3763                 return;
3764         adapter->flags &= ~EM_FLAG_HW_CTRL;
3765
3766         /* Let firmware taken over control of h/w */
3767         if (adapter->hw.mac.type == e1000_82573) {
3768                 uint32_t swsm;
3769
3770                 swsm = E1000_READ_REG(&adapter->hw, E1000_SWSM);
3771                 E1000_WRITE_REG(&adapter->hw, E1000_SWSM,
3772                     swsm & ~E1000_SWSM_DRV_LOAD);
3773         } else {
3774                 uint32_t ctrl_ext;
3775
3776                 ctrl_ext = E1000_READ_REG(&adapter->hw, E1000_CTRL_EXT);
3777                 E1000_WRITE_REG(&adapter->hw, E1000_CTRL_EXT,
3778                     ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
3779         }
3780 }
3781
3782 static int
3783 em_is_valid_eaddr(const uint8_t *addr)
3784 {
3785         char zero_addr[ETHER_ADDR_LEN] = { 0, 0, 0, 0, 0, 0 };
3786
3787         if ((addr[0] & 1) || !bcmp(addr, zero_addr, ETHER_ADDR_LEN))
3788                 return (FALSE);
3789
3790         return (TRUE);
3791 }
3792
3793 /*
3794  * Enable PCI Wake On Lan capability
3795  */
3796 void
3797 em_enable_wol(device_t dev)
3798 {
3799         uint16_t cap, status;
3800         uint8_t id;
3801
3802         /* First find the capabilities pointer*/
3803         cap = pci_read_config(dev, PCIR_CAP_PTR, 2);
3804
3805         /* Read the PM Capabilities */
3806         id = pci_read_config(dev, cap, 1);
3807         if (id != PCIY_PMG)     /* Something wrong */
3808                 return;
3809
3810         /*
3811          * OK, we have the power capabilities,
3812          * so now get the status register
3813          */
3814         cap += PCIR_POWER_STATUS;
3815         status = pci_read_config(dev, cap, 2);
3816         status |= PCIM_PSTAT_PME | PCIM_PSTAT_PMEENABLE;
3817         pci_write_config(dev, cap, status, 2);
3818 }
3819
3820
3821 /*
3822  * 82544 Coexistence issue workaround.
3823  *    There are 2 issues.
3824  *       1. Transmit Hang issue.
3825  *    To detect this issue, following equation can be used...
3826  *        SIZE[3:0] + ADDR[2:0] = SUM[3:0].
3827  *        If SUM[3:0] is in between 1 to 4, we will have this issue.
3828  *
3829  *       2. DAC issue.
3830  *    To detect this issue, following equation can be used...
3831  *        SIZE[3:0] + ADDR[2:0] = SUM[3:0].
3832  *        If SUM[3:0] is in between 9 to c, we will have this issue.
3833  *
3834  *    WORKAROUND:
3835  *        Make sure we do not have ending address
3836  *        as 1,2,3,4(Hang) or 9,a,b,c (DAC)
3837  */
3838 static uint32_t
3839 em_82544_fill_desc(bus_addr_t address, uint32_t length, PDESC_ARRAY desc_array)
3840 {
3841         uint32_t safe_terminator;
3842
3843         /*
3844          * Since issue is sensitive to length and address.
3845          * Let us first check the address...
3846          */
3847         if (length <= 4) {
3848                 desc_array->descriptor[0].address = address;
3849                 desc_array->descriptor[0].length = length;
3850                 desc_array->elements = 1;
3851                 return (desc_array->elements);
3852         }
3853
3854         safe_terminator =
3855         (uint32_t)((((uint32_t)address & 0x7) + (length & 0xF)) & 0xF);
3856
3857         /* If it does not fall between 0x1 to 0x4 and 0x9 to 0xC then return */
3858         if (safe_terminator == 0 ||
3859             (safe_terminator > 4 && safe_terminator < 9) ||
3860             (safe_terminator > 0xC && safe_terminator <= 0xF)) {
3861                 desc_array->descriptor[0].address = address;
3862                 desc_array->descriptor[0].length = length;
3863                 desc_array->elements = 1;
3864                 return (desc_array->elements);
3865         }
3866
3867         desc_array->descriptor[0].address = address;
3868         desc_array->descriptor[0].length = length - 4;
3869         desc_array->descriptor[1].address = address + (length - 4);
3870         desc_array->descriptor[1].length = 4;
3871         desc_array->elements = 2;
3872         return (desc_array->elements);
3873 }
3874
3875 static void
3876 em_update_stats(struct adapter *adapter)
3877 {
3878         struct ifnet *ifp = &adapter->arpcom.ac_if;
3879
3880         if (adapter->hw.phy.media_type == e1000_media_type_copper ||
3881             (E1000_READ_REG(&adapter->hw, E1000_STATUS) & E1000_STATUS_LU)) {
3882                 adapter->stats.symerrs +=
3883                         E1000_READ_REG(&adapter->hw, E1000_SYMERRS);
3884                 adapter->stats.sec += E1000_READ_REG(&adapter->hw, E1000_SEC);
3885         }
3886         adapter->stats.crcerrs += E1000_READ_REG(&adapter->hw, E1000_CRCERRS);
3887         adapter->stats.mpc += E1000_READ_REG(&adapter->hw, E1000_MPC);
3888         adapter->stats.scc += E1000_READ_REG(&adapter->hw, E1000_SCC);
3889         adapter->stats.ecol += E1000_READ_REG(&adapter->hw, E1000_ECOL);
3890
3891         adapter->stats.mcc += E1000_READ_REG(&adapter->hw, E1000_MCC);
3892         adapter->stats.latecol += E1000_READ_REG(&adapter->hw, E1000_LATECOL);
3893         adapter->stats.colc += E1000_READ_REG(&adapter->hw, E1000_COLC);
3894         adapter->stats.dc += E1000_READ_REG(&adapter->hw, E1000_DC);
3895         adapter->stats.rlec += E1000_READ_REG(&adapter->hw, E1000_RLEC);
3896         adapter->stats.xonrxc += E1000_READ_REG(&adapter->hw, E1000_XONRXC);
3897         adapter->stats.xontxc += E1000_READ_REG(&adapter->hw, E1000_XONTXC);
3898         adapter->stats.xoffrxc += E1000_READ_REG(&adapter->hw, E1000_XOFFRXC);
3899         adapter->stats.xofftxc += E1000_READ_REG(&adapter->hw, E1000_XOFFTXC);
3900         adapter->stats.fcruc += E1000_READ_REG(&adapter->hw, E1000_FCRUC);
3901         adapter->stats.prc64 += E1000_READ_REG(&adapter->hw, E1000_PRC64);
3902         adapter->stats.prc127 += E1000_READ_REG(&adapter->hw, E1000_PRC127);
3903         adapter->stats.prc255 += E1000_READ_REG(&adapter->hw, E1000_PRC255);
3904         adapter->stats.prc511 += E1000_READ_REG(&adapter->hw, E1000_PRC511);
3905         adapter->stats.prc1023 += E1000_READ_REG(&adapter->hw, E1000_PRC1023);
3906         adapter->stats.prc1522 += E1000_READ_REG(&adapter->hw, E1000_PRC1522);
3907         adapter->stats.gprc += E1000_READ_REG(&adapter->hw, E1000_GPRC);
3908         adapter->stats.bprc += E1000_READ_REG(&adapter->hw, E1000_BPRC);
3909         adapter->stats.mprc += E1000_READ_REG(&adapter->hw, E1000_MPRC);
3910         adapter->stats.gptc += E1000_READ_REG(&adapter->hw, E1000_GPTC);
3911
3912         /* For the 64-bit byte counters the low dword must be read first. */
3913         /* Both registers clear on the read of the high dword */
3914
3915         adapter->stats.gorc += E1000_READ_REG(&adapter->hw, E1000_GORCH);
3916         adapter->stats.gotc += E1000_READ_REG(&adapter->hw, E1000_GOTCH);
3917
3918         adapter->stats.rnbc += E1000_READ_REG(&adapter->hw, E1000_RNBC);
3919         adapter->stats.ruc += E1000_READ_REG(&adapter->hw, E1000_RUC);
3920         adapter->stats.rfc += E1000_READ_REG(&adapter->hw, E1000_RFC);
3921         adapter->stats.roc += E1000_READ_REG(&adapter->hw, E1000_ROC);
3922         adapter->stats.rjc += E1000_READ_REG(&adapter->hw, E1000_RJC);
3923
3924         adapter->stats.tor += E1000_READ_REG(&adapter->hw, E1000_TORH);
3925         adapter->stats.tot += E1000_READ_REG(&adapter->hw, E1000_TOTH);
3926
3927         adapter->stats.tpr += E1000_READ_REG(&adapter->hw, E1000_TPR);
3928         adapter->stats.tpt += E1000_READ_REG(&adapter->hw, E1000_TPT);
3929         adapter->stats.ptc64 += E1000_READ_REG(&adapter->hw, E1000_PTC64);
3930         adapter->stats.ptc127 += E1000_READ_REG(&adapter->hw, E1000_PTC127);
3931         adapter->stats.ptc255 += E1000_READ_REG(&adapter->hw, E1000_PTC255);
3932         adapter->stats.ptc511 += E1000_READ_REG(&adapter->hw, E1000_PTC511);
3933         adapter->stats.ptc1023 += E1000_READ_REG(&adapter->hw, E1000_PTC1023);
3934         adapter->stats.ptc1522 += E1000_READ_REG(&adapter->hw, E1000_PTC1522);
3935         adapter->stats.mptc += E1000_READ_REG(&adapter->hw, E1000_MPTC);
3936         adapter->stats.bptc += E1000_READ_REG(&adapter->hw, E1000_BPTC);
3937
3938         if (adapter->hw.mac.type >= e1000_82543) {
3939                 adapter->stats.algnerrc +=
3940                 E1000_READ_REG(&adapter->hw, E1000_ALGNERRC);
3941                 adapter->stats.rxerrc +=
3942                 E1000_READ_REG(&adapter->hw, E1000_RXERRC);
3943                 adapter->stats.tncrs +=
3944                 E1000_READ_REG(&adapter->hw, E1000_TNCRS);
3945                 adapter->stats.cexterr +=
3946                 E1000_READ_REG(&adapter->hw, E1000_CEXTERR);
3947                 adapter->stats.tsctc +=
3948                 E1000_READ_REG(&adapter->hw, E1000_TSCTC);
3949                 adapter->stats.tsctfc +=
3950                 E1000_READ_REG(&adapter->hw, E1000_TSCTFC);
3951         }
3952
3953         IFNET_STAT_SET(ifp, collisions, adapter->stats.colc);
3954
3955         /* Rx Errors */
3956         IFNET_STAT_SET(ifp, ierrors,
3957             adapter->dropped_pkts + adapter->stats.rxerrc +
3958             adapter->stats.crcerrs + adapter->stats.algnerrc +
3959             adapter->stats.ruc + adapter->stats.roc +
3960             adapter->stats.mpc + adapter->stats.cexterr);
3961
3962         /* Tx Errors */
3963         IFNET_STAT_SET(ifp, oerrors,
3964             adapter->stats.ecol + adapter->stats.latecol +
3965             adapter->watchdog_events);
3966 }
3967
3968 static void
3969 em_print_debug_info(struct adapter *adapter)
3970 {
3971         device_t dev = adapter->dev;
3972         uint8_t *hw_addr = adapter->hw.hw_addr;
3973
3974         device_printf(dev, "Adapter hardware address = %p \n", hw_addr);
3975         device_printf(dev, "CTRL = 0x%x RCTL = 0x%x \n",
3976             E1000_READ_REG(&adapter->hw, E1000_CTRL),
3977             E1000_READ_REG(&adapter->hw, E1000_RCTL));
3978         device_printf(dev, "Packet buffer = Tx=%dk Rx=%dk \n",
3979             ((E1000_READ_REG(&adapter->hw, E1000_PBA) & 0xffff0000) >> 16),\
3980             (E1000_READ_REG(&adapter->hw, E1000_PBA) & 0xffff) );
3981         device_printf(dev, "Flow control watermarks high = %d low = %d\n",
3982             adapter->hw.fc.high_water,
3983             adapter->hw.fc.low_water);
3984         device_printf(dev, "tx_int_delay = %d, tx_abs_int_delay = %d\n",
3985             E1000_READ_REG(&adapter->hw, E1000_TIDV),
3986             E1000_READ_REG(&adapter->hw, E1000_TADV));
3987         device_printf(dev, "rx_int_delay = %d, rx_abs_int_delay = %d\n",
3988             E1000_READ_REG(&adapter->hw, E1000_RDTR),
3989             E1000_READ_REG(&adapter->hw, E1000_RADV));
3990         device_printf(dev, "fifo workaround = %lld, fifo_reset_count = %lld\n",
3991             (long long)adapter->tx_fifo_wrk_cnt,
3992             (long long)adapter->tx_fifo_reset_cnt);
3993         device_printf(dev, "hw tdh = %d, hw tdt = %d\n",
3994             E1000_READ_REG(&adapter->hw, E1000_TDH(0)),
3995             E1000_READ_REG(&adapter->hw, E1000_TDT(0)));
3996         device_printf(dev, "hw rdh = %d, hw rdt = %d\n",
3997             E1000_READ_REG(&adapter->hw, E1000_RDH(0)),
3998             E1000_READ_REG(&adapter->hw, E1000_RDT(0)));
3999         device_printf(dev, "Num Tx descriptors avail = %d\n",
4000             adapter->num_tx_desc_avail);
4001         device_printf(dev, "Tx Descriptors not avail1 = %ld\n",
4002             adapter->no_tx_desc_avail1);
4003         device_printf(dev, "Tx Descriptors not avail2 = %ld\n",
4004             adapter->no_tx_desc_avail2);
4005         device_printf(dev, "Std mbuf failed = %ld\n",
4006             adapter->mbuf_alloc_failed);
4007         device_printf(dev, "Std mbuf cluster failed = %ld\n",
4008             adapter->mbuf_cluster_failed);
4009         device_printf(dev, "Driver dropped packets = %ld\n",
4010             adapter->dropped_pkts);
4011         device_printf(dev, "Driver tx dma failure in encap = %ld\n",
4012             adapter->no_tx_dma_setup);
4013 }
4014
4015 static void
4016 em_print_hw_stats(struct adapter *adapter)
4017 {
4018         device_t dev = adapter->dev;
4019
4020         device_printf(dev, "Excessive collisions = %lld\n",
4021             (long long)adapter->stats.ecol);
4022 #if (DEBUG_HW > 0)  /* Dont output these errors normally */
4023         device_printf(dev, "Symbol errors = %lld\n",
4024             (long long)adapter->stats.symerrs);
4025 #endif
4026         device_printf(dev, "Sequence errors = %lld\n",
4027             (long long)adapter->stats.sec);
4028         device_printf(dev, "Defer count = %lld\n",
4029             (long long)adapter->stats.dc);
4030         device_printf(dev, "Missed Packets = %lld\n",
4031             (long long)adapter->stats.mpc);
4032         device_printf(dev, "Receive No Buffers = %lld\n",
4033             (long long)adapter->stats.rnbc);
4034         /* RLEC is inaccurate on some hardware, calculate our own. */
4035         device_printf(dev, "Receive Length Errors = %lld\n",
4036             ((long long)adapter->stats.roc + (long long)adapter->stats.ruc));
4037         device_printf(dev, "Receive errors = %lld\n",
4038             (long long)adapter->stats.rxerrc);
4039         device_printf(dev, "Crc errors = %lld\n",
4040             (long long)adapter->stats.crcerrs);
4041         device_printf(dev, "Alignment errors = %lld\n",
4042             (long long)adapter->stats.algnerrc);
4043         device_printf(dev, "Collision/Carrier extension errors = %lld\n",
4044             (long long)adapter->stats.cexterr);
4045         device_printf(dev, "RX overruns = %ld\n", adapter->rx_overruns);
4046         device_printf(dev, "watchdog timeouts = %ld\n",
4047             adapter->watchdog_events);
4048         device_printf(dev, "XON Rcvd = %lld\n",
4049             (long long)adapter->stats.xonrxc);
4050         device_printf(dev, "XON Xmtd = %lld\n",
4051             (long long)adapter->stats.xontxc);
4052         device_printf(dev, "XOFF Rcvd = %lld\n",
4053             (long long)adapter->stats.xoffrxc);
4054         device_printf(dev, "XOFF Xmtd = %lld\n",
4055             (long long)adapter->stats.xofftxc);
4056         device_printf(dev, "Good Packets Rcvd = %lld\n",
4057             (long long)adapter->stats.gprc);
4058         device_printf(dev, "Good Packets Xmtd = %lld\n",
4059             (long long)adapter->stats.gptc);
4060 }
4061
4062 static void
4063 em_print_nvm_info(struct adapter *adapter)
4064 {
4065         uint16_t eeprom_data;
4066         int i, j, row = 0;
4067
4068         /* Its a bit crude, but it gets the job done */
4069         kprintf("\nInterface EEPROM Dump:\n");
4070         kprintf("Offset\n0x0000  ");
4071         for (i = 0, j = 0; i < 32; i++, j++) {
4072                 if (j == 8) { /* Make the offset block */
4073                         j = 0; ++row;
4074                         kprintf("\n0x00%x0  ",row);
4075                 }
4076                 e1000_read_nvm(&adapter->hw, i, 1, &eeprom_data);
4077                 kprintf("%04x ", eeprom_data);
4078         }
4079         kprintf("\n");
4080 }
4081
4082 static int
4083 em_sysctl_debug_info(SYSCTL_HANDLER_ARGS)
4084 {
4085         struct adapter *adapter;
4086         struct ifnet *ifp;
4087         int error, result;
4088
4089         result = -1;
4090         error = sysctl_handle_int(oidp, &result, 0, req);
4091         if (error || !req->newptr)
4092                 return (error);
4093
4094         adapter = (struct adapter *)arg1;
4095         ifp = &adapter->arpcom.ac_if;
4096
4097         lwkt_serialize_enter(ifp->if_serializer);
4098
4099         if (result == 1)
4100                 em_print_debug_info(adapter);
4101
4102         /*
4103          * This value will cause a hex dump of the
4104          * first 32 16-bit words of the EEPROM to
4105          * the screen.
4106          */
4107         if (result == 2)
4108                 em_print_nvm_info(adapter);
4109
4110         lwkt_serialize_exit(ifp->if_serializer);
4111
4112         return (error);
4113 }
4114
4115 static int
4116 em_sysctl_stats(SYSCTL_HANDLER_ARGS)
4117 {
4118         int error, result;
4119
4120         result = -1;
4121         error = sysctl_handle_int(oidp, &result, 0, req);
4122         if (error || !req->newptr)
4123                 return (error);
4124
4125         if (result == 1) {
4126                 struct adapter *adapter = (struct adapter *)arg1;
4127                 struct ifnet *ifp = &adapter->arpcom.ac_if;
4128
4129                 lwkt_serialize_enter(ifp->if_serializer);
4130                 em_print_hw_stats(adapter);
4131                 lwkt_serialize_exit(ifp->if_serializer);
4132         }
4133         return (error);
4134 }
4135
4136 static void
4137 em_add_sysctl(struct adapter *adapter)
4138 {
4139         struct sysctl_ctx_list *ctx;
4140         struct sysctl_oid *tree;
4141
4142         ctx = device_get_sysctl_ctx(adapter->dev);
4143         tree = device_get_sysctl_tree(adapter->dev);
4144         SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree),
4145             OID_AUTO, "debug", CTLTYPE_INT|CTLFLAG_RW, adapter, 0,
4146             em_sysctl_debug_info, "I", "Debug Information");
4147
4148         SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree),
4149             OID_AUTO, "stats", CTLTYPE_INT|CTLFLAG_RW, adapter, 0,
4150             em_sysctl_stats, "I", "Statistics");
4151
4152         SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree),
4153             OID_AUTO, "rxd", CTLFLAG_RD,
4154             &adapter->num_rx_desc, 0, NULL);
4155         SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree),
4156             OID_AUTO, "txd", CTLFLAG_RD,
4157             &adapter->num_tx_desc, 0, NULL);
4158
4159         if (adapter->hw.mac.type >= e1000_82540) {
4160                 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree),
4161                     OID_AUTO, "int_throttle_ceil",
4162                     CTLTYPE_INT|CTLFLAG_RW, adapter, 0,
4163                     em_sysctl_int_throttle, "I",
4164                     "interrupt throttling rate");
4165         }
4166         SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree),
4167             OID_AUTO, "int_tx_nsegs",
4168             CTLTYPE_INT|CTLFLAG_RW, adapter, 0,
4169             em_sysctl_int_tx_nsegs, "I",
4170             "# segments per TX interrupt");
4171         SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree),
4172             OID_AUTO, "wreg_tx_nsegs", CTLFLAG_RW,
4173             &adapter->tx_wreg_nsegs, 0,
4174             "# segments before write to hardware register");
4175 }
4176
4177 static int
4178 em_sysctl_int_throttle(SYSCTL_HANDLER_ARGS)
4179 {
4180         struct adapter *adapter = (void *)arg1;
4181         struct ifnet *ifp = &adapter->arpcom.ac_if;
4182         int error, throttle;
4183
4184         throttle = adapter->int_throttle_ceil;
4185         error = sysctl_handle_int(oidp, &throttle, 0, req);
4186         if (error || req->newptr == NULL)
4187                 return error;
4188         if (throttle < 0 || throttle > 1000000000 / 256)
4189                 return EINVAL;
4190
4191         if (throttle) {
4192                 /*
4193                  * Set the interrupt throttling rate in 256ns increments,
4194                  * recalculate sysctl value assignment to get exact frequency.
4195                  */
4196                 throttle = 1000000000 / 256 / throttle;
4197
4198                 /* Upper 16bits of ITR is reserved and should be zero */
4199                 if (throttle & 0xffff0000)
4200                         return EINVAL;
4201         }
4202
4203         lwkt_serialize_enter(ifp->if_serializer);
4204
4205         if (throttle)
4206                 adapter->int_throttle_ceil = 1000000000 / 256 / throttle;
4207         else
4208                 adapter->int_throttle_ceil = 0;
4209
4210         if (ifp->if_flags & IFF_RUNNING)
4211                 em_set_itr(adapter, throttle);
4212
4213         lwkt_serialize_exit(ifp->if_serializer);
4214
4215         if (bootverbose) {
4216                 if_printf(ifp, "Interrupt moderation set to %d/sec\n",
4217                           adapter->int_throttle_ceil);
4218         }
4219         return 0;
4220 }
4221
4222 static int
4223 em_sysctl_int_tx_nsegs(SYSCTL_HANDLER_ARGS)
4224 {
4225         struct adapter *adapter = (void *)arg1;
4226         struct ifnet *ifp = &adapter->arpcom.ac_if;
4227         int error, segs;
4228
4229         segs = adapter->tx_int_nsegs;
4230         error = sysctl_handle_int(oidp, &segs, 0, req);
4231         if (error || req->newptr == NULL)
4232                 return error;
4233         if (segs <= 0)
4234                 return EINVAL;
4235
4236         lwkt_serialize_enter(ifp->if_serializer);
4237
4238         /*
4239          * Don't allow int_tx_nsegs to become:
4240          * o  Less the oact_tx_desc
4241          * o  Too large that no TX desc will cause TX interrupt to
4242          *    be generated (OACTIVE will never recover)
4243          * o  Too small that will cause tx_dd[] overflow
4244          */
4245         if (segs < adapter->oact_tx_desc ||
4246             segs >= adapter->num_tx_desc - adapter->oact_tx_desc ||
4247             segs < adapter->num_tx_desc / EM_TXDD_SAFE) {
4248                 error = EINVAL;
4249         } else {
4250                 error = 0;
4251                 adapter->tx_int_nsegs = segs;
4252         }
4253
4254         lwkt_serialize_exit(ifp->if_serializer);
4255
4256         return error;
4257 }
4258
4259 static void
4260 em_set_itr(struct adapter *adapter, uint32_t itr)
4261 {
4262         E1000_WRITE_REG(&adapter->hw, E1000_ITR, itr);
4263         if (adapter->hw.mac.type == e1000_82574) {
4264                 int i;
4265
4266                 /*
4267                  * When using MSIX interrupts we need to
4268                  * throttle using the EITR register
4269                  */
4270                 for (i = 0; i < 4; ++i) {
4271                         E1000_WRITE_REG(&adapter->hw,
4272                             E1000_EITR_82574(i), itr);
4273                 }
4274         }
4275 }
4276
4277 static void
4278 em_disable_aspm(struct adapter *adapter)
4279 {
4280         uint16_t link_cap, link_ctrl, disable;
4281         uint8_t pcie_ptr, reg;
4282         device_t dev = adapter->dev;
4283
4284         switch (adapter->hw.mac.type) {
4285         case e1000_82571:
4286         case e1000_82572:
4287         case e1000_82573:
4288                 /*
4289                  * 82573 specification update
4290                  * errata #8 disable L0s
4291                  * errata #41 disable L1
4292                  *
4293                  * 82571/82572 specification update
4294                  # errata #13 disable L1
4295                  * errata #68 disable L0s
4296                  */
4297                 disable = PCIEM_LNKCTL_ASPM_L0S | PCIEM_LNKCTL_ASPM_L1;
4298                 break;
4299
4300         case e1000_82574:
4301         case e1000_82583:
4302                 /*
4303                  * 82574 specification update errata #20
4304                  * 82583 specification update errata #9
4305                  *
4306                  * There is no need to disable L1
4307                  */
4308                 disable = PCIEM_LNKCTL_ASPM_L0S;
4309                 break;
4310
4311         default:
4312                 return;
4313         }
4314
4315         pcie_ptr = pci_get_pciecap_ptr(dev);
4316         if (pcie_ptr == 0)
4317                 return;
4318
4319         link_cap = pci_read_config(dev, pcie_ptr + PCIER_LINKCAP, 2);
4320         if ((link_cap & PCIEM_LNKCAP_ASPM_MASK) == 0)
4321                 return;
4322
4323         if (bootverbose) {
4324                 if_printf(&adapter->arpcom.ac_if,
4325                     "disable ASPM %#02x\n", disable);
4326         }
4327
4328         reg = pcie_ptr + PCIER_LINKCTRL;
4329         link_ctrl = pci_read_config(dev, reg, 2);
4330         link_ctrl &= ~disable;
4331         pci_write_config(dev, reg, link_ctrl, 2);
4332 }
4333
4334 static int
4335 em_tso_pullup(struct adapter *adapter, struct mbuf **mp)
4336 {
4337         int iphlen, hoff, thoff, ex = 0;
4338         struct mbuf *m;
4339         struct ip *ip;
4340
4341         m = *mp;
4342         KASSERT(M_WRITABLE(m), ("TSO mbuf not writable"));
4343
4344         iphlen = m->m_pkthdr.csum_iphlen;
4345         thoff = m->m_pkthdr.csum_thlen;
4346         hoff = m->m_pkthdr.csum_lhlen;
4347
4348         KASSERT(iphlen > 0, ("invalid ip hlen"));
4349         KASSERT(thoff > 0, ("invalid tcp hlen"));
4350         KASSERT(hoff > 0, ("invalid ether hlen"));
4351
4352         if (adapter->flags & EM_FLAG_TSO_PULLEX)
4353                 ex = 4;
4354
4355         if (m->m_len < hoff + iphlen + thoff + ex) {
4356                 m = m_pullup(m, hoff + iphlen + thoff + ex);
4357                 if (m == NULL) {
4358                         *mp = NULL;
4359                         return ENOBUFS;
4360                 }
4361                 *mp = m;
4362         }
4363         ip = mtodoff(m, struct ip *, hoff);
4364         ip->ip_len = 0;
4365
4366         return 0;
4367 }
4368
4369 static int
4370 em_tso_setup(struct adapter *adapter, struct mbuf *mp,
4371     uint32_t *txd_upper, uint32_t *txd_lower)
4372 {
4373         struct e1000_context_desc *TXD;
4374         int hoff, iphlen, thoff, hlen;
4375         int mss, pktlen, curr_txd;
4376
4377         iphlen = mp->m_pkthdr.csum_iphlen;
4378         thoff = mp->m_pkthdr.csum_thlen;
4379         hoff = mp->m_pkthdr.csum_lhlen;
4380         mss = mp->m_pkthdr.tso_segsz;
4381         pktlen = mp->m_pkthdr.len;
4382
4383         if (adapter->csum_flags == CSUM_TSO &&
4384             adapter->csum_iphlen == iphlen &&
4385             adapter->csum_lhlen == hoff &&
4386             adapter->csum_thlen == thoff &&
4387             adapter->csum_mss == mss &&
4388             adapter->csum_pktlen == pktlen) {
4389                 *txd_upper = adapter->csum_txd_upper;
4390                 *txd_lower = adapter->csum_txd_lower;
4391                 return 0;
4392         }
4393         hlen = hoff + iphlen + thoff;
4394
4395         /*
4396          * Setup a new TSO context.
4397          */
4398
4399         curr_txd = adapter->next_avail_tx_desc;
4400         TXD = (struct e1000_context_desc *)&adapter->tx_desc_base[curr_txd];
4401
4402         *txd_lower = E1000_TXD_CMD_DEXT |       /* Extended descr type */
4403                      E1000_TXD_DTYP_D |         /* Data descr type */
4404                      E1000_TXD_CMD_TSE;         /* Do TSE on this packet */
4405
4406         /* IP and/or TCP header checksum calculation and insertion. */
4407         *txd_upper = (E1000_TXD_POPTS_IXSM | E1000_TXD_POPTS_TXSM) << 8;
4408
4409         /*
4410          * Start offset for header checksum calculation.
4411          * End offset for header checksum calculation.
4412          * Offset of place put the checksum.
4413          */
4414         TXD->lower_setup.ip_fields.ipcss = hoff;
4415         TXD->lower_setup.ip_fields.ipcse = htole16(hoff + iphlen - 1);
4416         TXD->lower_setup.ip_fields.ipcso = hoff + offsetof(struct ip, ip_sum);
4417
4418         /*
4419          * Start offset for payload checksum calculation.
4420          * End offset for payload checksum calculation.
4421          * Offset of place to put the checksum.
4422          */
4423         TXD->upper_setup.tcp_fields.tucss = hoff + iphlen;
4424         TXD->upper_setup.tcp_fields.tucse = 0;
4425         TXD->upper_setup.tcp_fields.tucso =
4426             hoff + iphlen + offsetof(struct tcphdr, th_sum);
4427
4428         /*
4429          * Payload size per packet w/o any headers.
4430          * Length of all headers up to payload.
4431          */
4432         TXD->tcp_seg_setup.fields.mss = htole16(mss);
4433         TXD->tcp_seg_setup.fields.hdr_len = hlen;
4434         TXD->cmd_and_length = htole32(E1000_TXD_CMD_IFCS |
4435                                 E1000_TXD_CMD_DEXT |    /* Extended descr */
4436                                 E1000_TXD_CMD_TSE |     /* TSE context */
4437                                 E1000_TXD_CMD_IP |      /* Do IP csum */
4438                                 E1000_TXD_CMD_TCP |     /* Do TCP checksum */
4439                                 (pktlen - hlen));       /* Total len */
4440
4441         /* Save the information for this TSO context */
4442         adapter->csum_flags = CSUM_TSO;
4443         adapter->csum_lhlen = hoff;
4444         adapter->csum_iphlen = iphlen;
4445         adapter->csum_thlen = thoff;
4446         adapter->csum_mss = mss;
4447         adapter->csum_pktlen = pktlen;
4448         adapter->csum_txd_upper = *txd_upper;
4449         adapter->csum_txd_lower = *txd_lower;
4450
4451         if (++curr_txd == adapter->num_tx_desc)
4452                 curr_txd = 0;
4453
4454         KKASSERT(adapter->num_tx_desc_avail > 0);
4455         adapter->num_tx_desc_avail--;
4456
4457         adapter->next_avail_tx_desc = curr_txd;
4458         return 1;
4459 }