2 * Copyright (c) 1997, 1998, 1999
3 * Bill Paul <wpaul@ee.columbia.edu>. All rights reserved.
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * 3. All advertising materials mentioning features or use of this software
14 * must display the following acknowledgement:
15 * This product includes software developed by Bill Paul.
16 * 4. Neither the name of the author nor the names of any co-contributors
17 * may be used to endorse or promote products derived from this software
18 * without specific prior written permission.
20 * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND
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25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
30 * THE POSSIBILITY OF SUCH DAMAGE.
32 * $FreeBSD: src/sys/dev/mii/dcphy.c,v 1.2.2.2 2000/10/14 00:44:40 wpaul Exp $
36 * Pseudo-driver for internal NWAY support on DEC 21143 and workalike
37 * controllers. Technically we're abusing the miibus code to handle
38 * media selection and NWAY support here since there is no MII
39 * interface. However the logical operations are roughly the same,
40 * and the alternative is to create a fake MII interface in the driver,
41 * which is harder to do.
44 #include <sys/param.h>
45 #include <sys/systm.h>
46 #include <sys/kernel.h>
47 #include <sys/socket.h>
48 #include <sys/errno.h>
49 #include <sys/module.h>
53 #include <net/if_arp.h>
54 #include <net/if_media.h>
60 #include <bus/pci/pcivar.h>
61 #include "../dc/if_dcreg.h"
63 #include "miibus_if.h"
65 #define DC_SETBIT(sc, reg, x) \
66 CSR_WRITE_4(sc, reg, \
67 CSR_READ_4(sc, reg) | x)
69 #define DC_CLRBIT(sc, reg, x) \
70 CSR_WRITE_4(sc, reg, \
71 CSR_READ_4(sc, reg) & ~x)
73 #define MIIF_AUTOTIMEOUT 0x0004
76 * This is the subsystem ID for the built-in 21143 ethernet
77 * in several Compaq Presario systems. Apparently these are
78 * 10Mbps only, so we need to treat them specially.
80 #define COMPAQ_PRESARIO_ID 0xb0bb0e11
82 static int dcphy_probe (device_t);
83 static int dcphy_attach (device_t);
85 static device_method_t dcphy_methods[] = {
86 /* device interface */
87 DEVMETHOD(device_probe, dcphy_probe),
88 DEVMETHOD(device_attach, dcphy_attach),
89 DEVMETHOD(device_detach, ukphy_detach),
90 DEVMETHOD(device_shutdown, bus_generic_shutdown),
94 static devclass_t dcphy_devclass;
96 static driver_t dcphy_driver = {
99 sizeof(struct mii_softc)
102 DRIVER_MODULE(dcphy, miibus, dcphy_driver, dcphy_devclass, NULL, NULL);
104 static int dcphy_service(struct mii_softc *, struct mii_data *, int);
105 static void dcphy_status(struct mii_softc *);
106 static void dcphy_auto(struct mii_softc *);
107 static void dcphy_reset(struct mii_softc *);
110 dcphy_probe(device_t dev)
112 struct mii_attach_args *ma;
114 ma = device_get_ivars(dev);
117 * The dc driver will report the 21143 vendor and device
118 * ID to let us know that it wants us to attach.
120 if (ma->mii_id1 != DC_VENDORID_DEC ||
121 ma->mii_id2 != DC_DEVICEID_21143)
124 device_set_desc(dev, "Intel 21143 NWAY media interface");
130 dcphy_attach(device_t dev)
132 struct mii_softc *sc;
133 struct mii_attach_args *ma;
134 struct mii_data *mii;
135 struct dc_softc *dc_sc;
137 sc = device_get_softc(dev);
138 ma = device_get_ivars(dev);
139 mii_softc_init(sc, ma);
140 sc->mii_dev = device_get_parent(dev);
141 mii = device_get_softc(sc->mii_dev);
142 LIST_INSERT_HEAD(&mii->mii_phys, sc, mii_list);
144 sc->mii_inst = mii->mii_instance;
145 sc->mii_service = dcphy_service;
146 sc->mii_reset = dcphy_reset;
147 sc->mii_anegticks = 50;
150 sc->mii_flags |= MIIF_NOISOLATE;
154 dc_sc = mii->mii_ifp->if_softc;
155 CSR_WRITE_4(dc_sc, DC_10BTSTAT, 0);
156 CSR_WRITE_4(dc_sc, DC_10BTCTRL, 0);
158 switch(pci_read_config(device_get_parent(sc->mii_dev),
160 case COMPAQ_PRESARIO_ID:
161 /* Example of how to only allow 10Mbps modes. */
162 sc->mii_capabilities = BMSR_ANEG|BMSR_10TFDX|BMSR_10THDX;
165 if (dc_sc->dc_pmode == DC_PMODE_SIA) {
166 sc->mii_capabilities =
167 BMSR_ANEG|BMSR_10TFDX|BMSR_10THDX;
169 #define ADD(m, c) ifmedia_add(&mii->mii_media, (m), (c), NULL)
171 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, IFM_LOOP,
172 sc->mii_inst), MII_MEDIA_100_TX);
176 sc->mii_capabilities =
177 BMSR_ANEG|BMSR_100TXFDX|BMSR_100TXHDX|
178 BMSR_10TFDX|BMSR_10THDX;
184 if (dc_sc->dc_type == DC_TYPE_21145)
185 sc->mii_capabilities = BMSR_10THDX;
188 sc->mii_capabilities &= ma->mii_capmask;
189 device_printf(dev, " ");
190 if ((sc->mii_capabilities & BMSR_MEDIAMASK) == 0)
191 kprintf("no media present");
193 mii_phy_add_media(sc);
196 MIIBUS_MEDIAINIT(sc->mii_dev);
201 dcphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd)
203 struct dc_softc *dc_sc;
204 struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
208 dc_sc = mii->mii_ifp->if_softc;
213 * If we're not polling our PHY instance, just return.
215 if (IFM_INST(ife->ifm_media) != sc->mii_inst) {
222 * If the media indicates a different PHY instance,
223 * isolate ourselves. XXX how?
225 if (IFM_INST(ife->ifm_media) != sc->mii_inst) {
230 * If the interface is not up, don't do anything.
232 if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
236 mii->mii_media_active = IFM_NONE;
237 mode = CSR_READ_4(dc_sc, DC_NETCFG);
238 mode &= ~(DC_NETCFG_FULLDUPLEX|DC_NETCFG_PORTSEL|
239 DC_NETCFG_PCS|DC_NETCFG_SCRAMBLER|DC_NETCFG_SPEEDSEL);
241 switch (IFM_SUBTYPE(ife->ifm_media)) {
248 * XXX Not supported as a manual setting right now.
253 DC_CLRBIT(dc_sc, DC_10BTCTRL, DC_TCTL_AUTONEGENBL);
254 mode |= DC_NETCFG_PORTSEL|DC_NETCFG_PCS|
256 if ((ife->ifm_media & IFM_GMASK) == IFM_FDX)
257 mode |= DC_NETCFG_FULLDUPLEX;
259 mode &= ~DC_NETCFG_FULLDUPLEX;
260 CSR_WRITE_4(dc_sc, DC_NETCFG, mode);
263 DC_CLRBIT(dc_sc, DC_SIARESET, DC_SIA_RESET);
264 DC_CLRBIT(dc_sc, DC_10BTCTRL, 0xFFFF);
265 if ((ife->ifm_media & IFM_GMASK) == IFM_FDX)
266 DC_SETBIT(dc_sc, DC_10BTCTRL, 0x7F3D);
268 DC_SETBIT(dc_sc, DC_10BTCTRL, 0x7F3F);
269 DC_SETBIT(dc_sc, DC_SIARESET, DC_SIA_RESET);
270 DC_CLRBIT(dc_sc, DC_10BTCTRL, DC_TCTL_AUTONEGENBL);
271 mode &= ~DC_NETCFG_PORTSEL;
272 mode |= DC_NETCFG_SPEEDSEL;
273 if ((ife->ifm_media & IFM_GMASK) == IFM_FDX)
274 mode |= DC_NETCFG_FULLDUPLEX;
276 mode &= ~DC_NETCFG_FULLDUPLEX;
277 CSR_WRITE_4(dc_sc, DC_NETCFG, mode);
286 * If we're not currently selected, just return.
288 if (IFM_INST(ife->ifm_media) != sc->mii_inst)
292 * Is the interface even up?
294 if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
298 * Only used for autonegotiation.
300 if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO)
303 reg = CSR_READ_4(dc_sc, DC_10BTSTAT);
304 if (!(reg & DC_TSTAT_LS10) || !(reg & DC_TSTAT_LS100))
308 * Only retry autonegotiation every mii_anegticks seconds.
310 * Otherwise, fall through to calling dcphy_status()
311 * since real Intel 21143 chips don't show valid link
312 * status until autonegotiation is switched off, and
313 * that only happens in dcphy_status(). Without this,
314 * successful autonegotation is never recognised on
317 if (++sc->mii_ticks <= sc->mii_anegticks)
326 /* Update the media status. */
329 /* Callback if something changed. */
330 mii_phy_update(sc, cmd);
335 dcphy_status(struct mii_softc *sc)
337 struct mii_data *mii = sc->mii_pdata;
338 int reg, anlpar, tstat = 0;
339 struct dc_softc *dc_sc;
341 dc_sc = mii->mii_ifp->if_softc;
343 mii->mii_media_status = IFM_AVALID;
344 mii->mii_media_active = IFM_ETHER;
346 if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
349 reg = CSR_READ_4(dc_sc, DC_10BTSTAT);
350 if (!(reg & DC_TSTAT_LS10) || !(reg & DC_TSTAT_LS100))
351 mii->mii_media_status |= IFM_ACTIVE;
353 if (CSR_READ_4(dc_sc, DC_10BTCTRL) & DC_TCTL_AUTONEGENBL) {
354 /* Erg, still trying, I guess... */
355 tstat = CSR_READ_4(dc_sc, DC_10BTSTAT);
356 if ((tstat & DC_TSTAT_ANEGSTAT) != DC_ASTAT_AUTONEGCMP) {
357 if ((DC_IS_MACRONIX(dc_sc) || DC_IS_PNICII(dc_sc)) &&
358 (tstat & DC_TSTAT_ANEGSTAT) == DC_ASTAT_DISABLE)
360 mii->mii_media_active |= IFM_NONE;
364 if (tstat & DC_TSTAT_LP_CAN_NWAY) {
365 anlpar = tstat >> 16;
366 if (anlpar & ANLPAR_T4 &&
367 sc->mii_capabilities & BMSR_100TXHDX)
368 mii->mii_media_active |= IFM_100_T4;
369 else if (anlpar & ANLPAR_TX_FD &&
370 sc->mii_capabilities & BMSR_100TXFDX)
371 mii->mii_media_active |= IFM_100_TX|IFM_FDX;
372 else if (anlpar & ANLPAR_TX &&
373 sc->mii_capabilities & BMSR_100TXHDX)
374 mii->mii_media_active |= IFM_100_TX;
375 else if (anlpar & ANLPAR_10_FD)
376 mii->mii_media_active |= IFM_10_T|IFM_FDX;
377 else if (anlpar & ANLPAR_10)
378 mii->mii_media_active |= IFM_10_T;
380 mii->mii_media_active |= IFM_NONE;
381 if (DC_IS_INTEL(dc_sc))
382 DC_CLRBIT(dc_sc, DC_10BTCTRL,
383 DC_TCTL_AUTONEGENBL);
387 * If the other side doesn't support NWAY, then the
388 * best we can do is determine if we have a 10Mbps or
389 * 100Mbps link. There's no way to know if the link
390 * is full or half duplex, so we default to half duplex
391 * and hope that the user is clever enough to manually
392 * change the media settings if we're wrong.
394 if (!(reg & DC_TSTAT_LS100))
395 mii->mii_media_active |= IFM_100_TX;
396 else if (!(reg & DC_TSTAT_LS10))
397 mii->mii_media_active |= IFM_10_T;
399 mii->mii_media_active |= IFM_NONE;
400 if (DC_IS_INTEL(dc_sc))
401 DC_CLRBIT(dc_sc, DC_10BTCTRL, DC_TCTL_AUTONEGENBL);
407 if (CSR_READ_4(dc_sc, DC_NETCFG) & DC_NETCFG_SPEEDSEL)
408 mii->mii_media_active |= IFM_10_T;
410 mii->mii_media_active |= IFM_100_TX;
411 if (CSR_READ_4(dc_sc, DC_NETCFG) & DC_NETCFG_FULLDUPLEX)
412 mii->mii_media_active |= IFM_FDX;
418 dcphy_auto(struct mii_softc *sc)
420 struct dc_softc *dc_sc = sc->mii_pdata->mii_ifp->if_softc;
422 DC_CLRBIT(dc_sc, DC_NETCFG, DC_NETCFG_PORTSEL);
423 DC_SETBIT(dc_sc, DC_NETCFG, DC_NETCFG_FULLDUPLEX);
424 DC_CLRBIT(dc_sc, DC_SIARESET, DC_SIA_RESET);
425 if (sc->mii_capabilities & BMSR_100TXHDX)
426 CSR_WRITE_4(dc_sc, DC_10BTCTRL, 0x3FFFF);
428 CSR_WRITE_4(dc_sc, DC_10BTCTRL, 0xFFFF);
429 DC_SETBIT(dc_sc, DC_SIARESET, DC_SIA_RESET);
430 DC_SETBIT(dc_sc, DC_10BTCTRL, DC_TCTL_AUTONEGENBL);
431 DC_SETBIT(dc_sc, DC_10BTSTAT, DC_ASTAT_TXDISABLE);
435 dcphy_reset(struct mii_softc *sc)
437 struct dc_softc *dc_sc = sc->mii_pdata->mii_ifp->if_softc;
439 DC_CLRBIT(dc_sc, DC_SIARESET, DC_SIA_RESET);
441 DC_SETBIT(dc_sc, DC_SIARESET, DC_SIA_RESET);