sys/dev/netif/nfe/if_nfe.c

   1 /*      $OpenBSD: if_nfe.c,v 1.63 2006/06/17 18:00:43 brad Exp $        */
   2 /*      $DragonFly: src/sys/dev/netif/nfe/if_nfe.c,v 1.1 2006/08/27 03:28:21 sephe Exp $        */
   3
   4 /*
   5  * Copyright (c) 2006 The DragonFly Project.  All rights reserved.
   6  *
   7  * This code is derived from software contributed to The DragonFly Project
   8  * by Sepherosa Ziehau <sepherosa@gmail.com> and
   9  * Matthew Dillon <dillon@apollo.backplane.com>
  10  *
  11  * Redistribution and use in source and binary forms, with or without
  12  * modification, are permitted provided that the following conditions
  13  * are met:
  14  *
  15  * 1. Redistributions of source code must retain the above copyright
  16  *    notice, this list of conditions and the following disclaimer.
  17  * 2. Redistributions in binary form must reproduce the above copyright
  18  *    notice, this list of conditions and the following disclaimer in
  19  *    the documentation and/or other materials provided with the
  20  *    distribution.
  21  * 3. Neither the name of The DragonFly Project nor the names of its
  22  *    contributors may be used to endorse or promote products derived
  23  *    from this software without specific, prior written permission.
  24  *
  25  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  26  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  27  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
  28  * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
  29  * COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
  30  * INCIDENTAL, SPECIAL, EXEMPLARY OR CONSEQUENTIAL DAMAGES (INCLUDING,
  31  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  32  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
  33  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  34  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
  35  * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  36  * SUCH DAMAGE.
  37  */
  38
  39 /*
  40  * Copyright (c) 2006 Damien Bergamini <damien.bergamini@free.fr>
  41  * Copyright (c) 2005, 2006 Jonathan Gray <jsg@openbsd.org>
  42  *
  43  * Permission to use, copy, modify, and distribute this software for any
  44  * purpose with or without fee is hereby granted, provided that the above
  45  * copyright notice and this permission notice appear in all copies.
  46  *
  47  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  48  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  49  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  50  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  51  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  52  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  53  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  54  */
  55
  56 /* Driver for NVIDIA nForce MCP Fast Ethernet and Gigabit Ethernet */
  57
  58 #include "opt_polling.h"
  59
  60 #include <sys/param.h>
  61 #include <sys/endian.h>
  62 #include <sys/kernel.h>
  63 #include <sys/bus.h>
  64 #include <sys/proc.h>
  65 #include <sys/rman.h>
  66 #include <sys/serialize.h>
  67 #include <sys/socket.h>
  68 #include <sys/sockio.h>
  69 #include <sys/sysctl.h>
  70
  71 #include <machine/bus.h>
  72 #include <machine/resource.h>
  73
  74 #include <net/ethernet.h>
  75 #include <net/if.h>
  76 #include <net/bpf.h>
  77 #include <net/if_arp.h>
  78 #include <net/if_dl.h>
  79 #include <net/if_media.h>
  80 #include <net/ifq_var.h>
  81 #include <net/if_types.h>
  82 #include <net/if_var.h>
  83 #include <net/vlan/if_vlan_var.h>
  84
  85 #include <bus/pci/pcireg.h>
  86 #include <bus/pci/pcivar.h>
  87 #include <bus/pci/pcidevs.h>
  88
  89 #include <dev/netif/mii_layer/mii.h>
  90 #include <dev/netif/mii_layer/miivar.h>
  91
  92 #include "miibus_if.h"
  93
  94 #include "if_nfereg.h"
  95 #include "if_nfevar.h"
  96
  97 static int      nfe_probe(device_t);
  98 static int      nfe_attach(device_t);
  99 static int      nfe_detach(device_t);
 100 static void     nfe_shutdown(device_t);
 101 static int      nfe_resume(device_t);
 102 static int      nfe_suspend(device_t);
 103
 104 static int      nfe_miibus_readreg(device_t, int, int);
 105 static void     nfe_miibus_writereg(device_t, int, int, int);
 106 static void     nfe_miibus_statchg(device_t);
 107
 108 #ifdef DEVICE_POLLING
 109 static void     nfe_poll(struct ifnet *, enum poll_cmd, int);
 110 #endif
 111 static void     nfe_intr(void *);
 112 static int      nfe_ioctl(struct ifnet *, u_long, caddr_t, struct ucred *);
 113 static void     nfe_rxeof(struct nfe_softc *);
 114 static void     nfe_txeof(struct nfe_softc *);
 115 static int      nfe_encap(struct nfe_softc *, struct nfe_tx_ring *,
 116                           struct mbuf *);
 117 static void     nfe_start(struct ifnet *);
 118 static void     nfe_watchdog(struct ifnet *);
 119 static void     nfe_init(void *);
 120 static void     nfe_stop(struct nfe_softc *);
 121 static struct nfe_jbuf *nfe_jalloc(struct nfe_softc *);
 122 static void     nfe_jfree(void *);
 123 static void     nfe_jref(void *);
 124 static int      nfe_jpool_alloc(struct nfe_softc *, struct nfe_rx_ring *);
 125 static void     nfe_jpool_free(struct nfe_softc *, struct nfe_rx_ring *);
 126 static int      nfe_alloc_rx_ring(struct nfe_softc *, struct nfe_rx_ring *);
 127 static void     nfe_reset_rx_ring(struct nfe_softc *, struct nfe_rx_ring *);
 128 static int      nfe_init_rx_ring(struct nfe_softc *, struct nfe_rx_ring *);
 129 static void     nfe_free_rx_ring(struct nfe_softc *, struct nfe_rx_ring *);
 130 static int      nfe_alloc_tx_ring(struct nfe_softc *, struct nfe_tx_ring *);
 131 static void     nfe_reset_tx_ring(struct nfe_softc *, struct nfe_tx_ring *);
 132 static int      nfe_init_tx_ring(struct nfe_softc *, struct nfe_tx_ring *);
 133 static void     nfe_free_tx_ring(struct nfe_softc *, struct nfe_tx_ring *);
 134 static int      nfe_ifmedia_upd(struct ifnet *);
 135 static void     nfe_ifmedia_sts(struct ifnet *, struct ifmediareq *);
 136 static void     nfe_setmulti(struct nfe_softc *);
 137 static void     nfe_get_macaddr(struct nfe_softc *, uint8_t *);
 138 static void     nfe_set_macaddr(struct nfe_softc *, const uint8_t *);
 139 static void     nfe_tick(void *);
 140 static void     nfe_ring_dma_addr(void *, bus_dma_segment_t *, int, int);
 141 static void     nfe_buf_dma_addr(void *, bus_dma_segment_t *, int, bus_size_t,
 142                                  int);
 143 static void     nfe_set_paddr_rxdesc(struct nfe_softc *, struct nfe_rx_ring *,
 144                                      int, bus_addr_t);
 145 static void     nfe_set_ready_rxdesc(struct nfe_softc *, struct nfe_rx_ring *,
 146                                      int);
 147 static int      nfe_newbuf_std(struct nfe_softc *, struct nfe_rx_ring *, int,
 148                                int);
 149 static int      nfe_newbuf_jumbo(struct nfe_softc *, struct nfe_rx_ring *, int,
 150                                  int);
 151
 152 #define NFE_DEBUG
 153 #ifdef NFE_DEBUG
 154
 155 static int      nfe_debug = 0;
 156
 157 SYSCTL_NODE(_hw, OID_AUTO, nfe, CTLFLAG_RD, 0, "nVidia GigE parameters");
 158 SYSCTL_INT(_hw_nfe, OID_AUTO, debug, CTLFLAG_RW, &nfe_debug, 0,
 159            "control debugging printfs");
 160
 161 #define DPRINTF(sc, fmt, ...) do {              \
 162         if (nfe_debug) {                        \
 163                 if_printf(&(sc)->arpcom.ac_if,  \
 164                           fmt, __VA_ARGS__);    \
 165         }                                       \
 166 } while (0)
 167
 168 #define DPRINTFN(sc, lv, fmt, ...) do {         \
 169         if (nfe_debug >= (lv)) {                \
 170                 if_printf(&(sc)->arpcom.ac_if,  \
 171                           fmt, __VA_ARGS__);    \
 172         }                                       \
 173 } while (0)
 174
 175 #else   /* !NFE_DEBUG */
 176
 177 #define DPRINTF(sc, fmt, ...)
 178 #define DPRINTFN(sc, lv, fmt, ...)
 179
 180 #endif  /* NFE_DEBUG */
 181
 182 struct nfe_dma_ctx {
 183         int                     nsegs;
 184         bus_dma_segment_t       *segs;
 185 };
 186
 187 static const struct nfe_dev {
 188         uint16_t        vid;
 189         uint16_t        did;
 190         const char      *desc;
 191 } nfe_devices[] = {
 192         { PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE_LAN,
 193           "NVIDIA nForce Gigabit Ethernet" },
 194
 195         { PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE2_LAN,
 196           "NVIDIA nForce2 Gigabit Ethernet" },
 197
 198         { PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE3_LAN1,
 199           "NVIDIA nForce3 Gigabit Ethernet" },
 200
 201         { PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE3_LAN2,
 202           "NVIDIA nForce3 Gigabit Ethernet" },
 203
 204         { PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE3_LAN3,
 205           "NVIDIA nForce3 Gigabit Ethernet" },
 206
 207         { PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE3_LAN4,
 208           "NVIDIA nForce3 Gigabit Ethernet" },
 209
 210         { PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE3_LAN5,
 211           "NVIDIA nForce3 Gigabit Ethernet" },
 212
 213         { PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_CK804_LAN1,
 214           "NVIDIA CK804 Gigabit Ethernet" },
 215
 216         { PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_CK804_LAN2,
 217           "NVIDIA CK804 Gigabit Ethernet" },
 218
 219         { PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP04_LAN1,
 220           "NVIDIA MCP04 Gigabit Ethernet" },
 221
 222         { PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP04_LAN2,
 223           "NVIDIA MCP04 Gigabit Ethernet" },
 224
 225         { PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP51_LAN1,
 226           "NVIDIA MCP51 Gigabit Ethernet" },
 227
 228         { PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP51_LAN2,
 229           "NVIDIA MCP51 Gigabit Ethernet" },
 230
 231         { PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP55_LAN1,
 232           "NVIDIA MCP55 Gigabit Ethernet" },
 233
 234         { PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP55_LAN2,
 235           "NVIDIA MCP55 Gigabit Ethernet" }
 236 };
 237
 238 static device_method_t nfe_methods[] = {
 239         /* Device interface */
 240         DEVMETHOD(device_probe,         nfe_probe),
 241         DEVMETHOD(device_attach,        nfe_attach),
 242         DEVMETHOD(device_detach,        nfe_detach),
 243         DEVMETHOD(device_suspend,       nfe_suspend),
 244         DEVMETHOD(device_resume,        nfe_resume),
 245         DEVMETHOD(device_shutdown,      nfe_shutdown),
 246
 247         /* Bus interface */
 248         DEVMETHOD(bus_print_child,      bus_generic_print_child),
 249         DEVMETHOD(bus_driver_added,     bus_generic_driver_added),
 250
 251         /* MII interface */
 252         DEVMETHOD(miibus_readreg,       nfe_miibus_readreg),
 253         DEVMETHOD(miibus_writereg,      nfe_miibus_writereg),
 254         DEVMETHOD(miibus_statchg,       nfe_miibus_statchg),
 255
 256         { 0, 0 }
 257 };
 258
 259 static driver_t nfe_driver = {
 260         "nfe",
 261         nfe_methods,
 262         sizeof(struct nfe_softc)
 263 };
 264
 265 static devclass_t       nfe_devclass;
 266
 267 DECLARE_DUMMY_MODULE(if_nfe);
 268 MODULE_DEPEND(if_nfe, miibus, 1, 1, 1);
 269 DRIVER_MODULE(if_nfe, pci, nfe_driver, nfe_devclass, 0, 0);
 270 DRIVER_MODULE(miibus, nfe, miibus_driver, miibus_devclass, 0, 0);
 271
 272 static int
 273 nfe_probe(device_t dev)
 274 {
 275         const struct nfe_dev *n;
 276         uint16_t vid, did;
 277
 278         vid = pci_get_vendor(dev);
 279         did = pci_get_device(dev);
 280         for (n = nfe_devices; n->desc != NULL; ++n) {
 281                 if (vid == n->vid && did == n->did) {
 282                         struct nfe_softc *sc = device_get_softc(dev);
 283
 284                         switch (did) {
 285                         case PCI_PRODUCT_NVIDIA_NFORCE3_LAN2:
 286                         case PCI_PRODUCT_NVIDIA_NFORCE3_LAN3:
 287                         case PCI_PRODUCT_NVIDIA_NFORCE3_LAN4:
 288                         case PCI_PRODUCT_NVIDIA_NFORCE3_LAN5:
 289                                 sc->sc_flags = NFE_JUMBO_SUP |
 290                                                NFE_HW_CSUM;
 291                                 break;
 292                         case PCI_PRODUCT_NVIDIA_MCP51_LAN1:
 293                         case PCI_PRODUCT_NVIDIA_MCP51_LAN2:
 294                                 sc->sc_flags = NFE_40BIT_ADDR;
 295                                 break;
 296                         case PCI_PRODUCT_NVIDIA_CK804_LAN1:
 297                         case PCI_PRODUCT_NVIDIA_CK804_LAN2:
 298                         case PCI_PRODUCT_NVIDIA_MCP04_LAN1:
 299                         case PCI_PRODUCT_NVIDIA_MCP04_LAN2:
 300                                 sc->sc_flags = NFE_JUMBO_SUP |
 301                                                NFE_40BIT_ADDR |
 302                                                NFE_HW_CSUM;
 303                                 break;
 304                         case PCI_PRODUCT_NVIDIA_MCP55_LAN1:
 305                         case PCI_PRODUCT_NVIDIA_MCP55_LAN2:
 306                                 sc->sc_flags = NFE_JUMBO_SUP |
 307                                                NFE_40BIT_ADDR |
 308                                                NFE_HW_CSUM |
 309                                                NFE_HW_VLAN;
 310                                 break;
 311                         }
 312
 313                         /* Enable jumbo frames for adapters that support it */
 314                         if (sc->sc_flags & NFE_JUMBO_SUP)
 315                                 sc->sc_flags |= NFE_USE_JUMBO;
 316
 317                         device_set_desc(dev, n->desc);
 318                         return 0;
 319                 }
 320         }
 321         return ENXIO;
 322 }
 323
 324 static int
 325 nfe_attach(device_t dev)
 326 {
 327         struct nfe_softc *sc = device_get_softc(dev);
 328         struct ifnet *ifp = &sc->arpcom.ac_if;
 329         uint8_t eaddr[ETHER_ADDR_LEN];
 330         int error;
 331
 332         if_initname(ifp, device_get_name(dev), device_get_unit(dev));
 333         lwkt_serialize_init(&sc->sc_jbuf_serializer);
 334
 335         sc->sc_mem_rid = PCIR_BAR(0);
 336
 337 #ifndef BURN_BRIDGES
 338         if (pci_get_powerstate(dev) != PCI_POWERSTATE_D0) {
 339                 uint32_t mem, irq;
 340
 341                 mem = pci_read_config(dev, sc->sc_mem_rid, 4);
 342                 irq = pci_read_config(dev, PCIR_INTLINE, 4);
 343
 344                 device_printf(dev, "chip is in D%d power mode "
 345                     "-- setting to D0\n", pci_get_powerstate(dev));
 346
 347                 pci_set_powerstate(dev, PCI_POWERSTATE_D0);
 348
 349                 pci_write_config(dev, sc->sc_mem_rid, mem, 4);
 350                 pci_write_config(dev, PCIR_INTLINE, irq, 4);
 351         }
 352 #endif  /* !BURN_BRIDGE */
 353
 354         /* Enable bus mastering */
 355         pci_enable_busmaster(dev);
 356
 357         /* Allocate IO memory */
 358         sc->sc_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
 359                                                 &sc->sc_mem_rid, RF_ACTIVE);
 360         if (sc->sc_mem_res == NULL) {
 361                 device_printf(dev, "cound not allocate io memory\n");
 362                 return ENXIO;
 363         }
 364         sc->sc_memh = rman_get_bushandle(sc->sc_mem_res);
 365         sc->sc_memt = rman_get_bustag(sc->sc_mem_res);
 366
 367         /* Allocate IRQ */
 368         sc->sc_irq_rid = 0;
 369         sc->sc_irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ,
 370                                                 &sc->sc_irq_rid,
 371                                                 RF_SHAREABLE | RF_ACTIVE);
 372         if (sc->sc_irq_res == NULL) {
 373                 device_printf(dev, "could not allocate irq\n");
 374                 error = ENXIO;
 375                 goto fail;
 376         }
 377
 378         nfe_get_macaddr(sc, eaddr);
 379
 380         /*
 381          * Allocate Tx and Rx rings.
 382          */
 383         error = nfe_alloc_tx_ring(sc, &sc->txq);
 384         if (error) {
 385                 device_printf(dev, "could not allocate Tx ring\n");
 386                 goto fail;
 387         }
 388
 389         error = nfe_alloc_rx_ring(sc, &sc->rxq);
 390         if (error) {
 391                 device_printf(dev, "could not allocate Rx ring\n");
 392                 goto fail;
 393         }
 394
 395         error = mii_phy_probe(dev, &sc->sc_miibus, nfe_ifmedia_upd,
 396                               nfe_ifmedia_sts);
 397         if (error) {
 398                 device_printf(dev, "MII without any phy\n");
 399                 goto fail;
 400         }
 401
 402         ifp->if_softc = sc;
 403         ifp->if_mtu = ETHERMTU;
 404         ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
 405         ifp->if_ioctl = nfe_ioctl;
 406         ifp->if_start = nfe_start;
 407 #ifdef DEVICE_POLLING
 408         ifp->if_poll = nfe_poll;
 409 #endif
 410         ifp->if_watchdog = nfe_watchdog;
 411         ifp->if_init = nfe_init;
 412         ifq_set_maxlen(&ifp->if_snd, NFE_IFQ_MAXLEN);
 413         ifq_set_ready(&ifp->if_snd);
 414
 415         ifp->if_capabilities = IFCAP_VLAN_MTU;
 416
 417 #if 0
 418         if (sc->sc_flags & NFE_USE_JUMBO)
 419                 ifp->if_hardmtu = NFE_JUMBO_MTU;
 420 #endif
 421
 422         if (sc->sc_flags & NFE_HW_VLAN)
 423                 ifp->if_capabilities |= IFCAP_VLAN_HWTAGGING;
 424
 425 #ifdef NFE_CSUM
 426         if (sc->sc_flags & NFE_HW_CSUM) {
 427 #if 0
 428                 ifp->if_capabilities |= IFCAP_CSUM_IPv4 | IFCAP_CSUM_TCPv4 |
 429                     IFCAP_CSUM_UDPv4;
 430 #else
 431                 ifp->if_capabilities = IFCAP_HWCSUM;
 432                 ifp->if_hwassist = CSUM_IP | CSUM_TCP | CSUM_UDP;
 433 #endif
 434         }
 435 #endif
 436         ifp->if_capenable = ifp->if_capabilities;
 437
 438         callout_init(&sc->sc_tick_ch);
 439
 440         ether_ifattach(ifp, eaddr, NULL);
 441
 442         error = bus_setup_intr(dev, sc->sc_irq_res, INTR_MPSAFE, nfe_intr, sc,
 443                                &sc->sc_ih, ifp->if_serializer);
 444         if (error) {
 445                 device_printf(dev, "could not setup intr\n");
 446                 ether_ifdetach(ifp);
 447                 goto fail;
 448         }
 449
 450         return 0;
 451 fail:
 452         nfe_detach(dev);
 453         return error;
 454 }
 455
 456 static int
 457 nfe_detach(device_t dev)
 458 {
 459         struct nfe_softc *sc = device_get_softc(dev);
 460
 461         if (device_is_attached(dev)) {
 462                 struct ifnet *ifp = &sc->arpcom.ac_if;
 463
 464                 lwkt_serialize_enter(ifp->if_serializer);
 465                 nfe_stop(sc);
 466                 bus_teardown_intr(dev, sc->sc_irq_res, sc->sc_ih);
 467                 lwkt_serialize_exit(ifp->if_serializer);
 468
 469                 ether_ifdetach(ifp);
 470         }
 471
 472         if (sc->sc_miibus != NULL)
 473                 device_delete_child(dev, sc->sc_miibus);
 474         bus_generic_detach(dev);
 475
 476         if (sc->sc_irq_res != NULL) {
 477                 bus_release_resource(dev, SYS_RES_IRQ, sc->sc_irq_rid,
 478                                      sc->sc_irq_res);
 479         }
 480
 481         if (sc->sc_mem_res != NULL) {
 482                 bus_release_resource(dev, SYS_RES_MEMORY, sc->sc_mem_rid,
 483                                      sc->sc_mem_res);
 484         }
 485
 486         nfe_free_tx_ring(sc, &sc->txq);
 487         nfe_free_rx_ring(sc, &sc->rxq);
 488
 489         return 0;
 490 }
 491
 492 static void
 493 nfe_shutdown(device_t dev)
 494 {
 495         struct nfe_softc *sc = device_get_softc(dev);
 496         struct ifnet *ifp = &sc->arpcom.ac_if;
 497
 498         lwkt_serialize_enter(ifp->if_serializer);
 499         nfe_stop(sc);
 500         lwkt_serialize_exit(ifp->if_serializer);
 501 }
 502
 503 static int
 504 nfe_suspend(device_t dev)
 505 {
 506         struct nfe_softc *sc = device_get_softc(dev);
 507         struct ifnet *ifp = &sc->arpcom.ac_if;
 508
 509         lwkt_serialize_enter(ifp->if_serializer);
 510         nfe_stop(sc);
 511         lwkt_serialize_exit(ifp->if_serializer);
 512
 513         return 0;
 514 }
 515
 516 static int
 517 nfe_resume(device_t dev)
 518 {
 519         struct nfe_softc *sc = device_get_softc(dev);
 520         struct ifnet *ifp = &sc->arpcom.ac_if;
 521
 522         lwkt_serialize_enter(ifp->if_serializer);
 523         if (ifp->if_flags & IFF_UP) {
 524                 nfe_init(ifp);
 525                 if (ifp->if_flags & IFF_RUNNING)
 526                         ifp->if_start(ifp);
 527         }
 528         lwkt_serialize_exit(ifp->if_serializer);
 529
 530         return 0;
 531 }
 532
 533 static void
 534 nfe_miibus_statchg(device_t dev)
 535 {
 536         struct nfe_softc *sc = device_get_softc(dev);
 537         struct mii_data *mii = device_get_softc(sc->sc_miibus);
 538         uint32_t phy, seed, misc = NFE_MISC1_MAGIC, link = NFE_MEDIA_SET;
 539
 540         phy = NFE_READ(sc, NFE_PHY_IFACE);
 541         phy &= ~(NFE_PHY_HDX | NFE_PHY_100TX | NFE_PHY_1000T);
 542
 543         seed = NFE_READ(sc, NFE_RNDSEED);
 544         seed &= ~NFE_SEED_MASK;
 545
 546         if ((mii->mii_media_active & IFM_GMASK) == IFM_HDX) {
 547                 phy  |= NFE_PHY_HDX;    /* half-duplex */
 548                 misc |= NFE_MISC1_HDX;
 549         }
 550
 551         switch (IFM_SUBTYPE(mii->mii_media_active)) {
 552         case IFM_1000_T:        /* full-duplex only */
 553                 link |= NFE_MEDIA_1000T;
 554                 seed |= NFE_SEED_1000T;
 555                 phy  |= NFE_PHY_1000T;
 556                 break;
 557         case IFM_100_TX:
 558                 link |= NFE_MEDIA_100TX;
 559                 seed |= NFE_SEED_100TX;
 560                 phy  |= NFE_PHY_100TX;
 561                 break;
 562         case IFM_10_T:
 563                 link |= NFE_MEDIA_10T;
 564                 seed |= NFE_SEED_10T;
 565                 break;
 566         }
 567
 568         NFE_WRITE(sc, NFE_RNDSEED, seed);       /* XXX: gigabit NICs only? */
 569
 570         NFE_WRITE(sc, NFE_PHY_IFACE, phy);
 571         NFE_WRITE(sc, NFE_MISC1, misc);
 572         NFE_WRITE(sc, NFE_LINKSPEED, link);
 573 }
 574
 575 static int
 576 nfe_miibus_readreg(device_t dev, int phy, int reg)
 577 {
 578         struct nfe_softc *sc = device_get_softc(dev);
 579         uint32_t val;
 580         int ntries;
 581
 582         NFE_WRITE(sc, NFE_PHY_STATUS, 0xf);
 583
 584         if (NFE_READ(sc, NFE_PHY_CTL) & NFE_PHY_BUSY) {
 585                 NFE_WRITE(sc, NFE_PHY_CTL, NFE_PHY_BUSY);
 586                 DELAY(100);
 587         }
 588
 589         NFE_WRITE(sc, NFE_PHY_CTL, (phy << NFE_PHYADD_SHIFT) | reg);
 590
 591         for (ntries = 0; ntries < 1000; ntries++) {
 592                 DELAY(100);
 593                 if (!(NFE_READ(sc, NFE_PHY_CTL) & NFE_PHY_BUSY))
 594                         break;
 595         }
 596         if (ntries == 1000) {
 597                 DPRINTFN(sc, 2, "timeout waiting for PHY %s\n", "");
 598                 return 0;
 599         }
 600
 601         if (NFE_READ(sc, NFE_PHY_STATUS) & NFE_PHY_ERROR) {
 602                 DPRINTFN(sc, 2, "could not read PHY %s\n", "");
 603                 return 0;
 604         }
 605
 606         val = NFE_READ(sc, NFE_PHY_DATA);
 607         if (val != 0xffffffff && val != 0)
 608                 sc->mii_phyaddr = phy;
 609
 610         DPRINTFN(sc, 2, "mii read phy %d reg 0x%x ret 0x%x\n", phy, reg, val);
 611
 612         return val;
 613 }
 614
 615 static void
 616 nfe_miibus_writereg(device_t dev, int phy, int reg, int val)
 617 {
 618         struct nfe_softc *sc = device_get_softc(dev);
 619         uint32_t ctl;
 620         int ntries;
 621
 622         NFE_WRITE(sc, NFE_PHY_STATUS, 0xf);
 623
 624         if (NFE_READ(sc, NFE_PHY_CTL) & NFE_PHY_BUSY) {
 625                 NFE_WRITE(sc, NFE_PHY_CTL, NFE_PHY_BUSY);
 626                 DELAY(100);
 627         }
 628
 629         NFE_WRITE(sc, NFE_PHY_DATA, val);
 630         ctl = NFE_PHY_WRITE | (phy << NFE_PHYADD_SHIFT) | reg;
 631         NFE_WRITE(sc, NFE_PHY_CTL, ctl);
 632
 633         for (ntries = 0; ntries < 1000; ntries++) {
 634                 DELAY(100);
 635                 if (!(NFE_READ(sc, NFE_PHY_CTL) & NFE_PHY_BUSY))
 636                         break;
 637         }
 638
 639 #ifdef NFE_DEBUG
 640         if (ntries == 1000)
 641                 DPRINTFN(sc, 2, "could not write to PHY %s\n", "");
 642 #endif
 643 }
 644
 645 #ifdef DEVICE_POLLING
 646
 647 static void
 648 nfe_poll(struct ifnet *ifp, enum poll_cmd cmd, int count)
 649 {
 650         struct nfe_softc *sc = ifp->if_softc;
 651
 652         switch(cmd) {
 653         case POLL_REGISTER:
 654                 /* Disable interrupts */
 655                 NFE_WRITE(sc, NFE_IRQ_MASK, 0);
 656                 break;
 657         case POLL_DEREGISTER:
 658                 /* enable interrupts */
 659                 NFE_WRITE(sc, NFE_IRQ_MASK, NFE_IRQ_WANTED);
 660                 break;
 661         case POLL_AND_CHECK_STATUS:
 662                 /* fall through */
 663         case POLL_ONLY:
 664                 if (ifp->if_flags & IFF_RUNNING) {
 665                         nfe_rxeof(sc);
 666                         nfe_txeof(sc);
 667                 }
 668                 break;
 669         }
 670 }
 671
 672 #endif
 673
 674 static void
 675 nfe_intr(void *arg)
 676 {
 677         struct nfe_softc *sc = arg;
 678         struct ifnet *ifp = &sc->arpcom.ac_if;
 679         uint32_t r;
 680
 681         r = NFE_READ(sc, NFE_IRQ_STATUS);
 682         if (r == 0)
 683                 return; /* not for us */
 684         NFE_WRITE(sc, NFE_IRQ_STATUS, r);
 685
 686         DPRINTFN(sc, 5, "%s: interrupt register %x\n", __func__, r);
 687
 688         if (r & NFE_IRQ_LINK) {
 689                 NFE_READ(sc, NFE_PHY_STATUS);
 690                 NFE_WRITE(sc, NFE_PHY_STATUS, 0xf);
 691                 DPRINTF(sc, "link state changed %s\n", "");
 692         }
 693
 694         if (ifp->if_flags & IFF_RUNNING) {
 695                 /* check Rx ring */
 696                 nfe_rxeof(sc);
 697
 698                 /* check Tx ring */
 699                 nfe_txeof(sc);
 700         }
 701 }
 702
 703 static int
 704 nfe_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data, struct ucred *cr)
 705 {
 706         struct nfe_softc *sc = ifp->if_softc;
 707         struct ifreq *ifr = (struct ifreq *)data;
 708         struct mii_data *mii;
 709         int error = 0, mask;
 710
 711         switch (cmd) {
 712         case SIOCSIFMTU:
 713                 /* XXX NFE_USE_JUMBO should be set here */
 714                 break;
 715         case SIOCSIFFLAGS:
 716                 if (ifp->if_flags & IFF_UP) {
 717                         /*
 718                          * If only the PROMISC or ALLMULTI flag changes, then
 719                          * don't do a full re-init of the chip, just update
 720                          * the Rx filter.
 721                          */
 722                         if ((ifp->if_flags & IFF_RUNNING) &&
 723                             ((ifp->if_flags ^ sc->sc_if_flags) &
 724                              (IFF_ALLMULTI | IFF_PROMISC)) != 0) {
 725                                 nfe_setmulti(sc);
 726                         } else {
 727                                 if (!(ifp->if_flags & IFF_RUNNING))
 728                                         nfe_init(sc);
 729                         }
 730                 } else {
 731                         if (ifp->if_flags & IFF_RUNNING)
 732                                 nfe_stop(sc);
 733                 }
 734                 sc->sc_if_flags = ifp->if_flags;
 735                 break;
 736         case SIOCADDMULTI:
 737         case SIOCDELMULTI:
 738                 if (ifp->if_flags & IFF_RUNNING)
 739                         nfe_setmulti(sc);
 740                 break;
 741         case SIOCSIFMEDIA:
 742         case SIOCGIFMEDIA:
 743                 mii = device_get_softc(sc->sc_miibus);
 744                 error = ifmedia_ioctl(ifp, ifr, &mii->mii_media, cmd);
 745                 break;
 746         case SIOCSIFCAP:
 747                 mask = ifr->ifr_reqcap ^ ifp->if_capenable;
 748                 if (mask & IFCAP_HWCSUM) {
 749                         if (IFCAP_HWCSUM & ifp->if_capenable)
 750                                 ifp->if_capenable &= ~IFCAP_HWCSUM;
 751                         else
 752                                 ifp->if_capenable |= IFCAP_HWCSUM;
 753                 }
 754                 break;
 755         default:
 756                 error = ether_ioctl(ifp, cmd, data);
 757                 break;
 758         }
 759         return error;
 760 }
 761
 762 static void
 763 nfe_rxeof(struct nfe_softc *sc)
 764 {
 765         struct ifnet *ifp = &sc->arpcom.ac_if;
 766         struct nfe_rx_ring *ring = &sc->rxq;
 767         int reap;
 768
 769         reap = 0;
 770         bus_dmamap_sync(ring->tag, ring->map, BUS_DMASYNC_POSTREAD);
 771
 772         for (;;) {
 773                 struct nfe_rx_data *data = &ring->data[ring->cur];
 774                 struct mbuf *m;
 775                 uint16_t flags;
 776                 int len, error;
 777
 778                 if (sc->sc_flags & NFE_40BIT_ADDR) {
 779                         struct nfe_desc64 *desc64 = &ring->desc64[ring->cur];
 780
 781                         flags = le16toh(desc64->flags);
 782                         len = le16toh(desc64->length) & 0x3fff;
 783                 } else {
 784                         struct nfe_desc32 *desc32 = &ring->desc32[ring->cur];
 785
 786                         flags = le16toh(desc32->flags);
 787                         len = le16toh(desc32->length) & 0x3fff;
 788                 }
 789
 790                 if (flags & NFE_RX_READY)
 791                         break;
 792
 793                 reap = 1;
 794
 795                 if ((sc->sc_flags & (NFE_JUMBO_SUP | NFE_40BIT_ADDR)) == 0) {
 796                         if (!(flags & NFE_RX_VALID_V1))
 797                                 goto skip;
 798
 799                         if ((flags & NFE_RX_FIXME_V1) == NFE_RX_FIXME_V1) {
 800                                 flags &= ~NFE_RX_ERROR;
 801                                 len--;  /* fix buffer length */
 802                         }
 803                 } else {
 804                         if (!(flags & NFE_RX_VALID_V2))
 805                                 goto skip;
 806
 807                         if ((flags & NFE_RX_FIXME_V2) == NFE_RX_FIXME_V2) {
 808                                 flags &= ~NFE_RX_ERROR;
 809                                 len--;  /* fix buffer length */
 810                         }
 811                 }
 812
 813                 if (flags & NFE_RX_ERROR) {
 814                         ifp->if_ierrors++;
 815                         goto skip;
 816                 }
 817
 818                 m = data->m;
 819
 820                 if (sc->sc_flags & NFE_USE_JUMBO)
 821                         error = nfe_newbuf_jumbo(sc, ring, ring->cur, 0);
 822                 else
 823                         error = nfe_newbuf_std(sc, ring, ring->cur, 0);
 824                 if (error) {
 825                         ifp->if_ierrors++;
 826                         goto skip;
 827                 }
 828
 829                 /* finalize mbuf */
 830                 m->m_pkthdr.len = m->m_len = len;
 831                 m->m_pkthdr.rcvif = ifp;
 832
 833 #ifdef notyet
 834                 if (sc->sc_flags & NFE_HW_CSUM) {
 835                         if (flags & NFE_RX_IP_CSUMOK)
 836                                 m->m_pkthdr.csum_flags |= M_IPV4_CSUM_IN_OK;
 837                         if (flags & NFE_RX_UDP_CSUMOK)
 838                                 m->m_pkthdr.csum_flags |= M_UDP_CSUM_IN_OK;
 839                         if (flags & NFE_RX_TCP_CSUMOK)
 840                                 m->m_pkthdr.csum_flags |= M_TCP_CSUM_IN_OK;
 841                 }
 842 #elif defined(NFE_CSUM)
 843                 if ((sc->sc_flags & NFE_HW_CSUM) && (flags & NFE_RX_CSUMOK))
 844                         m->m_pkthdr.csum_flags = M_IPV4_CSUM_IN_OK;
 845 #endif
 846
 847                 ifp->if_ipackets++;
 848                 ifp->if_input(ifp, m);
 849 skip:
 850                 nfe_set_ready_rxdesc(sc, ring, ring->cur);
 851                 sc->rxq.cur = (sc->rxq.cur + 1) % NFE_RX_RING_COUNT;
 852         }
 853
 854         if (reap)
 855                 bus_dmamap_sync(ring->tag, ring->map, BUS_DMASYNC_PREWRITE);
 856 }
 857
 858 static void
 859 nfe_txeof(struct nfe_softc *sc)
 860 {
 861         struct ifnet *ifp = &sc->arpcom.ac_if;
 862         struct nfe_tx_ring *ring = &sc->txq;
 863         struct nfe_tx_data *data = NULL;
 864
 865         bus_dmamap_sync(ring->tag, ring->map, BUS_DMASYNC_POSTREAD);
 866         while (ring->next != ring->cur) {
 867                 uint16_t flags;
 868
 869                 if (sc->sc_flags & NFE_40BIT_ADDR)
 870                         flags = le16toh(ring->desc64[ring->next].flags);
 871                 else
 872                         flags = le16toh(ring->desc32[ring->next].flags);
 873
 874                 if (flags & NFE_TX_VALID)
 875                         break;
 876
 877                 data = &ring->data[ring->next];
 878
 879                 if ((sc->sc_flags & (NFE_JUMBO_SUP | NFE_40BIT_ADDR)) == 0) {
 880                         if (!(flags & NFE_TX_LASTFRAG_V1) && data->m == NULL)
 881                                 goto skip;
 882
 883                         if ((flags & NFE_TX_ERROR_V1) != 0) {
 884                                 if_printf(ifp, "tx v1 error 0x%4b\n", flags,
 885                                           NFE_V1_TXERR);
 886                                 ifp->if_oerrors++;
 887                         } else {
 888                                 ifp->if_opackets++;
 889                         }
 890                 } else {
 891                         if (!(flags & NFE_TX_LASTFRAG_V2) && data->m == NULL)
 892                                 goto skip;
 893
 894                         if ((flags & NFE_TX_ERROR_V2) != 0) {
 895                                 if_printf(ifp, "tx v2 error 0x%4b\n", flags,
 896                                           NFE_V2_TXERR);
 897                                 ifp->if_oerrors++;
 898                         } else {
 899                                 ifp->if_opackets++;
 900                         }
 901                 }
 902
 903                 if (data->m == NULL) {  /* should not get there */
 904                         if_printf(ifp,
 905                                   "last fragment bit w/o associated mbuf!\n");
 906                         goto skip;
 907                 }
 908
 909                 /* last fragment of the mbuf chain transmitted */
 910                 bus_dmamap_sync(ring->data_tag, data->map,
 911                                 BUS_DMASYNC_POSTWRITE);
 912                 bus_dmamap_unload(ring->data_tag, data->map);
 913                 m_freem(data->m);
 914                 data->m = NULL;
 915
 916                 ifp->if_timer = 0;
 917 skip:
 918                 ring->queued--;
 919                 KKASSERT(ring->queued >= 0);
 920                 ring->next = (ring->next + 1) % NFE_TX_RING_COUNT;
 921         }
 922
 923         if (data != NULL) {     /* at least one slot freed */
 924                 ifp->if_flags &= ~IFF_OACTIVE;
 925                 ifp->if_start(ifp);
 926         }
 927 }
 928
 929 static int
 930 nfe_encap(struct nfe_softc *sc, struct nfe_tx_ring *ring, struct mbuf *m0)
 931 {
 932         struct nfe_dma_ctx ctx;
 933         bus_dma_segment_t segs[NFE_MAX_SCATTER];
 934         struct nfe_tx_data *data, *data_map;
 935         bus_dmamap_t map;
 936         struct nfe_desc64 *desc64 = NULL;
 937         struct nfe_desc32 *desc32 = NULL;
 938         uint16_t flags = 0;
 939         uint32_t vtag = 0;
 940         int error, i, j;
 941
 942         data = &ring->data[ring->cur];
 943         map = data->map;
 944         data_map = data;        /* Remember who owns the DMA map */
 945
 946         ctx.nsegs = NFE_MAX_SCATTER;
 947         ctx.segs = segs;
 948         error = bus_dmamap_load_mbuf(ring->data_tag, map, m0,
 949                                      nfe_buf_dma_addr, &ctx, BUS_DMA_NOWAIT);
 950         if (error && error != EFBIG) {
 951                 if_printf(&sc->arpcom.ac_if, "could not map TX mbuf\n");
 952                 goto back;
 953         }
 954
 955         if (error) {    /* error == EFBIG */
 956                 struct mbuf *m_new;
 957
 958                 m_new = m_defrag(m0, MB_DONTWAIT);
 959                 if (m_new == NULL) {
 960                         if_printf(&sc->arpcom.ac_if,
 961                                   "could not defrag TX mbuf\n");
 962                         error = ENOBUFS;
 963                         goto back;
 964                 } else {
 965                         m0 = m_new;
 966                 }
 967
 968                 ctx.nsegs = NFE_MAX_SCATTER;
 969                 ctx.segs = segs;
 970                 error = bus_dmamap_load_mbuf(ring->data_tag, map, m0,
 971                                              nfe_buf_dma_addr, &ctx,
 972                                              BUS_DMA_NOWAIT);
 973                 if (error) {
 974                         if_printf(&sc->arpcom.ac_if,
 975                                   "could not map defraged TX mbuf\n");
 976                         goto back;
 977                 }
 978         }
 979
 980         error = 0;
 981
 982         if (ring->queued + ctx.nsegs >= NFE_TX_RING_COUNT - 1) {
 983                 bus_dmamap_unload(ring->data_tag, map);
 984                 error = ENOBUFS;
 985                 goto back;
 986         }
 987
 988         /* setup h/w VLAN tagging */
 989         if ((m0->m_flags & (M_PROTO1 | M_PKTHDR)) == (M_PROTO1 | M_PKTHDR) &&
 990             m0->m_pkthdr.rcvif != NULL &&
 991             m0->m_pkthdr.rcvif->if_type == IFT_L2VLAN) {
 992                 struct ifvlan *ifv = m0->m_pkthdr.rcvif->if_softc;
 993
 994                 if (ifv != NULL)
 995                         vtag = NFE_TX_VTAG | htons(ifv->ifv_tag);
 996         }
 997
 998 #ifdef NFE_CSUM
 999         if (m0->m_pkthdr.csum_flags & M_IPV4_CSUM_OUT)
1000                 flags |= NFE_TX_IP_CSUM;
1001         if (m0->m_pkthdr.csum_flags & (M_TCPV4_CSUM_OUT | M_UDPV4_CSUM_OUT))
1002                 flags |= NFE_TX_TCP_CSUM;
1003 #endif
1004
1005         /*
1006          * XXX urm. somebody is unaware of how hardware works.  You
1007          * absolutely CANNOT set NFE_TX_VALID on the next descriptor in
1008          * the ring until the entire chain is actually *VALID*.  Otherwise
1009          * the hardware may encounter a partially initialized chain that
1010          * is marked as being ready to go when it in fact is not ready to
1011          * go.
1012          */
1013
1014         for (i = 0; i < ctx.nsegs; i++) {
1015                 j = (ring->cur + i) % NFE_TX_RING_COUNT;
1016                 data = &ring->data[j];
1017
1018                 if (sc->sc_flags & NFE_40BIT_ADDR) {
1019                         desc64 = &ring->desc64[j];
1020 #if defined(__LP64__)
1021                         desc64->physaddr[0] =
1022                             htole32(segs[i].ds_addr >> 32);
1023 #endif
1024                         desc64->physaddr[1] =
1025                             htole32(segs[i].ds_addr & 0xffffffff);
1026                         desc64->length = htole16(segs[i].ds_len - 1);
1027                         desc64->vtag = htole32(vtag);
1028                         desc64->flags = htole16(flags);
1029                 } else {
1030                         desc32 = &ring->desc32[j];
1031                         desc32->physaddr = htole32(segs[i].ds_addr);
1032                         desc32->length = htole16(segs[i].ds_len - 1);
1033                         desc32->flags = htole16(flags);
1034                 }
1035
1036                 /* csum flags and vtag belong to the first fragment only */
1037                 flags &= ~(NFE_TX_IP_CSUM | NFE_TX_TCP_CSUM);
1038                 vtag = 0;
1039
1040                 ring->queued++;
1041                 KKASSERT(ring->queued <= NFE_TX_RING_COUNT);
1042         }
1043
1044         /* the whole mbuf chain has been DMA mapped, fix last descriptor */
1045         if (sc->sc_flags & NFE_40BIT_ADDR) {
1046                 desc64->flags |= htole16(NFE_TX_LASTFRAG_V2);
1047         } else {
1048                 if (sc->sc_flags & NFE_JUMBO_SUP)
1049                         flags = NFE_TX_LASTFRAG_V2;
1050                 else
1051                         flags = NFE_TX_LASTFRAG_V1;
1052                 desc32->flags |= htole16(flags);
1053         }
1054
1055         /*
1056          * Set NFE_TX_VALID backwards so the hardware doesn't see the
1057          * whole mess until the first descriptor in the map is flagged.
1058          */
1059         for (i = ctx.nsegs - 1; i >= 0; --i) {
1060                 j = (ring->cur + i) % NFE_TX_RING_COUNT;
1061                 if (sc->sc_flags & NFE_40BIT_ADDR) {
1062                         desc64 = &ring->desc64[j];
1063                         desc64->flags |= htole16(NFE_TX_VALID);
1064                 } else {
1065                         desc32 = &ring->desc32[j];
1066                         desc32->flags |= htole16(NFE_TX_VALID);
1067                 }
1068         }
1069         ring->cur = (ring->cur + ctx.nsegs) % NFE_TX_RING_COUNT;
1070
1071         /* Exchange DMA map */
1072         data_map->map = data->map;
1073         data->map = map;
1074         data->m = m0;
1075
1076         bus_dmamap_sync(ring->data_tag, map, BUS_DMASYNC_PREWRITE);
1077 back:
1078         if (error)
1079                 m_freem(m0);
1080         return error;
1081 }
1082
1083 static void
1084 nfe_start(struct ifnet *ifp)
1085 {
1086         struct nfe_softc *sc = ifp->if_softc;
1087         struct nfe_tx_ring *ring = &sc->txq;
1088         int count = 0;
1089         struct mbuf *m0;
1090
1091         if (ifp->if_flags & IFF_OACTIVE)
1092                 return;
1093
1094         if (ifq_is_empty(&ifp->if_snd))
1095                 return;
1096
1097         for (;;) {
1098                 m0 = ifq_dequeue(&ifp->if_snd, NULL);
1099                 if (m0 == NULL)
1100                         break;
1101
1102                 BPF_MTAP(ifp, m0);
1103
1104                 if (nfe_encap(sc, ring, m0) != 0) {
1105                         ifp->if_flags |= IFF_OACTIVE;
1106                         break;
1107                 }
1108                 ++count;
1109
1110                 /*
1111                  * NOTE:
1112                  * `m0' may be freed in nfe_encap(), so
1113                  * it should not be touched any more.
1114                  */
1115         }
1116         if (count == 0) /* nothing sent */
1117                 return;
1118
1119         /* Sync TX descriptor ring */
1120         bus_dmamap_sync(ring->tag, ring->map, BUS_DMASYNC_PREWRITE);
1121
1122         /* Kick Tx */
1123         NFE_WRITE(sc, NFE_RXTX_CTL, NFE_RXTX_KICKTX | sc->rxtxctl);
1124
1125         /*
1126          * Set a timeout in case the chip goes out to lunch.
1127          */
1128         ifp->if_timer = 5;
1129 }
1130
1131 static void
1132 nfe_watchdog(struct ifnet *ifp)
1133 {
1134         struct nfe_softc *sc = ifp->if_softc;
1135
1136         if (ifp->if_flags & IFF_RUNNING) {
1137                 if_printf(ifp, "watchdog timeout - lost interrupt recovered\n");
1138                 nfe_txeof(sc);
1139                 return;
1140         }
1141
1142         if_printf(ifp, "watchdog timeout\n");
1143
1144         nfe_init(ifp->if_softc);
1145
1146         ifp->if_oerrors++;
1147
1148         if (!ifq_is_empty(&ifp->if_snd))
1149                 ifp->if_start(ifp);
1150 }
1151
1152 static void
1153 nfe_init(void *xsc)
1154 {
1155         struct nfe_softc *sc = xsc;
1156         struct ifnet *ifp = &sc->arpcom.ac_if;
1157         uint32_t tmp;
1158         int error;
1159
1160         nfe_stop(sc);
1161
1162         error = nfe_init_tx_ring(sc, &sc->txq);
1163         if (error) {
1164                 nfe_stop(sc);
1165                 return;
1166         }
1167
1168         error = nfe_init_rx_ring(sc, &sc->rxq);
1169         if (error) {
1170                 nfe_stop(sc);
1171                 return;
1172         }
1173
1174         NFE_WRITE(sc, NFE_TX_UNK, 0);
1175         NFE_WRITE(sc, NFE_STATUS, 0);
1176
1177         sc->rxtxctl = NFE_RXTX_BIT2;
1178         if (sc->sc_flags & NFE_40BIT_ADDR)
1179                 sc->rxtxctl |= NFE_RXTX_V3MAGIC;
1180         else if (sc->sc_flags & NFE_JUMBO_SUP)
1181                 sc->rxtxctl |= NFE_RXTX_V2MAGIC;
1182 #ifdef NFE_CSUM
1183         if (sc->sc_flags & NFE_HW_CSUM)
1184                 sc->rxtxctl |= NFE_RXTX_RXCSUM;
1185 #endif
1186
1187         /*
1188          * Although the adapter is capable of stripping VLAN tags from received
1189          * frames (NFE_RXTX_VTAG_STRIP), we do not enable this functionality on
1190          * purpose.  This will be done in software by our network stack.
1191          */
1192         if (sc->sc_flags & NFE_HW_VLAN)
1193                 sc->rxtxctl |= NFE_RXTX_VTAG_INSERT;
1194
1195         NFE_WRITE(sc, NFE_RXTX_CTL, NFE_RXTX_RESET | sc->rxtxctl);
1196         DELAY(10);
1197         NFE_WRITE(sc, NFE_RXTX_CTL, sc->rxtxctl);
1198
1199         if (sc->sc_flags & NFE_HW_VLAN)
1200                 NFE_WRITE(sc, NFE_VTAG_CTL, NFE_VTAG_ENABLE);
1201
1202         NFE_WRITE(sc, NFE_SETUP_R6, 0);
1203
1204         /* set MAC address */
1205         nfe_set_macaddr(sc, sc->arpcom.ac_enaddr);
1206
1207         /* tell MAC where rings are in memory */
1208 #ifdef __LP64__
1209         NFE_WRITE(sc, NFE_RX_RING_ADDR_HI, sc->rxq.physaddr >> 32);
1210 #endif
1211         NFE_WRITE(sc, NFE_RX_RING_ADDR_LO, sc->rxq.physaddr & 0xffffffff);
1212 #ifdef __LP64__
1213         NFE_WRITE(sc, NFE_TX_RING_ADDR_HI, sc->txq.physaddr >> 32);
1214 #endif
1215         NFE_WRITE(sc, NFE_TX_RING_ADDR_LO, sc->txq.physaddr & 0xffffffff);
1216
1217         NFE_WRITE(sc, NFE_RING_SIZE,
1218             (NFE_RX_RING_COUNT - 1) << 16 |
1219             (NFE_TX_RING_COUNT - 1));
1220
1221         NFE_WRITE(sc, NFE_RXBUFSZ, sc->rxq.bufsz);
1222
1223         /* force MAC to wakeup */
1224         tmp = NFE_READ(sc, NFE_PWR_STATE);
1225         NFE_WRITE(sc, NFE_PWR_STATE, tmp | NFE_PWR_WAKEUP);
1226         DELAY(10);
1227         tmp = NFE_READ(sc, NFE_PWR_STATE);
1228         NFE_WRITE(sc, NFE_PWR_STATE, tmp | NFE_PWR_VALID);
1229
1230 #if 1
1231         /* configure interrupts coalescing/mitigation */
1232         NFE_WRITE(sc, NFE_IMTIMER, NFE_IM_DEFAULT);
1233 #else
1234         /* no interrupt mitigation: one interrupt per packet */
1235         NFE_WRITE(sc, NFE_IMTIMER, 970);
1236 #endif
1237
1238         NFE_WRITE(sc, NFE_SETUP_R1, NFE_R1_MAGIC);
1239         NFE_WRITE(sc, NFE_SETUP_R2, NFE_R2_MAGIC);
1240         NFE_WRITE(sc, NFE_SETUP_R6, NFE_R6_MAGIC);
1241
1242         /* update MAC knowledge of PHY; generates a NFE_IRQ_LINK interrupt */
1243         NFE_WRITE(sc, NFE_STATUS, sc->mii_phyaddr << 24 | NFE_STATUS_MAGIC);
1244
1245         NFE_WRITE(sc, NFE_SETUP_R4, NFE_R4_MAGIC);
1246         NFE_WRITE(sc, NFE_WOL_CTL, NFE_WOL_MAGIC);
1247
1248         sc->rxtxctl &= ~NFE_RXTX_BIT2;
1249         NFE_WRITE(sc, NFE_RXTX_CTL, sc->rxtxctl);
1250         DELAY(10);
1251         NFE_WRITE(sc, NFE_RXTX_CTL, NFE_RXTX_BIT1 | sc->rxtxctl);
1252
1253         /* set Rx filter */
1254         nfe_setmulti(sc);
1255
1256         nfe_ifmedia_upd(ifp);
1257
1258         /* enable Rx */
1259         NFE_WRITE(sc, NFE_RX_CTL, NFE_RX_START);
1260
1261         /* enable Tx */
1262         NFE_WRITE(sc, NFE_TX_CTL, NFE_TX_START);
1263
1264         NFE_WRITE(sc, NFE_PHY_STATUS, 0xf);
1265
1266 #ifdef DEVICE_POLLING
1267         if ((ifp->if_flags & IFF_POLLING) == 0)
1268 #endif
1269         /* enable interrupts */
1270         NFE_WRITE(sc, NFE_IRQ_MASK, NFE_IRQ_WANTED);
1271
1272         callout_reset(&sc->sc_tick_ch, hz, nfe_tick, sc);
1273
1274         ifp->if_flags |= IFF_RUNNING;
1275         ifp->if_flags &= ~IFF_OACTIVE;
1276 }
1277
1278 static void
1279 nfe_stop(struct nfe_softc *sc)
1280 {
1281         struct ifnet *ifp = &sc->arpcom.ac_if;
1282
1283         callout_stop(&sc->sc_tick_ch);
1284
1285         ifp->if_timer = 0;
1286         ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE);
1287
1288         /* Abort Tx */
1289         NFE_WRITE(sc, NFE_TX_CTL, 0);
1290
1291         /* Disable Rx */
1292         NFE_WRITE(sc, NFE_RX_CTL, 0);
1293
1294         /* Disable interrupts */
1295         NFE_WRITE(sc, NFE_IRQ_MASK, 0);
1296
1297         /* Reset Tx and Rx rings */
1298         nfe_reset_tx_ring(sc, &sc->txq);
1299         nfe_reset_rx_ring(sc, &sc->rxq);
1300 }
1301
1302 static int
1303 nfe_alloc_rx_ring(struct nfe_softc *sc, struct nfe_rx_ring *ring)
1304 {
1305         int i, j, error, descsize;
1306         void **desc;
1307
1308         if (sc->sc_flags & NFE_40BIT_ADDR) {
1309                 desc = (void **)&ring->desc64;
1310                 descsize = sizeof(struct nfe_desc64);
1311         } else {
1312                 desc = (void **)&ring->desc32;
1313                 descsize = sizeof(struct nfe_desc32);
1314         }
1315
1316         ring->bufsz = MCLBYTES;
1317         ring->cur = ring->next = 0;
1318
1319         error = bus_dma_tag_create(NULL, PAGE_SIZE, 0,
1320                                    BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR,
1321                                    NULL, NULL,
1322                                    NFE_RX_RING_COUNT * descsize, 1,
1323                                    NFE_RX_RING_COUNT * descsize,
1324                                    0, &ring->tag);
1325         if (error) {
1326                 if_printf(&sc->arpcom.ac_if,
1327                           "could not create desc RX DMA tag\n");
1328                 return error;
1329         }
1330
1331         error = bus_dmamem_alloc(ring->tag, desc, BUS_DMA_WAITOK | BUS_DMA_ZERO,
1332                                  &ring->map);
1333         if (error) {
1334                 if_printf(&sc->arpcom.ac_if,
1335                           "could not allocate RX desc DMA memory\n");
1336                 bus_dma_tag_destroy(ring->tag);
1337                 ring->tag = NULL;
1338                 return error;
1339         }
1340
1341         error = bus_dmamap_load(ring->tag, ring->map, *desc,
1342                                 NFE_RX_RING_COUNT * descsize,
1343                                 nfe_ring_dma_addr, &ring->physaddr,
1344                                 BUS_DMA_WAITOK);
1345         if (error) {
1346                 if_printf(&sc->arpcom.ac_if,
1347                           "could not load RX desc DMA map\n");
1348                 bus_dmamem_free(ring->tag, *desc, ring->map);
1349                 bus_dma_tag_destroy(ring->tag);
1350                 ring->tag = NULL;
1351                 return error;
1352         }
1353
1354         if (sc->sc_flags & NFE_USE_JUMBO) {
1355                 ring->bufsz = NFE_JBYTES;
1356
1357                 error = nfe_jpool_alloc(sc, ring);
1358                 if (error) {
1359                         if_printf(&sc->arpcom.ac_if,
1360                                   "could not allocate jumbo frames\n");
1361                         return error;
1362                 }
1363         }
1364
1365         error = bus_dma_tag_create(NULL, 1, 0,
1366                                    BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR,
1367                                    NULL, NULL,
1368                                    MCLBYTES, 1, MCLBYTES,
1369                                    0, &ring->data_tag);
1370         if (error) {
1371                 if_printf(&sc->arpcom.ac_if,
1372                           "could not create RX mbuf DMA tag\n");
1373                 return error;
1374         }
1375
1376         /* Create a spare RX mbuf DMA map */
1377         error = bus_dmamap_create(ring->data_tag, 0, &ring->data_tmpmap);
1378         if (error) {
1379                 if_printf(&sc->arpcom.ac_if,
1380                           "could not create spare RX mbuf DMA map\n");
1381                 bus_dma_tag_destroy(ring->data_tag);
1382                 ring->data_tag = NULL;
1383                 return error;
1384         }
1385
1386         for (i = 0; i < NFE_RX_RING_COUNT; i++) {
1387                 error = bus_dmamap_create(ring->data_tag, 0,
1388                                           &ring->data[i].map);
1389                 if (error) {
1390                         if_printf(&sc->arpcom.ac_if,
1391                                   "could not create %dth RX mbuf DMA mapn", i);
1392                         goto fail;
1393                 }
1394         }
1395         return 0;
1396 fail:
1397         for (j = 0; j < i; ++j)
1398                 bus_dmamap_destroy(ring->data_tag, ring->data[i].map);
1399         bus_dmamap_destroy(ring->data_tag, ring->data_tmpmap);
1400         bus_dma_tag_destroy(ring->data_tag);
1401         ring->data_tag = NULL;
1402         return error;
1403 }
1404
1405 static void
1406 nfe_reset_rx_ring(struct nfe_softc *sc, struct nfe_rx_ring *ring)
1407 {
1408         int i;
1409
1410         for (i = 0; i < NFE_RX_RING_COUNT; i++) {
1411                 struct nfe_rx_data *data = &ring->data[i];
1412
1413                 if (data->m != NULL) {
1414                         bus_dmamap_unload(ring->data_tag, data->map);
1415                         m_freem(data->m);
1416                         data->m = NULL;
1417                 }
1418         }
1419         bus_dmamap_sync(ring->tag, ring->map, BUS_DMASYNC_PREWRITE);
1420
1421         ring->cur = ring->next = 0;
1422 }
1423
1424 static int
1425 nfe_init_rx_ring(struct nfe_softc *sc, struct nfe_rx_ring *ring)
1426 {
1427         int i;
1428
1429         for (i = 0; i < NFE_RX_RING_COUNT; ++i) {
1430                 int error;
1431
1432                 /* XXX should use a function pointer */
1433                 if (sc->sc_flags & NFE_USE_JUMBO)
1434                         error = nfe_newbuf_jumbo(sc, ring, i, 1);
1435                 else
1436                         error = nfe_newbuf_std(sc, ring, i, 1);
1437                 if (error) {
1438                         if_printf(&sc->arpcom.ac_if,
1439                                   "could not allocate RX buffer\n");
1440                         return error;
1441                 }
1442
1443                 nfe_set_ready_rxdesc(sc, ring, i);
1444         }
1445         bus_dmamap_sync(ring->tag, ring->map, BUS_DMASYNC_PREWRITE);
1446
1447         return 0;
1448 }
1449
1450 static void
1451 nfe_free_rx_ring(struct nfe_softc *sc, struct nfe_rx_ring *ring)
1452 {
1453         if (ring->data_tag != NULL) {
1454                 struct nfe_rx_data *data;
1455                 int i;
1456
1457                 for (i = 0; i < NFE_RX_RING_COUNT; i++) {
1458                         data = &ring->data[i];
1459
1460                         if (data->m != NULL) {
1461                                 bus_dmamap_unload(ring->data_tag, data->map);
1462                                 m_freem(data->m);
1463                         }
1464                         bus_dmamap_destroy(ring->data_tag, data->map);
1465                 }
1466                 bus_dmamap_destroy(ring->data_tag, ring->data_tmpmap);
1467                 bus_dma_tag_destroy(ring->data_tag);
1468         }
1469
1470         nfe_jpool_free(sc, ring);
1471
1472         if (ring->tag != NULL) {
1473                 void *desc;
1474
1475                 if (sc->sc_flags & NFE_40BIT_ADDR)
1476                         desc = ring->desc64;
1477                 else
1478                         desc = ring->desc32;
1479
1480                 bus_dmamap_unload(ring->tag, ring->map);
1481                 bus_dmamem_free(ring->tag, desc, ring->map);
1482                 bus_dma_tag_destroy(ring->tag);
1483         }
1484 }
1485
1486 static struct nfe_jbuf *
1487 nfe_jalloc(struct nfe_softc *sc)
1488 {
1489         struct ifnet *ifp = &sc->arpcom.ac_if;
1490         struct nfe_jbuf *jbuf;
1491
1492         lwkt_serialize_enter(&sc->sc_jbuf_serializer);
1493
1494         jbuf = SLIST_FIRST(&sc->rxq.jfreelist);
1495         if (jbuf != NULL) {
1496                 SLIST_REMOVE_HEAD(&sc->rxq.jfreelist, jnext);
1497                 jbuf->inuse = 1;
1498         } else {
1499                 if_printf(ifp, "no free jumbo buffer\n");
1500         }
1501
1502         lwkt_serialize_exit(&sc->sc_jbuf_serializer);
1503
1504         return jbuf;
1505 }
1506
1507 static void
1508 nfe_jfree(void *arg)
1509 {
1510         struct nfe_jbuf *jbuf = arg;
1511         struct nfe_softc *sc = jbuf->sc;
1512         struct nfe_rx_ring *ring = jbuf->ring;
1513
1514         if (&ring->jbuf[jbuf->slot] != jbuf)
1515                 panic("%s: free wrong jumbo buffer\n", __func__);
1516         else if (jbuf->inuse == 0)
1517                 panic("%s: jumbo buffer already freed\n", __func__);
1518
1519         lwkt_serialize_enter(&sc->sc_jbuf_serializer);
1520         atomic_subtract_int(&jbuf->inuse, 1);
1521         if (jbuf->inuse == 0)
1522                 SLIST_INSERT_HEAD(&ring->jfreelist, jbuf, jnext);
1523         lwkt_serialize_exit(&sc->sc_jbuf_serializer);
1524 }
1525
1526 static void
1527 nfe_jref(void *arg)
1528 {
1529         struct nfe_jbuf *jbuf = arg;
1530         struct nfe_rx_ring *ring = jbuf->ring;
1531
1532         if (&ring->jbuf[jbuf->slot] != jbuf)
1533                 panic("%s: ref wrong jumbo buffer\n", __func__);
1534         else if (jbuf->inuse == 0)
1535                 panic("%s: jumbo buffer already freed\n", __func__);
1536
1537         atomic_subtract_int(&jbuf->inuse, 1);
1538 }
1539
1540 static int
1541 nfe_jpool_alloc(struct nfe_softc *sc, struct nfe_rx_ring *ring)
1542 {
1543         struct nfe_jbuf *jbuf;
1544         bus_addr_t physaddr;
1545         caddr_t buf;
1546         int i, error;
1547
1548         /*
1549          * Allocate a big chunk of DMA'able memory.
1550          */
1551         error = bus_dma_tag_create(NULL, PAGE_SIZE, 0,
1552                                    BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR,
1553                                    NULL, NULL,
1554                                    NFE_JPOOL_SIZE, 1, NFE_JPOOL_SIZE,
1555                                    0, &ring->jtag);
1556         if (error) {
1557                 if_printf(&sc->arpcom.ac_if,
1558                           "could not create jumbo DMA tag\n");
1559                 return error;
1560         }
1561
1562         error = bus_dmamem_alloc(ring->jtag, (void **)&ring->jpool,
1563                                  BUS_DMA_WAITOK, &ring->jmap);
1564         if (error) {
1565                 if_printf(&sc->arpcom.ac_if,
1566                           "could not allocate jumbo DMA memory\n");
1567                 bus_dma_tag_destroy(ring->jtag);
1568                 ring->jtag = NULL;
1569                 return error;
1570         }
1571
1572         error = bus_dmamap_load(ring->jtag, ring->jmap, ring->jpool,
1573                                 NFE_JPOOL_SIZE, nfe_ring_dma_addr, &physaddr,
1574                                 BUS_DMA_WAITOK);
1575         if (error) {
1576                 if_printf(&sc->arpcom.ac_if,
1577                           "could not load jumbo DMA map\n");
1578                 bus_dmamem_free(ring->jtag, ring->jpool, ring->jmap);
1579                 bus_dma_tag_destroy(ring->jtag);
1580                 ring->jtag = NULL;
1581                 return error;
1582         }
1583
1584         /* ..and split it into 9KB chunks */
1585         SLIST_INIT(&ring->jfreelist);
1586
1587         buf = ring->jpool;
1588         for (i = 0; i < NFE_JPOOL_COUNT; i++) {
1589                 jbuf = &ring->jbuf[i];
1590
1591                 jbuf->sc = sc;
1592                 jbuf->ring = ring;
1593                 jbuf->inuse = 0;
1594                 jbuf->slot = i;
1595                 jbuf->buf = buf;
1596                 jbuf->physaddr = physaddr;
1597
1598                 SLIST_INSERT_HEAD(&ring->jfreelist, jbuf, jnext);
1599
1600                 buf += NFE_JBYTES;
1601                 physaddr += NFE_JBYTES;
1602         }
1603
1604         return 0;
1605 }
1606
1607 static void
1608 nfe_jpool_free(struct nfe_softc *sc, struct nfe_rx_ring *ring)
1609 {
1610         if (ring->jtag != NULL) {
1611                 bus_dmamap_unload(ring->jtag, ring->jmap);
1612                 bus_dmamem_free(ring->jtag, ring->jpool, ring->jmap);
1613                 bus_dma_tag_destroy(ring->jtag);
1614         }
1615 }
1616
1617 static int
1618 nfe_alloc_tx_ring(struct nfe_softc *sc, struct nfe_tx_ring *ring)
1619 {
1620         int i, j, error, descsize;
1621         void **desc;
1622
1623         if (sc->sc_flags & NFE_40BIT_ADDR) {
1624                 desc = (void **)&ring->desc64;
1625                 descsize = sizeof(struct nfe_desc64);
1626         } else {
1627                 desc = (void **)&ring->desc32;
1628                 descsize = sizeof(struct nfe_desc32);
1629         }
1630
1631         ring->queued = 0;
1632         ring->cur = ring->next = 0;
1633
1634         error = bus_dma_tag_create(NULL, PAGE_SIZE, 0,
1635                                    BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR,
1636                                    NULL, NULL,
1637                                    NFE_TX_RING_COUNT * descsize, 1,
1638                                    NFE_TX_RING_COUNT * descsize,
1639                                    0, &ring->tag);
1640         if (error) {
1641                 if_printf(&sc->arpcom.ac_if,
1642                           "could not create TX desc DMA map\n");
1643                 return error;
1644         }
1645
1646         error = bus_dmamem_alloc(ring->tag, desc, BUS_DMA_WAITOK | BUS_DMA_ZERO,
1647                                  &ring->map);
1648         if (error) {
1649                 if_printf(&sc->arpcom.ac_if,
1650                           "could not allocate TX desc DMA memory\n");
1651                 bus_dma_tag_destroy(ring->tag);
1652                 ring->tag = NULL;
1653                 return error;
1654         }
1655
1656         error = bus_dmamap_load(ring->tag, ring->map, *desc,
1657                                 NFE_TX_RING_COUNT * descsize,
1658                                 nfe_ring_dma_addr, &ring->physaddr,
1659                                 BUS_DMA_WAITOK);
1660         if (error) {
1661                 if_printf(&sc->arpcom.ac_if,
1662                           "could not load TX desc DMA map\n");
1663                 bus_dmamem_free(ring->tag, *desc, ring->map);
1664                 bus_dma_tag_destroy(ring->tag);
1665                 ring->tag = NULL;
1666                 return error;
1667         }
1668
1669         error = bus_dma_tag_create(NULL, PAGE_SIZE, 0,
1670                                    BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR,
1671                                    NULL, NULL,
1672                                    NFE_JBYTES * NFE_MAX_SCATTER,
1673                                    NFE_MAX_SCATTER, NFE_JBYTES,
1674                                    0, &ring->data_tag);
1675         if (error) {
1676                 if_printf(&sc->arpcom.ac_if,
1677                           "could not create TX buf DMA tag\n");
1678                 return error;
1679         }
1680
1681         for (i = 0; i < NFE_TX_RING_COUNT; i++) {
1682                 error = bus_dmamap_create(ring->data_tag, 0,
1683                                           &ring->data[i].map);
1684                 if (error) {
1685                         if_printf(&sc->arpcom.ac_if,
1686                                   "could not create %dth TX buf DMA map\n", i);
1687                         goto fail;
1688                 }
1689         }
1690
1691         return 0;
1692 fail:
1693         for (j = 0; j < i; ++j)
1694                 bus_dmamap_destroy(ring->data_tag, ring->data[i].map);
1695         bus_dma_tag_destroy(ring->data_tag);
1696         ring->data_tag = NULL;
1697         return error;
1698 }
1699
1700 static void
1701 nfe_reset_tx_ring(struct nfe_softc *sc, struct nfe_tx_ring *ring)
1702 {
1703         int i;
1704
1705         for (i = 0; i < NFE_TX_RING_COUNT; i++) {
1706                 struct nfe_tx_data *data = &ring->data[i];
1707
1708                 if (sc->sc_flags & NFE_40BIT_ADDR)
1709                         ring->desc64[i].flags = 0;
1710                 else
1711                         ring->desc32[i].flags = 0;
1712
1713                 if (data->m != NULL) {
1714                         bus_dmamap_sync(ring->data_tag, data->map,
1715                                         BUS_DMASYNC_POSTWRITE);
1716                         bus_dmamap_unload(ring->data_tag, data->map);
1717                         m_freem(data->m);
1718                         data->m = NULL;
1719                 }
1720         }
1721         bus_dmamap_sync(ring->tag, ring->map, BUS_DMASYNC_PREWRITE);
1722
1723         ring->queued = 0;
1724         ring->cur = ring->next = 0;
1725 }
1726
1727 static int
1728 nfe_init_tx_ring(struct nfe_softc *sc __unused,
1729                  struct nfe_tx_ring *ring __unused)
1730 {
1731         return 0;
1732 }
1733
1734 static void
1735 nfe_free_tx_ring(struct nfe_softc *sc, struct nfe_tx_ring *ring)
1736 {
1737         if (ring->data_tag != NULL) {
1738                 struct nfe_tx_data *data;
1739                 int i;
1740
1741                 for (i = 0; i < NFE_TX_RING_COUNT; ++i) {
1742                         data = &ring->data[i];
1743
1744                         if (data->m != NULL) {
1745                                 bus_dmamap_unload(ring->data_tag, data->map);
1746                                 m_freem(data->m);
1747                         }
1748                         bus_dmamap_destroy(ring->data_tag, data->map);
1749                 }
1750
1751                 bus_dma_tag_destroy(ring->data_tag);
1752         }
1753
1754         if (ring->tag != NULL) {
1755                 void *desc;
1756
1757                 if (sc->sc_flags & NFE_40BIT_ADDR)
1758                         desc = ring->desc64;
1759                 else
1760                         desc = ring->desc32;
1761
1762                 bus_dmamap_unload(ring->tag, ring->map);
1763                 bus_dmamem_free(ring->tag, desc, ring->map);
1764                 bus_dma_tag_destroy(ring->tag);
1765         }
1766 }
1767
1768 static int
1769 nfe_ifmedia_upd(struct ifnet *ifp)
1770 {
1771         struct nfe_softc *sc = ifp->if_softc;
1772         struct mii_data *mii = device_get_softc(sc->sc_miibus);
1773
1774         if (mii->mii_instance != 0) {
1775                 struct mii_softc *miisc;
1776
1777                 LIST_FOREACH(miisc, &mii->mii_phys, mii_list)
1778                         mii_phy_reset(miisc);
1779         }
1780         mii_mediachg(mii);
1781
1782         return 0;
1783 }
1784
1785 static void
1786 nfe_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr)
1787 {
1788         struct nfe_softc *sc = ifp->if_softc;
1789         struct mii_data *mii = device_get_softc(sc->sc_miibus);
1790
1791         mii_pollstat(mii);
1792         ifmr->ifm_status = mii->mii_media_status;
1793         ifmr->ifm_active = mii->mii_media_active;
1794 }
1795
1796 static void
1797 nfe_setmulti(struct nfe_softc *sc)
1798 {
1799         struct ifnet *ifp = &sc->arpcom.ac_if;
1800         struct ifmultiaddr *ifma;
1801         uint8_t addr[ETHER_ADDR_LEN], mask[ETHER_ADDR_LEN];
1802         uint32_t filter = NFE_RXFILTER_MAGIC;
1803         int i;
1804
1805         if ((ifp->if_flags & (IFF_ALLMULTI | IFF_PROMISC)) != 0) {
1806                 bzero(addr, ETHER_ADDR_LEN);
1807                 bzero(mask, ETHER_ADDR_LEN);
1808                 goto done;
1809         }
1810
1811         bcopy(etherbroadcastaddr, addr, ETHER_ADDR_LEN);
1812         bcopy(etherbroadcastaddr, mask, ETHER_ADDR_LEN);
1813
1814         LIST_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) {
1815                 caddr_t maddr;
1816
1817                 if (ifma->ifma_addr->sa_family != AF_LINK)
1818                         continue;
1819
1820                 maddr = LLADDR((struct sockaddr_dl *)ifma->ifma_addr);
1821                 for (i = 0; i < ETHER_ADDR_LEN; i++) {
1822                         addr[i] &= maddr[i];
1823                         mask[i] &= ~maddr[i];
1824                 }
1825         }
1826
1827         for (i = 0; i < ETHER_ADDR_LEN; i++)
1828                 mask[i] |= addr[i];
1829
1830 done:
1831         addr[0] |= 0x01;        /* make sure multicast bit is set */
1832
1833         NFE_WRITE(sc, NFE_MULTIADDR_HI,
1834             addr[3] << 24 | addr[2] << 16 | addr[1] << 8 | addr[0]);
1835         NFE_WRITE(sc, NFE_MULTIADDR_LO,
1836             addr[5] <<  8 | addr[4]);
1837         NFE_WRITE(sc, NFE_MULTIMASK_HI,
1838             mask[3] << 24 | mask[2] << 16 | mask[1] << 8 | mask[0]);
1839         NFE_WRITE(sc, NFE_MULTIMASK_LO,
1840             mask[5] <<  8 | mask[4]);
1841
1842         filter |= (ifp->if_flags & IFF_PROMISC) ? NFE_PROMISC : NFE_U2M;
1843         NFE_WRITE(sc, NFE_RXFILTER, filter);
1844 }
1845
1846 static void
1847 nfe_get_macaddr(struct nfe_softc *sc, uint8_t *addr)
1848 {
1849         uint32_t tmp;
1850
1851         tmp = NFE_READ(sc, NFE_MACADDR_LO);
1852         addr[0] = (tmp >> 8) & 0xff;
1853         addr[1] = (tmp & 0xff);
1854
1855         tmp = NFE_READ(sc, NFE_MACADDR_HI);
1856         addr[2] = (tmp >> 24) & 0xff;
1857         addr[3] = (tmp >> 16) & 0xff;
1858         addr[4] = (tmp >>  8) & 0xff;
1859         addr[5] = (tmp & 0xff);
1860 }
1861
1862 static void
1863 nfe_set_macaddr(struct nfe_softc *sc, const uint8_t *addr)
1864 {
1865         NFE_WRITE(sc, NFE_MACADDR_LO,
1866             addr[5] <<  8 | addr[4]);
1867         NFE_WRITE(sc, NFE_MACADDR_HI,
1868             addr[3] << 24 | addr[2] << 16 | addr[1] << 8 | addr[0]);
1869 }
1870
1871 static void
1872 nfe_tick(void *arg)
1873 {
1874         struct nfe_softc *sc = arg;
1875         struct ifnet *ifp = &sc->arpcom.ac_if;
1876         struct mii_data *mii = device_get_softc(sc->sc_miibus);
1877
1878         lwkt_serialize_enter(ifp->if_serializer);
1879
1880         mii_tick(mii);
1881         callout_reset(&sc->sc_tick_ch, hz, nfe_tick, sc);
1882
1883         lwkt_serialize_exit(ifp->if_serializer);
1884 }
1885
1886 static void
1887 nfe_ring_dma_addr(void *arg, bus_dma_segment_t *seg, int nseg, int error)
1888 {
1889         if (error)
1890                 return;
1891
1892         KASSERT(nseg == 1, ("too many segments, should be 1\n"));
1893
1894         *((uint32_t *)arg) = seg->ds_addr;
1895 }
1896
1897 static void
1898 nfe_buf_dma_addr(void *arg, bus_dma_segment_t *segs, int nsegs,
1899                  bus_size_t mapsz __unused, int error)
1900 {
1901         struct nfe_dma_ctx *ctx = arg;
1902         int i;
1903
1904         if (error)
1905                 return;
1906
1907         KASSERT(nsegs <= ctx->nsegs,
1908                 ("too many segments(%d), should be <= %d\n",
1909                  nsegs, ctx->nsegs));
1910
1911         ctx->nsegs = nsegs;
1912         for (i = 0; i < nsegs; ++i)
1913                 ctx->segs[i] = segs[i];
1914 }
1915
1916 static int
1917 nfe_newbuf_std(struct nfe_softc *sc, struct nfe_rx_ring *ring, int idx,
1918                int wait)
1919 {
1920         struct nfe_rx_data *data = &ring->data[idx];
1921         struct nfe_dma_ctx ctx;
1922         bus_dma_segment_t seg;
1923         bus_dmamap_t map;
1924         struct mbuf *m;
1925         int error;
1926
1927         m = m_getcl(wait ? MB_WAIT : MB_DONTWAIT, MT_DATA, M_PKTHDR);
1928         if (m == NULL)
1929                 return ENOBUFS;
1930         m->m_len = m->m_pkthdr.len = MCLBYTES;
1931
1932         ctx.nsegs = 1;
1933         ctx.segs = &seg;
1934         error = bus_dmamap_load_mbuf(ring->data_tag, ring->data_tmpmap,
1935                                      m, nfe_buf_dma_addr, &ctx,
1936                                      wait ? BUS_DMA_WAITOK : BUS_DMA_NOWAIT);
1937         if (error) {
1938                 m_freem(m);
1939                 if_printf(&sc->arpcom.ac_if, "could map RX mbuf %d\n", error);
1940                 return error;
1941         }
1942
1943         /* Unload originally mapped mbuf */
1944         bus_dmamap_unload(ring->data_tag, data->map);
1945
1946         /* Swap this DMA map with tmp DMA map */
1947         map = data->map;
1948         data->map = ring->data_tmpmap;
1949         ring->data_tmpmap = map;
1950
1951         /* Caller is assumed to have collected the old mbuf */
1952         data->m = m;
1953
1954         nfe_set_paddr_rxdesc(sc, ring, idx, seg.ds_addr);
1955
1956         bus_dmamap_sync(ring->data_tag, data->map, BUS_DMASYNC_PREREAD);
1957         return 0;
1958 }
1959
1960 static int
1961 nfe_newbuf_jumbo(struct nfe_softc *sc, struct nfe_rx_ring *ring, int idx,
1962                  int wait)
1963 {
1964         struct nfe_rx_data *data = &ring->data[idx];
1965         struct nfe_jbuf *jbuf;
1966         struct mbuf *m;
1967
1968         MGETHDR(m, wait ? MB_WAIT : MB_DONTWAIT, MT_DATA);
1969         if (m == NULL)
1970                 return ENOBUFS;
1971
1972         jbuf = nfe_jalloc(sc);
1973         if (jbuf == NULL) {
1974                 m_freem(m);
1975                 if_printf(&sc->arpcom.ac_if, "jumbo allocation failed "
1976                     "-- packet dropped!\n");
1977                 return ENOBUFS;
1978         }
1979
1980         m->m_ext.ext_arg = jbuf;
1981         m->m_ext.ext_buf = jbuf->buf;
1982         m->m_ext.ext_free = nfe_jfree;
1983         m->m_ext.ext_ref = nfe_jref;
1984         m->m_ext.ext_size = NFE_JBYTES;
1985
1986         m->m_data = m->m_ext.ext_buf;
1987         m->m_flags |= M_EXT;
1988         m->m_len = m->m_pkthdr.len = m->m_ext.ext_size;
1989
1990         /* Caller is assumed to have collected the old mbuf */
1991         data->m = m;
1992
1993         nfe_set_paddr_rxdesc(sc, ring, idx, jbuf->physaddr);
1994
1995         bus_dmamap_sync(ring->jtag, ring->jmap, BUS_DMASYNC_PREREAD);
1996         return 0;
1997 }
1998
1999 static void
2000 nfe_set_paddr_rxdesc(struct nfe_softc *sc, struct nfe_rx_ring *ring, int idx,
2001                      bus_addr_t physaddr)
2002 {
2003         if (sc->sc_flags & NFE_40BIT_ADDR) {
2004                 struct nfe_desc64 *desc64 = &ring->desc64[idx];
2005
2006 #if defined(__LP64__)
2007                 desc64->physaddr[0] = htole32(physaddr >> 32);
2008 #endif
2009                 desc64->physaddr[1] = htole32(physaddr & 0xffffffff);
2010         } else {
2011                 struct nfe_desc32 *desc32 = &ring->desc32[idx];
2012
2013                 desc32->physaddr = htole32(physaddr);
2014         }
2015 }
2016
2017 static void
2018 nfe_set_ready_rxdesc(struct nfe_softc *sc, struct nfe_rx_ring *ring, int idx)
2019 {
2020         if (sc->sc_flags & NFE_40BIT_ADDR) {
2021                 struct nfe_desc64 *desc64 = &ring->desc64[idx];
2022
2023                 desc64->length = htole16(ring->bufsz);
2024                 desc64->flags = htole16(NFE_RX_READY);
2025         } else {
2026                 struct nfe_desc32 *desc32 = &ring->desc32[idx];
2027
2028                 desc32->length = htole16(ring->bufsz);
2029                 desc32->flags = htole16(NFE_RX_READY);
2030         }
2031 }