1 /* i386.c -- Assemble code for the Intel 80386
2 Copyright (C) 1989, 1991, 1992 Free Software Foundation.
4 This file is part of GAS, the GNU Assembler.
6 GAS is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GAS is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GAS; see the file COPYING. If not, write to
18 the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
21 Intel 80386 machine specific gas.
22 Written by Eliot Dresselhaus (eliot@mgm.mit.edu).
23 Bugs & suggestions are completely welcome. This is free software.
24 Please help us make it better.
28 * $FreeBSD: src/gnu/usr.bin/as/config/tc-i386.c,v 1.10 1999/08/27 23:34:29 peter Exp $
29 * $DragonFly: src/gnu/usr.bin/as/config/Attic/tc-i386.c,v 1.2 2003/06/17 04:25:44 dillon Exp $
34 #include "opcode/i386.h"
36 /* 'md_assemble ()' gathers together information and puts it into a
40 /* TM holds the template for the insn were currently assembling. */
42 /* SUFFIX holds the opcode suffix (e.g. 'l' for 'movl') if given. */
44 /* Operands are coded with OPERANDS, TYPES, DISPS, IMMS, and REGS. */
46 /* OPERANDS gives the number of given operands. */
47 unsigned int operands;
49 /* REG_OPERANDS, DISP_OPERANDS, MEM_OPERANDS, IMM_OPERANDS give the number of
50 given register, displacement, memory operands and immediate operands. */
51 unsigned int reg_operands, disp_operands, mem_operands, imm_operands;
53 /* TYPES [i] is the type (see above #defines) which tells us how to
54 search through DISPS [i] & IMMS [i] & REGS [i] for the required
56 unsigned int types[MAX_OPERANDS];
58 /* Displacements (if given) for each operand. */
59 expressionS *disps[MAX_OPERANDS];
62 /* Relocation type for operand */
63 enum reloc_type disp_reloc[MAX_OPERANDS];
66 /* Immediate operands (if given) for each operand. */
67 expressionS *imms[MAX_OPERANDS];
69 /* Register operands (if given) for each operand. */
70 reg_entry *regs[MAX_OPERANDS];
72 /* BASE_REG, INDEX_REG, and LOG2_SCALE_FACTOR are used to encode
73 the base index byte below. */
76 unsigned int log2_scale_factor;
78 /* SEG gives the seg_entry of this insn. It is equal to zero unless
79 an explicit segment override is given. */
80 const seg_entry *seg; /* segment for memory operands (if given) */
82 /* PREFIX holds all the given prefix opcodes (usually null).
83 PREFIXES is the size of PREFIX. */
84 /* richfix: really unsigned? */
85 unsigned char prefix[MAX_PREFIXES];
86 unsigned int prefixes;
88 /* RM and IB are the modrm byte and the base index byte where the addressing
89 modes of this insn are encoded. */
96 /* This array holds the chars that always start a comment. If the
97 pre-processor is disabled, these aren't very useful */
98 const char comment_chars[] = "#";
100 /* This array holds the chars that only start a comment at the beginning of
101 a line. If the line seems to have the form '# 123 filename'
102 .line and .file directives will appear in the pre-processed output */
103 /* Note that input_file.c hand checks for '#' at the beginning of the
104 first line of the input file. This is because the compiler outputs
105 #NO_APP at the beginning of its output. */
106 /* Also note that comments started like this one will always work if
107 '/' isn't otherwise defined. */
108 const char line_comment_chars[] = "#/"; /* removed '#' xoxorich. */
110 /* Chars that can be used to separate mant from exp in floating point nums */
111 const char EXP_CHARS[] = "eE";
113 /* Chars that mean this number is a floating point constant */
116 const char FLT_CHARS[] = "fFdDxX";
118 /* tables for lexical analysis */
119 static char opcode_chars[256];
120 static char register_chars[256];
121 static char operand_chars[256];
122 static char space_chars[256];
123 static char identifier_chars[256];
124 static char digit_chars[256];
127 #define is_opcode_char(x) (opcode_chars[(unsigned char) x])
128 #define is_operand_char(x) (operand_chars[(unsigned char) x])
129 #define is_register_char(x) (register_chars[(unsigned char) x])
130 #define is_space_char(x) (space_chars[(unsigned char) x])
131 #define is_identifier_char(x) (identifier_chars[(unsigned char) x])
132 #define is_digit_char(x) (digit_chars[(unsigned char) x])
134 /* put here all non-digit non-letter charcters that may occur in an operand */
135 static char operand_special_chars[] = "%$-+(,)*._~/<>|&^!:";
137 static char *ordinal_names[] = { "first", "second", "third" }; /* for printfs */
139 /* md_assemble() always leaves the strings it's passed unaltered. To
140 effect this we maintain a stack of saved characters that we've smashed
141 with '\0's (indicating end of strings for various sub-fields of the
142 assembler instruction). */
143 static char save_stack[32];
144 static char *save_stack_p; /* stack pointer */
145 #define END_STRING_AND_SAVE(s) *save_stack_p++ = *s; *s = '\0'
146 #define RESTORE_END_STRING(s) *s = *--save_stack_p
148 /* The instruction we're assembling. */
151 /* Per instruction expressionS buffers: 2 displacements & 2 immediate max. */
152 static expressionS disp_expressions[2], im_expressions[2];
154 /* pointers to ebp & esp entries in reg_hash hash table */
155 static reg_entry *ebp, *esp;
157 static int this_operand; /* current operand we are working on */
160 Interface to relax_segment.
161 There are 2 relax states for 386 jump insns: one for conditional & one
162 for unconditional jumps. This is because the these two types of jumps
163 add different sizes to frags when we're figuring out what sort of jump
164 to choose to reach a given label. */
167 #define COND_JUMP 1 /* conditional jump */
168 #define UNCOND_JUMP 2 /* unconditional jump */
173 #define UNKNOWN_SIZE 3
175 #define ENCODE_RELAX_STATE(type,size) ((type<<2) | (size))
176 #define SIZE_FROM_RELAX_STATE(s) \
177 ( (((s) & 0x3) == BYTE ? 1 : (((s) & 0x3) == WORD ? 2 : 4)) )
179 const relax_typeS md_relax_table[] = {
182 1) most positive reach of this state,
183 2) most negative reach of this state,
184 3) how many bytes this mode will add to the size of the current frag
185 4) which index into the table to try if we can't fit into this one.
192 /* For now we don't use word displacement jumps: they may be
194 {127+1, -128+1, 0, ENCODE_RELAX_STATE(COND_JUMP,DWORD) },
195 /* word conditionals add 3 bytes to frag:
196 2 opcode prefix; 1 displacement bytes */
197 {32767+2, -32768+2, 3, ENCODE_RELAX_STATE(COND_JUMP,DWORD) },
198 /* dword conditionals adds 4 bytes to frag:
199 1 opcode prefix; 3 displacement bytes */
203 {127+1, -128+1, 0, ENCODE_RELAX_STATE(UNCOND_JUMP,DWORD) },
204 /* word jmp adds 2 bytes to frag:
205 1 opcode prefix; 1 displacement bytes */
206 {32767+2, -32768+2, 2, ENCODE_RELAX_STATE(UNCOND_JUMP,DWORD) },
207 /* dword jmp adds 3 bytes to frag:
208 0 opcode prefix; 3 displacement bytes */
216 static char *output_invalid(int c);
217 static int fits_in_signed_byte(long num);
218 static int fits_in_signed_word(long num);
219 static int fits_in_unsigned_byte(long num);
220 static int fits_in_unsigned_word(long num);
221 static int i386_operand(char *operand_string);
222 static int smallest_imm_type(long num);
223 static reg_entry *parse_register(char *reg_string);
224 static unsigned long mode_from_disp_size(unsigned long t);
225 static unsigned long opcode_suffix_to_type(unsigned long s);
226 static void s_bss(void);
228 #else /* not __STDC__ */
230 static char *output_invalid();
231 static int fits_in_signed_byte();
232 static int fits_in_signed_word();
233 static int fits_in_unsigned_byte();
234 static int fits_in_unsigned_word();
235 static int i386_operand();
236 static int smallest_imm_type();
237 static reg_entry *parse_register();
238 static unsigned long mode_from_disp_size();
239 static unsigned long opcode_suffix_to_type();
242 #endif /* not __STDC__ */
245 /* Ignore certain directives generated by gcc. This probably should
249 while (*input_line_pointer && *input_line_pointer != '\n')
250 input_line_pointer++;
253 const pseudo_typeS md_pseudo_table[] = {
257 { "align", s_align_bytes, 0 },
259 { "align", s_align_ptwo, 0 },
262 { "ffloat", float_cons, 'f' },
263 { "dfloat", float_cons, 'd' },
264 { "tfloat", float_cons, 'x' },
265 { "value", cons, 2 },
269 /* for interface with expression () */
270 extern char * input_line_pointer;
272 /* obstack for constructing various things in md_begin */
275 /* hash table for opcode lookup */
276 static struct hash_control *op_hash = (struct hash_control *) 0;
277 /* hash table for register lookup */
278 static struct hash_control *reg_hash = (struct hash_control *) 0;
279 /* hash table for prefix lookup */
280 static struct hash_control *prefix_hash = (struct hash_control *) 0;
287 obstack_begin (&o,4096);
289 /* initialize op_hash hash table */
290 op_hash = hash_new(); /* xmalloc handles error */
293 register const template *optab;
294 register templates *core_optab;
297 optab = i386_optab; /* setup for loop */
298 prev_name = optab->name;
299 obstack_grow (&o, optab, sizeof(template));
300 core_optab = (templates *) xmalloc (sizeof (templates));
302 for (optab++; optab < i386_optab_end; optab++) {
303 if (! strcmp (optab->name, prev_name)) {
304 /* same name as before --> append to current template list */
305 obstack_grow (&o, optab, sizeof(template));
307 /* different name --> ship out current template list;
308 add to hash table; & begin anew */
309 /* Note: end must be set before start! since obstack_next_free changes
310 upon opstack_finish */
311 core_optab->end = (template *) obstack_next_free(&o);
312 core_optab->start = (template *) obstack_finish(&o);
313 hash_err = hash_insert (op_hash, prev_name, (char *) core_optab);
314 if (hash_err && *hash_err) {
316 as_fatal("Internal Error: Can't hash %s: %s", prev_name, hash_err);
318 prev_name = optab->name;
319 core_optab = (templates *) xmalloc (sizeof(templates));
320 obstack_grow (&o, optab, sizeof(template));
325 /* initialize reg_hash hash table */
326 reg_hash = hash_new();
328 register const reg_entry *regtab;
330 for (regtab = i386_regtab; regtab < i386_regtab_end; regtab++) {
331 hash_err = hash_insert (reg_hash, regtab->reg_name, regtab);
332 if (hash_err && *hash_err) goto hash_error;
336 esp = (reg_entry *) hash_find (reg_hash, "esp");
337 ebp = (reg_entry *) hash_find (reg_hash, "ebp");
339 /* initialize reg_hash hash table */
340 prefix_hash = hash_new();
342 register const prefix_entry *prefixtab;
344 for (prefixtab = i386_prefixtab;
345 prefixtab < i386_prefixtab_end; prefixtab++) {
346 hash_err = hash_insert (prefix_hash, prefixtab->prefix_name, prefixtab);
347 if (hash_err && *hash_err) goto hash_error;
351 /* fill in lexical tables: opcode_chars, operand_chars, space_chars */
353 register unsigned int c;
355 memset(opcode_chars, '\0', sizeof(opcode_chars));
356 memset(operand_chars, '\0', sizeof(operand_chars));
357 memset(space_chars, '\0', sizeof(space_chars));
358 memset(identifier_chars, '\0', sizeof(identifier_chars));
359 memset(digit_chars, '\0', sizeof(digit_chars));
361 for (c = 0; c < 256; c++) {
362 if (islower(c) || isdigit(c)) {
364 register_chars[c] = c;
365 } else if (isupper(c)) {
366 opcode_chars[c] = tolower(c);
367 register_chars[c] = opcode_chars[c];
368 } else if (c == PREFIX_SEPERATOR) {
370 } else if (c == ')' || c == '(') {
371 register_chars[c] = c;
374 if (isupper(c) || islower(c) || isdigit(c))
375 operand_chars[c] = c;
376 else if (c && strchr(operand_special_chars, c))
377 operand_chars[c] = c;
379 if (isdigit(c) || c == '-') digit_chars[c] = c;
381 if (isalpha(c) || c == '_' || c == '.' || isdigit(c))
382 identifier_chars[c] = c;
384 if (c == ' ' || c == '\t') space_chars[c] = c;
389 void md_end() {} /* not much to do here. */
395 /* debugging routines for md_assemble */
396 static void pi (), pte (), pt (), pe (), ps ();
398 static void pi (line, x)
402 register template *p;
405 fprintf (stdout, "%s: template ", line);
407 fprintf (stdout, " modrm: mode %x reg %x reg/mem %x",
408 x->rm.mode, x->rm.reg, x->rm.regmem);
409 fprintf (stdout, " base %x index %x scale %x\n",
410 x->bi.base, x->bi.index, x->bi.scale);
411 for (i = 0; i < x->operands; i++) {
412 fprintf (stdout, " #%d: ", i+1);
414 fprintf (stdout, "\n");
415 if (x->types[i] & Reg) fprintf (stdout, "%s\n", x->regs[i]->reg_name);
416 if (x->types[i] & Imm) pe (x->imms[i]);
417 if (x->types[i] & (Disp|Abs)) pe (x->disps[i]);
425 fprintf (stdout, " %d operands ", t->operands);
426 fprintf (stdout, "opcode %x ",
428 if (t->extension_opcode != None)
429 fprintf (stdout, "ext %x ", t->extension_opcode);
430 if (t->opcode_modifier&D)
431 fprintf (stdout, "D");
432 if (t->opcode_modifier&W)
433 fprintf (stdout, "W");
434 fprintf (stdout, "\n");
435 for (i = 0; i < t->operands; i++) {
436 fprintf (stdout, " #%d type ", i+1);
437 pt (t->operand_types[i]);
438 fprintf (stdout, "\n");
445 fprintf (stdout, " segment %s\n", segment_name (e->X_seg));
446 fprintf (stdout, " add_number %ld (%lx)\n",
447 e->X_add_number, e->X_add_number);
448 if (e->X_add_symbol) {
449 fprintf (stdout, " add_symbol ");
450 ps (e->X_add_symbol);
451 fprintf (stdout, "\n");
453 if (e->X_subtract_symbol) {
454 fprintf (stdout, " sub_symbol ");
455 ps (e->X_subtract_symbol);
456 fprintf (stdout, "\n");
463 fprintf (stdout, "%s type %s%s",
465 S_IS_EXTERNAL(s) ? "EXTERNAL " : "",
466 segment_name(S_GET_SEGMENT(s)));
473 { Reg8, "r8" }, { Reg16, "r16" }, { Reg32, "r32" }, { Imm8, "i8" },
475 { Imm16, "i16" }, { Imm32, "i32" }, { Mem8, "Mem8"}, { Mem16, "Mem16"},
476 { Mem32, "Mem32"}, { BaseIndex, "BaseIndex" },
477 { Abs8, "Abs8" }, { Abs16, "Abs16" }, { Abs32, "Abs32" },
478 { Disp8, "d8" }, { Disp16, "d16" },
479 { Disp32, "d32" }, { SReg2, "SReg2" }, { SReg3, "SReg3" }, { Acc, "Acc" },
480 { InOutPortReg, "InOutPortReg" }, { ShiftCount, "ShiftCount" },
481 { Imm1, "i1" }, { Control, "control reg" }, {Test, "test reg"},
482 { FloatReg, "FReg"}, {FloatAcc, "FAcc"},
483 { JumpAbsolute, "Jump Absolute"},
490 register struct type_name *ty;
493 fprintf (stdout, "Unknown");
495 for (ty = type_names; ty->mask; ty++)
496 if (t & ty->mask) fprintf (stdout, "%s, ", ty->tname);
501 #endif /* DEBUG386 */
504 This is the guts of the machine-dependent assembler. LINE points to a
505 machine dependent instruction. This funciton is supposed to emit
506 the frags/bytes it assembles to.
508 void md_assemble (line)
511 /* Holds temlate once we've found it. */
512 register template *t;
514 /* Possible templates for current insn */
515 templates *current_templates = (templates *) 0;
517 /* Initialize globals. */
518 memset(&i, '\0', sizeof(i));
519 memset(disp_expressions, '\0', sizeof(disp_expressions));
520 memset(im_expressions, '\0', sizeof(im_expressions));
521 save_stack_p = save_stack; /* reset stack pointer */
523 /* Fist parse an opcode & call i386_operand for the operands.
524 We assume that the scrubber has arranged it so that line[0] is the valid
525 start of a (possibly prefixed) opcode. */
527 register char *l = line; /* Fast place to put LINE. */
529 /* 1 if operand is pending after ','. */
530 unsigned int expecting_operand = 0;
531 /* 1 if we found a prefix only acceptable with string insns. */
532 unsigned int expecting_string_instruction = 0;
533 /* Non-zero if operand parens not balenced. */
534 unsigned int paren_not_balenced;
535 char * token_start = l;
537 while (! is_space_char(*l) && *l != END_OF_INSN) {
538 if (! is_opcode_char(*l)) {
539 as_bad("invalid character %s in opcode", output_invalid(*l));
541 } else if (*l != PREFIX_SEPERATOR) {
542 *l = opcode_chars[(unsigned char) *l]; /* fold case of opcodes */
544 } else { /* this opcode's got a prefix */
545 register unsigned int q;
546 register prefix_entry * prefix;
548 if (l == token_start) {
549 as_bad("expecting prefix; got nothing");
552 END_STRING_AND_SAVE (l);
553 prefix = (prefix_entry *) hash_find (prefix_hash, token_start);
555 as_bad("no such opcode prefix ('%s')", token_start);
558 RESTORE_END_STRING (l);
559 /* check for repeated prefix */
560 for (q = 0; q < i.prefixes; q++)
561 if (i.prefix[q] == prefix->prefix_code) {
562 as_bad("same prefix used twice; you don't really want this!");
565 if (i.prefixes == MAX_PREFIXES) {
566 as_bad("too many opcode prefixes");
569 i.prefix[i.prefixes++] = prefix->prefix_code;
570 if (prefix->prefix_code == REPE || prefix->prefix_code == REPNE)
571 expecting_string_instruction = 1;
572 /* skip past PREFIX_SEPERATOR and reset token_start */
576 END_STRING_AND_SAVE (l);
577 if (token_start == l) {
578 as_bad("expecting opcode; got nothing");
582 /* Lookup insn in hash; try intel & att naming conventions if appropriate;
583 that is: we only use the opcode suffix 'b' 'w' or 'l' if we need to. */
584 current_templates = (templates *) hash_find (op_hash, token_start);
585 if (! current_templates) {
586 int last_index = strlen(token_start) - 1;
587 char last_char = token_start[last_index];
589 case DWORD_OPCODE_SUFFIX:
590 case WORD_OPCODE_SUFFIX:
591 case BYTE_OPCODE_SUFFIX:
592 token_start[last_index] = '\0';
593 current_templates = (templates *) hash_find (op_hash, token_start);
594 token_start[last_index] = last_char;
595 i.suffix = last_char;
597 if (!current_templates) {
598 as_bad("no such 386 instruction: `%s'", token_start); return;
601 RESTORE_END_STRING (l);
603 /* check for rep/repne without a string instruction */
604 if (expecting_string_instruction &&
605 ! IS_STRING_INSTRUCTION (current_templates->
606 start->base_opcode)) {
607 as_bad("expecting string instruction after rep/repne");
611 /* There may be operands to parse. */
612 if (*l != END_OF_INSN &&
613 /* For string instructions, we ignore any operands if given. This
614 kludges, for example, 'rep/movsb %ds:(%esi), %es:(%edi)' where
615 the operands are always going to be the same, and are not really
616 encoded in machine code. */
617 ! IS_STRING_INSTRUCTION (current_templates->
618 start->base_opcode)) {
621 /* skip optional white space before operand */
622 while (! is_operand_char(*l) && *l != END_OF_INSN) {
623 if (! is_space_char(*l)) {
624 as_bad("invalid character %s before %s operand",
626 ordinal_names[i.operands]);
631 token_start = l; /* after white space */
632 paren_not_balenced = 0;
633 while (paren_not_balenced || *l != ',') {
634 if (*l == END_OF_INSN) {
635 if (paren_not_balenced) {
636 as_bad("unbalenced parenthesis in %s operand.",
637 ordinal_names[i.operands]);
639 } else break; /* we are done */
640 } else if (! is_operand_char(*l) && ! is_space_char(*l)) {
641 as_bad("invalid character %s in %s operand",
643 ordinal_names[i.operands]);
646 if (*l == '(') ++paren_not_balenced;
647 if (*l == ')') --paren_not_balenced;
650 if (l != token_start) { /* yes, we've read in another operand */
651 unsigned int operand_ok;
652 this_operand = i.operands++;
653 if (i.operands > MAX_OPERANDS) {
654 as_bad("spurious operands; (%d operands/instruction max)",
658 /* now parse operand adding info to 'i' as we go along */
659 END_STRING_AND_SAVE (l);
660 operand_ok = i386_operand (token_start);
661 RESTORE_END_STRING (l); /* restore old contents */
662 if (!operand_ok) return;
664 if (expecting_operand) {
665 expecting_operand_after_comma:
666 as_bad("expecting operand after ','; got nothing");
670 as_bad("expecting operand before ','; got nothing");
675 /* now *l must be either ',' or END_OF_INSN */
677 if (*++l == END_OF_INSN) { /* just skip it, if it's \n complain */
678 goto expecting_operand_after_comma;
680 expecting_operand = 1;
682 } while (*l != END_OF_INSN); /* until we get end of insn */
686 /* Now we've parsed the opcode into a set of templates, and have the
688 Next, we find a template that matches the given insn,
689 making sure the overlap of the given operands types is consistent
690 with the template operand types. */
692 #define MATCH(overlap,given_type) \
694 (overlap & (JumpAbsolute|BaseIndex|Mem8)) \
695 == (given_type & (JumpAbsolute|BaseIndex|Mem8)))
697 /* If m0 and m1 are register matches they must be consistent
698 with the expected operand types t0 and t1.
699 That is, if both m0 & m1 are register matches
700 i.e. ( ((m0 & (Reg)) && (m1 & (Reg)) ) ?
701 then, either 1. or 2. must be true:
702 1. the expected operand type register overlap is null:
705 the given register overlap is null:
707 2. the expected operand type register overlap == the given
708 operand type overlap: (t0 & t1 & m0 & m1 & Reg).
710 #define CONSISTENT_REGISTER_MATCH(m0, m1, t0, t1) \
711 ( ((m0 & (Reg)) && (m1 & (Reg))) ? \
712 ( ((t0 & t1 & (Reg)) == 0 && (m0 & m1 & (Reg)) == 0) || \
713 ((t0 & t1) & (m0 & m1) & (Reg)) \
716 register unsigned int overlap0, overlap1;
718 unsigned int overlap2;
719 unsigned int found_reverse_match;
721 overlap0 = overlap1 = overlap2 = found_reverse_match = 0;
722 for (t = current_templates->start;
723 t < current_templates->end;
726 /* must have right number of operands */
727 if (i.operands != t->operands) continue;
728 else if (!t->operands) break; /* 0 operands always matches */
730 overlap0 = i.types[0] & t->operand_types[0];
731 switch (t->operands) {
733 if (! MATCH (overlap0,i.types[0])) continue;
736 overlap1 = i.types[1] & t->operand_types[1];
737 if (! MATCH (overlap0,i.types[0]) ||
738 ! MATCH (overlap1,i.types[1]) ||
739 ! CONSISTENT_REGISTER_MATCH(overlap0, overlap1,
741 t->operand_types[1])) {
743 /* check if other direction is valid ... */
744 if (! (t->opcode_modifier & COMES_IN_BOTH_DIRECTIONS))
747 /* try reversing direction of operands */
748 overlap0 = i.types[0] & t->operand_types[1];
749 overlap1 = i.types[1] & t->operand_types[0];
750 if (! MATCH (overlap0,i.types[0]) ||
751 ! MATCH (overlap1,i.types[1]) ||
752 ! CONSISTENT_REGISTER_MATCH (overlap0, overlap1,
754 t->operand_types[1])) {
755 /* does not match either direction */
758 /* found a reverse match here -- slip through */
759 /* found_reverse_match holds which of D or FloatD we've found */
760 found_reverse_match = t->opcode_modifier & COMES_IN_BOTH_DIRECTIONS;
761 } /* endif: not forward match */
762 /* found either forward/reverse 2 operand match here */
763 if (t->operands == 3) {
764 overlap2 = i.types[2] & t->operand_types[2];
765 if (! MATCH (overlap2,i.types[2]) ||
766 ! CONSISTENT_REGISTER_MATCH (overlap0, overlap2,
768 t->operand_types[2]) ||
769 ! CONSISTENT_REGISTER_MATCH (overlap1, overlap2,
771 t->operand_types[2]))
774 /* found either forward/reverse 2 or 3 operand match here:
775 slip through to break */
777 break; /* we've found a match; break out of loop */
779 if (t == current_templates->end) { /* we found no match */
780 as_bad("operands given don't match any known 386 instruction");
784 /* Copy the template we found (we may change it!). */
785 memcpy(&i.tm, t, sizeof(template));
786 t = &i.tm; /* alter new copy of template */
788 /* If there's no opcode suffix we try to invent one based on register
790 if (! i.suffix && i.reg_operands) {
791 /* We take i.suffix from the LAST register operand specified. This
792 assumes that the last register operands is the destination register
795 for (o = 0; o < MAX_OPERANDS; o++)
796 if (i.types[o] & Reg) {
797 i.suffix = (i.types[o] == Reg8) ? BYTE_OPCODE_SUFFIX :
798 (i.types[o] == Reg16) ? WORD_OPCODE_SUFFIX :
803 /* Make still unresolved immediate matches conform to size of immediate
804 given in i.suffix. Note: overlap2 cannot be an immediate!
806 if ((overlap0 & (Imm8|Imm8S|Imm16|Imm32))
807 && overlap0 != Imm8 && overlap0 != Imm8S
808 && overlap0 != Imm16 && overlap0 != Imm32) {
810 as_bad("no opcode suffix given; can't determine immediate size");
813 overlap0 &= (i.suffix == BYTE_OPCODE_SUFFIX ? (Imm8|Imm8S) :
814 (i.suffix == WORD_OPCODE_SUFFIX ? Imm16 : Imm32));
816 if ((overlap1 & (Imm8|Imm8S|Imm16|Imm32))
817 && overlap1 != Imm8 && overlap1 != Imm8S
818 && overlap1 != Imm16 && overlap1 != Imm32) {
820 as_bad("no opcode suffix given; can't determine immediate size");
823 overlap1 &= (i.suffix == BYTE_OPCODE_SUFFIX ? (Imm8|Imm8S) :
824 (i.suffix == WORD_OPCODE_SUFFIX ? Imm16 : Imm32));
827 i.types[0] = overlap0;
828 i.types[1] = overlap1;
829 i.types[2] = overlap2;
831 if (overlap0 & ImplicitRegister) i.reg_operands--;
832 if (overlap1 & ImplicitRegister) i.reg_operands--;
833 if (overlap2 & ImplicitRegister) i.reg_operands--;
834 if (overlap0 & Imm1) i.imm_operands = 0; /* kludge for shift insns */
836 if (found_reverse_match) {
838 save = t->operand_types[0];
839 t->operand_types[0] = t->operand_types[1];
840 t->operand_types[1] = save;
843 /* Finalize opcode. First, we change the opcode based on the operand
844 size given by i.suffix: we never have to change things for byte insns,
845 or when no opcode suffix is need to size the operands. */
847 if (! i.suffix && (t->opcode_modifier & W)) {
848 as_bad("no opcode suffix given and no register operands; can't size instruction");
852 if (i.suffix && i.suffix != BYTE_OPCODE_SUFFIX) {
853 /* Select between byte and word/dword operations. */
854 if (t->opcode_modifier & W)
856 /* Now select between word & dword operations via the
857 operand size prefix. */
858 if (i.suffix == WORD_OPCODE_SUFFIX) {
859 if (i.prefixes == MAX_PREFIXES) {
860 as_bad("%d prefixes given and 'w' opcode suffix gives too many prefixes",
864 i.prefix[i.prefixes++] = WORD_PREFIX_OPCODE;
868 /* For insns with operands there are more diddles to do to the opcode. */
870 /* If we found a reverse match we must alter the opcode direction bit
871 found_reverse_match holds bit to set (different for int &
874 if (found_reverse_match) {
875 t->base_opcode |= found_reverse_match;
879 The imul $imm, %reg instruction is converted into
880 imul $imm, %reg, %reg. */
881 if (t->opcode_modifier & imulKludge) {
882 i.regs[2] = i.regs[1]; /* Pretend we saw the 3 operand case. */
886 /* Certain instructions expect the destination to be in the i.rm.reg
887 field. This is by far the exceptional case. For these instructions,
888 if the source operand is a register, we must reverse the i.rm.reg
889 and i.rm.regmem fields. We accomplish this by faking that the
890 two register operands were given in the reverse order. */
891 if ((t->opcode_modifier & ReverseRegRegmem) && i.reg_operands == 2) {
892 unsigned int first_reg_operand = (i.types[0] & Reg) ? 0 : 1;
893 unsigned int second_reg_operand = first_reg_operand + 1;
894 reg_entry *tmp = i.regs[first_reg_operand];
895 i.regs[first_reg_operand] = i.regs[second_reg_operand];
896 i.regs[second_reg_operand] = tmp;
899 if (t->opcode_modifier & ShortForm) {
900 /* The register or float register operand is in operand 0 or 1. */
901 unsigned int o = (i.types[0] & (Reg|FloatReg)) ? 0 : 1;
902 /* Register goes in low 3 bits of opcode. */
903 t->base_opcode |= i.regs[o]->reg_num;
904 } else if (t->opcode_modifier & ShortFormW) {
905 /* Short form with 0x8 width bit. Register is always dest. operand */
906 t->base_opcode |= i.regs[1]->reg_num;
907 if (i.suffix == WORD_OPCODE_SUFFIX ||
908 i.suffix == DWORD_OPCODE_SUFFIX)
909 t->base_opcode |= 0x8;
910 } else if (t->opcode_modifier & Seg2ShortForm) {
911 if (t->base_opcode == POP_SEG_SHORT && i.regs[0]->reg_num == 1) {
912 as_bad("you can't 'pop cs' on the 386.");
915 t->base_opcode |= (i.regs[0]->reg_num << 3);
916 } else if (t->opcode_modifier & Seg3ShortForm) {
917 /* 'push %fs' is 0x0fa0; 'pop %fs' is 0x0fa1.
918 'push %gs' is 0x0fa8; 'pop %fs' is 0x0fa9.
919 So, only if i.regs[0]->reg_num == 5 (%gs) do we need
920 to change the opcode. */
921 if (i.regs[0]->reg_num == 5)
922 t->base_opcode |= 0x08;
923 } else if (t->opcode_modifier & Modrm) {
924 /* The opcode is completed (modulo t->extension_opcode which must
925 be put into the modrm byte.
926 Now, we make the modrm & index base bytes based on all the info
929 /* i.reg_operands MUST be the number of real register operands;
930 implicit registers do not count. */
931 if (i.reg_operands == 2) {
932 unsigned int source, dest;
933 source = (i.types[0] & (Reg|SReg2|SReg3|Control|Debug|Test)) ? 0 : 1;
936 /* We must be careful to make sure that all segment/control/test/
937 debug registers go into the i.rm.reg field (despite the whether
938 they are source or destination operands). */
939 if (i.regs[dest]->reg_type & (SReg2|SReg3|Control|Debug|Test)) {
940 i.rm.reg = i.regs[dest]->reg_num;
941 i.rm.regmem = i.regs[source]->reg_num;
943 i.rm.reg = i.regs[source]->reg_num;
944 i.rm.regmem = i.regs[dest]->reg_num;
946 } else { /* if it's not 2 reg operands... */
947 if (i.mem_operands) {
948 unsigned int fake_zero_displacement = 0;
949 unsigned int o = (i.types[0] & Mem) ? 0 : ((i.types[1] & Mem) ? 1 : 2);
951 /* Encode memory operand into modrm byte and base index byte. */
953 if (i.base_reg == esp && ! i.index_reg) {
954 /* <disp>(%esp) becomes two byte modrm with no index register. */
955 i.rm.regmem = ESCAPE_TO_TWO_BYTE_ADDRESSING;
956 i.rm.mode = mode_from_disp_size(i.types[o]);
957 i.bi.base = ESP_REG_NUM;
958 i.bi.index = NO_INDEX_REGISTER;
959 i.bi.scale = 0; /* Must be zero! */
960 } else if (i.base_reg == ebp && !i.index_reg) {
961 if (! (i.types[o] & Disp)) {
962 /* Must fake a zero byte displacement.
963 There is no direct way to code '(%ebp)' directly. */
964 fake_zero_displacement = 1;
965 /* fake_zero_displacement code does not set this. */
968 i.rm.mode = mode_from_disp_size(i.types[o]);
969 i.rm.regmem = EBP_REG_NUM;
970 } else if (! i.base_reg && (i.types[o] & BaseIndex)) {
971 /* There are three cases here.
972 Case 1: '<32bit disp>(,1)' -- indirect absolute.
973 (Same as cases 2 & 3 with NO index register)
974 Case 2: <32bit disp> (,<index>) -- no base register with disp
975 Case 3: (, <index>) --- no base register;
976 no disp (must add 32bit 0 disp). */
977 i.rm.regmem = ESCAPE_TO_TWO_BYTE_ADDRESSING;
978 i.rm.mode = 0; /* 32bit mode */
979 i.bi.base = NO_BASE_REGISTER;
981 i.types[o] |= Disp32; /* Must be 32bit! */
982 if (i.index_reg) { /* case 2 or case 3 */
983 i.bi.index = i.index_reg->reg_num;
984 i.bi.scale = i.log2_scale_factor;
985 if (i.disp_operands == 0)
986 fake_zero_displacement = 1; /* case 3 */
988 i.bi.index = NO_INDEX_REGISTER;
991 } else if (i.disp_operands && !i.base_reg && !i.index_reg) {
992 /* Operand is just <32bit disp> */
993 i.rm.regmem = EBP_REG_NUM;
996 i.types[o] |= Disp32;
998 /* It's not a special case; rev'em up. */
999 i.rm.regmem = i.base_reg->reg_num;
1000 i.rm.mode = mode_from_disp_size(i.types[o]);
1002 i.rm.regmem = ESCAPE_TO_TWO_BYTE_ADDRESSING;
1003 i.bi.base = i.base_reg->reg_num;
1004 i.bi.index = i.index_reg->reg_num;
1005 i.bi.scale = i.log2_scale_factor;
1006 if (i.base_reg == ebp && i.disp_operands == 0) { /* pace */
1007 fake_zero_displacement = 1;
1008 i.types[o] |= Disp8;
1009 i.rm.mode = mode_from_disp_size(i.types[o]);
1013 if (fake_zero_displacement) {
1014 /* Fakes a zero displacement assuming that i.types[o] holds
1015 the correct displacement size. */
1016 exp = &disp_expressions[i.disp_operands++];
1018 exp->X_seg = SEG_ABSOLUTE;
1019 exp->X_add_number = 0;
1020 exp->X_add_symbol = (symbolS *) 0;
1021 exp->X_subtract_symbol = (symbolS *) 0;
1024 /* Select the correct segment for the memory operand. */
1026 unsigned int seg_index;
1027 const seg_entry *default_seg;
1029 if (i.rm.regmem == ESCAPE_TO_TWO_BYTE_ADDRESSING) {
1030 seg_index = (i.rm.mode<<3) | i.bi.base;
1031 default_seg = two_byte_segment_defaults[seg_index];
1033 seg_index = (i.rm.mode<<3) | i.rm.regmem;
1034 default_seg = one_byte_segment_defaults[seg_index];
1036 /* If the specified segment is not the default, use an
1037 opcode prefix to select it */
1038 if (i.seg != default_seg) {
1039 if (i.prefixes == MAX_PREFIXES) {
1040 as_bad("%d prefixes given and %s segment override gives too many prefixes",
1041 MAX_PREFIXES, i.seg->seg_name);
1044 i.prefix[i.prefixes++] = i.seg->seg_prefix;
1049 /* Fill in i.rm.reg or i.rm.regmem field with register operand
1050 (if any) based on t->extension_opcode. Again, we must be careful
1051 to make sure that segment/control/debug/test registers are coded
1052 into the i.rm.reg field. */
1053 if (i.reg_operands) {
1055 (i.types[0] & (Reg|SReg2|SReg3|Control|Debug|Test)) ? 0 :
1056 (i.types[1] & (Reg|SReg2|SReg3|Control|Debug|Test)) ? 1 : 2;
1057 /* If there is an extension opcode to put here, the register number
1058 must be put into the regmem field. */
1059 if (t->extension_opcode != None)
1060 i.rm.regmem = i.regs[o]->reg_num;
1061 else i.rm.reg = i.regs[o]->reg_num;
1063 /* Now, if no memory operand has set i.rm.mode = 0, 1, 2
1064 we must set it to 3 to indicate this is a register operand
1065 int the regmem field */
1066 if (! i.mem_operands) i.rm.mode = 3;
1069 /* Fill in i.rm.reg field with extension opcode (if any). */
1070 if (t->extension_opcode != None)
1071 i.rm.reg = t->extension_opcode;
1077 /* Handle conversion of 'int $3' --> special int3 insn. */
1078 if (t->base_opcode == INT_OPCODE && i.imms[0]->X_add_number == 3) {
1079 t->base_opcode = INT3_OPCODE;
1083 /* We are ready to output the insn. */
1088 if (t->opcode_modifier & Jump) {
1089 int n = i.disps[0]->X_add_number;
1091 switch (i.disps[0]->X_seg) {
1093 if (fits_in_signed_byte(n)) {
1095 p[0] = t->base_opcode;
1097 #if 0 /* leave out 16 bit jumps - pace */
1098 } else if (fits_in_signed_word(n)) {
1100 p[0] = WORD_PREFIX_OPCODE;
1101 p[1] = t->base_opcode;
1102 md_number_to_chars (&p[2], n, 2);
1104 } else { /* It's an absolute dword displacement. */
1105 if (t->base_opcode == JUMP_PC_RELATIVE) { /* pace */
1106 /* unconditional jump */
1109 md_number_to_chars (&p[1], n, 4);
1111 /* conditional jump */
1113 p[0] = TWO_BYTE_OPCODE_ESCAPE;
1114 p[1] = t->base_opcode + 0x10;
1115 md_number_to_chars (&p[2], n, 4);
1120 /* It's a symbol; end frag & setup for relax.
1121 Make sure there are 6 chars left in the current frag; if not
1122 we'll have to start a new one. */
1123 /* I caught it failing with obstack_room == 6,
1124 so I changed to <= pace */
1125 if (obstack_room (&frags) <= 6) {
1126 frag_wane(frag_now);
1130 p[0] = t->base_opcode;
1131 frag_var (rs_machine_dependent,
1132 6, /* 2 opcode/prefix + 4 displacement */
1134 ((unsigned char) *p == JUMP_PC_RELATIVE
1135 ? ENCODE_RELAX_STATE (UNCOND_JUMP, BYTE)
1136 : ENCODE_RELAX_STATE (COND_JUMP, BYTE)),
1137 i.disps[0]->X_add_symbol,
1140 * XXX - what do we do about jmp x@PLT ??
1141 * kludged in md_estimate_size_before_relax() below
1145 } else if (t->opcode_modifier & (JumpByte|JumpDword)) {
1146 int size = (t->opcode_modifier & JumpByte) ? 1 : 4;
1147 int n = i.disps[0]->X_add_number;
1149 if (fits_in_unsigned_byte(t->base_opcode)) {
1150 FRAG_APPEND_1_CHAR (t->base_opcode);
1152 p = frag_more (2); /* opcode can be at most two bytes */
1153 /* put out high byte first: can't use md_number_to_chars! */
1154 *p++ = (t->base_opcode >> 8) & 0xff;
1155 *p = t->base_opcode & 0xff;
1158 p = frag_more (size);
1159 switch (i.disps[0]->X_seg) {
1161 md_number_to_chars (p, n, size);
1162 if (size == 1 && ! fits_in_signed_byte(n)) {
1163 as_bad("loop/jecx only takes byte displacement; %d shortened to %d",
1168 fix_new (frag_now, p - frag_now->fr_literal, size,
1169 i.disps[0]->X_add_symbol, i.disps[0]->X_subtract_symbol,
1170 i.disps[0]->X_add_number, 1, i.disp_reloc[0], i.disps[0]->X_got_symbol);
1173 } else if (t->opcode_modifier & JumpInterSegment) {
1174 p = frag_more (1 + 2 + 4); /* 1 opcode; 2 segment; 4 offset */
1175 p[0] = t->base_opcode;
1176 if (i.imms[1]->X_seg == SEG_ABSOLUTE)
1177 md_number_to_chars (p + 1, i.imms[1]->X_add_number, 4);
1179 fix_new (frag_now, p + 1 - frag_now->fr_literal, 4,
1180 i.imms[1]->X_add_symbol,
1181 i.imms[1]->X_subtract_symbol,
1182 i.imms[1]->X_add_number, 0, NO_RELOC, i.imms[1]->X_got_symbol);
1183 if (i.imms[0]->X_seg != SEG_ABSOLUTE)
1184 as_bad("can't handle non absolute segment in long call/jmp");
1185 md_number_to_chars (p + 5, i.imms[0]->X_add_number, 2);
1187 /* Output normal instructions here. */
1191 * Remember # of opcode bytes to put in pcrel_adjust
1192 * for use in _GLOBAL_OFFSET_TABLE_ expressions.
1197 /* First the prefix bytes. */
1198 for (q = i.prefix; q < i.prefix + i.prefixes; q++) {
1201 md_number_to_chars (p, (unsigned int) *q, 1);
1204 /* Now the opcode; be careful about word order here! */
1205 if (fits_in_unsigned_byte(t->base_opcode)) {
1207 FRAG_APPEND_1_CHAR (t->base_opcode);
1208 } else if (fits_in_unsigned_word(t->base_opcode)) {
1211 /* put out high byte first: can't use md_number_to_chars! */
1212 *p++ = (t->base_opcode >> 8) & 0xff;
1213 *p = t->base_opcode & 0xff;
1214 } else { /* opcode is either 3 or 4 bytes */
1215 if (t->base_opcode & 0xff000000) {
1218 *p++ = (t->base_opcode >> 24) & 0xff;
1223 *p++ = (t->base_opcode >> 16) & 0xff;
1224 *p++ = (t->base_opcode >> 8) & 0xff;
1225 *p = (t->base_opcode ) & 0xff;
1228 /* Now the modrm byte and base index byte (if present). */
1229 if (t->opcode_modifier & Modrm) {
1232 /* md_number_to_chars (p, i.rm, 1); */
1233 md_number_to_chars (p, (i.rm.regmem<<0 | i.rm.reg<<3 | i.rm.mode<<6), 1);
1234 /* If i.rm.regmem == ESP (4) && i.rm.mode != Mode 3 (Register mode)
1235 ==> need second modrm byte. */
1236 if (i.rm.regmem == ESCAPE_TO_TWO_BYTE_ADDRESSING && i.rm.mode != 3) {
1239 /* md_number_to_chars (p, i.bi, 1); */
1240 md_number_to_chars (p,(i.bi.base<<0 | i.bi.index<<3 | i.bi.scale<<6), 1);
1244 if (i.disp_operands) {
1245 register unsigned int n;
1247 for (n = 0; n < i.operands; n++) {
1249 if (i.disps[n]->X_seg == SEG_ABSOLUTE) {
1250 if (i.types[n] & (Disp8|Abs8)) {
1252 md_number_to_chars (p, i.disps[n]->X_add_number, 1);
1253 } else if (i.types[n] & (Disp16|Abs16)) {
1255 md_number_to_chars (p, i.disps[n]->X_add_number, 2);
1256 } else { /* Disp32|Abs32 */
1258 md_number_to_chars (p, i.disps[n]->X_add_number, 4);
1260 } else { /* not SEG_ABSOLUTE */
1261 /* need a 32-bit fixup (don't support 8bit non-absolute disps) */
1265 fixP = fix_new (frag_now, p - frag_now->fr_literal, 4,
1266 i.disps[n]->X_add_symbol, i.disps[n]->X_subtract_symbol,
1267 i.disps[n]->X_add_number, 0, i.disp_reloc[n], i.disps[n]->X_got_symbol);
1269 if (i.disps[n]->X_got_symbol) {
1270 fixP->fx_pcrel_adjust = nopbytes;
1276 } /* end displacement output */
1278 /* output immediate */
1279 if (i.imm_operands) {
1280 register unsigned int n;
1282 for (n = 0; n < i.operands; n++) {
1284 if (i.imms[n]->X_seg == SEG_ABSOLUTE) {
1285 if (i.types[n] & (Imm8|Imm8S)) {
1287 md_number_to_chars (p, i.imms[n]->X_add_number, 1);
1288 } else if (i.types[n] & Imm16) {
1290 md_number_to_chars (p, i.imms[n]->X_add_number, 2);
1293 md_number_to_chars (p, i.imms[n]->X_add_number, 4);
1295 } else { /* not SEG_ABSOLUTE */
1296 /* need a 32-bit fixup (don't support 8bit non-absolute ims) */
1297 /* try to support other sizes ... */
1300 if (i.types[n] & (Imm8|Imm8S))
1302 else if (i.types[n] & Imm16)
1306 p = frag_more (size);
1307 fixP = fix_new (frag_now, p - frag_now->fr_literal, size,
1308 i.imms[n]->X_add_symbol, i.imms[n]->X_subtract_symbol,
1309 i.imms[n]->X_add_number, 0, NO_RELOC, i.imms[n]->X_got_symbol);
1311 if (i.imms[n]->X_got_symbol) {
1312 fixP->fx_pcrel_adjust = nopbytes;
1318 } /* end immediate output */
1322 if (flagseen['D']) {
1325 #endif /* DEBUG386 */
1331 /* Parse OPERAND_STRING into the i386_insn structure I. Returns non-zero
1334 static int i386_operand (operand_string)
1335 char *operand_string;
1337 register char *op_string = operand_string;
1339 /* Address of '\0' at end of operand_string. */
1340 char * end_of_operand_string = operand_string + strlen(operand_string);
1342 /* Start and end of displacement string expression (if found). */
1343 char *displacement_string_start = NULL;
1344 char *displacement_string_end = NULL;
1346 /* We check for an absolute prefix (differentiating,
1347 for example, 'jmp pc_relative_label' from 'jmp *absolute_label'. */
1348 if (*op_string == ABSOLUTE_PREFIX) {
1350 i.types[this_operand] |= JumpAbsolute;
1353 /* Check if operand is a register. */
1354 if (*op_string == REGISTER_PREFIX) {
1355 register reg_entry *r;
1356 if (!(r = parse_register (op_string))) {
1357 as_bad("bad register name ('%s')", op_string);
1360 /* Check for segment override, rather than segment register by
1361 searching for ':' after %<x>s where <x> = s, c, d, e, f, g. */
1362 if ((r->reg_type & (SReg2|SReg3)) && op_string[3] == ':') {
1363 switch (r->reg_num) {
1365 i.seg = (seg_entry *) &es; break;
1367 i.seg = (seg_entry *) &cs; break;
1369 i.seg = (seg_entry *) &ss; break;
1371 i.seg = (seg_entry *) &ds; break;
1373 i.seg = (seg_entry *) &fs; break;
1375 i.seg = (seg_entry *) &gs; break;
1377 op_string += 4; /* skip % <x> s : */
1378 operand_string = op_string; /* Pretend given string starts here. */
1379 if (!is_digit_char(*op_string) && !is_identifier_char(*op_string)
1380 && *op_string != '(' && *op_string != ABSOLUTE_PREFIX) {
1381 as_bad("bad memory operand after segment override");
1384 /* Handle case of %es:*foo. */
1385 if (*op_string == ABSOLUTE_PREFIX) {
1387 i.types[this_operand] |= JumpAbsolute;
1389 goto do_memory_reference;
1391 i.types[this_operand] |= r->reg_type;
1392 i.regs[this_operand] = r;
1394 } else if (*op_string == IMMEDIATE_PREFIX) { /* ... or an immediate */
1395 char *save_input_line_pointer;
1396 segT exp_seg = SEG_GOOF;
1399 if (i.imm_operands == MAX_IMMEDIATE_OPERANDS) {
1400 as_bad("only 1 or 2 immediate operands are allowed");
1404 exp = &im_expressions[i.imm_operands++];
1405 i.imms[this_operand] = exp;
1406 save_input_line_pointer = input_line_pointer;
1407 /* must advance op_string! */
1408 input_line_pointer = ++op_string;
1411 exp_seg = expression(exp);
1412 input_line_pointer = save_input_line_pointer;
1415 case SEG_ABSENT: /* missing or bad expr becomes absolute 0 */
1416 as_bad("missing or invalid immediate expression '%s' taken as 0",
1418 exp->X_seg = SEG_ABSOLUTE;
1419 exp->X_add_number = 0;
1420 exp->X_add_symbol = (symbolS *) 0;
1421 exp->X_subtract_symbol = (symbolS *) 0;
1422 i.types[this_operand] |= Imm;
1425 i.types[this_operand] |= smallest_imm_type(exp->X_add_number);
1427 case SEG_TEXT: case SEG_DATA: case SEG_BSS: case SEG_UNKNOWN:
1428 case SEG_DIFFERENCE:
1429 i.types[this_operand] |= Imm32; /* this is an address ==> 32bit */
1433 as_bad("Unimplemented segment type %d in parse_operand", exp_seg);
1436 /* shorten this type of this operand if the instruction wants
1437 * fewer bits than are present in the immediate. The bit field
1438 * code can put out 'andb $0xffffff, %al', for example. pace
1439 * also 'movw $foo,(%eax)'
1442 case WORD_OPCODE_SUFFIX:
1443 i.types[this_operand] |= Imm16;
1445 case BYTE_OPCODE_SUFFIX:
1446 i.types[this_operand] |= Imm16 | Imm8 | Imm8S;
1449 } else if (is_digit_char(*op_string) || is_identifier_char(*op_string)
1450 || *op_string == '(') {
1451 /* This is a memory reference of some sort. */
1452 register char * base_string;
1453 unsigned int found_base_index_form;
1455 do_memory_reference:
1456 if (i.mem_operands == MAX_MEMORY_OPERANDS) {
1457 as_bad("more than 1 memory reference in instruction");
1462 /* Determine type of memory operand from opcode_suffix;
1463 no opcode suffix implies general memory references. */
1465 case BYTE_OPCODE_SUFFIX:
1466 i.types[this_operand] |= Mem8;
1468 case WORD_OPCODE_SUFFIX:
1469 i.types[this_operand] |= Mem16;
1471 case DWORD_OPCODE_SUFFIX:
1473 i.types[this_operand] |= Mem32;
1476 /* Check for base index form. We detect the base index form by
1477 looking for an ')' at the end of the operand, searching
1478 for the '(' matching it, and finding a REGISTER_PREFIX or ','
1480 base_string = end_of_operand_string - 1;
1481 found_base_index_form = 0;
1482 if (*base_string == ')') {
1483 unsigned int parens_balenced = 1;
1484 /* We've already checked that the number of left & right ()'s are equal,
1485 so this loop will not be infinite. */
1488 if (*base_string == ')') parens_balenced++;
1489 if (*base_string == '(') parens_balenced--;
1490 } while (parens_balenced);
1491 base_string++; /* Skip past '('. */
1492 if (*base_string == REGISTER_PREFIX || *base_string == ',')
1493 found_base_index_form = 1;
1496 /* If we can't parse a base index register expression, we've found
1497 a pure displacement expression. We set up displacement_string_start
1498 and displacement_string_end for the code below. */
1499 if (! found_base_index_form) {
1500 displacement_string_start = op_string;
1501 displacement_string_end = end_of_operand_string;
1503 char *base_reg_name, *index_reg_name, *num_string;
1506 i.types[this_operand] |= BaseIndex;
1508 /* If there is a displacement set-up for it to be parsed later. */
1509 if (base_string != op_string + 1) {
1510 displacement_string_start = op_string;
1511 displacement_string_end = base_string - 1;
1514 /* Find base register (if any). */
1515 if (*base_string != ',') {
1516 base_reg_name = base_string++;
1517 /* skip past register name & parse it */
1518 while (isalpha(*base_string)) base_string++;
1519 if (base_string == base_reg_name+1) {
1520 as_bad("can't find base register name after '(%c'",
1524 END_STRING_AND_SAVE (base_string);
1525 if (! (i.base_reg = parse_register (base_reg_name))) {
1526 as_bad("bad base register name ('%s')", base_reg_name);
1529 RESTORE_END_STRING (base_string);
1532 /* Now check seperator; must be ',' ==> index reg
1533 OR num ==> no index reg. just scale factor
1534 OR ')' ==> end. (scale factor = 1) */
1535 if (*base_string != ',' && *base_string != ')') {
1536 as_bad("expecting ',' or ')' after base register in `%s'",
1541 /* There may index reg here; and there may be a scale factor. */
1542 if (*base_string == ',' && *(base_string+1) == REGISTER_PREFIX) {
1543 index_reg_name = ++base_string;
1544 while (isalpha(*++base_string));
1545 END_STRING_AND_SAVE (base_string);
1546 if (! (i.index_reg = parse_register(index_reg_name))) {
1547 as_bad("bad index register name ('%s')", index_reg_name);
1550 RESTORE_END_STRING (base_string);
1553 /* Check for scale factor. */
1554 if (*base_string == ',' && isdigit(*(base_string+1))) {
1555 num_string = ++base_string;
1556 while (is_digit_char(*base_string)) base_string++;
1557 if (base_string == num_string) {
1558 as_bad("can't find a scale factor after ','");
1561 END_STRING_AND_SAVE (base_string);
1562 /* We've got a scale factor. */
1563 if (! sscanf (num_string, "%d", &num)) {
1564 as_bad("can't parse scale factor from '%s'", num_string);
1567 RESTORE_END_STRING (base_string);
1568 switch (num) { /* must be 1 digit scale */
1569 case 1: i.log2_scale_factor = 0; break;
1570 case 2: i.log2_scale_factor = 1; break;
1571 case 4: i.log2_scale_factor = 2; break;
1572 case 8: i.log2_scale_factor = 3; break;
1574 as_bad("expecting scale factor of 1, 2, 4, 8; got %d", num);
1578 if (! i.index_reg && *base_string == ',') {
1579 as_bad("expecting index register or scale factor after ','; got '%c'",
1586 /* If there's an expression begining the operand, parse it,
1587 assuming displacement_string_start and displacement_string_end
1589 if (displacement_string_start) {
1590 register expressionS *exp;
1591 segT exp_seg = SEG_GOOF;
1592 char *save_input_line_pointer;
1593 exp = &disp_expressions[i.disp_operands];
1594 i.disps[this_operand] = exp;
1595 i.disp_reloc[this_operand] = NO_RELOC;
1597 save_input_line_pointer = input_line_pointer;
1598 input_line_pointer = displacement_string_start;
1599 END_STRING_AND_SAVE (displacement_string_end);
1603 * We can have operands of the form
1604 * <symbol>@GOTOFF+<nnn>
1605 * Take the easy way out here and copy everything
1606 * into a temporary buffer...
1610 (cp = strchr(input_line_pointer,'@'))) {
1611 char tmpbuf[BUFSIZ];
1613 if (strncmp(cp+1, "PLT", 3) == 0) {
1614 i.disp_reloc[this_operand] = RELOC_JMP_TBL;
1616 strcpy(tmpbuf, input_line_pointer);
1617 strcat(tmpbuf, cp+1+3);
1619 } else if (strncmp(cp+1, "GOTOFF", 6) == 0) {
1620 i.disp_reloc[this_operand] = RELOC_GOTOFF;
1622 strcpy(tmpbuf, input_line_pointer);
1623 strcat(tmpbuf, cp+1+6);
1625 } else if (strncmp(cp+1, "GOT", 3) == 0) {
1626 i.disp_reloc[this_operand] = RELOC_GOT;
1628 strcpy(tmpbuf, input_line_pointer);
1629 strcat(tmpbuf, cp+1+3);
1632 as_bad("Bad reloc specifier '%s' in expression", cp+1);
1633 input_line_pointer = tmpbuf;
1637 exp_seg = expression(exp);
1639 if (i.disp_reloc[this_operand] == RELOC_GOTOFF)
1640 exp->X_add_symbol->sy_forceout = 1;
1642 if (*input_line_pointer)
1643 as_bad("Ignoring junk '%s' after expression",input_line_pointer);
1644 RESTORE_END_STRING (displacement_string_end);
1645 input_line_pointer = save_input_line_pointer;
1648 /* missing expr becomes absolute 0 */
1649 as_bad("missing or invalid displacement '%s' taken as 0",
1651 if (i.disp_reloc[this_operand] != NO_RELOC || !found_base_index_form || !i.base_reg) {
1652 i.types[this_operand] |= (Disp|Abs);
1653 exp->X_seg = SEG_ABSOLUTE;
1654 exp->X_add_number = 0;
1655 exp->X_add_symbol = (symbolS *) 0;
1656 exp->X_subtract_symbol = (symbolS *) 0;
1659 printf("displacement removed in operand `%s'\n", operand_string);
1662 i.disps[this_operand] = 0;
1666 if (i.disp_reloc[this_operand] != NO_RELOC || !found_base_index_form || !i.base_reg || exp->X_add_symbol || exp->X_subtract_symbol || exp->X_add_number != 0)
1667 i.types[this_operand] |= SMALLEST_DISP_TYPE (exp->X_add_number);
1670 printf("displacement removed in operand `%s'\n", operand_string);
1673 i.disps[this_operand] = 0;
1676 case SEG_TEXT: case SEG_DATA: case SEG_BSS:
1677 case SEG_UNKNOWN: /* must be 32 bit displacement (i.e. address) */
1678 if (i.disp_reloc[this_operand] != NO_RELOC || !found_base_index_form || !i.base_reg || exp->X_add_symbol || exp->X_subtract_symbol || exp->X_add_number != 0)
1679 i.types[this_operand] |= Disp32;
1682 printf("displacement removed in operand `%s'\n", operand_string);
1685 i.disps[this_operand] = 0;
1689 goto seg_unimplemented;
1693 /* Make sure the memory operand we've been dealt is valid. */
1694 if (i.base_reg && i.index_reg &&
1695 ! (i.base_reg->reg_type & i.index_reg->reg_type & Reg)) {
1696 as_bad("register size mismatch in (base,index,scale) expression");
1700 * special case for (%dx) while doing input/output op
1703 (i.base_reg->reg_type == (Reg16|InOutPortReg)) &&
1704 (i.index_reg == 0)))
1706 if ((i.base_reg && (i.base_reg->reg_type & Reg32) == 0) ||
1707 (i.index_reg && (i.index_reg->reg_type & Reg32) == 0)) {
1708 as_bad("base/index register must be 32 bit register");
1711 if (i.index_reg && i.index_reg == esp) {
1712 as_bad("%s may not be used as an index register", esp->reg_name);
1715 } else { /* it's not a memory operand; argh! */
1716 as_bad("invalid char %s begining %s operand '%s'",
1717 output_invalid(*op_string), ordinal_names[this_operand],
1721 return 1; /* normal return */
1725 * md_estimate_size_before_relax()
1727 * Called just before relax().
1728 * Any symbol that is now undefined will not become defined.
1729 * Return the correct fr_subtype in the frag.
1730 * Return the initial "guess for fr_var" to caller.
1731 * The guess for fr_var is ACTUALLY the growth beyond fr_fix.
1732 * Whatever we do to grow fr_fix or fr_var contributes to our returned value.
1733 * Although it may not be explicit in the frag, pretend fr_var starts with a
1737 md_estimate_size_before_relax (fragP, segment)
1738 register fragS * fragP;
1739 register segT segment;
1741 register unsigned char * opcode;
1742 register int old_fr_fix;
1744 old_fr_fix = fragP->fr_fix;
1745 opcode = (unsigned char *) fragP->fr_opcode;
1746 /* We've already got fragP->fr_subtype right; all we have to do is check
1747 for un-relaxable symbols. */
1748 if (S_GET_SEGMENT(fragP->fr_symbol) != segment) {
1749 /* symbol is undefined in this segment */
1750 switch (opcode[0]) {
1751 case JUMP_PC_RELATIVE: /* make jmp (0xeb) a dword displacement jump */
1752 opcode[0] = 0xe9; /* dword disp jmp */
1754 fix_new (fragP, old_fr_fix, 4,
1757 fragP->fr_offset, 1,
1759 /* XXX - oops, the JMP_TBL relocation info should have percolated through
1760 * here, define a field in frag to this?
1762 (picmode && S_GET_SEGMENT(fragP->fr_symbol) == SEG_UNKNOWN)?
1765 NO_RELOC, (symbolS *)0);
1769 /* This changes the byte-displacement jump 0x7N -->
1770 the dword-displacement jump 0x0f8N */
1771 opcode[1] = opcode[0] + 0x10;
1772 opcode[0] = TWO_BYTE_OPCODE_ESCAPE; /* two-byte escape */
1773 fragP->fr_fix += 1 + 4; /* we've added an opcode byte */
1774 fix_new (fragP, old_fr_fix + 1, 4,
1777 fragP->fr_offset, 1,
1779 /*XXX*/ (picmode && S_GET_SEGMENT(fragP->fr_symbol) == SEG_UNKNOWN)?
1782 NO_RELOC, (symbolS *)0);
1787 return (fragP->fr_var + fragP->fr_fix - old_fr_fix);
1788 } /* md_estimate_size_before_relax() */
1791 * md_convert_frag();
1793 * Called after relax() is finished.
1794 * In: Address of frag.
1795 * fr_type == rs_machine_dependent.
1796 * fr_subtype is what the address relaxed to.
1798 * Out: Any fixSs and constants are set up.
1799 * Caller will turn frag into a ".space 0".
1802 md_convert_frag (headers, fragP)
1803 object_headers *headers;
1804 register fragS * fragP;
1806 register unsigned char *opcode;
1807 unsigned char *where_to_put_displacement = NULL;
1808 unsigned int target_address;
1809 unsigned int opcode_address;
1810 unsigned int extension = 0;
1811 int displacement_from_opcode_start;
1813 opcode = (unsigned char *) fragP->fr_opcode;
1815 /* Address we want to reach in file space. */
1816 target_address = S_GET_VALUE(fragP->fr_symbol) + fragP->fr_offset;
1818 /* Address opcode resides at in file space. */
1819 opcode_address = fragP->fr_address + fragP->fr_fix;
1821 /* Displacement from opcode start to fill into instruction. */
1822 displacement_from_opcode_start = target_address - opcode_address;
1824 switch (fragP->fr_subtype) {
1825 case ENCODE_RELAX_STATE (COND_JUMP, BYTE):
1826 case ENCODE_RELAX_STATE (UNCOND_JUMP, BYTE):
1827 /* don't have to change opcode */
1828 extension = 1; /* 1 opcode + 1 displacement */
1829 where_to_put_displacement = &opcode[1];
1832 case ENCODE_RELAX_STATE (COND_JUMP, WORD):
1833 opcode[1] = TWO_BYTE_OPCODE_ESCAPE;
1834 opcode[2] = opcode[0] + 0x10;
1835 opcode[0] = WORD_PREFIX_OPCODE;
1836 extension = 4; /* 3 opcode + 2 displacement */
1837 where_to_put_displacement = &opcode[3];
1840 case ENCODE_RELAX_STATE (UNCOND_JUMP, WORD):
1842 opcode[0] = WORD_PREFIX_OPCODE;
1843 extension = 3; /* 2 opcode + 2 displacement */
1844 where_to_put_displacement = &opcode[2];
1847 case ENCODE_RELAX_STATE (COND_JUMP, DWORD):
1848 opcode[1] = opcode[0] + 0x10;
1849 opcode[0] = TWO_BYTE_OPCODE_ESCAPE;
1850 extension = 5; /* 2 opcode + 4 displacement */
1851 where_to_put_displacement = &opcode[2];
1854 case ENCODE_RELAX_STATE (UNCOND_JUMP, DWORD):
1856 extension = 4; /* 1 opcode + 4 displacement */
1857 where_to_put_displacement = &opcode[1];
1861 BAD_CASE(fragP->fr_subtype);
1864 /* now put displacement after opcode */
1865 md_number_to_chars ((char *) where_to_put_displacement,
1866 displacement_from_opcode_start - extension,
1867 SIZE_FROM_RELAX_STATE (fragP->fr_subtype));
1868 fragP->fr_fix += extension;
1872 int md_short_jump_size = 2; /* size of byte displacement jmp */
1873 int md_long_jump_size = 5; /* size of dword displacement jmp */
1874 const int md_reloc_size = 8; /* Size of relocation record */
1876 void md_create_short_jump(ptr, from_addr, to_addr, frag, to_symbol)
1878 long from_addr, to_addr;
1884 offset = to_addr - (from_addr + 2);
1885 md_number_to_chars (ptr, (long) 0xeb, 1); /* opcode for byte-disp jump */
1886 md_number_to_chars (ptr + 1, offset, 1);
1889 void md_create_long_jump (ptr, from_addr, to_addr, frag, to_symbol)
1891 long from_addr, to_addr;
1897 if (flagseen['m']) {
1898 offset = to_addr - S_GET_VALUE(to_symbol);
1899 md_number_to_chars (ptr, 0xe9, 1); /* opcode for long jmp */
1900 md_number_to_chars (ptr + 1, offset, 4);
1901 fix_new (frag, (ptr+1) - frag->fr_literal, 4,
1902 to_symbol, (symbolS *) 0, (long) 0, 0, NO_RELOC, (symbolS *)0);
1904 offset = to_addr - (from_addr + 5);
1905 md_number_to_chars(ptr, (long) 0xe9, 1);
1906 md_number_to_chars(ptr + 1, offset, 4);
1911 md_parse_option(argP,cntP,vecP)
1921 char *tmp = xmalloc(3+1+strlen(operand_special_chars));
1922 strcpy(tmp, operand_special_chars);
1924 operand_special_chars = tmp;
1926 /* Allow `[', `]' in expressions and `@' in operands */
1927 operand_chars['@'] = '@';
1928 operand_chars['['] = '[';
1929 operand_chars[']'] = ']';
1931 /* Disallow `[' as a name beginner */
1934 /* Predefine GOT symbol */
1935 GOT_symbol = symbol_find_or_make("__GLOBAL_OFFSET_TABLE_");
1945 /* write out in little endian. */
1946 void /* Knows about order of bytes in address. */
1947 md_number_to_chars(con, value, nbytes)
1948 char con[]; /* Return 'nbytes' of chars here. */
1949 long value; /* The value of the bits. */
1950 int nbytes; /* Number of bytes in the output. */
1952 register char * p = con;
1956 p[0] = value & 0xff;
1959 p[0] = value & 0xff;
1960 p[1] = (value >> 8) & 0xff;
1963 p[0] = value & 0xff;
1964 p[1] = (value>>8) & 0xff;
1965 p[2] = (value>>16) & 0xff;
1966 p[3] = (value>>24) & 0xff;
1974 /* Apply a fixup (fixS) to segment data, once it has been determined
1975 by our caller that we have all the info we need to fix it up.
1977 On the 386, immediates, displacements, and data pointers are all in
1978 the same (little-endian) format, so we don't need to care about which
1982 md_apply_fix (fixP, value)
1983 fixS * fixP; /* The fix we're to put in */
1984 long value; /* The value of the bits. */
1986 register char * p = fixP->fx_where + fixP->fx_frag->fr_literal;
1988 switch (fixP->fx_size) {
2003 BAD_CASE (fixP->fx_size);
2007 long /* Knows about the byte order in a word. */
2008 md_chars_to_number (con, nbytes)
2009 unsigned char con[]; /* Low order byte 1st. */
2010 int nbytes; /* Number of bytes in the input. */
2013 for (retval=0, con+=nbytes-1; nbytes--; con--)
2015 retval <<= BITS_PER_CHAR;
2021 /* Not needed for coff since relocation structure does not
2022 contain bitfields. */
2023 #if defined(OBJ_AOUT) | defined(OBJ_BOUT)
2025 /* Output relocation information in the target's format. */
2027 md_ri_to_chars(the_bytes, ri)
2029 struct reloc_info_generic *ri;
2032 md_number_to_chars(the_bytes, ri->r_address, 4);
2033 /* now the fun stuff */
2034 the_bytes[6] = (ri->r_symbolnum >> 16) & 0x0ff;
2035 the_bytes[5] = (ri->r_symbolnum >> 8) & 0x0ff;
2036 the_bytes[4] = ri->r_symbolnum & 0x0ff;
2037 the_bytes[7] = (((ri->r_extern << 3) & 0x08) | ((ri->r_length << 1) & 0x06) |
2038 ((ri->r_pcrel << 0) & 0x01)) & 0x0F;
2040 #endif /* comment */
2042 void tc_aout_fix_to_chars(where, fixP, segment_address_in_file)
2045 relax_addressT segment_address_in_file;
2048 * In: length of relocation (or of address) in chars: 1, 2 or 4.
2049 * Out: GNU LD relocation length code: 0, 1, or 2.
2052 static unsigned char nbytes_r_length[] = { 42, 0, 1, 42, 2 };
2055 know(fixP->fx_addsy != NULL);
2057 md_number_to_chars(where,
2058 fixP->fx_frag->fr_address + fixP->fx_where - segment_address_in_file,
2061 r_symbolnum = (S_IS_DEFINED(fixP->fx_addsy)
2062 ? S_GET_TYPE(fixP->fx_addsy)
2063 : fixP->fx_addsy->sy_number);
2068 int extrn_bit = !S_IS_DEFINED(fixP->fx_addsy);
2070 switch (fixP->fx_r_type) {
2074 if (!picmode || !S_IS_EXTERNAL(fixP->fx_addsy))
2076 r_symbolnum = fixP->fx_addsy->sy_number;
2080 extra_bits = (1 << 4) & 0x10; /* r_baserel */
2081 r_symbolnum = fixP->fx_addsy->sy_number;
2082 if (!extrn_bit && !S_IS_EXTERNAL(fixP->fx_addsy))
2083 as_warn("GOT relocation burb: `%s' should be global",
2084 S_GET_NAME(fixP->fx_addsy));
2085 S_SET_EXTERNAL(fixP->fx_addsy);
2089 extra_bits = (1 << 4) & 0x10; /* r_baserel */
2090 r_symbolnum = fixP->fx_addsy->sy_number;
2091 if (extrn_bit || S_IS_EXTERNAL(fixP->fx_addsy))
2092 as_warn("GOT relocation burb: `%s' should be static",
2093 S_GET_NAME(fixP->fx_addsy));
2096 extra_bits = (1 << 5) & 0x20; /* r_jmptable */
2098 case RELOC_RELATIVE:
2099 /* consider using this bit (together with r_baserel) for
2100 * GOTOFFs, so ld can check
2102 as_fatal("relocation botch");
2103 extra_bits = (1 << 6) & 0x40; /* r_relative */
2106 where[6] = (r_symbolnum >> 16) & 0x0ff;
2107 where[5] = (r_symbolnum >> 8) & 0x0ff;
2108 where[4] = r_symbolnum & 0x0ff;
2109 where[7] = ( ((extrn_bit << 3) & 0x08)
2110 | ((nbytes_r_length[fixP->fx_size] << 1) & 0x06)
2111 | ((fixP->fx_pcrel << 0) & 0x01)
2116 where[6] = (r_symbolnum >> 16) & 0x0ff;
2117 where[5] = (r_symbolnum >> 8) & 0x0ff;
2118 where[4] = r_symbolnum & 0x0ff;
2119 where[7] = ((((!S_IS_DEFINED(fixP->fx_addsy)) << 3) & 0x08)
2120 | ((nbytes_r_length[fixP->fx_size] << 1) & 0x06)
2121 | (((fixP->fx_pcrel << 0) & 0x01) & 0x0f));
2125 } /* tc_aout_fix_to_chars() */
2127 #endif /* OBJ_AOUT or OBJ_BOUT */
2130 #define MAX_LITTLENUMS 6
2132 /* Turn the string pointed to by litP into a floating point constant of type
2133 type, and emit the appropriate bytes. The number of LITTLENUMS emitted
2134 is stored in *sizeP. An error message is returned, or NULL on OK.
2137 md_atof(type,litP,sizeP)
2143 LITTLENUM_TYPE words[MAX_LITTLENUMS];
2144 LITTLENUM_TYPE *wordP;
2165 return "Bad call to md_atof ()";
2167 t = atof_ieee (input_line_pointer,type,words);
2169 input_line_pointer=t;
2171 *sizeP = prec * sizeof(LITTLENUM_TYPE);
2172 /* this loops outputs the LITTLENUMs in REVERSE order; in accord with
2173 the bigendian 386 */
2174 for (wordP = words + prec - 1;prec--;) {
2175 md_number_to_chars (litP, (long) (*wordP--), sizeof(LITTLENUM_TYPE));
2176 litP += sizeof(LITTLENUM_TYPE);
2178 return ""; /* Someone should teach Dean about null pointers */
2181 char output_invalid_buf[8];
2183 static char * output_invalid (c)
2186 if (isprint(c)) sprintf (output_invalid_buf, "'%c'", c);
2187 else sprintf (output_invalid_buf, "(0x%x)", (unsigned) c);
2188 return output_invalid_buf;
2191 static reg_entry *parse_register (reg_string)
2192 char *reg_string; /* reg_string starts *before* REGISTER_PREFIX */
2194 register char *s = reg_string;
2196 char reg_name_given[MAX_REG_NAME_SIZE];
2198 s++; /* skip REGISTER_PREFIX */
2199 for (p = reg_name_given; is_register_char (*s); p++, s++) {
2200 *p = register_chars[*s];
2201 if (p >= reg_name_given + MAX_REG_NAME_SIZE)
2202 return (reg_entry *) 0;
2205 return (reg_entry *) hash_find (reg_hash, reg_name_given);
2209 /* We have no need to default values of symbols. */
2213 md_undefined_symbol (name)
2218 * Sun's ld expects __GLOBAL_OFFSET_TABLE_,
2219 * gcc generates _GLOBAL_OFFSET_TABLE_
2220 * should probably fix ld - new SVR4 style??
2222 if (*name == '_' && *(name+1) == 'G' &&
2223 strcmp(name, "_GLOBAL_OFFSET_TABLE_") == 0)
2224 return symbol_find("__GLOBAL_OFFSET_TABLE_");
2229 /* Parse an operand that is machine-specific.
2230 We just return without modifying the expression if we have nothing
2235 md_operand (expressionP)
2236 expressionS *expressionP;
2240 /* Round up a section size to the appropriate boundary. */
2242 md_section_align (segment, size)
2246 return size; /* Byte alignment is fine */
2249 /* Exactly what point is a PC-relative offset relative TO?
2250 On the i386, they're relative to the address of the offset, plus
2251 its size. (??? Is this right? FIXME-SOON!) */
2253 md_pcrel_from (fixP)
2258 * _GLOBAL_OFFSET_TABLE_ refs are relative to the offset of the
2259 * current instruction. fx_pcrel_adjust has been setup to account
2260 * for the number of opcode bytes preceding the fixup location,
2261 * it is zero for eg. .long pseudo-ops.
2264 return fixP->fx_where + fixP->fx_frag->fr_address - fixP->fx_pcrel_adjust;
2267 return fixP->fx_size + fixP->fx_where + fixP->fx_frag->fr_address;
2270 /* these were macros, but I don't trust macros that eval their
2271 arguments more than once. Besides, gcc can static inline them.
2274 static unsigned long mode_from_disp_size(t)
2277 return((t & (Disp8))
2279 : ((t & (Disp32)) ? 2 : 0));
2280 } /* mode_from_disp_size() */
2282 /* convert opcode suffix ('b' 'w' 'l' typically) into type specifyer */
2284 static unsigned long opcode_suffix_to_type(s)
2287 return(s == BYTE_OPCODE_SUFFIX
2288 ? Byte : (s == WORD_OPCODE_SUFFIX
2290 } /* opcode_suffix_to_type() */
2292 static int fits_in_signed_byte(num)
2295 return((num >= -128) && (num <= 127));
2296 } /* fits_in_signed_byte() */
2298 static int fits_in_unsigned_byte(num)
2301 return((num & 0xff) == num);
2302 } /* fits_in_unsigned_byte() */
2304 static int fits_in_unsigned_word(num)
2307 return((num & 0xffff) == num);
2308 } /* fits_in_unsigned_word() */
2310 static int fits_in_signed_word(num)
2313 return((-32768 <= num) && (num <= 32767));
2314 } /* fits_in_signed_word() */
2316 static int smallest_imm_type(num)
2320 ? (Imm1|Imm8|Imm8S|Imm16|Imm32)
2321 : (fits_in_signed_byte(num)
2322 ? (Imm8S|Imm8|Imm16|Imm32)
2323 : (fits_in_unsigned_byte(num)
2324 ? (Imm8|Imm16|Imm32)
2325 : ((fits_in_signed_word(num) || fits_in_unsigned_word(num))
2328 } /* smallest_imm_type() */
2334 temp = get_absolute_expression ();
2335 subseg_new (SEG_BSS, (subsegT)temp);
2336 demand_empty_rest_of_line();
2345 /* end of tc-i386.c */