sys/dev/disk/mpt/mpilib/mpi_cnfg.h

   1 /* $FreeBSD: src/sys/dev/mpt/mpilib/mpi_cnfg.h,v 1.1.2.2 2002/09/01 23:08:06 mjacob Exp $ */
   2 /* $DragonFly: src/sys/dev/disk/mpt/mpilib/mpi_cnfg.h,v 1.2 2003/06/17 04:28:28 dillon Exp $ */
   3 /*
   4  * Copyright (c) 2000, 2001 by LSI Logic Corporation
   5  *
   6  * Redistribution and use in source and binary forms, with or without
   7  * modification, are permitted provided that the following conditions
   8  * are met:
   9  * 1. Redistributions of source code must retain the above copyright
  10  *    notice immediately at the beginning of the file, without modification,
  11  *    this list of conditions, and the following disclaimer.
  12  * 2. The name of the author may not be used to endorse or promote products
  13  *    derived from this software without specific prior written permission.
  14  *
  15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
  16  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  17  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  18  * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
  19  * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  20  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  21  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  22  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  23  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  24  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  25  * SUCH DAMAGE.
  26  *
  27  *
  28  *           Name:  MPI_CNFG.H
  29  *          Title:  MPI Config message, structures, and Pages
  30  *  Creation Date:  July 27, 2000
  31  *
  32  *    MPI Version:  01.02.05
  33  *
  34  *  Version History
  35  *  ---------------
  36  *
  37  *  Date      Version   Description
  38  *  --------  --------  ------------------------------------------------------
  39  *  05-08-00  00.10.01  Original release for 0.10 spec dated 4/26/2000.
  40  *  06-06-00  01.00.01  Update version number for 1.0 release.
  41  *  06-08-00  01.00.02  Added _PAGEVERSION definitions for all pages.
  42  *                      Added FcPhLowestVersion, FcPhHighestVersion, Reserved2
  43  *                      fields to FC_DEVICE_0 page, updated the page version.
  44  *                      Changed _FREE_RUNNING_CLOCK to _PACING_TRANSFERS in
  45  *                      SCSI_PORT_0, SCSI_DEVICE_0 and SCSI_DEVICE_1 pages
  46  *                      and updated the page versions.
  47  *                      Added _RESPONSE_ID_MASK definition to SCSI_PORT_1
  48  *                      page and updated the page version.
  49  *                      Added Information field and _INFO_PARAMS_NEGOTIATED
  50  *                      definitionto SCSI_DEVICE_0 page.
  51  *  06-22-00  01.00.03  Removed batch controls from LAN_0 page and updated the
  52  *                      page version.
  53  *                      Added BucketsRemaining to LAN_1 page, redefined the
  54  *                      state values, and updated the page version.
  55  *                      Revised bus width definitions in SCSI_PORT_0,
  56  *                      SCSI_DEVICE_0 and SCSI_DEVICE_1 pages.
  57  *  06-30-00  01.00.04  Added MaxReplySize to LAN_1 page and updated the page
  58  *                      version.
  59  *                      Moved FC_DEVICE_0 PageAddress description to spec.
  60  *  07-27-00  01.00.05  Corrected the SubsystemVendorID and SubsystemID field
  61  *                      widths in IOC_0 page and updated the page version.
  62  *  11-02-00  01.01.01  Original release for post 1.0 work
  63  *                      Added Manufacturing pages, IO Unit Page 2, SCSI SPI
  64  *                      Port Page 2, FC Port Page 4, FC Port Page 5
  65  *  11-15-00  01.01.02  Interim changes to match proposals
  66  *  12-04-00  01.01.03  Config page changes to match MPI rev 1.00.01.
  67  *  12-05-00  01.01.04  Modified config page actions.
  68  *  01-09-01  01.01.05  Added defines for page address formats.
  69  *                      Data size for Manufacturing pages 2 and 3 no longer
  70  *                      defined here.
  71  *                      Io Unit Page 2 size is fixed at 4 adapters and some
  72  *                      flags were changed.
  73  *                      SCSI Port Page 2 Device Settings modified.
  74  *                      New fields added to FC Port Page 0 and some flags
  75  *                      cleaned up.
  76  *                      Removed impedance flash from FC Port Page 1.
  77  *                      Added FC Port pages 6 and 7.
  78  *  01-25-01  01.01.06  Added MaxInitiators field to FcPortPage0.
  79  *  01-29-01  01.01.07  Changed some defines to make them 32 character unique.
  80  *                      Added some LinkType defines for FcPortPage0.
  81  *  02-20-01  01.01.08  Started using MPI_POINTER.
  82  *  02-27-01  01.01.09  Replaced MPI_CONFIG_PAGETYPE_SCSI_LUN with
  83  *                      MPI_CONFIG_PAGETYPE_RAID_VOLUME.
  84  *                      Added definitions and structures for IOC Page 2 and
  85  *                      RAID Volume Page 2.
  86  *  03-27-01  01.01.10  Added CONFIG_PAGE_FC_PORT_8 and CONFIG_PAGE_FC_PORT_9.
  87  *                      CONFIG_PAGE_FC_PORT_3 now supports persistent by DID.
  88  *                      Added VendorId and ProductRevLevel fields to
  89  *                      RAIDVOL2_IM_PHYS_ID struct.
  90  *                      Modified values for MPI_FCPORTPAGE0_FLAGS_ATTACH_
  91  *                      defines to make them compatible to MPI version 1.0.
  92  *                      Added structure offset comments.
  93  *  04-09-01  01.01.11  Added some new defines for the PageAddress field and
  94  *                      removed some obsolete ones.
  95  *                      Added IO Unit Page 3.
  96  *                      Modified defines for Scsi Port Page 2.
  97  *                      Modified RAID Volume Pages.
  98  *  08-08-01  01.02.01  Original release for v1.2 work.
  99  *                      Added SepID and SepBus to RVP2 IMPhysicalDisk struct.
 100  *                      Added defines for the SEP bits in RVP2 VolumeSettings.
 101  *                      Modified the DeviceSettings field in RVP2 to use the
 102  *                      proper structure.
 103  *                      Added defines for SES, SAF-TE, and cross channel for
 104  *                      IOCPage2 CapabilitiesFlags.
 105  *                      Removed define for MPI_IOUNITPAGE2_FLAGS_RAID_DISABLE.
 106  *                      Removed define for
 107  *                      MPI_SCSIPORTPAGE2_PORT_FLAGS_PARITY_ENABLE.
 108  *                      Added define for MPI_CONFIG_PAGEATTR_RO_PERSISTENT.
 109  *  08-29-01 01.02.02   Fixed value for MPI_MANUFACTPAGE_DEVID_53C1035.
 110  *                      Added defines for MPI_FCPORTPAGE1_FLAGS_HARD_ALPA_ONLY
 111  *                      and MPI_FCPORTPAGE1_FLAGS_IMMEDIATE_ERROR_REPLY.
 112  *                      Removed MPI_SCSIPORTPAGE0_CAP_PACING_TRANSFERS,
 113  *                      MPI_SCSIDEVPAGE0_NP_PACING_TRANSFERS, and
 114  *                      MPI_SCSIDEVPAGE1_RP_PACING_TRANSFERS, and
 115  *                      MPI_SCSIDEVPAGE1_CONF_PPR_ALLOWED.
 116  *                      Added defines for MPI_SCSIDEVPAGE1_CONF_WDTR_DISALLOWED
 117  *                      and MPI_SCSIDEVPAGE1_CONF_SDTR_DISALLOWED.
 118  *                      Added OnBusTimerValue to CONFIG_PAGE_SCSI_PORT_1.
 119  *                      Added rejected bits to SCSI Device Page 0 Information.
 120  *                      Increased size of ALPA array in FC Port Page 2 by one
 121  *                      and removed a one byte reserved field.
 122  *  09-28-01 01.02.03   Swapped NegWireSpeedLow and NegWireSpeedLow in
 123  *                      CONFIG_PAGE_LAN_1 to match preferred 64-bit ordering.
 124  *                      Added structures for Manufacturing Page 4, IO Unit
 125  *                      Page 3, IOC Page 3, IOC Page 4, RAID Volume Page 0, and
 126  *                      RAID PhysDisk Page 0.
 127  *  10-04-01 01.02.04   Added define for MPI_CONFIG_PAGETYPE_RAID_PHYSDISK.
 128  *                      Modified some of the new defines to make them 32
 129  *                      character unique.
 130  *                      Modified how variable length pages (arrays) are defined.
 131  *                      Added generic defines for hot spare pools and RAID
 132  *                      volume types.
 133  *  11-01-01 01.02.05   Added define for MPI_IOUNITPAGE1_DISABLE_IR.
 134  *  --------------------------------------------------------------------------
 135  */
 136
 137 #ifndef MPI_CNFG_H
 138 #define MPI_CNFG_H
 139
 140
 141 /*****************************************************************************
 142 *
 143 *       C o n f i g    M e s s a g e    a n d    S t r u c t u r e s
 144 *
 145 *****************************************************************************/
 146
 147 typedef struct _CONFIG_PAGE_HEADER
 148 {
 149     U8                      PageVersion;                /* 00h */
 150     U8                      PageLength;                 /* 01h */
 151     U8                      PageNumber;                 /* 02h */
 152     U8                      PageType;                   /* 03h */
 153 } fCONFIG_PAGE_HEADER, MPI_POINTER PTR_CONFIG_PAGE_HEADER,
 154   ConfigPageHeader_t, MPI_POINTER pConfigPageHeader_t;
 155
 156 typedef union _CONFIG_PAGE_HEADER_UNION
 157 {
 158    ConfigPageHeader_t  Struct;
 159    U8                  Bytes[4];
 160    U16                 Word16[2];
 161    U32                 Word32;
 162 } ConfigPageHeaderUnion, MPI_POINTER pConfigPageHeaderUnion,
 163   fCONFIG_PAGE_HEADER_UNION, MPI_POINTER PTR_CONFIG_PAGE_HEADER_UNION;
 164
 165
 166 /****************************************************************************
 167 *   PageType field values
 168 ****************************************************************************/
 169 #define MPI_CONFIG_PAGEATTR_READ_ONLY               (0x00)
 170 #define MPI_CONFIG_PAGEATTR_CHANGEABLE              (0x10)
 171 #define MPI_CONFIG_PAGEATTR_PERSISTENT              (0x20)
 172 #define MPI_CONFIG_PAGEATTR_RO_PERSISTENT           (0x30)
 173 #define MPI_CONFIG_PAGEATTR_MASK                    (0xF0)
 174
 175 #define MPI_CONFIG_PAGETYPE_IO_UNIT                 (0x00)
 176 #define MPI_CONFIG_PAGETYPE_IOC                     (0x01)
 177 #define MPI_CONFIG_PAGETYPE_BIOS                    (0x02)
 178 #define MPI_CONFIG_PAGETYPE_SCSI_PORT               (0x03)
 179 #define MPI_CONFIG_PAGETYPE_SCSI_DEVICE             (0x04)
 180 #define MPI_CONFIG_PAGETYPE_FC_PORT                 (0x05)
 181 #define MPI_CONFIG_PAGETYPE_FC_DEVICE               (0x06)
 182 #define MPI_CONFIG_PAGETYPE_LAN                     (0x07)
 183 #define MPI_CONFIG_PAGETYPE_RAID_VOLUME             (0x08)
 184 #define MPI_CONFIG_PAGETYPE_MANUFACTURING           (0x09)
 185 #define MPI_CONFIG_PAGETYPE_RAID_PHYSDISK           (0x0A)
 186 #define MPI_CONFIG_PAGETYPE_MASK                    (0x0F)
 187
 188 #define MPI_CONFIG_TYPENUM_MASK                     (0x0FFF)
 189
 190
 191 /****************************************************************************
 192 *   PageAddress field values
 193 ****************************************************************************/
 194 #define MPI_SCSI_PORT_PGAD_PORT_MASK                (0x000000FF)
 195
 196 #define MPI_SCSI_DEVICE_TARGET_ID_MASK              (0x000000FF)
 197 #define MPI_SCSI_DEVICE_TARGET_ID_SHIFT             (0)
 198 #define MPI_SCSI_DEVICE_BUS_MASK                    (0x0000FF00)
 199 #define MPI_SCSI_DEVICE_BUS_SHIFT                   (8)
 200
 201 #define MPI_FC_PORT_PGAD_PORT_MASK                  (0xF0000000)
 202 #define MPI_FC_PORT_PGAD_PORT_SHIFT                 (28)
 203 #define MPI_FC_PORT_PGAD_FORM_MASK                  (0x0F000000)
 204 #define MPI_FC_PORT_PGAD_FORM_INDEX                 (0x01000000)
 205 #define MPI_FC_PORT_PGAD_INDEX_MASK                 (0x0000FFFF)
 206 #define MPI_FC_PORT_PGAD_INDEX_SHIFT                (0)
 207
 208 #define MPI_FC_DEVICE_PGAD_PORT_MASK                (0xF0000000)
 209 #define MPI_FC_DEVICE_PGAD_PORT_SHIFT               (28)
 210 #define MPI_FC_DEVICE_PGAD_FORM_MASK                (0x0F000000)
 211 #define MPI_FC_DEVICE_PGAD_FORM_NEXT_DID            (0x00000000)
 212 #define MPI_FC_DEVICE_PGAD_ND_PORT_MASK             (0xF0000000)
 213 #define MPI_FC_DEVICE_PGAD_ND_PORT_SHIFT            (28)
 214 #define MPI_FC_DEVICE_PGAD_ND_DID_MASK              (0x00FFFFFF)
 215 #define MPI_FC_DEVICE_PGAD_ND_DID_SHIFT             (0)
 216 #define MPI_FC_DEVICE_PGAD_FORM_BUS_TID             (0x01000000)
 217 #define MPI_FC_DEVICE_PGAD_BT_BUS_MASK              (0x0000FF00)
 218 #define MPI_FC_DEVICE_PGAD_BT_BUS_SHIFT             (8)
 219 #define MPI_FC_DEVICE_PGAD_BT_TID_MASK              (0x000000FF)
 220 #define MPI_FC_DEVICE_PGAD_BT_TID_SHIFT             (0)
 221
 222 #define MPI_PHYSDISK_PGAD_PHYSDISKNUM_MASK          (0x000000FF)
 223 #define MPI_PHYSDISK_PGAD_PHYSDISKNUM_SHIFT         (0)
 224
 225
 226
 227 /****************************************************************************
 228 *   Config Request Message
 229 ****************************************************************************/
 230 typedef struct _MSG_CONFIG
 231 {
 232     U8                      Action;                     /* 00h */
 233     U8                      Reserved;                   /* 01h */
 234     U8                      ChainOffset;                /* 02h */
 235     U8                      Function;                   /* 03h */
 236     U8                      Reserved1[3];               /* 04h */
 237     U8                      MsgFlags;                   /* 07h */
 238     U32                     MsgContext;                 /* 08h */
 239     U8                      Reserved2[8];               /* 0Ch */
 240     fCONFIG_PAGE_HEADER      Header;                     /* 14h */
 241     U32                     PageAddress;                /* 18h */
 242     SGE_IO_UNION            PageBufferSGE;              /* 1Ch */
 243 } MSG_CONFIG, MPI_POINTER PTR_MSG_CONFIG,
 244   Config_t, MPI_POINTER pConfig_t;
 245
 246
 247 /****************************************************************************
 248 *   Action field values
 249 ****************************************************************************/
 250 #define MPI_CONFIG_ACTION_PAGE_HEADER               (0x00)
 251 #define MPI_CONFIG_ACTION_PAGE_READ_CURRENT         (0x01)
 252 #define MPI_CONFIG_ACTION_PAGE_WRITE_CURRENT        (0x02)
 253 #define MPI_CONFIG_ACTION_PAGE_DEFAULT              (0x03)
 254 #define MPI_CONFIG_ACTION_PAGE_WRITE_NVRAM          (0x04)
 255 #define MPI_CONFIG_ACTION_PAGE_READ_DEFAULT         (0x05)
 256 #define MPI_CONFIG_ACTION_PAGE_READ_NVRAM           (0x06)
 257
 258
 259 /* Config Reply Message */
 260 typedef struct _MSG_CONFIG_REPLY
 261 {
 262     U8                      Action;                     /* 00h */
 263     U8                      Reserved;                   /* 01h */
 264     U8                      MsgLength;                  /* 02h */
 265     U8                      Function;                   /* 03h */
 266     U8                      Reserved1[3];               /* 04h */
 267     U8                      MsgFlags;                   /* 07h */
 268     U32                     MsgContext;                 /* 08h */
 269     U8                      Reserved2[2];               /* 0Ch */
 270     U16                     IOCStatus;                  /* 0Eh */
 271     U32                     IOCLogInfo;                 /* 10h */
 272     fCONFIG_PAGE_HEADER      Header;                     /* 14h */
 273 } MSG_CONFIG_REPLY, MPI_POINTER PTR_MSG_CONFIG_REPLY,
 274   ConfigReply_t, MPI_POINTER pConfigReply_t;
 275
 276
 277
 278 /*****************************************************************************
 279 *
 280 *               C o n f i g u r a t i o n    P a g e s
 281 *
 282 *****************************************************************************/
 283
 284 /****************************************************************************
 285 *   Manufacturing Config pages
 286 ****************************************************************************/
 287 #define MPI_MANUFACTPAGE_DEVICEID_FC909             (0x0621)
 288 #define MPI_MANUFACTPAGE_DEVICEID_FC919             (0x0624)
 289 #define MPI_MANUFACTPAGE_DEVICEID_FC929             (0x0622)
 290 #define MPI_MANUFACTPAGE_DEVICEID_FC919X            (0x0628)
 291 #define MPI_MANUFACTPAGE_DEVICEID_FC929X            (0x0626)
 292 #define MPI_MANUFACTPAGE_DEVID_53C1030              (0x0030)
 293 #define MPI_MANUFACTPAGE_DEVID_53C1030ZC            (0x0031)
 294 #define MPI_MANUFACTPAGE_DEVID_1030_53C1035         (0x0032)
 295 #define MPI_MANUFACTPAGE_DEVID_1030ZC_53C1035       (0x0033)
 296 #define MPI_MANUFACTPAGE_DEVID_53C1035              (0x0040)
 297 #define MPI_MANUFACTPAGE_DEVID_53C1035ZC            (0x0041)
 298
 299 typedef struct _CONFIG_PAGE_MANUFACTURING_0
 300 {
 301     fCONFIG_PAGE_HEADER      Header;                     /* 00h */
 302     U8                      ChipName[16];               /* 04h */
 303     U8                      ChipRevision[8];            /* 14h */
 304     U8                      BoardName[16];              /* 1Ch */
 305     U8                      BoardAssembly[16];          /* 2Ch */
 306     U8                      BoardTracerNumber[16];      /* 3Ch */
 307
 308 } fCONFIG_PAGE_MANUFACTURING_0, MPI_POINTER PTR_CONFIG_PAGE_MANUFACTURING_0,
 309   ManufacturingPage0_t, MPI_POINTER pManufacturingPage0_t;
 310
 311 #define MPI_MANUFACTURING0_PAGEVERSION                 (0x00)
 312
 313
 314 typedef struct _CONFIG_PAGE_MANUFACTURING_1
 315 {
 316     fCONFIG_PAGE_HEADER      Header;                     /* 00h */
 317     U8                      VPD[256];                   /* 04h */
 318 } fCONFIG_PAGE_MANUFACTURING_1, MPI_POINTER PTR_CONFIG_PAGE_MANUFACTURING_1,
 319   ManufacturingPage1_t, MPI_POINTER pManufacturingPage1_t;
 320
 321 #define MPI_MANUFACTURING1_PAGEVERSION                 (0x00)
 322
 323
 324 typedef struct _MPI_CHIP_REVISION_ID
 325 {
 326     U16 DeviceID;                                       /* 00h */
 327     U8  PCIRevisionID;                                  /* 02h */
 328     U8  Reserved;                                       /* 03h */
 329 } MPI_CHIP_REVISION_ID, MPI_POINTER PTR_MPI_CHIP_REVISION_ID,
 330   MpiChipRevisionId_t, MPI_POINTER pMpiChipRevisionId_t;
 331
 332
 333 /*
 334  * Host code (drivers, BIOS, utilities, etc.) should leave this define set to
 335  * one and check Header.PageLength at runtime.
 336  */
 337 #ifndef MPI_MAN_PAGE_2_HW_SETTINGS_WORDS
 338 #define MPI_MAN_PAGE_2_HW_SETTINGS_WORDS    (1)
 339 #endif
 340
 341 typedef struct _CONFIG_PAGE_MANUFACTURING_2
 342 {
 343     fCONFIG_PAGE_HEADER      Header;                                 /* 00h */
 344     MPI_CHIP_REVISION_ID    ChipId;                                 /* 04h */
 345     U32                     HwSettings[MPI_MAN_PAGE_2_HW_SETTINGS_WORDS];/* 08h */
 346 } fCONFIG_PAGE_MANUFACTURING_2, MPI_POINTER PTR_CONFIG_PAGE_MANUFACTURING_2,
 347   ManufacturingPage2_t, MPI_POINTER pManufacturingPage2_t;
 348
 349 #define MPI_MANUFACTURING2_PAGEVERSION                  (0x00)
 350
 351
 352 /*
 353  * Host code (drivers, BIOS, utilities, etc.) should leave this define set to
 354  * one and check Header.PageLength at runtime.
 355  */
 356 #ifndef MPI_MAN_PAGE_3_INFO_WORDS
 357 #define MPI_MAN_PAGE_3_INFO_WORDS           (1)
 358 #endif
 359
 360 typedef struct _CONFIG_PAGE_MANUFACTURING_3
 361 {
 362     fCONFIG_PAGE_HEADER                  Header;                     /* 00h */
 363     MPI_CHIP_REVISION_ID                ChipId;                     /* 04h */
 364     U32                                 Info[MPI_MAN_PAGE_3_INFO_WORDS];/* 08h */
 365 } fCONFIG_PAGE_MANUFACTURING_3, MPI_POINTER PTR_CONFIG_PAGE_MANUFACTURING_3,
 366   ManufacturingPage3_t, MPI_POINTER pManufacturingPage3_t;
 367
 368 #define MPI_MANUFACTURING3_PAGEVERSION                  (0x00)
 369
 370
 371 typedef struct _CONFIG_PAGE_MANUFACTURING_4
 372 {
 373     fCONFIG_PAGE_HEADER              Header;             /* 00h */
 374     U32                             Reserved1;          /* 04h */
 375     U8                              InfoOffset0;        /* 08h */
 376     U8                              InfoSize0;          /* 09h */
 377     U8                              InfoOffset1;        /* 0Ah */
 378     U8                              InfoSize1;          /* 0Bh */
 379     U8                              InquirySize;        /* 0Ch */
 380     U8                              Reserved2;          /* 0Dh */
 381     U16                             Reserved3;          /* 0Eh */
 382     U8                              InquiryData[56];    /* 10h */
 383     U32                             ISVolumeSettings;   /* 48h */
 384     U32                             IMEVolumeSettings;  /* 4Ch */
 385     U32                             IMVolumeSettings;   /* 50h */
 386 } fCONFIG_PAGE_MANUFACTURING_4, MPI_POINTER PTR_CONFIG_PAGE_MANUFACTURING_4,
 387   ManufacturingPage4_t, MPI_POINTER pManufacturingPage4_t;
 388
 389 #define MPI_MANUFACTURING4_PAGEVERSION                  (0x00)
 390
 391
 392 /****************************************************************************
 393 *   IO Unit Config Pages
 394 ****************************************************************************/
 395
 396 typedef struct _CONFIG_PAGE_IO_UNIT_0
 397 {
 398     fCONFIG_PAGE_HEADER      Header;                     /* 00h */
 399     U64                     UniqueValue;                /* 04h */
 400 } fCONFIG_PAGE_IO_UNIT_0, MPI_POINTER PTR_CONFIG_PAGE_IO_UNIT_0,
 401   IOUnitPage0_t, MPI_POINTER pIOUnitPage0_t;
 402
 403 #define MPI_IOUNITPAGE0_PAGEVERSION                     (0x00)
 404
 405
 406 typedef struct _CONFIG_PAGE_IO_UNIT_1
 407 {
 408     fCONFIG_PAGE_HEADER      Header;                     /* 00h */
 409     U32                     Flags;                      /* 04h */
 410 } fCONFIG_PAGE_IO_UNIT_1, MPI_POINTER PTR_CONFIG_PAGE_IO_UNIT_1,
 411   IOUnitPage1_t, MPI_POINTER pIOUnitPage1_t;
 412
 413 #define MPI_IOUNITPAGE1_PAGEVERSION                     (0x00)
 414
 415 /* IO Unit Page 1 Flags defines */
 416
 417 #define MPI_IOUNITPAGE1_MULTI_FUNCTION                  (0x00000000)
 418 #define MPI_IOUNITPAGE1_SINGLE_FUNCTION                 (0x00000001)
 419 #define MPI_IOUNITPAGE1_MULTI_PATHING                   (0x00000002)
 420 #define MPI_IOUNITPAGE1_SINGLE_PATHING                  (0x00000000)
 421 #define MPI_IOUNITPAGE1_DISABLE_IR                      (0x00000040)
 422 #define MPI_IOUNITPAGE1_FORCE_32                        (0x00000080)
 423
 424
 425 typedef struct _MPI_ADAPTER_INFO
 426 {
 427     U8      PciBusNumber;                               /* 00h */
 428     U8      PciDeviceAndFunctionNumber;                 /* 01h */
 429     U16     AdapterFlags;                               /* 02h */
 430 } MPI_ADAPTER_INFO, MPI_POINTER PTR_MPI_ADAPTER_INFO,
 431   MpiAdapterInfo_t, MPI_POINTER pMpiAdapterInfo_t;
 432
 433 #define MPI_ADAPTER_INFO_FLAGS_EMBEDDED                 (0x0001)
 434 #define MPI_ADAPTER_INFO_FLAGS_INIT_STATUS              (0x0002)
 435
 436 typedef struct _CONFIG_PAGE_IO_UNIT_2
 437 {
 438     fCONFIG_PAGE_HEADER      Header;                     /* 00h */
 439     U32                     Flags;                      /* 04h */
 440     U32                     BiosVersion;                /* 08h */
 441     MPI_ADAPTER_INFO        AdapterOrder[4];            /* 0Ch */
 442 } fCONFIG_PAGE_IO_UNIT_2, MPI_POINTER PTR_CONFIG_PAGE_IO_UNIT_2,
 443   IOUnitPage2_t, MPI_POINTER pIOUnitPage2_t;
 444
 445 #define MPI_IOUNITPAGE2_PAGEVERSION                     (0x00)
 446
 447 #define MPI_IOUNITPAGE2_FLAGS_PAUSE_ON_ERROR            (0x00000002)
 448 #define MPI_IOUNITPAGE2_FLAGS_VERBOSE_ENABLE            (0x00000004)
 449 #define MPI_IOUNITPAGE2_FLAGS_COLOR_VIDEO_DISABLE       (0x00000008)
 450 #define MPI_IOUNITPAGE2_FLAGS_DONT_HOOK_INT_40          (0x00000010)
 451
 452
 453 /*
 454  * Host code (drivers, BIOS, utilities, etc.) should leave this define set to
 455  * one and check Header.PageLength at runtime.
 456  */
 457 #ifndef MPI_IO_UNIT_PAGE_3_GPIO_VAL_MAX
 458 #define MPI_IO_UNIT_PAGE_3_GPIO_VAL_MAX     (1)
 459 #endif
 460
 461 typedef struct _CONFIG_PAGE_IO_UNIT_3
 462 {
 463     fCONFIG_PAGE_HEADER      Header;                                   /* 00h */
 464     U8                      GPIOCount;                                /* 04h */
 465     U8                      Reserved1;                                /* 05h */
 466     U16                     Reserved2;                                /* 06h */
 467     U16                     GPIOVal[MPI_IO_UNIT_PAGE_3_GPIO_VAL_MAX]; /* 08h */
 468 } fCONFIG_PAGE_IO_UNIT_3, MPI_POINTER PTR_CONFIG_PAGE_IO_UNIT_3,
 469   IOUnitPage3_t, MPI_POINTER pIOUnitPage3_t;
 470
 471 #define MPI_IOUNITPAGE3_PAGEVERSION                     (0x01)
 472
 473 #define MPI_IOUNITPAGE3_GPIO_FUNCTION_MASK              (0xFC)
 474 #define MPI_IOUNITPAGE3_GPIO_FUNCTION_SHIFT             (2)
 475 #define MPI_IOUNITPAGE3_GPIO_SETTING_OFF                (0x00)
 476 #define MPI_IOUNITPAGE3_GPIO_SETTING_ON                 (0x01)
 477
 478
 479 /****************************************************************************
 480 *   IOC Config Pages
 481 ****************************************************************************/
 482
 483 typedef struct _CONFIG_PAGE_IOC_0
 484 {
 485     fCONFIG_PAGE_HEADER      Header;                     /* 00h */
 486     U32                     TotalNVStore;               /* 04h */
 487     U32                     FreeNVStore;                /* 08h */
 488     U16                     VendorID;                   /* 0Ch */
 489     U16                     DeviceID;                   /* 0Eh */
 490     U8                      RevisionID;                 /* 10h */
 491     U8                      Reserved[3];                /* 11h */
 492     U32                     ClassCode;                  /* 14h */
 493     U16                     SubsystemVendorID;          /* 18h */
 494     U16                     SubsystemID;                /* 1Ah */
 495 } fCONFIG_PAGE_IOC_0, MPI_POINTER PTR_CONFIG_PAGE_IOC_0,
 496   IOCPage0_t, MPI_POINTER pIOCPage0_t;
 497
 498 #define MPI_IOCPAGE0_PAGEVERSION                        (0x01)
 499
 500
 501 typedef struct _CONFIG_PAGE_IOC_1
 502 {
 503     fCONFIG_PAGE_HEADER      Header;                     /* 00h */
 504     U32                     Flags;                      /* 04h */
 505     U32                     CoalescingTimeout;          /* 08h */
 506     U8                      CoalescingDepth;            /* 0Ch */
 507     U8                      Reserved[3];                /* 0Dh */
 508 } fCONFIG_PAGE_IOC_1, MPI_POINTER PTR_CONFIG_PAGE_IOC_1,
 509   IOCPage1_t, MPI_POINTER pIOCPage1_t;
 510
 511 #define MPI_IOCPAGE1_PAGEVERSION                        (0x00)
 512
 513 #define MPI_IOCPAGE1_REPLY_COALESCING                   (0x00000001)
 514
 515
 516 typedef struct _CONFIG_PAGE_IOC_2_RAID_VOL
 517 {
 518     U8                          VolumeID;               /* 00h */
 519     U8                          VolumeBus;              /* 01h */
 520     U8                          VolumeIOC;              /* 02h */
 521     U8                          VolumePageNumber;       /* 03h */
 522     U8                          VolumeType;             /* 04h */
 523     U8                          Reserved2;              /* 05h */
 524     U16                         Reserved3;              /* 06h */
 525 } fCONFIG_PAGE_IOC_2_RAID_VOL, MPI_POINTER PTR_CONFIG_PAGE_IOC_2_RAID_VOL,
 526   ConfigPageIoc2RaidVol_t, MPI_POINTER pConfigPageIoc2RaidVol_t;
 527
 528 /*
 529  * Host code (drivers, BIOS, utilities, etc.) should leave this define set to
 530  * one and check Header.PageLength at runtime.
 531  */
 532 #ifndef MPI_IOC_PAGE_2_RAID_VOLUME_MAX
 533 #define MPI_IOC_PAGE_2_RAID_VOLUME_MAX      (1)
 534 #endif
 535
 536 typedef struct _CONFIG_PAGE_IOC_2
 537 {
 538     fCONFIG_PAGE_HEADER          Header;                              /* 00h */
 539     U32                         CapabilitiesFlags;                   /* 04h */
 540     U8                          NumActiveVolumes;                    /* 08h */
 541     U8                          MaxVolumes;                          /* 09h */
 542     U8                          NumActivePhysDisks;                  /* 0Ah */
 543     U8                          MaxPhysDisks;                        /* 0Bh */
 544     fCONFIG_PAGE_IOC_2_RAID_VOL  RaidVolume[MPI_IOC_PAGE_2_RAID_VOLUME_MAX];/* 0Ch */
 545 } fCONFIG_PAGE_IOC_2, MPI_POINTER PTR_CONFIG_PAGE_IOC_2,
 546   IOCPage2_t, MPI_POINTER pIOCPage2_t;
 547
 548 #define MPI_IOCPAGE2_PAGEVERSION                        (0x01)
 549
 550 /* IOC Page 2 Capabilities flags */
 551
 552 #define MPI_IOCPAGE2_CAP_FLAGS_IS_SUPPORT               (0x00000001)
 553 #define MPI_IOCPAGE2_CAP_FLAGS_IME_SUPPORT              (0x00000002)
 554 #define MPI_IOCPAGE2_CAP_FLAGS_IM_SUPPORT               (0x00000004)
 555 #define MPI_IOCPAGE2_CAP_FLAGS_SES_SUPPORT              (0x20000000)
 556 #define MPI_IOCPAGE2_CAP_FLAGS_SAFTE_SUPPORT            (0x40000000)
 557 #define MPI_IOCPAGE2_CAP_FLAGS_CROSS_CHANNEL_SUPPORT    (0x80000000)
 558
 559 /* IOC Page 2 Volume RAID Type values, also used in RAID Volume pages */
 560
 561 #define MPI_RAID_VOL_TYPE_IS                        (0x00)
 562 #define MPI_RAID_VOL_TYPE_IME                       (0x01)
 563 #define MPI_RAID_VOL_TYPE_IM                        (0x02)
 564
 565
 566 typedef struct _IOC_3_PHYS_DISK
 567 {
 568     U8                          PhysDiskID;             /* 00h */
 569     U8                          PhysDiskBus;            /* 01h */
 570     U8                          PhysDiskIOC;            /* 02h */
 571     U8                          PhysDiskNum;            /* 03h */
 572 } IOC_3_PHYS_DISK, MPI_POINTER PTR_IOC_3_PHYS_DISK,
 573   Ioc3PhysDisk_t, MPI_POINTER pIoc3PhysDisk_t;
 574
 575 /*
 576  * Host code (drivers, BIOS, utilities, etc.) should leave this define set to
 577  * one and check Header.PageLength at runtime.
 578  */
 579 #ifndef MPI_IOC_PAGE_3_PHYSDISK_MAX
 580 #define MPI_IOC_PAGE_3_PHYSDISK_MAX         (1)
 581 #endif
 582
 583 typedef struct _CONFIG_PAGE_IOC_3
 584 {
 585     fCONFIG_PAGE_HEADER          Header;                                /* 00h */
 586     U8                          NumPhysDisks;                          /* 04h */
 587     U8                          Reserved1;                             /* 05h */
 588     U16                         Reserved2;                             /* 06h */
 589     IOC_3_PHYS_DISK             PhysDisk[MPI_IOC_PAGE_3_PHYSDISK_MAX]; /* 08h */
 590 } fCONFIG_PAGE_IOC_3, MPI_POINTER PTR_CONFIG_PAGE_IOC_3,
 591   IOCPage3_t, MPI_POINTER pIOCPage3_t;
 592
 593 #define MPI_IOCPAGE3_PAGEVERSION                        (0x00)
 594
 595
 596 typedef struct _IOC_4_SEP
 597 {
 598     U8                          SEPTargetID;            /* 00h */
 599     U8                          SEPBus;                 /* 01h */
 600     U16                         Reserved;               /* 02h */
 601 } IOC_4_SEP, MPI_POINTER PTR_IOC_4_SEP,
 602   Ioc4Sep_t, MPI_POINTER pIoc4Sep_t;
 603
 604 /*
 605  * Host code (drivers, BIOS, utilities, etc.) should leave this define set to
 606  * one and check Header.PageLength at runtime.
 607  */
 608 #ifndef MPI_IOC_PAGE_4_SEP_MAX
 609 #define MPI_IOC_PAGE_4_SEP_MAX              (1)
 610 #endif
 611
 612 typedef struct _CONFIG_PAGE_IOC_4
 613 {
 614     fCONFIG_PAGE_HEADER          Header;                         /* 00h */
 615     U8                          ActiveSEP;                      /* 04h */
 616     U8                          MaxSEP;                         /* 05h */
 617     U16                         Reserved1;                      /* 06h */
 618     IOC_4_SEP                   SEP[MPI_IOC_PAGE_4_SEP_MAX];    /* 08h */
 619 } fCONFIG_PAGE_IOC_4, MPI_POINTER PTR_CONFIG_PAGE_IOC_4,
 620   IOCPage4_t, MPI_POINTER pIOCPage4_t;
 621
 622 #define MPI_IOCPAGE4_PAGEVERSION                        (0x00)
 623
 624
 625 /****************************************************************************
 626 *   SCSI Port Config Pages
 627 ****************************************************************************/
 628
 629 typedef struct _CONFIG_PAGE_SCSI_PORT_0
 630 {
 631     fCONFIG_PAGE_HEADER      Header;                     /* 00h */
 632     U32                     Capabilities;               /* 04h */
 633     U32                     PhysicalInterface;          /* 08h */
 634 } fCONFIG_PAGE_SCSI_PORT_0, MPI_POINTER PTR_CONFIG_PAGE_SCSI_PORT_0,
 635   SCSIPortPage0_t, MPI_POINTER pSCSIPortPage0_t;
 636
 637 #define MPI_SCSIPORTPAGE0_PAGEVERSION                   (0x01)
 638
 639 #define MPI_SCSIPORTPAGE0_CAP_IU                        (0x00000001)
 640 #define MPI_SCSIPORTPAGE0_CAP_DT                        (0x00000002)
 641 #define MPI_SCSIPORTPAGE0_CAP_QAS                       (0x00000004)
 642 #define MPI_SCSIPORTPAGE0_CAP_MIN_SYNC_PERIOD_MASK      (0x0000FF00)
 643 #define MPI_SCSIPORTPAGE0_CAP_MAX_SYNC_OFFSET_MASK      (0x00FF0000)
 644 #define MPI_SCSIPORTPAGE0_CAP_WIDE                      (0x20000000)
 645 #define MPI_SCSIPORTPAGE0_CAP_AIP                       (0x80000000)
 646
 647 #define MPI_SCSIPORTPAGE0_PHY_SIGNAL_TYPE_MASK          (0x00000003)
 648 #define MPI_SCSIPORTPAGE0_PHY_SIGNAL_HVD                (0x01)
 649 #define MPI_SCSIPORTPAGE0_PHY_SIGNAL_SE                 (0x02)
 650 #define MPI_SCSIPORTPAGE0_PHY_SIGNAL_LVD                (0x03)
 651
 652
 653 typedef struct _CONFIG_PAGE_SCSI_PORT_1
 654 {
 655     fCONFIG_PAGE_HEADER      Header;                     /* 00h */
 656     U32                     Configuration;              /* 04h */
 657     U32                     OnBusTimerValue;            /* 08h */
 658 } fCONFIG_PAGE_SCSI_PORT_1, MPI_POINTER PTR_CONFIG_PAGE_SCSI_PORT_1,
 659   SCSIPortPage1_t, MPI_POINTER pSCSIPortPage1_t;
 660
 661 #define MPI_SCSIPORTPAGE1_PAGEVERSION                   (0x02)
 662
 663 #define MPI_SCSIPORTPAGE1_CFG_PORT_SCSI_ID_MASK         (0x000000FF)
 664 #define MPI_SCSIPORTPAGE1_CFG_PORT_RESPONSE_ID_MASK     (0xFFFF0000)
 665
 666
 667 typedef struct _MPI_DEVICE_INFO
 668 {
 669     U8      Timeout;                                    /* 00h */
 670     U8      SyncFactor;                                 /* 01h */
 671     U16     DeviceFlags;                                /* 02h */
 672 } MPI_DEVICE_INFO, MPI_POINTER PTR_MPI_DEVICE_INFO,
 673   MpiDeviceInfo_t, MPI_POINTER pMpiDeviceInfo_t;
 674
 675 typedef struct _CONFIG_PAGE_SCSI_PORT_2
 676 {
 677     fCONFIG_PAGE_HEADER  Header;                         /* 00h */
 678     U32                 PortFlags;                      /* 04h */
 679     U32                 PortSettings;                   /* 08h */
 680     MPI_DEVICE_INFO     DeviceSettings[16];             /* 0Ch */
 681 } fCONFIG_PAGE_SCSI_PORT_2, MPI_POINTER PTR_CONFIG_PAGE_SCSI_PORT_2,
 682   SCSIPortPage2_t, MPI_POINTER pSCSIPortPage2_t;
 683
 684 #define MPI_SCSIPORTPAGE2_PAGEVERSION                       (0x01)
 685
 686 #define MPI_SCSIPORTPAGE2_PORT_FLAGS_SCAN_HIGH_TO_LOW       (0x00000001)
 687 #define MPI_SCSIPORTPAGE2_PORT_FLAGS_AVOID_SCSI_RESET       (0x00000004)
 688 #define MPI_SCSIPORTPAGE2_PORT_FLAGS_ALTERNATE_CHS          (0x00000008)
 689 #define MPI_SCSIPORTPAGE2_PORT_FLAGS_TERMINATION_DISABLE    (0x00000010)
 690
 691 #define MPI_SCSIPORTPAGE2_PORT_HOST_ID_MASK                 (0x0000000F)
 692 #define MPI_SCSIPORTPAGE2_PORT_MASK_INIT_HBA                (0x00000030)
 693 #define MPI_SCSIPORTPAGE2_PORT_DISABLE_INIT_HBA             (0x00000000)
 694 #define MPI_SCSIPORTPAGE2_PORT_BIOS_INIT_HBA                (0x00000010)
 695 #define MPI_SCSIPORTPAGE2_PORT_OS_INIT_HBA                  (0x00000020)
 696 #define MPI_SCSIPORTPAGE2_PORT_BIOS_OS_INIT_HBA             (0x00000030)
 697 #define MPI_SCSIPORTPAGE2_PORT_REMOVABLE_MEDIA              (0x000000C0)
 698 #define MPI_SCSIPORTPAGE2_PORT_SPINUP_DELAY_MASK            (0x00000F00)
 699 #define MPI_SCSIPORTPAGE2_PORT_MASK_NEGO_MASTER_SETTINGS    (0x00003000)
 700 #define MPI_SCSIPORTPAGE2_PORT_NEGO_MASTER_SETTINGS         (0x00000000)
 701 #define MPI_SCSIPORTPAGE2_PORT_NONE_MASTER_SETTINGS         (0x00001000)
 702 #define MPI_SCSIPORTPAGE2_PORT_ALL_MASTER_SETTINGS          (0x00003000)
 703
 704 #define MPI_SCSIPORTPAGE2_DEVICE_DISCONNECT_ENABLE          (0x0001)
 705 #define MPI_SCSIPORTPAGE2_DEVICE_ID_SCAN_ENABLE             (0x0002)
 706 #define MPI_SCSIPORTPAGE2_DEVICE_LUN_SCAN_ENABLE            (0x0004)
 707 #define MPI_SCSIPORTPAGE2_DEVICE_TAG_QUEUE_ENABLE           (0x0008)
 708 #define MPI_SCSIPORTPAGE2_DEVICE_WIDE_DISABLE               (0x0010)
 709 #define MPI_SCSIPORTPAGE2_DEVICE_BOOT_CHOICE                (0x0020)
 710
 711
 712 /****************************************************************************
 713 *   SCSI Target Device Config Pages
 714 ****************************************************************************/
 715
 716 typedef struct _CONFIG_PAGE_SCSI_DEVICE_0
 717 {
 718     fCONFIG_PAGE_HEADER      Header;                     /* 00h */
 719     U32                     NegotiatedParameters;       /* 04h */
 720     U32                     Information;                /* 08h */
 721 } fCONFIG_PAGE_SCSI_DEVICE_0, MPI_POINTER PTR_CONFIG_PAGE_SCSI_DEVICE_0,
 722   SCSIDevicePage0_t, MPI_POINTER pSCSIDevicePage0_t;
 723
 724 #define MPI_SCSIDEVPAGE0_PAGEVERSION                    (0x02)
 725
 726 #define MPI_SCSIDEVPAGE0_NP_IU                          (0x00000001)
 727 #define MPI_SCSIDEVPAGE0_NP_DT                          (0x00000002)
 728 #define MPI_SCSIDEVPAGE0_NP_QAS                         (0x00000004)
 729 #define MPI_SCSIDEVPAGE0_NP_NEG_SYNC_PERIOD_MASK        (0x0000FF00)
 730 #define MPI_SCSIDEVPAGE0_NP_NEG_SYNC_OFFSET_MASK        (0x00FF0000)
 731 #define MPI_SCSIDEVPAGE0_NP_WIDE                        (0x20000000)
 732 #define MPI_SCSIDEVPAGE0_NP_AIP                         (0x80000000)
 733
 734 #define MPI_SCSIDEVPAGE0_INFO_PARAMS_NEGOTIATED         (0x00000001)
 735 #define MPI_SCSIDEVPAGE0_INFO_SDTR_REJECTED             (0x00000002)
 736 #define MPI_SCSIDEVPAGE0_INFO_WDTR_REJECTED             (0x00000004)
 737 #define MPI_SCSIDEVPAGE0_INFO_PPR_REJECTED              (0x00000008)
 738
 739
 740 typedef struct _CONFIG_PAGE_SCSI_DEVICE_1
 741 {
 742     fCONFIG_PAGE_HEADER      Header;                     /* 00h */
 743     U32                     RequestedParameters;        /* 04h */
 744     U32                     Reserved;                   /* 08h */
 745     U32                     Configuration;              /* 0Ch */
 746 } fCONFIG_PAGE_SCSI_DEVICE_1, MPI_POINTER PTR_CONFIG_PAGE_SCSI_DEVICE_1,
 747   SCSIDevicePage1_t, MPI_POINTER pSCSIDevicePage1_t;
 748
 749 #define MPI_SCSIDEVPAGE1_PAGEVERSION                    (0x03)
 750
 751 #define MPI_SCSIDEVPAGE1_RP_IU                          (0x00000001)
 752 #define MPI_SCSIDEVPAGE1_RP_DT                          (0x00000002)
 753 #define MPI_SCSIDEVPAGE1_RP_QAS                         (0x00000004)
 754 #define MPI_SCSIDEVPAGE1_RP_MIN_SYNC_PERIOD_MASK        (0x0000FF00)
 755 #define MPI_SCSIDEVPAGE1_RP_MAX_SYNC_OFFSET_MASK        (0x00FF0000)
 756 #define MPI_SCSIDEVPAGE1_RP_WIDE                        (0x20000000)
 757 #define MPI_SCSIDEVPAGE1_RP_AIP                         (0x80000000)
 758
 759 #define MPI_SCSIDEVPAGE1_DV_LVD_DRIVE_STRENGTH_MASK     (0x00000003)
 760 #define MPI_SCSIDEVPAGE1_DV_SE_SLEW_RATE_MASK           (0x00000300)
 761
 762 #define MPI_SCSIDEVPAGE1_CONF_WDTR_DISALLOWED           (0x00000002)
 763 #define MPI_SCSIDEVPAGE1_CONF_SDTR_DISALLOWED           (0x00000004)
 764
 765
 766 typedef struct _CONFIG_PAGE_SCSI_DEVICE_2
 767 {
 768     fCONFIG_PAGE_HEADER      Header;                     /* 00h */
 769     U32                     DomainValidation;           /* 04h */
 770     U32                     ParityPipeSelect;           /* 08h */
 771     U32                     DataPipeSelect;             /* 0Ch */
 772 } fCONFIG_PAGE_SCSI_DEVICE_2, MPI_POINTER PTR_CONFIG_PAGE_SCSI_DEVICE_2,
 773   SCSIDevicePage2_t, MPI_POINTER pSCSIDevicePage2_t;
 774
 775 #define MPI_SCSIDEVPAGE2_PAGEVERSION                    (0x00)
 776
 777 #define MPI_SCSIDEVPAGE2_DV_ISI_ENABLE                  (0x00000010)
 778 #define MPI_SCSIDEVPAGE2_DV_SECONDARY_DRIVER_ENABLE     (0x00000020)
 779 #define MPI_SCSIDEVPAGE2_DV_SLEW_RATE_CTRL              (0x00000380)
 780 #define MPI_SCSIDEVPAGE2_DV_PRIM_DRIVE_STR_CTRL         (0x00001C00)
 781 #define MPI_SCSIDEVPAGE2_DV_SECOND_DRIVE_STR_CTRL       (0x0000E000)
 782 #define MPI_SCSIDEVPAGE2_DV_XCLKH_ST                    (0x10000000)
 783 #define MPI_SCSIDEVPAGE2_DV_XCLKS_ST                    (0x20000000)
 784 #define MPI_SCSIDEVPAGE2_DV_XCLKH_DT                    (0x40000000)
 785 #define MPI_SCSIDEVPAGE2_DV_XCLKS_DT                    (0x80000000)
 786
 787 #define MPI_SCSIDEVPAGE2_PPS_PPS_MASK                   (0x00000003)
 788
 789 #define MPI_SCSIDEVPAGE2_DPS_BIT_0_PL_SELECT_MASK       (0x00000003)
 790 #define MPI_SCSIDEVPAGE2_DPS_BIT_1_PL_SELECT_MASK       (0x0000000C)
 791 #define MPI_SCSIDEVPAGE2_DPS_BIT_2_PL_SELECT_MASK       (0x00000030)
 792 #define MPI_SCSIDEVPAGE2_DPS_BIT_3_PL_SELECT_MASK       (0x000000C0)
 793 #define MPI_SCSIDEVPAGE2_DPS_BIT_4_PL_SELECT_MASK       (0x00000300)
 794 #define MPI_SCSIDEVPAGE2_DPS_BIT_5_PL_SELECT_MASK       (0x00000C00)
 795 #define MPI_SCSIDEVPAGE2_DPS_BIT_6_PL_SELECT_MASK       (0x00003000)
 796 #define MPI_SCSIDEVPAGE2_DPS_BIT_7_PL_SELECT_MASK       (0x0000C000)
 797 #define MPI_SCSIDEVPAGE2_DPS_BIT_8_PL_SELECT_MASK       (0x00030000)
 798 #define MPI_SCSIDEVPAGE2_DPS_BIT_9_PL_SELECT_MASK       (0x000C0000)
 799 #define MPI_SCSIDEVPAGE2_DPS_BIT_10_PL_SELECT_MASK      (0x00300000)
 800 #define MPI_SCSIDEVPAGE2_DPS_BIT_11_PL_SELECT_MASK      (0x00C00000)
 801 #define MPI_SCSIDEVPAGE2_DPS_BIT_12_PL_SELECT_MASK      (0x03000000)
 802 #define MPI_SCSIDEVPAGE2_DPS_BIT_13_PL_SELECT_MASK      (0x0C000000)
 803 #define MPI_SCSIDEVPAGE2_DPS_BIT_14_PL_SELECT_MASK      (0x30000000)
 804 #define MPI_SCSIDEVPAGE2_DPS_BIT_15_PL_SELECT_MASK      (0xC0000000)
 805
 806
 807 /****************************************************************************
 808 *   FC Port Config Pages
 809 ****************************************************************************/
 810
 811 typedef struct _CONFIG_PAGE_FC_PORT_0
 812 {
 813     fCONFIG_PAGE_HEADER      Header;                     /* 00h */
 814     U32                     Flags;                      /* 04h */
 815     U8                      MPIPortNumber;              /* 08h */
 816     U8                      LinkType;                   /* 09h */
 817     U8                      PortState;                  /* 0Ah */
 818     U8                      Reserved;                   /* 0Bh */
 819     U32                     PortIdentifier;             /* 0Ch */
 820     U64                     WWNN;                       /* 10h */
 821     U64                     WWPN;                       /* 18h */
 822     U32                     SupportedServiceClass;      /* 20h */
 823     U32                     SupportedSpeeds;            /* 24h */
 824     U32                     CurrentSpeed;               /* 28h */
 825     U32                     MaxFrameSize;               /* 2Ch */
 826     U64                     FabricWWNN;                 /* 30h */
 827     U64                     FabricWWPN;                 /* 38h */
 828     U32                     DiscoveredPortsCount;       /* 40h */
 829     U32                     MaxInitiators;              /* 44h */
 830 } fCONFIG_PAGE_FC_PORT_0, MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_0,
 831   FCPortPage0_t, MPI_POINTER pFCPortPage0_t;
 832
 833 #define MPI_FCPORTPAGE0_PAGEVERSION                     (0x01)
 834
 835 #define MPI_FCPORTPAGE0_FLAGS_PROT_MASK                 (0x0000000F)
 836 #define MPI_FCPORTPAGE0_FLAGS_PROT_FCP_INIT             (MPI_PORTFACTS_PROTOCOL_INITIATOR)
 837 #define MPI_FCPORTPAGE0_FLAGS_PROT_FCP_TARG             (MPI_PORTFACTS_PROTOCOL_TARGET)
 838 #define MPI_FCPORTPAGE0_FLAGS_PROT_LAN                  (MPI_PORTFACTS_PROTOCOL_LAN)
 839 #define MPI_FCPORTPAGE0_FLAGS_PROT_LOGBUSADDR           (MPI_PORTFACTS_PROTOCOL_LOGBUSADDR)
 840
 841 #define MPI_FCPORTPAGE0_FLAGS_ALIAS_ALPA_SUPPORTED      (0x00000010)
 842 #define MPI_FCPORTPAGE0_FLAGS_ALIAS_WWN_SUPPORTED       (0x00000020)
 843 #define MPI_FCPORTPAGE0_FLAGS_FABRIC_WWN_VALID          (0x00000030)
 844
 845 #define MPI_FCPORTPAGE0_FLAGS_ATTACH_TYPE_MASK          (0x00000F00)
 846 #define MPI_FCPORTPAGE0_FLAGS_ATTACH_NO_INIT            (0x00000000)
 847 #define MPI_FCPORTPAGE0_FLAGS_ATTACH_POINT_TO_POINT     (0x00000100)
 848 #define MPI_FCPORTPAGE0_FLAGS_ATTACH_PRIVATE_LOOP       (0x00000200)
 849 #define MPI_FCPORTPAGE0_FLAGS_ATTACH_FABRIC_DIRECT      (0x00000400)
 850 #define MPI_FCPORTPAGE0_FLAGS_ATTACH_PUBLIC_LOOP        (0x00000800)
 851
 852 #define MPI_FCPORTPAGE0_LTYPE_RESERVED                  (0x00)
 853 #define MPI_FCPORTPAGE0_LTYPE_OTHER                     (0x01)
 854 #define MPI_FCPORTPAGE0_LTYPE_UNKNOWN                   (0x02)
 855 #define MPI_FCPORTPAGE0_LTYPE_COPPER                    (0x03)
 856 #define MPI_FCPORTPAGE0_LTYPE_SINGLE_1300               (0x04)
 857 #define MPI_FCPORTPAGE0_LTYPE_SINGLE_1500               (0x05)
 858 #define MPI_FCPORTPAGE0_LTYPE_50_LASER_MULTI            (0x06)
 859 #define MPI_FCPORTPAGE0_LTYPE_50_LED_MULTI              (0x07)
 860 #define MPI_FCPORTPAGE0_LTYPE_62_LASER_MULTI            (0x08)
 861 #define MPI_FCPORTPAGE0_LTYPE_62_LED_MULTI              (0x09)
 862 #define MPI_FCPORTPAGE0_LTYPE_MULTI_LONG_WAVE           (0x0A)
 863 #define MPI_FCPORTPAGE0_LTYPE_MULTI_SHORT_WAVE          (0x0B)
 864 #define MPI_FCPORTPAGE0_LTYPE_LASER_SHORT_WAVE          (0x0C)
 865 #define MPI_FCPORTPAGE0_LTYPE_LED_SHORT_WAVE            (0x0D)
 866 #define MPI_FCPORTPAGE0_LTYPE_1300_LONG_WAVE            (0x0E)
 867 #define MPI_FCPORTPAGE0_LTYPE_1500_LONG_WAVE            (0x0F)
 868
 869 #define MPI_FCPORTPAGE0_PORTSTATE_UNKNOWN               (0x01)      /*(SNIA)HBA_PORTSTATE_UNKNOWN       1 Unknown */
 870 #define MPI_FCPORTPAGE0_PORTSTATE_ONLINE                (0x02)      /*(SNIA)HBA_PORTSTATE_ONLINE        2 Operational */
 871 #define MPI_FCPORTPAGE0_PORTSTATE_OFFLINE               (0x03)      /*(SNIA)HBA_PORTSTATE_OFFLINE       3 User Offline */
 872 #define MPI_FCPORTPAGE0_PORTSTATE_BYPASSED              (0x04)      /*(SNIA)HBA_PORTSTATE_BYPASSED      4 Bypassed */
 873 #define MPI_FCPORTPAGE0_PORTSTATE_DIAGNOST              (0x05)      /*(SNIA)HBA_PORTSTATE_DIAGNOSTICS   5 In diagnostics mode */
 874 #define MPI_FCPORTPAGE0_PORTSTATE_LINKDOWN              (0x06)      /*(SNIA)HBA_PORTSTATE_LINKDOWN      6 Link Down */
 875 #define MPI_FCPORTPAGE0_PORTSTATE_ERROR                 (0x07)      /*(SNIA)HBA_PORTSTATE_ERROR         7 Port Error */
 876 #define MPI_FCPORTPAGE0_PORTSTATE_LOOPBACK              (0x08)      /*(SNIA)HBA_PORTSTATE_LOOPBACK      8 Loopback */
 877
 878 #define MPI_FCPORTPAGE0_SUPPORT_CLASS_1                 (0x00000001)
 879 #define MPI_FCPORTPAGE0_SUPPORT_CLASS_2                 (0x00000002)
 880 #define MPI_FCPORTPAGE0_SUPPORT_CLASS_3                 (0x00000004)
 881
 882 #define MPI_FCPORTPAGE0_SUPPORT_1GBIT_SPEED             (0x00000001) /* (SNIA)HBA_PORTSPEED_1GBIT 1  1 GBit/sec  */
 883 #define MPI_FCPORTPAGE0_SUPPORT_2GBIT_SPEED             (0x00000002) /* (SNIA)HBA_PORTSPEED_2GBIT 2  2 GBit/sec  */
 884 #define MPI_FCPORTPAGE0_SUPPORT_10GBIT_SPEED            (0x00000004) /* (SNIA)HBA_PORTSPEED_10GBIT 4 10 GBit/sec */
 885
 886 #define MPI_FCPORTPAGE0_CURRENT_SPEED_1GBIT             MPI_FCPORTPAGE0_SUPPORT_1GBIT_SPEED
 887 #define MPI_FCPORTPAGE0_CURRENT_SPEED_2GBIT             MPI_FCPORTPAGE0_SUPPORT_2GBIT_SPEED
 888 #define MPI_FCPORTPAGE0_CURRENT_SPEED_10GBIT            MPI_FCPORTPAGE0_SUPPORT_10GBIT_SPEED
 889
 890
 891 typedef struct _CONFIG_PAGE_FC_PORT_1
 892 {
 893     fCONFIG_PAGE_HEADER      Header;                     /* 00h */
 894     U32                     Flags;                      /* 04h */
 895     U64                     NoSEEPROMWWNN;              /* 08h */
 896     U64                     NoSEEPROMWWPN;              /* 10h */
 897     U8                      HardALPA;                   /* 18h */
 898     U8                      LinkConfig;                 /* 19h */
 899     U8                      TopologyConfig;             /* 1Ah */
 900     U8                      Reserved;                   /* 1Bh */
 901 } fCONFIG_PAGE_FC_PORT_1, MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_1,
 902   FCPortPage1_t, MPI_POINTER pFCPortPage1_t;
 903
 904 #define MPI_FCPORTPAGE1_PAGEVERSION                     (0x02)
 905
 906 #define MPI_FCPORTPAGE1_FLAGS_EXT_FCP_STATUS_EN         (0x08000000)
 907 #define MPI_FCPORTPAGE1_FLAGS_IMMEDIATE_ERROR_REPLY     (0x04000000)
 908 #define MPI_FCPORTPAGE1_FLAGS_SORT_BY_DID               (0x00000001)
 909 #define MPI_FCPORTPAGE1_FLAGS_SORT_BY_WWN               (0x00000000)
 910
 911 #define MPI_FCPORTPAGE1_FLAGS_PROT_MASK                 (0xF0000000)
 912 #define MPI_FCPORTPAGE1_FLAGS_PROT_SHIFT                (28)
 913 #define MPI_FCPORTPAGE1_FLAGS_PROT_FCP_INIT             ((U32)MPI_PORTFACTS_PROTOCOL_INITIATOR << MPI_FCPORTPAGE1_FLAGS_PROT_SHIFT)
 914 #define MPI_FCPORTPAGE1_FLAGS_PROT_FCP_TARG             ((U32)MPI_PORTFACTS_PROTOCOL_TARGET << MPI_FCPORTPAGE1_FLAGS_PROT_SHIFT)
 915 #define MPI_FCPORTPAGE1_FLAGS_PROT_LAN                  ((U32)MPI_PORTFACTS_PROTOCOL_LAN << MPI_FCPORTPAGE1_FLAGS_PROT_SHIFT)
 916 #define MPI_FCPORTPAGE1_FLAGS_PROT_LOGBUSADDR           ((U32)MPI_PORTFACTS_PROTOCOL_LOGBUSADDR << MPI_FCPORTPAGE1_FLAGS_PROT_SHIFT)
 917
 918 #define MPI_FCPORTPAGE1_HARD_ALPA_NOT_USED              (0xFF)
 919
 920 #define MPI_FCPORTPAGE1_LCONFIG_SPEED_MASK              (0x0F)
 921 #define MPI_FCPORTPAGE1_LCONFIG_SPEED_1GIG              (0x00)
 922 #define MPI_FCPORTPAGE1_LCONFIG_SPEED_2GIG              (0x01)
 923 #define MPI_FCPORTPAGE1_LCONFIG_SPEED_4GIG              (0x02)
 924 #define MPI_FCPORTPAGE1_LCONFIG_SPEED_10GIG             (0x03)
 925 #define MPI_FCPORTPAGE1_LCONFIG_SPEED_AUTO              (0x0F)
 926
 927 #define MPI_FCPORTPAGE1_TOPOLOGY_MASK                   (0x0F)
 928 #define MPI_FCPORTPAGE1_TOPOLOGY_NLPORT                 (0x01)
 929 #define MPI_FCPORTPAGE1_TOPOLOGY_NPORT                  (0x02)
 930 #define MPI_FCPORTPAGE1_TOPOLOGY_AUTO                   (0x0F)
 931
 932
 933 typedef struct _CONFIG_PAGE_FC_PORT_2
 934 {
 935     fCONFIG_PAGE_HEADER      Header;                     /* 00h */
 936     U8                      NumberActive;               /* 04h */
 937     U8                      ALPA[127];                  /* 05h */
 938 } fCONFIG_PAGE_FC_PORT_2, MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_2,
 939   FCPortPage2_t, MPI_POINTER pFCPortPage2_t;
 940
 941 #define MPI_FCPORTPAGE2_PAGEVERSION                     (0x01)
 942
 943
 944 typedef struct _WWN_FORMAT
 945 {
 946     U64                     WWNN;                       /* 00h */
 947     U64                     WWPN;                       /* 08h */
 948 } WWN_FORMAT, MPI_POINTER PTR_WWN_FORMAT,
 949   WWNFormat, MPI_POINTER pWWNFormat;
 950
 951 typedef union _FC_PORT_PERSISTENT_PHYSICAL_ID
 952 {
 953     WWN_FORMAT              WWN;
 954     U32                     Did;
 955 } FC_PORT_PERSISTENT_PHYSICAL_ID, MPI_POINTER PTR_FC_PORT_PERSISTENT_PHYSICAL_ID,
 956   PersistentPhysicalId_t, MPI_POINTER pPersistentPhysicalId_t;
 957
 958 typedef struct _FC_PORT_PERSISTENT
 959 {
 960     FC_PORT_PERSISTENT_PHYSICAL_ID  PhysicalIdentifier; /* 00h */
 961     U8                              TargetID;           /* 10h */
 962     U8                              Bus;                /* 11h */
 963     U16                             Flags;              /* 12h */
 964 } FC_PORT_PERSISTENT, MPI_POINTER PTR_FC_PORT_PERSISTENT,
 965   PersistentData_t, MPI_POINTER pPersistentData_t;
 966
 967 #define MPI_PERSISTENT_FLAGS_SHIFT                      (16)
 968 #define MPI_PERSISTENT_FLAGS_ENTRY_VALID                (0x0001)
 969 #define MPI_PERSISTENT_FLAGS_SCAN_ID                    (0x0002)
 970 #define MPI_PERSISTENT_FLAGS_SCAN_LUNS                  (0x0004)
 971 #define MPI_PERSISTENT_FLAGS_BOOT_DEVICE                (0x0008)
 972 #define MPI_PERSISTENT_FLAGS_BY_DID                     (0x0080)
 973
 974 /*
 975  * Host code (drivers, BIOS, utilities, etc.) should leave this define set to
 976  * one and check Header.PageLength at runtime.
 977  */
 978 #ifndef MPI_FC_PORT_PAGE_3_ENTRY_MAX
 979 #define MPI_FC_PORT_PAGE_3_ENTRY_MAX        (1)
 980 #endif
 981
 982 typedef struct _CONFIG_PAGE_FC_PORT_3
 983 {
 984     fCONFIG_PAGE_HEADER      Header;                                 /* 00h */
 985     FC_PORT_PERSISTENT      Entry[MPI_FC_PORT_PAGE_3_ENTRY_MAX];    /* 04h */
 986 } fCONFIG_PAGE_FC_PORT_3, MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_3,
 987   FCPortPage3_t, MPI_POINTER pFCPortPage3_t;
 988
 989 #define MPI_FCPORTPAGE3_PAGEVERSION                     (0x01)
 990
 991
 992 typedef struct _CONFIG_PAGE_FC_PORT_4
 993 {
 994     fCONFIG_PAGE_HEADER      Header;                     /* 00h */
 995     U32                     PortFlags;                  /* 04h */
 996     U32                     PortSettings;               /* 08h */
 997 } fCONFIG_PAGE_FC_PORT_4, MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_4,
 998   FCPortPage4_t, MPI_POINTER pFCPortPage4_t;
 999
1000 #define MPI_FCPORTPAGE4_PAGEVERSION                     (0x00)
1001
1002 #define MPI_FCPORTPAGE4_PORT_FLAGS_ALTERNATE_CHS        (0x00000008)
1003
1004 #define MPI_FCPORTPAGE4_PORT_MASK_INIT_HBA              (0x00000030)
1005 #define MPI_FCPORTPAGE4_PORT_DISABLE_INIT_HBA           (0x00000000)
1006 #define MPI_FCPORTPAGE4_PORT_BIOS_INIT_HBA              (0x00000010)
1007 #define MPI_FCPORTPAGE4_PORT_OS_INIT_HBA                (0x00000020)
1008 #define MPI_FCPORTPAGE4_PORT_BIOS_OS_INIT_HBA           (0x00000030)
1009 #define MPI_FCPORTPAGE4_PORT_REMOVABLE_MEDIA            (0x000000C0)
1010 #define MPI_FCPORTPAGE4_PORT_SPINUP_DELAY_MASK          (0x00000F00)
1011
1012
1013 typedef struct _CONFIG_PAGE_FC_PORT_5_ALIAS_INFO
1014 {
1015     U8      Flags;                                      /* 00h */
1016     U8      AliasAlpa;                                  /* 01h */
1017     U16     Reserved;                                   /* 02h */
1018     U64     AliasWWNN;                                  /* 04h */
1019     U64     AliasWWPN;                                  /* 0Ch */
1020 } fCONFIG_PAGE_FC_PORT_5_ALIAS_INFO,
1021   MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_5_ALIAS_INFO,
1022   FcPortPage5AliasInfo_t, MPI_POINTER pFcPortPage5AliasInfo_t;
1023
1024 /*
1025  * Host code (drivers, BIOS, utilities, etc.) should leave this define set to
1026  * one and check Header.PageLength at runtime.
1027  */
1028 #ifndef MPI_FC_PORT_PAGE_5_ALIAS_MAX
1029 #define MPI_FC_PORT_PAGE_5_ALIAS_MAX        (1)
1030 #endif
1031
1032 typedef struct _CONFIG_PAGE_FC_PORT_5
1033 {
1034     fCONFIG_PAGE_HEADER                  Header;                     /* 00h */
1035     fCONFIG_PAGE_FC_PORT_5_ALIAS_INFO    AliasInfo[MPI_FC_PORT_PAGE_5_ALIAS_MAX];/* 04h */
1036 } fCONFIG_PAGE_FC_PORT_5, MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_5,
1037   FCPortPage5_t, MPI_POINTER pFCPortPage5_t;
1038
1039 #define MPI_FCPORTPAGE5_PAGEVERSION                     (0x00)
1040
1041 #define MPI_FCPORTPAGE5_FLAGS_ALIAS_ALPA_VALID          (0x01)
1042 #define MPI_FCPORTPAGE5_FLAGS_ALIAS_WWN_VALID           (0x02)
1043
1044
1045 typedef struct _CONFIG_PAGE_FC_PORT_6
1046 {
1047     fCONFIG_PAGE_HEADER      Header;                     /* 00h */
1048     U32                     Reserved;                   /* 04h */
1049     U64                     TimeSinceReset;             /* 08h */
1050     U64                     TxFrames;                   /* 10h */
1051     U64                     RxFrames;                   /* 18h */
1052     U64                     TxWords;                    /* 20h */
1053     U64                     RxWords;                    /* 28h */
1054     U64                     LipCount;                   /* 30h */
1055     U64                     NosCount;                   /* 38h */
1056     U64                     ErrorFrames;                /* 40h */
1057     U64                     DumpedFrames;               /* 48h */
1058     U64                     LinkFailureCount;           /* 50h */
1059     U64                     LossOfSyncCount;            /* 58h */
1060     U64                     LossOfSignalCount;          /* 60h */
1061     U64                     PrimativeSeqErrCount;       /* 68h */
1062     U64                     InvalidTxWordCount;         /* 70h */
1063     U64                     InvalidCrcCount;            /* 78h */
1064     U64                     FcpInitiatorIoCount;        /* 80h */
1065 } fCONFIG_PAGE_FC_PORT_6, MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_6,
1066   FCPortPage6_t, MPI_POINTER pFCPortPage6_t;
1067
1068 #define MPI_FCPORTPAGE6_PAGEVERSION                     (0x00)
1069
1070
1071 typedef struct _CONFIG_PAGE_FC_PORT_7
1072 {
1073     fCONFIG_PAGE_HEADER      Header;                     /* 00h */
1074     U32                     Reserved;                   /* 04h */
1075     U8                      PortSymbolicName[256];      /* 08h */
1076 } fCONFIG_PAGE_FC_PORT_7, MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_7,
1077   FCPortPage7_t, MPI_POINTER pFCPortPage7_t;
1078
1079 #define MPI_FCPORTPAGE7_PAGEVERSION                     (0x00)
1080
1081
1082 typedef struct _CONFIG_PAGE_FC_PORT_8
1083 {
1084     fCONFIG_PAGE_HEADER      Header;                     /* 00h */
1085     U32                     BitVector[8];               /* 04h */
1086 } fCONFIG_PAGE_FC_PORT_8, MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_8,
1087   FCPortPage8_t, MPI_POINTER pFCPortPage8_t;
1088
1089 #define MPI_FCPORTPAGE8_PAGEVERSION                     (0x00)
1090
1091
1092 typedef struct _CONFIG_PAGE_FC_PORT_9
1093 {
1094     fCONFIG_PAGE_HEADER      Header;                     /* 00h */
1095     U32                     Reserved;                   /* 04h */
1096     U64                     GlobalWWPN;                 /* 08h */
1097     U64                     GlobalWWNN;                 /* 10h */
1098     U32                     UnitType;                   /* 18h */
1099     U32                     PhysicalPortNumber;         /* 1Ch */
1100     U32                     NumAttachedNodes;           /* 20h */
1101     U16                     IPVersion;                  /* 24h */
1102     U16                     UDPPortNumber;              /* 26h */
1103     U8                      IPAddress[16];              /* 28h */
1104     U16                     Reserved1;                  /* 38h */
1105     U16                     TopologyDiscoveryFlags;     /* 3Ah */
1106 } fCONFIG_PAGE_FC_PORT_9, MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_9,
1107   FCPortPage9_t, MPI_POINTER pFCPortPage9_t;
1108
1109 #define MPI_FCPORTPAGE9_PAGEVERSION                     (0x00)
1110
1111
1112 /****************************************************************************
1113 *   FC Device Config Pages
1114 ****************************************************************************/
1115
1116 typedef struct _CONFIG_PAGE_FC_DEVICE_0
1117 {
1118     fCONFIG_PAGE_HEADER      Header;                     /* 00h */
1119     U64                     WWNN;                       /* 04h */
1120     U64                     WWPN;                       /* 0Ch */
1121     U32                     PortIdentifier;             /* 14h */
1122     U8                      Protocol;                   /* 18h */
1123     U8                      Flags;                      /* 19h */
1124     U16                     BBCredit;                   /* 1Ah */
1125     U16                     MaxRxFrameSize;             /* 1Ch */
1126     U8                      Reserved1;                  /* 1Eh */
1127     U8                      PortNumber;                 /* 1Fh */
1128     U8                      FcPhLowestVersion;          /* 20h */
1129     U8                      FcPhHighestVersion;         /* 21h */
1130     U8                      CurrentTargetID;            /* 22h */
1131     U8                      CurrentBus;                 /* 23h */
1132 } fCONFIG_PAGE_FC_DEVICE_0, MPI_POINTER PTR_CONFIG_PAGE_FC_DEVICE_0,
1133   FCDevicePage0_t, MPI_POINTER pFCDevicePage0_t;
1134
1135 #define MPI_FC_DEVICE_PAGE0_PAGEVERSION                 (0x02)
1136
1137 #define MPI_FC_DEVICE_PAGE0_FLAGS_TARGETID_BUS_VALID    (0x01)
1138
1139 #define MPI_FC_DEVICE_PAGE0_PROT_IP                     (0x01)
1140 #define MPI_FC_DEVICE_PAGE0_PROT_FCP_TARGET             (0x02)
1141 #define MPI_FC_DEVICE_PAGE0_PROT_FCP_INITIATOR          (0x04)
1142
1143 #define MPI_FC_DEVICE_PAGE0_PGAD_PORT_MASK      (MPI_FC_DEVICE_PGAD_PORT_MASK)
1144 #define MPI_FC_DEVICE_PAGE0_PGAD_FORM_MASK      (MPI_FC_DEVICE_PGAD_FORM_MASK)
1145 #define MPI_FC_DEVICE_PAGE0_PGAD_FORM_NEXT_DID  (MPI_FC_DEVICE_PGAD_FORM_NEXT_DID)
1146 #define MPI_FC_DEVICE_PAGE0_PGAD_FORM_BUS_TID   (MPI_FC_DEVICE_PGAD_FORM_BUS_TID)
1147 #define MPI_FC_DEVICE_PAGE0_PGAD_DID_MASK       (MPI_FC_DEVICE_PGAD_ND_DID_MASK)
1148 #define MPI_FC_DEVICE_PAGE0_PGAD_BUS_MASK       (MPI_FC_DEVICE_PGAD_BT_BUS_MASK)
1149 #define MPI_FC_DEVICE_PAGE0_PGAD_BUS_SHIFT      (MPI_FC_DEVICE_PGAD_BT_BUS_SHIFT)
1150 #define MPI_FC_DEVICE_PAGE0_PGAD_TID_MASK       (MPI_FC_DEVICE_PGAD_BT_TID_MASK)
1151
1152
1153 /****************************************************************************
1154 *   RAID Volume Config Pages
1155 ****************************************************************************/
1156
1157 typedef struct _RAID_VOL0_PHYS_DISK
1158 {
1159     U16                         Reserved;               /* 00h */
1160     U8                          PhysDiskMap;            /* 02h */
1161     U8                          PhysDiskNum;            /* 03h */
1162 } RAID_VOL0_PHYS_DISK, MPI_POINTER PTR_RAID_VOL0_PHYS_DISK,
1163   RaidVol0PhysDisk_t, MPI_POINTER pRaidVol0PhysDisk_t;
1164
1165 #define MPI_RAIDVOL0_PHYSDISK_PRIMARY                   (0x01)
1166 #define MPI_RAIDVOL0_PHYSDISK_SECONDARY                 (0x02)
1167
1168 typedef struct _RAID_VOL0_STATUS
1169 {
1170     U8                          Flags;                  /* 00h */
1171     U8                          State;                  /* 01h */
1172     U16                         Reserved;               /* 02h */
1173 } RAID_VOL0_STATUS, MPI_POINTER PTR_RAID_VOL0_STATUS,
1174   RaidVol0Status_t, MPI_POINTER pRaidVol0Status_t;
1175
1176 /* RAID Volume Page 0 VolumeStatus defines */
1177
1178 #define MPI_RAIDVOL0_STATUS_FLAG_ENABLED                (0x01)
1179 #define MPI_RAIDVOL0_STATUS_FLAG_QUIESCED               (0x02)
1180 #define MPI_RAIDVOL0_STATUS_FLAG_RESYNC_IN_PROGRESS     (0x04)
1181
1182 #define MPI_RAIDVOL0_STATUS_STATE_OPTIMAL               (0x00)
1183 #define MPI_RAIDVOL0_STATUS_STATE_DEGRADED              (0x01)
1184 #define MPI_RAIDVOL0_STATUS_STATE_FAILED                (0x02)
1185
1186 typedef struct _RAID_VOL0_SETTINGS
1187 {
1188     U16                         Settings;       /* 00h */
1189     U8                          HotSparePool;   /* 01h */ /* MPI_RAID_HOT_SPARE_POOL_ */
1190     U8                          Reserved;       /* 02h */
1191 } RAID_VOL0_SETTINGS, MPI_POINTER PTR_RAID_VOL0_SETTINGS,
1192   RaidVol0Settings, MPI_POINTER pRaidVol0Settings;
1193
1194 /* RAID Volume Page 0 VolumeSettings defines */
1195
1196 #define MPI_RAIDVOL0_SETTING_WRITE_CACHING_ENABLE       (0x0001)
1197 #define MPI_RAIDVOL0_SETTING_OFFLINE_ON_SMART           (0x0002)
1198 #define MPI_RAIDVOL0_SETTING_AUTO_CONFIGURE             (0x0004)
1199 #define MPI_RAIDVOL0_SETTING_PRIORITY_RESYNC            (0x0008)
1200 #define MPI_RAIDVOL0_SETTING_USE_PRODUCT_ID_SUFFIX      (0x0010)
1201 #define MPI_RAIDVOL0_SETTING_USE_DEFAULTS               (0x8000)
1202
1203 /* RAID Volume Page 0 HotSparePool defines, also used in RAID Physical Disk */
1204 #define MPI_RAID_HOT_SPARE_POOL_0                       (0x01)
1205 #define MPI_RAID_HOT_SPARE_POOL_1                       (0x02)
1206 #define MPI_RAID_HOT_SPARE_POOL_2                       (0x04)
1207 #define MPI_RAID_HOT_SPARE_POOL_3                       (0x08)
1208 #define MPI_RAID_HOT_SPARE_POOL_4                       (0x10)
1209 #define MPI_RAID_HOT_SPARE_POOL_5                       (0x20)
1210 #define MPI_RAID_HOT_SPARE_POOL_6                       (0x40)
1211 #define MPI_RAID_HOT_SPARE_POOL_7                       (0x80)
1212
1213 /*
1214  * Host code (drivers, BIOS, utilities, etc.) should leave this define set to
1215  * one and check Header.PageLength at runtime.
1216  */
1217 #ifndef MPI_RAID_VOL_PAGE_0_PHYSDISK_MAX
1218 #define MPI_RAID_VOL_PAGE_0_PHYSDISK_MAX        (1)
1219 #endif
1220
1221 typedef struct _CONFIG_PAGE_RAID_VOL_0
1222 {
1223     fCONFIG_PAGE_HEADER      Header;         /* 00h */
1224     U8                      VolumeID;       /* 04h */
1225     U8                      VolumeBus;      /* 05h */
1226     U8                      VolumeIOC;      /* 06h */
1227     U8                      VolumeType;     /* 07h */ /* MPI_RAID_VOL_TYPE_ */
1228     RAID_VOL0_STATUS        VolumeStatus;   /* 08h */
1229     RAID_VOL0_SETTINGS      VolumeSettings; /* 0Ch */
1230     U32                     MaxLBA;         /* 10h */
1231     U32                     Reserved1;      /* 14h */
1232     U32                     StripeSize;     /* 18h */
1233     U32                     Reserved2;      /* 1Ch */
1234     U32                     Reserved3;      /* 20h */
1235     U8                      NumPhysDisks;   /* 24h */
1236     U8                      Reserved4;      /* 25h */
1237     U16                     Reserved5;      /* 26h */
1238     RAID_VOL0_PHYS_DISK     PhysDisk[MPI_RAID_VOL_PAGE_0_PHYSDISK_MAX];/* 28h */
1239 } fCONFIG_PAGE_RAID_VOL_0, MPI_POINTER PTR_CONFIG_PAGE_RAID_VOL_0,
1240   RaidVolumePage0_t, MPI_POINTER pRaidVolumePage0_t;
1241
1242 #define MPI_RAIDVOLPAGE0_PAGEVERSION                    (0x00)
1243
1244
1245 /****************************************************************************
1246 *   RAID Physical Disk Config Pages
1247 ****************************************************************************/
1248
1249 typedef struct _RAID_PHYS_DISK0_ERROR_DATA
1250 {
1251     U8                      ErrorCdbByte;               /* 00h */
1252     U8                      ErrorSenseKey;              /* 01h */
1253     U16                     Reserved;                   /* 02h */
1254     U16                     ErrorCount;                 /* 04h */
1255     U8                      ErrorASC;                   /* 06h */
1256     U8                      ErrorASCQ;                  /* 07h */
1257     U16                     SmartCount;                 /* 08h */
1258     U8                      SmartASC;                   /* 0Ah */
1259     U8                      SmartASCQ;                  /* 0Bh */
1260 } RAID_PHYS_DISK0_ERROR_DATA, MPI_POINTER PTR_RAID_PHYS_DISK0_ERROR_DATA,
1261   RaidPhysDisk0ErrorData_t, MPI_POINTER pRaidPhysDisk0ErrorData_t;
1262
1263 typedef struct _RAID_PHYS_DISK_INQUIRY_DATA
1264 {
1265     U8                          VendorID[8];            /* 00h */
1266     U8                          ProductID[16];          /* 08h */
1267     U8                          ProductRevLevel[4];     /* 18h */
1268     U8                          Info[32];               /* 1Ch */
1269 } RAID_PHYS_DISK0_INQUIRY_DATA, MPI_POINTER PTR_RAID_PHYS_DISK0_INQUIRY_DATA,
1270   RaidPhysDisk0InquiryData, MPI_POINTER pRaidPhysDisk0InquiryData;
1271
1272 typedef struct _RAID_PHYS_DISK0_SETTINGS
1273 {
1274     U8              SepID;              /* 00h */
1275     U8              SepBus;             /* 01h */
1276     U8              HotSparePool;       /* 02h */ /* MPI_RAID_HOT_SPARE_POOL_ */
1277     U8              PhysDiskSettings;   /* 03h */
1278 } RAID_PHYS_DISK0_SETTINGS, MPI_POINTER PTR_RAID_PHYS_DISK0_SETTINGS,
1279   RaidPhysDiskSettings_t, MPI_POINTER pRaidPhysDiskSettings_t;
1280
1281 typedef struct _RAID_PHYS_DISK0_STATUS
1282 {
1283     U8                              Flags;              /* 00h */
1284     U8                              State;              /* 01h */
1285     U16                             Reserved;           /* 02h */
1286 } RAID_PHYS_DISK0_STATUS, MPI_POINTER PTR_RAID_PHYS_DISK0_STATUS,
1287   RaidPhysDiskStatus_t, MPI_POINTER pRaidPhysDiskStatus_t;
1288
1289 /* RAID Volume 2 IM Physical Disk DiskStatus flags */
1290
1291 #define MPI_PHYSDISK0_STATUS_FLAG_OUT_OF_SYNC           (0x01)
1292 #define MPI_PHYSDISK0_STATUS_FLAG_QUIESCED              (0x02)
1293
1294 #define MPI_PHYSDISK0_STATUS_ONLINE                     (0x00)
1295 #define MPI_PHYSDISK0_STATUS_MISSING                    (0x01)
1296 #define MPI_PHYSDISK0_STATUS_NOT_COMPATIBLE             (0x02)
1297 #define MPI_PHYSDISK0_STATUS_FAILED                     (0x03)
1298 #define MPI_PHYSDISK0_STATUS_INITIALIZING               (0x04)
1299 #define MPI_PHYSDISK0_STATUS_OFFLINE_REQUESTED          (0x05)
1300 #define MPI_PHYSDISK0_STATUS_FAILED_REQUESTED           (0x06)
1301 #define MPI_PHYSDISK0_STATUS_OTHER_OFFLINE              (0xFF)
1302
1303 typedef struct _CONFIG_PAGE_RAID_PHYS_DISK_0
1304 {
1305     fCONFIG_PAGE_HEADER              Header;             /* 00h */
1306     U8                              PhysDiskID;         /* 04h */
1307     U8                              PhysDiskBus;        /* 05h */
1308     U8                              PhysDiskIOC;        /* 06h */
1309     U8                              PhysDiskNum;        /* 07h */
1310     RAID_PHYS_DISK0_SETTINGS        PhysDiskSettings;   /* 08h */
1311     U32                             Reserved1;          /* 0Ch */
1312     U32                             Reserved2;          /* 10h */
1313     U32                             Reserved3;          /* 14h */
1314     U8                              DiskIdentifier[16]; /* 18h */
1315     RAID_PHYS_DISK0_INQUIRY_DATA    InquiryData;        /* 28h */
1316     RAID_PHYS_DISK0_STATUS          PhysDiskStatus;     /* 64h */
1317     U32                             MaxLBA;             /* 68h */
1318     RAID_PHYS_DISK0_ERROR_DATA      ErrorData;          /* 6Ch */
1319 } fCONFIG_PAGE_RAID_PHYS_DISK_0, MPI_POINTER PTR_CONFIG_PAGE_RAID_PHYS_DISK_0,
1320   RaidPhysDiskPage0_t, MPI_POINTER pRaidPhysDiskPage0_t;
1321
1322 #define MPI_RAIDPHYSDISKPAGE0_PAGEVERSION           (0x00)
1323
1324
1325 /****************************************************************************
1326 *   LAN Config Pages
1327 ****************************************************************************/
1328
1329 typedef struct _CONFIG_PAGE_LAN_0
1330 {
1331     ConfigPageHeader_t      Header;                     /* 00h */
1332     U16                     TxRxModes;                  /* 04h */
1333     U16                     Reserved;                   /* 06h */
1334     U32                     PacketPrePad;               /* 08h */
1335 } fCONFIG_PAGE_LAN_0, MPI_POINTER PTR_CONFIG_PAGE_LAN_0,
1336   LANPage0_t, MPI_POINTER pLANPage0_t;
1337
1338 #define MPI_LAN_PAGE0_PAGEVERSION                       (0x01)
1339
1340 #define MPI_LAN_PAGE0_RETURN_LOOPBACK                   (0x0000)
1341 #define MPI_LAN_PAGE0_SUPPRESS_LOOPBACK                 (0x0001)
1342 #define MPI_LAN_PAGE0_LOOPBACK_MASK                     (0x0001)
1343
1344 typedef struct _CONFIG_PAGE_LAN_1
1345 {
1346     ConfigPageHeader_t      Header;                     /* 00h */
1347     U16                     Reserved;                   /* 04h */
1348     U8                      CurrentDeviceState;         /* 06h */
1349     U8                      Reserved1;                  /* 07h */
1350     U32                     MinPacketSize;              /* 08h */
1351     U32                     MaxPacketSize;              /* 0Ch */
1352     U32                     HardwareAddressLow;         /* 10h */
1353     U32                     HardwareAddressHigh;        /* 14h */
1354     U32                     MaxWireSpeedLow;            /* 18h */
1355     U32                     MaxWireSpeedHigh;           /* 1Ch */
1356     U32                     BucketsRemaining;           /* 20h */
1357     U32                     MaxReplySize;               /* 24h */
1358     U32                     NegWireSpeedLow;            /* 28h */
1359     U32                     NegWireSpeedHigh;           /* 2Ch */
1360 } fCONFIG_PAGE_LAN_1, MPI_POINTER PTR_CONFIG_PAGE_LAN_1,
1361   LANPage1_t, MPI_POINTER pLANPage1_t;
1362
1363 #define MPI_LAN_PAGE1_PAGEVERSION                       (0x03)
1364
1365 #define MPI_LAN_PAGE1_DEV_STATE_RESET                   (0x00)
1366 #define MPI_LAN_PAGE1_DEV_STATE_OPERATIONAL             (0x01)
1367
1368 #endif
1369