Merge branch 'vendor/MDOCML'
[dragonfly.git] / sys / dev / drm / i915 / intel_panel.c
1 /*
2  * Copyright © 2006-2010 Intel Corporation
3  * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
4  *
5  * Permission is hereby granted, free of charge, to any person obtaining a
6  * copy of this software and associated documentation files (the "Software"),
7  * to deal in the Software without restriction, including without limitation
8  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9  * and/or sell copies of the Software, and to permit persons to whom the
10  * Software is furnished to do so, subject to the following conditions:
11  *
12  * The above copyright notice and this permission notice (including the next
13  * paragraph) shall be included in all copies or substantial portions of the
14  * Software.
15  *
16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22  * DEALINGS IN THE SOFTWARE.
23  *
24  * Authors:
25  *      Eric Anholt <eric@anholt.net>
26  *      Dave Airlie <airlied@linux.ie>
27  *      Jesse Barnes <jesse.barnes@intel.com>
28  *      Chris Wilson <chris@chris-wilson.co.uk>
29  */
30
31 #include <drm/drmP.h>
32 #include <drm/i915_drm.h>
33 #include "intel_drv.h"
34
35 #define PCI_LBPC 0xf4 /* legacy/combination backlight modes */
36
37 void
38 intel_fixed_panel_mode(struct drm_display_mode *fixed_mode,
39                        struct drm_display_mode *adjusted_mode)
40 {
41         adjusted_mode->hdisplay = fixed_mode->hdisplay;
42         adjusted_mode->hsync_start = fixed_mode->hsync_start;
43         adjusted_mode->hsync_end = fixed_mode->hsync_end;
44         adjusted_mode->htotal = fixed_mode->htotal;
45
46         adjusted_mode->vdisplay = fixed_mode->vdisplay;
47         adjusted_mode->vsync_start = fixed_mode->vsync_start;
48         adjusted_mode->vsync_end = fixed_mode->vsync_end;
49         adjusted_mode->vtotal = fixed_mode->vtotal;
50
51         adjusted_mode->clock = fixed_mode->clock;
52 }
53
54 /* adjusted_mode has been preset to be the panel's fixed mode */
55 void
56 intel_pch_panel_fitting(struct drm_device *dev,
57                         int fitting_mode,
58                         const struct drm_display_mode *mode,
59                         struct drm_display_mode *adjusted_mode)
60 {
61         struct drm_i915_private *dev_priv = dev->dev_private;
62         int x, y, width, height;
63
64         x = y = width = height = 0;
65
66         /* Native modes don't need fitting */
67         if (adjusted_mode->hdisplay == mode->hdisplay &&
68             adjusted_mode->vdisplay == mode->vdisplay)
69                 goto done;
70
71         switch (fitting_mode) {
72         case DRM_MODE_SCALE_CENTER:
73                 width = mode->hdisplay;
74                 height = mode->vdisplay;
75                 x = (adjusted_mode->hdisplay - width + 1)/2;
76                 y = (adjusted_mode->vdisplay - height + 1)/2;
77                 break;
78
79         case DRM_MODE_SCALE_ASPECT:
80                 /* Scale but preserve the aspect ratio */
81                 {
82                         u32 scaled_width = adjusted_mode->hdisplay * mode->vdisplay;
83                         u32 scaled_height = mode->hdisplay * adjusted_mode->vdisplay;
84                         if (scaled_width > scaled_height) { /* pillar */
85                                 width = scaled_height / mode->vdisplay;
86                                 if (width & 1)
87                                         width++;
88                                 x = (adjusted_mode->hdisplay - width + 1) / 2;
89                                 y = 0;
90                                 height = adjusted_mode->vdisplay;
91                         } else if (scaled_width < scaled_height) { /* letter */
92                                 height = scaled_width / mode->hdisplay;
93                                 if (height & 1)
94                                         height++;
95                                 y = (adjusted_mode->vdisplay - height + 1) / 2;
96                                 x = 0;
97                                 width = adjusted_mode->hdisplay;
98                         } else {
99                                 x = y = 0;
100                                 width = adjusted_mode->hdisplay;
101                                 height = adjusted_mode->vdisplay;
102                         }
103                 }
104                 break;
105
106         default:
107         case DRM_MODE_SCALE_FULLSCREEN:
108                 x = y = 0;
109                 width = adjusted_mode->hdisplay;
110                 height = adjusted_mode->vdisplay;
111                 break;
112         }
113
114 done:
115         dev_priv->pch_pf_pos = (x << 16) | y;
116         dev_priv->pch_pf_size = (width << 16) | height;
117 }
118
119 static int is_backlight_combination_mode(struct drm_device *dev)
120 {
121         struct drm_i915_private *dev_priv = dev->dev_private;
122
123         if (INTEL_INFO(dev)->gen >= 4)
124                 return I915_READ(BLC_PWM_CTL2) & BLM_COMBINATION_MODE;
125
126         if (IS_GEN2(dev))
127                 return I915_READ(BLC_PWM_CTL) & BLM_LEGACY_MODE;
128
129         return 0;
130 }
131
132 static u32 i915_read_blc_pwm_ctl(struct drm_device *dev)
133 {
134         struct drm_i915_private *dev_priv = dev->dev_private;
135         u32 val;
136
137         /* Restore the CTL value if it lost, e.g. GPU reset */
138
139         if (HAS_PCH_SPLIT(dev_priv->dev)) {
140                 val = I915_READ(BLC_PWM_PCH_CTL2);
141                 if (dev_priv->regfile.saveBLC_PWM_CTL2 == 0) {
142                         dev_priv->regfile.saveBLC_PWM_CTL2 = val;
143                 } else if (val == 0) {
144                         val = dev_priv->regfile.saveBLC_PWM_CTL2;
145                         I915_WRITE(BLC_PWM_PCH_CTL2, val);
146                 }
147         } else {
148                 val = I915_READ(BLC_PWM_CTL);
149                 if (dev_priv->regfile.saveBLC_PWM_CTL == 0) {
150                         dev_priv->regfile.saveBLC_PWM_CTL = val;
151                         if (INTEL_INFO(dev)->gen >= 4)
152                                 dev_priv->regfile.saveBLC_PWM_CTL2 =
153                                         I915_READ(BLC_PWM_CTL2);
154                 } else if (val == 0) {
155                         val = dev_priv->regfile.saveBLC_PWM_CTL;
156                         I915_WRITE(BLC_PWM_CTL, val);
157                         if (INTEL_INFO(dev)->gen >= 4)
158                                 I915_WRITE(BLC_PWM_CTL2,
159                                            dev_priv->regfile.saveBLC_PWM_CTL2);
160                 }
161         }
162
163         return val;
164 }
165
166 static u32 _intel_panel_get_max_backlight(struct drm_device *dev)
167 {
168         u32 max;
169
170         max = i915_read_blc_pwm_ctl(dev);
171
172         if (HAS_PCH_SPLIT(dev)) {
173                 max >>= 16;
174         } else {
175                 if (INTEL_INFO(dev)->gen < 4)
176                         max >>= 17;
177                 else
178                         max >>= 16;
179
180                 if (is_backlight_combination_mode(dev))
181                         max *= 0xff;
182         }
183
184         return max;
185 }
186
187 u32 intel_panel_get_max_backlight(struct drm_device *dev)
188 {
189         u32 max;
190
191         max = _intel_panel_get_max_backlight(dev);
192         if (max == 0) {
193                 /* XXX add code here to query mode clock or hardware clock
194                  * and program max PWM appropriately.
195                  */
196 #if 0
197                 pr_warn_once("fixme: max PWM is zero\n");
198 #endif
199                 return 1;
200         }
201
202         DRM_DEBUG_DRIVER("max backlight PWM = %d\n", max);
203         return max;
204 }
205
206 static u32 intel_panel_get_backlight(struct drm_device *dev)
207 {
208         struct drm_i915_private *dev_priv = dev->dev_private;
209         u32 val;
210
211         if (HAS_PCH_SPLIT(dev)) {
212                 val = I915_READ(BLC_PWM_CPU_CTL) & BACKLIGHT_DUTY_CYCLE_MASK;
213         } else {
214                 val = I915_READ(BLC_PWM_CTL) & BACKLIGHT_DUTY_CYCLE_MASK;
215                 if (INTEL_INFO(dev)->gen < 4)
216                         val >>= 1;
217
218                 if (is_backlight_combination_mode(dev)) {
219                         u8 lbpc;
220
221                         lbpc = pci_read_config(dev->dev, PCI_LBPC, 1);
222                         val *= lbpc;
223                 }
224         }
225
226         DRM_DEBUG("get backlight PWM = %d\n", val);
227         return val;
228 }
229
230 static void intel_pch_panel_set_backlight(struct drm_device *dev, u32 level)
231 {
232         struct drm_i915_private *dev_priv = dev->dev_private;
233         u32 val = I915_READ(BLC_PWM_CPU_CTL) & ~BACKLIGHT_DUTY_CYCLE_MASK;
234         I915_WRITE(BLC_PWM_CPU_CTL, val | level);
235 }
236
237 static void intel_panel_actually_set_backlight(struct drm_device *dev, u32 level)
238 {
239         struct drm_i915_private *dev_priv = dev->dev_private;
240         u32 tmp;
241
242         DRM_DEBUG("set backlight PWM = %d\n", level);
243
244         if (HAS_PCH_SPLIT(dev))
245                 return intel_pch_panel_set_backlight(dev, level);
246
247         if (is_backlight_combination_mode(dev)) {
248                 u32 max = intel_panel_get_max_backlight(dev);
249                 u8 lbpc;
250
251                 lbpc = level * 0xfe / max + 1;
252                 level /= lbpc;
253                 pci_write_config(dev->dev, PCI_LBPC, lbpc, 4);
254         }
255
256         tmp = I915_READ(BLC_PWM_CTL);
257         if (INTEL_INFO(dev)->gen < 4) 
258                 level <<= 1;
259         tmp &= ~BACKLIGHT_DUTY_CYCLE_MASK;
260         I915_WRITE(BLC_PWM_CTL, tmp | level);
261 }
262
263 void intel_panel_set_backlight(struct drm_device *dev, u32 level)
264 {
265         struct drm_i915_private *dev_priv = dev->dev_private;
266
267         dev_priv->backlight_level = level;
268         if (dev_priv->backlight_enabled)
269                 intel_panel_actually_set_backlight(dev, level);
270 }
271
272 void intel_panel_disable_backlight(struct drm_device *dev)
273 {
274         struct drm_i915_private *dev_priv = dev->dev_private;
275
276         dev_priv->backlight_enabled = false;
277         intel_panel_actually_set_backlight(dev, 0);
278
279         if (INTEL_INFO(dev)->gen >= 4) {
280                 uint32_t reg;
281
282                 reg = HAS_PCH_SPLIT(dev) ? BLC_PWM_CPU_CTL2 : BLC_PWM_CTL2;
283
284                 I915_WRITE(reg, I915_READ(reg) & ~BLM_PWM_ENABLE);
285         }
286 }
287
288 void intel_panel_enable_backlight(struct drm_device *dev,
289                                   enum i915_pipe pipe)
290 {
291         struct drm_i915_private *dev_priv = dev->dev_private;
292
293         if (dev_priv->backlight_level == 0)
294                 dev_priv->backlight_level = intel_panel_get_max_backlight(dev);
295
296         if (INTEL_INFO(dev)->gen >= 4) {
297                 uint32_t reg, tmp;
298
299                 reg = HAS_PCH_SPLIT(dev) ? BLC_PWM_CPU_CTL2 : BLC_PWM_CTL2;
300
301
302                 tmp = I915_READ(reg);
303
304                 /* Note that this can also get called through dpms changes. And
305                  * we don't track the backlight dpms state, hence check whether
306                  * we have to do anything first. */
307                 if (tmp & BLM_PWM_ENABLE)
308                         goto set_level;
309
310                 if (dev_priv->num_pipe == 3)
311                         tmp &= ~BLM_PIPE_SELECT_IVB;
312                 else
313                         tmp &= ~BLM_PIPE_SELECT;
314
315                 tmp |= BLM_PIPE(pipe);
316                 tmp &= ~BLM_PWM_ENABLE;
317
318                 I915_WRITE(reg, tmp);
319                 POSTING_READ(reg);
320                 I915_WRITE(reg, tmp | BLM_PWM_ENABLE);
321
322                 if (HAS_PCH_SPLIT(dev)) {
323                         tmp = I915_READ(BLC_PWM_PCH_CTL1);
324                         tmp |= BLM_PCH_PWM_ENABLE;
325                         tmp &= ~BLM_PCH_OVERRIDE_ENABLE;
326                         I915_WRITE(BLC_PWM_PCH_CTL1, tmp);
327                 }
328         }
329
330 set_level:
331         /* Call below after setting BLC_PWM_CPU_CTL2 and BLC_PWM_PCH_CTL1.
332          * BLC_PWM_CPU_CTL may be cleared to zero automatically when these
333          * registers are set.
334          */
335         dev_priv->backlight_enabled = true;
336         intel_panel_actually_set_backlight(dev, dev_priv->backlight_level);
337 }
338
339 static void intel_panel_init_backlight(struct drm_device *dev)
340 {
341         struct drm_i915_private *dev_priv = dev->dev_private;
342
343         dev_priv->backlight_level = intel_panel_get_backlight(dev);
344         dev_priv->backlight_enabled = dev_priv->backlight_level != 0;
345 }
346
347 enum drm_connector_status
348 intel_panel_detect(struct drm_device *dev)
349 {
350 #if 0
351         struct drm_i915_private *dev_priv = dev->dev_private;
352 #endif
353
354         if (i915_panel_ignore_lid)
355                 return i915_panel_ignore_lid > 0 ?
356                         connector_status_connected :
357                         connector_status_disconnected;
358
359         /* opregion lid state on HP 2540p is wrong at boot up,
360          * appears to be either the BIOS or Linux ACPI fault */
361 #if 0
362         /* Assume that the BIOS does not lie through the OpRegion... */
363         if (dev_priv->opregion.lid_state)
364                 return ioread32(dev_priv->opregion.lid_state) & 0x1 ?
365                         connector_status_connected :
366                         connector_status_disconnected;
367 #endif
368
369         return connector_status_unknown;
370 }
371
372 #ifdef CONFIG_BACKLIGHT_CLASS_DEVICE
373 static int intel_panel_update_status(struct backlight_device *bd)
374 {
375         struct drm_device *dev = bl_get_data(bd);
376         intel_panel_set_backlight(dev, bd->props.brightness);
377         return 0;
378 }
379
380 static int intel_panel_get_brightness(struct backlight_device *bd)
381 {
382         struct drm_device *dev = bl_get_data(bd);
383         struct drm_i915_private *dev_priv = dev->dev_private;
384         return dev_priv->backlight_level;
385 }
386
387 static const struct backlight_ops intel_panel_bl_ops = {
388         .update_status = intel_panel_update_status,
389         .get_brightness = intel_panel_get_brightness,
390 };
391
392 int intel_panel_setup_backlight(struct drm_connector *connector)
393 {
394         struct drm_device *dev = connector->dev;
395         struct drm_i915_private *dev_priv = dev->dev_private;
396         struct backlight_properties props;
397
398         intel_panel_init_backlight(dev);
399
400         if (WARN_ON(dev_priv->backlight))
401                 return -ENODEV;
402
403         memset(&props, 0, sizeof(props));
404         props.type = BACKLIGHT_RAW;
405         props.max_brightness = _intel_panel_get_max_backlight(dev);
406         if (props.max_brightness == 0) {
407                 DRM_DEBUG_DRIVER("Failed to get maximum backlight value\n");
408                 return -ENODEV;
409         }
410         dev_priv->backlight =
411                 backlight_device_register("intel_backlight",
412                                           &connector->kdev, dev,
413                                           &intel_panel_bl_ops, &props);
414
415         if (IS_ERR(dev_priv->backlight)) {
416                 DRM_ERROR("Failed to register backlight: %ld\n",
417                           PTR_ERR(dev_priv->backlight));
418                 dev_priv->backlight = NULL;
419                 return -ENODEV;
420         }
421         dev_priv->backlight->props.brightness = intel_panel_get_backlight(dev);
422         return 0;
423 }
424
425 void intel_panel_destroy_backlight(struct drm_device *dev)
426 {
427         struct drm_i915_private *dev_priv = dev->dev_private;
428         if (dev_priv->backlight) {
429                 backlight_device_unregister(dev_priv->backlight);
430                 dev_priv->backlight = NULL;
431         }
432 }
433 #else
434 int intel_panel_setup_backlight(struct drm_connector *connector)
435 {
436         intel_panel_init_backlight(connector->dev);
437         return 0;
438 }
439
440 void intel_panel_destroy_backlight(struct drm_device *dev)
441 {
442         return;
443 }
444 #endif
445
446 int intel_panel_init(struct intel_panel *panel,
447                      struct drm_display_mode *fixed_mode)
448 {
449         panel->fixed_mode = fixed_mode;
450
451         return 0;
452 }
453
454 void intel_panel_fini(struct intel_panel *panel)
455 {
456         struct intel_connector *intel_connector =
457                 container_of(panel, struct intel_connector, panel);
458
459         if (panel->fixed_mode)
460                 drm_mode_destroy(intel_connector->base.dev, panel->fixed_mode);
461 }