2 * Copyright (c) 1998 - 2006 Søren Schmidt <sos@FreeBSD.org>
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer,
10 * without modification, immediately at the beginning of the file.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26 * $FreeBSD: src/sys/dev/ata/ata-pci.c,v 1.121 2007/02/23 12:18:33 piso Exp $
27 * $DragonFly: src/sys/dev/disk/nata/ata-pci.c,v 1.8 2007/12/09 22:32:16 tgen Exp $
32 #include <sys/param.h>
34 #include <sys/bus_resource.h>
35 #include <sys/malloc.h>
36 #include <sys/module.h>
39 #include <sys/systm.h>
41 #include <bus/pci/pcireg.h>
42 #include <bus/pci/pcivar.h>
49 static MALLOC_DEFINE(M_ATAPCI, "ata_pci", "ATA driver PCI");
52 #define IOMASK 0xfffffffc
53 #define ATA_PROBE_OK -10
55 static const struct none_atapci {
60 } none_atapci_table[] = {
61 /* Appears on Intel PRO/1000 PM */
62 { ATA_INTEL_ID, 0x108d, ATA_INTEL_ID, 0x0000 },
67 ata_legacy(device_t dev)
69 return (((pci_read_config(dev, PCIR_PROGIF, 1)&PCIP_STORAGE_IDE_MASTERDEV)&&
70 ((pci_read_config(dev, PCIR_PROGIF, 1) &
71 (PCIP_STORAGE_IDE_MODEPRIM | PCIP_STORAGE_IDE_MODESEC)) !=
72 (PCIP_STORAGE_IDE_MODEPRIM | PCIP_STORAGE_IDE_MODESEC))) ||
73 (!pci_read_config(dev, PCIR_BAR(0), 4) &&
74 !pci_read_config(dev, PCIR_BAR(1), 4) &&
75 !pci_read_config(dev, PCIR_BAR(2), 4) &&
76 !pci_read_config(dev, PCIR_BAR(3), 4)));
81 ata_pci_probe(device_t dev)
83 if (pci_get_class(dev) != PCIC_STORAGE)
86 switch (pci_get_vendor(dev)) {
88 if (!ata_acard_ident(dev))
91 case ATA_ACER_LABS_ID:
92 if (!ata_ali_ident(dev))
96 if (!ata_amd_ident(dev))
100 if (!ata_ati_ident(dev))
104 if (!ata_cyrix_ident(dev))
108 if (!ata_cypress_ident(dev))
111 case ATA_HIGHPOINT_ID:
112 if (!ata_highpoint_ident(dev))
116 if (!ata_intel_ident(dev))
120 if (!ata_ite_ident(dev))
124 if (!ata_jmicron_ident(dev))
128 if (!ata_marvell_ident(dev))
131 case ATA_NATIONAL_ID:
132 if (!ata_national_ident(dev))
136 if (!ata_netcell_ident(dev))
140 if (!ata_nvidia_ident(dev))
144 if (!ata_promise_ident(dev))
147 case ATA_SERVERWORKS_ID:
148 if (!ata_serverworks_ident(dev))
151 case ATA_SILICON_IMAGE_ID:
152 if (!ata_sii_ident(dev))
156 if (!ata_sis_ident(dev))
160 if (!ata_via_ident(dev))
164 if (pci_get_devid(dev) == ATA_CENATEK_ROCKET) {
165 ata_generic_ident(dev);
166 device_set_desc(dev, "Cenatek Rocket Drive controller");
171 if (pci_get_devid(dev) == ATA_MICRON_RZ1000 ||
172 pci_get_devid(dev) == ATA_MICRON_RZ1001) {
173 ata_generic_ident(dev);
175 "RZ 100? ATA controller !WARNING! data loss/corruption risk");
181 /* unknown chipset, try generic AHCI or DMA if it seems possible */
182 if (pci_get_class(dev) == PCIC_STORAGE) {
183 if (pci_get_subclass(dev) == PCIS_STORAGE_SATA) {
184 if (!ata_genahci_ident(dev))
186 } else if (pci_get_subclass(dev) == PCIS_STORAGE_IDE) {
187 uint16_t vendor, device, subvendor, subdevice;
188 const struct none_atapci *e;
190 vendor = pci_get_vendor(dev);
191 device = pci_get_device(dev);
192 subvendor = pci_get_subvendor(dev);
193 subdevice = pci_get_subdevice(dev);
194 for (e = none_atapci_table; e->vendor != 0xffff; ++e) {
195 if (e->vendor == vendor && e->device == device &&
196 e->subvendor == subvendor && e->subdevice == subdevice)
200 if (!ata_generic_ident(dev))
208 ata_pci_attach(device_t dev)
210 struct ata_pci_controller *ctlr = device_get_softc(dev);
214 /* do chipset specific setups only needed once */
215 if (ata_legacy(dev) || pci_read_config(dev, PCIR_BAR(2), 4) & IOMASK)
219 ctlr->allocate = ata_pci_allocate;
222 /* if needed try to enable busmastering */
223 cmd = pci_read_config(dev, PCIR_COMMAND, 2);
224 if (!(cmd & PCIM_CMD_BUSMASTEREN)) {
225 pci_write_config(dev, PCIR_COMMAND, cmd | PCIM_CMD_BUSMASTEREN, 2);
226 cmd = pci_read_config(dev, PCIR_COMMAND, 2);
229 /* if busmastering mode "stuck" use it */
230 if ((cmd & PCIM_CMD_BUSMASTEREN) == PCIM_CMD_BUSMASTEREN) {
231 ctlr->r_type1 = SYS_RES_IOPORT;
232 ctlr->r_rid1 = ATA_BMADDR_RID;
233 ctlr->r_res1 = bus_alloc_resource_any(dev, ctlr->r_type1, &ctlr->r_rid1,
235 /* Only set a dma init function if the device actually supports it. */
236 ctlr->dmainit = ata_pci_dmainit;
239 if (ctlr->chipinit(dev))
242 /* attach all channels on this controller */
243 for (unit = 0; unit < ctlr->channels; unit++) {
245 if ((unit == 0 || unit == 1) && ata_legacy(dev)) {
246 device_add_child(dev, "ata", unit);
249 /* XXX TGEN devclass_find_free_unit() implementation */
250 while (freeunit < devclass_get_maxunit(ata_devclass) &&
251 devclass_get_device(ata_devclass, freeunit) != NULL)
253 device_add_child(dev, "ata", freeunit);
255 bus_generic_attach(dev);
260 ata_pci_detach(device_t dev)
262 struct ata_pci_controller *ctlr = device_get_softc(dev);
266 /* detach & delete all children */
267 if (!device_get_children(dev, &children, &nchildren)) {
268 for (i = 0; i < nchildren; i++)
269 device_delete_child(dev, children[i]);
270 kfree(children, M_TEMP);
274 bus_teardown_intr(dev, ctlr->r_irq, ctlr->handle);
275 bus_release_resource(dev, SYS_RES_IRQ, ATA_IRQ_RID, ctlr->r_irq);
278 bus_release_resource(dev, ctlr->r_type2, ctlr->r_rid2, ctlr->r_res2);
280 bus_release_resource(dev, ctlr->r_type1, ctlr->r_rid1, ctlr->r_res1);
286 ata_pci_alloc_resource(device_t dev, device_t child, int type, int *rid,
287 u_long start, u_long end, u_long count, u_int flags)
289 struct ata_pci_controller *controller = device_get_softc(dev);
290 int unit = ((struct ata_channel *)device_get_softc(child))->unit;
291 struct resource *res = NULL;
294 if (type == SYS_RES_IOPORT) {
297 if (ata_legacy(dev)) {
298 start = (unit ? ATA_SECONDARY : ATA_PRIMARY);
300 end = start + count - 1;
302 myrid = PCIR_BAR(0) + (unit << 3);
303 res = BUS_ALLOC_RESOURCE(device_get_parent(dev), dev,
304 SYS_RES_IOPORT, &myrid,
305 start, end, count, flags);
308 case ATA_CTLADDR_RID:
309 if (ata_legacy(dev)) {
310 start = (unit ? ATA_SECONDARY : ATA_PRIMARY) + ATA_CTLOFFSET;
311 count = ATA_CTLIOSIZE;
312 end = start + count - 1;
314 myrid = PCIR_BAR(1) + (unit << 3);
315 res = BUS_ALLOC_RESOURCE(device_get_parent(dev), dev,
316 SYS_RES_IOPORT, &myrid,
317 start, end, count, flags);
321 if (type == SYS_RES_IRQ && *rid == ATA_IRQ_RID) {
322 if (ata_legacy(dev)) {
323 int irq = (unit == 0 ? 14 : 15);
325 res = BUS_ALLOC_RESOURCE(device_get_parent(dev), child,
326 SYS_RES_IRQ, rid, irq, irq, 1, flags);
329 res = controller->r_irq;
335 ata_pci_release_resource(device_t dev, device_t child, int type, int rid,
338 int unit = ((struct ata_channel *)device_get_softc(child))->unit;
340 if (type == SYS_RES_IOPORT) {
343 return BUS_RELEASE_RESOURCE(device_get_parent(dev), dev,
345 PCIR_BAR(0) + (unit << 3), r);
348 case ATA_CTLADDR_RID:
349 return BUS_RELEASE_RESOURCE(device_get_parent(dev), dev,
351 PCIR_BAR(1) + (unit << 3), r);
357 if (type == SYS_RES_IRQ) {
358 if (rid != ATA_IRQ_RID)
361 if (ata_legacy(dev)) {
362 return BUS_RELEASE_RESOURCE(device_get_parent(dev), child,
363 SYS_RES_IRQ, rid, r);
372 ata_pci_setup_intr(device_t dev, device_t child, struct resource *irq,
373 int flags, driver_intr_t *function, void *argument,
376 if (ata_legacy(dev)) {
377 return BUS_SETUP_INTR(device_get_parent(dev), child, irq,
378 flags, function, argument, cookiep, NULL);
381 struct ata_pci_controller *controller = device_get_softc(dev);
382 int unit = ((struct ata_channel *)device_get_softc(child))->unit;
384 controller->interrupt[unit].function = function;
385 controller->interrupt[unit].argument = argument;
386 *cookiep = controller;
392 ata_pci_teardown_intr(device_t dev, device_t child, struct resource *irq,
395 if (ata_legacy(dev)) {
396 return BUS_TEARDOWN_INTR(device_get_parent(dev), child, irq, cookie);
399 struct ata_pci_controller *controller = device_get_softc(dev);
400 int unit = ((struct ata_channel *)device_get_softc(child))->unit;
402 controller->interrupt[unit].function = NULL;
403 controller->interrupt[unit].argument = NULL;
409 ata_pci_allocate(device_t dev)
411 struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev));
412 struct ata_channel *ch = device_get_softc(dev);
413 struct resource *io = NULL, *ctlio = NULL;
416 rid = ATA_IOADDR_RID;
417 if (!(io = bus_alloc_resource_any(dev, SYS_RES_IOPORT, &rid, RF_ACTIVE)))
420 rid = ATA_CTLADDR_RID;
421 if (!(ctlio = bus_alloc_resource_any(dev, SYS_RES_IOPORT, &rid,RF_ACTIVE))){
422 bus_release_resource(dev, SYS_RES_IOPORT, ATA_IOADDR_RID, io);
426 for (i = ATA_DATA; i <= ATA_COMMAND; i ++) {
427 ch->r_io[i].res = io;
428 ch->r_io[i].offset = i;
430 ch->r_io[ATA_CONTROL].res = ctlio;
431 ch->r_io[ATA_CONTROL].offset = ata_legacy(device_get_parent(dev)) ? 0 : 2;
432 ch->r_io[ATA_IDX_ADDR].res = io;
433 ata_default_registers(dev);
435 for (i = ATA_BMCMD_PORT; i <= ATA_BMDTP_PORT; i++) {
436 ch->r_io[i].res = ctlr->r_res1;
437 ch->r_io[i].offset = (i - ATA_BMCMD_PORT) + (ch->unit*ATA_BMIOSIZE);
446 ata_pci_hw(device_t dev)
448 struct ata_channel *ch = device_get_softc(dev);
451 ch->hw.status = ata_pci_status;
455 ata_pci_status(device_t dev)
457 struct ata_channel *ch = device_get_softc(dev);
459 if ((dumping || !ata_legacy(device_get_parent(dev))) &&
460 ch->dma && ((ch->flags & ATA_ALWAYS_DMASTAT) ||
461 (ch->dma->flags & ATA_DMA_ACTIVE))) {
462 int bmstat = ATA_IDX_INB(ch, ATA_BMSTAT_PORT) & ATA_BMSTAT_MASK;
464 if ((bmstat & (ATA_BMSTAT_ACTIVE | ATA_BMSTAT_INTERRUPT)) !=
465 ATA_BMSTAT_INTERRUPT)
467 ATA_IDX_OUTB(ch, ATA_BMSTAT_PORT, bmstat & ~ATA_BMSTAT_ERROR);
470 if (ATA_IDX_INB(ch, ATA_ALTSTAT) & ATA_S_BUSY) {
472 if (ATA_IDX_INB(ch, ATA_ALTSTAT) & ATA_S_BUSY)
479 ata_pci_dmastart(device_t dev)
481 struct ata_channel *ch = device_get_softc(device_get_parent(dev));
484 ATA_IDX_OUTB(ch, ATA_BMSTAT_PORT, (ATA_IDX_INB(ch, ATA_BMSTAT_PORT) |
485 (ATA_BMSTAT_INTERRUPT | ATA_BMSTAT_ERROR)));
486 ATA_IDX_OUTL(ch, ATA_BMDTP_PORT, ch->dma->sg_bus);
487 ch->dma->flags |= ATA_DMA_ACTIVE;
488 val = ATA_IDX_INB(ch, ATA_BMCMD_PORT);
489 if (ch->dma->flags & ATA_DMA_READ)
490 val |= ATA_BMCMD_WRITE_READ;
492 val &= ~ATA_BMCMD_WRITE_READ;
493 ATA_IDX_OUTB(ch, ATA_BMCMD_PORT, val);
496 * Issue the start command separately from configuration setup,
497 * in case the hardware latches portions of the configuration.
499 ATA_IDX_OUTB(ch, ATA_BMCMD_PORT, val | ATA_BMCMD_START_STOP);
505 ata_pci_dmastop(device_t dev)
507 struct ata_channel *ch = device_get_softc(device_get_parent(dev));
510 ATA_IDX_OUTB(ch, ATA_BMCMD_PORT,
511 ATA_IDX_INB(ch, ATA_BMCMD_PORT) & ~ATA_BMCMD_START_STOP);
512 ch->dma->flags &= ~ATA_DMA_ACTIVE;
513 error = ATA_IDX_INB(ch, ATA_BMSTAT_PORT) & ATA_BMSTAT_MASK;
514 ATA_IDX_OUTB(ch, ATA_BMSTAT_PORT, ATA_BMSTAT_INTERRUPT | ATA_BMSTAT_ERROR);
519 ata_pci_dmareset(device_t dev)
521 struct ata_channel *ch = device_get_softc(dev);
523 ATA_IDX_OUTB(ch, ATA_BMCMD_PORT,
524 ATA_IDX_INB(ch, ATA_BMCMD_PORT) & ~ATA_BMCMD_START_STOP);
525 ch->dma->flags &= ~ATA_DMA_ACTIVE;
526 ATA_IDX_OUTB(ch, ATA_BMSTAT_PORT, ATA_BMSTAT_INTERRUPT | ATA_BMSTAT_ERROR);
527 ch->dma->unload(dev);
531 ata_pci_dmainit(device_t dev)
533 struct ata_channel *ch = device_get_softc(dev);
537 ch->dma->start = ata_pci_dmastart;
538 ch->dma->stop = ata_pci_dmastop;
539 ch->dma->reset = ata_pci_dmareset;
543 static device_method_t ata_pci_methods[] = {
544 /* device interface */
545 DEVMETHOD(device_probe, ata_pci_probe),
546 DEVMETHOD(device_attach, ata_pci_attach),
547 DEVMETHOD(device_detach, ata_pci_detach),
548 DEVMETHOD(device_shutdown, bus_generic_shutdown),
549 DEVMETHOD(device_suspend, bus_generic_suspend),
550 DEVMETHOD(device_resume, bus_generic_resume),
553 DEVMETHOD(bus_alloc_resource, ata_pci_alloc_resource),
554 DEVMETHOD(bus_release_resource, ata_pci_release_resource),
555 DEVMETHOD(bus_activate_resource, bus_generic_activate_resource),
556 DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource),
557 DEVMETHOD(bus_setup_intr, ata_pci_setup_intr),
558 DEVMETHOD(bus_teardown_intr, ata_pci_teardown_intr),
563 devclass_t atapci_devclass;
565 static driver_t ata_pci_driver = {
568 sizeof(struct ata_pci_controller),
571 DRIVER_MODULE(atapci, pci, ata_pci_driver, atapci_devclass, 0, 0);
572 MODULE_VERSION(atapci, 1);
573 MODULE_DEPEND(atapci, ata, 1, 1, 1);
576 ata_pcichannel_probe(device_t dev)
578 struct ata_channel *ch = device_get_softc(dev);
583 /* take care of green memory */
584 bzero(ch, sizeof(struct ata_channel));
586 /* find channel number on this controller */
587 device_get_children(device_get_parent(dev), &children, &count);
588 for (i = 0; i < count; i++) {
589 if (children[i] == dev)
592 kfree(children, M_TEMP);
594 ksprintf(buffer, "ATA channel %d", ch->unit);
595 device_set_desc_copy(dev, buffer);
597 return ata_probe(dev);
601 ata_pcichannel_attach(device_t dev)
603 struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev));
604 struct ata_channel *ch = device_get_softc(dev);
612 if ((error = ctlr->allocate(dev))) {
618 return ata_attach(dev);
622 ata_pcichannel_detach(device_t dev)
624 struct ata_channel *ch = device_get_softc(dev);
627 if ((error = ata_detach(dev)))
633 /* XXX SOS free resources for io and ctlio ?? */
639 ata_pcichannel_locking(device_t dev, int mode)
641 struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev));
642 struct ata_channel *ch = device_get_softc(dev);
645 return ctlr->locking(dev, mode);
651 ata_pcichannel_reset(device_t dev)
653 struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev));
654 struct ata_channel *ch = device_get_softc(dev);
656 /* if DMA engine present reset it */
660 ch->dma->unload(dev);
663 /* reset the controller HW */
667 ata_generic_reset(dev);
671 ata_pcichannel_setmode(device_t parent, device_t dev)
673 struct ata_pci_controller *ctlr = device_get_softc(GRANDPARENT(dev));
674 struct ata_device *atadev = device_get_softc(dev);
675 int mode = atadev->mode;
677 ctlr->setmode(dev, ATA_PIO_MAX);
679 ctlr->setmode(dev, mode);
682 static device_method_t ata_pcichannel_methods[] = {
683 /* device interface */
684 DEVMETHOD(device_probe, ata_pcichannel_probe),
685 DEVMETHOD(device_attach, ata_pcichannel_attach),
686 DEVMETHOD(device_detach, ata_pcichannel_detach),
687 DEVMETHOD(device_shutdown, bus_generic_shutdown),
688 DEVMETHOD(device_suspend, ata_suspend),
689 DEVMETHOD(device_resume, ata_resume),
692 DEVMETHOD(ata_setmode, ata_pcichannel_setmode),
693 DEVMETHOD(ata_locking, ata_pcichannel_locking),
694 DEVMETHOD(ata_reset, ata_pcichannel_reset),
699 driver_t ata_pcichannel_driver = {
701 ata_pcichannel_methods,
702 sizeof(struct ata_channel),
705 DRIVER_MODULE(ata, atapci, ata_pcichannel_driver, ata_devclass, 0, 0);