1 /* Move registers around to reduce number of move instructions needed.
2 Copyright (C) 1987, 88, 89, 92-98, 1999 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
22 /* This module looks for cases where matching constraints would force
23 an instruction to need a reload, and this reload would be a register
24 to register move. It then attempts to change the registers used by the
25 instruction to avoid the move instruction. */
29 #include "rtl.h" /* stdio.h must precede rtl.h for FFS. */
30 #include "insn-config.h"
35 #include "hard-reg-set.h"
38 #include "insn-flags.h"
39 #include "basic-block.h"
42 static int optimize_reg_copy_1 PROTO((rtx, rtx, rtx));
43 static void optimize_reg_copy_2 PROTO((rtx, rtx, rtx));
44 static void optimize_reg_copy_3 PROTO((rtx, rtx, rtx));
45 static rtx gen_add3_insn PROTO((rtx, rtx, rtx));
46 static void copy_src_to_dest PROTO((rtx, rtx, rtx, int, int));
47 static int *regmove_bb_head;
50 int with[MAX_RECOG_OPERANDS];
51 enum { READ, WRITE, READWRITE } use[MAX_RECOG_OPERANDS];
52 int commutative[MAX_RECOG_OPERANDS];
53 int early_clobber[MAX_RECOG_OPERANDS];
56 static rtx discover_flags_reg PROTO((void));
57 static void mark_flags_life_zones PROTO((rtx));
58 static void flags_set_1 PROTO((rtx, rtx));
60 static int try_auto_increment PROTO((rtx, rtx, rtx, rtx, HOST_WIDE_INT, int));
61 static int find_matches PROTO((rtx, struct match *));
62 static int fixup_match_1 PROTO((rtx, rtx, rtx, rtx, rtx, int, int, int, FILE *))
64 static int reg_is_remote_constant_p PROTO((rtx, rtx, rtx));
65 static int stable_and_no_regs_but_for_p PROTO((rtx, rtx, rtx));
66 static int regclass_compatible_p PROTO((int, int));
67 static int loop_depth;
69 /* Return non-zero if registers with CLASS1 and CLASS2 can be merged without
70 causing too much register allocation problems. */
72 regclass_compatible_p (class0, class1)
75 return (class0 == class1
76 || (reg_class_subset_p (class0, class1)
77 && ! CLASS_LIKELY_SPILLED_P (class0))
78 || (reg_class_subset_p (class1, class0)
79 && ! CLASS_LIKELY_SPILLED_P (class1)));
82 /* Generate and return an insn body to add r1 and c,
83 storing the result in r0. */
85 gen_add3_insn (r0, r1, c)
88 int icode = (int) add_optab->handlers[(int) GET_MODE (r0)].insn_code;
90 if (icode == CODE_FOR_nothing
91 || ! (*insn_operand_predicate[icode][0]) (r0, insn_operand_mode[icode][0])
92 || ! (*insn_operand_predicate[icode][1]) (r1, insn_operand_mode[icode][1])
93 || ! (*insn_operand_predicate[icode][2]) (c, insn_operand_mode[icode][2]))
96 return (GEN_FCN (icode) (r0, r1, c));
100 /* INC_INSN is an instruction that adds INCREMENT to REG.
101 Try to fold INC_INSN as a post/pre in/decrement into INSN.
102 Iff INC_INSN_SET is nonzero, inc_insn has a destination different from src.
103 Return nonzero for success. */
105 try_auto_increment (insn, inc_insn, inc_insn_set, reg, increment, pre)
106 rtx reg, insn, inc_insn ,inc_insn_set;
107 HOST_WIDE_INT increment;
110 enum rtx_code inc_code;
112 rtx pset = single_set (insn);
115 /* Can't use the size of SET_SRC, we might have something like
116 (sign_extend:SI (mem:QI ... */
117 rtx use = find_use_as_address (pset, reg, 0);
118 if (use != 0 && use != (rtx) 1)
120 int size = GET_MODE_SIZE (GET_MODE (use));
122 || (HAVE_POST_INCREMENT
123 && pre == 0 && (inc_code = POST_INC, increment == size))
124 || (HAVE_PRE_INCREMENT
125 && pre == 1 && (inc_code = PRE_INC, increment == size))
126 || (HAVE_POST_DECREMENT
127 && pre == 0 && (inc_code = POST_DEC, increment == -size))
128 || (HAVE_PRE_DECREMENT
129 && pre == 1 && (inc_code = PRE_DEC, increment == -size))
135 &SET_SRC (inc_insn_set),
136 XEXP (SET_SRC (inc_insn_set), 0), 1);
137 validate_change (insn, &XEXP (use, 0),
138 gen_rtx_fmt_e (inc_code, Pmode, reg), 1);
139 if (apply_change_group ())
142 = gen_rtx_EXPR_LIST (REG_INC,
143 reg, REG_NOTES (insn));
146 PUT_CODE (inc_insn, NOTE);
147 NOTE_LINE_NUMBER (inc_insn) = NOTE_INSN_DELETED;
148 NOTE_SOURCE_FILE (inc_insn) = 0;
158 /* Determine if the pattern generated by add_optab has a clobber,
159 such as might be issued for a flags hard register. To make the
160 code elsewhere simpler, we handle cc0 in this same framework.
162 Return the register if one was discovered. Return NULL_RTX if
163 if no flags were found. Return pc_rtx if we got confused. */
166 discover_flags_reg ()
169 tmp = gen_rtx_REG (word_mode, 10000);
170 tmp = gen_add3_insn (tmp, tmp, GEN_INT (2));
172 /* If we get something that isn't a simple set, or a
173 [(set ..) (clobber ..)], this whole function will go wrong. */
174 if (GET_CODE (tmp) == SET)
176 else if (GET_CODE (tmp) == PARALLEL)
180 if (XVECLEN (tmp, 0) != 2)
182 tmp = XVECEXP (tmp, 0, 1);
183 if (GET_CODE (tmp) != CLOBBER)
187 /* Don't do anything foolish if the md wanted to clobber a
188 scratch or something. We only care about hard regs.
189 Moreover we don't like the notion of subregs of hard regs. */
190 if (GET_CODE (tmp) == SUBREG
191 && GET_CODE (SUBREG_REG (tmp)) == REG
192 && REGNO (SUBREG_REG (tmp)) < FIRST_PSEUDO_REGISTER)
194 found = (GET_CODE (tmp) == REG && REGNO (tmp) < FIRST_PSEUDO_REGISTER);
196 return (found ? tmp : NULL_RTX);
202 /* It is a tedious task identifying when the flags register is live and
203 when it is safe to optimize. Since we process the instruction stream
204 multiple times, locate and record these live zones by marking the
205 mode of the instructions --
207 QImode is used on the instruction at which the flags becomes live.
209 HImode is used within the range (exclusive) that the flags are
210 live. Thus the user of the flags is not marked.
212 All other instructions are cleared to VOIDmode. */
214 /* Used to communicate with flags_set_1. */
215 static rtx flags_set_1_rtx;
216 static int flags_set_1_set;
219 mark_flags_life_zones (flags)
227 /* If we found a flags register on a cc0 host, bail. */
228 if (flags == NULL_RTX)
230 else if (flags != cc0_rtx)
234 /* Simple cases first: if no flags, clear all modes. If confusing,
235 mark the entire function as being in a flags shadow. */
236 if (flags == NULL_RTX || flags == pc_rtx)
238 enum machine_mode mode = (flags ? HImode : VOIDmode);
240 for (insn = get_insns(); insn; insn = NEXT_INSN (insn))
241 PUT_MODE (insn, mode);
249 flags_regno = REGNO (flags);
250 flags_nregs = HARD_REGNO_NREGS (flags_regno, GET_MODE (flags));
252 flags_set_1_rtx = flags;
254 /* Process each basic block. */
255 for (block = n_basic_blocks - 1; block >= 0; block--)
260 insn = BLOCK_HEAD (block);
261 end = BLOCK_END (block);
263 /* Look out for the (unlikely) case of flags being live across
264 basic block boundaries. */
269 for (i = 0; i < flags_nregs; ++i)
270 live |= REGNO_REG_SET_P (BASIC_BLOCK (block)->global_live_at_start,
277 /* Process liveness in reverse order of importance --
278 alive, death, birth. This lets more important info
279 overwrite the mode of lesser info. */
281 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i')
284 /* In the cc0 case, death is not marked in reg notes,
285 but is instead the mere use of cc0 when it is alive. */
286 if (live && reg_mentioned_p (cc0_rtx, PATTERN (insn)))
289 /* In the hard reg case, we watch death notes. */
290 if (live && find_regno_note (insn, REG_DEAD, flags_regno))
293 PUT_MODE (insn, (live ? HImode : VOIDmode));
295 /* In either case, birth is denoted simply by it's presence
296 as the destination of a set. */
298 note_stores (PATTERN (insn), flags_set_1);
302 PUT_MODE (insn, QImode);
306 PUT_MODE (insn, (live ? HImode : VOIDmode));
310 insn = NEXT_INSN (insn);
315 /* A subroutine of mark_flags_life_zones, called through note_stores. */
321 if (GET_CODE (pat) == SET
322 && reg_overlap_mentioned_p (x, flags_set_1_rtx))
326 static int *regno_src_regno;
328 /* Indicate how good a choice REG (which appears as a source) is to replace
329 a destination register with. The higher the returned value, the better
330 the choice. The main objective is to avoid using a register that is
331 a candidate for tying to a hard register, since the output might in
332 turn be a candidate to be tied to a different hard register. */
334 replacement_quality(reg)
339 /* Bad if this isn't a register at all. */
340 if (GET_CODE (reg) != REG)
343 /* If this register is not meant to get a hard register,
344 it is a poor choice. */
345 if (REG_LIVE_LENGTH (REGNO (reg)) < 0)
348 src_regno = regno_src_regno[REGNO (reg)];
350 /* If it was not copied from another register, it is fine. */
354 /* Copied from a hard register? */
355 if (src_regno < FIRST_PSEUDO_REGISTER)
358 /* Copied from a pseudo register - not as bad as from a hard register,
359 yet still cumbersome, since the register live length will be lengthened
360 when the registers get tied. */
364 /* INSN is a copy from SRC to DEST, both registers, and SRC does not die
367 Search forward to see if SRC dies before either it or DEST is modified,
368 but don't scan past the end of a basic block. If so, we can replace SRC
369 with DEST and let SRC die in INSN.
371 This will reduce the number of registers live in that range and may enable
372 DEST to be tied to SRC, thus often saving one register in addition to a
373 register-register copy. */
376 optimize_reg_copy_1 (insn, dest, src)
384 int sregno = REGNO (src);
385 int dregno = REGNO (dest);
387 /* We don't want to mess with hard regs if register classes are small. */
389 || (SMALL_REGISTER_CLASSES
390 && (sregno < FIRST_PSEUDO_REGISTER
391 || dregno < FIRST_PSEUDO_REGISTER))
392 /* We don't see all updates to SP if they are in an auto-inc memory
393 reference, so we must disallow this optimization on them. */
394 || sregno == STACK_POINTER_REGNUM || dregno == STACK_POINTER_REGNUM)
397 for (p = NEXT_INSN (insn); p; p = NEXT_INSN (p))
399 if (GET_CODE (p) == CODE_LABEL || GET_CODE (p) == JUMP_INSN
400 || (GET_CODE (p) == NOTE
401 && (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG
402 || NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)))
405 /* ??? We can't scan past the end of a basic block without updating
406 the register lifetime info (REG_DEAD/basic_block_live_at_start).
407 A CALL_INSN might be the last insn of a basic block, if it is inside
408 an EH region. There is no easy way to tell, so we just always break
409 when we see a CALL_INSN if flag_exceptions is nonzero. */
410 if (flag_exceptions && GET_CODE (p) == CALL_INSN)
413 if (GET_RTX_CLASS (GET_CODE (p)) != 'i')
416 if (reg_set_p (src, p) || reg_set_p (dest, p)
417 /* Don't change a USE of a register. */
418 || (GET_CODE (PATTERN (p)) == USE
419 && reg_overlap_mentioned_p (src, XEXP (PATTERN (p), 0))))
422 /* See if all of SRC dies in P. This test is slightly more
423 conservative than it needs to be. */
424 if ((note = find_regno_note (p, REG_DEAD, sregno)) != 0
425 && GET_MODE (XEXP (note, 0)) == GET_MODE (src))
433 /* We can do the optimization. Scan forward from INSN again,
434 replacing regs as we go. Set FAILED if a replacement can't
435 be done. In that case, we can't move the death note for SRC.
436 This should be rare. */
438 /* Set to stop at next insn. */
439 for (q = next_real_insn (insn);
440 q != next_real_insn (p);
441 q = next_real_insn (q))
443 if (reg_overlap_mentioned_p (src, PATTERN (q)))
445 /* If SRC is a hard register, we might miss some
446 overlapping registers with validate_replace_rtx,
447 so we would have to undo it. We can't if DEST is
448 present in the insn, so fail in that combination
450 if (sregno < FIRST_PSEUDO_REGISTER
451 && reg_mentioned_p (dest, PATTERN (q)))
454 /* Replace all uses and make sure that the register
455 isn't still present. */
456 else if (validate_replace_rtx (src, dest, q)
457 && (sregno >= FIRST_PSEUDO_REGISTER
458 || ! reg_overlap_mentioned_p (src,
461 /* We assume that a register is used exactly once per
462 insn in the REG_N_REFS updates below. If this is not
463 correct, no great harm is done.
465 Since we do not know if we will change the lifetime of
466 SREGNO or DREGNO, we must not update REG_LIVE_LENGTH
467 or REG_N_CALLS_CROSSED at this time. */
468 if (sregno >= FIRST_PSEUDO_REGISTER)
469 REG_N_REFS (sregno) -= loop_depth;
471 if (dregno >= FIRST_PSEUDO_REGISTER)
472 REG_N_REFS (dregno) += loop_depth;
476 validate_replace_rtx (dest, src, q);
481 /* For SREGNO, count the total number of insns scanned.
482 For DREGNO, count the total number of insns scanned after
483 passing the death note for DREGNO. */
488 /* If the insn in which SRC dies is a CALL_INSN, don't count it
489 as a call that has been crossed. Otherwise, count it. */
490 if (q != p && GET_CODE (q) == CALL_INSN)
492 /* Similarly, total calls for SREGNO, total calls beyond
493 the death note for DREGNO. */
499 /* If DEST dies here, remove the death note and save it for
500 later. Make sure ALL of DEST dies here; again, this is
501 overly conservative. */
503 && (dest_death = find_regno_note (q, REG_DEAD, dregno)) != 0)
505 if (GET_MODE (XEXP (dest_death, 0)) != GET_MODE (dest))
506 failed = 1, dest_death = 0;
508 remove_note (q, dest_death);
514 /* These counters need to be updated if and only if we are
515 going to move the REG_DEAD note. */
516 if (sregno >= FIRST_PSEUDO_REGISTER)
518 if (REG_LIVE_LENGTH (sregno) >= 0)
520 REG_LIVE_LENGTH (sregno) -= s_length;
521 /* REG_LIVE_LENGTH is only an approximation after
522 combine if sched is not run, so make sure that we
523 still have a reasonable value. */
524 if (REG_LIVE_LENGTH (sregno) < 2)
525 REG_LIVE_LENGTH (sregno) = 2;
528 REG_N_CALLS_CROSSED (sregno) -= s_n_calls;
531 /* Move death note of SRC from P to INSN. */
532 remove_note (p, note);
533 XEXP (note, 1) = REG_NOTES (insn);
534 REG_NOTES (insn) = note;
537 /* Put death note of DEST on P if we saw it die. */
540 XEXP (dest_death, 1) = REG_NOTES (p);
541 REG_NOTES (p) = dest_death;
543 if (dregno >= FIRST_PSEUDO_REGISTER)
545 /* If and only if we are moving the death note for DREGNO,
546 then we need to update its counters. */
547 if (REG_LIVE_LENGTH (dregno) >= 0)
548 REG_LIVE_LENGTH (dregno) += d_length;
549 REG_N_CALLS_CROSSED (dregno) += d_n_calls;
556 /* If SRC is a hard register which is set or killed in some other
557 way, we can't do this optimization. */
558 else if (sregno < FIRST_PSEUDO_REGISTER
559 && dead_or_set_p (p, src))
565 /* INSN is a copy of SRC to DEST, in which SRC dies. See if we now have
566 a sequence of insns that modify DEST followed by an insn that sets
567 SRC to DEST in which DEST dies, with no prior modification of DEST.
568 (There is no need to check if the insns in between actually modify
569 DEST. We should not have cases where DEST is not modified, but
570 the optimization is safe if no such modification is detected.)
571 In that case, we can replace all uses of DEST, starting with INSN and
572 ending with the set of SRC to DEST, with SRC. We do not do this
573 optimization if a CALL_INSN is crossed unless SRC already crosses a
574 call or if DEST dies before the copy back to SRC.
576 It is assumed that DEST and SRC are pseudos; it is too complicated to do
577 this for hard registers since the substitutions we may make might fail. */
580 optimize_reg_copy_2 (insn, dest, src)
587 int sregno = REGNO (src);
588 int dregno = REGNO (dest);
590 for (p = NEXT_INSN (insn); p; p = NEXT_INSN (p))
592 if (GET_CODE (p) == CODE_LABEL || GET_CODE (p) == JUMP_INSN
593 || (GET_CODE (p) == NOTE
594 && (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG
595 || NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)))
598 /* ??? We can't scan past the end of a basic block without updating
599 the register lifetime info (REG_DEAD/basic_block_live_at_start).
600 A CALL_INSN might be the last insn of a basic block, if it is inside
601 an EH region. There is no easy way to tell, so we just always break
602 when we see a CALL_INSN if flag_exceptions is nonzero. */
603 if (flag_exceptions && GET_CODE (p) == CALL_INSN)
606 if (GET_RTX_CLASS (GET_CODE (p)) != 'i')
609 set = single_set (p);
610 if (set && SET_SRC (set) == dest && SET_DEST (set) == src
611 && find_reg_note (p, REG_DEAD, dest))
613 /* We can do the optimization. Scan forward from INSN again,
614 replacing regs as we go. */
616 /* Set to stop at next insn. */
617 for (q = insn; q != NEXT_INSN (p); q = NEXT_INSN (q))
618 if (GET_RTX_CLASS (GET_CODE (q)) == 'i')
620 if (reg_mentioned_p (dest, PATTERN (q)))
622 PATTERN (q) = replace_rtx (PATTERN (q), dest, src);
624 /* We assume that a register is used exactly once per
625 insn in the updates below. If this is not correct,
626 no great harm is done. */
627 REG_N_REFS (dregno) -= loop_depth;
628 REG_N_REFS (sregno) += loop_depth;
632 if (GET_CODE (q) == CALL_INSN)
634 REG_N_CALLS_CROSSED (dregno)--;
635 REG_N_CALLS_CROSSED (sregno)++;
639 remove_note (p, find_reg_note (p, REG_DEAD, dest));
640 REG_N_DEATHS (dregno)--;
641 remove_note (insn, find_reg_note (insn, REG_DEAD, src));
642 REG_N_DEATHS (sregno)--;
646 if (reg_set_p (src, p)
647 || find_reg_note (p, REG_DEAD, dest)
648 || (GET_CODE (p) == CALL_INSN && REG_N_CALLS_CROSSED (sregno) == 0))
652 /* INSN is a ZERO_EXTEND or SIGN_EXTEND of SRC to DEST.
653 Look if SRC dies there, and if it is only set once, by loading
654 it from memory. If so, try to encorporate the zero/sign extension
655 into the memory read, change SRC to the mode of DEST, and alter
656 the remaining accesses to use the appropriate SUBREG. This allows
657 SRC and DEST to be tied later. */
659 optimize_reg_copy_3 (insn, dest, src)
664 rtx src_reg = XEXP (src, 0);
665 int src_no = REGNO (src_reg);
666 int dst_no = REGNO (dest);
668 enum machine_mode old_mode;
670 if (src_no < FIRST_PSEUDO_REGISTER
671 || dst_no < FIRST_PSEUDO_REGISTER
672 || ! find_reg_note (insn, REG_DEAD, src_reg)
673 || REG_N_SETS (src_no) != 1)
675 for (p = PREV_INSN (insn); ! reg_set_p (src_reg, p); p = PREV_INSN (p))
677 if (GET_CODE (p) == CODE_LABEL || GET_CODE (p) == JUMP_INSN
678 || (GET_CODE (p) == NOTE
679 && (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG
680 || NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)))
683 /* ??? We can't scan past the end of a basic block without updating
684 the register lifetime info (REG_DEAD/basic_block_live_at_start).
685 A CALL_INSN might be the last insn of a basic block, if it is inside
686 an EH region. There is no easy way to tell, so we just always break
687 when we see a CALL_INSN if flag_exceptions is nonzero. */
688 if (flag_exceptions && GET_CODE (p) == CALL_INSN)
691 if (GET_RTX_CLASS (GET_CODE (p)) != 'i')
694 if (! (set = single_set (p))
695 || GET_CODE (SET_SRC (set)) != MEM
696 /* If there's a REG_EQUIV note, this must be an insn that loads an
697 argument. Prefer keeping the note over doing this optimization. */
698 || find_reg_note (p, REG_EQUIV, NULL_RTX)
699 || SET_DEST (set) != src_reg)
702 /* Be conserative: although this optimization is also valid for
703 volatile memory references, that could cause trouble in later passes. */
704 if (MEM_VOLATILE_P (SET_SRC (set)))
707 /* Do not use a SUBREG to truncate from one mode to another if truncation
709 if (GET_MODE_BITSIZE (GET_MODE (src_reg)) <= GET_MODE_BITSIZE (GET_MODE (src))
710 && !TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (GET_MODE (src)),
711 GET_MODE_BITSIZE (GET_MODE (src_reg))))
714 old_mode = GET_MODE (src_reg);
715 PUT_MODE (src_reg, GET_MODE (src));
716 XEXP (src, 0) = SET_SRC (set);
718 /* Include this change in the group so that it's easily undone if
719 one of the changes in the group is invalid. */
720 validate_change (p, &SET_SRC (set), src, 1);
722 /* Now walk forward making additional replacements. We want to be able
723 to undo all the changes if a later substitution fails. */
724 subreg = gen_rtx_SUBREG (old_mode, src_reg, 0);
725 while (p = NEXT_INSN (p), p != insn)
727 if (GET_RTX_CLASS (GET_CODE (p)) != 'i')
730 /* Make a tenative change. */
731 validate_replace_rtx_group (src_reg, subreg, p);
734 validate_replace_rtx_group (src, src_reg, insn);
736 /* Now see if all the changes are valid. */
737 if (! apply_change_group ())
739 /* One or more changes were no good. Back out everything. */
740 PUT_MODE (src_reg, old_mode);
741 XEXP (src, 0) = src_reg;
745 rtx note = find_reg_note (p, REG_EQUAL, NULL_RTX);
747 remove_note (p, note);
752 /* If we were not able to update the users of src to use dest directly, try
753 instead moving the value to dest directly before the operation. */
756 copy_src_to_dest (insn, src, dest, loop_depth, old_max_uid)
776 /* A REG_LIVE_LENGTH of -1 indicates the register is equivalent to a constant
777 or memory location and is used infrequently; a REG_LIVE_LENGTH of -2 is
778 parameter when there is no frame pointer that is not allocated a register.
779 For now, we just reject them, rather than incrementing the live length. */
781 if (GET_CODE (src) == REG
782 && REG_LIVE_LENGTH (REGNO (src)) > 0
783 && GET_CODE (dest) == REG
784 && REG_LIVE_LENGTH (REGNO (dest)) > 0
785 && (set = single_set (insn)) != NULL_RTX
786 && !reg_mentioned_p (dest, SET_SRC (set))
787 && GET_MODE (src) == GET_MODE (dest))
789 int old_num_regs = reg_rtx_no;
791 /* Generate the src->dest move. */
793 emit_move_insn (dest, src);
794 seq = gen_sequence ();
796 /* If this sequence uses new registers, we may not use it. */
797 if (old_num_regs != reg_rtx_no
798 || ! validate_replace_rtx (src, dest, insn))
800 /* We have to restore reg_rtx_no to its old value, lest
801 recompute_reg_usage will try to compute the usage of the
802 new regs, yet reg_n_info is not valid for them. */
803 reg_rtx_no = old_num_regs;
806 emit_insn_before (seq, insn);
807 move_insn = PREV_INSN (insn);
808 p_move_notes = ®_NOTES (move_insn);
809 p_insn_notes = ®_NOTES (insn);
811 /* Move any notes mentioning src to the move instruction */
812 for (link = REG_NOTES (insn); link != NULL_RTX; link = next)
814 next = XEXP (link, 1);
815 if (XEXP (link, 0) == src)
817 *p_move_notes = link;
818 p_move_notes = &XEXP (link, 1);
822 *p_insn_notes = link;
823 p_insn_notes = &XEXP (link, 1);
827 *p_move_notes = NULL_RTX;
828 *p_insn_notes = NULL_RTX;
830 /* Is the insn the head of a basic block? If so extend it */
831 insn_uid = INSN_UID (insn);
832 move_uid = INSN_UID (move_insn);
833 if (insn_uid < old_max_uid)
835 bb = regmove_bb_head[insn_uid];
838 BLOCK_HEAD (bb) = move_insn;
839 regmove_bb_head[insn_uid] = -1;
843 /* Update the various register tables. */
844 dest_regno = REGNO (dest);
845 REG_N_SETS (dest_regno) += loop_depth;
846 REG_N_REFS (dest_regno) += loop_depth;
847 REG_LIVE_LENGTH (dest_regno)++;
848 if (REGNO_FIRST_UID (dest_regno) == insn_uid)
849 REGNO_FIRST_UID (dest_regno) = move_uid;
851 src_regno = REGNO (src);
852 if (! find_reg_note (move_insn, REG_DEAD, src))
853 REG_LIVE_LENGTH (src_regno)++;
855 if (REGNO_FIRST_UID (src_regno) == insn_uid)
856 REGNO_FIRST_UID (src_regno) = move_uid;
858 if (REGNO_LAST_UID (src_regno) == insn_uid)
859 REGNO_LAST_UID (src_regno) = move_uid;
861 if (REGNO_LAST_NOTE_UID (src_regno) == insn_uid)
862 REGNO_LAST_NOTE_UID (src_regno) = move_uid;
867 /* Return whether REG is set in only one location, and is set to a
868 constant, but is set in a different basic block from INSN (an
869 instructions which uses REG). In this case REG is equivalent to a
870 constant, and we don't want to break that equivalence, because that
871 may increase register pressure and make reload harder. If REG is
872 set in the same basic block as INSN, we don't worry about it,
873 because we'll probably need a register anyhow (??? but what if REG
874 is used in a different basic block as well as this one?). FIRST is
875 the first insn in the function. */
878 reg_is_remote_constant_p (reg, insn, first)
885 if (REG_N_SETS (REGNO (reg)) != 1)
888 /* Look for the set. */
889 for (p = LOG_LINKS (insn); p; p = XEXP (p, 1))
893 if (REG_NOTE_KIND (p) != 0)
895 s = single_set (XEXP (p, 0));
897 && GET_CODE (SET_DEST (s)) == REG
898 && REGNO (SET_DEST (s)) == REGNO (reg))
900 /* The register is set in the same basic block. */
905 for (p = first; p && p != insn; p = NEXT_INSN (p))
909 if (GET_RTX_CLASS (GET_CODE (p)) != 'i')
913 && GET_CODE (SET_DEST (s)) == REG
914 && REGNO (SET_DEST (s)) == REGNO (reg))
916 /* This is the instruction which sets REG. If there is a
917 REG_EQUAL note, then REG is equivalent to a constant. */
918 if (find_reg_note (p, REG_EQUAL, NULL_RTX))
927 /* INSN is adding a CONST_INT to a REG. We search backwards looking for
928 another add immediate instruction with the same source and dest registers,
929 and if we find one, we change INSN to an increment, and return 1. If
930 no changes are made, we return 0.
933 (set (reg100) (plus reg1 offset1))
935 (set (reg100) (plus reg1 offset2))
937 (set (reg100) (plus reg1 offset1))
939 (set (reg100) (plus reg100 offset2-offset1)) */
941 /* ??? What does this comment mean? */
942 /* cse disrupts preincrement / postdecrement squences when it finds a
943 hard register as ultimate source, like the frame pointer. */
946 fixup_match_2 (insn, dst, src, offset, regmove_dump_file)
947 rtx insn, dst, src, offset;
948 FILE *regmove_dump_file;
950 rtx p, dst_death = 0;
951 int length, num_calls = 0;
953 /* If SRC dies in INSN, we'd have to move the death note. This is
954 considered to be very unlikely, so we just skip the optimization
956 if (find_regno_note (insn, REG_DEAD, REGNO (src)))
959 /* Scan backward to find the first instruction that sets DST. */
961 for (length = 0, p = PREV_INSN (insn); p; p = PREV_INSN (p))
965 if (GET_CODE (p) == CODE_LABEL
966 || GET_CODE (p) == JUMP_INSN
967 || (GET_CODE (p) == NOTE
968 && (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG
969 || NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)))
972 /* ??? We can't scan past the end of a basic block without updating
973 the register lifetime info (REG_DEAD/basic_block_live_at_start).
974 A CALL_INSN might be the last insn of a basic block, if it is inside
975 an EH region. There is no easy way to tell, so we just always break
976 when we see a CALL_INSN if flag_exceptions is nonzero. */
977 if (flag_exceptions && GET_CODE (p) == CALL_INSN)
980 if (GET_RTX_CLASS (GET_CODE (p)) != 'i')
983 if (find_regno_note (p, REG_DEAD, REGNO (dst)))
988 pset = single_set (p);
989 if (pset && SET_DEST (pset) == dst
990 && GET_CODE (SET_SRC (pset)) == PLUS
991 && XEXP (SET_SRC (pset), 0) == src
992 && GET_CODE (XEXP (SET_SRC (pset), 1)) == CONST_INT)
994 HOST_WIDE_INT newconst
995 = INTVAL (offset) - INTVAL (XEXP (SET_SRC (pset), 1));
996 rtx add = gen_add3_insn (dst, dst, GEN_INT (newconst));
998 if (add && validate_change (insn, &PATTERN (insn), add, 0))
1000 /* Remove the death note for DST from DST_DEATH. */
1003 remove_death (REGNO (dst), dst_death);
1004 REG_LIVE_LENGTH (REGNO (dst)) += length;
1005 REG_N_CALLS_CROSSED (REGNO (dst)) += num_calls;
1008 REG_N_REFS (REGNO (dst)) += loop_depth;
1009 REG_N_REFS (REGNO (src)) -= loop_depth;
1011 if (regmove_dump_file)
1012 fprintf (regmove_dump_file,
1013 "Fixed operand of insn %d.\n",
1017 for (p = PREV_INSN (insn); p; p = PREV_INSN (p))
1019 if (GET_CODE (p) == CODE_LABEL
1020 || GET_CODE (p) == JUMP_INSN
1021 || (GET_CODE (p) == NOTE
1022 && (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG
1023 || NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)))
1025 if (GET_RTX_CLASS (GET_CODE (p)) != 'i')
1027 if (reg_overlap_mentioned_p (dst, PATTERN (p)))
1029 if (try_auto_increment (p, insn, 0, dst, newconst, 0))
1034 for (p = NEXT_INSN (insn); p; p = NEXT_INSN (p))
1036 if (GET_CODE (p) == CODE_LABEL
1037 || GET_CODE (p) == JUMP_INSN
1038 || (GET_CODE (p) == NOTE
1039 && (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG
1040 || NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)))
1042 if (GET_RTX_CLASS (GET_CODE (p)) != 'i')
1044 if (reg_overlap_mentioned_p (dst, PATTERN (p)))
1046 try_auto_increment (p, insn, 0, dst, newconst, 1);
1055 if (reg_set_p (dst, PATTERN (p)))
1058 /* If we have passed a call instruction, and the
1059 pseudo-reg SRC is not already live across a call,
1060 then don't perform the optimization. */
1061 /* reg_set_p is overly conservative for CALL_INSNS, thinks that all
1062 hard regs are clobbered. Thus, we only use it for src for
1064 if (GET_CODE (p) == CALL_INSN)
1069 if (REG_N_CALLS_CROSSED (REGNO (src)) == 0)
1072 if (call_used_regs [REGNO (dst)]
1073 || find_reg_fusage (p, CLOBBER, dst))
1076 else if (reg_set_p (src, PATTERN (p)))
1084 regmove_optimize (f, nregs, regmove_dump_file)
1087 FILE *regmove_dump_file;
1089 int old_max_uid = get_max_uid ();
1094 rtx copy_src, copy_dst;
1096 /* Find out where a potential flags register is live, and so that we
1097 can supress some optimizations in those zones. */
1098 mark_flags_life_zones (discover_flags_reg ());
1100 regno_src_regno = (int *)alloca (sizeof *regno_src_regno * nregs);
1101 for (i = nregs; --i >= 0; ) regno_src_regno[i] = -1;
1103 regmove_bb_head = (int *)alloca (sizeof (int) * (old_max_uid + 1));
1104 for (i = old_max_uid; i >= 0; i--) regmove_bb_head[i] = -1;
1105 for (i = 0; i < n_basic_blocks; i++)
1106 regmove_bb_head[INSN_UID (BLOCK_HEAD (i))] = i;
1108 /* A forward/backward pass. Replace output operands with input operands. */
1112 for (pass = 0; pass <= 2; pass++)
1114 if (! flag_regmove && pass >= flag_expensive_optimizations)
1117 if (regmove_dump_file)
1118 fprintf (regmove_dump_file, "Starting %s pass...\n",
1119 pass ? "backward" : "forward");
1121 for (insn = pass ? get_last_insn () : f; insn;
1122 insn = pass ? PREV_INSN (insn) : NEXT_INSN (insn))
1125 int op_no, match_no;
1127 if (GET_CODE (insn) == NOTE)
1129 if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG)
1131 else if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END)
1135 set = single_set (insn);
1139 if (flag_expensive_optimizations && ! pass
1140 && (GET_CODE (SET_SRC (set)) == SIGN_EXTEND
1141 || GET_CODE (SET_SRC (set)) == ZERO_EXTEND)
1142 && GET_CODE (XEXP (SET_SRC (set), 0)) == REG
1143 && GET_CODE (SET_DEST(set)) == REG)
1144 optimize_reg_copy_3 (insn, SET_DEST (set), SET_SRC (set));
1146 if (flag_expensive_optimizations && ! pass
1147 && GET_CODE (SET_SRC (set)) == REG
1148 && GET_CODE (SET_DEST(set)) == REG)
1150 /* If this is a register-register copy where SRC is not dead,
1151 see if we can optimize it. If this optimization succeeds,
1152 it will become a copy where SRC is dead. */
1153 if ((find_reg_note (insn, REG_DEAD, SET_SRC (set))
1154 || optimize_reg_copy_1 (insn, SET_DEST (set), SET_SRC (set)))
1155 && REGNO (SET_DEST (set)) >= FIRST_PSEUDO_REGISTER)
1157 /* Similarly for a pseudo-pseudo copy when SRC is dead. */
1158 if (REGNO (SET_SRC (set)) >= FIRST_PSEUDO_REGISTER)
1159 optimize_reg_copy_2 (insn, SET_DEST (set), SET_SRC (set));
1160 if (regno_src_regno[REGNO (SET_DEST (set))] < 0
1161 && SET_SRC (set) != SET_DEST (set))
1163 int srcregno = REGNO (SET_SRC(set));
1164 if (regno_src_regno[srcregno] >= 0)
1165 srcregno = regno_src_regno[srcregno];
1166 regno_src_regno[REGNO (SET_DEST (set))] = srcregno;
1173 #ifdef REGISTER_CONSTRAINTS
1174 if (! find_matches (insn, &match))
1177 /* Now scan through the operands looking for a source operand
1178 which is supposed to match the destination operand.
1179 Then scan forward for an instruction which uses the dest
1181 If it dies there, then replace the dest in both operands with
1182 the source operand. */
1184 for (op_no = 0; op_no < recog_n_operands; op_no++)
1186 rtx src, dst, src_subreg;
1187 enum reg_class src_class, dst_class;
1189 match_no = match.with[op_no];
1191 /* Nothing to do if the two operands aren't supposed to match. */
1195 src = recog_operand[op_no];
1196 dst = recog_operand[match_no];
1198 if (GET_CODE (src) != REG)
1202 if (GET_CODE (dst) == SUBREG
1203 && GET_MODE_SIZE (GET_MODE (dst))
1204 >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (dst))))
1207 = gen_rtx_SUBREG (GET_MODE (SUBREG_REG (dst)),
1208 src, SUBREG_WORD (dst));
1209 dst = SUBREG_REG (dst);
1211 if (GET_CODE (dst) != REG
1212 || REGNO (dst) < FIRST_PSEUDO_REGISTER)
1215 if (REGNO (src) < FIRST_PSEUDO_REGISTER)
1217 if (match.commutative[op_no] < op_no)
1218 regno_src_regno[REGNO (dst)] = REGNO (src);
1222 if (REG_LIVE_LENGTH (REGNO (src)) < 0)
1225 /* op_no/src must be a read-only operand, and
1226 match_operand/dst must be a write-only operand. */
1227 if (match.use[op_no] != READ
1228 || match.use[match_no] != WRITE)
1231 if (match.early_clobber[match_no]
1232 && count_occurrences (PATTERN (insn), src) > 1)
1235 /* Make sure match_operand is the destination. */
1236 if (recog_operand[match_no] != SET_DEST (set))
1239 /* If the operands already match, then there is nothing to do. */
1240 /* But in the commutative case, we might find a better match. */
1241 if (operands_match_p (src, dst)
1242 || (match.commutative[op_no] >= 0
1243 && operands_match_p (recog_operand[match.commutative
1245 && (replacement_quality (recog_operand[match.commutative
1247 >= replacement_quality (src))))
1250 src_class = reg_preferred_class (REGNO (src));
1251 dst_class = reg_preferred_class (REGNO (dst));
1252 if (! regclass_compatible_p (src_class, dst_class))
1255 if (fixup_match_1 (insn, set, src, src_subreg, dst, pass,
1263 /* A backward pass. Replace input operands with output operands. */
1265 if (regmove_dump_file)
1266 fprintf (regmove_dump_file, "Starting backward pass...\n");
1270 for (insn = get_last_insn (); insn; insn = PREV_INSN (insn))
1272 if (GET_CODE (insn) == NOTE)
1274 if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END)
1276 else if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG)
1279 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i')
1281 int op_no, match_no;
1284 if (! find_matches (insn, &match))
1287 /* Now scan through the operands looking for a destination operand
1288 which is supposed to match a source operand.
1289 Then scan backward for an instruction which sets the source
1290 operand. If safe, then replace the source operand with the
1291 dest operand in both instructions. */
1293 copy_src = NULL_RTX;
1294 copy_dst = NULL_RTX;
1295 for (op_no = 0; op_no < recog_n_operands; op_no++)
1297 rtx set, p, src, dst;
1298 rtx src_note, dst_note;
1300 enum reg_class src_class, dst_class;
1303 match_no = match.with[op_no];
1305 /* Nothing to do if the two operands aren't supposed to match. */
1309 dst = recog_operand[match_no];
1310 src = recog_operand[op_no];
1312 if (GET_CODE (src) != REG)
1315 if (GET_CODE (dst) != REG
1316 || REGNO (dst) < FIRST_PSEUDO_REGISTER
1317 || REG_LIVE_LENGTH (REGNO (dst)) < 0)
1320 /* If the operands already match, then there is nothing to do. */
1321 if (operands_match_p (src, dst)
1322 || (match.commutative[op_no] >= 0
1323 && operands_match_p (recog_operand[match.commutative[op_no]], dst)))
1326 set = single_set (insn);
1330 /* match_no/dst must be a write-only operand, and
1331 operand_operand/src must be a read-only operand. */
1332 if (match.use[op_no] != READ
1333 || match.use[match_no] != WRITE)
1336 if (match.early_clobber[match_no]
1337 && count_occurrences (PATTERN (insn), src) > 1)
1340 /* Make sure match_no is the destination. */
1341 if (recog_operand[match_no] != SET_DEST (set))
1344 if (REGNO (src) < FIRST_PSEUDO_REGISTER)
1346 if (GET_CODE (SET_SRC (set)) == PLUS
1347 && GET_CODE (XEXP (SET_SRC (set), 1)) == CONST_INT
1348 && XEXP (SET_SRC (set), 0) == src
1349 && fixup_match_2 (insn, dst, src,
1350 XEXP (SET_SRC (set), 1),
1355 src_class = reg_preferred_class (REGNO (src));
1356 dst_class = reg_preferred_class (REGNO (dst));
1357 if (! regclass_compatible_p (src_class, dst_class))
1367 /* Can not modify an earlier insn to set dst if this insn
1368 uses an old value in the source. */
1369 if (reg_overlap_mentioned_p (dst, SET_SRC (set)))
1379 if (! (src_note = find_reg_note (insn, REG_DEAD, src)))
1390 /* If src is set once in a different basic block,
1391 and is set equal to a constant, then do not use
1392 it for this optimization, as this would make it
1393 no longer equivalent to a constant. */
1395 if (reg_is_remote_constant_p (src, insn, f))
1406 if (regmove_dump_file)
1407 fprintf (regmove_dump_file,
1408 "Could fix operand %d of insn %d matching operand %d.\n",
1409 op_no, INSN_UID (insn), match_no);
1411 /* Scan backward to find the first instruction that uses
1412 the input operand. If the operand is set here, then
1413 replace it in both instructions with match_no. */
1415 for (length = 0, p = PREV_INSN (insn); p; p = PREV_INSN (p))
1419 if (GET_CODE (p) == CODE_LABEL
1420 || GET_CODE (p) == JUMP_INSN
1421 || (GET_CODE (p) == NOTE
1422 && (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG
1423 || NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)))
1426 /* ??? We can't scan past the end of a basic block without
1427 updating the register lifetime info
1428 (REG_DEAD/basic_block_live_at_start).
1429 A CALL_INSN might be the last insn of a basic block, if
1430 it is inside an EH region. There is no easy way to tell,
1431 so we just always break when we see a CALL_INSN if
1432 flag_exceptions is nonzero. */
1433 if (flag_exceptions && GET_CODE (p) == CALL_INSN)
1436 if (GET_RTX_CLASS (GET_CODE (p)) != 'i')
1441 /* ??? See if all of SRC is set in P. This test is much
1442 more conservative than it needs to be. */
1443 pset = single_set (p);
1444 if (pset && SET_DEST (pset) == src)
1446 /* We use validate_replace_rtx, in case there
1447 are multiple identical source operands. All of
1448 them have to be changed at the same time. */
1449 if (validate_replace_rtx (src, dst, insn))
1451 if (validate_change (p, &SET_DEST (pset),
1456 /* Change all source operands back.
1457 This modifies the dst as a side-effect. */
1458 validate_replace_rtx (dst, src, insn);
1459 /* Now make sure the dst is right. */
1460 validate_change (insn,
1461 recog_operand_loc[match_no],
1468 if (reg_overlap_mentioned_p (src, PATTERN (p))
1469 || reg_overlap_mentioned_p (dst, PATTERN (p)))
1472 /* If we have passed a call instruction, and the
1473 pseudo-reg DST is not already live across a call,
1474 then don't perform the optimization. */
1475 if (GET_CODE (p) == CALL_INSN)
1479 if (REG_N_CALLS_CROSSED (REGNO (dst)) == 0)
1488 /* Remove the death note for SRC from INSN. */
1489 remove_note (insn, src_note);
1490 /* Move the death note for SRC to P if it is used
1492 if (reg_overlap_mentioned_p (src, PATTERN (p)))
1494 XEXP (src_note, 1) = REG_NOTES (p);
1495 REG_NOTES (p) = src_note;
1497 /* If there is a REG_DEAD note for DST on P, then remove
1498 it, because DST is now set there. */
1499 if ((dst_note = find_reg_note (p, REG_DEAD, dst)))
1500 remove_note (p, dst_note);
1502 dstno = REGNO (dst);
1503 srcno = REGNO (src);
1505 REG_N_SETS (dstno)++;
1506 REG_N_SETS (srcno)--;
1508 REG_N_CALLS_CROSSED (dstno) += num_calls;
1509 REG_N_CALLS_CROSSED (srcno) -= num_calls;
1511 REG_LIVE_LENGTH (dstno) += length;
1512 if (REG_LIVE_LENGTH (srcno) >= 0)
1514 REG_LIVE_LENGTH (srcno) -= length;
1515 /* REG_LIVE_LENGTH is only an approximation after
1516 combine if sched is not run, so make sure that we
1517 still have a reasonable value. */
1518 if (REG_LIVE_LENGTH (srcno) < 2)
1519 REG_LIVE_LENGTH (srcno) = 2;
1522 /* We assume that a register is used exactly once per
1523 insn in the updates above. If this is not correct,
1524 no great harm is done. */
1526 REG_N_REFS (dstno) += 2 * loop_depth;
1527 REG_N_REFS (srcno) -= 2 * loop_depth;
1529 /* If that was the only time src was set,
1530 and src was not live at the start of the
1531 function, we know that we have no more
1532 references to src; clear REG_N_REFS so it
1533 won't make reload do any work. */
1534 if (REG_N_SETS (REGNO (src)) == 0
1535 && ! regno_uninitialized (REGNO (src)))
1536 REG_N_REFS (REGNO (src)) = 0;
1538 if (regmove_dump_file)
1539 fprintf (regmove_dump_file,
1540 "Fixed operand %d of insn %d matching operand %d.\n",
1541 op_no, INSN_UID (insn), match_no);
1547 /* If we weren't able to replace any of the alternatives, try an
1548 alternative appoach of copying the source to the destination. */
1549 if (!success && copy_src != NULL_RTX)
1550 copy_src_to_dest (insn, copy_src, copy_dst, loop_depth,
1555 #endif /* REGISTER_CONSTRAINTS */
1557 /* In fixup_match_1, some insns may have been inserted after basic block
1558 ends. Fix that here. */
1559 for (i = 0; i < n_basic_blocks; i++)
1561 rtx end = BLOCK_END (i);
1563 rtx next = NEXT_INSN (new);
1564 while (next != 0 && INSN_UID (next) >= old_max_uid
1565 && (i == n_basic_blocks - 1 || BLOCK_HEAD (i + 1) != next))
1566 new = next, next = NEXT_INSN (new);
1567 BLOCK_END (i) = new;
1571 /* Returns nonzero if INSN's pattern has matching constraints for any operand.
1572 Returns 0 if INSN can't be recognized, or if the alternative can't be
1575 Initialize the info in MATCHP based on the constraints. */
1578 find_matches (insn, matchp)
1580 struct match *matchp;
1582 int likely_spilled[MAX_RECOG_OPERANDS];
1584 int any_matches = 0;
1586 extract_insn (insn);
1587 if (! constrain_operands (0))
1590 /* Must initialize this before main loop, because the code for
1591 the commutative case may set matches for operands other than
1593 for (op_no = recog_n_operands; --op_no >= 0; )
1594 matchp->with[op_no] = matchp->commutative[op_no] = -1;
1596 for (op_no = 0; op_no < recog_n_operands; op_no++)
1602 p = recog_constraints[op_no];
1604 likely_spilled[op_no] = 0;
1605 matchp->use[op_no] = READ;
1606 matchp->early_clobber[op_no] = 0;
1608 matchp->use[op_no] = WRITE;
1610 matchp->use[op_no] = READWRITE;
1612 for (;*p && i < which_alternative; p++)
1616 while ((c = *p++) != '\0' && c != ',')
1624 matchp->early_clobber[op_no] = 1;
1627 matchp->commutative[op_no] = op_no + 1;
1628 matchp->commutative[op_no + 1] = op_no;
1630 case '0': case '1': case '2': case '3': case '4':
1631 case '5': case '6': case '7': case '8': case '9':
1633 if (c < op_no && likely_spilled[(unsigned char) c])
1635 matchp->with[op_no] = c;
1637 if (matchp->commutative[op_no] >= 0)
1638 matchp->with[matchp->commutative[op_no]] = c;
1640 case 'a': case 'b': case 'c': case 'd': case 'e': case 'f': case 'h':
1641 case 'j': case 'k': case 'l': case 'p': case 'q': case 't': case 'u':
1642 case 'v': case 'w': case 'x': case 'y': case 'z': case 'A': case 'B':
1643 case 'C': case 'D': case 'W': case 'Y': case 'Z':
1644 if (CLASS_LIKELY_SPILLED_P (REG_CLASS_FROM_LETTER ((unsigned char)c)))
1645 likely_spilled[op_no] = 1;
1652 /* Try to replace output operand DST in SET, with input operand SRC. SET is
1653 the only set in INSN. INSN has just been recgnized and constrained.
1654 SRC is operand number OPERAND_NUMBER in INSN.
1655 DST is operand number MATCH_NUMBER in INSN.
1656 If BACKWARD is nonzero, we have been called in a backward pass.
1657 Return nonzero for success. */
1659 fixup_match_1 (insn, set, src, src_subreg, dst, backward, operand_number,
1660 match_number, regmove_dump_file)
1661 rtx insn, set, src, src_subreg, dst;
1662 int backward, operand_number, match_number;
1663 FILE *regmove_dump_file;
1666 rtx post_inc = 0, post_inc_set = 0, search_end = 0;
1668 int num_calls = 0, s_num_calls = 0;
1669 enum rtx_code code = NOTE;
1670 HOST_WIDE_INT insn_const, newconst;
1671 rtx overlap = 0; /* need to move insn ? */
1672 rtx src_note = find_reg_note (insn, REG_DEAD, src), dst_note;
1673 int length, s_length, true_loop_depth;
1675 /* If SRC is marked as unchanging, we may not change it.
1676 ??? Maybe we could get better code by removing the unchanging bit
1677 instead, and changing it back if we don't succeed? */
1678 if (RTX_UNCHANGING_P (src))
1683 /* Look for (set (regX) (op regA constX))
1684 (set (regY) (op regA constY))
1686 (set (regA) (op regA constX)).
1687 (set (regY) (op regA constY-constX)).
1688 This works for add and shift operations, if
1689 regA is dead after or set by the second insn. */
1691 code = GET_CODE (SET_SRC (set));
1692 if ((code == PLUS || code == LSHIFTRT
1693 || code == ASHIFT || code == ASHIFTRT)
1694 && XEXP (SET_SRC (set), 0) == src
1695 && GET_CODE (XEXP (SET_SRC (set), 1)) == CONST_INT)
1696 insn_const = INTVAL (XEXP (SET_SRC (set), 1));
1697 else if (! stable_and_no_regs_but_for_p (SET_SRC (set), src, dst))
1700 /* We might find a src_note while scanning. */
1704 if (regmove_dump_file)
1705 fprintf (regmove_dump_file,
1706 "Could fix operand %d of insn %d matching operand %d.\n",
1707 operand_number, INSN_UID (insn), match_number);
1709 /* If SRC is equivalent to a constant set in a different basic block,
1710 then do not use it for this optimization. We want the equivalence
1711 so that if we have to reload this register, we can reload the
1712 constant, rather than extending the lifespan of the register. */
1713 if (reg_is_remote_constant_p (src, insn, get_insns ()))
1716 /* Scan forward to find the next instruction that
1717 uses the output operand. If the operand dies here,
1718 then replace it in both instructions with
1721 for (length = s_length = 0, p = NEXT_INSN (insn); p; p = NEXT_INSN (p))
1723 if (GET_CODE (p) == CODE_LABEL || GET_CODE (p) == JUMP_INSN
1724 || (GET_CODE (p) == NOTE
1725 && (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG
1726 || NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)))
1729 /* ??? We can't scan past the end of a basic block without updating
1730 the register lifetime info (REG_DEAD/basic_block_live_at_start).
1731 A CALL_INSN might be the last insn of a basic block, if it is
1732 inside an EH region. There is no easy way to tell, so we just
1733 always break when we see a CALL_INSN if flag_exceptions is nonzero. */
1734 if (flag_exceptions && GET_CODE (p) == CALL_INSN)
1737 if (GET_RTX_CLASS (GET_CODE (p)) != 'i')
1744 if (reg_set_p (src, p) || reg_set_p (dst, p)
1745 || (GET_CODE (PATTERN (p)) == USE
1746 && reg_overlap_mentioned_p (src, XEXP (PATTERN (p), 0))))
1749 /* See if all of DST dies in P. This test is
1750 slightly more conservative than it needs to be. */
1751 if ((dst_note = find_regno_note (p, REG_DEAD, REGNO (dst)))
1752 && (GET_MODE (XEXP (dst_note, 0)) == GET_MODE (dst)))
1759 /* If an optimization is done, the value of SRC while P
1760 is executed will be changed. Check that this is OK. */
1761 if (reg_overlap_mentioned_p (src, PATTERN (p)))
1763 for (q = p; q; q = NEXT_INSN (q))
1765 if (GET_CODE (q) == CODE_LABEL || GET_CODE (q) == JUMP_INSN
1766 || (GET_CODE (q) == NOTE
1767 && (NOTE_LINE_NUMBER (q) == NOTE_INSN_LOOP_BEG
1768 || NOTE_LINE_NUMBER (q) == NOTE_INSN_LOOP_END)))
1774 /* ??? We can't scan past the end of a basic block without
1775 updating the register lifetime info
1776 (REG_DEAD/basic_block_live_at_start).
1777 A CALL_INSN might be the last insn of a basic block, if
1778 it is inside an EH region. There is no easy way to tell,
1779 so we just always break when we see a CALL_INSN if
1780 flag_exceptions is nonzero. */
1781 if (flag_exceptions && GET_CODE (q) == CALL_INSN)
1787 if (GET_RTX_CLASS (GET_CODE (q)) != 'i')
1789 if (reg_overlap_mentioned_p (src, PATTERN (q))
1790 || reg_set_p (src, q))
1794 set2 = single_set (q);
1795 if (! q || ! set2 || GET_CODE (SET_SRC (set2)) != code
1796 || XEXP (SET_SRC (set2), 0) != src
1797 || GET_CODE (XEXP (SET_SRC (set2), 1)) != CONST_INT
1798 || (SET_DEST (set2) != src
1799 && ! find_reg_note (q, REG_DEAD, src)))
1801 /* If this is a PLUS, we can still save a register by doing
1804 src -= insn_const; .
1805 This also gives opportunities for subsequent
1806 optimizations in the backward pass, so do it there. */
1807 if (code == PLUS && backward
1808 /* Don't do this if we can likely tie DST to SET_DEST
1809 of P later; we can't do this tying here if we got a
1811 && ! (dst_note && ! REG_N_CALLS_CROSSED (REGNO (dst))
1813 && GET_CODE (SET_DEST (single_set (p))) == REG
1814 && (REGNO (SET_DEST (single_set (p)))
1815 < FIRST_PSEUDO_REGISTER))
1816 /* We may only emit an insn directly after P if we
1817 are not in the shadow of a live flags register. */
1818 && GET_MODE (p) == VOIDmode)
1823 newconst = -insn_const;
1831 newconst = INTVAL (XEXP (SET_SRC (set2), 1)) - insn_const;
1832 /* Reject out of range shifts. */
1836 >= GET_MODE_BITSIZE (GET_MODE (SET_SRC (set2))))))
1841 if (SET_DEST (set2) != src)
1842 post_inc_set = set2;
1845 /* We use 1 as last argument to validate_change so that all
1846 changes are accepted or rejected together by apply_change_group
1847 when it is called by validate_replace_rtx . */
1848 validate_change (q, &XEXP (SET_SRC (set2), 1),
1849 GEN_INT (newconst), 1);
1851 validate_change (insn, recog_operand_loc[match_number], src, 1);
1852 if (validate_replace_rtx (dst, src_subreg, p))
1857 if (reg_overlap_mentioned_p (dst, PATTERN (p)))
1859 if (! src_note && reg_overlap_mentioned_p (src, PATTERN (p)))
1861 /* INSN was already checked to be movable when
1862 we found no REG_DEAD note for src on it. */
1864 src_note = find_reg_note (p, REG_DEAD, src);
1867 /* If we have passed a call instruction, and the pseudo-reg SRC is not
1868 already live across a call, then don't perform the optimization. */
1869 if (GET_CODE (p) == CALL_INSN)
1871 if (REG_N_CALLS_CROSSED (REGNO (src)) == 0)
1885 true_loop_depth = backward ? 2 - loop_depth : loop_depth;
1887 /* Remove the death note for DST from P. */
1888 remove_note (p, dst_note);
1891 post_inc = emit_insn_after (copy_rtx (PATTERN (insn)), p);
1892 if ((HAVE_PRE_INCREMENT || HAVE_PRE_DECREMENT)
1894 && try_auto_increment (search_end, post_inc, 0, src, newconst, 1))
1896 validate_change (insn, &XEXP (SET_SRC (set), 1), GEN_INT (insn_const), 0);
1897 REG_N_SETS (REGNO (src))++;
1898 REG_N_REFS (REGNO (src)) += true_loop_depth;
1899 REG_LIVE_LENGTH (REGNO (src))++;
1903 /* The lifetime of src and dest overlap,
1904 but we can change this by moving insn. */
1905 rtx pat = PATTERN (insn);
1907 remove_note (overlap, src_note);
1908 if ((HAVE_POST_INCREMENT || HAVE_POST_DECREMENT)
1910 && try_auto_increment (overlap, insn, 0, src, insn_const, 0))
1914 rtx notes = REG_NOTES (insn);
1916 emit_insn_after_with_line_notes (pat, PREV_INSN (p), insn);
1917 PUT_CODE (insn, NOTE);
1918 NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED;
1919 NOTE_SOURCE_FILE (insn) = 0;
1920 /* emit_insn_after_with_line_notes has no
1921 return value, so search for the new insn. */
1922 for (insn = p; PATTERN (insn) != pat; )
1923 insn = PREV_INSN (insn);
1925 REG_NOTES (insn) = notes;
1928 /* Sometimes we'd generate src = const; src += n;
1929 if so, replace the instruction that set src
1930 in the first place. */
1932 if (! overlap && (code == PLUS || code == MINUS))
1934 rtx note = find_reg_note (insn, REG_EQUAL, NULL_RTX);
1936 int num_calls2 = 0, s_length2 = 0;
1938 if (note && CONSTANT_P (XEXP (note, 0)))
1940 for (q = PREV_INSN (insn); q; q = PREV_INSN(q))
1942 if (GET_CODE (q) == CODE_LABEL || GET_CODE (q) == JUMP_INSN
1943 || (GET_CODE (q) == NOTE
1944 && (NOTE_LINE_NUMBER (q) == NOTE_INSN_LOOP_BEG
1945 || NOTE_LINE_NUMBER (q) == NOTE_INSN_LOOP_END)))
1951 /* ??? We can't scan past the end of a basic block without
1952 updating the register lifetime info
1953 (REG_DEAD/basic_block_live_at_start).
1954 A CALL_INSN might be the last insn of a basic block, if
1955 it is inside an EH region. There is no easy way to tell,
1956 so we just always break when we see a CALL_INSN if
1957 flag_exceptions is nonzero. */
1958 if (flag_exceptions && GET_CODE (q) == CALL_INSN)
1964 if (GET_RTX_CLASS (GET_CODE (q)) != 'i')
1967 if (reg_set_p (src, q))
1969 set2 = single_set (q);
1972 if (reg_overlap_mentioned_p (src, PATTERN (q)))
1977 if (GET_CODE (p) == CALL_INSN)
1980 if (q && set2 && SET_DEST (set2) == src && CONSTANT_P (SET_SRC (set2))
1981 && validate_change (insn, &SET_SRC (set), XEXP (note, 0), 0))
1984 NOTE_LINE_NUMBER (q) = NOTE_INSN_DELETED;
1985 NOTE_SOURCE_FILE (q) = 0;
1986 REG_N_SETS (REGNO (src))--;
1987 REG_N_CALLS_CROSSED (REGNO (src)) -= num_calls2;
1988 REG_N_REFS (REGNO (src)) -= true_loop_depth;
1989 REG_LIVE_LENGTH (REGNO (src)) -= s_length2;
1995 if ((HAVE_PRE_INCREMENT || HAVE_PRE_DECREMENT)
1996 && (code == PLUS || code == MINUS) && insn_const
1997 && try_auto_increment (p, insn, 0, src, insn_const, 1))
1999 else if ((HAVE_POST_INCREMENT || HAVE_POST_DECREMENT)
2001 && try_auto_increment (p, post_inc, post_inc_set, src, newconst, 0))
2003 /* If post_inc still prevails, try to find an
2004 insn where it can be used as a pre-in/decrement.
2005 If code is MINUS, this was already tried. */
2006 if (post_inc && code == PLUS
2007 /* Check that newconst is likely to be usable
2008 in a pre-in/decrement before starting the search. */
2009 && ((HAVE_PRE_INCREMENT && newconst > 0 && newconst <= MOVE_MAX)
2010 || (HAVE_PRE_DECREMENT && newconst < 0 && newconst >= -MOVE_MAX))
2011 && exact_log2 (newconst))
2015 inc_dest = post_inc_set ? SET_DEST (post_inc_set) : src;
2016 for (q = post_inc; (q = NEXT_INSN (q)); )
2018 if (GET_CODE (q) == CODE_LABEL || GET_CODE (q) == JUMP_INSN
2019 || (GET_CODE (q) == NOTE
2020 && (NOTE_LINE_NUMBER (q) == NOTE_INSN_LOOP_BEG
2021 || NOTE_LINE_NUMBER (q) == NOTE_INSN_LOOP_END)))
2024 /* ??? We can't scan past the end of a basic block without updating
2025 the register lifetime info (REG_DEAD/basic_block_live_at_start).
2026 A CALL_INSN might be the last insn of a basic block, if it
2027 is inside an EH region. There is no easy way to tell so we
2028 just always break when we see a CALL_INSN if flag_exceptions
2030 if (flag_exceptions && GET_CODE (q) == CALL_INSN)
2033 if (GET_RTX_CLASS (GET_CODE (q)) != 'i')
2035 if (src != inc_dest && (reg_overlap_mentioned_p (src, PATTERN (q))
2036 || reg_set_p (src, q)))
2038 if (reg_set_p (inc_dest, q))
2040 if (reg_overlap_mentioned_p (inc_dest, PATTERN (q)))
2042 try_auto_increment (q, post_inc,
2043 post_inc_set, inc_dest, newconst, 1);
2048 /* Move the death note for DST to INSN if it is used
2050 if (reg_overlap_mentioned_p (dst, PATTERN (insn)))
2052 XEXP (dst_note, 1) = REG_NOTES (insn);
2053 REG_NOTES (insn) = dst_note;
2058 /* Move the death note for SRC from INSN to P. */
2060 remove_note (insn, src_note);
2061 XEXP (src_note, 1) = REG_NOTES (p);
2062 REG_NOTES (p) = src_note;
2064 REG_N_CALLS_CROSSED (REGNO (src)) += s_num_calls;
2067 REG_N_SETS (REGNO (src))++;
2068 REG_N_SETS (REGNO (dst))--;
2070 REG_N_CALLS_CROSSED (REGNO (dst)) -= num_calls;
2072 REG_LIVE_LENGTH (REGNO (src)) += s_length;
2073 if (REG_LIVE_LENGTH (REGNO (dst)) >= 0)
2075 REG_LIVE_LENGTH (REGNO (dst)) -= length;
2076 /* REG_LIVE_LENGTH is only an approximation after
2077 combine if sched is not run, so make sure that we
2078 still have a reasonable value. */
2079 if (REG_LIVE_LENGTH (REGNO (dst)) < 2)
2080 REG_LIVE_LENGTH (REGNO (dst)) = 2;
2083 /* We assume that a register is used exactly once per
2084 insn in the updates above. If this is not correct,
2085 no great harm is done. */
2087 REG_N_REFS (REGNO (src)) += 2 * true_loop_depth;
2088 REG_N_REFS (REGNO (dst)) -= 2 * true_loop_depth;
2090 /* If that was the only time dst was set,
2091 and dst was not live at the start of the
2092 function, we know that we have no more
2093 references to dst; clear REG_N_REFS so it
2094 won't make reload do any work. */
2095 if (REG_N_SETS (REGNO (dst)) == 0
2096 && ! regno_uninitialized (REGNO (dst)))
2097 REG_N_REFS (REGNO (dst)) = 0;
2099 if (regmove_dump_file)
2100 fprintf (regmove_dump_file,
2101 "Fixed operand %d of insn %d matching operand %d.\n",
2102 operand_number, INSN_UID (insn), match_number);
2107 /* return nonzero if X is stable and mentions no regsiters but for
2108 mentioning SRC or mentioning / changing DST . If in doubt, presume
2110 The rationale is that we want to check if we can move an insn easily
2111 while just paying attention to SRC and DST. A register is considered
2112 stable if it has the RTX_UNCHANGING_P bit set, but that would still
2113 leave the burden to update REG_DEAD / REG_UNUSED notes, so we don't
2114 want any registers but SRC and DST. */
2116 stable_and_no_regs_but_for_p (x, src, dst)
2119 RTX_CODE code = GET_CODE (x);
2120 switch (GET_RTX_CLASS (code))
2122 case '<': case '1': case 'c': case '2': case 'b': case '3':
2125 char *fmt = GET_RTX_FORMAT (code);
2126 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2128 && ! stable_and_no_regs_but_for_p (XEXP (x, i), src, dst))
2134 return x == src || x == dst;
2135 /* If this is a MEM, look inside - there might be a register hidden in
2136 the address of an unchanging MEM. */
2138 && ! stable_and_no_regs_but_for_p (XEXP (x, 0), src, dst))
2142 return ! rtx_unstable_p (x);
2146 /* Test if regmove seems profitable for this target. Regmove is useful only
2147 if some common patterns are two address, i.e. require matching constraints,
2148 so we check that condition here. */
2151 regmove_profitable_p ()
2153 #ifdef REGISTER_CONSTRAINTS
2155 enum machine_mode mode;
2156 optab tstoptab = add_optab;
2157 do /* check add_optab and ashl_optab */
2158 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
2159 mode = GET_MODE_WIDER_MODE (mode))
2161 int icode = (int) tstoptab->handlers[(int) mode].insn_code;
2162 rtx reg0, reg1, reg2, pat;
2165 if (GET_MODE_BITSIZE (mode) < 32 || icode == CODE_FOR_nothing)
2167 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
2168 if (TEST_HARD_REG_BIT (reg_class_contents[GENERAL_REGS], i))
2170 if (i + 2 >= FIRST_PSEUDO_REGISTER)
2172 reg0 = gen_rtx_REG (insn_operand_mode[icode][0], i);
2173 reg1 = gen_rtx_REG (insn_operand_mode[icode][1], i + 1);
2174 reg2 = gen_rtx_REG (insn_operand_mode[icode][2], i + 2);
2175 if (! (*insn_operand_predicate[icode][0]) (reg0, VOIDmode)
2176 || ! (*insn_operand_predicate[icode][1]) (reg1, VOIDmode)
2177 || ! (*insn_operand_predicate[icode][2]) (reg2, VOIDmode))
2179 pat = GEN_FCN (icode) (reg0, reg1, reg2);
2182 if (GET_CODE (pat) == SEQUENCE)
2183 pat = XVECEXP (pat, 0, XVECLEN (pat, 0) - 1);
2185 pat = make_insn_raw (pat);
2186 if (! single_set (pat)
2187 || GET_CODE (SET_SRC (single_set (pat))) != tstoptab->code)
2188 /* Unexpected complexity; don't need to handle this unless
2189 we find a machine where this occurs and regmove should
2192 if (find_matches (pat, &match))
2196 while (tstoptab != ashl_optab && (tstoptab = ashl_optab, 1));
2197 #endif /* REGISTER_CONSTRAINTS */