2 * Copyright (c) 2015 The DragonFly Project. All rights reserved.
4 * This code is derived from software contributed to The DragonFly Project
5 * by Sepherosa Ziehau <sepherosa@gmail.com>
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in
15 * the documentation and/or other materials provided with the
17 * 3. Neither the name of The DragonFly Project nor the names of its
18 * contributors may be used to endorse or promote products derived
19 * from this software without specific, prior written permission.
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
24 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
25 * COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
26 * INCIDENTAL, SPECIAL, EXEMPLARY OR CONSEQUENTIAL DAMAGES (INCLUDING,
27 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
28 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
29 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
31 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
35 #include <sys/param.h>
36 #include <sys/systm.h>
37 #include <sys/bitops.h>
39 #include <sys/kernel.h>
40 #include <sys/malloc.h>
41 #include <sys/sensors.h>
43 #include <bus/pci/pcivar.h>
44 #include <bus/pci/pcireg.h>
45 #include <bus/pci/pcibus.h>
46 #include <bus/pci/pci_cfgreg.h>
48 #include "coremctl_if.h"
51 #include <dev/misc/coremctl/coremctl_reg.h>
52 #include <dev/misc/dimm/dimm.h>
54 struct memtemp_core_softc;
56 struct memtemp_core_dimm {
57 TAILQ_ENTRY(memtemp_core_dimm) dimm_link;
58 struct ksensor dimm_sensor;
59 struct memtemp_core_softc *dimm_parent;
63 struct dimm_softc *dimm_softc;
66 struct memtemp_core_type {
71 struct memtemp_core_softc {
74 TAILQ_HEAD(, memtemp_core_dimm) temp_dimm;
77 static int memtemp_core_probe(device_t);
78 static int memtemp_core_attach(device_t);
79 static int memtemp_core_detach(device_t);
81 static void memtemp_core_chan_attach(struct memtemp_core_softc *, int);
82 static void memtemp_core_dimm_attach(struct memtemp_core_softc *,
84 static void memtemp_core_sensor_task(void *);
86 static const struct memtemp_core_type memtemp_core_types[] = {
87 { PCI_E3V3_MEMCTL_DID,
88 "Intel E3 v3 memory thermal sensor" },
90 { PCI_COREV3_MEMCTL_DID,
91 "Intel i3/i5/i7 Haswell memory thermal sensor" },
93 { 0, NULL } /* required last entry */
96 static device_method_t memtemp_core_methods[] = {
97 /* Device interface */
98 DEVMETHOD(device_probe, memtemp_core_probe),
99 DEVMETHOD(device_attach, memtemp_core_attach),
100 DEVMETHOD(device_detach, memtemp_core_detach),
101 DEVMETHOD(device_shutdown, bus_generic_shutdown),
102 DEVMETHOD(device_suspend, bus_generic_suspend),
103 DEVMETHOD(device_resume, bus_generic_resume),
107 static driver_t memtemp_core_driver = {
109 memtemp_core_methods,
110 sizeof(struct memtemp_core_softc)
112 static devclass_t memtemp_devclass;
113 DRIVER_MODULE(memtemp_core, coremctl, memtemp_core_driver, memtemp_devclass,
115 MODULE_DEPEND(memtemp_core, pci, 1, 1, 1);
116 MODULE_DEPEND(memtemp_core, coremctl, 1, 1, 1);
117 MODULE_DEPEND(memtemp_core, dimm, 1, 1, 1);
119 static __inline uint32_t
120 CSR_READ_4(struct memtemp_core_softc *sc, int ofs)
125 error = COREMCTL_MCH_READ(sc->temp_parent, ofs, &val);
126 KASSERT(!error, ("mch read failed"));
132 CSR_WRITE_4(struct memtemp_core_softc *sc, int ofs, uint32_t val)
136 error = COREMCTL_MCH_WRITE(sc->temp_parent, ofs, val);
137 KASSERT(!error, ("mch write failed"));
141 memtemp_core_probe(device_t dev)
143 const struct memtemp_core_type *t;
146 if (pci_get_vendor(dev) != PCI_CORE_MEMCTL_VID)
149 did = pci_get_device(dev);
150 for (t = memtemp_core_types; t->desc != NULL; ++t) {
152 device_set_desc(dev, t->desc);
160 memtemp_core_attach(device_t dev)
162 struct memtemp_core_softc *sc = device_get_softc(dev);
166 sc->temp_parent = device_get_parent(dev);
167 TAILQ_INIT(&sc->temp_dimm);
169 for (i = 0; i < PCI_CORE_MEMCTL_CHN_MAX; ++i)
170 memtemp_core_chan_attach(sc, i);
176 memtemp_core_chan_attach(struct memtemp_core_softc *sc, int chan)
178 int dimm_ch_reg, dimm_chtemp_reg;
179 int dimma_id, dimmb_id;
184 dimm_ch_reg = MCH_CORE_DIMM_CH0;
185 dimm_chtemp_reg = MCH_CORE_DIMM_TEMP_CH0;
187 KASSERT(chan == 1, ("unsupport channel%d", chan));
188 dimm_ch_reg = MCH_CORE_DIMM_CH1;
189 dimm_chtemp_reg = MCH_CORE_DIMM_TEMP_CH1;
192 dimm_ch = CSR_READ_4(sc, dimm_ch_reg);
194 size_a = __SHIFTOUT(dimm_ch, MCH_CORE_DIMM_A_SIZE);
195 size_b = __SHIFTOUT(dimm_ch, MCH_CORE_DIMM_B_SIZE);
196 if (size_a == 0 && size_b == 0)
201 if (dimm_ch & MCH_CORE_DIMM_A_SELECT) {
207 memtemp_core_dimm_attach(sc, chan, dimma_id, dimm_chtemp_reg);
209 memtemp_core_dimm_attach(sc, chan, dimmb_id, dimm_chtemp_reg);
213 memtemp_core_dimm_attach(struct memtemp_core_softc *sc, int chan, int dimm_id,
216 struct memtemp_core_dimm *dimm_sc;
217 struct ksensor *sens;
219 dimm_sc = kmalloc(sizeof(*dimm_sc), M_DEVBUF, M_WAITOK | M_ZERO);
220 dimm_sc->dimm_parent = sc;
221 dimm_sc->dimm_reg = dimm_reg;
223 dimm_sc->dimm_mask = MCH_CORE_DIMM_TEMP_DIMM0;
225 KASSERT(dimm_id == 1, ("unsupported DIMM%d", dimm_id));
226 dimm_sc->dimm_mask = MCH_CORE_DIMM_TEMP_DIMM1;
229 dimm_sc->dimm_softc = dimm_create(0, chan, dimm_id);
231 sens = &dimm_sc->dimm_sensor;
232 ksnprintf(sens->desc, sizeof(sens->desc), "chan%d DIMM%d",
234 sens->type = SENSOR_TEMP;
235 dimm_sensor_attach(dimm_sc->dimm_softc, sens);
236 sensor_task_register(dimm_sc, memtemp_core_sensor_task, 5);
238 TAILQ_INSERT_TAIL(&sc->temp_dimm, dimm_sc, dimm_link);
242 memtemp_core_detach(device_t dev)
244 struct memtemp_core_softc *sc = device_get_softc(dev);
245 struct memtemp_core_dimm *dimm_sc;
247 while ((dimm_sc = TAILQ_FIRST(&sc->temp_dimm)) != NULL) {
248 TAILQ_REMOVE(&sc->temp_dimm, dimm_sc, dimm_link);
250 sensor_task_unregister(dimm_sc);
251 dimm_sensor_detach(dimm_sc->dimm_softc, &dimm_sc->dimm_sensor);
252 dimm_destroy(dimm_sc->dimm_softc);
254 kfree(dimm_sc, M_DEVBUF);
260 memtemp_core_sensor_task(void *xdimm_sc)
262 struct memtemp_core_dimm *dimm_sc = xdimm_sc;
266 val = CSR_READ_4(dimm_sc->dimm_parent, dimm_sc->dimm_reg);
267 temp = __SHIFTOUT(val, dimm_sc->dimm_mask);
269 dimm_sensor_temp(dimm_sc->dimm_softc, &dimm_sc->dimm_sensor, temp);