1 /* tc-m68k.c All the m68020 specific stuff in one convenient, huge,
2 slow to compile, easy to find file.
4 Copyright (C) 1987, 1991, 1992 Free Software Foundation, Inc.
6 This file is part of GAS, the GNU Assembler.
8 GAS is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2, or (at your option)
13 GAS is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with GAS; see the file COPYING. If not, write to
20 the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
28 /* note that this file includes real declarations and thus can only be included by one source file per executable. */
29 #include "opcode/m68k.h"
31 /* This variable contains the value to write out at the beginning of
32 the a.out file. The 2<<16 means that this is a 68020 file instead
33 of an old-style 68000 file */
35 long omagic = 2<<16|OMAGIC; /* Magic byte for header file */
40 /* This array holds the chars that always start a comment. If the
41 pre-processor is disabled, these aren't very useful */
42 const char comment_chars[] = "|";
44 /* This array holds the chars that only start a comment at the beginning of
45 a line. If the line seems to have the form '# 123 filename'
46 .line and .file directives will appear in the pre-processed output */
47 /* Note that input_file.c hand checks for '#' at the beginning of the
48 first line of the input file. This is because the compiler outputs
49 #NO_APP at the beginning of its output. */
50 /* Also note that comments like this one will always work. */
51 const char line_comment_chars[] = "#";
53 /* Chars that can be used to separate mant from exp in floating point nums */
54 const char EXP_CHARS[] = "eE";
56 /* Chars that mean this number is a floating point constant */
60 const char FLT_CHARS[] = "rRsSfFdDxXeEpP";
62 /* Also be aware that MAXIMUM_NUMBER_OF_CHARS_FOR_FLOAT may have to be
63 changed in read.c. Ideally it shouldn't have to know about it at all,
64 but nothing is ideal around here.
67 const int md_reloc_size = 8; /* Size of relocation record */
69 /* Its an arbitrary name: This means I don't approve of it */
70 /* See flames below */
71 static struct obstack robyn;
73 #define TAB(x,y) (((x)<<2)+(y))
74 #define TABTYPE(xy) ((xy) >> 2)
87 /* Operands we can parse: (And associated modes)
93 reg: address or data register
94 areg: address register
95 apc: address register, PC, ZPC or empty string
98 sz: w or l if omitted, l assumed
99 scale: 1 2 4 or 8 if omitted, 1 assumed
101 7.4 IMMED #num --> NUM
102 0.? DREG dreg --> dreg
103 1.? AREG areg --> areg
104 2.? AINDR areg@ --> *(areg)
105 3.? AINC areg@+ --> *(areg++)
106 4.? ADEC areg@- --> *(--areg)
107 5.? AOFF apc@(numw) --> *(apc+numw) -- empty string and ZPC not allowed here
108 6.? AINDX apc@(num,reg:sz:scale) --> *(apc+num+reg*scale)
109 6.? AINDX apc@(reg:sz:scale) --> same, with num=0
110 6.? APODX apc@(num)@(num2,reg:sz:scale) --> *(*(apc+num)+num2+reg*scale)
111 6.? APODX apc@(num)@(reg:sz:scale) --> same, with num2=0
112 6.? AMIND apc@(num)@(num2) --> *(*(apc+num)+num2) (previous mode without an index reg)
113 6.? APRDX apc@(num,reg:sz:scale)@(num2) --> *(*(apc+num+reg*scale)+num2)
114 6.? APRDX apc@(reg:sz:scale)@(num2) --> same, with num=0
115 7.0 ABSL num:sz --> *(num)
116 num --> *(num) (sz L assumed)
117 *** MSCR otherreg --> Magic
119 5.? AOFF apc@(num) --> *(apc+num) -- empty string and ZPC not allowed here still
129 a1@(5,d2:w:1) @(45,d6:l:4)
134 #name@(numw) -->turn into PC rel mode
135 apc@(num8,reg:sz:scale) --> *(apc+num8+reg*scale)
161 short e_siz; /* 0 == default 1 == short/byte 2 == word 3 == long */
164 /* DATA and ADDR have to be contiguous, so that reg-DATA gives 0-7 == data reg,
165 8-15 == addr reg for operands that take both types */
168 DATA = 1, /* 1- 8 == data registers 0-7 */
188 /* Note that COPNUM == processor #1 -- COPNUM+7 == #8, which stores as 000 */
193 FPREG, /* Eight FP registers */
202 COPNUM = (FPREG+8), /* Co-processor #1-#8 */
211 PC, /* Program counter */
212 ZPC, /* Hack for Program space, but 0 addressing */
214 CCR, /* Condition code Reg */
216 /* These have to be in order for the movec instruction to work. */
217 USP, /* User Stack Pointer */
218 ISP, /* Interrupt stack pointer */
233 /* end of movec ordering constraints */
266 IC, /* instruction cache token */
267 DC, /* data cache token */
268 NC, /* no cache token */
269 BC, /* both caches token */
273 /* Internal form of an operand. */
275 char *error; /* Couldn't parse it */
276 enum operand_type mode; /* What mode this instruction is in. */
277 enum _register reg; /* Base register */
278 struct m68k_exp *con1;
279 int ireg; /* Index register */
280 int isiz; /* 0 == unspec 1 == byte(?) 2 == short 3 == long */
281 int imul; /* Multipy ireg by this (1,2,4,or 8) */
282 struct m68k_exp *con2;
285 /* internal form of a 68020 instruction */
288 char *args; /* list of opcode info */
291 int numo; /* Number of shorts in opcode */
294 struct m68k_op operands[6];
296 int nexp; /* number of exprs in use */
297 struct m68k_exp exprs[4];
299 int nfrag; /* Number of frags we have to produce */
301 int fragoff; /* Where in the current opcode[] the frag ends */
307 int nrel; /* Num of reloc strucs in use */
316 enum reloc_type rtype;
317 } reloc[5]; /* Five is enough??? */
320 #define cpu_of_arch(x) ((x) & m68000up)
321 #define float_of_arch(x) ((x) & mfloat)
322 #define mmu_of_arch(x) ((x) & mmmu)
324 static struct m68k_it the_ins; /* the instruction being assembled */
326 /* Macros for adding things to the m68k_it struct */
328 #define addword(w) the_ins.opcode[the_ins.numo++]=(w)
330 /* Like addword, but goes BEFORE general operands */
333 for (z=the_ins.numo;z>opcode->m_codenum;--z) \
334 the_ins.opcode[z]=the_ins.opcode[z-1]; \
335 for (z=0;z<the_ins.nrel;z++) \
336 the_ins.reloc[z].n+=2; \
337 the_ins.opcode[opcode->m_codenum]=w; \
342 #define add_exp(beg,end) (the_ins.exprs[the_ins.nexp].e_beg=beg, \
343 the_ins.exprs[the_ins.nexp].e_end=end, \
344 &the_ins.exprs[the_ins.nexp++] \
348 /* The numo+1 kludge is so we can hit the low order byte of the prev word. Blecch*/
349 #define add_fix(width, exp, pc_rel, r_type) { \
350 the_ins.reloc[the_ins.nrel].n= ((width) == 'B') ? (the_ins.numo*2-1) : \
351 (((width) == 'b') ? ((the_ins.numo-1)*2) : (the_ins.numo*2)); \
352 the_ins.reloc[the_ins.nrel].add=adds((exp)); \
353 the_ins.reloc[the_ins.nrel].sub=subs((exp)); \
354 the_ins.reloc[the_ins.nrel].off=offs((exp)); \
355 the_ins.reloc[the_ins.nrel].got=gots((exp)); \
356 the_ins.reloc[the_ins.nrel].wid=width; \
357 the_ins.reloc[the_ins.nrel].pcrel=pc_rel; \
358 the_ins.reloc[the_ins.nrel++].rtype=r_type; \
361 #define add_frag(add,off,type) {\
362 the_ins.fragb[the_ins.nfrag].fragoff=the_ins.numo;\
363 the_ins.fragb[the_ins.nfrag].fadd=add;\
364 the_ins.fragb[the_ins.nfrag].foff=off;\
365 the_ins.fragb[the_ins.nfrag++].fragty=type;\
368 #define isvar(exp) ((exp) && (adds(exp) || subs(exp) || gots(exp)))
370 #define seg(exp) ((exp)->e_exp.X_seg)
371 #define adds(exp) ((exp)->e_exp.X_add_symbol)
372 #define subs(exp) ((exp)->e_exp.X_subtract_symbol)
373 #define offs(exp) ((exp)->e_exp.X_add_number)
374 #define gots(exp) ((exp)->e_exp.X_got_symbol)
379 unsigned long m_opcode;
382 enum m68k_architecture m_arch;
383 struct m68k_incant *m_next;
386 #define getone(x) ((((x)->m_opcode)>>16)&0xffff)
387 #define gettwo(x) (((x)->m_opcode)&0xffff)
392 static char *crack_operand(char *str, struct m68k_op *opP);
393 static int get_num(struct m68k_exp *exp, int ok);
394 static int get_regs(int i, char *str, struct m68k_op *opP);
395 static int reverse_16_bits(int in);
396 static int reverse_8_bits(int in);
397 static int try_index(char **s, struct m68k_op *opP);
398 static void install_gen_operand(int mode, int val);
399 static void install_operand(int mode, int val);
400 static void s_bss(void);
401 static void s_data1(void);
402 static void s_data2(void);
403 static void s_even(void);
404 static void s_proc(void);
406 #else /* not __STDC__ */
408 static char *crack_operand();
409 static int get_num();
410 static int get_regs();
411 static int reverse_16_bits();
412 static int reverse_8_bits();
413 static int try_index();
414 static void install_gen_operand();
415 static void install_operand();
417 static void s_data1();
418 static void s_data2();
419 static void s_even();
420 static void s_proc();
422 #endif /* not __STDC__ */
424 static enum m68k_architecture current_architecture = 0;
426 /* BCC68000 is for patching in an extra jmp instruction for long offsets
427 on the 68000. The 68000 doesn't support long branches with branchs */
429 /* This table desribes how you change sizes for the various types of variable
430 size expressions. This version only supports two kinds. */
432 /* Note that calls to frag_var need to specify the maximum expansion needed */
433 /* This is currently 10 bytes for DBCC */
436 How far Forward this mode will reach:
437 How far Backward this mode will reach:
438 How many bytes this mode will add to the size of the frag
439 Which mode to go to if the offset won't fit in this one
443 { 1, 1, 0, 0 }, /* First entries aren't used */
444 { 1, 1, 0, 0 }, /* For no good reason except */
445 { 1, 1, 0, 0 }, /* that the VAX doesn't either */
448 { (127), (-128), 0, TAB(BRANCH,SHORT)},
449 { (32767), (-32768), 2, TAB(BRANCH,LONG) },
453 { 1, 1, 0, 0 }, /* FBRANCH doesn't come BYTE */
454 { (32767), (-32768), 2, TAB(FBRANCH,LONG)},
458 { 1, 1, 0, 0 }, /* PCREL doesn't come BYTE */
459 { (32767), (-32768), 2, TAB(PCREL,LONG)},
463 { (127), (-128), 0, TAB(BCC68000,SHORT)},
464 { (32767), (-32768), 2, TAB(BCC68000,LONG) },
465 { 0, 0, 6, 0 }, /* jmp long space */
468 { 1, 1, 0, 0 }, /* DBCC doesn't come BYTE */
469 { (32767), (-32768), 2, TAB(DBCC,LONG) },
470 { 0, 0, 10, 0 }, /* bra/jmp long space */
473 { 1, 1, 0, 0 }, /* PCLEA doesn't come BYTE */
474 { 32767, -32768, 2, TAB(PCLEA,LONG) },
480 /* These are the machine dependent pseudo-ops. These are included so
481 the assembler can work on the output from the SUN C compiler, which
485 /* This table describes all the machine specific pseudo-ops the assembler
486 has to support. The fields are:
487 pseudo-op name without dot
488 function to call to execute this pseudo-op
489 Integer arg to pass to the function
491 const pseudo_typeS md_pseudo_table[] = {
492 { "data1", s_data1, 0 },
493 { "data2", s_data2, 0 },
495 { "even", s_even, 0 },
496 { "skip", s_space, 0 },
497 { "proc", s_proc, 0 },
502 /* #define isbyte(x) ((x) >= -128 && (x) <= 127) */
503 /* #define isword(x) ((x) >= -32768 && (x) <= 32767) */
505 #define issbyte(x) ((x) >= -128 && (x) <= 127)
506 #define isubyte(x) ((x) >= 0 && (x) <= 255)
507 #define issword(x) ((x) >= -32768 && (x) <= 32767)
508 #define isuword(x) ((x) >= 0 && (x) <= 65535)
510 #define isbyte(x) ((x) >= -128 && (x) <= 255)
511 #define isword(x) ((x) >= -32768 && (x) <= 65535)
512 #define islong(x) (1)
514 extern char *input_line_pointer;
521 /* JF these tables here are for speed at the expense of size */
522 /* You can replace them with the #if 0 versions if you really
523 need space and don't mind it running a bit slower */
525 static char mklower_table[256];
526 #define mklower(c) (mklower_table[(unsigned char)(c)])
527 static char notend_table[256];
528 static char alt_notend_table[256];
529 #define notend(s) (!(notend_table[(unsigned char)(*s)] || (*s == ':' &&\
530 alt_notend_table[(unsigned char)(s[1])])))
533 #define mklower(c) (isupper(c) ? tolower(c) : c)
536 /* Handle the extra arg for fix_new when doing PIC */
538 #define FIX_NO_RELOC NO_RELOC, NULL
540 #define FIX_NO_RELOC NO_RELOC
544 /* JF modified this to handle cases where the first part of a symbol name
545 looks like a register */
548 * m68k_reg_parse() := if it looks like a register, return it's token &
549 * advance the pointer.
552 enum _register m68k_reg_parse(ccp)
555 #ifndef MAX_REG_NAME_LEN
556 #define MAX_REG_NAME_LEN (6)
557 #endif /* MAX_REG_NAME_LEN */
558 register char c[MAX_REG_NAME_LEN];
563 c[0] = mklower(ccp[0][0]);
564 #ifdef REGISTER_PREFIX
565 if (c[0] != REGISTER_PREFIX) {
570 for (p = c, q = ccp[0]; p < c + MAX_REG_NAME_LEN; ++p, ++q)
583 if (c[1] >= '0' && c[1] <= '7') {
588 else if (c[1] == 'c') {
598 if (c[3] >= '0' && c[3] <= '7') {
600 ret = BAD + c[3] - '0';
604 if (c[3] >= '0' && c[3] <= '7') {
606 ret = BAC + c[3] - '0';
609 } else if (c[1] == 'c') {
617 if (c[1] == 'a' && c[2] == 'l') {
622 /* This supports both CCR and CC as the ccr reg. */
623 if (c[1] == 'c' && c[2] == 'r') {
626 } else if (c[1] == 'c') {
629 } else if (c[1] == 'a' && (c[2] == 'a' || c[2] == 'c') && c[3] == 'r') {
631 ret = c[2] == 'a' ? CAAR : CACR;
634 else if (c[1] == 'r' && c[2] == 'p') {
641 if (c[1] >= '0' && c[1] <= '7') {
643 ret = DATA + c[1] - '0';
644 } else if (c[1] == 'f' && c[2] == 'c') {
647 } else if (c[1] == 'c') {
650 } else if (c[1] == 't' && c[2] == 't') {
651 if ('0' <= c[3] && c[3] <= '1') {
653 ret = DTT0 + (c[3] - '0');
657 else if (c[1] == 'r' && c[2] == 'p') {
665 if (c[2] >= '0' && c[2] <= '7') {
667 ret = FPREG+c[2]-'0';
670 } else if (c[2] == 'i') {
673 } else if (c[2] == 's') {
674 n= (c[3] == 'r' ? 4 : 3);
676 } else if (c[2] == 'c') {
677 n= (c[3] == 'r' ? 4 : 3);
683 if (c[1] == 's' && c[2] == 'p') {
686 } else if (c[1] == 'c') {
689 } else if (c[1] == 't' && c[2] == 't') {
690 if ('0' <= c[3] && c[3] <= '1') {
692 ret = ITT0 + (c[3] - '0');
697 if (c[1] == 's' && c[2] == 'p') {
700 } else if (c[1] == 'm' && c[2] == 'u' && c[3] == 's' && c[4] == 'r') {
714 if (c[2] == 's' && c[3] == 'r') {
725 else if (c[1] == 's' && c[2] == 'r') {
733 if (c[1] == 'c' && c[2] == 'c') {
746 } else if (c[1] == 'p') {
749 } else if (c[1] == 'f' && c[2] == 'c') {
761 if (c[1] == 's' && c[2] == 'p') {
764 } else if (c[1] == 'r' && c[2] == 'p') {
771 if (c[1] == 'a' && c[2] == 'l') {
776 if (c[1] == 'b' && c[2] == 'r') {
782 if (c[1] == 'p' && c[2] == 'c') {
791 #ifdef REGISTER_PREFIX
794 if (isalnum(ccp[0][n]) || ccp[0][n] == '_')
803 #define SKIP_WHITE() { str++; if (*str == ' ') str++;}
806 * m68k_ip_op := '#' + <anything>
807 * | <register> + range_sep + get_regs
810 * range_sep := '/' | '-' ;
812 * SKIP_WHITE := <empty> | ' ' ;
819 register struct m68k_op *opP;
827 } /* Find the beginning of the string */
830 opP->error="Missing operand";
834 for (strend = str; *strend; strend++) ;;
840 opP->con1=add_exp(str,strend);
843 } /* Guess what: A constant. Shar and enjoy */
845 i = m68k_reg_parse(&str);
847 /* is a register, is exactly a register, and is followed by '@' */
849 if ((i == FAIL || *str != '\0') && *str != '@') {
852 if (i != FAIL && (*str == '/' || *str == '-')) {
854 return(get_regs(i,str,opP));
856 if ((stmp=strchr(str,'@')) != '\0') {
857 opP->con1=add_exp(str,stmp-1);
858 if (stmp == strend) {
863 if ((current_architecture & m68020up) == 0) {
865 } /* if target is not a '20 or better */
868 if (*stmp++ != '(' || *strend-- != ')') {
869 opP->error="Malformed operand";
872 i=try_index(&stmp,opP);
873 opP->con2=add_exp(stmp,strend);
881 } /* if there's an '@' */
883 opP->con1 = add_exp(str,strend);
885 } /* not a register, not exactly a register, or no '@' */
890 if (i >= DATA+0 && i <= DATA+7)
892 else if (i >= ADDR+0 && i <= ADDR+7)
899 if ((i<ADDR+0 || i>ADDR+7) && i != PC && i != ZPC && i != FAIL) { /* Can't indirect off non address regs */
900 opP->error="Invalid indirect register";
920 opP->error="Junk after indirect";
923 /* Some kind of indexing involved. Lets find out how bad it is */
924 i=try_index(&str,opP);
925 /* Didn't start with an index reg, maybe its offset or offset,reg */
933 opP->error="Missing )";
935 case ',': i=0; break;
936 case '(': i++; break;
937 case ')': --i; break;
940 /* if (str[-3] == ':') {
957 opP->error="Specified size isn't :w or :l";
960 opP->con1=add_exp(beg_str,str-4);
961 opP->con1->e_siz=siz;
963 opP->con1=add_exp(beg_str,str-2);
964 /* Should be offset,reg */
965 if (str[-1] == ',') {
966 i=try_index(&str,opP);
968 opP->error="Malformed index reg";
973 /* We've now got offset) offset,reg) or reg) */
976 /* Th-the-thats all folks */
977 if (opP->reg == FAIL) opP->mode = AINDX; /* Other form of indirect */
978 else if (opP->ireg == FAIL) opP->mode = AOFF;
979 else opP->mode = AINDX;
982 /* Next thing had better be another @ */
983 if (*str != '@' || str[1] != '(') {
984 opP->error = "junk after indirect";
988 if ((current_architecture & m68020up) == 0) {
990 } /* if target is not a '20 or better */
994 if (opP->ireg != FAIL) {
997 i = try_index(&str, opP);
999 opP->error = "Two index registers! not allowed!";
1003 i = try_index(&str, opP);
1014 opP->error="Missing )";
1016 case ',': i=0; break;
1017 case '(': i++; break;
1018 case ')': --i; break;
1022 opP->con2=add_exp(beg_str,str-2);
1024 if (str[-1] == ',') {
1025 if (opP->ireg != FAIL) {
1026 opP->error = "Can't have two index regs";
1030 i = try_index(&str, opP);
1033 opP->error = "malformed index reg";
1038 } else if (opP->ireg != FAIL) {
1048 opP->error="Junk after indirect";
1052 } /* m68k_ip_op() */
1056 * try_index := data_or_address_register + ')' + SKIP_W
1057 * | data_or_address_register + ':' + SKIP_W + size_spec + SKIP_W + multiplier + ')' + SKIP_W
1059 * multiplier := <empty>
1060 * | ':' + multiplier_number
1063 * multiplier_number := '1' | '2' | '4' | '8' ;
1065 * size_spec := 'l' | 'L' | 'w' | 'W' ;
1067 * SKIP_W := <empty> | ' ' ;
1071 static int try_index(s,opP)
1073 struct m68k_op *opP;
1077 #define SKIP_W() { ss++; if (*ss == ' ') ss++;}
1081 i=m68k_reg_parse(&ss);
1082 if (!(i >= DATA+0 && i <= ADDR+7)) { /* if i is not DATA or ADDR reg */
1096 opP->error="Missing : in index register";
1111 opP->error="Index register size spec not :w or :l";
1126 opP->error="index multiplier not 1, 2, 4 or 8";
1133 opP->error="Missing )";
1142 #ifdef TEST1 /* TEST1 tests m68k_ip_op(), which parses operands */
1146 struct m68k_op thark;
1151 memset(&thark, '\0', sizeof(thark));
1152 if (!m68k_ip_op(buf,&thark)) printf("FAIL:");
1154 printf("op1 error %s in %s\n",thark.error,buf);
1155 printf("mode %d, reg %d, ",thark.mode,thark.reg);
1157 printf("Constant: '%.*s',",1+thark.e_const-thark.b_const,thark.b_const);
1158 printf("ireg %d, isiz %d, imul %d ",thark.ireg,thark.isiz,thark.imul);
1160 printf("Iadd: '%.*s'",1+thark.e_iadd-thark.b_iadd,thark.b_iadd);
1169 static struct hash_control* op_hash = NULL; /* handle of the OPCODE hash table
1170 NULL means any use before m68k_ip_begin()
1177 * This converts a string into a 68k instruction.
1178 * The string must be a bare single instruction in sun format
1179 * with RMS-style 68020 indirects
1182 * It provides some error messages: at most one fatal error message (which
1183 * stops the scan) and at most one warning message for each operand.
1184 * The 68k instruction is returned in exploded form, since we have no
1185 * knowledge of how you parse (or evaluate) your expressions.
1186 * We do however strip off and decode addressing modes and operation
1189 * This function's value is a string. If it is not "" then an internal
1190 * logic error was found: read this code to assign meaning to the string.
1191 * No argument string should generate such an error string:
1192 * it means a bug in our code, not in the user's text.
1194 * You MUST have called m68k_ip_begin() once and m86_ip_end() never before using
1198 /* JF this function no longer returns a useful value. Sorry */
1199 void m68k_ip (instring)
1203 register struct m68k_op *opP;
1204 register struct m68k_incant *opcode;
1206 register int tmpreg = 0,
1216 char *crack_operand();
1217 LITTLENUM_TYPE words[6];
1218 LITTLENUM_TYPE *wordp;
1220 if (*instring == ' ')
1221 instring++; /* skip leading whitespace */
1223 /* Scan up to end of operation-code, which MUST end in end-of-string
1224 or exactly 1 space. */
1225 for (p = instring; *p != '\0'; p++)
1230 if (p == instring) {
1231 the_ins.error = "No operator";
1232 the_ins.opcode[0] = NULL;
1233 /* the_ins.numo=1; */
1237 /* p now points to the end of the opcode name, probably whitespace.
1238 make sure the name is null terminated by clobbering the whitespace,
1239 look it up in the hash table, then fix it back. */
1242 opcode = (struct m68k_incant *)hash_find (op_hash, instring);
1245 if (opcode == NULL) {
1246 the_ins.error = "Unknown operator";
1247 the_ins.opcode[0] = NULL;
1248 /* the_ins.numo=1; */
1252 /* found a legitimate opcode, start matching operands */
1253 while (*p == ' ') ++p;
1255 for (opP = &the_ins.operands[0]; *p; opP++) {
1257 p = crack_operand(p, opP);
1260 the_ins.error=opP->error;
1265 opsfound = opP - &the_ins.operands[0];
1267 /* This ugly hack is to support the floating pt opcodes in their standard form */
1268 /* Essentially, we fake a first enty of type COP#1 */
1269 if (opcode->m_operands[0] == 'I') {
1272 for (n=opsfound;n>0;--n)
1273 the_ins.operands[n]=the_ins.operands[n-1];
1275 /* memcpy((char *)(&the_ins.operands[1]), (char *)(&the_ins.operands[0]), opsfound*sizeof(the_ins.operands[0])); */
1276 memset((char *)(&the_ins.operands[0]), '\0', sizeof(the_ins.operands[0]));
1277 the_ins.operands[0].mode=MSCR;
1278 the_ins.operands[0].reg=COPNUM; /* COP #1 */
1282 /* We've got the operands. Find an opcode that'll accept them */
1283 for (losing = 0; ; ) {
1284 /* if we didn't get the right number of ops,
1285 or we have no common model with this pattern
1286 then reject this pattern. */
1288 if (opsfound != opcode->m_opnum
1289 || ((opcode->m_arch & current_architecture) == 0)) {
1294 for (s=opcode->m_operands, opP = &the_ins.operands[0]; *s && !losing; s += 2, opP++) {
1295 /* Warning: this switch is huge! */
1296 /* I've tried to organize the cases into this order:
1297 non-alpha first, then alpha by letter. lower-case goes directly
1298 before uppercase counterpart. */
1299 /* Code with multiple case ...: gets sorted by the lowest case ...
1300 it belongs to. I hope this makes sense. */
1304 /* this operand is just here to indicate a jump-table branch */
1311 if (opP->mode == MSCR || opP->mode == IMMED
1312 || opP->mode == DREG || opP->mode == AREG
1313 || opP->mode == AINC || opP->mode == ADEC
1314 || opP->mode == REGLST)
1319 if (opP->mode != IMMED)
1324 t=get_num(opP->con1,80);
1325 if (s[1] == 'b' && !isbyte(t))
1327 else if (s[1] == 'w' && !isword(t))
1334 if (opP->mode != IMMED)
1339 if (opP->mode == MSCR || opP->mode == AREG ||
1340 opP->mode == IMMED || opP->reg == PC || opP->reg == ZPC || opP->mode == REGLST)
1345 if (opP->mode == MSCR || opP->reg == PC ||
1346 opP->reg == ZPC || opP->mode == REGLST)
1352 if (opP->mode == MSCR || opP->mode == DREG ||
1353 opP->mode == AREG || opP->mode == IMMED || opP->reg == PC || opP->reg == ZPC ||
1354 opP->mode == AINC || opP->mode == ADEC || opP->mode == REGLST)
1359 if (opP->mode == MSCR || opP->mode == REGLST)
1364 if (opP->mode != AINC)
1369 if (opP->mode != ADEC)
1374 if (opP->mode == MSCR || opP->mode == AREG ||
1375 opP->mode == AINC || opP->mode == ADEC || opP->mode == IMMED || opP->mode == REGLST)
1380 if (opP->mode == MSCR || opP->mode == AREG || opP->mode == REGLST)
1385 if (opP->mode == MSCR || opP->mode == AREG ||
1386 opP->mode == AINC || opP->mode == ADEC || opP->mode == IMMED || opP->reg == PC ||
1387 opP->reg == ZPC || opP->mode == REGLST)
1392 if (opP->mode == MSCR || opP->mode == AREG ||
1393 opP->mode == IMMED || opP->mode == REGLST)
1397 case '~': /* For now! (JF FOO is this right?) */
1398 if (opP->mode == MSCR || opP->mode == DREG ||
1399 opP->mode == AREG || opP->mode == IMMED || opP->reg == PC || opP->reg == ZPC || opP->mode == REGLST)
1404 if (opP->mode != AREG)
1408 if (opP->mode != AINDR) {
1410 } /* if not address register indirect */
1413 if (opP->mode != ABSL || (flagseen['S'] && instring[0] == 'j'
1414 && instring[1] == 'b'
1415 && instring[2] == 's'
1416 && instring[3] == 'r'))
1421 if (opP->mode != MSCR || opP->reg != CCR)
1425 case 'd': /* FOO This mode is a KLUDGE!! */
1426 if (opP->mode != AOFF && (opP->mode != ABSL ||
1427 opP->con1->e_beg[0] != '(' || opP->con1->e_end[0] != ')'))
1432 if (opP->mode != DREG)
1437 if (opP->mode != MSCR || opP->reg<(FPREG+0) || opP->reg>(FPREG+7))
1442 if (opP->mode != MSCR || opP->reg<COPNUM ||
1443 opP->reg >= COPNUM+7)
1448 if (opP->mode != MSCR
1451 || cpu_of_arch(current_architecture) < m68010 /* before 68010 had none */
1452 || (cpu_of_arch(current_architecture) < m68020
1456 && opP->reg != VBR) /* 68010's had only these */
1457 || (cpu_of_arch(current_architecture) < m68040
1465 && opP->reg != ISP) /* 680[23]0's have only these */
1466 || (cpu_of_arch(current_architecture) == m68040 /* 68040 has all but this */
1467 && opP->reg == CAAR)) {
1469 } /* doesn't cut it */
1473 if (opP->mode != IMMED)
1479 if (opP->mode == DREG || opP->mode == AREG || opP->mode == FPREG) {
1484 opP->reg=1<<(opP->reg-DATA);
1486 } else if (opP->mode != REGLST) {
1488 } else if (s[1] == '8' && opP->reg&0x0FFffFF)
1490 else if (s[1] == '3' && opP->reg&0x7000000)
1495 if (opP->mode != IMMED)
1500 t=get_num(opP->con1,80);
1501 if (!issbyte(t) || isvar(opP->con1))
1507 if (opP->mode != DREG && opP->mode != IMMED)
1512 if (opP->mode != IMMED)
1517 t=get_num(opP->con1,80);
1518 if (t<1 || t>8 || isvar(opP->con1))
1524 if (opP->mode != DREG && opP->mode != AREG)
1529 if (opP->mode != MSCR || !(opP->reg == FPI || opP->reg == FPS || opP->reg == FPC))
1534 if (opP->mode != MSCR || opP->reg != SR)
1539 if (opP->mode != MSCR || opP->reg != USP)
1543 /* JF these are out of order. We could put them
1544 in order if we were willing to put up with
1545 bunches of #ifdef m68851s in the code */
1547 /* Memory addressing mode used by pflushr */
1549 if (opP->mode == MSCR || opP->mode == DREG ||
1550 opP->mode == AREG || opP->mode == REGLST)
1555 if (opP->mode != MSCR || (opP->reg != SFC && opP->reg != DFC))
1560 if (opP->mode != MSCR || (opP->reg != TC && opP->reg != CAL &&
1561 opP->reg != VAL && opP->reg != SCC && opP->reg != AC))
1566 if (opP->reg != VAL)
1571 if (opP->mode != MSCR || (opP->reg != DRP && opP->reg != SRP &&
1577 if (opP->mode != MSCR ||
1578 (!(opP->reg >= BAD && opP->reg <= BAD+7) &&
1579 !(opP->reg >= BAC && opP->reg <= BAC+7)))
1584 if (opP->reg != PSR)
1589 if (opP->reg != PCSR)
1597 && opP->reg != BC) {
1599 } /* not a cache specifier. */
1603 if (opP->mode != ABSL) {
1605 } /* not absolute */
1609 as_fatal("Internal error: Operand mode %c unknown in line %s of file \"%s\"",
1610 *s, __LINE__, __FILE__);
1611 } /* switch on type of operand */
1614 } /* for each operand */
1615 } /* if immediately wrong */
1621 opcode = opcode->m_next;
1624 the_ins.error = "instruction/operands mismatch";
1626 } /* Fell off the end */
1631 /* now assemble it */
1633 the_ins.args=opcode->m_operands;
1634 the_ins.numargs=opcode->m_opnum;
1635 the_ins.numo=opcode->m_codenum;
1636 the_ins.opcode[0]=getone(opcode);
1637 the_ins.opcode[1]=gettwo(opcode);
1639 for (s = the_ins.args, opP = &the_ins.operands[0]; *s; s += 2, opP++) {
1640 /* This switch is a doozy.
1641 Watch the first step; its a big one! */
1646 /* this operand is just here to indicate a jump-table branch */
1665 /* Use GLOB_DAT for operand references in PIC mode */
1667 reloc_type = RELOC_GLOB_DAT;
1670 reloc_type = NO_RELOC;
1672 switch (opP->mode) {
1676 tmpreg=0x3c; /* 7.4 */
1677 if (*opP->con1->e_beg == ':') {
1682 if (strchr("bwl",s[1])) nextword=get_num(opP->con1,80);
1683 else nextword=nextword=get_num(opP->con1,0);
1684 if (isvar(opP->con1)) {
1686 /* KLUDGE!!! In PIC assembly, an immediate reference to
1687 __GLOBAL_OFFSET_TABLE_ is turned into a pc-relative
1688 reference to __GLOBAL_OFFSET_TABLE_ - 6,
1689 for the sake of Sun compatibility. */
1690 if (s[1] == 'l' && picmode && gots(opP->con1)) {
1691 offs(opP->con1) -= 6;
1692 add_fix(s[1], opP->con1, 1, NO_RELOC);
1695 add_fix(s[1],opP->con1,0,reloc_type);
1699 if (!isbyte(nextword))
1700 opP->error="operand out of range";
1705 if (!isword(nextword))
1706 opP->error="operand out of range";
1711 addword(nextword>>16);
1733 as_fatal("Internal error: Can't decode %c%c in line %s of file \"%s\"",
1734 *s, s[1], __LINE__, __FILE__);
1740 if (seg(opP->con1) == SEG_BIG)
1742 while (baseo -= 2) {
1746 addword(nextword>>16);
1751 /* We gotta put out some float */
1752 if (seg(opP->con1) != SEG_BIG) {
1753 int_to_gen(nextword);
1754 gen_to_words(words,baseo,(long int)outro);
1755 for (wordp=words;baseo--;wordp++)
1759 if (offs(opP->con1)>0) {
1760 as_warn("Bignum assumed to be binary bit-pattern");
1762 if (offs(opP->con1)>baseo) {
1763 as_warn("Bignum too big for %c format; truncated",s[1]);
1764 offs(opP->con1)=baseo;
1766 baseo-=offs(opP->con1);
1767 for (wordp=generic_bignum+offs(opP->con1)-1;offs(opP->con1)--;--wordp)
1773 gen_to_words(words,baseo,(long)outro);
1774 for (wordp=words;baseo--;wordp++)
1778 tmpreg=opP->reg-DATA; /* 0.dreg */
1781 tmpreg=0x08+opP->reg-ADDR; /* 1.areg */
1784 tmpreg=0x10+opP->reg-ADDR; /* 2.areg */
1787 tmpreg=0x20+opP->reg-ADDR; /* 4.areg */
1790 tmpreg=0x18+opP->reg-ADDR; /* 3.areg */
1794 nextword=get_num(opP->con1,80);
1795 /* Force into index mode. Hope this works */
1797 /* We do the first bit for 32-bit displacements,
1798 and the second bit for 16 bit ones. It is
1799 possible that we should make the default be
1800 WORD instead of LONG, but I think that'd
1801 break GCC, so we put up with a little
1802 inefficiency for the sake of working output.
1805 if ( !issword(nextword)
1806 || ( isvar(opP->con1)
1807 && ((opP->con1->e_siz == 0
1808 && flagseen['l'] == 0)
1809 || opP->con1->e_siz == 3))) {
1812 tmpreg=0x3B; /* 7.3 */
1814 tmpreg=0x30+opP->reg-ADDR; /* 6.areg */
1815 if (isvar(opP->con1)) {
1816 if (opP->reg == PC && !subs(opP->con1)) {
1817 add_frag(adds(opP->con1),
1819 TAB(PCLEA,SZ_UNDEF));
1823 add_fix('l',opP->con1,0,reloc_type);
1827 addword(nextword>>16);
1830 tmpreg=0x3A; /* 7.2 */
1832 tmpreg=0x28+opP->reg-ADDR; /* 5.areg */
1834 if (isvar(opP->con1)) {
1835 if (opP->reg == PC) {
1836 add_fix('w',opP->con1,1,NO_RELOC);
1838 add_fix('w',opP->con1,0,reloc_type);
1847 know(current_architecture & m68020up);
1848 /* intentional fall-through */
1851 baseo=get_num(opP->con1,80);
1852 outro=get_num(opP->con2,80);
1853 /* Figure out the 'addressing mode' */
1854 /* Also turn on the BASE_DISABLE bit, if needed */
1855 if (opP->reg == PC || opP->reg == ZPC) {
1856 tmpreg=0x3b; /* 7.3 */
1857 if (opP->reg == ZPC)
1859 } else if (opP->reg == FAIL) {
1861 tmpreg=0x30; /* 6.garbage */
1862 } else tmpreg=0x30+opP->reg-ADDR; /* 6.areg */
1864 siz1= (opP->con1) ? opP->con1->e_siz : 0;
1865 siz2= (opP->con2) ? opP->con2->e_siz : 0;
1867 /* Index register stuff */
1868 if (opP->ireg >= DATA+0 && opP->ireg <= ADDR+7) {
1869 nextword|=(opP->ireg-DATA)<<12;
1871 if (opP->isiz == 0 || opP->isiz == 3)
1873 switch (opP->imul) {
1875 case 2: nextword|=0x200; break;
1876 case 4: nextword|=0x400; break;
1877 case 8: nextword|=0x600; break;
1878 default: as_fatal("failed sanity check.");
1881 GET US OUT OF HERE! */
1883 /* Must be INDEX, with an index
1884 register. Address register
1885 cannot be ZERO-PC, and either
1886 :b was forced, or we know
1888 if (opP->mode == AINDX
1893 && !isvar(opP->con1)))) {
1894 nextword +=baseo&0xff;
1896 if (isvar(opP->con1))
1897 add_fix('B',opP->con1,0,reloc_type);
1901 nextword|=0x40; /* No index reg */
1903 /* It aint simple */
1905 /* If the guy specified a width, we assume that
1906 it is wide enough. Maybe it isn't. If so, we lose
1910 if (isvar(opP->con1) || !issword(baseo)) {
1913 } else if (baseo == 0)
1921 as_warn("Byte dispacement won't work. Defaulting to :w");
1930 /* Figure out innner displacement stuff */
1931 if (opP->mode != AINDX) {
1934 if (isvar(opP->con2) || !issword(outro)) {
1937 } else if (outro == 0)
1945 as_warn("Byte dispacement won't work. Defaulting to :w");
1953 if (opP->mode == APODX) nextword|=0x04;
1954 else if (opP->mode == AMIND) nextword|=0x40;
1958 if (isvar(opP->con1)) {
1959 if (opP->reg == PC || opP->reg == ZPC) {
1960 add_fix(siz1 == 3 ? 'l' : 'w',opP->con1,1,NO_RELOC);
1961 opP->con1->e_exp.X_add_number+=6;
1963 add_fix(siz1 == 3 ? 'l' : 'w',opP->con1,0,reloc_type);
1970 if (isvar(opP->con2)) {
1971 if (opP->reg == PC || opP->reg == ZPC) {
1972 add_fix(siz2 == 3 ? 'l' : 'w',opP->con2,1,NO_RELOC);
1973 opP->con1->e_exp.X_add_number+=6;
1975 add_fix(siz2 == 3 ? 'l' : 'w',opP->con2,0,reloc_type);
1985 nextword=get_num(opP->con1,80);
1986 switch (opP->con1->e_siz) {
1988 as_warn("Unknown size for absolute reference");
1990 if (!isvar(opP->con1) && issword(offs(opP->con1))) {
1991 tmpreg=0x38; /* 7.0 */
1995 /* Don't generate pc relative code
1996 on 68010 and 68000 */
1997 if (isvar(opP->con1)
1999 && seg(opP->con1) == SEG_TEXT
2000 && now_seg == SEG_TEXT
2001 && cpu_of_arch(current_architecture) >= m68020
2003 && !strchr("~%&$?", s[0])) {
2004 tmpreg=0x3A; /* 7.2 */
2005 add_frag(adds(opP->con1),
2007 TAB(PCREL,SZ_UNDEF));
2010 case 3: /* Fall through into long */
2011 if (isvar(opP->con1))
2012 add_fix('l',opP->con1,0,NO_RELOC);
2014 tmpreg=0x39; /* 7.1 mode */
2015 addword(nextword>>16);
2020 if (isvar(opP->con1))
2021 add_fix('w',opP->con1,0,NO_RELOC);
2023 tmpreg=0x38; /* 7.0 mode */
2030 as_bad("unknown/incorrect operand");
2033 install_gen_operand(s[1],tmpreg);
2038 switch (s[1]) { /* JF: I hate floating point! */
2053 tmpreg=get_num(opP->con1,tmpreg);
2054 if (isvar(opP->con1))
2055 add_fix(s[1],opP->con1,0,NO_RELOC);
2057 case 'b': /* Danger: These do no check for
2058 certain types of overflow.
2060 if (!isbyte(tmpreg))
2061 opP->error="out of range";
2063 if (isvar(opP->con1))
2064 the_ins.reloc[the_ins.nrel-1].n=(opcode->m_codenum)*2;
2067 if (!isword(tmpreg))
2068 opP->error="out of range";
2070 if (isvar(opP->con1))
2071 the_ins.reloc[the_ins.nrel-1].n=(opcode->m_codenum)*2;
2074 insop(tmpreg); /* Because of the way insop works, we put these two out backwards */
2076 if (isvar(opP->con1))
2077 the_ins.reloc[the_ins.nrel-1].n=(opcode->m_codenum)*2;
2083 install_operand(s[1],tmpreg);
2086 as_fatal("Internal error: Unknown mode #%c in line %s of file \"%s\"", s[1], __LINE__, __FILE__);
2094 install_operand(s[1], opP->reg - ADDR);
2098 tmpreg = get_num(opP->con1, 80);
2101 /* Offset is relative to next word */
2102 opP->con1->e_exp.X_add_number -= 1;
2103 add_fix('B', opP->con1, 1,NO_RELOC);
2106 add_fix('w', opP->con1, 1,NO_RELOC);
2111 if (cpu_of_arch(current_architecture) < m68020) /* 68000 or 010 */
2112 as_warn("Can't use long branches on 68000/68010");
2113 the_ins.opcode[the_ins.numo-1]|=0xff;
2114 add_fix('l',opP->con1,1,NO_RELOC);
2120 /* If we have the optional kludgey 2nd operand,
2121 make this go via the jump table. */
2122 if (picmode && s[2] == ' ') {
2123 the_ins.opcode[the_ins.numo-1] |= 0xFF;
2124 add_fix('l', opP->con1, 1, RELOC_JMP_TBL);
2130 if (subs(opP->con1)) /* We can't relax it */
2133 /* This could either be a symbol, or an
2134 absolute address. No matter, the
2135 frag hacking will finger it out.
2136 Not quite: it can't switch from
2137 BRANCH to BCC68000 for the case
2138 where opnd is absolute (it needs
2139 to use the 68000 hack since no
2140 conditional abs jumps). */
2141 if (((cpu_of_arch(current_architecture) < m68020) || (0 == adds(opP->con1)))
2142 && (the_ins.opcode[0] >= 0x6200)
2143 && (the_ins.opcode[0] <= 0x6f00)) {
2144 add_frag(adds(opP->con1),offs(opP->con1),TAB(BCC68000,SZ_UNDEF));
2146 add_frag(adds(opP->con1),offs(opP->con1),TAB(BRANCH,SZ_UNDEF));
2150 if (isvar(opP->con1)) {
2151 /* check for DBcc instruction */
2152 if ((the_ins.opcode[0] & 0xf0f8) == 0x50c8) {
2153 /* size varies if patch */
2154 /* needed for long form */
2155 add_frag(adds(opP->con1),offs(opP->con1),TAB(DBCC,SZ_UNDEF));
2160 opP->con1->e_exp.X_add_number+=2;
2161 add_fix('w',opP->con1,1,NO_RELOC);
2165 case 'C': /* Fixed size LONG coproc branches */
2166 the_ins.opcode[the_ins.numo-1]|=0x40;
2167 /* Offset the displacement to be relative to byte disp location */
2168 /* Coproc branches don't have a byte disp option, but they are
2169 compatible with the ordinary branches, which do... */
2170 opP->con1->e_exp.X_add_number+=4;
2171 add_fix('l',opP->con1,1,NO_RELOC);
2175 case 'c': /* Var size Coprocesssor branches */
2176 if (subs(opP->con1)) {
2177 add_fix('l',opP->con1,1,NO_RELOC);
2178 add_frag((symbolS *)0,(long)0,TAB(FBRANCH,LONG));
2179 } else if (adds(opP->con1)) {
2180 add_frag(adds(opP->con1),offs(opP->con1),TAB(FBRANCH,SZ_UNDEF));
2182 /* add_frag((symbolS *)0,offs(opP->con1),TAB(FBRANCH,SHORT)); */
2183 the_ins.opcode[the_ins.numo-1]|=0x40;
2184 add_fix('l',opP->con1,1,NO_RELOC);
2190 as_fatal("Internal error: operand type B%c unknown in line %s of file \"%s\"",
2191 s[1], __LINE__, __FILE__);
2195 case 'C': /* Ignore it */
2198 case 'd': /* JF this is a kludge */
2199 if (opP->mode == AOFF) {
2200 install_operand('s',opP->reg-ADDR);
2204 tmpP=opP->con1->e_end-2;
2206 opP->con1->e_end-=4; /* point to the , */
2207 baseo=m68k_reg_parse(&tmpP);
2208 if (baseo<ADDR+0 || baseo>ADDR+7) {
2209 as_bad("Unknown address reg, using A0");
2212 install_operand('s',baseo);
2214 tmpreg=get_num(opP->con1,80);
2215 if (!issword(tmpreg)) {
2216 as_warn("Expression out of range, using 0");
2223 install_operand(s[1],opP->reg-DATA);
2227 install_operand(s[1],opP->reg-FPREG);
2231 tmpreg=1+opP->reg-COPNUM;
2234 install_operand(s[1],tmpreg);
2237 case 'J': /* JF foo */
2239 case SFC: tmpreg=0x000; break;
2240 case DFC: tmpreg=0x001; break;
2241 case CACR: tmpreg=0x002; break;
2242 case TC: tmpreg=0x003; break;
2243 case ITT0: tmpreg=0x004; break;
2244 case ITT1: tmpreg=0x005; break;
2245 case DTT0: tmpreg=0x006; break;
2246 case DTT1: tmpreg=0x007; break;
2248 case USP: tmpreg=0x800; break;
2249 case VBR: tmpreg=0x801; break;
2250 case CAAR: tmpreg=0x802; break;
2251 case MSP: tmpreg=0x803; break;
2252 case ISP: tmpreg=0x804; break;
2253 case MMUSR: tmpreg=0x805; break;
2254 case URP: tmpreg=0x806; break;
2255 case SRP: tmpreg=0x807; break;
2257 as_fatal("failed sanity check.");
2259 install_operand(s[1],tmpreg);
2263 tmpreg=get_num(opP->con1,55);
2264 install_operand(s[1],tmpreg&0x7f);
2270 if (tmpreg&0x7FF0000)
2271 as_bad("Floating point register in register list");
2272 insop(reverse_16_bits(tmpreg));
2274 if (tmpreg&0x700FFFF)
2275 as_bad("Wrong register in floating-point reglist");
2276 install_operand(s[1],reverse_8_bits(tmpreg>>16));
2283 if (tmpreg&0x7FF0000)
2284 as_bad("Floating point register in register list");
2286 } else if (s[1] == '8') {
2287 if (tmpreg&0x0FFFFFF)
2288 as_bad("incorrect register in reglist");
2289 install_operand(s[1],tmpreg>>24);
2291 if (tmpreg&0x700FFFF)
2292 as_bad("wrong register in floating-point reglist");
2294 install_operand(s[1],tmpreg>>16);
2299 install_operand(s[1],get_num(opP->con1,60));
2303 tmpreg= (opP->mode == DREG)
2304 ? 0x20+opP->reg-DATA
2305 : (get_num(opP->con1,40)&0x1F);
2306 install_operand(s[1],tmpreg);
2310 tmpreg=get_num(opP->con1,10);
2313 install_operand(s[1],tmpreg);
2317 /* This depends on the fact that ADDR registers are
2318 eight more than their corresponding DATA regs, so
2319 the result will have the ADDR_REG bit set */
2320 install_operand(s[1],opP->reg-DATA);
2324 if (opP->reg == FPI) tmpreg=0x1;
2325 else if (opP->reg == FPS) tmpreg=0x2;
2326 else if (opP->reg == FPC) tmpreg=0x4;
2327 else as_fatal("failed sanity check.");
2328 install_operand(s[1],tmpreg);
2331 case 'S': /* Ignore it */
2335 install_operand(s[1],get_num(opP->con1,30));
2338 case 'U': /* Ignore it */
2343 case NC: tmpreg = 0; break;
2344 case DC: tmpreg = 1; break;
2345 case IC: tmpreg = 2; break;
2346 case BC: tmpreg = 3; break;
2348 as_fatal("failed sanity check");
2349 } /* switch on cache token */
2350 install_operand(s[1], tmpreg);
2353 /* JF: These are out of order, I fear. */
2363 as_fatal("failed sanity check.");
2365 install_operand(s[1],tmpreg);
2386 as_fatal("failed sanity check.");
2388 install_operand(s[1],tmpreg);
2392 if (opP->reg == VAL)
2394 as_fatal("failed sanity check.");
2409 as_fatal("failed sanity check.");
2411 install_operand(s[1],tmpreg);
2416 case BAD: case BAD+1: case BAD+2: case BAD+3:
2417 case BAD+4: case BAD+5: case BAD+6: case BAD+7:
2418 tmpreg = (4 << 10) | ((opP->reg - BAD) << 2);
2421 case BAC: case BAC+1: case BAC+2: case BAC+3:
2422 case BAC+4: case BAC+5: case BAC+6: case BAC+7:
2423 tmpreg = (5 << 10) | ((opP->reg - BAC) << 2);
2427 as_fatal("failed sanity check.");
2429 install_operand(s[1], tmpreg);
2432 know(opP->reg == PSR);
2435 know(opP->reg == PCSR);
2439 tmpreg=get_num(opP->con1,80);
2440 install_operand(s[1], tmpreg);
2443 as_fatal("Internal error: Operand type %c unknown in line %s of file \"%s\"", s[0], __LINE__, __FILE__);
2446 /* By the time whe get here (FINALLY) the_ins contains the complete
2447 instruction, ready to be emitted... */
2451 * get_regs := '/' + ?
2452 * | '-' + <register>
2453 * | '-' + <register> + ?
2458 * The idea here must be to scan in a set of registers but I don't
2459 * understand it. Looks awfully sloppy to me but I don't have any doc on
2466 static int get_regs(i,str,opP)
2468 struct m68k_op *opP;
2471 /* 26, 25, 24, 23-16, 15-8, 0-7 */
2472 /* Low order 24 bits encoded fpc,fps,fpi,fp7-fp0,a7-a0,d7-d0 */
2473 unsigned long cur_regs = 0;
2477 #define ADD_REG(x) { if (x == FPI) cur_regs|=(1<<24);\
2478 else if (x == FPS) cur_regs|=(1<<25);\
2479 else if (x == FPC) cur_regs|=(1<<26);\
2480 else cur_regs|=(1<<(x-1)); }
2487 } else if (*str == '-') {
2489 reg2=m68k_reg_parse(&str);
2490 if (reg2<DATA || reg2 >= FPREG+8 || reg1 == FPI || reg1 == FPS || reg1 == FPC) {
2491 opP->error="unknown register in register list";
2494 while (reg1 <= reg2) {
2500 } else if (*str == '\0') {
2504 opP->error="unknow character in register list";
2507 /* DJA -- Bug Fix. Did't handle d1-d2/a1 until the following instruction was added */
2510 reg1=m68k_reg_parse(&str);
2511 if ((reg1<DATA || reg1 >= FPREG+8) && !(reg1 == FPI || reg1 == FPS || reg1 == FPC)) {
2512 opP->error="unknown register in register list";
2520 static int reverse_16_bits(in)
2526 static int mask[16] = {
2527 0x0001,0x0002,0x0004,0x0008,0x0010,0x0020,0x0040,0x0080,
2528 0x0100,0x0200,0x0400,0x0800,0x1000,0x2000,0x4000,0x8000
2530 for (n=0;n<16;n++) {
2535 } /* reverse_16_bits() */
2537 static int reverse_8_bits(in)
2543 static int mask[8] = {
2544 0x0001,0x0002,0x0004,0x0008,0x0010,0x0020,0x0040,0x0080,
2552 } /* reverse_8_bits() */
2554 static void install_operand(mode,val)
2560 the_ins.opcode[0]|=val & 0xFF; /* JF FF is for M kludge */
2563 the_ins.opcode[0]|=val<<9;
2566 the_ins.opcode[1]|=val<<12;
2569 the_ins.opcode[1]|=val<<6;
2572 the_ins.opcode[1]|=val;
2575 the_ins.opcode[2]|=val<<12;
2578 the_ins.opcode[2]|=val<<6;
2581 /* DANGER! This is a hack to force cas2l and cas2w cmds
2582 to be three words long! */
2584 the_ins.opcode[2]|=val;
2587 the_ins.opcode[1]|=val<<7;
2590 the_ins.opcode[1]|=val<<10;
2594 the_ins.opcode[1]|=val<<5;
2599 the_ins.opcode[1]|=(val<<10)|(val<<7);
2602 the_ins.opcode[1]|=(val<<12)|val;
2605 the_ins.opcode[0]|=val=0xff;
2608 the_ins.opcode[0]|=val<<9;
2611 the_ins.opcode[1]|=val;
2614 the_ins.opcode[1]|=val;
2615 the_ins.numo++; /* What a hack */
2618 the_ins.opcode[1]|=val<<4;
2625 the_ins.opcode[0] |= (val << 6);
2628 the_ins.opcode[1] = (val >> 16);
2629 the_ins.opcode[2] = val & 0xffff;
2633 as_fatal("failed sanity check.");
2635 } /* install_operand() */
2637 static void install_gen_operand(mode,val)
2643 the_ins.opcode[0]|=val;
2646 /* This is a kludge!!! */
2647 the_ins.opcode[0]|=(val&0x07)<<9|(val&0x38)<<3;
2656 the_ins.opcode[0]|=val;
2658 /* more stuff goes here */
2660 as_fatal("failed sanity check.");
2662 } /* install_gen_operand() */
2665 * verify that we have some number of paren pairs, do m68k_ip_op(), and
2666 * then deal with the bitfield hack.
2669 static char *crack_operand(str,opP)
2671 register struct m68k_op *opP;
2673 register int parens;
2675 register char *beg_str;
2681 for (parens=0;*str && (parens>0 || notend(str));str++) {
2682 if (*str == '(') parens++;
2683 else if (*str == ')') {
2684 if (!parens) { /* ERROR */
2685 opP->error="Extra )";
2691 if (!*str && parens) { /* ERROR */
2692 opP->error="Missing )";
2697 if (m68k_ip_op(beg_str,opP) == FAIL) {
2703 c= *++str; /* JF bitfield hack */
2707 as_bad("Missing operand");
2712 /* See the comment up above where the #define notend(... is */
2717 if (*s == ',') return 0;
2718 if (*s == '{' || *s == '}')
2720 if (*s != ':') return 1;
2721 /* This kludge here is for the division cmd, which is a kludge */
2722 if (index("aAdD#",s[1])) return 0;
2728 * Generate a new fixup for one of the relocs in the_ins.
2737 switch (the_ins.reloc[m].wid) {
2750 as_fatal("Don't know how to figure width of %c in md_assemble()",the_ins.reloc[m].wid);
2753 where - frag_now->fr_literal + the_ins.reloc[m].n,
2755 the_ins.reloc[m].add,
2756 the_ins.reloc[m].sub,
2757 the_ins.reloc[m].off,
2758 the_ins.reloc[m].pcrel,
2759 the_ins.reloc[m].rtype
2761 , the_ins.reloc[m].got
2765 if (the_ins.reloc[m].rtype == RELOC_GLOB_DAT
2766 && the_ins.reloc[m].add != NULL)
2767 the_ins.reloc[m].add->sy_forceout = 1;
2771 /* This is the guts of the machine-dependent assembler. STR points to a
2772 machine dependent instruction. This function is supposed to emit
2773 the frags/bytes it assembles to.
2784 int shorts_this_frag;
2787 if (current_architecture == 0) {
2788 current_architecture = (m68020
2796 } /* default current_architecture */
2798 memset((char *)(&the_ins), '\0', sizeof(the_ins)); /* JF for paranoia sake */
2802 for (n=the_ins.numargs;n;--n)
2803 if (the_ins.operands[n].error) {
2804 er=the_ins.operands[n].error;
2809 as_bad("\"%s\" -- Statement '%s' ignored",er,str);
2813 if (the_ins.nfrag == 0) { /* No frag hacking involved; just put it out */
2814 toP=frag_more(2*the_ins.numo);
2815 fromP= &the_ins.opcode[0];
2816 for (m=the_ins.numo;m;--m) {
2817 md_number_to_chars(toP,(long)(*fromP),2);
2821 /* put out symbol-dependent info */
2822 for (m = 0; m < the_ins.nrel; m++) {
2823 make_fix(m, toP-the_ins.numo*2);
2828 /* There's some frag hacking */
2829 for (n=0,fromP= &the_ins.opcode[0];n<the_ins.nfrag;n++) {
2832 if (n == 0) wid=2*the_ins.fragb[n].fragoff;
2833 else wid=2*(the_ins.numo-the_ins.fragb[n-1].fragoff);
2837 for (m=wid/2;m;--m) {
2838 md_number_to_chars(toP,(long)(*fromP),2);
2843 for (m=0;m<the_ins.nrel;m++) {
2844 if ((the_ins.reloc[m].n) >= 2*shorts_this_frag /* 2*the_ins.fragb[n].fragoff */) {
2845 the_ins.reloc[m].n-= 2*shorts_this_frag /* 2*the_ins.fragb[n].fragoff */;
2848 if (the_ins.reloc[m].wid == 0)
2850 make_fix(m, toP-the_ins.numo*2);
2851 the_ins.reloc[m].wid=0;
2853 /* know(the_ins.fragb[n].fadd); */
2854 (void)frag_var(rs_machine_dependent,10,0,(relax_substateT)(the_ins.fragb[n].fragty),
2855 the_ins.fragb[n].fadd,the_ins.fragb[n].foff,to_beg_P);
2857 n=(the_ins.numo-the_ins.fragb[n-1].fragoff);
2860 toP=frag_more(n*sizeof(short));
2862 md_number_to_chars(toP,(long)(*fromP),2);
2868 for (m=0;m<the_ins.nrel;m++) {
2869 if (the_ins.reloc[m].wid == 0)
2871 make_fix(m, toP - /* the_ins.numo */ shorts_this_frag*2);
2875 /* This function is called once, at assembler startup time. This should
2876 set up all the tables, etc that the MD part of the assembler needs
2882 * md_begin -- set up hash tables with 68000 instructions.
2883 * similar to what the vax assembler does. ---phr
2885 /* RMS claims the thing to do is take the m68k-opcode.h table, and make
2886 a copy of it at runtime, adding in the information we want but isn't
2887 there. I think it'd be better to have an awk script hack the table
2888 at compile time. Or even just xstr the table and use it as-is. But
2889 my lord ghod hath spoken, so we do it this way. Excuse the ugly var
2892 register const struct m68k_opcode *ins;
2893 register struct m68k_incant *hack,
2895 register char *retval = 0; /* empty string, or error msg text */
2896 register unsigned int i;
2899 if ((op_hash = hash_new()) == NULL)
2900 as_fatal("Virtual memory exhausted");
2902 obstack_begin(&robyn,4000);
2903 for (ins = m68k_opcodes; ins < endop; ins++) {
2904 hack=slak=(struct m68k_incant *)obstack_alloc(&robyn,sizeof(struct m68k_incant));
2906 /* we *could* ignore insns that don't match our
2907 arch here but just leaving them out of the
2909 slak->m_operands=ins->args;
2910 slak->m_opnum=strlen(slak->m_operands)/2;
2911 slak->m_arch = ins->arch;
2912 slak->m_opcode=ins->opcode;
2913 /* This is kludgey */
2914 slak->m_codenum=((ins->match)&0xffffL) ? 2 : 1;
2915 if ((ins+1) != endop && !strcmp(ins->name,(ins+1)->name)) {
2916 slak->m_next=(struct m68k_incant *) obstack_alloc(&robyn,sizeof(struct m68k_incant));
2923 retval = hash_insert (op_hash, ins->name,(char *)hack);
2924 /* Didn't his mommy tell him about null pointers? */
2925 if (retval && *retval)
2926 as_fatal("Internal Error: Can't hash %s: %s",ins->name,retval);
2929 for (i = 0; i < sizeof(mklower_table) ; i++)
2930 mklower_table[i] = (isupper(c = (char) i)) ? tolower(c) : c;
2932 for (i = 0 ; i < sizeof(notend_table) ; i++) {
2933 notend_table[i] = 0;
2934 alt_notend_table[i] = 0;
2936 notend_table[','] = 1;
2937 notend_table['{'] = 1;
2938 notend_table['}'] = 1;
2939 alt_notend_table['a'] = 1;
2940 alt_notend_table['A'] = 1;
2941 alt_notend_table['d'] = 1;
2942 alt_notend_table['D'] = 1;
2943 alt_notend_table['#'] = 1;
2944 alt_notend_table['f'] = 1;
2945 alt_notend_table['F'] = 1;
2946 #ifdef REGISTER_PREFIX
2947 alt_notend_table[REGISTER_PREFIX] = 1;
2952 #define notend(s) ((*s == ',' || *s == '}' || *s == '{' \
2953 || (*s == ':' && strchr("aAdD#", s[1]))) \
2957 /* This funciton is called once, before the assembler exits. It is
2958 supposed to do any final cleanup for this part of the assembler.
2965 /* Equal to MAX_PRECISION in atof-ieee.c */
2966 #define MAX_LITTLENUMS 6
2968 /* Turn a string in input_line_pointer into a floating point constant of type
2969 type, and store the appropriate bytes in *litP. The number of LITTLENUMS
2970 emitted is stored in *sizeP. An error message is returned, or NULL on OK.
2973 md_atof(type,litP,sizeP)
2979 LITTLENUM_TYPE words[MAX_LITTLENUMS];
2980 LITTLENUM_TYPE *wordP;
3011 return "Bad call to MD_ATOF()";
3013 t=atof_ieee(input_line_pointer,type,words);
3015 input_line_pointer=t;
3017 *sizeP=prec * sizeof(LITTLENUM_TYPE);
3018 for (wordP=words;prec--;) {
3019 md_number_to_chars(litP,(long)(*wordP++),sizeof(LITTLENUM_TYPE));
3020 litP+=sizeof(LITTLENUM_TYPE);
3022 return ""; /* Someone should teach Dean about null pointers */
3025 /* Turn an integer of n bytes (in val) into a stream of bytes appropriate
3026 for use in the a.out file, and stores them in the array pointed to by buf.
3027 This knows about the endian-ness of the target machine and does
3028 THE RIGHT THING, whatever it is. Possible values for n are 1 (byte)
3029 2 (short) and 4 (long) Floating numbers are put out as a series of
3030 LITTLENUMS (shorts, here at least)
3033 md_number_to_chars(buf, val, n)
3053 as_fatal("failed sanity check.");
3058 md_apply_fix(fixP, val)
3062 char *buf = fixP->fx_where + fixP->fx_frag->fr_literal;
3064 switch (fixP->fx_size) {
3069 *buf++ = (val >> 8);
3073 *buf++ = (val >> 24);
3074 *buf++ = (val >> 16);
3075 *buf++ = (val >> 8);
3079 BAD_CASE (fixP->fx_size);
3084 /* *fragP has been relaxed to its final size, and now needs to have
3085 the bytes inside it modified to conform to the new size There is UGLY
3089 md_convert_frag(headers, fragP)
3090 object_headers *headers;
3091 register fragS *fragP;
3096 /* Address in object code of the displacement. */
3097 register int object_address = fragP->fr_fix + fragP->fr_address;
3099 #ifdef IBM_COMPILER_SUX
3100 /* This is wrong but it convinces the native rs6000 compiler to
3101 generate the code we want. */
3102 register char *buffer_address = fragP->fr_literal;
3103 buffer_address += fragP->fr_fix;
3104 #else /* IBM_COMPILER_SUX */
3105 /* Address in gas core of the place to store the displacement. */
3106 register char *buffer_address = fragP->fr_fix + fragP->fr_literal;
3107 #endif /* IBM_COMPILER_SUX */
3109 /* No longer true: know(fragP->fr_symbol); */
3111 /* The displacement of the address, from current location. */
3112 disp = fragP->fr_symbol ? S_GET_VALUE(fragP->fr_symbol) : 0;
3113 disp = (disp + fragP->fr_offset) - object_address;
3115 switch (fragP->fr_subtype) {
3116 case TAB(BCC68000,BYTE):
3117 case TAB(BRANCH,BYTE):
3118 know(issbyte(disp));
3120 as_bad("short branch with zero offset: use :w");
3121 fragP->fr_opcode[1]=disp;
3124 case TAB(DBCC,SHORT):
3125 know(issword(disp));
3128 case TAB(BCC68000,SHORT):
3129 case TAB(BRANCH,SHORT):
3130 know(issword(disp));
3131 fragP->fr_opcode[1]=0x00;
3134 case TAB(BRANCH,LONG):
3135 if (cpu_of_arch(current_architecture) < m68020) {
3136 if (fragP->fr_opcode[0] == 0x61) {
3137 fragP->fr_opcode[0]= 0x4E;
3138 fragP->fr_opcode[1]= 0xB9; /* JBSR with ABSL LONG offset */
3139 subseg_change(SEG_TEXT, 0);
3152 } else if (fragP->fr_opcode[0] == 0x60) {
3153 fragP->fr_opcode[0]= 0x4E;
3154 fragP->fr_opcode[1]= 0xF9; /* JMP with ABSL LONG offset */
3155 subseg_change(SEG_TEXT, 0);
3156 fix_new(fragP, fragP->fr_fix, 4, fragP->fr_symbol, 0, fragP->fr_offset,0,
3161 as_bad("Long branch offset not supported.");
3164 fragP->fr_opcode[1]=0xff;
3168 case TAB(BCC68000,LONG):
3169 /* only Bcc 68000 instructions can come here */
3170 /* change bcc into b!cc/jmp absl long */
3171 fragP->fr_opcode[0] ^= 0x01; /* invert bcc */
3172 fragP->fr_opcode[1] = 0x6; /* branch offset = 6 */
3174 /* JF: these used to be fr_opcode[2,3], but they may be in a
3175 different frag, in which case refering to them is a no-no.
3176 Only fr_opcode[0,1] are guaranteed to work. */
3177 *buffer_address++ = 0x4e; /* put in jmp long (0x4ef9) */
3178 *buffer_address++ = 0xf9;
3179 fragP->fr_fix += 2; /* account for jmp instruction */
3180 subseg_change(SEG_TEXT,0);
3181 fix_new(fragP, fragP->fr_fix, 4, fragP->fr_symbol, 0,
3187 case TAB(DBCC,LONG):
3188 /* only DBcc 68000 instructions can come here */
3189 /* change dbcc into dbcc/jmp absl long */
3190 /* JF: these used to be fr_opcode[2-7], but that's wrong */
3191 *buffer_address++ = 0x00; /* branch offset = 4 */
3192 *buffer_address++ = 0x04;
3193 *buffer_address++ = 0x60; /* put in bra pc+6 */
3194 *buffer_address++ = 0x06;
3195 *buffer_address++ = 0x4e; /* put in jmp long (0x4ef9) */
3196 *buffer_address++ = 0xf9;
3198 fragP->fr_fix += 6; /* account for bra/jmp instructions */
3199 subseg_change(SEG_TEXT,0);
3200 fix_new(fragP, fragP->fr_fix, 4, fragP->fr_symbol, 0,
3206 case TAB(FBRANCH,SHORT):
3207 know((fragP->fr_opcode[1]&0x40) == 0);
3210 case TAB(FBRANCH,LONG):
3211 fragP->fr_opcode[1]|=0x40; /* Turn on LONG bit */
3214 case TAB(PCREL,SHORT):
3217 case TAB(PCREL,LONG):
3218 /* The thing to do here is force it to ABSOLUTE LONG, since
3219 PCREL is really trying to shorten an ABSOLUTE address anyway */
3220 /* JF FOO This code has not been tested */
3221 subseg_change(SEG_TEXT,0);
3222 fix_new(fragP, fragP->fr_fix, 4, fragP->fr_symbol, 0, fragP->fr_offset, 0, FIX_NO_RELOC);
3223 if ((fragP->fr_opcode[1] & 0x3F) != 0x3A)
3224 as_bad("Internal error (long PC-relative operand) for insn 0x%04lx at 0x%lx",
3225 fragP->fr_opcode[0],fragP->fr_address);
3226 fragP->fr_opcode[1]&= ~0x3F;
3227 fragP->fr_opcode[1]|=0x39; /* Mode 7.1 */
3229 /* md_number_to_chars(buffer_address,
3230 (long)(fragP->fr_symbol->sy_value + fragP->fr_offset),
3234 case TAB(PCLEA,SHORT):
3235 subseg_change(SEG_TEXT,0);
3236 fix_new(fragP, (int) (fragP->fr_fix), 2, fragP->fr_symbol, (symbolS *) 0, fragP->fr_offset, 1, FIX_NO_RELOC);
3237 fragP->fr_opcode[1] &= ~0x3F;
3238 fragP->fr_opcode[1] |= 0x3A;
3241 case TAB(PCLEA,LONG):
3242 subseg_change(SEG_TEXT,0);
3243 fix_new(fragP, (int) (fragP->fr_fix) + 2, 4, fragP->fr_symbol, (symbolS *) 0, fragP->fr_offset + 2, 1, FIX_NO_RELOC);
3244 *buffer_address++ = 0x01;
3245 *buffer_address++ = 0x70;
3247 /* buffer_address+=2; */
3251 } /* switch on subtype */
3254 md_number_to_chars(buffer_address, (long) disp, (int) ext);
3255 fragP->fr_fix += ext;
3256 /* H_SET_TEXT_SIZE(headers, H_GET_TEXT_SIZE(headers) + ext); */
3257 } /* if extending */
3260 } /* md_convert_frag() */
3262 /* Force truly undefined symbols to their maximum size, and generally set up
3263 the frag list to be relaxed
3265 int md_estimate_size_before_relax(fragP, segment)
3266 register fragS *fragP;
3270 register char *buffer_address = fragP->fr_fix + fragP->fr_literal;
3272 old_fix = fragP->fr_fix;
3274 /* handle SZ_UNDEF first, it can be changed to BYTE or SHORT */
3275 switch (fragP->fr_subtype) {
3277 case TAB(BRANCH,SZ_UNDEF): {
3278 if ((fragP->fr_symbol != NULL) /* Not absolute */
3279 && S_GET_SEGMENT(fragP->fr_symbol) == segment) {
3280 fragP->fr_subtype = TAB(TABTYPE(fragP->fr_subtype), BYTE);
3282 } else if ((fragP->fr_symbol == 0) || (cpu_of_arch(current_architecture) < m68020)) {
3283 /* On 68000, or for absolute value, switch to abs long */
3284 /* FIXME, we should check abs val, pick short or long */
3285 if (fragP->fr_opcode[0] == 0x61) {
3286 fragP->fr_opcode[0]= 0x4E;
3287 fragP->fr_opcode[1]= 0xB9; /* JSR with ABSL LONG offset */
3288 subseg_change(SEG_TEXT, 0);
3289 fix_new(fragP, fragP->fr_fix, 4,
3290 fragP->fr_symbol, 0, fragP->fr_offset, 0, FIX_NO_RELOC);
3293 } else if (fragP->fr_opcode[0] == 0x60) {
3294 fragP->fr_opcode[0]= 0x4E;
3295 fragP->fr_opcode[1]= 0xF9; /* JMP with ABSL LONG offset */
3296 subseg_change(SEG_TEXT, 0);
3297 fix_new(fragP, fragP->fr_fix, 4,
3298 fragP->fr_symbol, 0, fragP->fr_offset, 0, FIX_NO_RELOC);
3302 as_warn("Long branch offset to extern symbol not supported.");
3304 } else if (flagseen['l']) { /* Symbol is still undefined. Make it simple */
3305 fix_new(fragP, (int) (fragP->fr_fix), 2, fragP->fr_symbol,
3306 (symbolS *) 0, fragP->fr_offset, 1, FIX_NO_RELOC);
3308 fragP->fr_opcode[1] = 0x00;
3311 fix_new(fragP, (int) (fragP->fr_fix), 4, fragP->fr_symbol,
3312 (symbolS *) 0, fragP->fr_offset, 1,
3314 /* With -k, make all external branches go via the jump table. */
3315 (picmode? RELOC_JMP_TBL: NO_RELOC), NULL
3321 fragP->fr_opcode[1] = 0xff;
3327 } /* case TAB(BRANCH,SZ_UNDEF) */
3329 case TAB(FBRANCH,SZ_UNDEF): {
3330 if (S_GET_SEGMENT(fragP->fr_symbol) == segment || flagseen['l']) {
3331 fragP->fr_subtype = TAB(FBRANCH,SHORT);
3334 fragP->fr_subtype = TAB(FBRANCH,LONG);
3338 } /* TAB(FBRANCH,SZ_UNDEF) */
3340 case TAB(PCREL,SZ_UNDEF): {
3341 if (S_GET_SEGMENT(fragP->fr_symbol) == segment || flagseen['l']) {
3342 fragP->fr_subtype = TAB(PCREL,SHORT);
3345 fragP->fr_subtype = TAB(PCREL,LONG);
3349 } /* TAB(PCREL,SZ_UNDEF) */
3351 case TAB(BCC68000,SZ_UNDEF): {
3352 if ((fragP->fr_symbol != NULL)
3353 && S_GET_SEGMENT(fragP->fr_symbol) == segment) {
3354 fragP->fr_subtype=TAB(BCC68000,BYTE);
3357 /* only Bcc 68000 instructions can come here */
3358 /* change bcc into b!cc/jmp absl long */
3359 fragP->fr_opcode[0] ^= 0x01; /* invert bcc */
3360 if (flagseen['l']) {
3361 fragP->fr_opcode[1] = 0x04; /* branch offset = 6 */
3362 /* JF: these were fr_opcode[2,3] */
3363 buffer_address[0] = 0x4e; /* put in jmp long (0x4ef9) */
3364 buffer_address[1] = 0xf8;
3365 fragP->fr_fix += 2; /* account for jmp instruction */
3366 subseg_change(SEG_TEXT,0);
3367 fix_new(fragP, fragP->fr_fix, 2, fragP->fr_symbol, 0,
3368 fragP->fr_offset, 0, FIX_NO_RELOC);
3371 fragP->fr_opcode[1] = 0x06; /* branch offset = 6 */
3372 /* JF: these were fr_opcode[2,3] */
3373 buffer_address[2] = 0x4e; /* put in jmp long (0x4ef9) */
3374 buffer_address[3] = 0xf9;
3375 fragP->fr_fix += 2; /* account for jmp instruction */
3376 subseg_change(SEG_TEXT,0);
3377 fix_new(fragP, fragP->fr_fix, 4, fragP->fr_symbol, 0,
3378 fragP->fr_offset, 0, FIX_NO_RELOC);
3383 } /* case TAB(BCC68000,SZ_UNDEF) */
3385 case TAB(DBCC,SZ_UNDEF): {
3386 if (fragP->fr_symbol != NULL && S_GET_SEGMENT(fragP->fr_symbol) == segment) {
3387 fragP->fr_subtype=TAB(DBCC,SHORT);
3391 /* only DBcc 68000 instructions can come here */
3392 /* change dbcc into dbcc/jmp absl long */
3393 /* JF: these used to be fr_opcode[2-4], which is wrong. */
3394 buffer_address[0] = 0x00; /* branch offset = 4 */
3395 buffer_address[1] = 0x04;
3396 buffer_address[2] = 0x60; /* put in bra pc + ... */
3398 if (flagseen['l']) {
3399 /* JF: these were fr_opcode[5-7] */
3400 buffer_address[3] = 0x04; /* plus 4 */
3401 buffer_address[4] = 0x4e;/* Put in Jump Word */
3402 buffer_address[5] = 0xf8;
3403 fragP->fr_fix += 6; /* account for bra/jmp instruction */
3404 subseg_change(SEG_TEXT,0);
3405 fix_new(fragP, fragP->fr_fix, 2, fragP->fr_symbol, 0,
3406 fragP->fr_offset, 0, FIX_NO_RELOC);
3409 /* JF: these were fr_opcode[5-7] */
3410 buffer_address[3] = 0x06; /* Plus 6 */
3411 buffer_address[4] = 0x4e; /* put in jmp long (0x4ef9) */
3412 buffer_address[5] = 0xf9;
3413 fragP->fr_fix += 6; /* account for bra/jmp instruction */
3414 subseg_change(SEG_TEXT,0);
3415 fix_new(fragP, fragP->fr_fix, 4, fragP->fr_symbol, 0,
3416 fragP->fr_offset, 0, FIX_NO_RELOC);
3422 } /* case TAB(DBCC,SZ_UNDEF) */
3424 case TAB(PCLEA,SZ_UNDEF): {
3425 if ((S_GET_SEGMENT(fragP->fr_symbol)) == segment || flagseen['l']) {
3426 fragP->fr_subtype=TAB(PCLEA,SHORT);
3429 fragP->fr_subtype=TAB(PCLEA,LONG);
3433 } /* TAB(PCLEA,SZ_UNDEF) */
3438 } /* switch on subtype looking for SZ_UNDEF's. */
3440 /* now that SZ_UNDEF are taken care of, check others */
3441 switch (fragP->fr_subtype) {
3442 case TAB(BCC68000,BYTE):
3443 case TAB(BRANCH,BYTE):
3444 /* We can't do a short jump to the next instruction,
3445 so we force word mode. */
3446 if (fragP->fr_symbol && S_GET_VALUE(fragP->fr_symbol) == 0 &&
3447 fragP->fr_symbol->sy_frag == fragP->fr_next) {
3448 fragP->fr_subtype=TAB(TABTYPE(fragP->fr_subtype),SHORT);
3455 return fragP->fr_var + fragP->fr_fix - old_fix;
3458 #if defined(OBJ_AOUT) | defined(OBJ_BOUT)
3459 /* the bit-field entries in the relocation_info struct plays hell
3460 with the byte-order problems of cross-assembly. So as a hack,
3461 I added this mach. dependent ri twiddler. Ugly, but it gets
3463 /* on m68k: first 4 bytes are normal unsigned long, next three bytes
3464 are symbolnum, most sig. byte first. Last byte is broken up with
3465 bit 7 as pcrel, bits 6 & 5 as length, bit 4 as pcrel, and the lower
3466 nibble as nuthin. (on Sun 3 at least) */
3467 /* Translate the internal relocation information into target-specific
3471 md_ri_to_chars(the_bytes, ri)
3473 struct reloc_info_generic *ri;
3476 md_number_to_chars(the_bytes, ri->r_address, 4);
3477 /* now the fun stuff */
3478 the_bytes[4] = (ri->r_symbolnum >> 16) & 0x0ff;
3479 the_bytes[5] = (ri->r_symbolnum >> 8) & 0x0ff;
3480 the_bytes[6] = ri->r_symbolnum & 0x0ff;
3481 the_bytes[7] = (((ri->r_pcrel << 7) & 0x80) | ((ri->r_length << 5) & 0x60) |
3482 ((ri->r_extern << 4) & 0x10));
3484 #endif /* comment */
3486 void tc_aout_fix_to_chars(where, fixP, segment_address_in_file)
3489 relax_addressT segment_address_in_file;
3492 * In: length of relocation (or of address) in chars: 1, 2 or 4.
3493 * Out: GNU LD relocation length code: 0, 1, or 2.
3496 static unsigned char nbytes_r_length[] = { 42, 0, 1, 42, 2 };
3500 know(fixP->fx_addsy != NULL);
3502 md_number_to_chars(where,
3503 fixP->fx_frag->fr_address + fixP->fx_where - segment_address_in_file,
3506 r_symbolnum = (S_IS_DEFINED(fixP->fx_addsy)
3507 ? S_GET_TYPE(fixP->fx_addsy)
3508 : fixP->fx_addsy->sy_number);
3509 r_flags = (fixP->fx_pcrel? 0x80: 0)
3510 | ((nbytes_r_length[fixP->fx_size] & 3) << 5)
3511 | (!S_IS_DEFINED(fixP->fx_addsy)? 0x10: 0);
3514 switch (fixP->fx_r_type) {
3518 if (picmode && S_IS_EXTERNAL(fixP->fx_addsy)) {
3519 r_symbolnum = fixP->fx_addsy->sy_number;
3520 r_flags |= 0x10; /* set extern bit */
3523 case RELOC_GLOB_DAT:
3524 r_flags |= 8; /* set baserel bit */
3525 r_symbolnum = fixP->fx_addsy->sy_number;
3526 if (S_IS_EXTERNAL(fixP->fx_addsy))
3530 r_flags |= 4; /* set jmptable bit */
3532 case RELOC_RELATIVE:
3533 /* should never happen */
3534 r_flags |= 2; /* set relative bit */
3539 where[4] = (r_symbolnum >> 16) & 0x0ff;
3540 where[5] = (r_symbolnum >> 8) & 0x0ff;
3541 where[6] = r_symbolnum & 0x0ff;
3545 } /* tc_aout_fix_to_chars() */
3547 #endif /* OBJ_AOUT or OBJ_BOUT */
3549 #ifndef WORKING_DOT_WORD
3550 const int md_short_jump_size = 4;
3551 const int md_long_jump_size = 6;
3554 md_create_short_jump(ptr,from_addr,to_addr,frag,to_symbol)
3563 offset = to_addr - (from_addr+2);
3565 md_number_to_chars(ptr ,(long)0x6000,2);
3566 md_number_to_chars(ptr+2,(long)offset,2);
3570 md_create_long_jump(ptr,from_addr,to_addr,frag,to_symbol)
3579 if (cpu_of_arch(current_architecture) < m68020) {
3580 offset=to_addr-S_GET_VALUE(to_symbol);
3581 md_number_to_chars(ptr ,(long)0x4EF9,2);
3582 md_number_to_chars(ptr+2,(long)offset,4);
3583 fix_new(frag,(ptr+2)-frag->fr_literal,4,to_symbol,(symbolS *)0,(long)0,0,
3586 offset=to_addr - (from_addr+2);
3587 md_number_to_chars(ptr ,(long)0x60ff,2);
3588 md_number_to_chars(ptr+2,(long)offset,4);
3593 /* Different values of OK tell what its OK to return. Things that aren't OK are an error (what a shock, no?)
3596 10: Absolute 1:8 only
3597 20: Absolute 0:7 only
3598 30: absolute 0:15 only
3599 40: Absolute 0:31 only
3600 50: absolute 0:127 only
3601 55: absolute -64:63 only
3602 60: absolute -128:127 only
3603 70: absolute 0:4095 only
3608 static int get_num(exp,ok)
3609 struct m68k_exp *exp;
3617 if (*exp->e_beg == '0') {
3618 if (exp->e_beg[1] == 'x')
3619 sscanf(exp->e_beg+2,"%x",&l);
3621 sscanf(exp->e_beg+1,"%O",&l);
3624 return atol(exp->e_beg);
3630 /* Can't do anything */
3633 if (!exp->e_beg || !exp->e_end) {
3634 seg(exp)=SEG_ABSOLUTE;
3637 offs(exp)= (ok == 10) ? 1 : 0;
3638 as_warn("Null expression defaults to %ld",offs(exp));
3643 if (/* ok != 80 && */exp->e_end[-1] == ':' && (exp->e_end-exp->e_beg) >= 2) {
3644 switch (exp->e_end[0]) {
3660 as_bad("Unknown size for expression \"%c\"",exp->e_end[0]);
3664 c_save=exp->e_end[1];
3666 save_in=input_line_pointer;
3667 input_line_pointer=exp->e_beg;
3668 switch (expression(&(exp->e_exp))) {
3670 seg(exp)=SEG_ABSOLUTE;
3673 offs(exp)= (ok == 10) ? 1 : 0;
3674 as_warn("Unknown expression: '%s' defaulting to %d",exp->e_beg,offs(exp));
3678 /* Do the same thing the VAX asm does */
3679 seg(exp)=SEG_ABSOLUTE;
3684 as_warn("expression out of range: defaulting to 1");
3691 if (offs(exp)<1 || offs(exp)>8) {
3692 as_warn("expression out of range: defaulting to 1");
3697 if (offs(exp)<0 || offs(exp)>7)
3701 if (offs(exp)<0 || offs(exp)>15)
3705 if (offs(exp)<0 || offs(exp)>32)
3709 if (offs(exp)<0 || offs(exp)>127)
3713 if (offs(exp)<-64 || offs(exp)>63)
3717 if (offs(exp)<-128 || offs(exp)>127)
3721 if (offs(exp)<0 || offs(exp)>4095) {
3723 as_warn("expression out of range: defaulting to 0");
3735 case SEG_DIFFERENCE:
3736 if (ok >= 10 && ok <= 70) {
3737 seg(exp)=SEG_ABSOLUTE;
3740 offs(exp)= (ok == 10) ? 1 : 0;
3741 as_warn("Can't deal with expression \"%s\": defaulting to %ld",exp->e_beg,offs(exp));
3745 if (ok == 80 && offs(exp)<0) { /* HACK! Turn it into a long */
3746 LITTLENUM_TYPE words[6];
3748 gen_to_words(words,2,8L);/* These numbers are magic! */
3749 seg(exp)=SEG_ABSOLUTE;
3752 offs(exp)=words[1]|(words[0]<<16);
3753 } else if (ok != 0) {
3754 seg(exp)=SEG_ABSOLUTE;
3757 offs(exp)= (ok == 10) ? 1 : 0;
3758 as_warn("Can't deal with expression \"%s\": defaulting to %ld",exp->e_beg,offs(exp));
3762 as_fatal("failed sanity check.");
3764 if (input_line_pointer != exp->e_end+1)
3765 as_bad("Ignoring junk after expression");
3766 exp->e_end[1]=c_save;
3767 input_line_pointer=save_in;
3769 switch (exp->e_siz) {
3771 if (!isbyte(offs(exp)))
3772 as_warn("expression doesn't fit in BYTE");
3775 if (!isword(offs(exp)))
3776 as_warn("expression doesn't fit in WORD");
3784 /* These are the back-ends for the various machine dependent pseudo-ops. */
3785 void demand_empty_rest_of_line(); /* Hate those extra verbose names */
3787 static void s_data1() {
3788 subseg_new(SEG_DATA,1);
3789 demand_empty_rest_of_line();
3792 static void s_data2() {
3793 subseg_new(SEG_DATA,2);
3794 demand_empty_rest_of_line();
3797 static void s_bss() {
3798 /* We don't support putting frags in the BSS segment, but we
3799 can put them into initialized data for now... */
3800 subseg_new(SEG_DATA,255); /* FIXME-SOON */
3801 demand_empty_rest_of_line();
3804 static void s_even() {
3806 register long temp_fill;
3808 temp = 1; /* JF should be 2? */
3809 temp_fill = get_absolute_expression ();
3810 if ( ! need_pass_2 ) /* Never make frag if expect extra pass. */
3811 frag_align (temp, (int)temp_fill);
3812 demand_empty_rest_of_line();
3815 static void s_proc() {
3816 demand_empty_rest_of_line();
3819 /* s_space is defined in read.c .skip is simply an alias to it. */
3823 * Invocation line includes a switch not recognized by the base assembler.
3824 * See if it's a processor-specific option. These are:
3826 * -[A]m[c]68000, -[A]m[c]68008, -[A]m[c]68010, -[A]m[c]68020, -[A]m[c]68030, -[A]m[c]68040
3827 * -[A]m[c]68881, -[A]m[c]68882, -[A]m[c]68851
3828 * Select the architecture. Instructions or features not
3829 * supported by the selected architecture cause fatal
3830 * errors. More than one may be specified. The default is
3831 * -m68020 -m68851 -m68881. Note that -m68008 is a synonym
3832 * for -m68000, and -m68882 is a synonym for -m68881.
3834 * MAYBE_FLOAT_TOO is defined below so that specifying a processor type
3835 * (e.g. m68020) also requests that float instructions be included. This
3836 * is the default setup, mostly to avoid hassling users. A better
3837 * rearrangement of this structure would be to add an option to DENY
3838 * floating point opcodes, for people who want to really know there's none
3839 * of that funny floaty stuff going on. FIXME-later.
3841 #ifndef MAYBE_FLOAT_TOO
3842 #define MAYBE_FLOAT_TOO m68881
3845 int md_parse_option(argP,cntP,vecP)
3851 case 'l': /* -l means keep external to 2 bit offset
3852 rather than 16 bit one */
3855 case 'S': /* -S means that jbsr's always turn into jsr's. */
3860 /* intentional fall-through */
3864 if (**argP == 'c') {
3866 } /* allow an optional "c" */
3868 if (!strcmp(*argP, "68000")
3869 || !strcmp(*argP, "68008")) {
3870 current_architecture |= m68000;
3871 } else if (!strcmp(*argP, "68010")) {
3873 omagic= 1<<16|OMAGIC;
3875 current_architecture |= m68010;
3877 } else if (!strcmp(*argP, "68020")) {
3878 current_architecture |= m68020 | MAYBE_FLOAT_TOO;
3880 } else if (!strcmp(*argP, "68030")) {
3881 current_architecture |= m68030 | MAYBE_FLOAT_TOO;
3883 } else if (!strcmp(*argP, "68040")) {
3884 current_architecture |= m68040 | MAYBE_FLOAT_TOO;
3886 } else if (!strcmp(*argP, "68060")) {
3887 current_architecture |= m68040 | MAYBE_FLOAT_TOO;
3890 } else if (!strcmp(*argP, "68881")) {
3891 current_architecture |= m68881;
3893 } else if (!strcmp(*argP, "68882")) {
3894 current_architecture |= m68882;
3896 #endif /* NO_68881 */
3898 } else if (!strcmp(*argP,"68851")) {
3899 current_architecture |= m68851;
3901 #endif /* NO_68851 */
3903 as_warn("Unknown architecture, \"%s\". option ignored", *argP);
3904 } /* switch on architecture */
3906 while (**argP) (*argP)++;
3911 if (!strcmp(*argP,"pic")) {
3913 break; /* -pic, Position Independent Code */
3921 /* Predefine GOT symbol */
3922 GOT_symbol = symbol_find_or_make("__GLOBAL_OFFSET_TABLE_");
3935 /* TEST2: Test md_assemble() */
3936 /* Warning, this routine probably doesn't work anymore */
3940 struct m68k_it the_ins;
3947 if (!gets(buf) || !*buf)
3949 if (buf[0] == '|' || buf[1] == '.')
3951 for (cp=buf;*cp;cp++)
3956 memset(&the_ins, '\0', sizeof(the_ins));
3957 m68k_ip(&the_ins,buf);
3958 if (the_ins.error) {
3959 printf("Error %s in %s\n",the_ins.error,buf);
3961 printf("Opcode(%d.%s): ",the_ins.numo,the_ins.args);
3962 for (n=0;n<the_ins.numo;n++)
3963 printf(" 0x%x",the_ins.opcode[n]&0xffff);
3965 print_the_insn(&the_ins.opcode[0],stdout);
3966 (void)putchar('\n');
3968 for (n=0;n<strlen(the_ins.args)/2;n++) {
3969 if (the_ins.operands[n].error) {
3970 printf("op%d Error %s in %s\n",n,the_ins.operands[n].error,buf);
3973 printf("mode %d, reg %d, ",the_ins.operands[n].mode,the_ins.operands[n].reg);
3974 if (the_ins.operands[n].b_const)
3975 printf("Constant: '%.*s', ",1+the_ins.operands[n].e_const-the_ins.operands[n].b_const,the_ins.operands[n].b_const);
3976 printf("ireg %d, isiz %d, imul %d, ",the_ins.operands[n].ireg,the_ins.operands[n].isiz,the_ins.operands[n].imul);
3977 if (the_ins.operands[n].b_iadd)
3978 printf("Iadd: '%.*s',",1+the_ins.operands[n].e_iadd-the_ins.operands[n].b_iadd,the_ins.operands[n].b_iadd);
3979 (void)putchar('\n');
3991 while (*str && *str != ' ')
3993 if (str[-1] == ':' || str[1] == '=')
4000 /* Possible states for relaxation:
4002 0 0 branch offset byte (bra, etc)
4006 1 0 indexed offsets byte a0@(32,d4:w:1) etc
4010 2 0 two-offset index word-word a0@(32,d4)@(45) etc
4029 extern fragS *text_frag_root;
4031 for (fragP=text_frag_root;fragP;fragP=fragP->fr_next) {
4032 printf("addr %lu next 0x%x fix %ld var %ld symbol 0x%x offset %ld\n",
4033 fragP->fr_address,fragP->fr_next,fragP->fr_fix,fragP->fr_var,fragP->fr_symbol,fragP->fr_offset);
4034 printf("opcode 0x%x type %d subtype %d\n\n",fragP->fr_opcode,fragP->fr_type,fragP->fr_subtype);
4042 /* We have no need to default values of symbols. */
4046 md_undefined_symbol (name)
4052 /* Parse an operand that is machine-specific.
4053 We just return without modifying the expression if we have nothing
4058 md_operand (expressionP)
4059 expressionS *expressionP;
4063 /* Round up a section size to the appropriate boundary. */
4065 md_section_align (segment, size)
4069 return size; /* Byte alignment is fine */
4072 /* Exactly what point is a PC-relative offset relative TO?
4073 On the 68k, they're relative to the address of the offset. */
4075 md_pcrel_from (fixP)
4078 return(fixP->fx_where + fixP->fx_frag->fr_address);
4088 /* end of tc-m68k.c */