2 * Device driver optimized for the Symbios/LSI 53C896/53C895A/53C1010
3 * PCI-SCSI controllers.
5 * Copyright (C) 1999-2001 Gerard Roudier <groudier@free.fr>
7 * This driver also supports the following Symbios/LSI PCI-SCSI chips:
8 * 53C810A, 53C825A, 53C860, 53C875, 53C876, 53C885, 53C895,
9 * 53C810, 53C815, 53C825 and the 53C1510D is 53C8XX mode.
12 * This driver for FreeBSD-CAM is derived from the Linux sym53c8xx driver.
13 * Copyright (C) 1998-1999 Gerard Roudier
15 * The sym53c8xx driver is derived from the ncr53c8xx driver that had been
16 * a port of the FreeBSD ncr driver to Linux-1.2.13.
18 * The original ncr driver has been written for 386bsd and FreeBSD by
19 * Wolfgang Stanglmeier <wolf@cologne.de>
20 * Stefan Esser <se@mi.Uni-Koeln.de>
21 * Copyright (C) 1994 Wolfgang Stanglmeier
23 * The initialisation code, and part of the code that addresses
24 * FreeBSD-CAM services is based on the aic7xxx driver for FreeBSD-CAM
25 * written by Justin T. Gibbs.
27 * Other major contributions:
29 * NVRAM detection and reading.
30 * Copyright (C) 1997 Richard Waltham <dormouse@farsrobt.demon.co.uk>
32 *-----------------------------------------------------------------------------
34 * Redistribution and use in source and binary forms, with or without
35 * modification, are permitted provided that the following conditions
37 * 1. Redistributions of source code must retain the above copyright
38 * notice, this list of conditions and the following disclaimer.
39 * 2. Redistributions in binary form must reproduce the above copyright
40 * notice, this list of conditions and the following disclaimer in the
41 * documentation and/or other materials provided with the distribution.
42 * 3. The name of the author may not be used to endorse or promote products
43 * derived from this software without specific prior written permission.
45 * THIS SOFTWARE IS PROVIDED BY THE AUTHORS AND CONTRIBUTORS ``AS IS'' AND
46 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
47 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
48 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
49 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
50 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
51 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
52 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
53 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
54 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
58 /* $FreeBSD: src/sys/dev/sym/sym_hipd.c,v 1.6.2.12 2001/12/02 19:01:10 groudier Exp $ */
60 #define SYM_DRIVER_NAME "sym-1.6.5-20000902"
62 /* #define SYM_DEBUG_GENERIC_SUPPORT */
63 /* #define CAM_NEW_TRAN_CODE */
66 #include <sys/param.h>
69 * Only use the BUS stuff for PCI under FreeBSD 4 and later versions.
70 * Note that the old BUS stuff also works for FreeBSD 4 and spares
71 * about 1 KB for the driver object file.
73 #if __FreeBSD_version >= 400000
74 #define FreeBSD_Bus_Dma_Abstraction
75 #define FreeBSD_Bus_Io_Abstraction
76 #define FreeBSD_Bus_Space_Abstraction
80 * Driver configuration options.
83 #include <dev/sym/sym_conf.h>
85 #ifndef FreeBSD_Bus_Io_Abstraction
86 #include "ncr.h" /* To know if the ncr has been configured */
89 #include <sys/systm.h>
90 #include <sys/malloc.h>
91 #include <sys/kernel.h>
92 #ifdef FreeBSD_Bus_Io_Abstraction
93 #include <sys/module.h>
99 #include <pci/pcireg.h>
100 #include <pci/pcivar.h>
102 #ifdef FreeBSD_Bus_Space_Abstraction
103 #include <machine/bus_memio.h>
105 * Only include bus_pio if needed.
106 * This avoids bus space primitives to be uselessly bloated
107 * by out-of-age PIO operations.
109 #ifdef SYM_CONF_IOMAPPED
110 #include <machine/bus_pio.h>
113 #include <machine/bus.h>
115 #ifdef FreeBSD_Bus_Io_Abstraction
116 #include <machine/resource.h>
117 #include <sys/rman.h>
119 #include <machine/clock.h>
122 #include <cam/cam_ccb.h>
123 #include <cam/cam_sim.h>
124 #include <cam/cam_xpt_sim.h>
125 #include <cam/cam_debug.h>
127 #include <cam/scsi/scsi_all.h>
128 #include <cam/scsi/scsi_message.h>
131 #include <vm/vm_param.h>
134 /* Short and quite clear integer types */
139 typedef u_int16_t u16;
140 typedef u_int32_t u32;
143 * From 'cam.error_recovery_diffs.20010313.context' patch.
145 #ifdef CAM_NEW_TRAN_CODE
146 #define FreeBSD_New_Tran_Settings
147 #endif /* CAM_NEW_TRAN_CODE */
150 * Driver definitions.
152 #include <dev/sym/sym_defs.h>
153 #include <dev/sym/sym_fw.h>
156 * IA32 architecture does not reorder STORES and prevents
157 * LOADS from passing STORES. It is called `program order'
158 * by Intel and allows device drivers to deal with memory
159 * ordering by only ensuring that the code is not reordered
160 * by the compiler when ordering is required.
161 * Other architectures implement a weaker ordering that
162 * requires memory barriers (and also IO barriers when they
163 * make sense) to be used.
167 #define MEMORY_BARRIER() do { ; } while(0)
168 #elif defined __alpha__
169 #define MEMORY_BARRIER() alpha_mb()
170 #elif defined __powerpc__
171 #define MEMORY_BARRIER() __asm__ volatile("eieio; sync" : : : "memory")
172 #elif defined __ia64__
173 #define MEMORY_BARRIER() __asm__ volatile("mf.a; mf" : : : "memory")
174 #elif defined __sparc64__
175 #define MEMORY_BARRIER() __asm__ volatile("membar #Sync" : : : "memory")
177 #error "Not supported platform"
181 * Portable but silly implemented byte order primitives.
182 * We define the primitives we need, since FreeBSD doesn't
183 * seem to have them yet.
185 #if BYTE_ORDER == BIG_ENDIAN
187 #define __revb16(x) ( (((u16)(x) & (u16)0x00ffU) << 8) | \
188 (((u16)(x) & (u16)0xff00U) >> 8) )
189 #define __revb32(x) ( (((u32)(x) & 0x000000ffU) << 24) | \
190 (((u32)(x) & 0x0000ff00U) << 8) | \
191 (((u32)(x) & 0x00ff0000U) >> 8) | \
192 (((u32)(x) & 0xff000000U) >> 24) )
194 #define __htole16(v) __revb16(v)
195 #define __htole32(v) __revb32(v)
196 #define __le16toh(v) __htole16(v)
197 #define __le32toh(v) __htole32(v)
199 static __inline u16 _htole16(u16 v) { return __htole16(v); }
200 static __inline u32 _htole32(u32 v) { return __htole32(v); }
201 #define _le16toh _htole16
202 #define _le32toh _htole32
204 #else /* LITTLE ENDIAN */
206 #define __htole16(v) (v)
207 #define __htole32(v) (v)
208 #define __le16toh(v) (v)
209 #define __le32toh(v) (v)
211 #define _htole16(v) (v)
212 #define _htole32(v) (v)
213 #define _le16toh(v) (v)
214 #define _le32toh(v) (v)
216 #endif /* BYTE_ORDER */
219 * A la VMS/CAM-3 queue management.
222 typedef struct sym_quehead {
223 struct sym_quehead *flink; /* Forward pointer */
224 struct sym_quehead *blink; /* Backward pointer */
227 #define sym_que_init(ptr) do { \
228 (ptr)->flink = (ptr); (ptr)->blink = (ptr); \
231 static __inline struct sym_quehead *sym_que_first(struct sym_quehead *head)
233 return (head->flink == head) ? 0 : head->flink;
236 static __inline struct sym_quehead *sym_que_last(struct sym_quehead *head)
238 return (head->blink == head) ? 0 : head->blink;
241 static __inline void __sym_que_add(struct sym_quehead * new,
242 struct sym_quehead * blink,
243 struct sym_quehead * flink)
251 static __inline void __sym_que_del(struct sym_quehead * blink,
252 struct sym_quehead * flink)
254 flink->blink = blink;
255 blink->flink = flink;
258 static __inline int sym_que_empty(struct sym_quehead *head)
260 return head->flink == head;
263 static __inline void sym_que_splice(struct sym_quehead *list,
264 struct sym_quehead *head)
266 struct sym_quehead *first = list->flink;
269 struct sym_quehead *last = list->blink;
270 struct sym_quehead *at = head->flink;
280 #define sym_que_entry(ptr, type, member) \
281 ((type *)((char *)(ptr)-(unsigned int)(&((type *)0)->member)))
284 #define sym_insque(new, pos) __sym_que_add(new, pos, (pos)->flink)
286 #define sym_remque(el) __sym_que_del((el)->blink, (el)->flink)
288 #define sym_insque_head(new, head) __sym_que_add(new, head, (head)->flink)
290 static __inline struct sym_quehead *sym_remque_head(struct sym_quehead *head)
292 struct sym_quehead *elem = head->flink;
295 __sym_que_del(head, elem->flink);
301 #define sym_insque_tail(new, head) __sym_que_add(new, (head)->blink, head)
303 static __inline struct sym_quehead *sym_remque_tail(struct sym_quehead *head)
305 struct sym_quehead *elem = head->blink;
308 __sym_que_del(elem->blink, head);
315 * This one may be useful.
317 #define FOR_EACH_QUEUED_ELEMENT(head, qp) \
318 for (qp = (head)->flink; qp != (head); qp = qp->flink)
320 * FreeBSD does not offer our kind of queue in the CAM CCB.
321 * So, we have to cast.
323 #define sym_qptr(p) ((struct sym_quehead *) (p))
326 * Simple bitmap operations.
328 #define sym_set_bit(p, n) (((u32 *)(p))[(n)>>5] |= (1<<((n)&0x1f)))
329 #define sym_clr_bit(p, n) (((u32 *)(p))[(n)>>5] &= ~(1<<((n)&0x1f)))
330 #define sym_is_bit(p, n) (((u32 *)(p))[(n)>>5] & (1<<((n)&0x1f)))
333 * Number of tasks per device we want to handle.
335 #if SYM_CONF_MAX_TAG_ORDER > 8
336 #error "more than 256 tags per logical unit not allowed."
338 #define SYM_CONF_MAX_TASK (1<<SYM_CONF_MAX_TAG_ORDER)
341 * Donnot use more tasks that we can handle.
343 #ifndef SYM_CONF_MAX_TAG
344 #define SYM_CONF_MAX_TAG SYM_CONF_MAX_TASK
346 #if SYM_CONF_MAX_TAG > SYM_CONF_MAX_TASK
347 #undef SYM_CONF_MAX_TAG
348 #define SYM_CONF_MAX_TAG SYM_CONF_MAX_TASK
352 * This one means 'NO TAG for this job'
357 * Number of SCSI targets.
359 #if SYM_CONF_MAX_TARGET > 16
360 #error "more than 16 targets not allowed."
364 * Number of logical units per target.
366 #if SYM_CONF_MAX_LUN > 64
367 #error "more than 64 logical units per target not allowed."
371 * Asynchronous pre-scaler (ns). Shall be 40 for
372 * the SCSI timings to be compliant.
374 #define SYM_CONF_MIN_ASYNC (40)
377 * Number of entries in the START and DONE queues.
379 * We limit to 1 PAGE in order to succeed allocation of
380 * these queues. Each entry is 8 bytes long (2 DWORDS).
382 #ifdef SYM_CONF_MAX_START
383 #define SYM_CONF_MAX_QUEUE (SYM_CONF_MAX_START+2)
385 #define SYM_CONF_MAX_QUEUE (7*SYM_CONF_MAX_TASK+2)
386 #define SYM_CONF_MAX_START (SYM_CONF_MAX_QUEUE-2)
389 #if SYM_CONF_MAX_QUEUE > PAGE_SIZE/8
390 #undef SYM_CONF_MAX_QUEUE
391 #define SYM_CONF_MAX_QUEUE PAGE_SIZE/8
392 #undef SYM_CONF_MAX_START
393 #define SYM_CONF_MAX_START (SYM_CONF_MAX_QUEUE-2)
397 * For this one, we want a short name :-)
399 #define MAX_QUEUE SYM_CONF_MAX_QUEUE
402 * These ones should have been already defined.
405 #define MIN(a, b) (((a) < (b)) ? (a) : (b))
409 * Active debugging tags and verbosity.
411 #define DEBUG_ALLOC (0x0001)
412 #define DEBUG_PHASE (0x0002)
413 #define DEBUG_POLL (0x0004)
414 #define DEBUG_QUEUE (0x0008)
415 #define DEBUG_RESULT (0x0010)
416 #define DEBUG_SCATTER (0x0020)
417 #define DEBUG_SCRIPT (0x0040)
418 #define DEBUG_TINY (0x0080)
419 #define DEBUG_TIMING (0x0100)
420 #define DEBUG_NEGO (0x0200)
421 #define DEBUG_TAGS (0x0400)
422 #define DEBUG_POINTER (0x0800)
425 static int sym_debug = 0;
426 #define DEBUG_FLAGS sym_debug
428 /* #define DEBUG_FLAGS (0x0631) */
429 #define DEBUG_FLAGS (0x0000)
432 #define sym_verbose (np->verbose)
435 * Insert a delay in micro-seconds and milli-seconds.
437 static void UDELAY(int us) { DELAY(us); }
438 static void MDELAY(int ms) { while (ms--) UDELAY(1000); }
441 * Simple power of two buddy-like allocator.
443 * This simple code is not intended to be fast, but to
444 * provide power of 2 aligned memory allocations.
445 * Since the SCRIPTS processor only supplies 8 bit arithmetic,
446 * this allocator allows simple and fast address calculations
447 * from the SCRIPTS code. In addition, cache line alignment
448 * is guaranteed for power of 2 cache line size.
450 * This allocator has been developped for the Linux sym53c8xx
451 * driver, since this O/S does not provide naturally aligned
453 * It has the advantage of allowing the driver to use private
454 * pages of memory that will be useful if we ever need to deal
455 * with IO MMUs for PCI.
458 #define MEMO_SHIFT 4 /* 16 bytes minimum memory chunk */
459 #define MEMO_PAGE_ORDER 0 /* 1 PAGE maximum */
461 #define MEMO_FREE_UNUSED /* Free unused pages immediately */
464 #define MEMO_CLUSTER_SHIFT (PAGE_SHIFT+MEMO_PAGE_ORDER)
465 #define MEMO_CLUSTER_SIZE (1UL << MEMO_CLUSTER_SHIFT)
466 #define MEMO_CLUSTER_MASK (MEMO_CLUSTER_SIZE-1)
468 #define get_pages() malloc(MEMO_CLUSTER_SIZE, M_DEVBUF, M_NOWAIT)
469 #define free_pages(p) free((p), M_DEVBUF)
471 typedef u_long m_addr_t; /* Enough bits to bit-hack addresses */
473 typedef struct m_link { /* Link between free memory chunks */
477 #ifdef FreeBSD_Bus_Dma_Abstraction
478 typedef struct m_vtob { /* Virtual to Bus address translation */
480 bus_dmamap_t dmamap; /* Map for this chunk */
481 m_addr_t vaddr; /* Virtual address */
482 m_addr_t baddr; /* Bus physical address */
484 /* Hash this stuff a bit to speed up translations */
485 #define VTOB_HASH_SHIFT 5
486 #define VTOB_HASH_SIZE (1UL << VTOB_HASH_SHIFT)
487 #define VTOB_HASH_MASK (VTOB_HASH_SIZE-1)
488 #define VTOB_HASH_CODE(m) \
489 ((((m_addr_t) (m)) >> MEMO_CLUSTER_SHIFT) & VTOB_HASH_MASK)
492 typedef struct m_pool { /* Memory pool of a given kind */
493 #ifdef FreeBSD_Bus_Dma_Abstraction
494 bus_dma_tag_t dev_dmat; /* Identifies the pool */
495 bus_dma_tag_t dmat; /* Tag for our fixed allocations */
496 m_addr_t (*getp)(struct m_pool *);
497 #ifdef MEMO_FREE_UNUSED
498 void (*freep)(struct m_pool *, m_addr_t);
500 #define M_GETP() mp->getp(mp)
501 #define M_FREEP(p) mp->freep(mp, p)
503 m_vtob_s *(vtob[VTOB_HASH_SIZE]);
506 #define M_GETP() get_pages()
507 #define M_FREEP(p) free_pages(p)
508 #endif /* FreeBSD_Bus_Dma_Abstraction */
509 struct m_link h[MEMO_CLUSTER_SHIFT - MEMO_SHIFT + 1];
512 static void *___sym_malloc(m_pool_s *mp, int size)
515 int s = (1 << MEMO_SHIFT);
520 if (size > MEMO_CLUSTER_SIZE)
530 if (s == MEMO_CLUSTER_SIZE) {
531 h[j].next = (m_link_s *) M_GETP();
539 a = (m_addr_t) h[j].next;
541 h[j].next = h[j].next->next;
545 h[j].next = (m_link_s *) (a+s);
550 printf("___sym_malloc(%d) = %p\n", size, (void *) a);
555 static void ___sym_mfree(m_pool_s *mp, void *ptr, int size)
558 int s = (1 << MEMO_SHIFT);
564 printf("___sym_mfree(%p, %d)\n", ptr, size);
567 if (size > MEMO_CLUSTER_SIZE)
578 #ifdef MEMO_FREE_UNUSED
579 if (s == MEMO_CLUSTER_SIZE) {
586 while (q->next && q->next != (m_link_s *) b) {
590 ((m_link_s *) a)->next = h[i].next;
591 h[i].next = (m_link_s *) a;
594 q->next = q->next->next;
601 static void *__sym_calloc2(m_pool_s *mp, int size, char *name, int uflags)
605 p = ___sym_malloc(mp, size);
607 if (DEBUG_FLAGS & DEBUG_ALLOC)
608 printf ("new %-10s[%4d] @%p.\n", name, size, p);
612 else if (uflags & MEMO_WARN)
613 printf ("__sym_calloc2: failed to allocate %s[%d]\n", name, size);
618 #define __sym_calloc(mp, s, n) __sym_calloc2(mp, s, n, MEMO_WARN)
620 static void __sym_mfree(m_pool_s *mp, void *ptr, int size, char *name)
622 if (DEBUG_FLAGS & DEBUG_ALLOC)
623 printf ("freeing %-10s[%4d] @%p.\n", name, size, ptr);
625 ___sym_mfree(mp, ptr, size);
630 * Default memory pool we donnot need to involve in DMA.
632 #ifndef FreeBSD_Bus_Dma_Abstraction
634 * Without the `bus dma abstraction', all the memory is assumed
635 * DMAable and a single pool is all what we need.
641 * With the `bus dma abstraction', we use a separate pool for
642 * memory we donnot need to involve in DMA.
644 static m_addr_t ___mp0_getp(m_pool_s *mp)
646 m_addr_t m = (m_addr_t) get_pages();
652 #ifdef MEMO_FREE_UNUSED
653 static void ___mp0_freep(m_pool_s *mp, m_addr_t m)
660 #ifdef MEMO_FREE_UNUSED
661 static m_pool_s mp0 = {0, 0, ___mp0_getp, ___mp0_freep};
663 static m_pool_s mp0 = {0, 0, ___mp0_getp};
666 #endif /* FreeBSD_Bus_Dma_Abstraction */
669 * Actual memory allocation routine for non-DMAed memory.
671 static void *sym_calloc(int size, char *name)
675 m = __sym_calloc(&mp0, size, name);
681 * Actual memory allocation routine for non-DMAed memory.
683 static void sym_mfree(void *ptr, int size, char *name)
686 __sym_mfree(&mp0, ptr, size, name);
693 #ifndef FreeBSD_Bus_Dma_Abstraction
695 * Without `bus dma abstraction', all the memory is DMAable, and
696 * only a single pool is needed (vtophys() is our friend).
698 #define __sym_calloc_dma(b, s, n) sym_calloc(s, n)
699 #define __sym_mfree_dma(b, p, s, n) sym_mfree(p, s, n)
701 #define __vtobus(b, p) alpha_XXX_dmamap((vm_offset_t)(p))
702 #else /*__i386__, __sparc64__*/
703 #define __vtobus(b, p) vtophys(p)
708 * With `bus dma abstraction', we use a separate pool per parent
709 * BUS handle. A reverse table (hashed) is maintained for virtual
710 * to BUS address translation.
712 static void getbaddrcb(void *arg, bus_dma_segment_t *segs, int nseg, int error)
715 baddr = (bus_addr_t *)arg;
716 *baddr = segs->ds_addr;
719 static m_addr_t ___dma_getp(m_pool_s *mp)
723 bus_addr_t baddr = 0;
725 vbp = __sym_calloc(&mp0, sizeof(*vbp), "VTOB");
729 if (bus_dmamem_alloc(mp->dmat, &vaddr,
730 BUS_DMA_NOWAIT, &vbp->dmamap))
732 bus_dmamap_load(mp->dmat, vbp->dmamap, vaddr,
733 MEMO_CLUSTER_SIZE, getbaddrcb, &baddr, 0);
735 int hc = VTOB_HASH_CODE(vaddr);
736 vbp->vaddr = (m_addr_t) vaddr;
737 vbp->baddr = (m_addr_t) baddr;
738 vbp->next = mp->vtob[hc];
741 return (m_addr_t) vaddr;
745 bus_dmamap_unload(mp->dmat, vbp->dmamap);
747 bus_dmamem_free(mp->dmat, vaddr, vbp->dmamap);
749 bus_dmamap_destroy(mp->dmat, vbp->dmamap);
751 __sym_mfree(&mp0, vbp, sizeof(*vbp), "VTOB");
755 #ifdef MEMO_FREE_UNUSED
756 static void ___dma_freep(m_pool_s *mp, m_addr_t m)
758 m_vtob_s **vbpp, *vbp;
759 int hc = VTOB_HASH_CODE(m);
761 vbpp = &mp->vtob[hc];
762 while (*vbpp && (*vbpp)->vaddr != m)
763 vbpp = &(*vbpp)->next;
766 *vbpp = (*vbpp)->next;
767 bus_dmamap_unload(mp->dmat, vbp->dmamap);
768 bus_dmamem_free(mp->dmat, (void *) vbp->vaddr, vbp->dmamap);
769 bus_dmamap_destroy(mp->dmat, vbp->dmamap);
770 __sym_mfree(&mp0, vbp, sizeof(*vbp), "VTOB");
776 static __inline m_pool_s *___get_dma_pool(bus_dma_tag_t dev_dmat)
779 for (mp = mp0.next; mp && mp->dev_dmat != dev_dmat; mp = mp->next);
783 static m_pool_s *___cre_dma_pool(bus_dma_tag_t dev_dmat)
787 mp = __sym_calloc(&mp0, sizeof(*mp), "MPOOL");
789 mp->dev_dmat = dev_dmat;
790 if (!bus_dma_tag_create(dev_dmat, 1, MEMO_CLUSTER_SIZE,
791 BUS_SPACE_MAXADDR_32BIT,
792 BUS_SPACE_MAXADDR_32BIT,
793 NULL, NULL, MEMO_CLUSTER_SIZE, 1,
794 MEMO_CLUSTER_SIZE, 0, &mp->dmat)) {
795 mp->getp = ___dma_getp;
796 #ifdef MEMO_FREE_UNUSED
797 mp->freep = ___dma_freep;
805 __sym_mfree(&mp0, mp, sizeof(*mp), "MPOOL");
809 #ifdef MEMO_FREE_UNUSED
810 static void ___del_dma_pool(m_pool_s *p)
812 struct m_pool **pp = &mp0.next;
814 while (*pp && *pp != p)
818 bus_dma_tag_destroy(p->dmat);
819 __sym_mfree(&mp0, p, sizeof(*p), "MPOOL");
824 static void *__sym_calloc_dma(bus_dma_tag_t dev_dmat, int size, char *name)
830 mp = ___get_dma_pool(dev_dmat);
832 mp = ___cre_dma_pool(dev_dmat);
834 m = __sym_calloc(mp, size, name);
835 #ifdef MEMO_FREE_UNUSED
845 __sym_mfree_dma(bus_dma_tag_t dev_dmat, void *m, int size, char *name)
850 mp = ___get_dma_pool(dev_dmat);
852 __sym_mfree(mp, m, size, name);
853 #ifdef MEMO_FREE_UNUSED
860 static m_addr_t __vtobus(bus_dma_tag_t dev_dmat, void *m)
863 int hc = VTOB_HASH_CODE(m);
865 m_addr_t a = ((m_addr_t) m) & ~MEMO_CLUSTER_MASK;
868 mp = ___get_dma_pool(dev_dmat);
871 while (vp && (m_addr_t) vp->vaddr != a)
876 panic("sym: VTOBUS FAILED!\n");
877 return vp ? vp->baddr + (((m_addr_t) m) - a) : 0;
880 #endif /* FreeBSD_Bus_Dma_Abstraction */
883 * Verbs for DMAable memory handling.
884 * The _uvptv_ macro avoids a nasty warning about pointer to volatile
887 #define _uvptv_(p) ((void *)((vm_offset_t)(p)))
888 #define _sym_calloc_dma(np, s, n) __sym_calloc_dma(np->bus_dmat, s, n)
889 #define _sym_mfree_dma(np, p, s, n) \
890 __sym_mfree_dma(np->bus_dmat, _uvptv_(p), s, n)
891 #define sym_calloc_dma(s, n) _sym_calloc_dma(np, s, n)
892 #define sym_mfree_dma(p, s, n) _sym_mfree_dma(np, p, s, n)
893 #define _vtobus(np, p) __vtobus(np->bus_dmat, _uvptv_(p))
894 #define vtobus(p) _vtobus(np, p)
898 * Print a buffer in hexadecimal format.
900 static void sym_printb_hex (u_char *p, int n)
903 printf (" %x", *p++);
907 * Same with a label at beginning and .\n at end.
909 static void sym_printl_hex (char *label, u_char *p, int n)
911 printf ("%s", label);
912 sym_printb_hex (p, n);
917 * Return a string for SCSI BUS mode.
919 static char *sym_scsi_bus_mode(int mode)
922 case SMODE_HVD: return "HVD";
923 case SMODE_SE: return "SE";
924 case SMODE_LVD: return "LVD";
930 * Some poor and bogus sync table that refers to Tekram NVRAM layout.
932 #ifdef SYM_CONF_NVRAM_SUPPORT
933 static u_char Tekram_sync[16] =
934 {25,31,37,43, 50,62,75,125, 12,15,18,21, 6,7,9,10};
938 * Union of supported NVRAM formats.
942 #define SYM_SYMBIOS_NVRAM (1)
943 #define SYM_TEKRAM_NVRAM (2)
944 #ifdef SYM_CONF_NVRAM_SUPPORT
946 Symbios_nvram Symbios;
953 * This one is hopefully useless, but actually useful. :-)
956 #define assert(expression) { \
957 if (!(expression)) { \
959 "assertion \"%s\" failed: file \"%s\", line %d\n", \
961 __FILE__, __LINE__); \
967 * Some provision for a possible big endian mode supported by
968 * Symbios chips (never seen, by the way).
969 * For now, this stuff does not deserve any comments. :)
972 #define sym_offb(o) (o)
973 #define sym_offw(o) (o)
976 * Some provision for support for BIG ENDIAN CPU.
977 * Btw, FreeBSD does not seem to be ready yet for big endian.
980 #if BYTE_ORDER == BIG_ENDIAN
981 #define cpu_to_scr(dw) _htole32(dw)
982 #define scr_to_cpu(dw) _le32toh(dw)
984 #define cpu_to_scr(dw) (dw)
985 #define scr_to_cpu(dw) (dw)
989 * Access to the chip IO registers and on-chip RAM.
990 * We use the `bus space' interface under FreeBSD-4 and
991 * later kernel versions.
994 #ifdef FreeBSD_Bus_Space_Abstraction
996 #if defined(SYM_CONF_IOMAPPED)
998 #define INB_OFF(o) bus_space_read_1(np->io_tag, np->io_bsh, o)
999 #define INW_OFF(o) bus_space_read_2(np->io_tag, np->io_bsh, o)
1000 #define INL_OFF(o) bus_space_read_4(np->io_tag, np->io_bsh, o)
1002 #define OUTB_OFF(o, v) bus_space_write_1(np->io_tag, np->io_bsh, o, (v))
1003 #define OUTW_OFF(o, v) bus_space_write_2(np->io_tag, np->io_bsh, o, (v))
1004 #define OUTL_OFF(o, v) bus_space_write_4(np->io_tag, np->io_bsh, o, (v))
1006 #else /* Memory mapped IO */
1008 #define INB_OFF(o) bus_space_read_1(np->mmio_tag, np->mmio_bsh, o)
1009 #define INW_OFF(o) bus_space_read_2(np->mmio_tag, np->mmio_bsh, o)
1010 #define INL_OFF(o) bus_space_read_4(np->mmio_tag, np->mmio_bsh, o)
1012 #define OUTB_OFF(o, v) bus_space_write_1(np->mmio_tag, np->mmio_bsh, o, (v))
1013 #define OUTW_OFF(o, v) bus_space_write_2(np->mmio_tag, np->mmio_bsh, o, (v))
1014 #define OUTL_OFF(o, v) bus_space_write_4(np->mmio_tag, np->mmio_bsh, o, (v))
1016 #endif /* SYM_CONF_IOMAPPED */
1018 #define OUTRAM_OFF(o, a, l) \
1019 bus_space_write_region_1(np->ram_tag, np->ram_bsh, o, (a), (l))
1021 #else /* not defined FreeBSD_Bus_Space_Abstraction */
1023 #if BYTE_ORDER == BIG_ENDIAN
1024 #error "BIG ENDIAN support requires bus space kernel interface"
1028 * Access to the chip IO registers and on-chip RAM.
1029 * We use legacy MMIO and IO interface for FreeBSD 3.X versions.
1033 * Define some understable verbs for IO and MMIO.
1035 #define io_read8(p) scr_to_cpu(inb((p)))
1036 #define io_read16(p) scr_to_cpu(inw((p)))
1037 #define io_read32(p) scr_to_cpu(inl((p)))
1038 #define io_write8(p, v) outb((p), cpu_to_scr(v))
1039 #define io_write16(p, v) outw((p), cpu_to_scr(v))
1040 #define io_write32(p, v) outl((p), cpu_to_scr(v))
1044 #define mmio_read8(a) readb(a)
1045 #define mmio_read16(a) readw(a)
1046 #define mmio_read32(a) readl(a)
1047 #define mmio_write8(a, b) writeb(a, b)
1048 #define mmio_write16(a, b) writew(a, b)
1049 #define mmio_write32(a, b) writel(a, b)
1050 #define memcpy_to_pci(d, s, n) memcpy_toio((u32)(d), (void *)(s), (n))
1052 #else /*__i386__, __sparc64__*/
1054 #define mmio_read8(a) scr_to_cpu((*(volatile unsigned char *) (a)))
1055 #define mmio_read16(a) scr_to_cpu((*(volatile unsigned short *) (a)))
1056 #define mmio_read32(a) scr_to_cpu((*(volatile unsigned int *) (a)))
1057 #define mmio_write8(a, b) (*(volatile unsigned char *) (a)) = cpu_to_scr(b)
1058 #define mmio_write16(a, b) (*(volatile unsigned short *) (a)) = cpu_to_scr(b)
1059 #define mmio_write32(a, b) (*(volatile unsigned int *) (a)) = cpu_to_scr(b)
1060 #define memcpy_to_pci(d, s, n) bcopy((s), (void *)(d), (n))
1067 #if defined(SYM_CONF_IOMAPPED)
1069 #define INB_OFF(o) io_read8(np->io_port + sym_offb(o))
1070 #define OUTB_OFF(o, v) io_write8(np->io_port + sym_offb(o), (v))
1072 #define INW_OFF(o) io_read16(np->io_port + sym_offw(o))
1073 #define OUTW_OFF(o, v) io_write16(np->io_port + sym_offw(o), (v))
1075 #define INL_OFF(o) io_read32(np->io_port + (o))
1076 #define OUTL_OFF(o, v) io_write32(np->io_port + (o), (v))
1078 #else /* Memory mapped IO */
1080 #define INB_OFF(o) mmio_read8(np->mmio_va + sym_offb(o))
1081 #define OUTB_OFF(o, v) mmio_write8(np->mmio_va + sym_offb(o), (v))
1083 #define INW_OFF(o) mmio_read16(np->mmio_va + sym_offw(o))
1084 #define OUTW_OFF(o, v) mmio_write16(np->mmio_va + sym_offw(o), (v))
1086 #define INL_OFF(o) mmio_read32(np->mmio_va + (o))
1087 #define OUTL_OFF(o, v) mmio_write32(np->mmio_va + (o), (v))
1091 #define OUTRAM_OFF(o, a, l) memcpy_to_pci(np->ram_va + (o), (a), (l))
1093 #endif /* FreeBSD_Bus_Space_Abstraction */
1096 * Common definitions for both bus space and legacy IO methods.
1098 #define INB(r) INB_OFF(offsetof(struct sym_reg,r))
1099 #define INW(r) INW_OFF(offsetof(struct sym_reg,r))
1100 #define INL(r) INL_OFF(offsetof(struct sym_reg,r))
1102 #define OUTB(r, v) OUTB_OFF(offsetof(struct sym_reg,r), (v))
1103 #define OUTW(r, v) OUTW_OFF(offsetof(struct sym_reg,r), (v))
1104 #define OUTL(r, v) OUTL_OFF(offsetof(struct sym_reg,r), (v))
1106 #define OUTONB(r, m) OUTB(r, INB(r) | (m))
1107 #define OUTOFFB(r, m) OUTB(r, INB(r) & ~(m))
1108 #define OUTONW(r, m) OUTW(r, INW(r) | (m))
1109 #define OUTOFFW(r, m) OUTW(r, INW(r) & ~(m))
1110 #define OUTONL(r, m) OUTL(r, INL(r) | (m))
1111 #define OUTOFFL(r, m) OUTL(r, INL(r) & ~(m))
1114 * We normally want the chip to have a consistent view
1115 * of driver internal data structures when we restart it.
1116 * Thus these macros.
1118 #define OUTL_DSP(v) \
1121 OUTL (nc_dsp, (v)); \
1124 #define OUTONB_STD() \
1127 OUTONB (nc_dcntl, (STD|NOCOM)); \
1131 * Command control block states.
1135 #define HS_NEGOTIATE (2) /* sync/wide data transfer*/
1136 #define HS_DISCONNECT (3) /* Disconnected by target */
1137 #define HS_WAIT (4) /* waiting for resource */
1139 #define HS_DONEMASK (0x80)
1140 #define HS_COMPLETE (4|HS_DONEMASK)
1141 #define HS_SEL_TIMEOUT (5|HS_DONEMASK) /* Selection timeout */
1142 #define HS_UNEXPECTED (6|HS_DONEMASK) /* Unexpected disconnect */
1143 #define HS_COMP_ERR (7|HS_DONEMASK) /* Completed with error */
1146 * Software Interrupt Codes
1148 #define SIR_BAD_SCSI_STATUS (1)
1149 #define SIR_SEL_ATN_NO_MSG_OUT (2)
1150 #define SIR_MSG_RECEIVED (3)
1151 #define SIR_MSG_WEIRD (4)
1152 #define SIR_NEGO_FAILED (5)
1153 #define SIR_NEGO_PROTO (6)
1154 #define SIR_SCRIPT_STOPPED (7)
1155 #define SIR_REJECT_TO_SEND (8)
1156 #define SIR_SWIDE_OVERRUN (9)
1157 #define SIR_SODL_UNDERRUN (10)
1158 #define SIR_RESEL_NO_MSG_IN (11)
1159 #define SIR_RESEL_NO_IDENTIFY (12)
1160 #define SIR_RESEL_BAD_LUN (13)
1161 #define SIR_TARGET_SELECTED (14)
1162 #define SIR_RESEL_BAD_I_T_L (15)
1163 #define SIR_RESEL_BAD_I_T_L_Q (16)
1164 #define SIR_ABORT_SENT (17)
1165 #define SIR_RESEL_ABORTED (18)
1166 #define SIR_MSG_OUT_DONE (19)
1167 #define SIR_COMPLETE_ERROR (20)
1168 #define SIR_DATA_OVERRUN (21)
1169 #define SIR_BAD_PHASE (22)
1170 #define SIR_MAX (22)
1173 * Extended error bit codes.
1174 * xerr_status field of struct sym_ccb.
1176 #define XE_EXTRA_DATA (1) /* unexpected data phase */
1177 #define XE_BAD_PHASE (1<<1) /* illegal phase (4/5) */
1178 #define XE_PARITY_ERR (1<<2) /* unrecovered SCSI parity error */
1179 #define XE_SODL_UNRUN (1<<3) /* ODD transfer in DATA OUT phase */
1180 #define XE_SWIDE_OVRUN (1<<4) /* ODD transfer in DATA IN phase */
1183 * Negotiation status.
1184 * nego_status field of struct sym_ccb.
1191 * A CCB hashed table is used to retrieve CCB address
1194 #define CCB_HASH_SHIFT 8
1195 #define CCB_HASH_SIZE (1UL << CCB_HASH_SHIFT)
1196 #define CCB_HASH_MASK (CCB_HASH_SIZE-1)
1197 #define CCB_HASH_CODE(dsa) (((dsa) >> 9) & CCB_HASH_MASK)
1202 #define SYM_DISC_ENABLED (1)
1203 #define SYM_TAGS_ENABLED (1<<1)
1204 #define SYM_SCAN_BOOT_DISABLED (1<<2)
1205 #define SYM_SCAN_LUNS_DISABLED (1<<3)
1208 * Host adapter miscellaneous flags.
1210 #define SYM_AVOID_BUS_RESET (1)
1211 #define SYM_SCAN_TARGETS_HILO (1<<1)
1215 * Some devices, for example the CHEETAH 2 LVD, disconnects without
1216 * saving the DATA POINTER then reselects and terminates the IO.
1217 * On reselection, the automatic RESTORE DATA POINTER makes the
1218 * CURRENT DATA POINTER not point at the end of the IO.
1219 * This behaviour just breaks our calculation of the residual.
1220 * For now, we just force an AUTO SAVE on disconnection and will
1221 * fix that in a further driver version.
1223 #define SYM_QUIRK_AUTOSAVE 1
1228 #define SYM_SNOOP_TIMEOUT (10000000)
1229 #define SYM_PCI_IO PCIR_MAPS
1230 #define SYM_PCI_MMIO (PCIR_MAPS + 4)
1231 #define SYM_PCI_RAM (PCIR_MAPS + 8)
1232 #define SYM_PCI_RAM64 (PCIR_MAPS + 12)
1235 * Back-pointer from the CAM CCB to our data structures.
1237 #define sym_hcb_ptr spriv_ptr0
1238 /* #define sym_ccb_ptr spriv_ptr1 */
1241 * We mostly have to deal with pointers.
1242 * Thus these typedef's.
1244 typedef struct sym_tcb *tcb_p;
1245 typedef struct sym_lcb *lcb_p;
1246 typedef struct sym_ccb *ccb_p;
1247 typedef struct sym_hcb *hcb_p;
1250 * Gather negotiable parameters value
1253 #ifdef FreeBSD_New_Tran_Settings
1260 u8 options; /* PPR options */
1264 struct sym_trans current;
1265 struct sym_trans goal;
1266 struct sym_trans user;
1269 #define BUS_8_BIT MSG_EXT_WDTR_BUS_8_BIT
1270 #define BUS_16_BIT MSG_EXT_WDTR_BUS_16_BIT
1273 * Global TCB HEADER.
1275 * Due to lack of indirect addressing on earlier NCR chips,
1276 * this substructure is copied from the TCB to a global
1277 * address after selection.
1278 * For SYMBIOS chips that support LOAD/STORE this copy is
1279 * not needed and thus not performed.
1283 * Scripts bus addresses of LUN table accessed from scripts.
1284 * LUN #0 is a special case, since multi-lun devices are rare,
1285 * and we we want to speed-up the general case and not waste
1288 u32 luntbl_sa; /* bus address of this table */
1289 u32 lun0_sa; /* bus address of LCB #0 */
1291 * Actual SYNC/WIDE IO registers value for this target.
1292 * 'sval', 'wval' and 'uval' are read from SCRIPTS and
1293 * so have alignment constraints.
1295 /*0*/ u_char uval; /* -> SCNTL4 register */
1296 /*1*/ u_char sval; /* -> SXFER io register */
1297 /*2*/ u_char filler1;
1298 /*3*/ u_char wval; /* -> SCNTL3 io register */
1302 * Target Control Block
1307 * Assumed at offset 0.
1309 /*0*/ struct sym_tcbh head;
1312 * LUN table used by the SCRIPTS processor.
1313 * An array of bus addresses is used on reselection.
1315 u32 *luntbl; /* LCBs bus address table */
1318 * LUN table used by the C code.
1320 lcb_p lun0p; /* LCB of LUN #0 (usual case) */
1321 #if SYM_CONF_MAX_LUN > 1
1322 lcb_p *lunmp; /* Other LCBs [1..MAX_LUN] */
1326 * Bitmap that tells about LUNs that succeeded at least
1327 * 1 IO and therefore assumed to be a real device.
1328 * Avoid useless allocation of the LCB structure.
1330 u32 lun_map[(SYM_CONF_MAX_LUN+31)/32];
1333 * Bitmap that tells about LUNs that haven't yet an LCB
1334 * allocated (not discovered or LCB allocation failed).
1336 u32 busy0_map[(SYM_CONF_MAX_LUN+31)/32];
1339 * Transfer capabilities (SIP)
1341 struct sym_tinfo tinfo;
1344 * Keep track of the CCB used for the negotiation in order
1345 * to ensure that only 1 negotiation is queued at a time.
1347 ccb_p nego_cp; /* CCB used for the nego */
1350 * Set when we want to reset the device.
1355 * Other user settable limits and options.
1356 * These limits are read from the NVRAM if present.
1363 * Global LCB HEADER.
1365 * Due to lack of indirect addressing on earlier NCR chips,
1366 * this substructure is copied from the LCB to a global
1367 * address after selection.
1368 * For SYMBIOS chips that support LOAD/STORE this copy is
1369 * not needed and thus not performed.
1373 * SCRIPTS address jumped by SCRIPTS on reselection.
1374 * For not probed logical units, this address points to
1375 * SCRIPTS that deal with bad LU handling (must be at
1376 * offset zero of the LCB for that reason).
1381 * Task (bus address of a CCB) read from SCRIPTS that points
1382 * to the unique ITL nexus allowed to be disconnected.
1387 * Task table bus address (read from SCRIPTS).
1393 * Logical Unit Control Block
1398 * Assumed at offset 0.
1400 /*0*/ struct sym_lcbh head;
1403 * Task table read from SCRIPTS that contains pointers to
1404 * ITLQ nexuses. The bus address read from SCRIPTS is
1405 * inside the header.
1407 u32 *itlq_tbl; /* Kernel virtual address */
1410 * Busy CCBs management.
1412 u_short busy_itlq; /* Number of busy tagged CCBs */
1413 u_short busy_itl; /* Number of busy untagged CCBs */
1416 * Circular tag allocation buffer.
1418 u_short ia_tag; /* Tag allocation index */
1419 u_short if_tag; /* Tag release index */
1420 u_char *cb_tags; /* Circular tags buffer */
1423 * Set when we want to clear all tasks.
1431 u_char current_flags;
1435 * Action from SCRIPTS on a task.
1436 * Is part of the CCB, but is also used separately to plug
1437 * error handling action to perform from SCRIPTS.
1440 u32 start; /* Jumped by SCRIPTS after selection */
1441 u32 restart; /* Jumped by SCRIPTS on relection */
1445 * Phase mismatch context.
1447 * It is part of the CCB and is used as parameters for the
1448 * DATA pointer. We need two contexts to handle correctly the
1449 * SAVED DATA POINTER.
1452 struct sym_tblmove sg; /* Updated interrupted SG block */
1453 u32 ret; /* SCRIPT return address */
1457 * LUN control block lookup.
1458 * We use a direct pointer for LUN #0, and a table of
1459 * pointers which is only allocated for devices that support
1462 #if SYM_CONF_MAX_LUN <= 1
1463 #define sym_lp(np, tp, lun) (!lun) ? (tp)->lun0p : 0
1465 #define sym_lp(np, tp, lun) \
1466 (!lun) ? (tp)->lun0p : (tp)->lunmp ? (tp)->lunmp[(lun)] : 0
1470 * Status are used by the host and the script processor.
1472 * The last four bytes (status[4]) are copied to the
1473 * scratchb register (declared as scr0..scr3) just after the
1474 * select/reselect, and copied back just after disconnecting.
1475 * Inside the script the XX_REG are used.
1479 * Last four bytes (script)
1483 #define HS_PRT nc_scr1
1485 #define SS_PRT nc_scr2
1487 #define HF_PRT nc_scr3
1490 * Last four bytes (host)
1492 #define actualquirks phys.head.status[0]
1493 #define host_status phys.head.status[1]
1494 #define ssss_status phys.head.status[2]
1495 #define host_flags phys.head.status[3]
1500 #define HF_IN_PM0 1u
1501 #define HF_IN_PM1 (1u<<1)
1502 #define HF_ACT_PM (1u<<2)
1503 #define HF_DP_SAVED (1u<<3)
1504 #define HF_SENSE (1u<<4)
1505 #define HF_EXT_ERR (1u<<5)
1506 #define HF_DATA_IN (1u<<6)
1507 #ifdef SYM_CONF_IARB_SUPPORT
1508 #define HF_HINT_IARB (1u<<7)
1512 * Global CCB HEADER.
1514 * Due to lack of indirect addressing on earlier NCR chips,
1515 * this substructure is copied from the ccb to a global
1516 * address after selection (or reselection) and copied back
1517 * before disconnect.
1518 * For SYMBIOS chips that support LOAD/STORE this copy is
1519 * not needed and thus not performed.
1524 * Start and restart SCRIPTS addresses (must be at 0).
1526 /*0*/ struct sym_actscr go;
1529 * SCRIPTS jump address that deal with data pointers.
1530 * 'savep' points to the position in the script responsible
1531 * for the actual transfer of data.
1532 * It's written on reception of a SAVE_DATA_POINTER message.
1534 u32 savep; /* Jump address to saved data pointer */
1535 u32 lastp; /* SCRIPTS address at end of data */
1536 u32 goalp; /* Not accessed for now from SCRIPTS */
1545 * Data Structure Block
1547 * During execution of a ccb by the script processor, the
1548 * DSA (data structure address) register points to this
1549 * substructure of the ccb.
1554 * Also assumed at offset 0 of the sym_ccb structure.
1556 /*0*/ struct sym_ccbh head;
1559 * Phase mismatch contexts.
1560 * We need two to handle correctly the SAVED DATA POINTER.
1561 * MUST BOTH BE AT OFFSET < 256, due to using 8 bit arithmetic
1562 * for address calculation from SCRIPTS.
1568 * Table data for Script
1570 struct sym_tblsel select;
1571 struct sym_tblmove smsg;
1572 struct sym_tblmove smsg_ext;
1573 struct sym_tblmove cmd;
1574 struct sym_tblmove sense;
1575 struct sym_tblmove wresid;
1576 struct sym_tblmove data [SYM_CONF_MAX_SG];
1580 * Our Command Control Block
1584 * This is the data structure which is pointed by the DSA
1585 * register when it is executed by the script processor.
1586 * It must be the first entry.
1588 struct sym_dsb phys;
1591 * Pointer to CAM ccb and related stuff.
1593 union ccb *cam_ccb; /* CAM scsiio ccb */
1594 u8 cdb_buf[16]; /* Copy of CDB */
1595 u8 *sns_bbuf; /* Bounce buffer for sense data */
1596 #define SYM_SNS_BBUF_LEN sizeof(struct scsi_sense_data)
1597 int data_len; /* Total data length */
1598 int segments; /* Number of SG segments */
1601 * Miscellaneous status'.
1603 u_char nego_status; /* Negotiation status */
1604 u_char xerr_status; /* Extended error flags */
1605 u32 extra_bytes; /* Extraneous bytes transferred */
1609 * We prepare a message to be sent after selection.
1610 * We may use a second one if the command is rescheduled
1611 * due to CHECK_CONDITION or COMMAND TERMINATED.
1612 * Contents are IDENTIFY and SIMPLE_TAG.
1613 * While negotiating sync or wide transfer,
1614 * a SDTR or WDTR message is appended.
1616 u_char scsi_smsg [12];
1617 u_char scsi_smsg2[12];
1620 * Auto request sense related fields.
1622 u_char sensecmd[6]; /* Request Sense command */
1623 u_char sv_scsi_status; /* Saved SCSI status */
1624 u_char sv_xerr_status; /* Saved extended status */
1625 int sv_resid; /* Saved residual */
1628 * Map for the DMA of user data.
1630 #ifdef FreeBSD_Bus_Dma_Abstraction
1631 void *arg; /* Argument for some callback */
1632 bus_dmamap_t dmamap; /* DMA map for user data */
1634 #define SYM_DMA_NONE 0
1635 #define SYM_DMA_READ 1
1636 #define SYM_DMA_WRITE 2
1641 u32 ccb_ba; /* BUS address of this CCB */
1642 u_short tag; /* Tag for this transfer */
1643 /* NO_TAG means no tag */
1646 ccb_p link_ccbh; /* Host adapter CCB hash chain */
1648 link_ccbq; /* Link to free/busy CCB queue */
1649 u32 startp; /* Initial data pointer */
1650 int ext_sg; /* Extreme data pointer, used */
1651 int ext_ofs; /* to calculate the residual. */
1652 u_char to_abort; /* Want this IO to be aborted */
1655 #define CCB_BA(cp,lbl) (cp->ccb_ba + offsetof(struct sym_ccb, lbl))
1658 * Host Control Block
1663 * Due to poorness of addressing capabilities, earlier
1664 * chips (810, 815, 825) copy part of the data structures
1665 * (CCB, TCB and LCB) in fixed areas.
1667 #ifdef SYM_CONF_GENERIC_SUPPORT
1668 struct sym_ccbh ccb_head;
1669 struct sym_tcbh tcb_head;
1670 struct sym_lcbh lcb_head;
1673 * Idle task and invalid task actions and
1674 * their bus addresses.
1676 struct sym_actscr idletask, notask, bad_itl, bad_itlq;
1677 vm_offset_t idletask_ba, notask_ba, bad_itl_ba, bad_itlq_ba;
1680 * Dummy lun table to protect us against target
1681 * returning bad lun number on reselection.
1683 u32 *badluntbl; /* Table physical address */
1684 u32 badlun_sa; /* SCRIPT handler BUS address */
1687 * Bus address of this host control block.
1692 * Bit 32-63 of the on-chip RAM bus address in LE format.
1693 * The START_RAM64 script loads the MMRS and MMWS from this
1699 * Chip and controller indentification.
1701 #ifdef FreeBSD_Bus_Io_Abstraction
1710 * Initial value of some IO register bits.
1711 * These values are assumed to have been set by BIOS, and may
1712 * be used to probe adapter implementation differences.
1714 u_char sv_scntl0, sv_scntl3, sv_dmode, sv_dcntl, sv_ctest3, sv_ctest4,
1715 sv_ctest5, sv_gpcntl, sv_stest2, sv_stest4, sv_scntl4,
1719 * Actual initial value of IO register bits used by the
1720 * driver. They are loaded at initialisation according to
1721 * features that are to be enabled/disabled.
1723 u_char rv_scntl0, rv_scntl3, rv_dmode, rv_dcntl, rv_ctest3, rv_ctest4,
1724 rv_ctest5, rv_stest2, rv_ccntl0, rv_ccntl1, rv_scntl4;
1729 struct sym_tcb target[SYM_CONF_MAX_TARGET];
1732 * Target control block bus address array used by the SCRIPT
1739 * CAM SIM information for this instance.
1741 struct cam_sim *sim;
1742 struct cam_path *path;
1745 * Allocated hardware resources.
1747 #ifdef FreeBSD_Bus_Io_Abstraction
1748 struct resource *irq_res;
1749 struct resource *io_res;
1750 struct resource *mmio_res;
1751 struct resource *ram_res;
1759 * My understanding of PCI is that all agents must share the
1760 * same addressing range and model.
1761 * But some hardware architecture guys provide complex and
1762 * brain-deaded stuff that makes shit.
1763 * This driver only support PCI compliant implementations and
1764 * deals with part of the BUS stuff complexity only to fit O/S
1767 #ifdef FreeBSD_Bus_Io_Abstraction
1768 bus_space_handle_t io_bsh;
1769 bus_space_tag_t io_tag;
1770 bus_space_handle_t mmio_bsh;
1771 bus_space_tag_t mmio_tag;
1772 bus_space_handle_t ram_bsh;
1773 bus_space_tag_t ram_tag;
1779 #ifdef FreeBSD_Bus_Dma_Abstraction
1780 bus_dma_tag_t bus_dmat; /* DMA tag from parent BUS */
1781 bus_dma_tag_t data_dmat; /* DMA tag for user data */
1784 * Virtual and physical bus addresses of the chip.
1786 vm_offset_t mmio_va; /* MMIO kernel virtual address */
1787 vm_offset_t mmio_pa; /* MMIO CPU physical address */
1788 vm_offset_t mmio_ba; /* MMIO BUS address */
1789 int mmio_ws; /* MMIO Window size */
1791 vm_offset_t ram_va; /* RAM kernel virtual address */
1792 vm_offset_t ram_pa; /* RAM CPU physical address */
1793 vm_offset_t ram_ba; /* RAM BUS address */
1794 int ram_ws; /* RAM window size */
1795 u32 io_port; /* IO port address */
1798 * SCRIPTS virtual and physical bus addresses.
1799 * 'script' is loaded in the on-chip RAM if present.
1800 * 'scripth' stays in main memory for all chips except the
1801 * 53C895A, 53C896 and 53C1010 that provide 8K on-chip RAM.
1803 u_char *scripta0; /* Copies of script and scripth */
1804 u_char *scriptb0; /* Copies of script and scripth */
1805 vm_offset_t scripta_ba; /* Actual script and scripth */
1806 vm_offset_t scriptb_ba; /* bus addresses. */
1807 vm_offset_t scriptb0_ba;
1808 u_short scripta_sz; /* Actual size of script A */
1809 u_short scriptb_sz; /* Actual size of script B */
1812 * Bus addresses, setup and patch methods for
1813 * the selected firmware.
1815 struct sym_fwa_ba fwa_bas; /* Useful SCRIPTA bus addresses */
1816 struct sym_fwb_ba fwb_bas; /* Useful SCRIPTB bus addresses */
1817 void (*fw_setup)(hcb_p np, struct sym_fw *fw);
1818 void (*fw_patch)(hcb_p np);
1822 * General controller parameters and configuration.
1824 u_short device_id; /* PCI device id */
1825 u_char revision_id; /* PCI device revision id */
1826 u_int features; /* Chip features map */
1827 u_char myaddr; /* SCSI id of the adapter */
1828 u_char maxburst; /* log base 2 of dwords burst */
1829 u_char maxwide; /* Maximum transfer width */
1830 u_char minsync; /* Min sync period factor (ST) */
1831 u_char maxsync; /* Max sync period factor (ST) */
1832 u_char maxoffs; /* Max scsi offset (ST) */
1833 u_char minsync_dt; /* Min sync period factor (DT) */
1834 u_char maxsync_dt; /* Max sync period factor (DT) */
1835 u_char maxoffs_dt; /* Max scsi offset (DT) */
1836 u_char multiplier; /* Clock multiplier (1,2,4) */
1837 u_char clock_divn; /* Number of clock divisors */
1838 u32 clock_khz; /* SCSI clock frequency in KHz */
1839 u32 pciclk_khz; /* Estimated PCI clock in KHz */
1841 * Start queue management.
1842 * It is filled up by the host processor and accessed by the
1843 * SCRIPTS processor in order to start SCSI commands.
1845 volatile /* Prevent code optimizations */
1846 u32 *squeue; /* Start queue virtual address */
1847 u32 squeue_ba; /* Start queue BUS address */
1848 u_short squeueput; /* Next free slot of the queue */
1849 u_short actccbs; /* Number of allocated CCBs */
1852 * Command completion queue.
1853 * It is the same size as the start queue to avoid overflow.
1855 u_short dqueueget; /* Next position to scan */
1856 volatile /* Prevent code optimizations */
1857 u32 *dqueue; /* Completion (done) queue */
1858 u32 dqueue_ba; /* Done queue BUS address */
1861 * Miscellaneous buffers accessed by the scripts-processor.
1862 * They shall be DWORD aligned, because they may be read or
1863 * written with a script command.
1865 u_char msgout[8]; /* Buffer for MESSAGE OUT */
1866 u_char msgin [8]; /* Buffer for MESSAGE IN */
1867 u32 lastmsg; /* Last SCSI message sent */
1868 u_char scratch; /* Scratch for SCSI receive */
1871 * Miscellaneous configuration and status parameters.
1873 u_char usrflags; /* Miscellaneous user flags */
1874 u_char scsi_mode; /* Current SCSI BUS mode */
1875 u_char verbose; /* Verbosity for this controller*/
1876 u32 cache; /* Used for cache test at init. */
1879 * CCB lists and queue.
1881 ccb_p ccbh[CCB_HASH_SIZE]; /* CCB hashed by DSA value */
1882 SYM_QUEHEAD free_ccbq; /* Queue of available CCBs */
1883 SYM_QUEHEAD busy_ccbq; /* Queue of busy CCBs */
1886 * During error handling and/or recovery,
1887 * active CCBs that are to be completed with
1888 * error or requeued are moved from the busy_ccbq
1889 * to the comp_ccbq prior to completion.
1891 SYM_QUEHEAD comp_ccbq;
1894 * CAM CCB pending queue.
1896 SYM_QUEHEAD cam_ccbq;
1899 * IMMEDIATE ARBITRATION (IARB) control.
1901 * We keep track in 'last_cp' of the last CCB that has been
1902 * queued to the SCRIPTS processor and clear 'last_cp' when
1903 * this CCB completes. If last_cp is not zero at the moment
1904 * we queue a new CCB, we set a flag in 'last_cp' that is
1905 * used by the SCRIPTS as a hint for setting IARB.
1906 * We donnot set more than 'iarb_max' consecutive hints for
1907 * IARB in order to leave devices a chance to reselect.
1908 * By the way, any non zero value of 'iarb_max' is unfair. :)
1910 #ifdef SYM_CONF_IARB_SUPPORT
1911 u_short iarb_max; /* Max. # consecutive IARB hints*/
1912 u_short iarb_count; /* Actual # of these hints */
1917 * Command abort handling.
1918 * We need to synchronize tightly with the SCRIPTS
1919 * processor in order to handle things correctly.
1921 u_char abrt_msg[4]; /* Message to send buffer */
1922 struct sym_tblmove abrt_tbl; /* Table for the MOV of it */
1923 struct sym_tblsel abrt_sel; /* Sync params for selection */
1924 u_char istat_sem; /* Tells the chip to stop (SEM) */
1927 #define HCB_BA(np, lbl) (np->hcb_ba + offsetof(struct sym_hcb, lbl))
1930 * Return the name of the controller.
1932 static __inline char *sym_name(hcb_p np)
1934 return np->inst_name;
1937 /*--------------------------------------------------------------------------*/
1938 /*------------------------------ FIRMWARES ---------------------------------*/
1939 /*--------------------------------------------------------------------------*/
1942 * This stuff will be moved to a separate source file when
1943 * the driver will be broken into several source modules.
1947 * Macros used for all firmwares.
1949 #define SYM_GEN_A(s, label) ((short) offsetof(s, label)),
1950 #define SYM_GEN_B(s, label) ((short) offsetof(s, label)),
1951 #define PADDR_A(label) SYM_GEN_PADDR_A(struct SYM_FWA_SCR, label)
1952 #define PADDR_B(label) SYM_GEN_PADDR_B(struct SYM_FWB_SCR, label)
1955 #ifdef SYM_CONF_GENERIC_SUPPORT
1957 * Allocate firmware #1 script area.
1959 #define SYM_FWA_SCR sym_fw1a_scr
1960 #define SYM_FWB_SCR sym_fw1b_scr
1961 #include <dev/sym/sym_fw1.h>
1962 struct sym_fwa_ofs sym_fw1a_ofs = {
1963 SYM_GEN_FW_A(struct SYM_FWA_SCR)
1965 struct sym_fwb_ofs sym_fw1b_ofs = {
1966 SYM_GEN_FW_B(struct SYM_FWB_SCR)
1970 #endif /* SYM_CONF_GENERIC_SUPPORT */
1973 * Allocate firmware #2 script area.
1975 #define SYM_FWA_SCR sym_fw2a_scr
1976 #define SYM_FWB_SCR sym_fw2b_scr
1977 #include <dev/sym/sym_fw2.h>
1978 struct sym_fwa_ofs sym_fw2a_ofs = {
1979 SYM_GEN_FW_A(struct SYM_FWA_SCR)
1981 struct sym_fwb_ofs sym_fw2b_ofs = {
1982 SYM_GEN_FW_B(struct SYM_FWB_SCR)
1983 SYM_GEN_B(struct SYM_FWB_SCR, start64)
1984 SYM_GEN_B(struct SYM_FWB_SCR, pm_handle)
1994 #ifdef SYM_CONF_GENERIC_SUPPORT
1996 * Patch routine for firmware #1.
1999 sym_fw1_patch(hcb_p np)
2001 struct sym_fw1a_scr *scripta0;
2002 struct sym_fw1b_scr *scriptb0;
2004 scripta0 = (struct sym_fw1a_scr *) np->scripta0;
2005 scriptb0 = (struct sym_fw1b_scr *) np->scriptb0;
2008 * Remove LED support if not needed.
2010 if (!(np->features & FE_LED0)) {
2011 scripta0->idle[0] = cpu_to_scr(SCR_NO_OP);
2012 scripta0->reselected[0] = cpu_to_scr(SCR_NO_OP);
2013 scripta0->start[0] = cpu_to_scr(SCR_NO_OP);
2016 #ifdef SYM_CONF_IARB_SUPPORT
2018 * If user does not want to use IMMEDIATE ARBITRATION
2019 * when we are reselected while attempting to arbitrate,
2020 * patch the SCRIPTS accordingly with a SCRIPT NO_OP.
2022 if (!SYM_CONF_SET_IARB_ON_ARB_LOST)
2023 scripta0->ungetjob[0] = cpu_to_scr(SCR_NO_OP);
2026 * Patch some data in SCRIPTS.
2027 * - start and done queue initial bus address.
2028 * - target bus address table bus address.
2030 scriptb0->startpos[0] = cpu_to_scr(np->squeue_ba);
2031 scriptb0->done_pos[0] = cpu_to_scr(np->dqueue_ba);
2032 scriptb0->targtbl[0] = cpu_to_scr(np->targtbl_ba);
2034 #endif /* SYM_CONF_GENERIC_SUPPORT */
2037 * Patch routine for firmware #2.
2040 sym_fw2_patch(hcb_p np)
2042 struct sym_fw2a_scr *scripta0;
2043 struct sym_fw2b_scr *scriptb0;
2045 scripta0 = (struct sym_fw2a_scr *) np->scripta0;
2046 scriptb0 = (struct sym_fw2b_scr *) np->scriptb0;
2049 * Remove LED support if not needed.
2051 if (!(np->features & FE_LED0)) {
2052 scripta0->idle[0] = cpu_to_scr(SCR_NO_OP);
2053 scripta0->reselected[0] = cpu_to_scr(SCR_NO_OP);
2054 scripta0->start[0] = cpu_to_scr(SCR_NO_OP);
2057 #ifdef SYM_CONF_IARB_SUPPORT
2059 * If user does not want to use IMMEDIATE ARBITRATION
2060 * when we are reselected while attempting to arbitrate,
2061 * patch the SCRIPTS accordingly with a SCRIPT NO_OP.
2063 if (!SYM_CONF_SET_IARB_ON_ARB_LOST)
2064 scripta0->ungetjob[0] = cpu_to_scr(SCR_NO_OP);
2067 * Patch some variable in SCRIPTS.
2068 * - start and done queue initial bus address.
2069 * - target bus address table bus address.
2071 scriptb0->startpos[0] = cpu_to_scr(np->squeue_ba);
2072 scriptb0->done_pos[0] = cpu_to_scr(np->dqueue_ba);
2073 scriptb0->targtbl[0] = cpu_to_scr(np->targtbl_ba);
2076 * Remove the load of SCNTL4 on reselection if not a C10.
2078 if (!(np->features & FE_C10)) {
2079 scripta0->resel_scntl4[0] = cpu_to_scr(SCR_NO_OP);
2080 scripta0->resel_scntl4[1] = cpu_to_scr(0);
2084 * Remove a couple of work-arounds specific to C1010 if
2085 * they are not desirable. See `sym_fw2.h' for more details.
2087 if (!(np->device_id == PCI_ID_LSI53C1010_2 &&
2088 np->revision_id < 0x1 &&
2089 np->pciclk_khz < 60000)) {
2090 scripta0->datao_phase[0] = cpu_to_scr(SCR_NO_OP);
2091 scripta0->datao_phase[1] = cpu_to_scr(0);
2093 if (!(np->device_id == PCI_ID_LSI53C1010 &&
2094 /* np->revision_id < 0xff */ 1)) {
2095 scripta0->sel_done[0] = cpu_to_scr(SCR_NO_OP);
2096 scripta0->sel_done[1] = cpu_to_scr(0);
2100 * Patch some other variables in SCRIPTS.
2101 * These ones are loaded by the SCRIPTS processor.
2103 scriptb0->pm0_data_addr[0] =
2104 cpu_to_scr(np->scripta_ba +
2105 offsetof(struct sym_fw2a_scr, pm0_data));
2106 scriptb0->pm1_data_addr[0] =
2107 cpu_to_scr(np->scripta_ba +
2108 offsetof(struct sym_fw2a_scr, pm1_data));
2112 * Fill the data area in scripts.
2113 * To be done for all firmwares.
2116 sym_fw_fill_data (u32 *in, u32 *out)
2120 for (i = 0; i < SYM_CONF_MAX_SG; i++) {
2121 *in++ = SCR_CHMOV_TBL ^ SCR_DATA_IN;
2122 *in++ = offsetof (struct sym_dsb, data[i]);
2123 *out++ = SCR_CHMOV_TBL ^ SCR_DATA_OUT;
2124 *out++ = offsetof (struct sym_dsb, data[i]);
2129 * Setup useful script bus addresses.
2130 * To be done for all firmwares.
2133 sym_fw_setup_bus_addresses(hcb_p np, struct sym_fw *fw)
2140 * Build the bus address table for script A
2141 * from the script A offset table.
2143 po = (u_short *) fw->a_ofs;
2144 pa = (u32 *) &np->fwa_bas;
2145 for (i = 0 ; i < sizeof(np->fwa_bas)/sizeof(u32) ; i++)
2146 pa[i] = np->scripta_ba + po[i];
2149 * Same for script B.
2151 po = (u_short *) fw->b_ofs;
2152 pa = (u32 *) &np->fwb_bas;
2153 for (i = 0 ; i < sizeof(np->fwb_bas)/sizeof(u32) ; i++)
2154 pa[i] = np->scriptb_ba + po[i];
2157 #ifdef SYM_CONF_GENERIC_SUPPORT
2159 * Setup routine for firmware #1.
2162 sym_fw1_setup(hcb_p np, struct sym_fw *fw)
2164 struct sym_fw1a_scr *scripta0;
2165 struct sym_fw1b_scr *scriptb0;
2167 scripta0 = (struct sym_fw1a_scr *) np->scripta0;
2168 scriptb0 = (struct sym_fw1b_scr *) np->scriptb0;
2171 * Fill variable parts in scripts.
2173 sym_fw_fill_data(scripta0->data_in, scripta0->data_out);
2176 * Setup bus addresses used from the C code..
2178 sym_fw_setup_bus_addresses(np, fw);
2180 #endif /* SYM_CONF_GENERIC_SUPPORT */
2183 * Setup routine for firmware #2.
2186 sym_fw2_setup(hcb_p np, struct sym_fw *fw)
2188 struct sym_fw2a_scr *scripta0;
2189 struct sym_fw2b_scr *scriptb0;
2191 scripta0 = (struct sym_fw2a_scr *) np->scripta0;
2192 scriptb0 = (struct sym_fw2b_scr *) np->scriptb0;
2195 * Fill variable parts in scripts.
2197 sym_fw_fill_data(scripta0->data_in, scripta0->data_out);
2200 * Setup bus addresses used from the C code..
2202 sym_fw_setup_bus_addresses(np, fw);
2206 * Allocate firmware descriptors.
2208 #ifdef SYM_CONF_GENERIC_SUPPORT
2209 static struct sym_fw sym_fw1 = SYM_FW_ENTRY(sym_fw1, "NCR-generic");
2210 #endif /* SYM_CONF_GENERIC_SUPPORT */
2211 static struct sym_fw sym_fw2 = SYM_FW_ENTRY(sym_fw2, "LOAD/STORE-based");
2214 * Find the most appropriate firmware for a chip.
2216 static struct sym_fw *
2217 sym_find_firmware(struct sym_pci_chip *chip)
2219 if (chip->features & FE_LDSTR)
2221 #ifdef SYM_CONF_GENERIC_SUPPORT
2222 else if (!(chip->features & (FE_PFEN|FE_NOPM|FE_DAC)))
2230 * Bind a script to physical addresses.
2232 static void sym_fw_bind_script (hcb_p np, u32 *start, int len)
2234 u32 opcode, new, old, tmp1, tmp2;
2239 end = start + len/4;
2246 * If we forget to change the length
2247 * in scripts, a field will be
2248 * padded with 0. This is an illegal
2252 printf ("%s: ERROR0 IN SCRIPT at %d.\n",
2253 sym_name(np), (int) (cur-start));
2260 * We use the bogus value 0xf00ff00f ;-)
2261 * to reserve data area in SCRIPTS.
2263 if (opcode == SCR_DATA_ZERO) {
2268 if (DEBUG_FLAGS & DEBUG_SCRIPT)
2269 printf ("%d: <%x>\n", (int) (cur-start),
2273 * We don't have to decode ALL commands
2275 switch (opcode >> 28) {
2278 * LOAD / STORE DSA relative, don't relocate.
2284 * LOAD / STORE absolute.
2290 * COPY has TWO arguments.
2295 if ((tmp1 ^ tmp2) & 3) {
2296 printf ("%s: ERROR1 IN SCRIPT at %d.\n",
2297 sym_name(np), (int) (cur-start));
2301 * If PREFETCH feature not enabled, remove
2302 * the NO FLUSH bit if present.
2304 if ((opcode & SCR_NO_FLUSH) &&
2305 !(np->features & FE_PFEN)) {
2306 opcode = (opcode & ~SCR_NO_FLUSH);
2311 * MOVE/CHMOV (absolute address)
2313 if (!(np->features & FE_WIDE))
2314 opcode = (opcode | OPC_MOVE);
2319 * MOVE/CHMOV (table indirect)
2321 if (!(np->features & FE_WIDE))
2322 opcode = (opcode | OPC_MOVE);
2328 * dont't relocate if relative :-)
2330 if (opcode & 0x00800000)
2332 else if ((opcode & 0xf8400000) == 0x80400000)/*JUMP64*/
2349 * Scriptify:) the opcode.
2351 *cur++ = cpu_to_scr(opcode);
2354 * If no relocation, assume 1 argument
2355 * and just scriptize:) it.
2358 *cur = cpu_to_scr(*cur);
2364 * Otherwise performs all needed relocations.
2369 switch (old & RELOC_MASK) {
2370 case RELOC_REGISTER:
2371 new = (old & ~RELOC_MASK) + np->mmio_ba;
2374 new = (old & ~RELOC_MASK) + np->scripta_ba;
2377 new = (old & ~RELOC_MASK) + np->scriptb_ba;
2380 new = (old & ~RELOC_MASK) + np->hcb_ba;
2384 * Don't relocate a 0 address.
2385 * They are mostly used for patched or
2386 * script self-modified areas.
2395 panic("sym_fw_bind_script: "
2396 "weird relocation %x\n", old);
2400 *cur++ = cpu_to_scr(new);
2405 /*--------------------------------------------------------------------------*/
2406 /*--------------------------- END OF FIRMARES -----------------------------*/
2407 /*--------------------------------------------------------------------------*/
2410 * Function prototypes.
2412 static void sym_save_initial_setting (hcb_p np);
2413 static int sym_prepare_setting (hcb_p np, struct sym_nvram *nvram);
2414 static int sym_prepare_nego (hcb_p np, ccb_p cp, int nego, u_char *msgptr);
2415 static void sym_put_start_queue (hcb_p np, ccb_p cp);
2416 static void sym_chip_reset (hcb_p np);
2417 static void sym_soft_reset (hcb_p np);
2418 static void sym_start_reset (hcb_p np);
2419 static int sym_reset_scsi_bus (hcb_p np, int enab_int);
2420 static int sym_wakeup_done (hcb_p np);
2421 static void sym_flush_busy_queue (hcb_p np, int cam_status);
2422 static void sym_flush_comp_queue (hcb_p np, int cam_status);
2423 static void sym_init (hcb_p np, int reason);
2424 static int sym_getsync(hcb_p np, u_char dt, u_char sfac, u_char *divp,
2426 static void sym_setsync (hcb_p np, ccb_p cp, u_char ofs, u_char per,
2427 u_char div, u_char fak);
2428 static void sym_setwide (hcb_p np, ccb_p cp, u_char wide);
2429 static void sym_setpprot(hcb_p np, ccb_p cp, u_char dt, u_char ofs,
2430 u_char per, u_char wide, u_char div, u_char fak);
2431 static void sym_settrans(hcb_p np, ccb_p cp, u_char dt, u_char ofs,
2432 u_char per, u_char wide, u_char div, u_char fak);
2433 static void sym_log_hard_error (hcb_p np, u_short sist, u_char dstat);
2434 static void sym_intr (void *arg);
2435 static void sym_poll (struct cam_sim *sim);
2436 static void sym_recover_scsi_int (hcb_p np, u_char hsts);
2437 static void sym_int_sto (hcb_p np);
2438 static void sym_int_udc (hcb_p np);
2439 static void sym_int_sbmc (hcb_p np);
2440 static void sym_int_par (hcb_p np, u_short sist);
2441 static void sym_int_ma (hcb_p np);
2442 static int sym_dequeue_from_squeue(hcb_p np, int i, int target, int lun,
2444 static void sym_sir_bad_scsi_status (hcb_p np, int num, ccb_p cp);
2445 static int sym_clear_tasks (hcb_p np, int status, int targ, int lun, int task);
2446 static void sym_sir_task_recovery (hcb_p np, int num);
2447 static int sym_evaluate_dp (hcb_p np, ccb_p cp, u32 scr, int *ofs);
2448 static void sym_modify_dp (hcb_p np, tcb_p tp, ccb_p cp, int ofs);
2449 static int sym_compute_residual (hcb_p np, ccb_p cp);
2450 static int sym_show_msg (u_char * msg);
2451 static void sym_print_msg (ccb_p cp, char *label, u_char *msg);
2452 static void sym_sync_nego (hcb_p np, tcb_p tp, ccb_p cp);
2453 static void sym_ppr_nego (hcb_p np, tcb_p tp, ccb_p cp);
2454 static void sym_wide_nego (hcb_p np, tcb_p tp, ccb_p cp);
2455 static void sym_nego_default (hcb_p np, tcb_p tp, ccb_p cp);
2456 static void sym_nego_rejected (hcb_p np, tcb_p tp, ccb_p cp);
2457 static void sym_int_sir (hcb_p np);
2458 static void sym_free_ccb (hcb_p np, ccb_p cp);
2459 static ccb_p sym_get_ccb (hcb_p np, u_char tn, u_char ln, u_char tag_order);
2460 static ccb_p sym_alloc_ccb (hcb_p np);
2461 static ccb_p sym_ccb_from_dsa (hcb_p np, u32 dsa);
2462 static lcb_p sym_alloc_lcb (hcb_p np, u_char tn, u_char ln);
2463 static void sym_alloc_lcb_tags (hcb_p np, u_char tn, u_char ln);
2464 static int sym_snooptest (hcb_p np);
2465 static void sym_selectclock(hcb_p np, u_char scntl3);
2466 static void sym_getclock (hcb_p np, int mult);
2467 static int sym_getpciclock (hcb_p np);
2468 static void sym_complete_ok (hcb_p np, ccb_p cp);
2469 static void sym_complete_error (hcb_p np, ccb_p cp);
2470 static void sym_timeout (void *arg);
2471 static int sym_abort_scsiio (hcb_p np, union ccb *ccb, int timed_out);
2472 static void sym_reset_dev (hcb_p np, union ccb *ccb);
2473 static void sym_action (struct cam_sim *sim, union ccb *ccb);
2474 static void sym_action1 (struct cam_sim *sim, union ccb *ccb);
2475 static int sym_setup_cdb (hcb_p np, struct ccb_scsiio *csio, ccb_p cp);
2476 static void sym_setup_data_and_start (hcb_p np, struct ccb_scsiio *csio,
2478 #ifdef FreeBSD_Bus_Dma_Abstraction
2479 static int sym_fast_scatter_sg_physical(hcb_p np, ccb_p cp,
2480 bus_dma_segment_t *psegs, int nsegs);
2482 static int sym_scatter_virtual (hcb_p np, ccb_p cp, vm_offset_t vaddr,
2484 static int sym_scatter_sg_virtual (hcb_p np, ccb_p cp,
2485 bus_dma_segment_t *psegs, int nsegs);
2486 static int sym_scatter_physical (hcb_p np, ccb_p cp, vm_offset_t paddr,
2489 static int sym_scatter_sg_physical (hcb_p np, ccb_p cp,
2490 bus_dma_segment_t *psegs, int nsegs);
2491 static void sym_action2 (struct cam_sim *sim, union ccb *ccb);
2492 static void sym_update_trans (hcb_p np, tcb_p tp, struct sym_trans *tip,
2493 struct ccb_trans_settings *cts);
2494 static void sym_update_dflags(hcb_p np, u_char *flags,
2495 struct ccb_trans_settings *cts);
2497 #ifdef FreeBSD_Bus_Io_Abstraction
2498 static struct sym_pci_chip *sym_find_pci_chip (device_t dev);
2499 static int sym_pci_probe (device_t dev);
2500 static int sym_pci_attach (device_t dev);
2502 static struct sym_pci_chip *sym_find_pci_chip (pcici_t tag);
2503 static const char *sym_pci_probe (pcici_t tag, pcidi_t type);
2504 static void sym_pci_attach (pcici_t tag, int unit);
2505 static int sym_pci_attach2 (pcici_t tag, int unit);
2508 static void sym_pci_free (hcb_p np);
2509 static int sym_cam_attach (hcb_p np);
2510 static void sym_cam_free (hcb_p np);
2512 static void sym_nvram_setup_host (hcb_p np, struct sym_nvram *nvram);
2513 static void sym_nvram_setup_target (hcb_p np, int targ, struct sym_nvram *nvp);
2514 static int sym_read_nvram (hcb_p np, struct sym_nvram *nvp);
2517 * Print something which allows to retrieve the controler type,
2518 * unit, target, lun concerned by a kernel message.
2520 static void PRINT_TARGET (hcb_p np, int target)
2522 printf ("%s:%d:", sym_name(np), target);
2525 static void PRINT_LUN(hcb_p np, int target, int lun)
2527 printf ("%s:%d:%d:", sym_name(np), target, lun);
2530 static void PRINT_ADDR (ccb_p cp)
2532 if (cp && cp->cam_ccb)
2533 xpt_print_path(cp->cam_ccb->ccb_h.path);
2537 * Take into account this ccb in the freeze count.
2539 static void sym_freeze_cam_ccb(union ccb *ccb)
2541 if (!(ccb->ccb_h.flags & CAM_DEV_QFRZDIS)) {
2542 if (!(ccb->ccb_h.status & CAM_DEV_QFRZN)) {
2543 ccb->ccb_h.status |= CAM_DEV_QFRZN;
2544 xpt_freeze_devq(ccb->ccb_h.path, 1);
2550 * Set the status field of a CAM CCB.
2552 static __inline void sym_set_cam_status(union ccb *ccb, cam_status status)
2554 ccb->ccb_h.status &= ~CAM_STATUS_MASK;
2555 ccb->ccb_h.status |= status;
2559 * Get the status field of a CAM CCB.
2561 static __inline int sym_get_cam_status(union ccb *ccb)
2563 return ccb->ccb_h.status & CAM_STATUS_MASK;
2567 * Enqueue a CAM CCB.
2569 static void sym_enqueue_cam_ccb(hcb_p np, union ccb *ccb)
2571 assert(!(ccb->ccb_h.status & CAM_SIM_QUEUED));
2572 ccb->ccb_h.status = CAM_REQ_INPROG;
2574 ccb->ccb_h.timeout_ch = timeout(sym_timeout, (caddr_t) ccb,
2575 ccb->ccb_h.timeout*hz/1000);
2576 ccb->ccb_h.status |= CAM_SIM_QUEUED;
2577 ccb->ccb_h.sym_hcb_ptr = np;
2579 sym_insque_tail(sym_qptr(&ccb->ccb_h.sim_links), &np->cam_ccbq);
2583 * Complete a pending CAM CCB.
2585 static void sym_xpt_done(hcb_p np, union ccb *ccb)
2587 if (ccb->ccb_h.status & CAM_SIM_QUEUED) {
2588 untimeout(sym_timeout, (caddr_t) ccb, ccb->ccb_h.timeout_ch);
2589 sym_remque(sym_qptr(&ccb->ccb_h.sim_links));
2590 ccb->ccb_h.status &= ~CAM_SIM_QUEUED;
2591 ccb->ccb_h.sym_hcb_ptr = 0;
2593 if (ccb->ccb_h.flags & CAM_DEV_QFREEZE)
2594 sym_freeze_cam_ccb(ccb);
2598 static void sym_xpt_done2(hcb_p np, union ccb *ccb, int cam_status)
2600 sym_set_cam_status(ccb, cam_status);
2601 sym_xpt_done(np, ccb);
2605 * SYMBIOS chip clock divisor table.
2607 * Divisors are multiplied by 10,000,000 in order to make
2608 * calculations more simple.
2611 static u32 div_10M[] = {2*_5M, 3*_5M, 4*_5M, 6*_5M, 8*_5M, 12*_5M, 16*_5M};
2614 * SYMBIOS chips allow burst lengths of 2, 4, 8, 16, 32, 64,
2615 * 128 transfers. All chips support at least 16 transfers
2616 * bursts. The 825A, 875 and 895 chips support bursts of up
2617 * to 128 transfers and the 895A and 896 support bursts of up
2618 * to 64 transfers. All other chips support up to 16
2621 * For PCI 32 bit data transfers each transfer is a DWORD.
2622 * It is a QUADWORD (8 bytes) for PCI 64 bit data transfers.
2624 * We use log base 2 (burst length) as internal code, with
2625 * value 0 meaning "burst disabled".
2629 * Burst length from burst code.
2631 #define burst_length(bc) (!(bc))? 0 : 1 << (bc)
2634 * Burst code from io register bits.
2636 #define burst_code(dmode, ctest4, ctest5) \
2637 (ctest4) & 0x80? 0 : (((dmode) & 0xc0) >> 6) + ((ctest5) & 0x04) + 1
2640 * Set initial io register bits from burst code.
2642 static __inline void sym_init_burst(hcb_p np, u_char bc)
2644 np->rv_ctest4 &= ~0x80;
2645 np->rv_dmode &= ~(0x3 << 6);
2646 np->rv_ctest5 &= ~0x4;
2649 np->rv_ctest4 |= 0x80;
2653 np->rv_dmode |= ((bc & 0x3) << 6);
2654 np->rv_ctest5 |= (bc & 0x4);
2660 * Print out the list of targets that have some flag disabled by user.
2662 static void sym_print_targets_flag(hcb_p np, int mask, char *msg)
2667 for (cnt = 0, i = 0 ; i < SYM_CONF_MAX_TARGET ; i++) {
2668 if (i == np->myaddr)
2670 if (np->target[i].usrflags & mask) {
2672 printf("%s: %s disabled for targets",
2682 * Save initial settings of some IO registers.
2683 * Assumed to have been set by BIOS.
2684 * We cannot reset the chip prior to reading the
2685 * IO registers, since informations will be lost.
2686 * Since the SCRIPTS processor may be running, this
2687 * is not safe on paper, but it seems to work quite
2690 static void sym_save_initial_setting (hcb_p np)
2692 np->sv_scntl0 = INB(nc_scntl0) & 0x0a;
2693 np->sv_scntl3 = INB(nc_scntl3) & 0x07;
2694 np->sv_dmode = INB(nc_dmode) & 0xce;
2695 np->sv_dcntl = INB(nc_dcntl) & 0xa8;
2696 np->sv_ctest3 = INB(nc_ctest3) & 0x01;
2697 np->sv_ctest4 = INB(nc_ctest4) & 0x80;
2698 np->sv_gpcntl = INB(nc_gpcntl);
2699 np->sv_stest1 = INB(nc_stest1);
2700 np->sv_stest2 = INB(nc_stest2) & 0x20;
2701 np->sv_stest4 = INB(nc_stest4);
2702 if (np->features & FE_C10) { /* Always large DMA fifo + ultra3 */
2703 np->sv_scntl4 = INB(nc_scntl4);
2704 np->sv_ctest5 = INB(nc_ctest5) & 0x04;
2707 np->sv_ctest5 = INB(nc_ctest5) & 0x24;
2711 * Prepare io register values used by sym_init() according
2712 * to selected and supported features.
2714 static int sym_prepare_setting(hcb_p np, struct sym_nvram *nvram)
2723 np->maxwide = (np->features & FE_WIDE)? 1 : 0;
2726 * Get the frequency of the chip's clock.
2728 if (np->features & FE_QUAD)
2730 else if (np->features & FE_DBLR)
2735 np->clock_khz = (np->features & FE_CLK80)? 80000 : 40000;
2736 np->clock_khz *= np->multiplier;
2738 if (np->clock_khz != 40000)
2739 sym_getclock(np, np->multiplier);
2742 * Divisor to be used for async (timer pre-scaler).
2744 i = np->clock_divn - 1;
2746 if (10ul * SYM_CONF_MIN_ASYNC * np->clock_khz > div_10M[i]) {
2751 np->rv_scntl3 = i+1;
2754 * The C1010 uses hardwired divisors for async.
2755 * So, we just throw away, the async. divisor.:-)
2757 if (np->features & FE_C10)
2761 * Minimum synchronous period factor supported by the chip.
2762 * Btw, 'period' is in tenths of nanoseconds.
2764 period = (4 * div_10M[0] + np->clock_khz - 1) / np->clock_khz;
2765 if (period <= 250) np->minsync = 10;
2766 else if (period <= 303) np->minsync = 11;
2767 else if (period <= 500) np->minsync = 12;
2768 else np->minsync = (period + 40 - 1) / 40;
2771 * Check against chip SCSI standard support (SCSI-2,ULTRA,ULTRA2).
2773 if (np->minsync < 25 &&
2774 !(np->features & (FE_ULTRA|FE_ULTRA2|FE_ULTRA3)))
2776 else if (np->minsync < 12 &&
2777 !(np->features & (FE_ULTRA2|FE_ULTRA3)))
2781 * Maximum synchronous period factor supported by the chip.
2783 period = (11 * div_10M[np->clock_divn - 1]) / (4 * np->clock_khz);
2784 np->maxsync = period > 2540 ? 254 : period / 10;
2787 * If chip is a C1010, guess the sync limits in DT mode.
2789 if ((np->features & (FE_C10|FE_ULTRA3)) == (FE_C10|FE_ULTRA3)) {
2790 if (np->clock_khz == 160000) {
2792 np->maxsync_dt = 50;
2793 np->maxoffs_dt = 62;
2798 * 64 bit addressing (895A/896/1010) ?
2800 if (np->features & FE_DAC)
2801 #if BITS_PER_LONG > 32
2802 np->rv_ccntl1 |= (XTIMOD | EXTIBMV);
2804 np->rv_ccntl1 |= (DDAC);
2808 * Phase mismatch handled by SCRIPTS (895A/896/1010) ?
2810 if (np->features & FE_NOPM)
2811 np->rv_ccntl0 |= (ENPMJ);
2815 * In dual channel mode, contention occurs if internal cycles
2816 * are used. Disable internal cycles.
2818 if (np->device_id == PCI_ID_LSI53C1010 &&
2819 np->revision_id < 0x2)
2820 np->rv_ccntl0 |= DILS;
2823 * Select burst length (dwords)
2825 burst_max = SYM_SETUP_BURST_ORDER;
2826 if (burst_max == 255)
2827 burst_max = burst_code(np->sv_dmode, np->sv_ctest4,
2831 if (burst_max > np->maxburst)
2832 burst_max = np->maxburst;
2835 * DEL 352 - 53C810 Rev x11 - Part Number 609-0392140 - ITEM 2.
2836 * This chip and the 860 Rev 1 may wrongly use PCI cache line
2837 * based transactions on LOAD/STORE instructions. So we have
2838 * to prevent these chips from using such PCI transactions in
2839 * this driver. The generic ncr driver that does not use
2840 * LOAD/STORE instructions does not need this work-around.
2842 if ((np->device_id == PCI_ID_SYM53C810 &&
2843 np->revision_id >= 0x10 && np->revision_id <= 0x11) ||
2844 (np->device_id == PCI_ID_SYM53C860 &&
2845 np->revision_id <= 0x1))
2846 np->features &= ~(FE_WRIE|FE_ERL|FE_ERMP);
2849 * Select all supported special features.
2850 * If we are using on-board RAM for scripts, prefetch (PFEN)
2851 * does not help, but burst op fetch (BOF) does.
2852 * Disabling PFEN makes sure BOF will be used.
2854 if (np->features & FE_ERL)
2855 np->rv_dmode |= ERL; /* Enable Read Line */
2856 if (np->features & FE_BOF)
2857 np->rv_dmode |= BOF; /* Burst Opcode Fetch */
2858 if (np->features & FE_ERMP)
2859 np->rv_dmode |= ERMP; /* Enable Read Multiple */
2861 if ((np->features & FE_PFEN) && !np->ram_ba)
2863 if (np->features & FE_PFEN)
2865 np->rv_dcntl |= PFEN; /* Prefetch Enable */
2866 if (np->features & FE_CLSE)
2867 np->rv_dcntl |= CLSE; /* Cache Line Size Enable */
2868 if (np->features & FE_WRIE)
2869 np->rv_ctest3 |= WRIE; /* Write and Invalidate */
2870 if (np->features & FE_DFS)
2871 np->rv_ctest5 |= DFS; /* Dma Fifo Size */
2876 if (SYM_SETUP_PCI_PARITY)
2877 np->rv_ctest4 |= MPEE; /* Master parity checking */
2878 if (SYM_SETUP_SCSI_PARITY)
2879 np->rv_scntl0 |= 0x0a; /* full arb., ena parity, par->ATN */
2882 * Get parity checking, host ID and verbose mode from NVRAM
2885 sym_nvram_setup_host (np, nvram);
2888 * Get SCSI addr of host adapter (set by bios?).
2890 if (np->myaddr == 255) {
2891 np->myaddr = INB(nc_scid) & 0x07;
2893 np->myaddr = SYM_SETUP_HOST_ID;
2897 * Prepare initial io register bits for burst length
2899 sym_init_burst(np, burst_max);
2902 * Set SCSI BUS mode.
2903 * - LVD capable chips (895/895A/896/1010) report the
2904 * current BUS mode through the STEST4 IO register.
2905 * - For previous generation chips (825/825A/875),
2906 * user has to tell us how to check against HVD,
2907 * since a 100% safe algorithm is not possible.
2909 np->scsi_mode = SMODE_SE;
2910 if (np->features & (FE_ULTRA2|FE_ULTRA3))
2911 np->scsi_mode = (np->sv_stest4 & SMODE);
2912 else if (np->features & FE_DIFF) {
2913 if (SYM_SETUP_SCSI_DIFF == 1) {
2914 if (np->sv_scntl3) {
2915 if (np->sv_stest2 & 0x20)
2916 np->scsi_mode = SMODE_HVD;
2918 else if (nvram->type == SYM_SYMBIOS_NVRAM) {
2919 if (!(INB(nc_gpreg) & 0x08))
2920 np->scsi_mode = SMODE_HVD;
2923 else if (SYM_SETUP_SCSI_DIFF == 2)
2924 np->scsi_mode = SMODE_HVD;
2926 if (np->scsi_mode == SMODE_HVD)
2927 np->rv_stest2 |= 0x20;
2930 * Set LED support from SCRIPTS.
2931 * Ignore this feature for boards known to use a
2932 * specific GPIO wiring and for the 895A, 896
2933 * and 1010 that drive the LED directly.
2935 if ((SYM_SETUP_SCSI_LED ||
2936 (nvram->type == SYM_SYMBIOS_NVRAM ||
2937 (nvram->type == SYM_TEKRAM_NVRAM &&
2938 np->device_id == PCI_ID_SYM53C895))) &&
2939 !(np->features & FE_LEDC) && !(np->sv_gpcntl & 0x01))
2940 np->features |= FE_LED0;
2945 switch(SYM_SETUP_IRQ_MODE & 3) {
2947 np->rv_dcntl |= IRQM;
2950 np->rv_dcntl |= (np->sv_dcntl & IRQM);
2957 * Configure targets according to driver setup.
2958 * If NVRAM present get targets setup from NVRAM.
2960 for (i = 0 ; i < SYM_CONF_MAX_TARGET ; i++) {
2961 tcb_p tp = &np->target[i];
2963 #ifdef FreeBSD_New_Tran_Settings
2964 tp->tinfo.user.scsi_version = tp->tinfo.current.scsi_version= 2;
2965 tp->tinfo.user.spi_version = tp->tinfo.current.spi_version = 2;
2967 tp->tinfo.user.period = np->minsync;
2968 tp->tinfo.user.offset = np->maxoffs;
2969 tp->tinfo.user.width = np->maxwide ? BUS_16_BIT : BUS_8_BIT;
2970 tp->usrflags |= (SYM_DISC_ENABLED | SYM_TAGS_ENABLED);
2971 tp->usrtags = SYM_SETUP_MAX_TAG;
2973 sym_nvram_setup_target (np, i, nvram);
2976 * For now, guess PPR/DT support from the period
2979 if (np->features & FE_ULTRA3) {
2980 if (tp->tinfo.user.period <= 9 &&
2981 tp->tinfo.user.width == BUS_16_BIT) {
2982 tp->tinfo.user.options |= PPR_OPT_DT;
2983 tp->tinfo.user.offset = np->maxoffs_dt;
2984 #ifdef FreeBSD_New_Tran_Settings
2985 tp->tinfo.user.spi_version = 3;
2991 tp->usrflags &= ~SYM_TAGS_ENABLED;
2995 * Let user know about the settings.
2998 printf("%s: %s NVRAM, ID %d, Fast-%d, %s, %s\n", sym_name(np),
2999 i == SYM_SYMBIOS_NVRAM ? "Symbios" :
3000 (i == SYM_TEKRAM_NVRAM ? "Tekram" : "No"),
3002 (np->features & FE_ULTRA3) ? 80 :
3003 (np->features & FE_ULTRA2) ? 40 :
3004 (np->features & FE_ULTRA) ? 20 : 10,
3005 sym_scsi_bus_mode(np->scsi_mode),
3006 (np->rv_scntl0 & 0xa) ? "parity checking" : "NO parity");
3008 * Tell him more on demand.
3011 printf("%s: %s IRQ line driver%s\n",
3013 np->rv_dcntl & IRQM ? "totem pole" : "open drain",
3014 np->ram_ba ? ", using on-chip SRAM" : "");
3015 printf("%s: using %s firmware.\n", sym_name(np), np->fw_name);
3016 if (np->features & FE_NOPM)
3017 printf("%s: handling phase mismatch from SCRIPTS.\n",
3023 if (sym_verbose > 1) {
3024 printf ("%s: initial SCNTL3/DMODE/DCNTL/CTEST3/4/5 = "
3025 "(hex) %02x/%02x/%02x/%02x/%02x/%02x\n",
3026 sym_name(np), np->sv_scntl3, np->sv_dmode, np->sv_dcntl,
3027 np->sv_ctest3, np->sv_ctest4, np->sv_ctest5);
3029 printf ("%s: final SCNTL3/DMODE/DCNTL/CTEST3/4/5 = "
3030 "(hex) %02x/%02x/%02x/%02x/%02x/%02x\n",
3031 sym_name(np), np->rv_scntl3, np->rv_dmode, np->rv_dcntl,
3032 np->rv_ctest3, np->rv_ctest4, np->rv_ctest5);
3035 * Let user be aware of targets that have some disable flags set.
3037 sym_print_targets_flag(np, SYM_SCAN_BOOT_DISABLED, "SCAN AT BOOT");
3039 sym_print_targets_flag(np, SYM_SCAN_LUNS_DISABLED,
3046 * Prepare the next negotiation message if needed.
3048 * Fill in the part of message buffer that contains the
3049 * negotiation and the nego_status field of the CCB.
3050 * Returns the size of the message in bytes.
3053 static int sym_prepare_nego(hcb_p np, ccb_p cp, int nego, u_char *msgptr)
3055 tcb_p tp = &np->target[cp->target];
3059 * Early C1010 chips need a work-around for DT
3060 * data transfer to work.
3062 if (!(np->features & FE_U3EN))
3063 tp->tinfo.goal.options = 0;
3065 * negotiate using PPR ?
3067 if (tp->tinfo.goal.options & PPR_OPT_MASK)
3070 * negotiate wide transfers ?
3072 else if (tp->tinfo.current.width != tp->tinfo.goal.width)
3075 * negotiate synchronous transfers?
3077 else if (tp->tinfo.current.period != tp->tinfo.goal.period ||
3078 tp->tinfo.current.offset != tp->tinfo.goal.offset)
3083 msgptr[msglen++] = M_EXTENDED;
3084 msgptr[msglen++] = 3;
3085 msgptr[msglen++] = M_X_SYNC_REQ;
3086 msgptr[msglen++] = tp->tinfo.goal.period;
3087 msgptr[msglen++] = tp->tinfo.goal.offset;
3090 msgptr[msglen++] = M_EXTENDED;
3091 msgptr[msglen++] = 2;
3092 msgptr[msglen++] = M_X_WIDE_REQ;
3093 msgptr[msglen++] = tp->tinfo.goal.width;
3096 msgptr[msglen++] = M_EXTENDED;
3097 msgptr[msglen++] = 6;
3098 msgptr[msglen++] = M_X_PPR_REQ;
3099 msgptr[msglen++] = tp->tinfo.goal.period;
3100 msgptr[msglen++] = 0;
3101 msgptr[msglen++] = tp->tinfo.goal.offset;
3102 msgptr[msglen++] = tp->tinfo.goal.width;
3103 msgptr[msglen++] = tp->tinfo.goal.options & PPR_OPT_DT;
3107 cp->nego_status = nego;
3110 tp->nego_cp = cp; /* Keep track a nego will be performed */
3111 if (DEBUG_FLAGS & DEBUG_NEGO) {
3112 sym_print_msg(cp, nego == NS_SYNC ? "sync msgout" :
3113 nego == NS_WIDE ? "wide msgout" :
3114 "ppr msgout", msgptr);
3122 * Insert a job into the start queue.
3124 static void sym_put_start_queue(hcb_p np, ccb_p cp)
3128 #ifdef SYM_CONF_IARB_SUPPORT
3130 * If the previously queued CCB is not yet done,
3131 * set the IARB hint. The SCRIPTS will go with IARB
3132 * for this job when starting the previous one.
3133 * We leave devices a chance to win arbitration by
3134 * not using more than 'iarb_max' consecutive
3135 * immediate arbitrations.
3137 if (np->last_cp && np->iarb_count < np->iarb_max) {
3138 np->last_cp->host_flags |= HF_HINT_IARB;
3147 * Insert first the idle task and then our job.
3148 * The MB should ensure proper ordering.
3150 qidx = np->squeueput + 2;
3151 if (qidx >= MAX_QUEUE*2) qidx = 0;
3153 np->squeue [qidx] = cpu_to_scr(np->idletask_ba);
3155 np->squeue [np->squeueput] = cpu_to_scr(cp->ccb_ba);
3157 np->squeueput = qidx;
3159 if (DEBUG_FLAGS & DEBUG_QUEUE)
3160 printf ("%s: queuepos=%d.\n", sym_name (np), np->squeueput);
3163 * Script processor may be waiting for reselect.
3167 OUTB (nc_istat, SIGP|np->istat_sem);
3172 * Soft reset the chip.
3174 * Raising SRST when the chip is running may cause
3175 * problems on dual function chips (see below).
3176 * On the other hand, LVD devices need some delay
3177 * to settle and report actual BUS mode in STEST4.
3179 static void sym_chip_reset (hcb_p np)
3181 OUTB (nc_istat, SRST);
3184 UDELAY(2000); /* For BUS MODE to settle */
3188 * Soft reset the chip.
3190 * Some 896 and 876 chip revisions may hang-up if we set
3191 * the SRST (soft reset) bit at the wrong time when SCRIPTS
3193 * So, we need to abort the current operation prior to
3194 * soft resetting the chip.
3196 static void sym_soft_reset (hcb_p np)
3201 OUTB (nc_istat, CABRT);
3202 for (i = 1000000 ; i ; --i) {
3203 istat = INB (nc_istat);
3215 printf("%s: unable to abort current chip operation.\n",
3217 sym_chip_reset (np);
3221 * Start reset process.
3223 * The interrupt handler will reinitialize the chip.
3225 static void sym_start_reset(hcb_p np)
3227 (void) sym_reset_scsi_bus(np, 1);
3230 static int sym_reset_scsi_bus(hcb_p np, int enab_int)
3235 sym_soft_reset(np); /* Soft reset the chip */
3237 OUTW (nc_sien, RST);
3239 * Enable Tolerant, reset IRQD if present and
3240 * properly set IRQ mode, prior to resetting the bus.
3242 OUTB (nc_stest3, TE);
3243 OUTB (nc_dcntl, (np->rv_dcntl & IRQM));
3244 OUTB (nc_scntl1, CRST);
3247 if (!SYM_SETUP_SCSI_BUS_CHECK)
3250 * Check for no terminators or SCSI bus shorts to ground.
3251 * Read SCSI data bus, data parity bits and control signals.
3252 * We are expecting RESET to be TRUE and other signals to be
3255 term = INB(nc_sstat0);
3256 term = ((term & 2) << 7) + ((term & 1) << 17); /* rst sdp0 */
3257 term |= ((INB(nc_sstat2) & 0x01) << 26) | /* sdp1 */
3258 ((INW(nc_sbdl) & 0xff) << 9) | /* d7-0 */
3259 ((INW(nc_sbdl) & 0xff00) << 10) | /* d15-8 */
3260 INB(nc_sbcl); /* req ack bsy sel atn msg cd io */
3262 if (!(np->features & FE_WIDE))
3265 if (term != (2<<7)) {
3266 printf("%s: suspicious SCSI data while resetting the BUS.\n",
3268 printf("%s: %sdp0,d7-0,rst,req,ack,bsy,sel,atn,msg,c/d,i/o = "
3269 "0x%lx, expecting 0x%lx\n",
3271 (np->features & FE_WIDE) ? "dp1,d15-8," : "",
3272 (u_long)term, (u_long)(2<<7));
3273 if (SYM_SETUP_SCSI_BUS_CHECK == 1)
3277 OUTB (nc_scntl1, 0);
3283 * The chip may have completed jobs. Look at the DONE QUEUE.
3285 * On architectures that may reorder LOAD/STORE operations,
3286 * a memory barrier may be needed after the reading of the
3287 * so-called `flag' and prior to dealing with the data.
3289 static int sym_wakeup_done (hcb_p np)
3298 dsa = scr_to_cpu(np->dqueue[i]);
3302 if ((i = i+2) >= MAX_QUEUE*2)
3305 cp = sym_ccb_from_dsa(np, dsa);
3308 sym_complete_ok (np, cp);
3312 printf ("%s: bad DSA (%x) in done queue.\n",
3313 sym_name(np), (u_int) dsa);
3321 * Complete all active CCBs with error.
3322 * Used on CHIP/SCSI RESET.
3324 static void sym_flush_busy_queue (hcb_p np, int cam_status)
3327 * Move all active CCBs to the COMP queue
3328 * and flush this queue.
3330 sym_que_splice(&np->busy_ccbq, &np->comp_ccbq);
3331 sym_que_init(&np->busy_ccbq);
3332 sym_flush_comp_queue(np, cam_status);
3339 * 0: initialisation.
3340 * 1: SCSI BUS RESET delivered or received.
3341 * 2: SCSI BUS MODE changed.
3343 static void sym_init (hcb_p np, int reason)
3349 * Reset chip if asked, otherwise just clear fifos.
3354 OUTB (nc_stest3, TE|CSF);
3355 OUTONB (nc_ctest3, CLF);
3361 phys = np->squeue_ba;
3362 for (i = 0; i < MAX_QUEUE*2; i += 2) {
3363 np->squeue[i] = cpu_to_scr(np->idletask_ba);
3364 np->squeue[i+1] = cpu_to_scr(phys + (i+2)*4);
3366 np->squeue[MAX_QUEUE*2-1] = cpu_to_scr(phys);
3369 * Start at first entry.
3376 phys = np->dqueue_ba;
3377 for (i = 0; i < MAX_QUEUE*2; i += 2) {
3379 np->dqueue[i+1] = cpu_to_scr(phys + (i+2)*4);
3381 np->dqueue[MAX_QUEUE*2-1] = cpu_to_scr(phys);
3384 * Start at first entry.
3389 * Install patches in scripts.
3390 * This also let point to first position the start
3391 * and done queue pointers used from SCRIPTS.
3396 * Wakeup all pending jobs.
3398 sym_flush_busy_queue(np, CAM_SCSI_BUS_RESET);
3403 OUTB (nc_istat, 0x00 ); /* Remove Reset, abort */
3404 UDELAY (2000); /* The 895 needs time for the bus mode to settle */
3406 OUTB (nc_scntl0, np->rv_scntl0 | 0xc0);
3407 /* full arb., ena parity, par->ATN */
3408 OUTB (nc_scntl1, 0x00); /* odd parity, and remove CRST!! */
3410 sym_selectclock(np, np->rv_scntl3); /* Select SCSI clock */
3412 OUTB (nc_scid , RRE|np->myaddr); /* Adapter SCSI address */
3413 OUTW (nc_respid, 1ul<<np->myaddr); /* Id to respond to */
3414 OUTB (nc_istat , SIGP ); /* Signal Process */
3415 OUTB (nc_dmode , np->rv_dmode); /* Burst length, dma mode */
3416 OUTB (nc_ctest5, np->rv_ctest5); /* Large fifo + large burst */
3418 OUTB (nc_dcntl , NOCOM|np->rv_dcntl); /* Protect SFBR */
3419 OUTB (nc_ctest3, np->rv_ctest3); /* Write and invalidate */
3420 OUTB (nc_ctest4, np->rv_ctest4); /* Master parity checking */
3422 /* Extended Sreq/Sack filtering not supported on the C10 */
3423 if (np->features & FE_C10)
3424 OUTB (nc_stest2, np->rv_stest2);
3426 OUTB (nc_stest2, EXT|np->rv_stest2);
3428 OUTB (nc_stest3, TE); /* TolerANT enable */
3429 OUTB (nc_stime0, 0x0c); /* HTH disabled STO 0.25 sec */
3432 * For now, disable AIP generation on C1010-66.
3434 if (np->device_id == PCI_ID_LSI53C1010_2)
3435 OUTB (nc_aipcntl1, DISAIP);
3439 * Errant SGE's when in narrow. Write bits 4 & 5 of
3440 * STEST1 register to disable SGE. We probably should do
3441 * that from SCRIPTS for each selection/reselection, but
3442 * I just don't want. :)
3444 if (np->device_id == PCI_ID_LSI53C1010 &&
3445 /* np->revision_id < 0xff */ 1)
3446 OUTB (nc_stest1, INB(nc_stest1) | 0x30);
3449 * DEL 441 - 53C876 Rev 5 - Part Number 609-0392787/2788 - ITEM 2.
3450 * Disable overlapped arbitration for some dual function devices,
3451 * regardless revision id (kind of post-chip-design feature. ;-))
3453 if (np->device_id == PCI_ID_SYM53C875)
3454 OUTB (nc_ctest0, (1<<5));
3455 else if (np->device_id == PCI_ID_SYM53C896)
3456 np->rv_ccntl0 |= DPR;
3459 * Write CCNTL0/CCNTL1 for chips capable of 64 bit addressing
3460 * and/or hardware phase mismatch, since only such chips
3461 * seem to support those IO registers.
3463 if (np->features & (FE_DAC|FE_NOPM)) {
3464 OUTB (nc_ccntl0, np->rv_ccntl0);
3465 OUTB (nc_ccntl1, np->rv_ccntl1);
3469 * If phase mismatch handled by scripts (895A/896/1010),
3470 * set PM jump addresses.
3472 if (np->features & FE_NOPM) {
3473 OUTL (nc_pmjad1, SCRIPTB_BA (np, pm_handle));
3474 OUTL (nc_pmjad2, SCRIPTB_BA (np, pm_handle));
3478 * Enable GPIO0 pin for writing if LED support from SCRIPTS.
3479 * Also set GPIO5 and clear GPIO6 if hardware LED control.
3481 if (np->features & FE_LED0)
3482 OUTB(nc_gpcntl, INB(nc_gpcntl) & ~0x01);
3483 else if (np->features & FE_LEDC)
3484 OUTB(nc_gpcntl, (INB(nc_gpcntl) & ~0x41) | 0x20);
3489 OUTW (nc_sien , STO|HTH|MA|SGE|UDC|RST|PAR);
3490 OUTB (nc_dien , MDPE|BF|SSI|SIR|IID);
3493 * For 895/6 enable SBMC interrupt and save current SCSI bus mode.
3494 * Try to eat the spurious SBMC interrupt that may occur when
3495 * we reset the chip but not the SCSI BUS (at initialization).
3497 if (np->features & (FE_ULTRA2|FE_ULTRA3)) {
3498 OUTONW (nc_sien, SBMC);
3503 np->scsi_mode = INB (nc_stest4) & SMODE;
3507 * Fill in target structure.
3508 * Reinitialize usrsync.
3509 * Reinitialize usrwide.
3510 * Prepare sync negotiation according to actual SCSI bus mode.
3512 for (i=0;i<SYM_CONF_MAX_TARGET;i++) {
3513 tcb_p tp = &np->target[i];
3517 tp->head.wval = np->rv_scntl3;
3520 tp->tinfo.current.period = 0;
3521 tp->tinfo.current.offset = 0;
3522 tp->tinfo.current.width = BUS_8_BIT;
3523 tp->tinfo.current.options = 0;
3527 * Download SCSI SCRIPTS to on-chip RAM if present,
3528 * and start script processor.
3531 if (sym_verbose > 1)
3532 printf ("%s: Downloading SCSI SCRIPTS.\n",
3534 if (np->ram_ws == 8192) {
3535 OUTRAM_OFF(4096, np->scriptb0, np->scriptb_sz);
3536 OUTL (nc_mmws, np->scr_ram_seg);
3537 OUTL (nc_mmrs, np->scr_ram_seg);
3538 OUTL (nc_sfs, np->scr_ram_seg);
3539 phys = SCRIPTB_BA (np, start64);
3542 phys = SCRIPTA_BA (np, init);
3543 OUTRAM_OFF(0, np->scripta0, np->scripta_sz);
3546 phys = SCRIPTA_BA (np, init);
3550 OUTL (nc_dsa, np->hcb_ba);
3554 * Notify the XPT about the RESET condition.
3557 xpt_async(AC_BUS_RESET, np->path, NULL);
3561 * Get clock factor and sync divisor for a given
3562 * synchronous factor period.
3565 sym_getsync(hcb_p np, u_char dt, u_char sfac, u_char *divp, u_char *fakp)
3567 u32 clk = np->clock_khz; /* SCSI clock frequency in kHz */
3568 int div = np->clock_divn; /* Number of divisors supported */
3569 u32 fak; /* Sync factor in sxfer */
3570 u32 per; /* Period in tenths of ns */
3571 u32 kpc; /* (per * clk) */
3575 * Compute the synchronous period in tenths of nano-seconds
3577 if (dt && sfac <= 9) per = 125;
3578 else if (sfac <= 10) per = 250;
3579 else if (sfac == 11) per = 303;
3580 else if (sfac == 12) per = 500;
3581 else per = 40 * sfac;
3589 * For earliest C10 revision 0, we cannot use extra
3590 * clocks for the setting of the SCSI clocking.
3591 * Note that this limits the lowest sync data transfer
3592 * to 5 Mega-transfers per second and may result in
3593 * using higher clock divisors.
3596 if ((np->features & (FE_C10|FE_U3EN)) == FE_C10) {
3598 * Look for the lowest clock divisor that allows an
3599 * output speed not faster than the period.
3603 if (kpc > (div_10M[div] << 2)) {
3608 fak = 0; /* No extra clocks */
3609 if (div == np->clock_divn) { /* Are we too fast ? */
3619 * Look for the greatest clock divisor that allows an
3620 * input speed faster than the period.
3623 if (kpc >= (div_10M[div] << 2)) break;
3626 * Calculate the lowest clock factor that allows an output
3627 * speed not faster than the period, and the max output speed.
3628 * If fak >= 1 we will set both XCLKH_ST and XCLKH_DT.
3629 * If fak >= 2 we will also set XCLKS_ST and XCLKS_DT.
3632 fak = (kpc - 1) / (div_10M[div] << 1) + 1 - 2;
3633 /* ret = ((2+fak)*div_10M[div])/np->clock_khz; */
3636 fak = (kpc - 1) / div_10M[div] + 1 - 4;
3637 /* ret = ((4+fak)*div_10M[div])/np->clock_khz; */
3641 * Check against our hardware limits, or bugs :).
3643 if (fak < 0) {fak = 0; ret = -1;}
3644 if (fak > 2) {fak = 2; ret = -1;}
3647 * Compute and return sync parameters.
3656 * Tell the SCSI layer about the new transfer parameters.
3659 sym_xpt_async_transfer_neg(hcb_p np, int target, u_int spi_valid)
3661 struct ccb_trans_settings cts;
3662 struct cam_path *path;
3664 tcb_p tp = &np->target[target];
3666 sts = xpt_create_path(&path, NULL, cam_sim_path(np->sim), target,
3668 if (sts != CAM_REQ_CMP)
3671 bzero(&cts, sizeof(cts));
3673 #ifdef FreeBSD_New_Tran_Settings
3674 #define cts__scsi (cts.proto_specific.scsi)
3675 #define cts__spi (cts.xport_specific.spi)
3677 cts.type = CTS_TYPE_CURRENT_SETTINGS;
3678 cts.protocol = PROTO_SCSI;
3679 cts.transport = XPORT_SPI;
3680 cts.protocol_version = tp->tinfo.current.scsi_version;
3681 cts.transport_version = tp->tinfo.current.spi_version;
3683 cts__spi.valid = spi_valid;
3684 if (spi_valid & CTS_SPI_VALID_SYNC_RATE)
3685 cts__spi.sync_period = tp->tinfo.current.period;
3686 if (spi_valid & CTS_SPI_VALID_SYNC_OFFSET)
3687 cts__spi.sync_offset = tp->tinfo.current.offset;
3688 if (spi_valid & CTS_SPI_VALID_BUS_WIDTH)
3689 cts__spi.bus_width = tp->tinfo.current.width;
3690 if (spi_valid & CTS_SPI_VALID_PPR_OPTIONS)
3691 cts__spi.ppr_options = tp->tinfo.current.options;
3695 cts.valid = spi_valid;
3696 if (spi_valid & CCB_TRANS_SYNC_RATE_VALID)
3697 cts.sync_period = tp->tinfo.current.period;
3698 if (spi_valid & CCB_TRANS_SYNC_OFFSET_VALID)
3699 cts.sync_offset = tp->tinfo.current.offset;
3700 if (spi_valid & CCB_TRANS_BUS_WIDTH_VALID)
3701 cts.bus_width = tp->tinfo.current.width;
3703 xpt_setup_ccb(&cts.ccb_h, path, /*priority*/1);
3704 xpt_async(AC_TRANSFER_NEG, path, &cts);
3705 xpt_free_path(path);
3708 #ifdef FreeBSD_New_Tran_Settings
3709 #define SYM_SPI_VALID_WDTR \
3710 CTS_SPI_VALID_BUS_WIDTH | \
3711 CTS_SPI_VALID_SYNC_RATE | \
3712 CTS_SPI_VALID_SYNC_OFFSET
3713 #define SYM_SPI_VALID_SDTR \
3714 CTS_SPI_VALID_SYNC_RATE | \
3715 CTS_SPI_VALID_SYNC_OFFSET
3716 #define SYM_SPI_VALID_PPR \
3717 CTS_SPI_VALID_PPR_OPTIONS | \
3718 CTS_SPI_VALID_BUS_WIDTH | \
3719 CTS_SPI_VALID_SYNC_RATE | \
3720 CTS_SPI_VALID_SYNC_OFFSET
3722 #define SYM_SPI_VALID_WDTR \
3723 CCB_TRANS_BUS_WIDTH_VALID | \
3724 CCB_TRANS_SYNC_RATE_VALID | \
3725 CCB_TRANS_SYNC_OFFSET_VALID
3726 #define SYM_SPI_VALID_SDTR \
3727 CCB_TRANS_SYNC_RATE_VALID | \
3728 CCB_TRANS_SYNC_OFFSET_VALID
3729 #define SYM_SPI_VALID_PPR \
3730 CCB_TRANS_BUS_WIDTH_VALID | \
3731 CCB_TRANS_SYNC_RATE_VALID | \
3732 CCB_TRANS_SYNC_OFFSET_VALID
3736 * We received a WDTR.
3737 * Let everything be aware of the changes.
3739 static void sym_setwide(hcb_p np, ccb_p cp, u_char wide)
3741 tcb_p tp = &np->target[cp->target];
3743 sym_settrans(np, cp, 0, 0, 0, wide, 0, 0);
3746 * Tell the SCSI layer about the new transfer parameters.
3748 tp->tinfo.goal.width = tp->tinfo.current.width = wide;
3749 tp->tinfo.current.offset = 0;
3750 tp->tinfo.current.period = 0;
3751 tp->tinfo.current.options = 0;
3753 sym_xpt_async_transfer_neg(np, cp->target, SYM_SPI_VALID_WDTR);
3757 * We received a SDTR.
3758 * Let everything be aware of the changes.
3761 sym_setsync(hcb_p np, ccb_p cp, u_char ofs, u_char per, u_char div, u_char fak)
3763 tcb_p tp = &np->target[cp->target];
3764 u_char wide = (cp->phys.select.sel_scntl3 & EWS) ? 1 : 0;
3766 sym_settrans(np, cp, 0, ofs, per, wide, div, fak);
3769 * Tell the SCSI layer about the new transfer parameters.
3771 tp->tinfo.goal.period = tp->tinfo.current.period = per;
3772 tp->tinfo.goal.offset = tp->tinfo.current.offset = ofs;
3773 tp->tinfo.goal.options = tp->tinfo.current.options = 0;
3775 sym_xpt_async_transfer_neg(np, cp->target, SYM_SPI_VALID_SDTR);
3779 * We received a PPR.
3780 * Let everything be aware of the changes.
3782 static void sym_setpprot(hcb_p np, ccb_p cp, u_char dt, u_char ofs,
3783 u_char per, u_char wide, u_char div, u_char fak)
3785 tcb_p tp = &np->target[cp->target];
3787 sym_settrans(np, cp, dt, ofs, per, wide, div, fak);
3790 * Tell the SCSI layer about the new transfer parameters.
3792 tp->tinfo.goal.width = tp->tinfo.current.width = wide;
3793 tp->tinfo.goal.period = tp->tinfo.current.period = per;
3794 tp->tinfo.goal.offset = tp->tinfo.current.offset = ofs;
3795 tp->tinfo.goal.options = tp->tinfo.current.options = dt;
3797 sym_xpt_async_transfer_neg(np, cp->target, SYM_SPI_VALID_PPR);
3801 * Switch trans mode for current job and it's target.
3803 static void sym_settrans(hcb_p np, ccb_p cp, u_char dt, u_char ofs,
3804 u_char per, u_char wide, u_char div, u_char fak)
3809 u_char target = INB (nc_sdid) & 0x0f;
3810 u_char sval, wval, uval;
3817 assert (target == (cp->target & 0xf));
3818 tp = &np->target[target];
3820 sval = tp->head.sval;
3821 wval = tp->head.wval;
3822 uval = tp->head.uval;
3825 printf("XXXX sval=%x wval=%x uval=%x (%x)\n",
3826 sval, wval, uval, np->rv_scntl3);
3831 if (!(np->features & FE_C10))
3832 sval = (sval & ~0x1f) | ofs;
3834 sval = (sval & ~0x3f) | ofs;
3837 * Set the sync divisor and extra clock factor.
3840 wval = (wval & ~0x70) | ((div+1) << 4);
3841 if (!(np->features & FE_C10))
3842 sval = (sval & ~0xe0) | (fak << 5);
3844 uval = uval & ~(XCLKH_ST|XCLKH_DT|XCLKS_ST|XCLKS_DT);
3845 if (fak >= 1) uval |= (XCLKH_ST|XCLKH_DT);
3846 if (fak >= 2) uval |= (XCLKS_ST|XCLKS_DT);
3851 * Set the bus width.
3858 * Set misc. ultra enable bits.
3860 if (np->features & FE_C10) {
3861 uval = uval & ~(U3EN|AIPCKEN);
3863 assert(np->features & FE_U3EN);
3868 wval = wval & ~ULTRA;
3869 if (per <= 12) wval |= ULTRA;
3873 * Stop there if sync parameters are unchanged.
3875 if (tp->head.sval == sval &&
3876 tp->head.wval == wval &&
3877 tp->head.uval == uval)
3879 tp->head.sval = sval;
3880 tp->head.wval = wval;
3881 tp->head.uval = uval;
3884 * Disable extended Sreq/Sack filtering if per < 50.
3885 * Not supported on the C1010.
3887 if (per < 50 && !(np->features & FE_C10))
3888 OUTOFFB (nc_stest2, EXT);
3891 * set actual value and sync_status
3893 OUTB (nc_sxfer, tp->head.sval);
3894 OUTB (nc_scntl3, tp->head.wval);
3896 if (np->features & FE_C10) {
3897 OUTB (nc_scntl4, tp->head.uval);
3901 * patch ALL busy ccbs of this target.
3903 FOR_EACH_QUEUED_ELEMENT(&np->busy_ccbq, qp) {
3904 cp = sym_que_entry(qp, struct sym_ccb, link_ccbq);
3905 if (cp->target != target)
3907 cp->phys.select.sel_scntl3 = tp->head.wval;
3908 cp->phys.select.sel_sxfer = tp->head.sval;
3909 if (np->features & FE_C10) {
3910 cp->phys.select.sel_scntl4 = tp->head.uval;
3916 * log message for real hard errors
3918 * sym0 targ 0?: ERROR (ds:si) (so-si-sd) (sxfer/scntl3) @ name (dsp:dbc).
3919 * reg: r0 r1 r2 r3 r4 r5 r6 ..... rf.
3921 * exception register:
3926 * so: control lines as driven by chip.
3927 * si: control lines as seen by chip.
3928 * sd: scsi data lines as seen by chip.
3931 * sxfer: (see the manual)
3932 * scntl3: (see the manual)
3934 * current script command:
3935 * dsp: script adress (relative to start of script).
3936 * dbc: first word of script command.
3938 * First 24 register of the chip:
3941 static void sym_log_hard_error(hcb_p np, u_short sist, u_char dstat)
3947 u_char *script_base;
3952 if (dsp > np->scripta_ba &&
3953 dsp <= np->scripta_ba + np->scripta_sz) {
3954 script_ofs = dsp - np->scripta_ba;
3955 script_size = np->scripta_sz;
3956 script_base = (u_char *) np->scripta0;
3957 script_name = "scripta";
3959 else if (np->scriptb_ba < dsp &&
3960 dsp <= np->scriptb_ba + np->scriptb_sz) {
3961 script_ofs = dsp - np->scriptb_ba;
3962 script_size = np->scriptb_sz;
3963 script_base = (u_char *) np->scriptb0;
3964 script_name = "scriptb";
3969 script_name = "mem";
3972 printf ("%s:%d: ERROR (%x:%x) (%x-%x-%x) (%x/%x) @ (%s %x:%08x).\n",
3973 sym_name (np), (unsigned)INB (nc_sdid)&0x0f, dstat, sist,
3974 (unsigned)INB (nc_socl), (unsigned)INB (nc_sbcl),
3975 (unsigned)INB (nc_sbdl), (unsigned)INB (nc_sxfer),
3976 (unsigned)INB (nc_scntl3), script_name, script_ofs,
3977 (unsigned)INL (nc_dbc));
3979 if (((script_ofs & 3) == 0) &&
3980 (unsigned)script_ofs < script_size) {
3981 printf ("%s: script cmd = %08x\n", sym_name(np),
3982 scr_to_cpu((int) *(u32 *)(script_base + script_ofs)));
3985 printf ("%s: regdump:", sym_name(np));
3987 printf (" %02x", (unsigned)INB_OFF(i));
3991 * PCI BUS error, read the PCI ststus register.
3993 if (dstat & (MDPE|BF)) {
3995 #ifdef FreeBSD_Bus_Io_Abstraction
3996 pci_sts = pci_read_config(np->device, PCIR_STATUS, 2);
3998 pci_sts = pci_cfgread(np->pci_tag, PCIR_STATUS, 2);
4000 if (pci_sts & 0xf900) {
4001 #ifdef FreeBSD_Bus_Io_Abstraction
4002 pci_write_config(np->device, PCIR_STATUS, pci_sts, 2);
4004 pci_cfgwrite(np->pci_tag, PCIR_STATUS, pci_sts, 2);
4006 printf("%s: PCI STATUS = 0x%04x\n",
4007 sym_name(np), pci_sts & 0xf900);
4013 * chip interrupt handler
4015 * In normal situations, interrupt conditions occur one at
4016 * a time. But when something bad happens on the SCSI BUS,
4017 * the chip may raise several interrupt flags before
4018 * stopping and interrupting the CPU. The additionnal
4019 * interrupt flags are stacked in some extra registers
4020 * after the SIP and/or DIP flag has been raised in the
4021 * ISTAT. After the CPU has read the interrupt condition
4022 * flag from SIST or DSTAT, the chip unstacks the other
4023 * interrupt flags and sets the corresponding bits in
4024 * SIST or DSTAT. Since the chip starts stacking once the
4025 * SIP or DIP flag is set, there is a small window of time
4026 * where the stacking does not occur.
4028 * Typically, multiple interrupt conditions may happen in
4029 * the following situations:
4031 * - SCSI parity error + Phase mismatch (PAR|MA)
4032 * When an parity error is detected in input phase
4033 * and the device switches to msg-in phase inside a
4035 * - SCSI parity error + Unexpected disconnect (PAR|UDC)
4036 * When a stupid device does not want to handle the
4037 * recovery of an SCSI parity error.
4038 * - Some combinations of STO, PAR, UDC, ...
4039 * When using non compliant SCSI stuff, when user is
4040 * doing non compliant hot tampering on the BUS, when
4041 * something really bad happens to a device, etc ...
4043 * The heuristic suggested by SYMBIOS to handle
4044 * multiple interrupts is to try unstacking all
4045 * interrupts conditions and to handle them on some
4046 * priority based on error severity.
4047 * This will work when the unstacking has been
4048 * successful, but we cannot be 100 % sure of that,
4049 * since the CPU may have been faster to unstack than
4050 * the chip is able to stack. Hmmm ... But it seems that
4051 * such a situation is very unlikely to happen.
4053 * If this happen, for example STO caught by the CPU
4054 * then UDC happenning before the CPU have restarted
4055 * the SCRIPTS, the driver may wrongly complete the
4056 * same command on UDC, since the SCRIPTS didn't restart
4057 * and the DSA still points to the same command.
4058 * We avoid this situation by setting the DSA to an
4059 * invalid value when the CCB is completed and before
4060 * restarting the SCRIPTS.
4062 * Another issue is that we need some section of our
4063 * recovery procedures to be somehow uninterruptible but
4064 * the SCRIPTS processor does not provides such a
4065 * feature. For this reason, we handle recovery preferently
4066 * from the C code and check against some SCRIPTS critical
4067 * sections from the C code.
4069 * Hopefully, the interrupt handling of the driver is now
4070 * able to resist to weird BUS error conditions, but donnot
4071 * ask me for any guarantee that it will never fail. :-)
4072 * Use at your own decision and risk.
4075 static void sym_intr1 (hcb_p np)
4077 u_char istat, istatc;
4082 * interrupt on the fly ?
4084 * A `dummy read' is needed to ensure that the
4085 * clear of the INTF flag reaches the device
4086 * before the scanning of the DONE queue.
4088 istat = INB (nc_istat);
4090 OUTB (nc_istat, (istat & SIGP) | INTF | np->istat_sem);
4091 istat = INB (nc_istat); /* DUMMY READ */
4092 if (DEBUG_FLAGS & DEBUG_TINY) printf ("F ");
4093 (void)sym_wakeup_done (np);
4096 if (!(istat & (SIP|DIP)))
4099 #if 0 /* We should never get this one */
4101 OUTB (nc_istat, CABRT);
4105 * PAR and MA interrupts may occur at the same time,
4106 * and we need to know of both in order to handle
4107 * this situation properly. We try to unstack SCSI
4108 * interrupts for that reason. BTW, I dislike a LOT
4109 * such a loop inside the interrupt routine.
4110 * Even if DMA interrupt stacking is very unlikely to
4111 * happen, we also try unstacking these ones, since
4112 * this has no performance impact.
4119 sist |= INW (nc_sist);
4121 dstat |= INB (nc_dstat);
4122 istatc = INB (nc_istat);
4124 } while (istatc & (SIP|DIP));
4126 if (DEBUG_FLAGS & DEBUG_TINY)
4127 printf ("<%d|%x:%x|%x:%x>",
4130 (unsigned)INL(nc_dsp),
4131 (unsigned)INL(nc_dbc));
4133 * On paper, a memory barrier may be needed here.
4134 * And since we are paranoid ... :)
4139 * First, interrupts we want to service cleanly.
4141 * Phase mismatch (MA) is the most frequent interrupt
4142 * for chip earlier than the 896 and so we have to service
4143 * it as quickly as possible.
4144 * A SCSI parity error (PAR) may be combined with a phase
4145 * mismatch condition (MA).
4146 * Programmed interrupts (SIR) are used to call the C code
4148 * The single step interrupt (SSI) is not used in this
4151 if (!(sist & (STO|GEN|HTH|SGE|UDC|SBMC|RST)) &&
4152 !(dstat & (MDPE|BF|ABRT|IID))) {
4153 if (sist & PAR) sym_int_par (np, sist);
4154 else if (sist & MA) sym_int_ma (np);
4155 else if (dstat & SIR) sym_int_sir (np);
4156 else if (dstat & SSI) OUTONB_STD ();
4157 else goto unknown_int;
4162 * Now, interrupts that donnot happen in normal
4163 * situations and that we may need to recover from.
4165 * On SCSI RESET (RST), we reset everything.
4166 * On SCSI BUS MODE CHANGE (SBMC), we complete all
4167 * active CCBs with RESET status, prepare all devices
4168 * for negotiating again and restart the SCRIPTS.
4169 * On STO and UDC, we complete the CCB with the corres-
4170 * ponding status and restart the SCRIPTS.
4173 xpt_print_path(np->path);
4174 printf("SCSI BUS reset detected.\n");
4179 OUTB (nc_ctest3, np->rv_ctest3 | CLF); /* clear dma fifo */
4180 OUTB (nc_stest3, TE|CSF); /* clear scsi fifo */
4182 if (!(sist & (GEN|HTH|SGE)) &&
4183 !(dstat & (MDPE|BF|ABRT|IID))) {
4184 if (sist & SBMC) sym_int_sbmc (np);
4185 else if (sist & STO) sym_int_sto (np);
4186 else if (sist & UDC) sym_int_udc (np);
4187 else goto unknown_int;
4192 * Now, interrupts we are not able to recover cleanly.
4194 * Log message for hard errors.
4198 sym_log_hard_error(np, sist, dstat);
4200 if ((sist & (GEN|HTH|SGE)) ||
4201 (dstat & (MDPE|BF|ABRT|IID))) {
4202 sym_start_reset(np);
4208 * We just miss the cause of the interrupt. :(
4209 * Print a message. The timeout will do the real work.
4211 printf( "%s: unknown interrupt(s) ignored, "
4212 "ISTAT=0x%x DSTAT=0x%x SIST=0x%x\n",
4213 sym_name(np), istat, dstat, sist);
4216 static void sym_intr(void *arg)
4218 if (DEBUG_FLAGS & DEBUG_TINY) printf ("[");
4219 sym_intr1((hcb_p) arg);
4220 if (DEBUG_FLAGS & DEBUG_TINY) printf ("]");
4224 static void sym_poll(struct cam_sim *sim)
4227 sym_intr(cam_sim_softc(sim));
4233 * generic recovery from scsi interrupt
4235 * The doc says that when the chip gets an SCSI interrupt,
4236 * it tries to stop in an orderly fashion, by completing
4237 * an instruction fetch that had started or by flushing
4238 * the DMA fifo for a write to memory that was executing.
4239 * Such a fashion is not enough to know if the instruction
4240 * that was just before the current DSP value has been
4243 * There are some small SCRIPTS sections that deal with
4244 * the start queue and the done queue that may break any
4245 * assomption from the C code if we are interrupted
4246 * inside, so we reset if this happens. Btw, since these
4247 * SCRIPTS sections are executed while the SCRIPTS hasn't
4248 * started SCSI operations, it is very unlikely to happen.
4250 * All the driver data structures are supposed to be
4251 * allocated from the same 4 GB memory window, so there
4252 * is a 1 to 1 relationship between DSA and driver data
4253 * structures. Since we are careful :) to invalidate the
4254 * DSA when we complete a command or when the SCRIPTS
4255 * pushes a DSA into a queue, we can trust it when it
4258 static void sym_recover_scsi_int (hcb_p np, u_char hsts)
4260 u32 dsp = INL (nc_dsp);
4261 u32 dsa = INL (nc_dsa);
4262 ccb_p cp = sym_ccb_from_dsa(np, dsa);
4265 * If we haven't been interrupted inside the SCRIPTS
4266 * critical pathes, we can safely restart the SCRIPTS
4267 * and trust the DSA value if it matches a CCB.
4269 if ((!(dsp > SCRIPTA_BA (np, getjob_begin) &&
4270 dsp < SCRIPTA_BA (np, getjob_end) + 1)) &&
4271 (!(dsp > SCRIPTA_BA (np, ungetjob) &&
4272 dsp < SCRIPTA_BA (np, reselect) + 1)) &&
4273 (!(dsp > SCRIPTB_BA (np, sel_for_abort) &&
4274 dsp < SCRIPTB_BA (np, sel_for_abort_1) + 1)) &&
4275 (!(dsp > SCRIPTA_BA (np, done) &&
4276 dsp < SCRIPTA_BA (np, done_end) + 1))) {
4277 OUTB (nc_ctest3, np->rv_ctest3 | CLF); /* clear dma fifo */
4278 OUTB (nc_stest3, TE|CSF); /* clear scsi fifo */
4280 * If we have a CCB, let the SCRIPTS call us back for
4281 * the handling of the error with SCRATCHA filled with
4282 * STARTPOS. This way, we will be able to freeze the
4283 * device queue and requeue awaiting IOs.
4286 cp->host_status = hsts;
4287 OUTL_DSP (SCRIPTA_BA (np, complete_error));
4290 * Otherwise just restart the SCRIPTS.
4293 OUTL (nc_dsa, 0xffffff);
4294 OUTL_DSP (SCRIPTA_BA (np, start));
4303 sym_start_reset(np);
4307 * chip exception handler for selection timeout
4309 void sym_int_sto (hcb_p np)
4311 u32 dsp = INL (nc_dsp);
4313 if (DEBUG_FLAGS & DEBUG_TINY) printf ("T");
4315 if (dsp == SCRIPTA_BA (np, wf_sel_done) + 8)
4316 sym_recover_scsi_int(np, HS_SEL_TIMEOUT);
4318 sym_start_reset(np);
4322 * chip exception handler for unexpected disconnect
4324 void sym_int_udc (hcb_p np)
4326 printf ("%s: unexpected disconnect\n", sym_name(np));
4327 sym_recover_scsi_int(np, HS_UNEXPECTED);
4331 * chip exception handler for SCSI bus mode change
4333 * spi2-r12 11.2.3 says a transceiver mode change must
4334 * generate a reset event and a device that detects a reset
4335 * event shall initiate a hard reset. It says also that a
4336 * device that detects a mode change shall set data transfer
4337 * mode to eight bit asynchronous, etc...
4338 * So, just reinitializing all except chip should be enough.
4340 static void sym_int_sbmc (hcb_p np)
4342 u_char scsi_mode = INB (nc_stest4) & SMODE;
4347 xpt_print_path(np->path);
4348 printf("SCSI BUS mode change from %s to %s.\n",
4349 sym_scsi_bus_mode(np->scsi_mode), sym_scsi_bus_mode(scsi_mode));
4352 * Should suspend command processing for a few seconds and
4353 * reinitialize all except the chip.
4359 * chip exception handler for SCSI parity error.
4361 * When the chip detects a SCSI parity error and is
4362 * currently executing a (CH)MOV instruction, it does
4363 * not interrupt immediately, but tries to finish the
4364 * transfer of the current scatter entry before
4365 * interrupting. The following situations may occur:
4367 * - The complete scatter entry has been transferred
4368 * without the device having changed phase.
4369 * The chip will then interrupt with the DSP pointing
4370 * to the instruction that follows the MOV.
4372 * - A phase mismatch occurs before the MOV finished
4373 * and phase errors are to be handled by the C code.
4374 * The chip will then interrupt with both PAR and MA
4377 * - A phase mismatch occurs before the MOV finished and
4378 * phase errors are to be handled by SCRIPTS.
4379 * The chip will load the DSP with the phase mismatch
4380 * JUMP address and interrupt the host processor.
4382 static void sym_int_par (hcb_p np, u_short sist)
4384 u_char hsts = INB (HS_PRT);
4385 u32 dsp = INL (nc_dsp);
4386 u32 dbc = INL (nc_dbc);
4387 u32 dsa = INL (nc_dsa);
4388 u_char sbcl = INB (nc_sbcl);
4389 u_char cmd = dbc >> 24;
4390 int phase = cmd & 7;
4391 ccb_p cp = sym_ccb_from_dsa(np, dsa);
4393 printf("%s: SCSI parity error detected: SCR1=%d DBC=%x SBCL=%x\n",
4394 sym_name(np), hsts, dbc, sbcl);
4397 * Check that the chip is connected to the SCSI BUS.
4399 if (!(INB (nc_scntl1) & ISCON)) {
4400 sym_recover_scsi_int(np, HS_UNEXPECTED);
4405 * If the nexus is not clearly identified, reset the bus.
4406 * We will try to do better later.
4412 * Check instruction was a MOV, direction was INPUT and
4415 if ((cmd & 0xc0) || !(phase & 1) || !(sbcl & 0x8))
4419 * Keep track of the parity error.
4421 OUTONB (HF_PRT, HF_EXT_ERR);
4422 cp->xerr_status |= XE_PARITY_ERR;
4425 * Prepare the message to send to the device.
4427 np->msgout[0] = (phase == 7) ? M_PARITY : M_ID_ERROR;
4430 * If the old phase was DATA IN phase, we have to deal with
4431 * the 3 situations described above.
4432 * For other input phases (MSG IN and STATUS), the device
4433 * must resend the whole thing that failed parity checking
4434 * or signal error. So, jumping to dispatcher should be OK.
4436 if (phase == 1 || phase == 5) {
4437 /* Phase mismatch handled by SCRIPTS */
4438 if (dsp == SCRIPTB_BA (np, pm_handle))
4440 /* Phase mismatch handled by the C code */
4443 /* No phase mismatch occurred */
4445 OUTL (nc_temp, dsp);
4446 OUTL_DSP (SCRIPTA_BA (np, dispatch));
4450 OUTL_DSP (SCRIPTA_BA (np, clrack));
4454 sym_start_reset(np);
4459 * chip exception handler for phase errors.
4461 * We have to construct a new transfer descriptor,
4462 * to transfer the rest of the current block.
4464 static void sym_int_ma (hcb_p np)
4477 u_char hflags, hflags0;
4486 rest = dbc & 0xffffff;
4490 * locate matching cp if any.
4492 cp = sym_ccb_from_dsa(np, dsa);
4495 * Donnot take into account dma fifo and various buffers in
4496 * INPUT phase since the chip flushes everything before
4497 * raising the MA interrupt for interrupted INPUT phases.
4498 * For DATA IN phase, we will check for the SWIDE later.
4500 if ((cmd & 7) != 1 && (cmd & 7) != 5) {
4503 if (np->features & FE_DFBC)
4504 delta = INW (nc_dfbc);
4509 * Read DFIFO, CTEST[4-6] using 1 PCI bus ownership.
4511 dfifo = INL(nc_dfifo);
4514 * Calculate remaining bytes in DMA fifo.
4515 * (CTEST5 = dfifo >> 16)
4517 if (dfifo & (DFS << 16))
4518 delta = ((((dfifo >> 8) & 0x300) |
4519 (dfifo & 0xff)) - rest) & 0x3ff;
4521 delta = ((dfifo & 0xff) - rest) & 0x7f;
4525 * The data in the dma fifo has not been transfered to
4526 * the target -> add the amount to the rest
4527 * and clear the data.
4528 * Check the sstat2 register in case of wide transfer.
4531 ss0 = INB (nc_sstat0);
4532 if (ss0 & OLF) rest++;
4533 if (!(np->features & FE_C10))
4534 if (ss0 & ORF) rest++;
4535 if (cp && (cp->phys.select.sel_scntl3 & EWS)) {
4536 ss2 = INB (nc_sstat2);
4537 if (ss2 & OLF1) rest++;
4538 if (!(np->features & FE_C10))
4539 if (ss2 & ORF1) rest++;
4545 OUTB (nc_ctest3, np->rv_ctest3 | CLF); /* dma fifo */
4546 OUTB (nc_stest3, TE|CSF); /* scsi fifo */
4550 * log the information
4552 if (DEBUG_FLAGS & (DEBUG_TINY|DEBUG_PHASE))
4553 printf ("P%x%x RL=%d D=%d ", cmd&7, INB(nc_sbcl)&7,
4554 (unsigned) rest, (unsigned) delta);
4557 * try to find the interrupted script command,
4558 * and the address at which to continue.
4562 if (dsp > np->scripta_ba &&
4563 dsp <= np->scripta_ba + np->scripta_sz) {
4564 vdsp = (u32 *)((char*)np->scripta0 + (dsp-np->scripta_ba-8));
4567 else if (dsp > np->scriptb_ba &&
4568 dsp <= np->scriptb_ba + np->scriptb_sz) {
4569 vdsp = (u32 *)((char*)np->scriptb0 + (dsp-np->scriptb_ba-8));
4574 * log the information
4576 if (DEBUG_FLAGS & DEBUG_PHASE) {
4577 printf ("\nCP=%p DSP=%x NXT=%x VDSP=%p CMD=%x ",
4578 cp, (unsigned)dsp, (unsigned)nxtdsp, vdsp, cmd);
4582 printf ("%s: interrupted SCRIPT address not found.\n",
4588 printf ("%s: SCSI phase error fixup: CCB already dequeued.\n",
4594 * get old startaddress and old length.
4596 oadr = scr_to_cpu(vdsp[1]);
4598 if (cmd & 0x10) { /* Table indirect */
4599 tblp = (u32 *) ((char*) &cp->phys + oadr);
4600 olen = scr_to_cpu(tblp[0]);
4601 oadr = scr_to_cpu(tblp[1]);
4604 olen = scr_to_cpu(vdsp[0]) & 0xffffff;
4607 if (DEBUG_FLAGS & DEBUG_PHASE) {
4608 printf ("OCMD=%x\nTBLP=%p OLEN=%x OADR=%x\n",
4609 (unsigned) (scr_to_cpu(vdsp[0]) >> 24),
4616 * check cmd against assumed interrupted script command.
4617 * If dt data phase, the MOVE instruction hasn't bit 4 of
4620 if (((cmd & 2) ? cmd : (cmd & ~4)) != (scr_to_cpu(vdsp[0]) >> 24)) {
4622 printf ("internal error: cmd=%02x != %02x=(vdsp[0] >> 24)\n",
4623 (unsigned)cmd, (unsigned)scr_to_cpu(vdsp[0]) >> 24);
4629 * if old phase not dataphase, leave here.
4633 printf ("phase change %x-%x %d@%08x resid=%d.\n",
4634 cmd&7, INB(nc_sbcl)&7, (unsigned)olen,
4635 (unsigned)oadr, (unsigned)rest);
4636 goto unexpected_phase;
4640 * Choose the correct PM save area.
4642 * Look at the PM_SAVE SCRIPT if you want to understand
4643 * this stuff. The equivalent code is implemented in
4644 * SCRIPTS for the 895A, 896 and 1010 that are able to
4645 * handle PM from the SCRIPTS processor.
4647 hflags0 = INB (HF_PRT);
4650 if (hflags & (HF_IN_PM0 | HF_IN_PM1 | HF_DP_SAVED)) {
4651 if (hflags & HF_IN_PM0)
4652 nxtdsp = scr_to_cpu(cp->phys.pm0.ret);
4653 else if (hflags & HF_IN_PM1)
4654 nxtdsp = scr_to_cpu(cp->phys.pm1.ret);
4656 if (hflags & HF_DP_SAVED)
4657 hflags ^= HF_ACT_PM;
4660 if (!(hflags & HF_ACT_PM)) {
4662 newcmd = SCRIPTA_BA (np, pm0_data);
4666 newcmd = SCRIPTA_BA (np, pm1_data);
4669 hflags &= ~(HF_IN_PM0 | HF_IN_PM1 | HF_DP_SAVED);
4670 if (hflags != hflags0)
4671 OUTB (HF_PRT, hflags);
4674 * fillin the phase mismatch context
4676 pm->sg.addr = cpu_to_scr(oadr + olen - rest);
4677 pm->sg.size = cpu_to_scr(rest);
4678 pm->ret = cpu_to_scr(nxtdsp);
4681 * If we have a SWIDE,
4682 * - prepare the address to write the SWIDE from SCRIPTS,
4683 * - compute the SCRIPTS address to restart from,
4684 * - move current data pointer context by one byte.
4686 nxtdsp = SCRIPTA_BA (np, dispatch);
4687 if ((cmd & 7) == 1 && cp && (cp->phys.select.sel_scntl3 & EWS) &&
4688 (INB (nc_scntl2) & WSR)) {
4692 * Set up the table indirect for the MOVE
4693 * of the residual byte and adjust the data
4696 tmp = scr_to_cpu(pm->sg.addr);
4697 cp->phys.wresid.addr = cpu_to_scr(tmp);
4698 pm->sg.addr = cpu_to_scr(tmp + 1);
4699 tmp = scr_to_cpu(pm->sg.size);
4700 cp->phys.wresid.size = cpu_to_scr((tmp&0xff000000) | 1);
4701 pm->sg.size = cpu_to_scr(tmp - 1);
4704 * If only the residual byte is to be moved,
4705 * no PM context is needed.
4707 if ((tmp&0xffffff) == 1)
4711 * Prepare the address of SCRIPTS that will
4712 * move the residual byte to memory.
4714 nxtdsp = SCRIPTB_BA (np, wsr_ma_helper);
4717 if (DEBUG_FLAGS & DEBUG_PHASE) {
4719 printf ("PM %x %x %x / %x %x %x.\n",
4720 hflags0, hflags, newcmd,
4721 (unsigned)scr_to_cpu(pm->sg.addr),
4722 (unsigned)scr_to_cpu(pm->sg.size),
4723 (unsigned)scr_to_cpu(pm->ret));
4727 * Restart the SCRIPTS processor.
4729 OUTL (nc_temp, newcmd);
4734 * Unexpected phase changes that occurs when the current phase
4735 * is not a DATA IN or DATA OUT phase are due to error conditions.
4736 * Such event may only happen when the SCRIPTS is using a
4737 * multibyte SCSI MOVE.
4739 * Phase change Some possible cause
4741 * COMMAND --> MSG IN SCSI parity error detected by target.
4742 * COMMAND --> STATUS Bad command or refused by target.
4743 * MSG OUT --> MSG IN Message rejected by target.
4744 * MSG OUT --> COMMAND Bogus target that discards extended
4745 * negotiation messages.
4747 * The code below does not care of the new phase and so
4748 * trusts the target. Why to annoy it ?
4749 * If the interrupted phase is COMMAND phase, we restart at
4751 * If a target does not get all the messages after selection,
4752 * the code assumes blindly that the target discards extended
4753 * messages and clears the negotiation status.
4754 * If the target does not want all our response to negotiation,
4755 * we force a SIR_NEGO_PROTO interrupt (it is a hack that avoids
4756 * bloat for such a should_not_happen situation).
4757 * In all other situation, we reset the BUS.
4758 * Are these assumptions reasonnable ? (Wait and see ...)
4765 case 2: /* COMMAND phase */
4766 nxtdsp = SCRIPTA_BA (np, dispatch);
4769 case 3: /* STATUS phase */
4770 nxtdsp = SCRIPTA_BA (np, dispatch);
4773 case 6: /* MSG OUT phase */
4775 * If the device may want to use untagged when we want
4776 * tagged, we prepare an IDENTIFY without disc. granted,
4777 * since we will not be able to handle reselect.
4778 * Otherwise, we just don't care.
4780 if (dsp == SCRIPTA_BA (np, send_ident)) {
4781 if (cp->tag != NO_TAG && olen - rest <= 3) {
4782 cp->host_status = HS_BUSY;
4783 np->msgout[0] = M_IDENTIFY | cp->lun;
4784 nxtdsp = SCRIPTB_BA (np, ident_break_atn);
4787 nxtdsp = SCRIPTB_BA (np, ident_break);
4789 else if (dsp == SCRIPTB_BA (np, send_wdtr) ||
4790 dsp == SCRIPTB_BA (np, send_sdtr) ||
4791 dsp == SCRIPTB_BA (np, send_ppr)) {
4792 nxtdsp = SCRIPTB_BA (np, nego_bad_phase);
4796 case 7: /* MSG IN phase */
4797 nxtdsp = SCRIPTA_BA (np, clrack);
4808 sym_start_reset(np);
4812 * Dequeue from the START queue all CCBs that match
4813 * a given target/lun/task condition (-1 means all),
4814 * and move them from the BUSY queue to the COMP queue
4815 * with CAM_REQUEUE_REQ status condition.
4816 * This function is used during error handling/recovery.
4817 * It is called with SCRIPTS not running.
4820 sym_dequeue_from_squeue(hcb_p np, int i, int target, int lun, int task)
4826 * Make sure the starting index is within range.
4828 assert((i >= 0) && (i < 2*MAX_QUEUE));
4831 * Walk until end of START queue and dequeue every job
4832 * that matches the target/lun/task condition.
4835 while (i != np->squeueput) {
4836 cp = sym_ccb_from_dsa(np, scr_to_cpu(np->squeue[i]));
4838 #ifdef SYM_CONF_IARB_SUPPORT
4839 /* Forget hints for IARB, they may be no longer relevant */
4840 cp->host_flags &= ~HF_HINT_IARB;
4842 if ((target == -1 || cp->target == target) &&
4843 (lun == -1 || cp->lun == lun) &&
4844 (task == -1 || cp->tag == task)) {
4845 sym_set_cam_status(cp->cam_ccb, CAM_REQUEUE_REQ);
4846 sym_remque(&cp->link_ccbq);
4847 sym_insque_tail(&cp->link_ccbq, &np->comp_ccbq);
4851 np->squeue[j] = np->squeue[i];
4852 if ((j += 2) >= MAX_QUEUE*2) j = 0;
4854 if ((i += 2) >= MAX_QUEUE*2) i = 0;
4856 if (i != j) /* Copy back the idle task if needed */
4857 np->squeue[j] = np->squeue[i];
4858 np->squeueput = j; /* Update our current start queue pointer */
4864 * Complete all CCBs queued to the COMP queue.
4866 * These CCBs are assumed:
4867 * - Not to be referenced either by devices or
4868 * SCRIPTS-related queues and datas.
4869 * - To have to be completed with an error condition
4872 * The device queue freeze count is incremented
4873 * for each CCB that does not prevent this.
4874 * This function is called when all CCBs involved
4875 * in error handling/recovery have been reaped.
4878 sym_flush_comp_queue(hcb_p np, int cam_status)
4883 while ((qp = sym_remque_head(&np->comp_ccbq)) != 0) {
4885 cp = sym_que_entry(qp, struct sym_ccb, link_ccbq);
4886 sym_insque_tail(&cp->link_ccbq, &np->busy_ccbq);
4887 /* Leave quiet CCBs waiting for resources */
4888 if (cp->host_status == HS_WAIT)
4892 sym_set_cam_status(ccb, cam_status);
4893 sym_free_ccb(np, cp);
4894 sym_freeze_cam_ccb(ccb);
4895 sym_xpt_done(np, ccb);
4900 * chip handler for bad SCSI status condition
4902 * In case of bad SCSI status, we unqueue all the tasks
4903 * currently queued to the controller but not yet started
4904 * and then restart the SCRIPTS processor immediately.
4906 * QUEUE FULL and BUSY conditions are handled the same way.
4907 * Basically all the not yet started tasks are requeued in
4908 * device queue and the queue is frozen until a completion.
4910 * For CHECK CONDITION and COMMAND TERMINATED status, we use
4911 * the CCB of the failed command to prepare a REQUEST SENSE
4912 * SCSI command and queue it to the controller queue.
4914 * SCRATCHA is assumed to have been loaded with STARTPOS
4915 * before the SCRIPTS called the C code.
4917 static void sym_sir_bad_scsi_status(hcb_p np, int num, ccb_p cp)
4919 tcb_p tp = &np->target[cp->target];
4921 u_char s_status = cp->ssss_status;
4922 u_char h_flags = cp->host_flags;
4928 * Compute the index of the next job to start from SCRIPTS.
4930 i = (INL (nc_scratcha) - np->squeue_ba) / 4;
4933 * The last CCB queued used for IARB hint may be
4934 * no longer relevant. Forget it.
4936 #ifdef SYM_CONF_IARB_SUPPORT
4942 * Now deal with the SCSI status.
4947 if (sym_verbose >= 2) {
4949 printf (s_status == S_BUSY ? "BUSY" : "QUEUE FULL\n");
4951 default: /* S_INT, S_INT_COND_MET, S_CONFLICT */
4952 sym_complete_error (np, cp);
4957 * If we get an SCSI error when requesting sense, give up.
4959 if (h_flags & HF_SENSE) {
4960 sym_complete_error (np, cp);
4965 * Dequeue all queued CCBs for that device not yet started,
4966 * and restart the SCRIPTS processor immediately.
4968 (void) sym_dequeue_from_squeue(np, i, cp->target, cp->lun, -1);
4969 OUTL_DSP (SCRIPTA_BA (np, start));
4972 * Save some info of the actual IO.
4973 * Compute the data residual.
4975 cp->sv_scsi_status = cp->ssss_status;
4976 cp->sv_xerr_status = cp->xerr_status;
4977 cp->sv_resid = sym_compute_residual(np, cp);
4980 * Prepare all needed data structures for
4981 * requesting sense data.
4987 cp->scsi_smsg2[0] = M_IDENTIFY | cp->lun;
4991 * If we are currently using anything different from
4992 * async. 8 bit data transfers with that target,
4993 * start a negotiation, since the device may want
4994 * to report us a UNIT ATTENTION condition due to
4995 * a cause we currently ignore, and we donnot want
4996 * to be stuck with WIDE and/or SYNC data transfer.
4998 * cp->nego_status is filled by sym_prepare_nego().
5000 cp->nego_status = 0;
5002 if (tp->tinfo.current.options & PPR_OPT_MASK)
5004 else if (tp->tinfo.current.width != BUS_8_BIT)
5006 else if (tp->tinfo.current.offset != 0)
5010 sym_prepare_nego (np,cp, nego, &cp->scsi_smsg2[msglen]);
5012 * Message table indirect structure.
5014 cp->phys.smsg.addr = cpu_to_scr(CCB_BA (cp, scsi_smsg2));
5015 cp->phys.smsg.size = cpu_to_scr(msglen);
5020 cp->phys.cmd.addr = cpu_to_scr(CCB_BA (cp, sensecmd));
5021 cp->phys.cmd.size = cpu_to_scr(6);
5024 * patch requested size into sense command
5026 cp->sensecmd[0] = 0x03;
5027 cp->sensecmd[1] = cp->lun << 5;
5028 #ifdef FreeBSD_New_Tran_Settings
5029 if (tp->tinfo.current.scsi_version > 2 || cp->lun > 7)
5030 cp->sensecmd[1] = 0;
5032 cp->sensecmd[4] = SYM_SNS_BBUF_LEN;
5033 cp->data_len = SYM_SNS_BBUF_LEN;
5038 bzero(cp->sns_bbuf, SYM_SNS_BBUF_LEN);
5039 cp->phys.sense.addr = cpu_to_scr(vtobus(cp->sns_bbuf));
5040 cp->phys.sense.size = cpu_to_scr(SYM_SNS_BBUF_LEN);
5043 * requeue the command.
5045 startp = SCRIPTB_BA (np, sdata_in);
5047 cp->phys.head.savep = cpu_to_scr(startp);
5048 cp->phys.head.goalp = cpu_to_scr(startp + 16);
5049 cp->phys.head.lastp = cpu_to_scr(startp);
5050 cp->startp = cpu_to_scr(startp);
5052 cp->actualquirks = SYM_QUIRK_AUTOSAVE;
5053 cp->host_status = cp->nego_status ? HS_NEGOTIATE : HS_BUSY;
5054 cp->ssss_status = S_ILLEGAL;
5055 cp->host_flags = (HF_SENSE|HF_DATA_IN);
5056 cp->xerr_status = 0;
5057 cp->extra_bytes = 0;
5059 cp->phys.head.go.start = cpu_to_scr(SCRIPTA_BA (np, select));
5062 * Requeue the command.
5064 sym_put_start_queue(np, cp);
5067 * Give back to upper layer everything we have dequeued.
5069 sym_flush_comp_queue(np, 0);
5075 * After a device has accepted some management message
5076 * as BUS DEVICE RESET, ABORT TASK, etc ..., or when
5077 * a device signals a UNIT ATTENTION condition, some
5078 * tasks are thrown away by the device. We are required
5079 * to reflect that on our tasks list since the device
5080 * will never complete these tasks.
5082 * This function move from the BUSY queue to the COMP
5083 * queue all disconnected CCBs for a given target that
5084 * match the following criteria:
5085 * - lun=-1 means any logical UNIT otherwise a given one.
5086 * - task=-1 means any task, otherwise a given one.
5089 sym_clear_tasks(hcb_p np, int cam_status, int target, int lun, int task)
5091 SYM_QUEHEAD qtmp, *qp;
5096 * Move the entire BUSY queue to our temporary queue.
5098 sym_que_init(&qtmp);
5099 sym_que_splice(&np->busy_ccbq, &qtmp);
5100 sym_que_init(&np->busy_ccbq);
5103 * Put all CCBs that matches our criteria into
5104 * the COMP queue and put back other ones into
5107 while ((qp = sym_remque_head(&qtmp)) != 0) {
5109 cp = sym_que_entry(qp, struct sym_ccb, link_ccbq);
5111 if (cp->host_status != HS_DISCONNECT ||
5112 cp->target != target ||
5113 (lun != -1 && cp->lun != lun) ||
5115 (cp->tag != NO_TAG && cp->scsi_smsg[2] != task))) {
5116 sym_insque_tail(&cp->link_ccbq, &np->busy_ccbq);
5119 sym_insque_tail(&cp->link_ccbq, &np->comp_ccbq);
5121 /* Preserve the software timeout condition */
5122 if (sym_get_cam_status(ccb) != CAM_CMD_TIMEOUT)
5123 sym_set_cam_status(ccb, cam_status);
5126 printf("XXXX TASK @%p CLEARED\n", cp);
5133 * chip handler for TASKS recovery
5135 * We cannot safely abort a command, while the SCRIPTS
5136 * processor is running, since we just would be in race
5139 * As long as we have tasks to abort, we keep the SEM
5140 * bit set in the ISTAT. When this bit is set, the
5141 * SCRIPTS processor interrupts (SIR_SCRIPT_STOPPED)
5142 * each time it enters the scheduler.
5144 * If we have to reset a target, clear tasks of a unit,
5145 * or to perform the abort of a disconnected job, we
5146 * restart the SCRIPTS for selecting the target. Once
5147 * selected, the SCRIPTS interrupts (SIR_TARGET_SELECTED).
5148 * If it loses arbitration, the SCRIPTS will interrupt again
5149 * the next time it will enter its scheduler, and so on ...
5151 * On SIR_TARGET_SELECTED, we scan for the more
5152 * appropriate thing to do:
5154 * - If nothing, we just sent a M_ABORT message to the
5155 * target to get rid of the useless SCSI bus ownership.
5156 * According to the specs, no tasks shall be affected.
5157 * - If the target is to be reset, we send it a M_RESET
5159 * - If a logical UNIT is to be cleared , we send the
5160 * IDENTIFY(lun) + M_ABORT.
5161 * - If an untagged task is to be aborted, we send the
5162 * IDENTIFY(lun) + M_ABORT.
5163 * - If a tagged task is to be aborted, we send the
5164 * IDENTIFY(lun) + task attributes + M_ABORT_TAG.
5166 * Once our 'kiss of death' :) message has been accepted
5167 * by the target, the SCRIPTS interrupts again
5168 * (SIR_ABORT_SENT). On this interrupt, we complete
5169 * all the CCBs that should have been aborted by the
5170 * target according to our message.
5172 static void sym_sir_task_recovery(hcb_p np, int num)
5177 int target=-1, lun=-1, task;
5182 * The SCRIPTS processor stopped before starting
5183 * the next command in order to allow us to perform
5184 * some task recovery.
5186 case SIR_SCRIPT_STOPPED:
5188 * Do we have any target to reset or unit to clear ?
5190 for (i = 0 ; i < SYM_CONF_MAX_TARGET ; i++) {
5191 tp = &np->target[i];
5193 (tp->lun0p && tp->lun0p->to_clear)) {
5199 for (k = 1 ; k < SYM_CONF_MAX_LUN ; k++) {
5200 if (tp->lunmp[k] && tp->lunmp[k]->to_clear) {
5210 * If not, walk the busy queue for any
5211 * disconnected CCB to be aborted.
5214 FOR_EACH_QUEUED_ELEMENT(&np->busy_ccbq, qp) {
5215 cp = sym_que_entry(qp,struct sym_ccb,link_ccbq);
5216 if (cp->host_status != HS_DISCONNECT)
5219 target = cp->target;
5226 * If some target is to be selected,
5227 * prepare and start the selection.
5230 tp = &np->target[target];
5231 np->abrt_sel.sel_id = target;
5232 np->abrt_sel.sel_scntl3 = tp->head.wval;
5233 np->abrt_sel.sel_sxfer = tp->head.sval;
5234 OUTL(nc_dsa, np->hcb_ba);
5235 OUTL_DSP (SCRIPTB_BA (np, sel_for_abort));
5240 * Now look for a CCB to abort that haven't started yet.
5241 * Btw, the SCRIPTS processor is still stopped, so
5242 * we are not in race.
5246 FOR_EACH_QUEUED_ELEMENT(&np->busy_ccbq, qp) {
5247 cp = sym_que_entry(qp, struct sym_ccb, link_ccbq);
5248 if (cp->host_status != HS_BUSY &&
5249 cp->host_status != HS_NEGOTIATE)
5253 #ifdef SYM_CONF_IARB_SUPPORT
5255 * If we are using IMMEDIATE ARBITRATION, we donnot
5256 * want to cancel the last queued CCB, since the
5257 * SCRIPTS may have anticipated the selection.
5259 if (cp == np->last_cp) {
5264 i = 1; /* Means we have found some */
5269 * We are done, so we donnot need
5270 * to synchronize with the SCRIPTS anylonger.
5271 * Remove the SEM flag from the ISTAT.
5274 OUTB (nc_istat, SIGP);
5278 * Compute index of next position in the start
5279 * queue the SCRIPTS intends to start and dequeue
5280 * all CCBs for that device that haven't been started.
5282 i = (INL (nc_scratcha) - np->squeue_ba) / 4;
5283 i = sym_dequeue_from_squeue(np, i, cp->target, cp->lun, -1);
5286 * Make sure at least our IO to abort has been dequeued.
5288 assert(i && sym_get_cam_status(cp->cam_ccb) == CAM_REQUEUE_REQ);
5291 * Keep track in cam status of the reason of the abort.
5293 if (cp->to_abort == 2)
5294 sym_set_cam_status(cp->cam_ccb, CAM_CMD_TIMEOUT);
5296 sym_set_cam_status(cp->cam_ccb, CAM_REQ_ABORTED);
5299 * Complete with error everything that we have dequeued.
5301 sym_flush_comp_queue(np, 0);
5304 * The SCRIPTS processor has selected a target
5305 * we may have some manual recovery to perform for.
5307 case SIR_TARGET_SELECTED:
5308 target = (INB (nc_sdid) & 0xf);
5309 tp = &np->target[target];
5311 np->abrt_tbl.addr = cpu_to_scr(vtobus(np->abrt_msg));
5314 * If the target is to be reset, prepare a
5315 * M_RESET message and clear the to_reset flag
5316 * since we donnot expect this operation to fail.
5319 np->abrt_msg[0] = M_RESET;
5320 np->abrt_tbl.size = 1;
5326 * Otherwise, look for some logical unit to be cleared.
5328 if (tp->lun0p && tp->lun0p->to_clear)
5330 else if (tp->lunmp) {
5331 for (k = 1 ; k < SYM_CONF_MAX_LUN ; k++) {
5332 if (tp->lunmp[k] && tp->lunmp[k]->to_clear) {
5340 * If a logical unit is to be cleared, prepare
5341 * an IDENTIFY(lun) + ABORT MESSAGE.
5344 lcb_p lp = sym_lp(np, tp, lun);
5345 lp->to_clear = 0; /* We donnot expect to fail here */
5346 np->abrt_msg[0] = M_IDENTIFY | lun;
5347 np->abrt_msg[1] = M_ABORT;
5348 np->abrt_tbl.size = 2;
5353 * Otherwise, look for some disconnected job to
5354 * abort for this target.
5358 FOR_EACH_QUEUED_ELEMENT(&np->busy_ccbq, qp) {
5359 cp = sym_que_entry(qp, struct sym_ccb, link_ccbq);
5360 if (cp->host_status != HS_DISCONNECT)
5362 if (cp->target != target)
5366 i = 1; /* Means we have some */
5371 * If we have none, probably since the device has
5372 * completed the command before we won abitration,
5373 * send a M_ABORT message without IDENTIFY.
5374 * According to the specs, the device must just
5375 * disconnect the BUS and not abort any task.
5378 np->abrt_msg[0] = M_ABORT;
5379 np->abrt_tbl.size = 1;
5384 * We have some task to abort.
5385 * Set the IDENTIFY(lun)
5387 np->abrt_msg[0] = M_IDENTIFY | cp->lun;
5390 * If we want to abort an untagged command, we
5391 * will send a IDENTIFY + M_ABORT.
5392 * Otherwise (tagged command), we will send
5393 * a IDENTITFY + task attributes + ABORT TAG.
5395 if (cp->tag == NO_TAG) {
5396 np->abrt_msg[1] = M_ABORT;
5397 np->abrt_tbl.size = 2;
5400 np->abrt_msg[1] = cp->scsi_smsg[1];
5401 np->abrt_msg[2] = cp->scsi_smsg[2];
5402 np->abrt_msg[3] = M_ABORT_TAG;
5403 np->abrt_tbl.size = 4;
5406 * Keep track of software timeout condition, since the
5407 * peripheral driver may not count retries on abort
5408 * conditions not due to timeout.
5410 if (cp->to_abort == 2)
5411 sym_set_cam_status(cp->cam_ccb, CAM_CMD_TIMEOUT);
5412 cp->to_abort = 0; /* We donnot expect to fail here */
5416 * The target has accepted our message and switched
5417 * to BUS FREE phase as we expected.
5419 case SIR_ABORT_SENT:
5420 target = (INB (nc_sdid) & 0xf);
5421 tp = &np->target[target];
5424 ** If we didn't abort anything, leave here.
5426 if (np->abrt_msg[0] == M_ABORT)
5430 * If we sent a M_RESET, then a hardware reset has
5431 * been performed by the target.
5432 * - Reset everything to async 8 bit
5433 * - Tell ourself to negotiate next time :-)
5434 * - Prepare to clear all disconnected CCBs for
5435 * this target from our task list (lun=task=-1)
5439 if (np->abrt_msg[0] == M_RESET) {
5441 tp->head.wval = np->rv_scntl3;
5443 tp->tinfo.current.period = 0;
5444 tp->tinfo.current.offset = 0;
5445 tp->tinfo.current.width = BUS_8_BIT;
5446 tp->tinfo.current.options = 0;
5450 * Otherwise, check for the LUN and TASK(s)
5451 * concerned by the cancelation.
5452 * If it is not ABORT_TAG then it is CLEAR_QUEUE
5453 * or an ABORT message :-)
5456 lun = np->abrt_msg[0] & 0x3f;
5457 if (np->abrt_msg[1] == M_ABORT_TAG)
5458 task = np->abrt_msg[2];
5462 * Complete all the CCBs the device should have
5463 * aborted due to our 'kiss of death' message.
5465 i = (INL (nc_scratcha) - np->squeue_ba) / 4;
5466 (void) sym_dequeue_from_squeue(np, i, target, lun, -1);
5467 (void) sym_clear_tasks(np, CAM_REQ_ABORTED, target, lun, task);
5468 sym_flush_comp_queue(np, 0);
5471 * If we sent a BDR, make uper layer aware of that.
5473 if (np->abrt_msg[0] == M_RESET)
5474 xpt_async(AC_SENT_BDR, np->path, NULL);
5479 * Print to the log the message we intend to send.
5481 if (num == SIR_TARGET_SELECTED) {
5482 PRINT_TARGET(np, target);
5483 sym_printl_hex("control msgout:", np->abrt_msg,
5485 np->abrt_tbl.size = cpu_to_scr(np->abrt_tbl.size);
5489 * Let the SCRIPTS processor continue.
5495 * Gerard's alchemy:) that deals with with the data
5496 * pointer for both MDP and the residual calculation.
5498 * I didn't want to bloat the code by more than 200
5499 * lignes for the handling of both MDP and the residual.
5500 * This has been achieved by using a data pointer
5501 * representation consisting in an index in the data
5502 * array (dp_sg) and a negative offset (dp_ofs) that
5503 * have the following meaning:
5505 * - dp_sg = SYM_CONF_MAX_SG
5506 * we are at the end of the data script.
5507 * - dp_sg < SYM_CONF_MAX_SG
5508 * dp_sg points to the next entry of the scatter array
5509 * we want to transfer.
5511 * dp_ofs represents the residual of bytes of the
5512 * previous entry scatter entry we will send first.
5514 * no residual to send first.
5516 * The function sym_evaluate_dp() accepts an arbitray
5517 * offset (basically from the MDP message) and returns
5518 * the corresponding values of dp_sg and dp_ofs.
5521 static int sym_evaluate_dp(hcb_p np, ccb_p cp, u32 scr, int *ofs)
5524 int dp_ofs, dp_sg, dp_sgmin;
5529 * Compute the resulted data pointer in term of a script
5530 * address within some DATA script and a signed byte offset.
5534 if (dp_scr == SCRIPTA_BA (np, pm0_data))
5536 else if (dp_scr == SCRIPTA_BA (np, pm1_data))
5542 dp_scr = scr_to_cpu(pm->ret);
5543 dp_ofs -= scr_to_cpu(pm->sg.size);
5547 * If we are auto-sensing, then we are done.
5549 if (cp->host_flags & HF_SENSE) {
5555 * Deduce the index of the sg entry.
5556 * Keep track of the index of the first valid entry.
5557 * If result is dp_sg = SYM_CONF_MAX_SG, then we are at the
5560 tmp = scr_to_cpu(cp->phys.head.goalp);
5561 dp_sg = SYM_CONF_MAX_SG;
5563 dp_sg -= (tmp - 8 - (int)dp_scr) / (2*4);
5564 dp_sgmin = SYM_CONF_MAX_SG - cp->segments;
5567 * Move to the sg entry the data pointer belongs to.
5569 * If we are inside the data area, we expect result to be:
5572 * dp_ofs = 0 and dp_sg is the index of the sg entry
5573 * the data pointer belongs to (or the end of the data)
5575 * dp_ofs < 0 and dp_sg is the index of the sg entry
5576 * the data pointer belongs to + 1.
5580 while (dp_sg > dp_sgmin) {
5582 tmp = scr_to_cpu(cp->phys.data[dp_sg].size);
5583 n = dp_ofs + (tmp & 0xffffff);
5591 else if (dp_ofs > 0) {
5592 while (dp_sg < SYM_CONF_MAX_SG) {
5593 tmp = scr_to_cpu(cp->phys.data[dp_sg].size);
5594 dp_ofs -= (tmp & 0xffffff);
5602 * Make sure the data pointer is inside the data area.
5603 * If not, return some error.
5605 if (dp_sg < dp_sgmin || (dp_sg == dp_sgmin && dp_ofs < 0))
5607 else if (dp_sg > SYM_CONF_MAX_SG ||
5608 (dp_sg == SYM_CONF_MAX_SG && dp_ofs > 0))
5612 * Save the extreme pointer if needed.
5614 if (dp_sg > cp->ext_sg ||
5615 (dp_sg == cp->ext_sg && dp_ofs > cp->ext_ofs)) {
5617 cp->ext_ofs = dp_ofs;
5631 * chip handler for MODIFY DATA POINTER MESSAGE
5633 * We also call this function on IGNORE WIDE RESIDUE
5634 * messages that do not match a SWIDE full condition.
5635 * Btw, we assume in that situation that such a message
5636 * is equivalent to a MODIFY DATA POINTER (offset=-1).
5639 static void sym_modify_dp(hcb_p np, tcb_p tp, ccb_p cp, int ofs)
5642 u32 dp_scr = INL (nc_temp);
5650 * Not supported for auto-sense.
5652 if (cp->host_flags & HF_SENSE)
5656 * Apply our alchemy:) (see comments in sym_evaluate_dp()),
5657 * to the resulted data pointer.
5659 dp_sg = sym_evaluate_dp(np, cp, dp_scr, &dp_ofs);
5664 * And our alchemy:) allows to easily calculate the data
5665 * script address we want to return for the next data phase.
5667 dp_ret = cpu_to_scr(cp->phys.head.goalp);
5668 dp_ret = dp_ret - 8 - (SYM_CONF_MAX_SG - dp_sg) * (2*4);
5671 * If offset / scatter entry is zero we donnot need
5672 * a context for the new current data pointer.
5680 * Get a context for the new current data pointer.
5682 hflags = INB (HF_PRT);
5684 if (hflags & HF_DP_SAVED)
5685 hflags ^= HF_ACT_PM;
5687 if (!(hflags & HF_ACT_PM)) {
5689 dp_scr = SCRIPTA_BA (np, pm0_data);
5693 dp_scr = SCRIPTA_BA (np, pm1_data);
5696 hflags &= ~(HF_DP_SAVED);
5698 OUTB (HF_PRT, hflags);
5701 * Set up the new current data pointer.
5702 * ofs < 0 there, and for the next data phase, we
5703 * want to transfer part of the data of the sg entry
5704 * corresponding to index dp_sg-1 prior to returning
5705 * to the main data script.
5707 pm->ret = cpu_to_scr(dp_ret);
5708 tmp = scr_to_cpu(cp->phys.data[dp_sg-1].addr);
5709 tmp += scr_to_cpu(cp->phys.data[dp_sg-1].size) + dp_ofs;
5710 pm->sg.addr = cpu_to_scr(tmp);
5711 pm->sg.size = cpu_to_scr(-dp_ofs);
5714 OUTL (nc_temp, dp_scr);
5715 OUTL_DSP (SCRIPTA_BA (np, clrack));
5719 OUTL_DSP (SCRIPTB_BA (np, msg_bad));
5724 * chip calculation of the data residual.
5726 * As I used to say, the requirement of data residual
5727 * in SCSI is broken, useless and cannot be achieved
5728 * without huge complexity.
5729 * But most OSes and even the official CAM require it.
5730 * When stupidity happens to be so widely spread inside
5731 * a community, it gets hard to convince.
5733 * Anyway, I don't care, since I am not going to use
5734 * any software that considers this data residual as
5735 * a relevant information. :)
5738 static int sym_compute_residual(hcb_p np, ccb_p cp)
5740 int dp_sg, dp_sgmin, resid = 0;
5744 * Check for some data lost or just thrown away.
5745 * We are not required to be quite accurate in this
5746 * situation. Btw, if we are odd for output and the
5747 * device claims some more data, it may well happen
5748 * than our residual be zero. :-)
5750 if (cp->xerr_status & (XE_EXTRA_DATA|XE_SODL_UNRUN|XE_SWIDE_OVRUN)) {
5751 if (cp->xerr_status & XE_EXTRA_DATA)
5752 resid -= cp->extra_bytes;
5753 if (cp->xerr_status & XE_SODL_UNRUN)
5755 if (cp->xerr_status & XE_SWIDE_OVRUN)
5760 * If all data has been transferred,
5761 * there is no residual.
5763 if (cp->phys.head.lastp == cp->phys.head.goalp)
5767 * If no data transfer occurs, or if the data
5768 * pointer is weird, return full residual.
5770 if (cp->startp == cp->phys.head.lastp ||
5771 sym_evaluate_dp(np, cp, scr_to_cpu(cp->phys.head.lastp),
5773 return cp->data_len;
5777 * If we were auto-sensing, then we are done.
5779 if (cp->host_flags & HF_SENSE) {
5784 * We are now full comfortable in the computation
5785 * of the data residual (2's complement).
5787 dp_sgmin = SYM_CONF_MAX_SG - cp->segments;
5788 resid = -cp->ext_ofs;
5789 for (dp_sg = cp->ext_sg; dp_sg < SYM_CONF_MAX_SG; ++dp_sg) {
5790 u_int tmp = scr_to_cpu(cp->phys.data[dp_sg].size);
5791 resid += (tmp & 0xffffff);
5795 * Hopefully, the result is not too wrong.
5801 * Print out the content of a SCSI message.
5804 static int sym_show_msg (u_char * msg)
5808 if (*msg==M_EXTENDED) {
5810 if (i-1>msg[1]) break;
5811 printf ("-%x",msg[i]);
5814 } else if ((*msg & 0xf0) == 0x20) {
5815 printf ("-%x",msg[1]);
5821 static void sym_print_msg (ccb_p cp, char *label, u_char *msg)
5825 printf ("%s: ", label);
5827 (void) sym_show_msg (msg);
5832 * Negotiation for WIDE and SYNCHRONOUS DATA TRANSFER.
5834 * When we try to negotiate, we append the negotiation message
5835 * to the identify and (maybe) simple tag message.
5836 * The host status field is set to HS_NEGOTIATE to mark this
5839 * If the target doesn't answer this message immediately
5840 * (as required by the standard), the SIR_NEGO_FAILED interrupt
5841 * will be raised eventually.
5842 * The handler removes the HS_NEGOTIATE status, and sets the
5843 * negotiated value to the default (async / nowide).
5845 * If we receive a matching answer immediately, we check it
5846 * for validity, and set the values.
5848 * If we receive a Reject message immediately, we assume the
5849 * negotiation has failed, and fall back to standard values.
5851 * If we receive a negotiation message while not in HS_NEGOTIATE
5852 * state, it's a target initiated negotiation. We prepare a
5853 * (hopefully) valid answer, set our parameters, and send back
5854 * this answer to the target.
5856 * If the target doesn't fetch the answer (no message out phase),
5857 * we assume the negotiation has failed, and fall back to default
5858 * settings (SIR_NEGO_PROTO interrupt).
5860 * When we set the values, we adjust them in all ccbs belonging
5861 * to this target, in the controller's register, and in the "phys"
5862 * field of the controller's struct sym_hcb.
5866 * chip handler for SYNCHRONOUS DATA TRANSFER REQUEST (SDTR) message.
5868 static void sym_sync_nego(hcb_p np, tcb_p tp, ccb_p cp)
5870 u_char chg, ofs, per, fak, div;
5874 * Synchronous request message received.
5876 if (DEBUG_FLAGS & DEBUG_NEGO) {
5877 sym_print_msg(cp, "sync msgin", np->msgin);
5881 * request or answer ?
5883 if (INB (HS_PRT) == HS_NEGOTIATE) {
5884 OUTB (HS_PRT, HS_BUSY);
5885 if (cp->nego_status && cp->nego_status != NS_SYNC)
5891 * get requested values.
5898 * check values against our limits.
5901 if (ofs > np->maxoffs)
5902 {chg = 1; ofs = np->maxoffs;}
5904 if (ofs > tp->tinfo.user.offset)
5905 {chg = 1; ofs = tp->tinfo.user.offset;}
5910 if (per < np->minsync)
5911 {chg = 1; per = np->minsync;}
5913 if (per < tp->tinfo.user.period)
5914 {chg = 1; per = tp->tinfo.user.period;}
5919 if (ofs && sym_getsync(np, 0, per, &div, &fak) < 0)
5922 if (DEBUG_FLAGS & DEBUG_NEGO) {
5924 printf ("sdtr: ofs=%d per=%d div=%d fak=%d chg=%d.\n",
5925 ofs, per, div, fak, chg);
5929 * This was an answer message
5932 if (chg) /* Answer wasn't acceptable. */
5934 sym_setsync (np, cp, ofs, per, div, fak);
5935 OUTL_DSP (SCRIPTA_BA (np, clrack));
5940 * It was a request. Set value and
5941 * prepare an answer message
5943 sym_setsync (np, cp, ofs, per, div, fak);
5945 np->msgout[0] = M_EXTENDED;
5947 np->msgout[2] = M_X_SYNC_REQ;
5948 np->msgout[3] = per;
5949 np->msgout[4] = ofs;
5951 cp->nego_status = NS_SYNC;
5953 if (DEBUG_FLAGS & DEBUG_NEGO) {
5954 sym_print_msg(cp, "sync msgout", np->msgout);
5957 np->msgin [0] = M_NOOP;
5959 OUTL_DSP (SCRIPTB_BA (np, sdtr_resp));
5962 sym_setsync (np, cp, 0, 0, 0, 0);
5963 OUTL_DSP (SCRIPTB_BA (np, msg_bad));
5967 * chip handler for PARALLEL PROTOCOL REQUEST (PPR) message.
5969 static void sym_ppr_nego(hcb_p np, tcb_p tp, ccb_p cp)
5971 u_char chg, ofs, per, fak, dt, div, wide;
5975 * Synchronous request message received.
5977 if (DEBUG_FLAGS & DEBUG_NEGO) {
5978 sym_print_msg(cp, "ppr msgin", np->msgin);
5982 * get requested values.
5987 wide = np->msgin[6];
5988 dt = np->msgin[7] & PPR_OPT_DT;
5991 * request or answer ?
5993 if (INB (HS_PRT) == HS_NEGOTIATE) {
5994 OUTB (HS_PRT, HS_BUSY);
5995 if (cp->nego_status && cp->nego_status != NS_PPR)
6001 * check values against our limits.
6003 if (wide > np->maxwide)
6004 {chg = 1; wide = np->maxwide;}
6005 if (!wide || !(np->features & FE_ULTRA3))
6008 if (wide > tp->tinfo.user.width)
6009 {chg = 1; wide = tp->tinfo.user.width;}
6012 if (!(np->features & FE_U3EN)) /* Broken U3EN bit not supported */
6015 if (dt != (np->msgin[7] & PPR_OPT_MASK)) chg = 1;
6019 if (ofs > np->maxoffs_dt)
6020 {chg = 1; ofs = np->maxoffs_dt;}
6022 else if (ofs > np->maxoffs)
6023 {chg = 1; ofs = np->maxoffs;}
6025 if (ofs > tp->tinfo.user.offset)
6026 {chg = 1; ofs = tp->tinfo.user.offset;}
6032 if (per < np->minsync_dt)
6033 {chg = 1; per = np->minsync_dt;}
6035 else if (per < np->minsync)
6036 {chg = 1; per = np->minsync;}
6038 if (per < tp->tinfo.user.period)
6039 {chg = 1; per = tp->tinfo.user.period;}
6044 if (ofs && sym_getsync(np, dt, per, &div, &fak) < 0)
6047 if (DEBUG_FLAGS & DEBUG_NEGO) {
6050 "dt=%x ofs=%d per=%d wide=%d div=%d fak=%d chg=%d.\n",
6051 dt, ofs, per, wide, div, fak, chg);
6058 if (chg) /* Answer wasn't acceptable */
6060 sym_setpprot (np, cp, dt, ofs, per, wide, div, fak);
6061 OUTL_DSP (SCRIPTA_BA (np, clrack));
6066 * It was a request. Set value and
6067 * prepare an answer message
6069 sym_setpprot (np, cp, dt, ofs, per, wide, div, fak);
6071 np->msgout[0] = M_EXTENDED;
6073 np->msgout[2] = M_X_PPR_REQ;
6074 np->msgout[3] = per;
6076 np->msgout[5] = ofs;
6077 np->msgout[6] = wide;
6080 cp->nego_status = NS_PPR;
6082 if (DEBUG_FLAGS & DEBUG_NEGO) {
6083 sym_print_msg(cp, "ppr msgout", np->msgout);
6086 np->msgin [0] = M_NOOP;
6088 OUTL_DSP (SCRIPTB_BA (np, ppr_resp));
6091 sym_setpprot (np, cp, 0, 0, 0, 0, 0, 0);
6092 OUTL_DSP (SCRIPTB_BA (np, msg_bad));
6094 * If it was a device response that should result in
6095 * ST, we may want to try a legacy negotiation later.
6098 tp->tinfo.goal.options = 0;
6099 tp->tinfo.goal.width = wide;
6100 tp->tinfo.goal.period = per;
6101 tp->tinfo.goal.offset = ofs;
6107 * chip handler for WIDE DATA TRANSFER REQUEST (WDTR) message.
6109 static void sym_wide_nego(hcb_p np, tcb_p tp, ccb_p cp)
6115 * Wide request message received.
6117 if (DEBUG_FLAGS & DEBUG_NEGO) {
6118 sym_print_msg(cp, "wide msgin", np->msgin);
6122 * Is it an request from the device?
6124 if (INB (HS_PRT) == HS_NEGOTIATE) {
6125 OUTB (HS_PRT, HS_BUSY);
6126 if (cp->nego_status && cp->nego_status != NS_WIDE)
6132 * get requested values.
6135 wide = np->msgin[3];
6138 * check values against driver limits.
6140 if (wide > np->maxwide)
6141 {chg = 1; wide = np->maxwide;}
6143 if (wide > tp->tinfo.user.width)
6144 {chg = 1; wide = tp->tinfo.user.width;}
6147 if (DEBUG_FLAGS & DEBUG_NEGO) {
6149 printf ("wdtr: wide=%d chg=%d.\n", wide, chg);
6153 * This was an answer message
6156 if (chg) /* Answer wasn't acceptable. */
6158 sym_setwide (np, cp, wide);
6161 * Negotiate for SYNC immediately after WIDE response.
6162 * This allows to negotiate for both WIDE and SYNC on
6163 * a single SCSI command (Suggested by Justin Gibbs).
6165 if (tp->tinfo.goal.offset) {
6166 np->msgout[0] = M_EXTENDED;
6168 np->msgout[2] = M_X_SYNC_REQ;
6169 np->msgout[3] = tp->tinfo.goal.period;
6170 np->msgout[4] = tp->tinfo.goal.offset;
6172 if (DEBUG_FLAGS & DEBUG_NEGO) {
6173 sym_print_msg(cp, "sync msgout", np->msgout);
6176 cp->nego_status = NS_SYNC;
6177 OUTB (HS_PRT, HS_NEGOTIATE);
6178 OUTL_DSP (SCRIPTB_BA (np, sdtr_resp));
6182 OUTL_DSP (SCRIPTA_BA (np, clrack));
6187 * It was a request, set value and
6188 * prepare an answer message
6190 sym_setwide (np, cp, wide);
6192 np->msgout[0] = M_EXTENDED;
6194 np->msgout[2] = M_X_WIDE_REQ;
6195 np->msgout[3] = wide;
6197 np->msgin [0] = M_NOOP;
6199 cp->nego_status = NS_WIDE;
6201 if (DEBUG_FLAGS & DEBUG_NEGO) {
6202 sym_print_msg(cp, "wide msgout", np->msgout);
6205 OUTL_DSP (SCRIPTB_BA (np, wdtr_resp));
6208 OUTL_DSP (SCRIPTB_BA (np, msg_bad));
6212 * Reset SYNC or WIDE to default settings.
6214 * Called when a negotiation does not succeed either
6215 * on rejection or on protocol error.
6217 * If it was a PPR that made problems, we may want to
6218 * try a legacy negotiation later.
6220 static void sym_nego_default(hcb_p np, tcb_p tp, ccb_p cp)
6223 * any error in negotiation:
6224 * fall back to default mode.
6226 switch (cp->nego_status) {
6229 sym_setpprot (np, cp, 0, 0, 0, 0, 0, 0);
6231 tp->tinfo.goal.options = 0;
6232 if (tp->tinfo.goal.period < np->minsync)
6233 tp->tinfo.goal.period = np->minsync;
6234 if (tp->tinfo.goal.offset > np->maxoffs)
6235 tp->tinfo.goal.offset = np->maxoffs;
6239 sym_setsync (np, cp, 0, 0, 0, 0);
6242 sym_setwide (np, cp, 0);
6245 np->msgin [0] = M_NOOP;
6246 np->msgout[0] = M_NOOP;
6247 cp->nego_status = 0;
6251 * chip handler for MESSAGE REJECT received in response to
6252 * a WIDE or SYNCHRONOUS negotiation.
6254 static void sym_nego_rejected(hcb_p np, tcb_p tp, ccb_p cp)
6256 sym_nego_default(np, tp, cp);
6257 OUTB (HS_PRT, HS_BUSY);
6261 * chip exception handler for programmed interrupts.
6263 void sym_int_sir (hcb_p np)
6265 u_char num = INB (nc_dsps);
6266 u32 dsa = INL (nc_dsa);
6267 ccb_p cp = sym_ccb_from_dsa(np, dsa);
6268 u_char target = INB (nc_sdid) & 0x0f;
6269 tcb_p tp = &np->target[target];
6272 if (DEBUG_FLAGS & DEBUG_TINY) printf ("I#%d", num);
6276 * Command has been completed with error condition
6277 * or has been auto-sensed.
6279 case SIR_COMPLETE_ERROR:
6280 sym_complete_error(np, cp);
6283 * The C code is currently trying to recover from something.
6284 * Typically, user want to abort some command.
6286 case SIR_SCRIPT_STOPPED:
6287 case SIR_TARGET_SELECTED:
6288 case SIR_ABORT_SENT:
6289 sym_sir_task_recovery(np, num);
6292 * The device didn't go to MSG OUT phase after having
6293 * been selected with ATN. We donnot want to handle
6296 case SIR_SEL_ATN_NO_MSG_OUT:
6297 printf ("%s:%d: No MSG OUT phase after selection with ATN.\n",
6298 sym_name (np), target);
6301 * The device didn't switch to MSG IN phase after
6302 * having reseleted the initiator.
6304 case SIR_RESEL_NO_MSG_IN:
6305 printf ("%s:%d: No MSG IN phase after reselection.\n",
6306 sym_name (np), target);
6309 * After reselection, the device sent a message that wasn't
6312 case SIR_RESEL_NO_IDENTIFY:
6313 printf ("%s:%d: No IDENTIFY after reselection.\n",
6314 sym_name (np), target);
6317 * The device reselected a LUN we donnot know about.
6319 case SIR_RESEL_BAD_LUN:
6320 np->msgout[0] = M_RESET;
6323 * The device reselected for an untagged nexus and we
6326 case SIR_RESEL_BAD_I_T_L:
6327 np->msgout[0] = M_ABORT;
6330 * The device reselected for a tagged nexus that we donnot
6333 case SIR_RESEL_BAD_I_T_L_Q:
6334 np->msgout[0] = M_ABORT_TAG;
6337 * The SCRIPTS let us know that the device has grabbed
6338 * our message and will abort the job.
6340 case SIR_RESEL_ABORTED:
6341 np->lastmsg = np->msgout[0];
6342 np->msgout[0] = M_NOOP;
6343 printf ("%s:%d: message %x sent on bad reselection.\n",
6344 sym_name (np), target, np->lastmsg);
6347 * The SCRIPTS let us know that a message has been
6348 * successfully sent to the device.
6350 case SIR_MSG_OUT_DONE:
6351 np->lastmsg = np->msgout[0];
6352 np->msgout[0] = M_NOOP;
6353 /* Should we really care of that */
6354 if (np->lastmsg == M_PARITY || np->lastmsg == M_ID_ERROR) {
6356 cp->xerr_status &= ~XE_PARITY_ERR;
6357 if (!cp->xerr_status)
6358 OUTOFFB (HF_PRT, HF_EXT_ERR);
6363 * The device didn't send a GOOD SCSI status.
6364 * We may have some work to do prior to allow
6365 * the SCRIPTS processor to continue.
6367 case SIR_BAD_SCSI_STATUS:
6370 sym_sir_bad_scsi_status(np, num, cp);
6373 * We are asked by the SCRIPTS to prepare a
6376 case SIR_REJECT_TO_SEND:
6377 sym_print_msg(cp, "M_REJECT to send for ", np->msgin);
6378 np->msgout[0] = M_REJECT;
6381 * We have been ODD at the end of a DATA IN
6382 * transfer and the device didn't send a
6383 * IGNORE WIDE RESIDUE message.
6384 * It is a data overrun condition.
6386 case SIR_SWIDE_OVERRUN:
6388 OUTONB (HF_PRT, HF_EXT_ERR);
6389 cp->xerr_status |= XE_SWIDE_OVRUN;
6393 * We have been ODD at the end of a DATA OUT
6395 * It is a data underrun condition.
6397 case SIR_SODL_UNDERRUN:
6399 OUTONB (HF_PRT, HF_EXT_ERR);
6400 cp->xerr_status |= XE_SODL_UNRUN;
6404 * The device wants us to tranfer more data than
6405 * expected or in the wrong direction.
6406 * The number of extra bytes is in scratcha.
6407 * It is a data overrun condition.
6409 case SIR_DATA_OVERRUN:
6411 OUTONB (HF_PRT, HF_EXT_ERR);
6412 cp->xerr_status |= XE_EXTRA_DATA;
6413 cp->extra_bytes += INL (nc_scratcha);
6417 * The device switched to an illegal phase (4/5).
6421 OUTONB (HF_PRT, HF_EXT_ERR);
6422 cp->xerr_status |= XE_BAD_PHASE;
6426 * We received a message.
6428 case SIR_MSG_RECEIVED:
6431 switch (np->msgin [0]) {
6433 * We received an extended message.
6434 * We handle MODIFY DATA POINTER, SDTR, WDTR
6435 * and reject all other extended messages.
6438 switch (np->msgin [2]) {
6440 if (DEBUG_FLAGS & DEBUG_POINTER)
6441 sym_print_msg(cp,"modify DP",np->msgin);
6442 tmp = (np->msgin[3]<<24) + (np->msgin[4]<<16) +
6443 (np->msgin[5]<<8) + (np->msgin[6]);
6444 sym_modify_dp(np, tp, cp, tmp);
6447 sym_sync_nego(np, tp, cp);
6450 sym_ppr_nego(np, tp, cp);
6453 sym_wide_nego(np, tp, cp);
6460 * We received a 1/2 byte message not handled from SCRIPTS.
6461 * We are only expecting MESSAGE REJECT and IGNORE WIDE
6462 * RESIDUE messages that haven't been anticipated by
6463 * SCRIPTS on SWIDE full condition. Unanticipated IGNORE
6464 * WIDE RESIDUE messages are aliased as MODIFY DP (-1).
6467 if (DEBUG_FLAGS & DEBUG_POINTER)
6468 sym_print_msg(cp,"ign wide residue", np->msgin);
6469 sym_modify_dp(np, tp, cp, -1);
6472 if (INB (HS_PRT) == HS_NEGOTIATE)
6473 sym_nego_rejected(np, tp, cp);
6476 printf ("M_REJECT received (%x:%x).\n",
6477 scr_to_cpu(np->lastmsg), np->msgout[0]);
6486 * We received an unknown message.
6487 * Ignore all MSG IN phases and reject it.
6490 sym_print_msg(cp, "WEIRD message received", np->msgin);
6491 OUTL_DSP (SCRIPTB_BA (np, msg_weird));
6494 * Negotiation failed.
6495 * Target does not send us the reply.
6496 * Remove the HS_NEGOTIATE status.
6498 case SIR_NEGO_FAILED:
6499 OUTB (HS_PRT, HS_BUSY);
6501 * Negotiation failed.
6502 * Target does not want answer message.
6504 case SIR_NEGO_PROTO:
6505 sym_nego_default(np, tp, cp);
6513 OUTL_DSP (SCRIPTB_BA (np, msg_bad));
6516 OUTL_DSP (SCRIPTA_BA (np, clrack));
6522 * Acquire a control block
6524 static ccb_p sym_get_ccb (hcb_p np, u_char tn, u_char ln, u_char tag_order)
6526 tcb_p tp = &np->target[tn];
6527 lcb_p lp = sym_lp(np, tp, ln);
6528 u_short tag = NO_TAG;
6530 ccb_p cp = (ccb_p) 0;
6533 * Look for a free CCB
6535 if (sym_que_empty(&np->free_ccbq))
6536 (void) sym_alloc_ccb(np);
6537 qp = sym_remque_head(&np->free_ccbq);
6540 cp = sym_que_entry(qp, struct sym_ccb, link_ccbq);
6543 * If the LCB is not yet available and the LUN
6544 * has been probed ok, try to allocate the LCB.
6546 if (!lp && sym_is_bit(tp->lun_map, ln)) {
6547 lp = sym_alloc_lcb(np, tn, ln);
6553 * If the LCB is not available here, then the
6554 * logical unit is not yet discovered. For those
6555 * ones only accept 1 SCSI IO per logical unit,
6556 * since we cannot allow disconnections.
6559 if (!sym_is_bit(tp->busy0_map, ln))
6560 sym_set_bit(tp->busy0_map, ln);
6565 * If we have been asked for a tagged command.
6569 * Debugging purpose.
6571 assert(lp->busy_itl == 0);
6573 * Allocate resources for tags if not yet.
6576 sym_alloc_lcb_tags(np, tn, ln);
6581 * Get a tag for this SCSI IO and set up
6582 * the CCB bus address for reselection,
6583 * and count it for this LUN.
6584 * Toggle reselect path to tagged.
6586 if (lp->busy_itlq < SYM_CONF_MAX_TASK) {
6587 tag = lp->cb_tags[lp->ia_tag];
6588 if (++lp->ia_tag == SYM_CONF_MAX_TASK)
6590 lp->itlq_tbl[tag] = cpu_to_scr(cp->ccb_ba);
6593 cpu_to_scr(SCRIPTA_BA (np, resel_tag));
6599 * This command will not be tagged.
6600 * If we already have either a tagged or untagged
6601 * one, refuse to overlap this untagged one.
6605 * Debugging purpose.
6607 assert(lp->busy_itl == 0 && lp->busy_itlq == 0);
6609 * Count this nexus for this LUN.
6610 * Set up the CCB bus address for reselection.
6611 * Toggle reselect path to untagged.
6613 if (++lp->busy_itl == 1) {
6614 lp->head.itl_task_sa = cpu_to_scr(cp->ccb_ba);
6616 cpu_to_scr(SCRIPTA_BA (np, resel_no_tag));
6623 * Put the CCB into the busy queue.
6625 sym_insque_tail(&cp->link_ccbq, &np->busy_ccbq);
6628 * Remember all informations needed to free this CCB.
6635 if (DEBUG_FLAGS & DEBUG_TAGS) {
6636 PRINT_LUN(np, tn, ln);
6637 printf ("ccb @%p using tag %d.\n", cp, tag);
6643 sym_insque_head(&cp->link_ccbq, &np->free_ccbq);
6648 * Release one control block
6650 static void sym_free_ccb (hcb_p np, ccb_p cp)
6652 tcb_p tp = &np->target[cp->target];
6653 lcb_p lp = sym_lp(np, tp, cp->lun);
6655 if (DEBUG_FLAGS & DEBUG_TAGS) {
6656 PRINT_LUN(np, cp->target, cp->lun);
6657 printf ("ccb @%p freeing tag %d.\n", cp, cp->tag);
6665 * If tagged, release the tag, set the relect path
6667 if (cp->tag != NO_TAG) {
6669 * Free the tag value.
6671 lp->cb_tags[lp->if_tag] = cp->tag;
6672 if (++lp->if_tag == SYM_CONF_MAX_TASK)
6675 * Make the reselect path invalid,
6676 * and uncount this CCB.
6678 lp->itlq_tbl[cp->tag] = cpu_to_scr(np->bad_itlq_ba);
6680 } else { /* Untagged */
6682 * Make the reselect path invalid,
6683 * and uncount this CCB.
6685 lp->head.itl_task_sa = cpu_to_scr(np->bad_itl_ba);
6689 * If no JOB active, make the LUN reselect path invalid.
6691 if (lp->busy_itlq == 0 && lp->busy_itl == 0)
6693 cpu_to_scr(SCRIPTB_BA (np, resel_bad_lun));
6696 * Otherwise, we only accept 1 IO per LUN.
6697 * Clear the bit that keeps track of this IO.
6700 sym_clr_bit(tp->busy0_map, cp->lun);
6703 * We donnot queue more than 1 ccb per target
6704 * with negotiation at any time. If this ccb was
6705 * used for negotiation, clear this info in the tcb.
6707 if (cp == tp->nego_cp)
6710 #ifdef SYM_CONF_IARB_SUPPORT
6712 * If we just complete the last queued CCB,
6713 * clear this info that is no longer relevant.
6715 if (cp == np->last_cp)
6719 #ifdef FreeBSD_Bus_Dma_Abstraction
6721 * Unmap user data from DMA map if needed.
6723 if (cp->dmamapped) {
6724 bus_dmamap_unload(np->data_dmat, cp->dmamap);
6730 * Make this CCB available.
6733 cp->host_status = HS_IDLE;
6734 sym_remque(&cp->link_ccbq);
6735 sym_insque_head(&cp->link_ccbq, &np->free_ccbq);
6739 * Allocate a CCB from memory and initialize its fixed part.
6741 static ccb_p sym_alloc_ccb(hcb_p np)
6747 * Prevent from allocating more CCBs than we can
6748 * queue to the controller.
6750 if (np->actccbs >= SYM_CONF_MAX_START)
6754 * Allocate memory for this CCB.
6756 cp = sym_calloc_dma(sizeof(struct sym_ccb), "CCB");
6761 * Allocate a bounce buffer for sense data.
6763 cp->sns_bbuf = sym_calloc_dma(SYM_SNS_BBUF_LEN, "SNS_BBUF");
6768 * Allocate a map for the DMA of user data.
6770 #ifdef FreeBSD_Bus_Dma_Abstraction
6771 if (bus_dmamap_create(np->data_dmat, 0, &cp->dmamap))
6780 * Compute the bus address of this ccb.
6782 cp->ccb_ba = vtobus(cp);
6785 * Insert this ccb into the hashed list.
6787 hcode = CCB_HASH_CODE(cp->ccb_ba);
6788 cp->link_ccbh = np->ccbh[hcode];
6789 np->ccbh[hcode] = cp;
6792 * Initialyze the start and restart actions.
6794 cp->phys.head.go.start = cpu_to_scr(SCRIPTA_BA (np, idle));
6795 cp->phys.head.go.restart = cpu_to_scr(SCRIPTB_BA (np, bad_i_t_l));
6798 * Initilialyze some other fields.
6800 cp->phys.smsg_ext.addr = cpu_to_scr(HCB_BA(np, msgin[2]));
6803 * Chain into free ccb queue.
6805 sym_insque_head(&cp->link_ccbq, &np->free_ccbq);
6811 sym_mfree_dma(cp->sns_bbuf,SYM_SNS_BBUF_LEN,"SNS_BBUF");
6812 sym_mfree_dma(cp, sizeof(*cp), "CCB");
6818 * Look up a CCB from a DSA value.
6820 static ccb_p sym_ccb_from_dsa(hcb_p np, u32 dsa)
6825 hcode = CCB_HASH_CODE(dsa);
6826 cp = np->ccbh[hcode];
6828 if (cp->ccb_ba == dsa)
6837 * Target control block initialisation.
6838 * Nothing important to do at the moment.
6840 static void sym_init_tcb (hcb_p np, u_char tn)
6843 * Check some alignments required by the chip.
6845 assert (((offsetof(struct sym_reg, nc_sxfer) ^
6846 offsetof(struct sym_tcb, head.sval)) &3) == 0);
6847 assert (((offsetof(struct sym_reg, nc_scntl3) ^
6848 offsetof(struct sym_tcb, head.wval)) &3) == 0);
6852 * Lun control block allocation and initialization.
6854 static lcb_p sym_alloc_lcb (hcb_p np, u_char tn, u_char ln)
6856 tcb_p tp = &np->target[tn];
6857 lcb_p lp = sym_lp(np, tp, ln);
6860 * Already done, just return.
6865 * Check against some race.
6867 assert(!sym_is_bit(tp->busy0_map, ln));
6870 * Initialize the target control block if not yet.
6872 sym_init_tcb (np, tn);
6875 * Allocate the LCB bus address array.
6876 * Compute the bus address of this table.
6878 if (ln && !tp->luntbl) {
6881 tp->luntbl = sym_calloc_dma(256, "LUNTBL");
6884 for (i = 0 ; i < 64 ; i++)
6885 tp->luntbl[i] = cpu_to_scr(vtobus(&np->badlun_sa));
6886 tp->head.luntbl_sa = cpu_to_scr(vtobus(tp->luntbl));
6890 * Allocate the table of pointers for LUN(s) > 0, if needed.
6892 if (ln && !tp->lunmp) {
6893 tp->lunmp = sym_calloc(SYM_CONF_MAX_LUN * sizeof(lcb_p),
6901 * Make it available to the chip.
6903 lp = sym_calloc_dma(sizeof(struct sym_lcb), "LCB");
6908 tp->luntbl[ln] = cpu_to_scr(vtobus(lp));
6912 tp->head.lun0_sa = cpu_to_scr(vtobus(lp));
6916 * Let the itl task point to error handling.
6918 lp->head.itl_task_sa = cpu_to_scr(np->bad_itl_ba);
6921 * Set the reselect pattern to our default. :)
6923 lp->head.resel_sa = cpu_to_scr(SCRIPTB_BA (np, resel_bad_lun));
6926 * Set user capabilities.
6928 lp->user_flags = tp->usrflags & (SYM_DISC_ENABLED | SYM_TAGS_ENABLED);
6935 * Allocate LCB resources for tagged command queuing.
6937 static void sym_alloc_lcb_tags (hcb_p np, u_char tn, u_char ln)
6939 tcb_p tp = &np->target[tn];
6940 lcb_p lp = sym_lp(np, tp, ln);
6944 * If LCB not available, try to allocate it.
6946 if (!lp && !(lp = sym_alloc_lcb(np, tn, ln)))
6950 * Allocate the task table and and the tag allocation
6951 * circular buffer. We want both or none.
6953 lp->itlq_tbl = sym_calloc_dma(SYM_CONF_MAX_TASK*4, "ITLQ_TBL");
6956 lp->cb_tags = sym_calloc(SYM_CONF_MAX_TASK, "CB_TAGS");
6958 sym_mfree_dma(lp->itlq_tbl, SYM_CONF_MAX_TASK*4, "ITLQ_TBL");
6964 * Initialize the task table with invalid entries.
6966 for (i = 0 ; i < SYM_CONF_MAX_TASK ; i++)
6967 lp->itlq_tbl[i] = cpu_to_scr(np->notask_ba);
6970 * Fill up the tag buffer with tag numbers.
6972 for (i = 0 ; i < SYM_CONF_MAX_TASK ; i++)
6976 * Make the task table available to SCRIPTS,
6977 * And accept tagged commands now.
6979 lp->head.itlq_tbl_sa = cpu_to_scr(vtobus(lp->itlq_tbl));
6986 * Test the pci bus snoop logic :-(
6988 * Has to be called with interrupts disabled.
6990 #ifndef SYM_CONF_IOMAPPED
6991 static int sym_regtest (hcb_p np)
6993 register volatile u32 data;
6995 * chip registers may NOT be cached.
6996 * write 0xffffffff to a read only register area,
6997 * and try to read it back.
7000 OUTL_OFF(offsetof(struct sym_reg, nc_dstat), data);
7001 data = INL_OFF(offsetof(struct sym_reg, nc_dstat));
7003 if (data == 0xffffffff) {
7005 if ((data & 0xe2f0fffd) != 0x02000080) {
7007 printf ("CACHE TEST FAILED: reg dstat-sstat2 readback %x.\n",
7015 static int sym_snooptest (hcb_p np)
7017 u32 sym_rd, sym_wr, sym_bk, host_rd, host_wr, pc, dstat;
7019 #ifndef SYM_CONF_IOMAPPED
7020 err |= sym_regtest (np);
7021 if (err) return (err);
7025 * Enable Master Parity Checking as we intend
7026 * to enable it for normal operations.
7028 OUTB (nc_ctest4, (np->rv_ctest4 & MPEE));
7032 pc = SCRIPTB0_BA (np, snooptest);
7036 * Set memory and register.
7038 np->cache = cpu_to_scr(host_wr);
7039 OUTL (nc_temp, sym_wr);
7041 * Start script (exchange values)
7043 OUTL (nc_dsa, np->hcb_ba);
7046 * Wait 'til done (with timeout)
7048 for (i=0; i<SYM_SNOOP_TIMEOUT; i++)
7049 if (INB(nc_istat) & (INTF|SIP|DIP))
7051 if (i>=SYM_SNOOP_TIMEOUT) {
7052 printf ("CACHE TEST FAILED: timeout.\n");
7056 * Check for fatal DMA errors.
7058 dstat = INB (nc_dstat);
7059 #if 1 /* Band aiding for broken hardwares that fail PCI parity */
7060 if ((dstat & MDPE) && (np->rv_ctest4 & MPEE)) {
7061 printf ("%s: PCI DATA PARITY ERROR DETECTED - "
7062 "DISABLING MASTER DATA PARITY CHECKING.\n",
7064 np->rv_ctest4 &= ~MPEE;
7068 if (dstat & (MDPE|BF|IID)) {
7069 printf ("CACHE TEST FAILED: DMA error (dstat=0x%02x).", dstat);
7073 * Save termination position.
7077 * Read memory and register.
7079 host_rd = scr_to_cpu(np->cache);
7080 sym_rd = INL (nc_scratcha);
7081 sym_bk = INL (nc_temp);
7084 * Check termination position.
7086 if (pc != SCRIPTB0_BA (np, snoopend)+8) {
7087 printf ("CACHE TEST FAILED: script execution failed.\n");
7088 printf ("start=%08lx, pc=%08lx, end=%08lx\n",
7089 (u_long) SCRIPTB0_BA (np, snooptest), (u_long) pc,
7090 (u_long) SCRIPTB0_BA (np, snoopend) +8);
7096 if (host_wr != sym_rd) {
7097 printf ("CACHE TEST FAILED: host wrote %d, chip read %d.\n",
7098 (int) host_wr, (int) sym_rd);
7101 if (host_rd != sym_wr) {
7102 printf ("CACHE TEST FAILED: chip wrote %d, host read %d.\n",
7103 (int) sym_wr, (int) host_rd);
7106 if (sym_bk != sym_wr) {
7107 printf ("CACHE TEST FAILED: chip wrote %d, read back %d.\n",
7108 (int) sym_wr, (int) sym_bk);
7116 * Determine the chip's clock frequency.
7118 * This is essential for the negotiation of the synchronous
7121 * Note: we have to return the correct value.
7122 * THERE IS NO SAFE DEFAULT VALUE.
7124 * Most NCR/SYMBIOS boards are delivered with a 40 Mhz clock.
7125 * 53C860 and 53C875 rev. 1 support fast20 transfers but
7126 * do not have a clock doubler and so are provided with a
7127 * 80 MHz clock. All other fast20 boards incorporate a doubler
7128 * and so should be delivered with a 40 MHz clock.
7129 * The recent fast40 chips (895/896/895A/1010) use a 40 Mhz base
7130 * clock and provide a clock quadrupler (160 Mhz).
7134 * Select SCSI clock frequency
7136 static void sym_selectclock(hcb_p np, u_char scntl3)
7139 * If multiplier not present or not selected, leave here.
7141 if (np->multiplier <= 1) {
7142 OUTB(nc_scntl3, scntl3);
7146 if (sym_verbose >= 2)
7147 printf ("%s: enabling clock multiplier\n", sym_name(np));
7149 OUTB(nc_stest1, DBLEN); /* Enable clock multiplier */
7151 * Wait for the LCKFRQ bit to be set if supported by the chip.
7152 * Otherwise wait 20 micro-seconds.
7154 if (np->features & FE_LCKFRQ) {
7156 while (!(INB(nc_stest4) & LCKFRQ) && --i > 0)
7159 printf("%s: the chip cannot lock the frequency\n",
7163 OUTB(nc_stest3, HSC); /* Halt the scsi clock */
7164 OUTB(nc_scntl3, scntl3);
7165 OUTB(nc_stest1, (DBLEN|DBLSEL));/* Select clock multiplier */
7166 OUTB(nc_stest3, 0x00); /* Restart scsi clock */
7170 * calculate SCSI clock frequency (in KHz)
7172 static unsigned getfreq (hcb_p np, int gen)
7174 unsigned int ms = 0;
7178 * Measure GEN timer delay in order
7179 * to calculate SCSI clock frequency
7181 * This code will never execute too
7182 * many loop iterations (if DELAY is
7183 * reasonably correct). It could get
7184 * too low a delay (too high a freq.)
7185 * if the CPU is slow executing the
7186 * loop for some reason (an NMI, for
7187 * example). For this reason we will
7188 * if multiple measurements are to be
7189 * performed trust the higher delay
7190 * (lower frequency returned).
7192 OUTW (nc_sien , 0); /* mask all scsi interrupts */
7193 (void) INW (nc_sist); /* clear pending scsi interrupt */
7194 OUTB (nc_dien , 0); /* mask all dma interrupts */
7195 (void) INW (nc_sist); /* another one, just to be sure :) */
7196 OUTB (nc_scntl3, 4); /* set pre-scaler to divide by 3 */
7197 OUTB (nc_stime1, 0); /* disable general purpose timer */
7198 OUTB (nc_stime1, gen); /* set to nominal delay of 1<<gen * 125us */
7199 while (!(INW(nc_sist) & GEN) && ms++ < 100000)
7200 UDELAY (1000); /* count ms */
7201 OUTB (nc_stime1, 0); /* disable general purpose timer */
7203 * set prescaler to divide by whatever 0 means
7204 * 0 ought to choose divide by 2, but appears
7205 * to set divide by 3.5 mode in my 53c810 ...
7207 OUTB (nc_scntl3, 0);
7210 * adjust for prescaler, and convert into KHz
7212 f = ms ? ((1 << gen) * 4340) / ms : 0;
7214 if (sym_verbose >= 2)
7215 printf ("%s: Delay (GEN=%d): %u msec, %u KHz\n",
7216 sym_name(np), gen, ms, f);
7221 static unsigned sym_getfreq (hcb_p np)
7226 (void) getfreq (np, gen); /* throw away first result */
7227 f1 = getfreq (np, gen);
7228 f2 = getfreq (np, gen);
7229 if (f1 > f2) f1 = f2; /* trust lower result */
7234 * Get/probe chip SCSI clock frequency
7236 static void sym_getclock (hcb_p np, int mult)
7238 unsigned char scntl3 = np->sv_scntl3;
7239 unsigned char stest1 = np->sv_stest1;
7243 * For the C10 core, assume 40 MHz.
7245 if (np->features & FE_C10) {
7246 np->multiplier = mult;
7247 np->clock_khz = 40000 * mult;
7254 * True with 875/895/896/895A with clock multiplier selected
7256 if (mult > 1 && (stest1 & (DBLEN+DBLSEL)) == DBLEN+DBLSEL) {
7257 if (sym_verbose >= 2)
7258 printf ("%s: clock multiplier found\n", sym_name(np));
7259 np->multiplier = mult;
7263 * If multiplier not found or scntl3 not 7,5,3,
7264 * reset chip and get frequency from general purpose timer.
7265 * Otherwise trust scntl3 BIOS setting.
7267 if (np->multiplier != mult || (scntl3 & 7) < 3 || !(scntl3 & 1)) {
7268 OUTB (nc_stest1, 0); /* make sure doubler is OFF */
7269 f1 = sym_getfreq (np);
7272 printf ("%s: chip clock is %uKHz\n", sym_name(np), f1);
7274 if (f1 < 45000) f1 = 40000;
7275 else if (f1 < 55000) f1 = 50000;
7278 if (f1 < 80000 && mult > 1) {
7279 if (sym_verbose >= 2)
7280 printf ("%s: clock multiplier assumed\n",
7282 np->multiplier = mult;
7285 if ((scntl3 & 7) == 3) f1 = 40000;
7286 else if ((scntl3 & 7) == 5) f1 = 80000;
7289 f1 /= np->multiplier;
7293 * Compute controller synchronous parameters.
7295 f1 *= np->multiplier;
7300 * Get/probe PCI clock frequency
7302 static int sym_getpciclock (hcb_p np)
7307 * For the C1010-33, this doesn't work.
7308 * For the C1010-66, this will be tested when I'll have
7309 * such a beast to play with.
7311 if (!(np->features & FE_C10)) {
7312 OUTB (nc_stest1, SCLK); /* Use the PCI clock as SCSI clock */
7313 f = (int) sym_getfreq (np);
7314 OUTB (nc_stest1, 0);
7321 /*============= DRIVER ACTION/COMPLETION ====================*/
7324 * Print something that tells about extended errors.
7326 static void sym_print_xerr(ccb_p cp, int x_status)
7328 if (x_status & XE_PARITY_ERR) {
7330 printf ("unrecovered SCSI parity error.\n");
7332 if (x_status & XE_EXTRA_DATA) {
7334 printf ("extraneous data discarded.\n");
7336 if (x_status & XE_BAD_PHASE) {
7338 printf ("illegal scsi phase (4/5).\n");
7340 if (x_status & XE_SODL_UNRUN) {
7342 printf ("ODD transfer in DATA OUT phase.\n");
7344 if (x_status & XE_SWIDE_OVRUN) {
7346 printf ("ODD transfer in DATA IN phase.\n");
7351 * Choose the more appropriate CAM status if
7352 * the IO encountered an extended error.
7354 static int sym_xerr_cam_status(int cam_status, int x_status)
7357 if (x_status & XE_PARITY_ERR)
7358 cam_status = CAM_UNCOR_PARITY;
7359 else if (x_status &(XE_EXTRA_DATA|XE_SODL_UNRUN|XE_SWIDE_OVRUN))
7360 cam_status = CAM_DATA_RUN_ERR;
7361 else if (x_status & XE_BAD_PHASE)
7362 cam_status = CAM_REQ_CMP_ERR;
7364 cam_status = CAM_REQ_CMP_ERR;
7370 * Complete execution of a SCSI command with extented
7371 * error, SCSI status error, or having been auto-sensed.
7373 * The SCRIPTS processor is not running there, so we
7374 * can safely access IO registers and remove JOBs from
7376 * SCRATCHA is assumed to have been loaded with STARTPOS
7377 * before the SCRIPTS called the C code.
7379 static void sym_complete_error (hcb_p np, ccb_p cp)
7381 struct ccb_scsiio *csio;
7386 * Paranoid check. :)
7388 if (!cp || !cp->cam_ccb)
7391 if (DEBUG_FLAGS & (DEBUG_TINY|DEBUG_RESULT)) {
7392 printf ("CCB=%lx STAT=%x/%x/%x DEV=%d/%d\n", (unsigned long)cp,
7393 cp->host_status, cp->ssss_status, cp->host_flags,
7394 cp->target, cp->lun);
7399 * Get CAM command pointer.
7401 csio = &cp->cam_ccb->csio;
7404 * Check for extended errors.
7406 if (cp->xerr_status) {
7408 sym_print_xerr(cp, cp->xerr_status);
7409 if (cp->host_status == HS_COMPLETE)
7410 cp->host_status = HS_COMP_ERR;
7414 * Calculate the residual.
7416 csio->sense_resid = 0;
7417 csio->resid = sym_compute_residual(np, cp);
7419 if (!SYM_CONF_RESIDUAL_SUPPORT) {/* If user does not want residuals */
7420 csio->resid = 0; /* throw them away. :) */
7424 if (cp->host_flags & HF_SENSE) { /* Auto sense */
7425 csio->scsi_status = cp->sv_scsi_status; /* Restore status */
7426 csio->sense_resid = csio->resid; /* Swap residuals */
7427 csio->resid = cp->sv_resid;
7429 if (sym_verbose && cp->sv_xerr_status)
7430 sym_print_xerr(cp, cp->sv_xerr_status);
7431 if (cp->host_status == HS_COMPLETE &&
7432 cp->ssss_status == S_GOOD &&
7433 cp->xerr_status == 0) {
7434 cam_status = sym_xerr_cam_status(CAM_SCSI_STATUS_ERROR,
7435 cp->sv_xerr_status);
7436 cam_status |= CAM_AUTOSNS_VALID;
7438 * Bounce back the sense data to user and
7441 bzero(&csio->sense_data, csio->sense_len);
7442 bcopy(cp->sns_bbuf, &csio->sense_data,
7443 MIN(csio->sense_len, SYM_SNS_BBUF_LEN));
7444 csio->sense_resid += csio->sense_len;
7445 csio->sense_resid -= SYM_SNS_BBUF_LEN;
7448 * If the device reports a UNIT ATTENTION condition
7449 * due to a RESET condition, we should consider all
7450 * disconnect CCBs for this unit as aborted.
7454 p = (u_char *) csio->sense_data;
7455 if (p[0]==0x70 && p[2]==0x6 && p[12]==0x29)
7456 sym_clear_tasks(np, CAM_REQ_ABORTED,
7457 cp->target,cp->lun, -1);
7462 cam_status = CAM_AUTOSENSE_FAIL;
7464 else if (cp->host_status == HS_COMPLETE) { /* Bad SCSI status */
7465 csio->scsi_status = cp->ssss_status;
7466 cam_status = CAM_SCSI_STATUS_ERROR;
7468 else if (cp->host_status == HS_SEL_TIMEOUT) /* Selection timeout */
7469 cam_status = CAM_SEL_TIMEOUT;
7470 else if (cp->host_status == HS_UNEXPECTED) /* Unexpected BUS FREE*/
7471 cam_status = CAM_UNEXP_BUSFREE;
7472 else { /* Extended error */
7475 printf ("COMMAND FAILED (%x %x %x).\n",
7476 cp->host_status, cp->ssss_status,
7479 csio->scsi_status = cp->ssss_status;
7481 * Set the most appropriate value for CAM status.
7483 cam_status = sym_xerr_cam_status(CAM_REQ_CMP_ERR,
7488 * Dequeue all queued CCBs for that device
7489 * not yet started by SCRIPTS.
7491 i = (INL (nc_scratcha) - np->squeue_ba) / 4;
7492 (void) sym_dequeue_from_squeue(np, i, cp->target, cp->lun, -1);
7495 * Restart the SCRIPTS processor.
7497 OUTL_DSP (SCRIPTA_BA (np, start));
7499 #ifdef FreeBSD_Bus_Dma_Abstraction
7501 * Synchronize DMA map if needed.
7503 if (cp->dmamapped) {
7504 bus_dmamap_sync(np->data_dmat, cp->dmamap,
7505 (bus_dmasync_op_t)(cp->dmamapped == SYM_DMA_READ ?
7506 BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE));
7510 * Add this one to the COMP queue.
7511 * Complete all those commands with either error
7512 * or requeue condition.
7514 sym_set_cam_status((union ccb *) csio, cam_status);
7515 sym_remque(&cp->link_ccbq);
7516 sym_insque_head(&cp->link_ccbq, &np->comp_ccbq);
7517 sym_flush_comp_queue(np, 0);
7521 * Complete execution of a successful SCSI command.
7523 * Only successful commands go to the DONE queue,
7524 * since we need to have the SCRIPTS processor
7525 * stopped on any error condition.
7526 * The SCRIPTS processor is running while we are
7527 * completing successful commands.
7529 static void sym_complete_ok (hcb_p np, ccb_p cp)
7531 struct ccb_scsiio *csio;
7536 * Paranoid check. :)
7538 if (!cp || !cp->cam_ccb)
7540 assert (cp->host_status == HS_COMPLETE);
7543 * Get command, target and lun pointers.
7545 csio = &cp->cam_ccb->csio;
7546 tp = &np->target[cp->target];
7547 lp = sym_lp(np, tp, cp->lun);
7550 * Assume device discovered on first success.
7553 sym_set_bit(tp->lun_map, cp->lun);
7556 * If all data have been transferred, given than no
7557 * extended error did occur, there is no residual.
7560 if (cp->phys.head.lastp != cp->phys.head.goalp)
7561 csio->resid = sym_compute_residual(np, cp);
7564 * Wrong transfer residuals may be worse than just always
7565 * returning zero. User can disable this feature from
7566 * sym_conf.h. Residual support is enabled by default.
7568 if (!SYM_CONF_RESIDUAL_SUPPORT)
7571 #ifdef FreeBSD_Bus_Dma_Abstraction
7573 * Synchronize DMA map if needed.
7575 if (cp->dmamapped) {
7576 bus_dmamap_sync(np->data_dmat, cp->dmamap,
7577 (bus_dmasync_op_t)(cp->dmamapped == SYM_DMA_READ ?
7578 BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE));
7582 * Set status and complete the command.
7584 csio->scsi_status = cp->ssss_status;
7585 sym_set_cam_status((union ccb *) csio, CAM_REQ_CMP);
7586 sym_free_ccb (np, cp);
7587 sym_xpt_done(np, (union ccb *) csio);
7591 * Our timeout handler.
7593 static void sym_timeout1(void *arg)
7595 union ccb *ccb = (union ccb *) arg;
7596 hcb_p np = ccb->ccb_h.sym_hcb_ptr;
7599 * Check that the CAM CCB is still queued.
7604 switch(ccb->ccb_h.func_code) {
7606 (void) sym_abort_scsiio(np, ccb, 1);
7613 static void sym_timeout(void *arg)
7623 static int sym_abort_scsiio(hcb_p np, union ccb *ccb, int timed_out)
7629 * Look up our CCB control block.
7632 FOR_EACH_QUEUED_ELEMENT(&np->busy_ccbq, qp) {
7633 ccb_p cp2 = sym_que_entry(qp, struct sym_ccb, link_ccbq);
7634 if (cp2->cam_ccb == ccb) {
7639 if (!cp || cp->host_status == HS_WAIT)
7643 * If a previous abort didn't succeed in time,
7644 * perform a BUS reset.
7647 sym_reset_scsi_bus(np, 1);
7652 * Mark the CCB for abort and allow time for.
7654 cp->to_abort = timed_out ? 2 : 1;
7655 ccb->ccb_h.timeout_ch = timeout(sym_timeout, (caddr_t) ccb, 10*hz);
7658 * Tell the SCRIPTS processor to stop and synchronize with us.
7660 np->istat_sem = SEM;
7661 OUTB (nc_istat, SIGP|SEM);
7666 * Reset a SCSI device (all LUNs of a target).
7668 static void sym_reset_dev(hcb_p np, union ccb *ccb)
7671 struct ccb_hdr *ccb_h = &ccb->ccb_h;
7673 if (ccb_h->target_id == np->myaddr ||
7674 ccb_h->target_id >= SYM_CONF_MAX_TARGET ||
7675 ccb_h->target_lun >= SYM_CONF_MAX_LUN) {
7676 sym_xpt_done2(np, ccb, CAM_DEV_NOT_THERE);
7680 tp = &np->target[ccb_h->target_id];
7683 sym_xpt_done2(np, ccb, CAM_REQ_CMP);
7685 np->istat_sem = SEM;
7686 OUTB (nc_istat, SIGP|SEM);
7691 * SIM action entry point.
7693 static void sym_action(struct cam_sim *sim, union ccb *ccb)
7696 sym_action1(sim, ccb);
7700 static void sym_action1(struct cam_sim *sim, union ccb *ccb)
7707 u_char idmsg, *msgptr;
7709 struct ccb_scsiio *csio;
7710 struct ccb_hdr *ccb_h;
7712 CAM_DEBUG(ccb->ccb_h.path, CAM_DEBUG_TRACE, ("sym_action\n"));
7715 * Retrieve our controller data structure.
7717 np = (hcb_p) cam_sim_softc(sim);
7720 * The common case is SCSI IO.
7721 * We deal with other ones elsewhere.
7723 if (ccb->ccb_h.func_code != XPT_SCSI_IO) {
7724 sym_action2(sim, ccb);
7728 ccb_h = &csio->ccb_h;
7731 * Work around races.
7733 if ((ccb_h->status & CAM_STATUS_MASK) != CAM_REQ_INPROG) {
7739 * Minimal checkings, so that we will not
7740 * go outside our tables.
7742 if (ccb_h->target_id == np->myaddr ||
7743 ccb_h->target_id >= SYM_CONF_MAX_TARGET ||
7744 ccb_h->target_lun >= SYM_CONF_MAX_LUN) {
7745 sym_xpt_done2(np, ccb, CAM_DEV_NOT_THERE);
7750 * Retreive the target and lun descriptors.
7752 tp = &np->target[ccb_h->target_id];
7753 lp = sym_lp(np, tp, ccb_h->target_lun);
7756 * Complete the 1st INQUIRY command with error
7757 * condition if the device is flagged NOSCAN
7758 * at BOOT in the NVRAM. This may speed up
7759 * the boot and maintain coherency with BIOS
7760 * device numbering. Clearing the flag allows
7761 * user to rescan skipped devices later.
7762 * We also return error for devices not flagged
7763 * for SCAN LUNS in the NVRAM since some mono-lun
7764 * devices behave badly when asked for some non
7765 * zero LUN. Btw, this is an absolute hack.:-)
7767 if (!(ccb_h->flags & CAM_CDB_PHYS) &&
7768 (0x12 == ((ccb_h->flags & CAM_CDB_POINTER) ?
7769 csio->cdb_io.cdb_ptr[0] : csio->cdb_io.cdb_bytes[0]))) {
7770 if ((tp->usrflags & SYM_SCAN_BOOT_DISABLED) ||
7771 ((tp->usrflags & SYM_SCAN_LUNS_DISABLED) &&
7772 ccb_h->target_lun != 0)) {
7773 tp->usrflags &= ~SYM_SCAN_BOOT_DISABLED;
7774 sym_xpt_done2(np, ccb, CAM_DEV_NOT_THERE);
7780 * Get a control block for this IO.
7782 tmp = ((ccb_h->flags & CAM_TAG_ACTION_VALID) != 0);
7783 cp = sym_get_ccb(np, ccb_h->target_id, ccb_h->target_lun, tmp);
7785 sym_xpt_done2(np, ccb, CAM_RESRC_UNAVAIL);
7790 * Keep track of the IO in our CCB.
7795 * Build the IDENTIFY message.
7797 idmsg = M_IDENTIFY | cp->lun;
7798 if (cp->tag != NO_TAG || (lp && (lp->current_flags & SYM_DISC_ENABLED)))
7801 msgptr = cp->scsi_smsg;
7803 msgptr[msglen++] = idmsg;
7806 * Build the tag message if present.
7808 if (cp->tag != NO_TAG) {
7809 u_char order = csio->tag_action;
7817 order = M_SIMPLE_TAG;
7819 msgptr[msglen++] = order;
7822 * For less than 128 tags, actual tags are numbered
7823 * 1,3,5,..2*MAXTAGS+1,since we may have to deal
7824 * with devices that have problems with #TAG 0 or too
7825 * great #TAG numbers. For more tags (up to 256),
7826 * we use directly our tag number.
7828 #if SYM_CONF_MAX_TASK > (512/4)
7829 msgptr[msglen++] = cp->tag;
7831 msgptr[msglen++] = (cp->tag << 1) + 1;
7836 * Build a negotiation message if needed.
7837 * (nego_status is filled by sym_prepare_nego())
7839 cp->nego_status = 0;
7840 if (tp->tinfo.current.width != tp->tinfo.goal.width ||
7841 tp->tinfo.current.period != tp->tinfo.goal.period ||
7842 tp->tinfo.current.offset != tp->tinfo.goal.offset ||
7843 tp->tinfo.current.options != tp->tinfo.goal.options) {
7844 if (!tp->nego_cp && lp)
7845 msglen += sym_prepare_nego(np, cp, 0, msgptr + msglen);
7855 cp->phys.head.go.start = cpu_to_scr(SCRIPTA_BA (np, select));
7856 cp->phys.head.go.restart = cpu_to_scr(SCRIPTA_BA (np, resel_dsa));
7861 cp->phys.select.sel_id = cp->target;
7862 cp->phys.select.sel_scntl3 = tp->head.wval;
7863 cp->phys.select.sel_sxfer = tp->head.sval;
7864 cp->phys.select.sel_scntl4 = tp->head.uval;
7869 cp->phys.smsg.addr = cpu_to_scr(CCB_BA (cp, scsi_smsg));
7870 cp->phys.smsg.size = cpu_to_scr(msglen);
7875 if (sym_setup_cdb(np, csio, cp) < 0) {
7876 sym_free_ccb(np, cp);
7877 sym_xpt_done(np, ccb);
7884 #if 0 /* Provision */
7885 cp->actualquirks = tp->quirks;
7887 cp->actualquirks = SYM_QUIRK_AUTOSAVE;
7888 cp->host_status = cp->nego_status ? HS_NEGOTIATE : HS_BUSY;
7889 cp->ssss_status = S_ILLEGAL;
7890 cp->xerr_status = 0;
7892 cp->extra_bytes = 0;
7895 * extreme data pointer.
7896 * shall be positive, so -1 is lower than lowest.:)
7902 * Build the data descriptor block
7905 sym_setup_data_and_start(np, csio, cp);
7909 * Setup buffers and pointers that address the CDB.
7910 * I bet, physical CDBs will never be used on the planet,
7911 * since they can be bounced without significant overhead.
7913 static int sym_setup_cdb(hcb_p np, struct ccb_scsiio *csio, ccb_p cp)
7915 struct ccb_hdr *ccb_h;
7919 ccb_h = &csio->ccb_h;
7922 * CDB is 16 bytes max.
7924 if (csio->cdb_len > sizeof(cp->cdb_buf)) {
7925 sym_set_cam_status(cp->cam_ccb, CAM_REQ_INVALID);
7928 cmd_len = csio->cdb_len;
7930 if (ccb_h->flags & CAM_CDB_POINTER) {
7931 /* CDB is a pointer */
7932 if (!(ccb_h->flags & CAM_CDB_PHYS)) {
7933 /* CDB pointer is virtual */
7934 bcopy(csio->cdb_io.cdb_ptr, cp->cdb_buf, cmd_len);
7935 cmd_ba = CCB_BA (cp, cdb_buf[0]);
7937 /* CDB pointer is physical */
7939 cmd_ba = ((u32)csio->cdb_io.cdb_ptr) & 0xffffffff;
7941 sym_set_cam_status(cp->cam_ccb, CAM_REQ_INVALID);
7946 /* CDB is in the CAM ccb (buffer) */
7947 bcopy(csio->cdb_io.cdb_bytes, cp->cdb_buf, cmd_len);
7948 cmd_ba = CCB_BA (cp, cdb_buf[0]);
7951 cp->phys.cmd.addr = cpu_to_scr(cmd_ba);
7952 cp->phys.cmd.size = cpu_to_scr(cmd_len);
7958 * Set up data pointers used by SCRIPTS.
7960 static void __inline
7961 sym_setup_data_pointers(hcb_p np, ccb_p cp, int dir)
7966 * No segments means no data.
7972 * Set the data pointer.
7976 goalp = SCRIPTA_BA (np, data_out2) + 8;
7977 lastp = goalp - 8 - (cp->segments * (2*4));
7980 cp->host_flags |= HF_DATA_IN;
7981 goalp = SCRIPTA_BA (np, data_in2) + 8;
7982 lastp = goalp - 8 - (cp->segments * (2*4));
7986 lastp = goalp = SCRIPTB_BA (np, no_data);
7990 cp->phys.head.lastp = cpu_to_scr(lastp);
7991 cp->phys.head.goalp = cpu_to_scr(goalp);
7992 cp->phys.head.savep = cpu_to_scr(lastp);
7993 cp->startp = cp->phys.head.savep;
7997 #ifdef FreeBSD_Bus_Dma_Abstraction
7999 * Call back routine for the DMA map service.
8000 * If bounce buffers are used (why ?), we may sleep and then
8001 * be called there in another context.
8004 sym_execute_ccb(void *arg, bus_dma_segment_t *psegs, int nsegs, int error)
8015 np = (hcb_p) cp->arg;
8018 * Deal with weird races.
8020 if (sym_get_cam_status(ccb) != CAM_REQ_INPROG)
8024 * Deal with weird errors.
8028 sym_set_cam_status(cp->cam_ccb, CAM_REQ_ABORTED);
8033 * Build the data descriptor for the chip.
8037 /* 896 rev 1 requires to be careful about boundaries */
8038 if (np->device_id == PCI_ID_SYM53C896 && np->revision_id <= 1)
8039 retv = sym_scatter_sg_physical(np, cp, psegs, nsegs);
8041 retv = sym_fast_scatter_sg_physical(np,cp, psegs,nsegs);
8043 sym_set_cam_status(cp->cam_ccb, CAM_REQ_TOO_BIG);
8049 * Synchronize the DMA map only if we have
8050 * actually mapped the data.
8052 if (cp->dmamapped) {
8053 bus_dmamap_sync(np->data_dmat, cp->dmamap,
8054 (bus_dmasync_op_t)(cp->dmamapped == SYM_DMA_READ ?
8055 BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE));
8059 * Set host status to busy state.
8060 * May have been set back to HS_WAIT to avoid a race.
8062 cp->host_status = cp->nego_status ? HS_NEGOTIATE : HS_BUSY;
8065 * Set data pointers.
8067 sym_setup_data_pointers(np, cp, (ccb->ccb_h.flags & CAM_DIR_MASK));
8070 * Enqueue this IO in our pending queue.
8072 sym_enqueue_cam_ccb(np, ccb);
8075 * When `#ifed 1', the code below makes the driver
8076 * panic on the first attempt to write to a SCSI device.
8077 * It is the first test we want to do after a driver
8078 * change that does not seem obviously safe. :)
8081 switch (cp->cdb_buf[0]) {
8082 case 0x0A: case 0x2A: case 0xAA:
8083 panic("XXXXXXXXXXXXX WRITE NOT YET ALLOWED XXXXXXXXXXXXXX\n");
8091 * Activate this job.
8093 sym_put_start_queue(np, cp);
8098 sym_free_ccb(np, cp);
8099 sym_xpt_done(np, ccb);
8104 * How complex it gets to deal with the data in CAM.
8105 * The Bus Dma stuff makes things still more complex.
8108 sym_setup_data_and_start(hcb_p np, struct ccb_scsiio *csio, ccb_p cp)
8110 struct ccb_hdr *ccb_h;
8113 ccb_h = &csio->ccb_h;
8116 * Now deal with the data.
8118 cp->data_len = csio->dxfer_len;
8122 * No direction means no data.
8124 dir = (ccb_h->flags & CAM_DIR_MASK);
8125 if (dir == CAM_DIR_NONE) {
8126 sym_execute_ccb(cp, NULL, 0, 0);
8130 if (!(ccb_h->flags & CAM_SCATTER_VALID)) {
8132 if (!(ccb_h->flags & CAM_DATA_PHYS)) {
8133 /* Buffer is virtual */
8136 cp->dmamapped = (dir == CAM_DIR_IN) ?
8137 SYM_DMA_READ : SYM_DMA_WRITE;
8139 retv = bus_dmamap_load(np->data_dmat, cp->dmamap,
8140 csio->data_ptr, csio->dxfer_len,
8141 sym_execute_ccb, cp, 0);
8142 if (retv == EINPROGRESS) {
8143 cp->host_status = HS_WAIT;
8144 xpt_freeze_simq(np->sim, 1);
8145 csio->ccb_h.status |= CAM_RELEASE_SIMQ;
8149 /* Buffer is physical */
8150 struct bus_dma_segment seg;
8152 seg.ds_addr = (bus_addr_t) csio->data_ptr;
8153 sym_execute_ccb(cp, &seg, 1, 0);
8156 /* Scatter/gather list */
8157 struct bus_dma_segment *segs;
8159 if ((ccb_h->flags & CAM_SG_LIST_PHYS) != 0) {
8160 /* The SG list pointer is physical */
8161 sym_set_cam_status(cp->cam_ccb, CAM_REQ_INVALID);
8165 if (!(ccb_h->flags & CAM_DATA_PHYS)) {
8166 /* SG buffer pointers are virtual */
8167 sym_set_cam_status(cp->cam_ccb, CAM_REQ_INVALID);
8171 /* SG buffer pointers are physical */
8172 segs = (struct bus_dma_segment *)csio->data_ptr;
8173 sym_execute_ccb(cp, segs, csio->sglist_cnt, 0);
8177 sym_free_ccb(np, cp);
8178 sym_xpt_done(np, (union ccb *) csio);
8182 * Move the scatter list to our data block.
8185 sym_fast_scatter_sg_physical(hcb_p np, ccb_p cp,
8186 bus_dma_segment_t *psegs, int nsegs)
8188 struct sym_tblmove *data;
8189 bus_dma_segment_t *psegs2;
8191 if (nsegs > SYM_CONF_MAX_SG)
8194 data = &cp->phys.data[SYM_CONF_MAX_SG-1];
8195 psegs2 = &psegs[nsegs-1];
8196 cp->segments = nsegs;
8199 data->addr = cpu_to_scr(psegs2->ds_addr);
8200 data->size = cpu_to_scr(psegs2->ds_len);
8201 if (DEBUG_FLAGS & DEBUG_SCATTER) {
8202 printf ("%s scatter: paddr=%lx len=%ld\n",
8203 sym_name(np), (long) psegs2->ds_addr,
8204 (long) psegs2->ds_len);
8206 if (psegs2 != psegs) {
8216 #else /* FreeBSD_Bus_Dma_Abstraction */
8219 * How complex it gets to deal with the data in CAM.
8220 * Variant without the Bus Dma Abstraction option.
8223 sym_setup_data_and_start(hcb_p np, struct ccb_scsiio *csio, ccb_p cp)
8225 struct ccb_hdr *ccb_h;
8228 ccb_h = &csio->ccb_h;
8231 * Now deal with the data.
8237 * No direction means no data.
8239 dir = (ccb_h->flags & CAM_DIR_MASK);
8240 if (dir == CAM_DIR_NONE)
8243 if (!(ccb_h->flags & CAM_SCATTER_VALID)) {
8245 if (!(ccb_h->flags & CAM_DATA_PHYS)) {
8246 /* Buffer is virtual */
8247 retv = sym_scatter_virtual(np, cp,
8248 (vm_offset_t) csio->data_ptr,
8249 (vm_size_t) csio->dxfer_len);
8251 /* Buffer is physical */
8252 retv = sym_scatter_physical(np, cp,
8253 (vm_offset_t) csio->data_ptr,
8254 (vm_size_t) csio->dxfer_len);
8257 /* Scatter/gather list */
8259 struct bus_dma_segment *segs;
8260 segs = (struct bus_dma_segment *)csio->data_ptr;
8261 nsegs = csio->sglist_cnt;
8263 if ((ccb_h->flags & CAM_SG_LIST_PHYS) != 0) {
8264 /* The SG list pointer is physical */
8265 sym_set_cam_status(cp->cam_ccb, CAM_REQ_INVALID);
8268 if (!(ccb_h->flags & CAM_DATA_PHYS)) {
8269 /* SG buffer pointers are virtual */
8270 retv = sym_scatter_sg_virtual(np, cp, segs, nsegs);
8272 /* SG buffer pointers are physical */
8273 retv = sym_scatter_sg_physical(np, cp, segs, nsegs);
8277 sym_set_cam_status(cp->cam_ccb, CAM_REQ_TOO_BIG);
8283 * Set data pointers.
8285 sym_setup_data_pointers(np, cp, dir);
8288 * Enqueue this IO in our pending queue.
8290 sym_enqueue_cam_ccb(np, (union ccb *) csio);
8293 * Activate this job.
8295 sym_put_start_queue(np, cp);
8298 * Command is successfully queued.
8302 sym_free_ccb(np, cp);
8303 sym_xpt_done(np, (union ccb *) csio);
8307 * Scatter a virtual buffer into bus addressable chunks.
8310 sym_scatter_virtual(hcb_p np, ccb_p cp, vm_offset_t vaddr, vm_size_t len)
8316 cp->data_len += len;
8320 s = SYM_CONF_MAX_SG - 1 - cp->segments;
8322 while (n && s >= 0) {
8323 pn = (pe - 1) & ~PAGE_MASK;
8329 if (DEBUG_FLAGS & DEBUG_SCATTER) {
8330 printf ("%s scatter: va=%lx pa=%lx siz=%ld\n",
8331 sym_name(np), pn, (u_long) vtobus(pn), k);
8333 cp->phys.data[s].addr = cpu_to_scr(vtobus(pn));
8334 cp->phys.data[s].size = cpu_to_scr(k);
8339 cp->segments = SYM_CONF_MAX_SG - 1 - s;
8345 * Scatter a SG list with virtual addresses into bus addressable chunks.
8348 sym_scatter_sg_virtual(hcb_p np, ccb_p cp, bus_dma_segment_t *psegs, int nsegs)
8352 for (i = nsegs - 1 ; i >= 0 ; --i) {
8353 retv = sym_scatter_virtual(np, cp,
8354 psegs[i].ds_addr, psegs[i].ds_len);
8362 * Scatter a physical buffer into bus addressable chunks.
8365 sym_scatter_physical(hcb_p np, ccb_p cp, vm_offset_t paddr, vm_size_t len)
8367 struct bus_dma_segment seg;
8369 seg.ds_addr = paddr;
8371 return sym_scatter_sg_physical(np, cp, &seg, 1);
8374 #endif /* FreeBSD_Bus_Dma_Abstraction */
8377 * Scatter a SG list with physical addresses into bus addressable chunks.
8378 * We need to ensure 16MB boundaries not to be crossed during DMA of
8379 * each segment, due to some chips being flawed.
8381 #define BOUND_MASK ((1UL<<24)-1)
8383 sym_scatter_sg_physical(hcb_p np, ccb_p cp, bus_dma_segment_t *psegs, int nsegs)
8389 #ifndef FreeBSD_Bus_Dma_Abstraction
8390 s = SYM_CONF_MAX_SG - 1 - cp->segments;
8392 s = SYM_CONF_MAX_SG - 1;
8395 ps = psegs[t].ds_addr;
8396 pe = ps + psegs[t].ds_len;
8399 pn = (pe - 1) & ~BOUND_MASK;
8403 if (DEBUG_FLAGS & DEBUG_SCATTER) {
8404 printf ("%s scatter: paddr=%lx len=%ld\n",
8405 sym_name(np), pn, k);
8407 cp->phys.data[s].addr = cpu_to_scr(pn);
8408 cp->phys.data[s].size = cpu_to_scr(k);
8409 #ifndef FreeBSD_Bus_Dma_Abstraction
8416 ps = psegs[t].ds_addr;
8417 pe = ps + psegs[t].ds_len;
8423 cp->segments = SYM_CONF_MAX_SG - 1 - s;
8425 return t >= 0 ? -1 : 0;
8430 * SIM action for non performance critical stuff.
8432 static void sym_action2(struct cam_sim *sim, union ccb *ccb)
8437 struct ccb_hdr *ccb_h;
8440 * Retrieve our controller data structure.
8442 np = (hcb_p) cam_sim_softc(sim);
8444 ccb_h = &ccb->ccb_h;
8446 switch (ccb_h->func_code) {
8447 case XPT_SET_TRAN_SETTINGS:
8449 struct ccb_trans_settings *cts;
8452 tp = &np->target[ccb_h->target_id];
8455 * Update SPI transport settings in TARGET control block.
8456 * Update SCSI device settings in LUN control block.
8458 lp = sym_lp(np, tp, ccb_h->target_lun);
8459 #ifdef FreeBSD_New_Tran_Settings
8460 if (cts->type == CTS_TYPE_CURRENT_SETTINGS) {
8462 if ((cts->flags & CCB_TRANS_CURRENT_SETTINGS) != 0) {
8464 sym_update_trans(np, tp, &tp->tinfo.goal, cts);
8466 sym_update_dflags(np, &lp->current_flags, cts);
8468 #ifdef FreeBSD_New_Tran_Settings
8469 if (cts->type == CTS_TYPE_USER_SETTINGS) {
8471 if ((cts->flags & CCB_TRANS_USER_SETTINGS) != 0) {
8473 sym_update_trans(np, tp, &tp->tinfo.user, cts);
8475 sym_update_dflags(np, &lp->user_flags, cts);
8478 sym_xpt_done2(np, ccb, CAM_REQ_CMP);
8481 case XPT_GET_TRAN_SETTINGS:
8483 struct ccb_trans_settings *cts;
8484 struct sym_trans *tip;
8488 tp = &np->target[ccb_h->target_id];
8489 lp = sym_lp(np, tp, ccb_h->target_lun);
8491 #ifdef FreeBSD_New_Tran_Settings
8492 #define cts__scsi (&cts->proto_specific.scsi)
8493 #define cts__spi (&cts->xport_specific.spi)
8494 if (cts->type == CTS_TYPE_CURRENT_SETTINGS) {
8495 tip = &tp->tinfo.current;
8496 dflags = lp ? lp->current_flags : 0;
8499 tip = &tp->tinfo.user;
8500 dflags = lp ? lp->user_flags : tp->usrflags;
8503 cts->protocol = PROTO_SCSI;
8504 cts->transport = XPORT_SPI;
8505 cts->protocol_version = tip->scsi_version;
8506 cts->transport_version = tip->spi_version;
8508 cts__spi->sync_period = tip->period;
8509 cts__spi->sync_offset = tip->offset;
8510 cts__spi->bus_width = tip->width;
8511 cts__spi->ppr_options = tip->options;
8513 cts__spi->valid = CTS_SPI_VALID_SYNC_RATE
8514 | CTS_SPI_VALID_SYNC_OFFSET
8515 | CTS_SPI_VALID_BUS_WIDTH
8516 | CTS_SPI_VALID_PPR_OPTIONS;
8518 cts__spi->flags &= ~CTS_SPI_FLAGS_DISC_ENB;
8519 if (dflags & SYM_DISC_ENABLED)
8520 cts__spi->flags |= CTS_SPI_FLAGS_DISC_ENB;
8521 cts__spi->valid |= CTS_SPI_VALID_DISC;
8523 cts__scsi->flags &= ~CTS_SCSI_FLAGS_TAG_ENB;
8524 if (dflags & SYM_TAGS_ENABLED)
8525 cts__scsi->flags |= CTS_SCSI_FLAGS_TAG_ENB;
8526 cts__scsi->valid |= CTS_SCSI_VALID_TQ;
8530 if ((cts->flags & CCB_TRANS_CURRENT_SETTINGS) != 0) {
8531 tip = &tp->tinfo.current;
8532 dflags = lp ? lp->current_flags : 0;
8535 tip = &tp->tinfo.user;
8536 dflags = lp ? lp->user_flags : tp->usrflags;
8539 cts->sync_period = tip->period;
8540 cts->sync_offset = tip->offset;
8541 cts->bus_width = tip->width;
8543 cts->valid = CCB_TRANS_SYNC_RATE_VALID
8544 | CCB_TRANS_SYNC_OFFSET_VALID
8545 | CCB_TRANS_BUS_WIDTH_VALID;
8547 cts->flags &= ~(CCB_TRANS_DISC_ENB|CCB_TRANS_TAG_ENB);
8549 if (dflags & SYM_DISC_ENABLED)
8550 cts->flags |= CCB_TRANS_DISC_ENB;
8552 if (dflags & SYM_TAGS_ENABLED)
8553 cts->flags |= CCB_TRANS_TAG_ENB;
8555 cts->valid |= CCB_TRANS_DISC_VALID;
8556 cts->valid |= CCB_TRANS_TQ_VALID;
8558 sym_xpt_done2(np, ccb, CAM_REQ_CMP);
8561 case XPT_CALC_GEOMETRY:
8563 struct ccb_calc_geometry *ccg;
8565 u32 secs_per_cylinder;
8569 * Silly DOS geometry.
8572 size_mb = ccg->volume_size
8573 / ((1024L * 1024L) / ccg->block_size);
8576 if (size_mb > 1024 && extended) {
8578 ccg->secs_per_track = 63;
8581 ccg->secs_per_track = 32;
8583 secs_per_cylinder = ccg->heads * ccg->secs_per_track;
8584 ccg->cylinders = ccg->volume_size / secs_per_cylinder;
8585 sym_xpt_done2(np, ccb, CAM_REQ_CMP);
8590 struct ccb_pathinq *cpi = &ccb->cpi;
8591 cpi->version_num = 1;
8592 cpi->hba_inquiry = PI_MDP_ABLE|PI_SDTR_ABLE|PI_TAG_ABLE;
8593 if ((np->features & FE_WIDE) != 0)
8594 cpi->hba_inquiry |= PI_WIDE_16;
8595 cpi->target_sprt = 0;
8597 if (np->usrflags & SYM_SCAN_TARGETS_HILO)
8598 cpi->hba_misc |= PIM_SCANHILO;
8599 if (np->usrflags & SYM_AVOID_BUS_RESET)
8600 cpi->hba_misc |= PIM_NOBUSRESET;
8601 cpi->hba_eng_cnt = 0;
8602 cpi->max_target = (np->features & FE_WIDE) ? 15 : 7;
8603 /* Semantic problem:)LUN number max = max number of LUNs - 1 */
8604 cpi->max_lun = SYM_CONF_MAX_LUN-1;
8605 if (SYM_SETUP_MAX_LUN < SYM_CONF_MAX_LUN)
8606 cpi->max_lun = SYM_SETUP_MAX_LUN-1;
8607 cpi->bus_id = cam_sim_bus(sim);
8608 cpi->initiator_id = np->myaddr;
8609 cpi->base_transfer_speed = 3300;
8610 strncpy(cpi->sim_vid, "FreeBSD", SIM_IDLEN);
8611 strncpy(cpi->hba_vid, "Symbios", HBA_IDLEN);
8612 strncpy(cpi->dev_name, cam_sim_name(sim), DEV_IDLEN);
8613 cpi->unit_number = cam_sim_unit(sim);
8615 #ifdef FreeBSD_New_Tran_Settings
8616 cpi->protocol = PROTO_SCSI;
8617 cpi->protocol_version = SCSI_REV_2;
8618 cpi->transport = XPORT_SPI;
8619 cpi->transport_version = 2;
8620 cpi->xport_specific.spi.ppr_options = SID_SPI_CLOCK_ST;
8621 if (np->features & FE_ULTRA3) {
8622 cpi->transport_version = 3;
8623 cpi->xport_specific.spi.ppr_options =
8624 SID_SPI_CLOCK_DT_ST;
8627 sym_xpt_done2(np, ccb, CAM_REQ_CMP);
8632 union ccb *abort_ccb = ccb->cab.abort_ccb;
8633 switch(abort_ccb->ccb_h.func_code) {
8635 if (sym_abort_scsiio(np, abort_ccb, 0) == 0) {
8636 sym_xpt_done2(np, ccb, CAM_REQ_CMP);
8640 sym_xpt_done2(np, ccb, CAM_UA_ABORT);
8647 sym_reset_dev(np, ccb);
8652 sym_reset_scsi_bus(np, 0);
8654 xpt_print_path(np->path);
8655 printf("SCSI BUS reset delivered.\n");
8658 sym_xpt_done2(np, ccb, CAM_REQ_CMP);
8661 case XPT_ACCEPT_TARGET_IO:
8662 case XPT_CONT_TARGET_IO:
8664 case XPT_NOTIFY_ACK:
8665 case XPT_IMMED_NOTIFY:
8668 sym_xpt_done2(np, ccb, CAM_REQ_INVALID);
8674 * Asynchronous notification handler.
8677 sym_async(void *cb_arg, u32 code, struct cam_path *path, void *arg)
8680 struct cam_sim *sim;
8687 sim = (struct cam_sim *) cb_arg;
8688 np = (hcb_p) cam_sim_softc(sim);
8691 case AC_LOST_DEVICE:
8692 tn = xpt_path_target_id(path);
8693 if (tn >= SYM_CONF_MAX_TARGET)
8696 tp = &np->target[tn];
8700 tp->head.wval = np->rv_scntl3;
8703 tp->tinfo.current.period = tp->tinfo.goal.period = 0;
8704 tp->tinfo.current.offset = tp->tinfo.goal.offset = 0;
8705 tp->tinfo.current.width = tp->tinfo.goal.width = BUS_8_BIT;
8706 tp->tinfo.current.options = tp->tinfo.goal.options = 0;
8717 * Update transfer settings of a target.
8719 static void sym_update_trans(hcb_p np, tcb_p tp, struct sym_trans *tip,
8720 struct ccb_trans_settings *cts)
8725 #ifdef FreeBSD_New_Tran_Settings
8726 #define cts__spi (&cts->xport_specific.spi)
8727 if ((cts__spi->valid & CTS_SPI_VALID_BUS_WIDTH) != 0)
8728 tip->width = cts__spi->bus_width;
8729 if ((cts__spi->valid & CTS_SPI_VALID_SYNC_OFFSET) != 0)
8730 tip->offset = cts__spi->sync_offset;
8731 if ((cts__spi->valid & CTS_SPI_VALID_SYNC_RATE) != 0)
8732 tip->period = cts__spi->sync_period;
8733 if ((cts__spi->valid & CTS_SPI_VALID_PPR_OPTIONS) != 0)
8734 tip->options = (cts__spi->ppr_options & PPR_OPT_DT);
8735 if (cts->protocol_version != PROTO_VERSION_UNSPECIFIED &&
8736 cts->protocol_version != PROTO_VERSION_UNKNOWN)
8737 tip->scsi_version = cts->protocol_version;
8738 if (cts->transport_version != XPORT_VERSION_UNSPECIFIED &&
8739 cts->transport_version != XPORT_VERSION_UNKNOWN)
8740 tip->spi_version = cts->transport_version;
8743 if ((cts->valid & CCB_TRANS_BUS_WIDTH_VALID) != 0)
8744 tip->width = cts->bus_width;
8745 if ((cts->valid & CCB_TRANS_SYNC_OFFSET_VALID) != 0)
8746 tip->offset = cts->sync_offset;
8747 if ((cts->valid & CCB_TRANS_SYNC_RATE_VALID) != 0)
8748 tip->period = cts->sync_period;
8751 * Scale against driver configuration limits.
8753 if (tip->width > SYM_SETUP_MAX_WIDE) tip->width = SYM_SETUP_MAX_WIDE;
8754 if (tip->offset > SYM_SETUP_MAX_OFFS) tip->offset = SYM_SETUP_MAX_OFFS;
8755 if (tip->period < SYM_SETUP_MIN_SYNC) tip->period = SYM_SETUP_MIN_SYNC;
8758 * Scale against actual controller BUS width.
8760 if (tip->width > np->maxwide)
8761 tip->width = np->maxwide;
8763 #ifdef FreeBSD_New_Tran_Settings
8765 * Only accept DT if controller supports and SYNC/WIDE asked.
8767 if (!((np->features & (FE_C10|FE_ULTRA3)) == (FE_C10|FE_ULTRA3)) ||
8768 !(tip->width == BUS_16_BIT && tip->offset)) {
8769 tip->options &= ~PPR_OPT_DT;
8773 * For now, only assume DT if period <= 9, BUS 16 and offset != 0.
8776 if ((np->features & (FE_C10|FE_ULTRA3)) == (FE_C10|FE_ULTRA3) &&
8777 tip->period <= 9 && tip->width == BUS_16_BIT && tip->offset) {
8778 tip->options |= PPR_OPT_DT;
8783 * Scale period factor and offset against controller limits.
8785 if (tip->options & PPR_OPT_DT) {
8786 if (tip->period < np->minsync_dt)
8787 tip->period = np->minsync_dt;
8788 if (tip->period > np->maxsync_dt)
8789 tip->period = np->maxsync_dt;
8790 if (tip->offset > np->maxoffs_dt)
8791 tip->offset = np->maxoffs_dt;
8794 if (tip->period < np->minsync)
8795 tip->period = np->minsync;
8796 if (tip->period > np->maxsync)
8797 tip->period = np->maxsync;
8798 if (tip->offset > np->maxoffs)
8799 tip->offset = np->maxoffs;
8804 * Update flags for a device (logical unit).
8807 sym_update_dflags(hcb_p np, u_char *flags, struct ccb_trans_settings *cts)
8809 #ifdef FreeBSD_New_Tran_Settings
8810 #define cts__scsi (&cts->proto_specific.scsi)
8811 #define cts__spi (&cts->xport_specific.spi)
8812 if ((cts__spi->valid & CTS_SPI_VALID_DISC) != 0) {
8813 if ((cts__spi->flags & CTS_SPI_FLAGS_DISC_ENB) != 0)
8814 *flags |= SYM_DISC_ENABLED;
8816 *flags &= ~SYM_DISC_ENABLED;
8819 if ((cts__scsi->valid & CTS_SCSI_VALID_TQ) != 0) {
8820 if ((cts__scsi->flags & CTS_SCSI_FLAGS_TAG_ENB) != 0)
8821 *flags |= SYM_TAGS_ENABLED;
8823 *flags &= ~SYM_TAGS_ENABLED;
8828 if ((cts->valid & CCB_TRANS_DISC_VALID) != 0) {
8829 if ((cts->flags & CCB_TRANS_DISC_ENB) != 0)
8830 *flags |= SYM_DISC_ENABLED;
8832 *flags &= ~SYM_DISC_ENABLED;
8835 if ((cts->valid & CCB_TRANS_TQ_VALID) != 0) {
8836 if ((cts->flags & CCB_TRANS_TAG_ENB) != 0)
8837 *flags |= SYM_TAGS_ENABLED;
8839 *flags &= ~SYM_TAGS_ENABLED;
8845 /*============= DRIVER INITIALISATION ==================*/
8847 #ifdef FreeBSD_Bus_Io_Abstraction
8849 static device_method_t sym_pci_methods[] = {
8850 DEVMETHOD(device_probe, sym_pci_probe),
8851 DEVMETHOD(device_attach, sym_pci_attach),
8855 static driver_t sym_pci_driver = {
8858 sizeof(struct sym_hcb)
8861 static devclass_t sym_devclass;
8863 DRIVER_MODULE(sym, pci, sym_pci_driver, sym_devclass, 0, 0);
8865 #else /* Pre-FreeBSD_Bus_Io_Abstraction */
8867 static u_long sym_unit;
8869 static struct pci_device sym_pci_driver = {
8877 #if __FreeBSD_version >= 400000
8878 COMPAT_PCI_DRIVER (sym, sym_pci_driver);
8880 DATA_SET (pcidevice_set, sym_pci_driver);
8883 #endif /* FreeBSD_Bus_Io_Abstraction */
8885 static struct sym_pci_chip sym_pci_dev_table[] = {
8886 {PCI_ID_SYM53C810, 0x0f, "810", 4, 8, 4, 64,
8889 #ifdef SYM_DEBUG_GENERIC_SUPPORT
8890 {PCI_ID_SYM53C810, 0xff, "810a", 4, 8, 4, 1,
8894 {PCI_ID_SYM53C810, 0xff, "810a", 4, 8, 4, 1,
8895 FE_CACHE_SET|FE_LDSTR|FE_PFEN|FE_BOF}
8898 {PCI_ID_SYM53C815, 0xff, "815", 4, 8, 4, 64,
8901 {PCI_ID_SYM53C825, 0x0f, "825", 6, 8, 4, 64,
8902 FE_WIDE|FE_BOF|FE_ERL|FE_DIFF}
8904 {PCI_ID_SYM53C825, 0xff, "825a", 6, 8, 4, 2,
8905 FE_WIDE|FE_CACHE0_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|FE_RAM|FE_DIFF}
8907 {PCI_ID_SYM53C860, 0xff, "860", 4, 8, 5, 1,
8908 FE_ULTRA|FE_CLK80|FE_CACHE_SET|FE_BOF|FE_LDSTR|FE_PFEN}
8910 {PCI_ID_SYM53C875, 0x01, "875", 6, 16, 5, 2,
8911 FE_WIDE|FE_ULTRA|FE_CLK80|FE_CACHE0_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
8914 {PCI_ID_SYM53C875, 0xff, "875", 6, 16, 5, 2,
8915 FE_WIDE|FE_ULTRA|FE_DBLR|FE_CACHE0_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
8918 {PCI_ID_SYM53C875_2, 0xff, "875", 6, 16, 5, 2,
8919 FE_WIDE|FE_ULTRA|FE_DBLR|FE_CACHE0_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
8922 {PCI_ID_SYM53C885, 0xff, "885", 6, 16, 5, 2,
8923 FE_WIDE|FE_ULTRA|FE_DBLR|FE_CACHE0_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
8926 #ifdef SYM_DEBUG_GENERIC_SUPPORT
8927 {PCI_ID_SYM53C895, 0xff, "895", 6, 31, 7, 2,
8928 FE_WIDE|FE_ULTRA2|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFS|
8932 {PCI_ID_SYM53C895, 0xff, "895", 6, 31, 7, 2,
8933 FE_WIDE|FE_ULTRA2|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
8937 {PCI_ID_SYM53C896, 0xff, "896", 6, 31, 7, 4,
8938 FE_WIDE|FE_ULTRA2|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
8939 FE_RAM|FE_RAM8K|FE_64BIT|FE_DAC|FE_IO256|FE_NOPM|FE_LEDC|FE_LCKFRQ}
8941 {PCI_ID_SYM53C895A, 0xff, "895a", 6, 31, 7, 4,
8942 FE_WIDE|FE_ULTRA2|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
8943 FE_RAM|FE_RAM8K|FE_DAC|FE_IO256|FE_NOPM|FE_LEDC|FE_LCKFRQ}
8945 {PCI_ID_LSI53C1010, 0x00, "1010-33", 6, 31, 7, 8,
8946 FE_WIDE|FE_ULTRA3|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFBC|FE_LDSTR|FE_PFEN|
8947 FE_RAM|FE_RAM8K|FE_64BIT|FE_DAC|FE_IO256|FE_NOPM|FE_LEDC|FE_CRC|
8950 {PCI_ID_LSI53C1010, 0xff, "1010-33", 6, 31, 7, 8,
8951 FE_WIDE|FE_ULTRA3|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFBC|FE_LDSTR|FE_PFEN|
8952 FE_RAM|FE_RAM8K|FE_64BIT|FE_DAC|FE_IO256|FE_NOPM|FE_LEDC|FE_CRC|
8955 {PCI_ID_LSI53C1010_2, 0xff, "1010-66", 6, 31, 7, 8,
8956 FE_WIDE|FE_ULTRA3|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFBC|FE_LDSTR|FE_PFEN|
8957 FE_RAM|FE_RAM8K|FE_64BIT|FE_DAC|FE_IO256|FE_NOPM|FE_LEDC|FE_66MHZ|FE_CRC|
8960 {PCI_ID_LSI53C1510D, 0xff, "1510d", 6, 31, 7, 4,
8961 FE_WIDE|FE_ULTRA2|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
8962 FE_RAM|FE_IO256|FE_LEDC}
8965 #define sym_pci_num_devs \
8966 (sizeof(sym_pci_dev_table) / sizeof(sym_pci_dev_table[0]))
8969 * Look up the chip table.
8971 * Return a pointer to the chip entry if found,
8974 static struct sym_pci_chip *
8975 #ifdef FreeBSD_Bus_Io_Abstraction
8976 sym_find_pci_chip(device_t dev)
8978 sym_find_pci_chip(pcici_t pci_tag)
8981 struct sym_pci_chip *chip;
8986 #ifdef FreeBSD_Bus_Io_Abstraction
8987 if (pci_get_vendor(dev) != PCI_VENDOR_NCR)
8990 device_id = pci_get_device(dev);
8991 revision = pci_get_revid(dev);
8993 if (pci_cfgread(pci_tag, PCIR_VENDOR, 2) != PCI_VENDOR_NCR)
8996 device_id = pci_cfgread(pci_tag, PCIR_DEVICE, 2);
8997 revision = pci_cfgread(pci_tag, PCIR_REVID, 1);
9000 for (i = 0; i < sym_pci_num_devs; i++) {
9001 chip = &sym_pci_dev_table[i];
9002 if (device_id != chip->device_id)
9004 if (revision > chip->revision_id)
9013 * Tell upper layer if the chip is supported.
9015 #ifdef FreeBSD_Bus_Io_Abstraction
9017 sym_pci_probe(device_t dev)
9019 struct sym_pci_chip *chip;
9021 chip = sym_find_pci_chip(dev);
9022 if (chip && sym_find_firmware(chip)) {
9023 device_set_desc(dev, chip->name);
9024 return (chip->lp_probe_bit & SYM_SETUP_LP_PROBE_MAP)? -2000 : 0;
9028 #else /* Pre-FreeBSD_Bus_Io_Abstraction */
9030 sym_pci_probe(pcici_t pci_tag, pcidi_t type)
9032 struct sym_pci_chip *chip;
9034 chip = sym_find_pci_chip(pci_tag);
9035 if (chip && sym_find_firmware(chip)) {
9037 /* Only claim chips we are allowed to take precedence over the ncr */
9038 if (!(chip->lp_probe_bit & SYM_SETUP_LP_PROBE_MAP))
9049 * Attach a sym53c8xx device.
9051 #ifdef FreeBSD_Bus_Io_Abstraction
9053 sym_pci_attach(device_t dev)
9056 sym_pci_attach(pcici_t pci_tag, int unit)
9058 int err = sym_pci_attach2(pci_tag, unit);
9060 printf("sym: failed to attach unit %d - err=%d.\n", unit, err);
9063 sym_pci_attach2(pcici_t pci_tag, int unit)
9066 struct sym_pci_chip *chip;
9069 struct sym_hcb *np = 0;
9070 struct sym_nvram nvram;
9071 struct sym_fw *fw = 0;
9073 #ifdef FreeBSD_Bus_Dma_Abstraction
9074 bus_dma_tag_t bus_dmat;
9077 * I expected to be told about a parent
9078 * DMA tag, but didn't find any.
9084 * Only probed devices should be attached.
9085 * We just enjoy being paranoid. :)
9087 #ifdef FreeBSD_Bus_Io_Abstraction
9088 chip = sym_find_pci_chip(dev);
9090 chip = sym_find_pci_chip(pci_tag);
9092 if (chip == NULL || (fw = sym_find_firmware(chip)) == NULL)
9096 * Allocate immediately the host control block,
9097 * since we are only expecting to succeed. :)
9098 * We keep track in the HCB of all the resources that
9099 * are to be released on error.
9101 #ifdef FreeBSD_Bus_Dma_Abstraction
9102 np = __sym_calloc_dma(bus_dmat, sizeof(*np), "HCB");
9104 np->bus_dmat = bus_dmat;
9108 np = sym_calloc_dma(sizeof(*np), "HCB");
9114 * Copy some useful infos to the HCB.
9116 np->hcb_ba = vtobus(np);
9117 np->verbose = bootverbose;
9118 #ifdef FreeBSD_Bus_Io_Abstraction
9120 np->unit = device_get_unit(dev);
9121 np->device_id = pci_get_device(dev);
9122 np->revision_id = pci_get_revid(dev);
9124 np->pci_tag = pci_tag;
9126 np->device_id = pci_cfgread(pci_tag, PCIR_DEVICE, 2);
9127 np->revision_id = pci_cfgread(pci_tag, PCIR_REVID, 1);
9129 np->features = chip->features;
9130 np->clock_divn = chip->nr_divisor;
9131 np->maxoffs = chip->offset_max;
9132 np->maxburst = chip->burst_max;
9133 np->scripta_sz = fw->a_size;
9134 np->scriptb_sz = fw->b_size;
9135 np->fw_setup = fw->setup;
9136 np->fw_patch = fw->patch;
9137 np->fw_name = fw->name;
9142 snprintf(np->inst_name, sizeof(np->inst_name), "sym%d", np->unit);
9145 * Initialyze the CCB free and busy queues.
9147 sym_que_init(&np->free_ccbq);
9148 sym_que_init(&np->busy_ccbq);
9149 sym_que_init(&np->comp_ccbq);
9150 sym_que_init(&np->cam_ccbq);
9153 * Allocate a tag for the DMA of user data.
9155 #ifdef FreeBSD_Bus_Dma_Abstraction
9156 if (bus_dma_tag_create(np->bus_dmat, 1, (1<<24),
9157 BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR,
9159 BUS_SPACE_MAXSIZE, SYM_CONF_MAX_SG,
9160 (1<<24), 0, &np->data_dmat)) {
9161 device_printf(dev, "failed to create DMA tag.\n");
9166 * Read and apply some fix-ups to the PCI COMMAND
9167 * register. We want the chip to be enabled for:
9169 * - PCI parity checking (reporting would also be fine)
9170 * - Write And Invalidate.
9172 #ifdef FreeBSD_Bus_Io_Abstraction
9173 command = pci_read_config(dev, PCIR_COMMAND, 2);
9175 command = pci_cfgread(pci_tag, PCIR_COMMAND, 2);
9177 command |= PCIM_CMD_BUSMASTEREN;
9178 command |= PCIM_CMD_PERRESPEN;
9179 command |= /* PCIM_CMD_MWIEN */ 0x0010;
9180 #ifdef FreeBSD_Bus_Io_Abstraction
9181 pci_write_config(dev, PCIR_COMMAND, command, 2);
9183 pci_cfgwrite(pci_tag, PCIR_COMMAND, command, 2);
9187 * Let the device know about the cache line size,
9188 * if it doesn't yet.
9190 #ifdef FreeBSD_Bus_Io_Abstraction
9191 cachelnsz = pci_read_config(dev, PCIR_CACHELNSZ, 1);
9193 cachelnsz = pci_cfgread(pci_tag, PCIR_CACHELNSZ, 1);
9197 #ifdef FreeBSD_Bus_Io_Abstraction
9198 pci_write_config(dev, PCIR_CACHELNSZ, cachelnsz, 1);
9200 pci_cfgwrite(pci_tag, PCIR_CACHELNSZ, cachelnsz, 1);
9205 * Alloc/get/map/retrieve everything that deals with MMIO.
9207 #ifdef FreeBSD_Bus_Io_Abstraction
9208 if ((command & PCIM_CMD_MEMEN) != 0) {
9209 int regs_id = SYM_PCI_MMIO;
9210 np->mmio_res = bus_alloc_resource(dev, SYS_RES_MEMORY, ®s_id,
9211 0, ~0, 1, RF_ACTIVE);
9213 if (!np->mmio_res) {
9214 device_printf(dev, "failed to allocate MMIO resources\n");
9217 np->mmio_bsh = rman_get_bushandle(np->mmio_res);
9218 np->mmio_tag = rman_get_bustag(np->mmio_res);
9219 np->mmio_pa = rman_get_start(np->mmio_res);
9220 np->mmio_va = (vm_offset_t) rman_get_virtual(np->mmio_res);
9221 np->mmio_ba = np->mmio_pa;
9223 if ((command & PCIM_CMD_MEMEN) != 0) {
9224 vm_offset_t vaddr, paddr;
9225 if (!pci_map_mem(pci_tag, SYM_PCI_MMIO, &vaddr, &paddr)) {
9226 printf("%s: failed to map MMIO window\n", sym_name(np));
9229 np->mmio_va = vaddr;
9230 np->mmio_pa = paddr;
9231 np->mmio_ba = paddr;
9238 #ifdef FreeBSD_Bus_Io_Abstraction
9240 np->irq_res = bus_alloc_resource(dev, SYS_RES_IRQ, &i,
9241 0, ~0, 1, RF_ACTIVE | RF_SHAREABLE);
9243 device_printf(dev, "failed to allocate IRQ resource\n");
9248 #ifdef SYM_CONF_IOMAPPED
9250 * User want us to use normal IO with PCI.
9251 * Alloc/get/map/retrieve everything that deals with IO.
9253 #ifdef FreeBSD_Bus_Io_Abstraction
9254 if ((command & PCI_COMMAND_IO_ENABLE) != 0) {
9255 int regs_id = SYM_PCI_IO;
9256 np->io_res = bus_alloc_resource(dev, SYS_RES_IOPORT, ®s_id,
9257 0, ~0, 1, RF_ACTIVE);
9260 device_printf(dev, "failed to allocate IO resources\n");
9263 np->io_bsh = rman_get_bushandle(np->io_res);
9264 np->io_tag = rman_get_bustag(np->io_res);
9265 np->io_port = rman_get_start(np->io_res);
9267 if ((command & PCI_COMMAND_IO_ENABLE) != 0) {
9269 if (!pci_map_port (pci_tag, SYM_PCI_IO, &io_port)) {
9270 printf("%s: failed to map IO window\n", sym_name(np));
9273 np->io_port = io_port;
9277 #endif /* SYM_CONF_IOMAPPED */
9280 * If the chip has RAM.
9281 * Alloc/get/map/retrieve the corresponding resources.
9283 if ((np->features & (FE_RAM|FE_RAM8K)) &&
9284 (command & PCIM_CMD_MEMEN) != 0) {
9285 #ifdef FreeBSD_Bus_Io_Abstraction
9286 int regs_id = SYM_PCI_RAM;
9287 if (np->features & FE_64BIT)
9288 regs_id = SYM_PCI_RAM64;
9289 np->ram_res = bus_alloc_resource(dev, SYS_RES_MEMORY, ®s_id,
9290 0, ~0, 1, RF_ACTIVE);
9292 device_printf(dev,"failed to allocate RAM resources\n");
9295 np->ram_id = regs_id;
9296 np->ram_bsh = rman_get_bushandle(np->ram_res);
9297 np->ram_tag = rman_get_bustag(np->ram_res);
9298 np->ram_pa = rman_get_start(np->ram_res);
9299 np->ram_va = (vm_offset_t) rman_get_virtual(np->ram_res);
9300 np->ram_ba = np->ram_pa;
9302 vm_offset_t vaddr, paddr;
9303 int regs_id = SYM_PCI_RAM;
9304 if (np->features & FE_64BIT)
9305 regs_id = SYM_PCI_RAM64;
9306 if (!pci_map_mem(pci_tag, regs_id, &vaddr, &paddr)) {
9307 printf("%s: failed to map RAM window\n", sym_name(np));
9317 * Save setting of some IO registers, so we will
9318 * be able to probe specific implementations.
9320 sym_save_initial_setting (np);
9323 * Reset the chip now, since it has been reported
9324 * that SCSI clock calibration may not work properly
9325 * if the chip is currently active.
9327 sym_chip_reset (np);
9330 * Try to read the user set-up.
9332 (void) sym_read_nvram(np, &nvram);
9335 * Prepare controller and devices settings, according
9336 * to chip features, user set-up and driver set-up.
9338 (void) sym_prepare_setting(np, &nvram);
9341 * Check the PCI clock frequency.
9342 * Must be performed after prepare_setting since it destroys
9343 * STEST1 that is used to probe for the clock doubler.
9345 i = sym_getpciclock(np);
9347 #ifdef FreeBSD_Bus_Io_Abstraction
9348 device_printf(dev, "PCI BUS clock seems too high: %u KHz.\n",i);
9350 printf("%s: PCI BUS clock seems too high: %u KHz.\n",
9355 * Allocate the start queue.
9357 np->squeue = (u32 *) sym_calloc_dma(sizeof(u32)*(MAX_QUEUE*2),"SQUEUE");
9360 np->squeue_ba = vtobus(np->squeue);
9363 * Allocate the done queue.
9365 np->dqueue = (u32 *) sym_calloc_dma(sizeof(u32)*(MAX_QUEUE*2),"DQUEUE");
9368 np->dqueue_ba = vtobus(np->dqueue);
9371 * Allocate the target bus address array.
9373 np->targtbl = (u32 *) sym_calloc_dma(256, "TARGTBL");
9376 np->targtbl_ba = vtobus(np->targtbl);
9379 * Allocate SCRIPTS areas.
9381 np->scripta0 = sym_calloc_dma(np->scripta_sz, "SCRIPTA0");
9382 np->scriptb0 = sym_calloc_dma(np->scriptb_sz, "SCRIPTB0");
9383 if (!np->scripta0 || !np->scriptb0)
9387 * Allocate some CCB. We need at least ONE.
9389 if (!sym_alloc_ccb(np))
9393 * Calculate BUS addresses where we are going
9394 * to load the SCRIPTS.
9396 np->scripta_ba = vtobus(np->scripta0);
9397 np->scriptb_ba = vtobus(np->scriptb0);
9398 np->scriptb0_ba = np->scriptb_ba;
9401 np->scripta_ba = np->ram_ba;
9402 if (np->features & FE_RAM8K) {
9404 np->scriptb_ba = np->scripta_ba + 4096;
9405 #if BITS_PER_LONG > 32
9406 np->scr_ram_seg = cpu_to_scr(np->scripta_ba >> 32);
9414 * Copy scripts to controller instance.
9416 bcopy(fw->a_base, np->scripta0, np->scripta_sz);
9417 bcopy(fw->b_base, np->scriptb0, np->scriptb_sz);
9420 * Setup variable parts in scripts and compute
9421 * scripts bus addresses used from the C code.
9423 np->fw_setup(np, fw);
9426 * Bind SCRIPTS with physical addresses usable by the
9427 * SCRIPTS processor (as seen from the BUS = BUS addresses).
9429 sym_fw_bind_script(np, (u32 *) np->scripta0, np->scripta_sz);
9430 sym_fw_bind_script(np, (u32 *) np->scriptb0, np->scriptb_sz);
9432 #ifdef SYM_CONF_IARB_SUPPORT
9434 * If user wants IARB to be set when we win arbitration
9435 * and have other jobs, compute the max number of consecutive
9436 * settings of IARB hints before we leave devices a chance to
9437 * arbitrate for reselection.
9439 #ifdef SYM_SETUP_IARB_MAX
9440 np->iarb_max = SYM_SETUP_IARB_MAX;
9447 * Prepare the idle and invalid task actions.
9449 np->idletask.start = cpu_to_scr(SCRIPTA_BA (np, idle));
9450 np->idletask.restart = cpu_to_scr(SCRIPTB_BA (np, bad_i_t_l));
9451 np->idletask_ba = vtobus(&np->idletask);
9453 np->notask.start = cpu_to_scr(SCRIPTA_BA (np, idle));
9454 np->notask.restart = cpu_to_scr(SCRIPTB_BA (np, bad_i_t_l));
9455 np->notask_ba = vtobus(&np->notask);
9457 np->bad_itl.start = cpu_to_scr(SCRIPTA_BA (np, idle));
9458 np->bad_itl.restart = cpu_to_scr(SCRIPTB_BA (np, bad_i_t_l));
9459 np->bad_itl_ba = vtobus(&np->bad_itl);
9461 np->bad_itlq.start = cpu_to_scr(SCRIPTA_BA (np, idle));
9462 np->bad_itlq.restart = cpu_to_scr(SCRIPTB_BA (np,bad_i_t_l_q));
9463 np->bad_itlq_ba = vtobus(&np->bad_itlq);
9466 * Allocate and prepare the lun JUMP table that is used
9467 * for a target prior the probing of devices (bad lun table).
9468 * A private table will be allocated for the target on the
9469 * first INQUIRY response received.
9471 np->badluntbl = sym_calloc_dma(256, "BADLUNTBL");
9475 np->badlun_sa = cpu_to_scr(SCRIPTB_BA (np, resel_bad_lun));
9476 for (i = 0 ; i < 64 ; i++) /* 64 luns/target, no less */
9477 np->badluntbl[i] = cpu_to_scr(vtobus(&np->badlun_sa));
9480 * Prepare the bus address array that contains the bus
9481 * address of each target control block.
9482 * For now, assume all logical units are wrong. :)
9484 for (i = 0 ; i < SYM_CONF_MAX_TARGET ; i++) {
9485 np->targtbl[i] = cpu_to_scr(vtobus(&np->target[i]));
9486 np->target[i].head.luntbl_sa =
9487 cpu_to_scr(vtobus(np->badluntbl));
9488 np->target[i].head.lun0_sa =
9489 cpu_to_scr(vtobus(&np->badlun_sa));
9493 * Now check the cache handling of the pci chipset.
9495 if (sym_snooptest (np)) {
9496 #ifdef FreeBSD_Bus_Io_Abstraction
9497 device_printf(dev, "CACHE INCORRECTLY CONFIGURED.\n");
9499 printf("%s: CACHE INCORRECTLY CONFIGURED.\n", sym_name(np));
9505 * Now deal with CAM.
9506 * Hopefully, we will succeed with that one.:)
9508 if (!sym_cam_attach(np))
9512 * Sigh! we are done.
9518 * We will try to free all the resources we have
9519 * allocated, but if we are a boot device, this
9520 * will not help that much.;)
9529 * Free everything that have been allocated for this device.
9531 static void sym_pci_free(hcb_p np)
9541 * First free CAM resources.
9548 * Now every should be quiet for us to
9549 * free other resources.
9551 #ifdef FreeBSD_Bus_Io_Abstraction
9553 bus_release_resource(np->device, SYS_RES_MEMORY,
9554 np->ram_id, np->ram_res);
9556 bus_release_resource(np->device, SYS_RES_MEMORY,
9557 SYM_PCI_MMIO, np->mmio_res);
9559 bus_release_resource(np->device, SYS_RES_IOPORT,
9560 SYM_PCI_IO, np->io_res);
9562 bus_release_resource(np->device, SYS_RES_IRQ,
9567 * It seems there is no means to free MMIO resources.
9572 sym_mfree_dma(np->scriptb0, np->scriptb_sz, "SCRIPTB0");
9574 sym_mfree_dma(np->scripta0, np->scripta_sz, "SCRIPTA0");
9576 sym_mfree_dma(np->squeue, sizeof(u32)*(MAX_QUEUE*2), "SQUEUE");
9578 sym_mfree_dma(np->dqueue, sizeof(u32)*(MAX_QUEUE*2), "DQUEUE");
9580 while ((qp = sym_remque_head(&np->free_ccbq)) != 0) {
9581 cp = sym_que_entry(qp, struct sym_ccb, link_ccbq);
9582 #ifdef FreeBSD_Bus_Dma_Abstraction
9583 bus_dmamap_destroy(np->data_dmat, cp->dmamap);
9585 sym_mfree_dma(cp->sns_bbuf, SYM_SNS_BBUF_LEN, "SNS_BBUF");
9586 sym_mfree_dma(cp, sizeof(*cp), "CCB");
9590 sym_mfree_dma(np->badluntbl, 256,"BADLUNTBL");
9592 for (target = 0; target < SYM_CONF_MAX_TARGET ; target++) {
9593 tp = &np->target[target];
9594 for (lun = 0 ; lun < SYM_CONF_MAX_LUN ; lun++) {
9595 lp = sym_lp(np, tp, lun);
9599 sym_mfree_dma(lp->itlq_tbl, SYM_CONF_MAX_TASK*4,
9602 sym_mfree(lp->cb_tags, SYM_CONF_MAX_TASK,
9604 sym_mfree_dma(lp, sizeof(*lp), "LCB");
9606 #if SYM_CONF_MAX_LUN > 1
9608 sym_mfree(tp->lunmp, SYM_CONF_MAX_LUN*sizeof(lcb_p),
9613 sym_mfree_dma(np->targtbl, 256, "TARGTBL");
9614 #ifdef FreeBSD_Bus_Dma_Abstraction
9616 bus_dma_tag_destroy(np->data_dmat);
9618 sym_mfree_dma(np, sizeof(*np), "HCB");
9622 * Allocate CAM resources and register a bus to CAM.
9624 int sym_cam_attach(hcb_p np)
9626 struct cam_devq *devq = 0;
9627 struct cam_sim *sim = 0;
9628 struct cam_path *path = 0;
9629 struct ccb_setasync csa;
9635 * Establish our interrupt handler.
9637 #ifdef FreeBSD_Bus_Io_Abstraction
9638 err = bus_setup_intr(np->device, np->irq_res, INTR_TYPE_CAM,
9639 sym_intr, np, &np->intr);
9641 device_printf(np->device, "bus_setup_intr() failed: %d\n",
9647 if (!pci_map_int (np->pci_tag, sym_intr, np, &cam_imask)) {
9648 printf("%s: failed to map interrupt\n", sym_name(np));
9654 * Create the device queue for our sym SIM.
9656 devq = cam_simq_alloc(SYM_CONF_MAX_START);
9661 * Construct our SIM entry.
9663 sim = cam_sim_alloc(sym_action, sym_poll, "sym", np, np->unit,
9664 1, SYM_SETUP_MAX_TAG, devq);
9669 if (xpt_bus_register(sim, 0) != CAM_SUCCESS)
9674 if (xpt_create_path(&path, 0,
9675 cam_sim_path(np->sim), CAM_TARGET_WILDCARD,
9676 CAM_LUN_WILDCARD) != CAM_REQ_CMP) {
9682 * Hmmm... This should be useful, but I donnot want to
9685 #if __FreeBSD_version < 400000
9687 #ifdef FreeBSD_Bus_Io_Abstraction
9688 alpha_register_pci_scsi(pci_get_bus(np->device),
9689 pci_get_slot(np->device), np->sim);
9691 alpha_register_pci_scsi(pci_tag->bus, pci_tag->slot, np->sim);
9697 * Establish our async notification handler.
9699 xpt_setup_ccb(&csa.ccb_h, np->path, 5);
9700 csa.ccb_h.func_code = XPT_SASYNC_CB;
9701 csa.event_enable = AC_LOST_DEVICE;
9702 csa.callback = sym_async;
9703 csa.callback_arg = np->sim;
9704 xpt_action((union ccb *)&csa);
9707 * Start the chip now, without resetting the BUS, since
9708 * it seems that this must stay under control of CAM.
9709 * With LVD/SE capable chips and BUS in SE mode, we may
9710 * get a spurious SMBC interrupt.
9718 cam_sim_free(sim, FALSE);
9720 cam_simq_free(devq);
9729 * Free everything that deals with CAM.
9731 void sym_cam_free(hcb_p np)
9733 #ifdef FreeBSD_Bus_Io_Abstraction
9735 bus_teardown_intr(np->device, np->irq_res, np->intr);
9737 /* pci_unmap_int(np->pci_tag); */ /* Does nothing */
9741 xpt_bus_deregister(cam_sim_path(np->sim));
9742 cam_sim_free(np->sim, /*free_devq*/ TRUE);
9745 xpt_free_path(np->path);
9748 /*============ OPTIONNAL NVRAM SUPPORT =================*/
9751 * Get host setup from NVRAM.
9753 static void sym_nvram_setup_host (hcb_p np, struct sym_nvram *nvram)
9755 #ifdef SYM_CONF_NVRAM_SUPPORT
9757 * Get parity checking, host ID, verbose mode
9758 * and miscellaneous host flags from NVRAM.
9760 switch(nvram->type) {
9761 case SYM_SYMBIOS_NVRAM:
9762 if (!(nvram->data.Symbios.flags & SYMBIOS_PARITY_ENABLE))
9763 np->rv_scntl0 &= ~0x0a;
9764 np->myaddr = nvram->data.Symbios.host_id & 0x0f;
9765 if (nvram->data.Symbios.flags & SYMBIOS_VERBOSE_MSGS)
9767 if (nvram->data.Symbios.flags1 & SYMBIOS_SCAN_HI_LO)
9768 np->usrflags |= SYM_SCAN_TARGETS_HILO;
9769 if (nvram->data.Symbios.flags2 & SYMBIOS_AVOID_BUS_RESET)
9770 np->usrflags |= SYM_AVOID_BUS_RESET;
9772 case SYM_TEKRAM_NVRAM:
9773 np->myaddr = nvram->data.Tekram.host_id & 0x0f;
9782 * Get target setup from NVRAM.
9784 #ifdef SYM_CONF_NVRAM_SUPPORT
9785 static void sym_Symbios_setup_target(hcb_p np,int target, Symbios_nvram *nvram);
9786 static void sym_Tekram_setup_target(hcb_p np,int target, Tekram_nvram *nvram);
9790 sym_nvram_setup_target (hcb_p np, int target, struct sym_nvram *nvp)
9792 #ifdef SYM_CONF_NVRAM_SUPPORT
9794 case SYM_SYMBIOS_NVRAM:
9795 sym_Symbios_setup_target (np, target, &nvp->data.Symbios);
9797 case SYM_TEKRAM_NVRAM:
9798 sym_Tekram_setup_target (np, target, &nvp->data.Tekram);
9806 #ifdef SYM_CONF_NVRAM_SUPPORT
9808 * Get target set-up from Symbios format NVRAM.
9811 sym_Symbios_setup_target(hcb_p np, int target, Symbios_nvram *nvram)
9813 tcb_p tp = &np->target[target];
9814 Symbios_target *tn = &nvram->target[target];
9816 tp->tinfo.user.period = tn->sync_period ? (tn->sync_period + 3) / 4 : 0;
9817 tp->tinfo.user.width = tn->bus_width == 0x10 ? BUS_16_BIT : BUS_8_BIT;
9819 (tn->flags & SYMBIOS_QUEUE_TAGS_ENABLED)? SYM_SETUP_MAX_TAG : 0;
9821 if (!(tn->flags & SYMBIOS_DISCONNECT_ENABLE))
9822 tp->usrflags &= ~SYM_DISC_ENABLED;
9823 if (!(tn->flags & SYMBIOS_SCAN_AT_BOOT_TIME))
9824 tp->usrflags |= SYM_SCAN_BOOT_DISABLED;
9825 if (!(tn->flags & SYMBIOS_SCAN_LUNS))
9826 tp->usrflags |= SYM_SCAN_LUNS_DISABLED;
9830 * Get target set-up from Tekram format NVRAM.
9833 sym_Tekram_setup_target(hcb_p np, int target, Tekram_nvram *nvram)
9835 tcb_p tp = &np->target[target];
9836 struct Tekram_target *tn = &nvram->target[target];
9839 if (tn->flags & TEKRAM_SYNC_NEGO) {
9840 i = tn->sync_index & 0xf;
9841 tp->tinfo.user.period = Tekram_sync[i];
9844 tp->tinfo.user.width =
9845 (tn->flags & TEKRAM_WIDE_NEGO) ? BUS_16_BIT : BUS_8_BIT;
9847 if (tn->flags & TEKRAM_TAGGED_COMMANDS) {
9848 tp->usrtags = 2 << nvram->max_tags_index;
9851 if (tn->flags & TEKRAM_DISCONNECT_ENABLE)
9852 tp->usrflags |= SYM_DISC_ENABLED;
9854 /* If any device does not support parity, we will not use this option */
9855 if (!(tn->flags & TEKRAM_PARITY_CHECK))
9856 np->rv_scntl0 &= ~0x0a; /* SCSI parity checking disabled */
9859 #ifdef SYM_CONF_DEBUG_NVRAM
9861 * Dump Symbios format NVRAM for debugging purpose.
9863 static void sym_display_Symbios_nvram(hcb_p np, Symbios_nvram *nvram)
9867 /* display Symbios nvram host data */
9868 printf("%s: HOST ID=%d%s%s%s%s%s%s\n",
9869 sym_name(np), nvram->host_id & 0x0f,
9870 (nvram->flags & SYMBIOS_SCAM_ENABLE) ? " SCAM" :"",
9871 (nvram->flags & SYMBIOS_PARITY_ENABLE) ? " PARITY" :"",
9872 (nvram->flags & SYMBIOS_VERBOSE_MSGS) ? " VERBOSE" :"",
9873 (nvram->flags & SYMBIOS_CHS_MAPPING) ? " CHS_ALT" :"",
9874 (nvram->flags2 & SYMBIOS_AVOID_BUS_RESET)?" NO_RESET" :"",
9875 (nvram->flags1 & SYMBIOS_SCAN_HI_LO) ? " HI_LO" :"");
9877 /* display Symbios nvram drive data */
9878 for (i = 0 ; i < 15 ; i++) {
9879 struct Symbios_target *tn = &nvram->target[i];
9880 printf("%s-%d:%s%s%s%s WIDTH=%d SYNC=%d TMO=%d\n",
9882 (tn->flags & SYMBIOS_DISCONNECT_ENABLE) ? " DISC" : "",
9883 (tn->flags & SYMBIOS_SCAN_AT_BOOT_TIME) ? " SCAN_BOOT" : "",
9884 (tn->flags & SYMBIOS_SCAN_LUNS) ? " SCAN_LUNS" : "",
9885 (tn->flags & SYMBIOS_QUEUE_TAGS_ENABLED)? " TCQ" : "",
9887 tn->sync_period / 4,
9893 * Dump TEKRAM format NVRAM for debugging purpose.
9895 static u_char Tekram_boot_delay[7] = {3, 5, 10, 20, 30, 60, 120};
9896 static void sym_display_Tekram_nvram(hcb_p np, Tekram_nvram *nvram)
9898 int i, tags, boot_delay;
9901 /* display Tekram nvram host data */
9902 tags = 2 << nvram->max_tags_index;
9904 if (nvram->boot_delay_index < 6)
9905 boot_delay = Tekram_boot_delay[nvram->boot_delay_index];
9906 switch((nvram->flags & TEKRAM_REMOVABLE_FLAGS) >> 6) {
9908 case 0: rem = ""; break;
9909 case 1: rem = " REMOVABLE=boot device"; break;
9910 case 2: rem = " REMOVABLE=all"; break;
9913 printf("%s: HOST ID=%d%s%s%s%s%s%s%s%s%s BOOT DELAY=%d tags=%d\n",
9914 sym_name(np), nvram->host_id & 0x0f,
9915 (nvram->flags1 & SYMBIOS_SCAM_ENABLE) ? " SCAM" :"",
9916 (nvram->flags & TEKRAM_MORE_THAN_2_DRIVES) ? " >2DRIVES" :"",
9917 (nvram->flags & TEKRAM_DRIVES_SUP_1GB) ? " >1GB" :"",
9918 (nvram->flags & TEKRAM_RESET_ON_POWER_ON) ? " RESET" :"",
9919 (nvram->flags & TEKRAM_ACTIVE_NEGATION) ? " ACT_NEG" :"",
9920 (nvram->flags & TEKRAM_IMMEDIATE_SEEK) ? " IMM_SEEK" :"",
9921 (nvram->flags & TEKRAM_SCAN_LUNS) ? " SCAN_LUNS" :"",
9922 (nvram->flags1 & TEKRAM_F2_F6_ENABLED) ? " F2_F6" :"",
9923 rem, boot_delay, tags);
9925 /* display Tekram nvram drive data */
9926 for (i = 0; i <= 15; i++) {
9928 struct Tekram_target *tn = &nvram->target[i];
9929 j = tn->sync_index & 0xf;
9930 sync = Tekram_sync[j];
9931 printf("%s-%d:%s%s%s%s%s%s PERIOD=%d\n",
9933 (tn->flags & TEKRAM_PARITY_CHECK) ? " PARITY" : "",
9934 (tn->flags & TEKRAM_SYNC_NEGO) ? " SYNC" : "",
9935 (tn->flags & TEKRAM_DISCONNECT_ENABLE) ? " DISC" : "",
9936 (tn->flags & TEKRAM_START_CMD) ? " START" : "",
9937 (tn->flags & TEKRAM_TAGGED_COMMANDS) ? " TCQ" : "",
9938 (tn->flags & TEKRAM_WIDE_NEGO) ? " WIDE" : "",
9942 #endif /* SYM_CONF_DEBUG_NVRAM */
9943 #endif /* SYM_CONF_NVRAM_SUPPORT */
9947 * Try reading Symbios or Tekram NVRAM
9949 #ifdef SYM_CONF_NVRAM_SUPPORT
9950 static int sym_read_Symbios_nvram (hcb_p np, Symbios_nvram *nvram);
9951 static int sym_read_Tekram_nvram (hcb_p np, Tekram_nvram *nvram);
9954 int sym_read_nvram(hcb_p np, struct sym_nvram *nvp)
9956 #ifdef SYM_CONF_NVRAM_SUPPORT
9958 * Try to read SYMBIOS nvram.
9959 * Try to read TEKRAM nvram if Symbios nvram not found.
9961 if (SYM_SETUP_SYMBIOS_NVRAM &&
9962 !sym_read_Symbios_nvram (np, &nvp->data.Symbios)) {
9963 nvp->type = SYM_SYMBIOS_NVRAM;
9964 #ifdef SYM_CONF_DEBUG_NVRAM
9965 sym_display_Symbios_nvram(np, &nvp->data.Symbios);
9968 else if (SYM_SETUP_TEKRAM_NVRAM &&
9969 !sym_read_Tekram_nvram (np, &nvp->data.Tekram)) {
9970 nvp->type = SYM_TEKRAM_NVRAM;
9971 #ifdef SYM_CONF_DEBUG_NVRAM
9972 sym_display_Tekram_nvram(np, &nvp->data.Tekram);
9984 #ifdef SYM_CONF_NVRAM_SUPPORT
9986 * 24C16 EEPROM reading.
9988 * GPOI0 - data in/data out
9990 * Symbios NVRAM wiring now also used by Tekram.
9999 * Set/clear data/clock bit in GPIO0
10001 static void S24C16_set_bit(hcb_p np, u_char write_bit, u_char *gpreg,
10007 *gpreg |= write_bit;
10020 OUTB (nc_gpreg, *gpreg);
10025 * Send START condition to NVRAM to wake it up.
10027 static void S24C16_start(hcb_p np, u_char *gpreg)
10029 S24C16_set_bit(np, 1, gpreg, SET_BIT);
10030 S24C16_set_bit(np, 0, gpreg, SET_CLK);
10031 S24C16_set_bit(np, 0, gpreg, CLR_BIT);
10032 S24C16_set_bit(np, 0, gpreg, CLR_CLK);
10036 * Send STOP condition to NVRAM - puts NVRAM to sleep... ZZzzzz!!
10038 static void S24C16_stop(hcb_p np, u_char *gpreg)
10040 S24C16_set_bit(np, 0, gpreg, SET_CLK);
10041 S24C16_set_bit(np, 1, gpreg, SET_BIT);
10045 * Read or write a bit to the NVRAM,
10046 * read if GPIO0 input else write if GPIO0 output
10048 static void S24C16_do_bit(hcb_p np, u_char *read_bit, u_char write_bit,
10051 S24C16_set_bit(np, write_bit, gpreg, SET_BIT);
10052 S24C16_set_bit(np, 0, gpreg, SET_CLK);
10054 *read_bit = INB (nc_gpreg);
10055 S24C16_set_bit(np, 0, gpreg, CLR_CLK);
10056 S24C16_set_bit(np, 0, gpreg, CLR_BIT);
10060 * Output an ACK to the NVRAM after reading,
10061 * change GPIO0 to output and when done back to an input
10063 static void S24C16_write_ack(hcb_p np, u_char write_bit, u_char *gpreg,
10066 OUTB (nc_gpcntl, *gpcntl & 0xfe);
10067 S24C16_do_bit(np, 0, write_bit, gpreg);
10068 OUTB (nc_gpcntl, *gpcntl);
10072 * Input an ACK from NVRAM after writing,
10073 * change GPIO0 to input and when done back to an output
10075 static void S24C16_read_ack(hcb_p np, u_char *read_bit, u_char *gpreg,
10078 OUTB (nc_gpcntl, *gpcntl | 0x01);
10079 S24C16_do_bit(np, read_bit, 1, gpreg);
10080 OUTB (nc_gpcntl, *gpcntl);
10084 * WRITE a byte to the NVRAM and then get an ACK to see it was accepted OK,
10085 * GPIO0 must already be set as an output
10087 static void S24C16_write_byte(hcb_p np, u_char *ack_data, u_char write_data,
10088 u_char *gpreg, u_char *gpcntl)
10092 for (x = 0; x < 8; x++)
10093 S24C16_do_bit(np, 0, (write_data >> (7 - x)) & 0x01, gpreg);
10095 S24C16_read_ack(np, ack_data, gpreg, gpcntl);
10099 * READ a byte from the NVRAM and then send an ACK to say we have got it,
10100 * GPIO0 must already be set as an input
10102 static void S24C16_read_byte(hcb_p np, u_char *read_data, u_char ack_data,
10103 u_char *gpreg, u_char *gpcntl)
10109 for (x = 0; x < 8; x++) {
10110 S24C16_do_bit(np, &read_bit, 1, gpreg);
10111 *read_data |= ((read_bit & 0x01) << (7 - x));
10114 S24C16_write_ack(np, ack_data, gpreg, gpcntl);
10118 * Read 'len' bytes starting at 'offset'.
10120 static int sym_read_S24C16_nvram (hcb_p np, int offset, u_char *data, int len)
10122 u_char gpcntl, gpreg;
10123 u_char old_gpcntl, old_gpreg;
10128 /* save current state of GPCNTL and GPREG */
10129 old_gpreg = INB (nc_gpreg);
10130 old_gpcntl = INB (nc_gpcntl);
10131 gpcntl = old_gpcntl & 0x1c;
10133 /* set up GPREG & GPCNTL to set GPIO0 and GPIO1 in to known state */
10134 OUTB (nc_gpreg, old_gpreg);
10135 OUTB (nc_gpcntl, gpcntl);
10137 /* this is to set NVRAM into a known state with GPIO0/1 both low */
10139 S24C16_set_bit(np, 0, &gpreg, CLR_CLK);
10140 S24C16_set_bit(np, 0, &gpreg, CLR_BIT);
10142 /* now set NVRAM inactive with GPIO0/1 both high */
10143 S24C16_stop(np, &gpreg);
10145 /* activate NVRAM */
10146 S24C16_start(np, &gpreg);
10148 /* write device code and random address MSB */
10149 S24C16_write_byte(np, &ack_data,
10150 0xa0 | ((offset >> 7) & 0x0e), &gpreg, &gpcntl);
10151 if (ack_data & 0x01)
10154 /* write random address LSB */
10155 S24C16_write_byte(np, &ack_data,
10156 offset & 0xff, &gpreg, &gpcntl);
10157 if (ack_data & 0x01)
10160 /* regenerate START state to set up for reading */
10161 S24C16_start(np, &gpreg);
10163 /* rewrite device code and address MSB with read bit set (lsb = 0x01) */
10164 S24C16_write_byte(np, &ack_data,
10165 0xa1 | ((offset >> 7) & 0x0e), &gpreg, &gpcntl);
10166 if (ack_data & 0x01)
10169 /* now set up GPIO0 for inputting data */
10171 OUTB (nc_gpcntl, gpcntl);
10173 /* input all requested data - only part of total NVRAM */
10174 for (x = 0; x < len; x++)
10175 S24C16_read_byte(np, &data[x], (x == (len-1)), &gpreg, &gpcntl);
10177 /* finally put NVRAM back in inactive mode */
10179 OUTB (nc_gpcntl, gpcntl);
10180 S24C16_stop(np, &gpreg);
10183 /* return GPIO0/1 to original states after having accessed NVRAM */
10184 OUTB (nc_gpcntl, old_gpcntl);
10185 OUTB (nc_gpreg, old_gpreg);
10196 * Try reading Symbios NVRAM.
10199 static int sym_read_Symbios_nvram (hcb_p np, Symbios_nvram *nvram)
10201 static u_char Symbios_trailer[6] = {0xfe, 0xfe, 0, 0, 0, 0};
10202 u_char *data = (u_char *) nvram;
10203 int len = sizeof(*nvram);
10207 /* probe the 24c16 and read the SYMBIOS 24c16 area */
10208 if (sym_read_S24C16_nvram (np, SYMBIOS_NVRAM_ADDRESS, data, len))
10211 /* check valid NVRAM signature, verify byte count and checksum */
10212 if (nvram->type != 0 ||
10213 bcmp(nvram->trailer, Symbios_trailer, 6) ||
10214 nvram->byte_count != len - 12)
10217 /* verify checksum */
10218 for (x = 6, csum = 0; x < len - 6; x++)
10220 if (csum != nvram->checksum)
10227 * 93C46 EEPROM reading.
10232 * GPIO4 - chip select
10238 * Pulse clock bit in GPIO0
10240 static void T93C46_Clk(hcb_p np, u_char *gpreg)
10242 OUTB (nc_gpreg, *gpreg | 0x04);
10244 OUTB (nc_gpreg, *gpreg);
10248 * Read bit from NVRAM
10250 static void T93C46_Read_Bit(hcb_p np, u_char *read_bit, u_char *gpreg)
10253 T93C46_Clk(np, gpreg);
10254 *read_bit = INB (nc_gpreg);
10258 * Write bit to GPIO0
10260 static void T93C46_Write_Bit(hcb_p np, u_char write_bit, u_char *gpreg)
10262 if (write_bit & 0x01)
10269 OUTB (nc_gpreg, *gpreg);
10272 T93C46_Clk(np, gpreg);
10276 * Send STOP condition to NVRAM - puts NVRAM to sleep... ZZZzzz!!
10278 static void T93C46_Stop(hcb_p np, u_char *gpreg)
10281 OUTB (nc_gpreg, *gpreg);
10284 T93C46_Clk(np, gpreg);
10288 * Send read command and address to NVRAM
10290 static void T93C46_Send_Command(hcb_p np, u_short write_data,
10291 u_char *read_bit, u_char *gpreg)
10295 /* send 9 bits, start bit (1), command (2), address (6) */
10296 for (x = 0; x < 9; x++)
10297 T93C46_Write_Bit(np, (u_char) (write_data >> (8 - x)), gpreg);
10299 *read_bit = INB (nc_gpreg);
10303 * READ 2 bytes from the NVRAM
10305 static void T93C46_Read_Word(hcb_p np, u_short *nvram_data, u_char *gpreg)
10311 for (x = 0; x < 16; x++) {
10312 T93C46_Read_Bit(np, &read_bit, gpreg);
10314 if (read_bit & 0x01)
10315 *nvram_data |= (0x01 << (15 - x));
10317 *nvram_data &= ~(0x01 << (15 - x));
10322 * Read Tekram NvRAM data.
10324 static int T93C46_Read_Data(hcb_p np, u_short *data,int len,u_char *gpreg)
10329 for (x = 0; x < len; x++) {
10331 /* output read command and address */
10332 T93C46_Send_Command(np, 0x180 | x, &read_bit, gpreg);
10333 if (read_bit & 0x01)
10334 return 1; /* Bad */
10335 T93C46_Read_Word(np, &data[x], gpreg);
10336 T93C46_Stop(np, gpreg);
10343 * Try reading 93C46 Tekram NVRAM.
10345 static int sym_read_T93C46_nvram (hcb_p np, Tekram_nvram *nvram)
10347 u_char gpcntl, gpreg;
10348 u_char old_gpcntl, old_gpreg;
10351 /* save current state of GPCNTL and GPREG */
10352 old_gpreg = INB (nc_gpreg);
10353 old_gpcntl = INB (nc_gpcntl);
10355 /* set up GPREG & GPCNTL to set GPIO0/1/2/4 in to known state, 0 in,
10357 gpreg = old_gpreg & 0xe9;
10358 OUTB (nc_gpreg, gpreg);
10359 gpcntl = (old_gpcntl & 0xe9) | 0x09;
10360 OUTB (nc_gpcntl, gpcntl);
10362 /* input all of NVRAM, 64 words */
10363 retv = T93C46_Read_Data(np, (u_short *) nvram,
10364 sizeof(*nvram) / sizeof(short), &gpreg);
10366 /* return GPIO0/1/2/4 to original states after having accessed NVRAM */
10367 OUTB (nc_gpcntl, old_gpcntl);
10368 OUTB (nc_gpreg, old_gpreg);
10374 * Try reading Tekram NVRAM.
10377 static int sym_read_Tekram_nvram (hcb_p np, Tekram_nvram *nvram)
10379 u_char *data = (u_char *) nvram;
10380 int len = sizeof(*nvram);
10384 switch (np->device_id) {
10385 case PCI_ID_SYM53C885:
10386 case PCI_ID_SYM53C895:
10387 case PCI_ID_SYM53C896:
10388 x = sym_read_S24C16_nvram(np, TEKRAM_24C16_NVRAM_ADDRESS,
10391 case PCI_ID_SYM53C875:
10392 x = sym_read_S24C16_nvram(np, TEKRAM_24C16_NVRAM_ADDRESS,
10397 x = sym_read_T93C46_nvram(np, nvram);
10403 /* verify checksum */
10404 for (x = 0, csum = 0; x < len - 1; x += 2)
10405 csum += data[x] + (data[x+1] << 8);
10406 if (csum != 0x1234)
10412 #endif /* SYM_CONF_NVRAM_SUPPORT */