2 * Copyright (c) 2018 The NetBSD Foundation, Inc. All rights reserved.
4 * This code is derived from software contributed to The NetBSD Foundation
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
16 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
17 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
18 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
19 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
20 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
23 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
24 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
25 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
26 * POSSIBILITY OF SUCH DAMAGE.
32 #define PAGE_SIZE 4096
36 #define IOM_BEGIN 0x0a0000 /* Start of I/O Memory "hole" */
37 #define IOM_END 0x100000 /* End of I/O Memory "hole" */
38 #define IOM_SIZE (IOM_END - IOM_BEGIN)
40 #define SMALLKERNBASE 0x0
41 #define SMALLKERNTEXTOFF (SMALLKERNBASE + 0x100000)
43 #define L4_SLOT_SMALLKERN 0
44 #define L4_SLOT_PTE 255
46 #define PDIR_SLOT_KERN L4_SLOT_SMALLKERN
47 #define PDIR_SLOT_PTE L4_SLOT_PTE
49 #define PTE_BASE ((pt_entry_t *)(L4_SLOT_PTE * NBPD_L4))
51 #define L1_BASE PTE_BASE
52 #define L2_BASE ((pd_entry_t *)((char *)L1_BASE + L4_SLOT_PTE * NBPD_L3))
53 #define L3_BASE ((pd_entry_t *)((char *)L2_BASE + L4_SLOT_PTE * NBPD_L2))
54 #define L4_BASE ((pd_entry_t *)((char *)L3_BASE + L4_SLOT_PTE * NBPD_L1))
56 #define PDP_BASE L4_BASE
58 #define NKL4_MAX_ENTRIES (unsigned long)1
59 #define NKL3_MAX_ENTRIES (unsigned long)(NKL4_MAX_ENTRIES * 512)
60 #define NKL2_MAX_ENTRIES (unsigned long)(NKL3_MAX_ENTRIES * 512)
61 #define NKL1_MAX_ENTRIES (unsigned long)(NKL2_MAX_ENTRIES * 512)
63 #define NKL4_KIMG_ENTRIES 1
64 #define NKL3_KIMG_ENTRIES 1
65 #define NKL2_KIMG_ENTRIES 32
71 #define NBPD_L1 (1UL << L1_SHIFT) /* # bytes mapped by L1 ent (4K) */
72 #define NBPD_L2 (1UL << L2_SHIFT) /* # bytes mapped by L2 ent (2MB) */
73 #define NBPD_L3 (1UL << L3_SHIFT) /* # bytes mapped by L3 ent (1G) */
74 #define NBPD_L4 (1UL << L4_SHIFT) /* # bytes mapped by L4 ent (512G) */
76 #define L4_MASK 0x0000ff8000000000
77 #define L3_MASK 0x0000007fc0000000
78 #define L2_MASK 0x000000003fe00000
79 #define L1_MASK 0x00000000001ff000
81 #define L4_FRAME L4_MASK
82 #define L3_FRAME (L4_FRAME|L3_MASK)
83 #define L2_FRAME (L3_FRAME|L2_MASK)
84 #define L1_FRAME (L2_FRAME|L1_MASK)
86 #define pl1_i(va) (((va) & L1_FRAME) >> L1_SHIFT)
87 #define pl2_i(va) (((va) & L2_FRAME) >> L2_SHIFT)
88 #define pl3_i(va) (((va) & L3_FRAME) >> L3_SHIFT)
89 #define pl4_i(va) (((va) & L4_FRAME) >> L4_SHIFT)