sys/dev/sound/pci/hda/hdac.c

   1 /*-
   2  * Copyright (c) 2006 Stephane E. Potvin <sepotvin@videotron.ca>
   3  * Copyright (c) 2006 Ariff Abdullah <ariff@FreeBSD.org>
   4  * All rights reserved.
   5  *
   6  * Redistribution and use in source and binary forms, with or without
   7  * modification, are permitted provided that the following conditions
   8  * are met:
   9  * 1. Redistributions of source code must retain the above copyright
  10  *    notice, this list of conditions and the following disclaimer.
  11  * 2. Redistributions in binary form must reproduce the above copyright
  12  *    notice, this list of conditions and the following disclaimer in the
  13  *    documentation and/or other materials provided with the distribution.
  14  *
  15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
  16  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  17  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  18  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
  19  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  20  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  21  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  22  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  23  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  24  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  25  * SUCH DAMAGE.
  26  *
  27  * $FreeBSD: src/sys/dev/sound/pci/hda/hdac.c,v 1.36.2.8 2007/11/30 15:11:42 ariff Exp $
  28  */
  29
  30 /*
  31  * Intel High Definition Audio (Controller) driver for FreeBSD. Be advised
  32  * that this driver still in its early stage, and possible of rewrite are
  33  * pretty much guaranteed. There are supposedly several distinct parent/child
  34  * busses to make this "perfect", but as for now and for the sake of
  35  * simplicity, everything is gobble up within single source.
  36  *
  37  * List of subsys:
  38  *     1) HDA Controller support
  39  *     2) HDA Codecs support, which may include
  40  *        - HDA
  41  *        - Modem
  42  *        - HDMI
  43  *     3) Widget parser - the real magic of why this driver works on so
  44  *        many hardwares with minimal vendor specific quirk. The original
  45  *        parser was written using Ruby and can be found at
  46  *        http://people.freebsd.org/~ariff/HDA/parser.rb . This crude
  47  *        ruby parser take the verbose dmesg dump as its input. Refer to
  48  *        http://www.microsoft.com/whdc/device/audio/default.mspx for various
  49  *        interesting documents, especially UAA (Universal Audio Architecture).
  50  *     4) Possible vendor specific support.
  51  *        (snd_hda_intel, snd_hda_ati, etc..)
  52  *
  53  * Thanks to Ahmad Ubaidah Omar @ Defenxis Sdn. Bhd. for the
  54  * Compaq V3000 with Conexant HDA.
  55  *
  56  *    * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
  57  *    *                                                                 *
  58  *    *        This driver is a collaborative effort made by:           *
  59  *    *                                                                 *
  60  *    *          Stephane E. Potvin <sepotvin@videotron.ca>             *
  61  *    *               Andrea Bittau <a.bittau@cs.ucl.ac.uk>             *
  62  *    *               Wesley Morgan <morganw@chemikals.org>             *
  63  *    *              Daniel Eischen <deischen@FreeBSD.org>              *
  64  *    *             Maxime Guillaud <bsd-ports@mguillaud.net>           *
  65  *    *              Ariff Abdullah <ariff@FreeBSD.org>                 *
  66  *    *                                                                 *
  67  *    *   ....and various people from freebsd-multimedia@FreeBSD.org    *
  68  *    *                                                                 *
  69  *    * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
  70  */
  71
  72 #include <dev/sound/pcm/sound.h>
  73 #include <bus/pci/pcireg.h>
  74 #include <bus/pci/pcivar.h>
  75
  76 #include <sys/ctype.h>
  77 #include <sys/taskqueue.h>
  78
  79 #include <dev/sound/pci/hda/hdac_private.h>
  80 #include <dev/sound/pci/hda/hdac_reg.h>
  81 #include <dev/sound/pci/hda/hda_reg.h>
  82 #include <dev/sound/pci/hda/hdac.h>
  83
  84 #include "mixer_if.h"
  85
  86 #define HDA_DRV_TEST_REV        "20071129_0050"
  87 #define HDA_WIDGET_PARSER_REV   1
  88
  89 static int hda_debug
  90 #ifdef HDA_DEBUG
  91         = 1
  92 #endif
  93         ;
  94 #define HDA_BOOTVERBOSE(stmt)   do {                    \
  95         if (hda_debug && bootverbose != 0) {            \
  96                 stmt                                    \
  97         }                                               \
  98 } while(0)
  99
 100 #if 1
 101 #undef HDAC_INTR_EXTRA
 102 #define HDAC_INTR_EXTRA         1
 103 #endif
 104
 105 #define hdac_lock(sc)           snd_mtxlock((sc)->lock)
 106 #define hdac_unlock(sc)         snd_mtxunlock((sc)->lock)
 107 #define hdac_lockassert(sc)     snd_mtxassert((sc)->lock)
 108 #define hdac_lockowned(sc)      (1)/* mtx_owned((sc)->lock) */
 109
 110 #if 0 /* TODO: No uncacheable DMA support in DragonFly. */
 111 #include <machine/specialreg.h>
 112 #define HDAC_DMA_ATTR(sc, v, s, attr)   do {                            \
 113         vm_offset_t va = (vm_offset_t)(v);                              \
 114         vm_size_t sz = (vm_size_t)(s);                                  \
 115         if ((sc) != NULL && ((sc)->flags & HDAC_F_DMA_NOCACHE) &&       \
 116             va != 0 && sz != 0)                                         \
 117                 (void)pmap_change_attr(va, sz, (attr));                 \
 118 } while(0)
 119 #else
 120 #define HDAC_DMA_ATTR(...)
 121 #endif
 122
 123 #define HDA_FLAG_MATCH(fl, v)   (((fl) & (v)) == (v))
 124 #define HDA_DEV_MATCH(fl, v)    ((fl) == (v) || \
 125                                 (fl) == 0xffffffff || \
 126                                 (((fl) & 0xffff0000) == 0xffff0000 && \
 127                                 ((fl) & 0x0000ffff) == ((v) & 0x0000ffff)) || \
 128                                 (((fl) & 0x0000ffff) == 0x0000ffff && \
 129                                 ((fl) & 0xffff0000) == ((v) & 0xffff0000)))
 130 #define HDA_MATCH_ALL           0xffffffff
 131 #define HDAC_INVALID            0xffffffff
 132
 133 /* Default controller / jack sense poll: 250ms */
 134 #define HDAC_POLL_INTERVAL      max(hz >> 2, 1)
 135
 136 /*
 137  * Make room for possible 4096 playback/record channels, in 100 years to come.
 138  */
 139 #define HDAC_TRIGGER_NONE       0x00000000
 140 #define HDAC_TRIGGER_PLAY       0x00000fff
 141 #define HDAC_TRIGGER_REC        0x00fff000
 142 #define HDAC_TRIGGER_UNSOL      0x80000000
 143
 144 #define HDA_MODEL_CONSTRUCT(vendor, model)      \
 145                 (((uint32_t)(model) << 16) | ((vendor##_VENDORID) & 0xffff))
 146
 147 /* Controller models */
 148
 149 /* Intel */
 150 #define INTEL_VENDORID          0x8086
 151 #define HDA_INTEL_82801F        HDA_MODEL_CONSTRUCT(INTEL, 0x2668)
 152 #define HDA_INTEL_63XXESB       HDA_MODEL_CONSTRUCT(INTEL, 0x269a)
 153 #define HDA_INTEL_82801G        HDA_MODEL_CONSTRUCT(INTEL, 0x27d8)
 154 #define HDA_INTEL_82801H        HDA_MODEL_CONSTRUCT(INTEL, 0x284b)
 155 #define HDA_INTEL_82801I        HDA_MODEL_CONSTRUCT(INTEL, 0x293e)
 156 #define HDA_INTEL_ALL           HDA_MODEL_CONSTRUCT(INTEL, 0xffff)
 157
 158 /* Nvidia */
 159 #define NVIDIA_VENDORID         0x10de
 160 #define HDA_NVIDIA_MCP51        HDA_MODEL_CONSTRUCT(NVIDIA, 0x026c)
 161 #define HDA_NVIDIA_MCP55        HDA_MODEL_CONSTRUCT(NVIDIA, 0x0371)
 162 #define HDA_NVIDIA_MCP61_1      HDA_MODEL_CONSTRUCT(NVIDIA, 0x03e4)
 163 #define HDA_NVIDIA_MCP61_2      HDA_MODEL_CONSTRUCT(NVIDIA, 0x03f0)
 164 #define HDA_NVIDIA_MCP65_1      HDA_MODEL_CONSTRUCT(NVIDIA, 0x044a)
 165 #define HDA_NVIDIA_MCP65_2      HDA_MODEL_CONSTRUCT(NVIDIA, 0x044b)
 166 #define HDA_NVIDIA_MCP67_1      HDA_MODEL_CONSTRUCT(NVIDIA, 0x055c)
 167 #define HDA_NVIDIA_MCP67_2      HDA_MODEL_CONSTRUCT(NVIDIA, 0x055d)
 168 #define HDA_NVIDIA_ALL          HDA_MODEL_CONSTRUCT(NVIDIA, 0xffff)
 169
 170 /* ATI */
 171 #define ATI_VENDORID            0x1002
 172 #define HDA_ATI_SB450           HDA_MODEL_CONSTRUCT(ATI, 0x437b)
 173 #define HDA_ATI_SB600           HDA_MODEL_CONSTRUCT(ATI, 0x4383)
 174 #define HDA_ATI_ALL             HDA_MODEL_CONSTRUCT(ATI, 0xffff)
 175
 176 /* VIA */
 177 #define VIA_VENDORID            0x1106
 178 #define HDA_VIA_VT82XX          HDA_MODEL_CONSTRUCT(VIA, 0x3288)
 179 #define HDA_VIA_ALL             HDA_MODEL_CONSTRUCT(VIA, 0xffff)
 180
 181 /* SiS */
 182 #define SIS_VENDORID            0x1039
 183 #define HDA_SIS_966             HDA_MODEL_CONSTRUCT(SIS, 0x7502)
 184 #define HDA_SIS_ALL             HDA_MODEL_CONSTRUCT(SIS, 0xffff)
 185
 186 /* OEM/subvendors */
 187
 188 /* Intel */
 189 #define INTEL_D101GGC_SUBVENDOR HDA_MODEL_CONSTRUCT(INTEL, 0xd600)
 190
 191 /* HP/Compaq */
 192 #define HP_VENDORID             0x103c
 193 #define HP_V3000_SUBVENDOR      HDA_MODEL_CONSTRUCT(HP, 0x30b5)
 194 #define HP_NX7400_SUBVENDOR     HDA_MODEL_CONSTRUCT(HP, 0x30a2)
 195 #define HP_NX6310_SUBVENDOR     HDA_MODEL_CONSTRUCT(HP, 0x30aa)
 196 #define HP_NX6325_SUBVENDOR     HDA_MODEL_CONSTRUCT(HP, 0x30b0)
 197 #define HP_XW4300_SUBVENDOR     HDA_MODEL_CONSTRUCT(HP, 0x3013)
 198 #define HP_3010_SUBVENDOR       HDA_MODEL_CONSTRUCT(HP, 0x3010)
 199 #define HP_DV5000_SUBVENDOR     HDA_MODEL_CONSTRUCT(HP, 0x30a5)
 200 #define HP_DC7700_SUBVENDOR     HDA_MODEL_CONSTRUCT(HP, 0x2802)
 201 #define HP_ALL_SUBVENDOR        HDA_MODEL_CONSTRUCT(HP, 0xffff)
 202 /* What is wrong with XN 2563 anyway? (Got the picture ?) */
 203 #define HP_NX6325_SUBVENDORX    0x103c30b0
 204
 205 /* Dell */
 206 #define DELL_VENDORID           0x1028
 207 #define DELL_D820_SUBVENDOR     HDA_MODEL_CONSTRUCT(DELL, 0x01cc)
 208 #define DELL_I1300_SUBVENDOR    HDA_MODEL_CONSTRUCT(DELL, 0x01c9)
 209 #define DELL_XPSM1210_SUBVENDOR HDA_MODEL_CONSTRUCT(DELL, 0x01d7)
 210 #define DELL_OPLX745_SUBVENDOR  HDA_MODEL_CONSTRUCT(DELL, 0x01da)
 211 #define DELL_ALL_SUBVENDOR      HDA_MODEL_CONSTRUCT(DELL, 0xffff)
 212
 213 /* Clevo */
 214 #define CLEVO_VENDORID          0x1558
 215 #define CLEVO_D900T_SUBVENDOR   HDA_MODEL_CONSTRUCT(CLEVO, 0x0900)
 216 #define CLEVO_ALL_SUBVENDOR     HDA_MODEL_CONSTRUCT(CLEVO, 0xffff)
 217
 218 /* Acer */
 219 #define ACER_VENDORID           0x1025
 220 #define ACER_A5050_SUBVENDOR    HDA_MODEL_CONSTRUCT(ACER, 0x010f)
 221 #define ACER_A4520_SUBVENDOR    HDA_MODEL_CONSTRUCT(ACER, 0x0127)
 222 #define ACER_3681WXM_SUBVENDOR  HDA_MODEL_CONSTRUCT(ACER, 0x0110)
 223 #define ACER_ALL_SUBVENDOR      HDA_MODEL_CONSTRUCT(ACER, 0xffff)
 224
 225 /* Asus */
 226 #define ASUS_VENDORID           0x1043
 227 #define ASUS_M5200_SUBVENDOR    HDA_MODEL_CONSTRUCT(ASUS, 0x1993)
 228 #define ASUS_U5F_SUBVENDOR      HDA_MODEL_CONSTRUCT(ASUS, 0x1263)
 229 #define ASUS_A8JC_SUBVENDOR     HDA_MODEL_CONSTRUCT(ASUS, 0x1153)
 230 #define ASUS_P1AH2_SUBVENDOR    HDA_MODEL_CONSTRUCT(ASUS, 0x81cb)
 231 #define ASUS_A7M_SUBVENDOR      HDA_MODEL_CONSTRUCT(ASUS, 0x1323)
 232 #define ASUS_A7T_SUBVENDOR      HDA_MODEL_CONSTRUCT(ASUS, 0x13c2)
 233 #define ASUS_W6F_SUBVENDOR      HDA_MODEL_CONSTRUCT(ASUS, 0x1263)
 234 #define ASUS_W2J_SUBVENDOR      HDA_MODEL_CONSTRUCT(ASUS, 0x1971)
 235 #define ASUS_F3JC_SUBVENDOR     HDA_MODEL_CONSTRUCT(ASUS, 0x1338)
 236 #define ASUS_M2V_SUBVENDOR      HDA_MODEL_CONSTRUCT(ASUS, 0x81e7)
 237 #define ASUS_M2N_SUBVENDOR      HDA_MODEL_CONSTRUCT(ASUS, 0x8234)
 238 #define ASUS_M2NPVMX_SUBVENDOR  HDA_MODEL_CONSTRUCT(ASUS, 0x81cb)
 239 #define ASUS_P5BWD_SUBVENDOR    HDA_MODEL_CONSTRUCT(ASUS, 0x81ec)
 240 #define ASUS_A8NVMCSM_SUBVENDOR HDA_MODEL_CONSTRUCT(NVIDIA, 0xcb84)
 241 #define ASUS_ALL_SUBVENDOR      HDA_MODEL_CONSTRUCT(ASUS, 0xffff)
 242
 243 /* IBM / Lenovo */
 244 #define IBM_VENDORID            0x1014
 245 #define IBM_M52_SUBVENDOR       HDA_MODEL_CONSTRUCT(IBM, 0x02f6)
 246 #define IBM_ALL_SUBVENDOR       HDA_MODEL_CONSTRUCT(IBM, 0xffff)
 247
 248 /* Lenovo */
 249 #define LENOVO_VENDORID         0x17aa
 250 #define LENOVO_3KN100_SUBVENDOR HDA_MODEL_CONSTRUCT(LENOVO, 0x2066)
 251 #define LENOVO_TCA55_SUBVENDOR  HDA_MODEL_CONSTRUCT(LENOVO, 0x1015)
 252 #define LENOVO_ALL_SUBVENDOR    HDA_MODEL_CONSTRUCT(LENOVO, 0xffff)
 253
 254 /* Samsung */
 255 #define SAMSUNG_VENDORID        0x144d
 256 #define SAMSUNG_Q1_SUBVENDOR    HDA_MODEL_CONSTRUCT(SAMSUNG, 0xc027)
 257 #define SAMSUNG_ALL_SUBVENDOR   HDA_MODEL_CONSTRUCT(SAMSUNG, 0xffff)
 258
 259 /* Medion ? */
 260 #define MEDION_VENDORID                 0x161f
 261 #define MEDION_MD95257_SUBVENDOR        HDA_MODEL_CONSTRUCT(MEDION, 0x203d)
 262 #define MEDION_ALL_SUBVENDOR            HDA_MODEL_CONSTRUCT(MEDION, 0xffff)
 263
 264 /* Apple Computer Inc. */
 265 #define APPLE_VENDORID          0x106b
 266 #define APPLE_MB3_SUBVENDOR     HDA_MODEL_CONSTRUCT(APPLE, 0x00a1)
 267
 268 /*
 269  * Apple Intel MacXXXX seems using Sigmatel codec/vendor id
 270  * instead of their own, which is beyond my comprehension
 271  * (see HDA_CODEC_STAC9221 below).
 272  */
 273 #define APPLE_INTEL_MAC         0x76808384
 274
 275 /* LG Electronics */
 276 #define LG_VENDORID             0x1854
 277 #define LG_LW20_SUBVENDOR       HDA_MODEL_CONSTRUCT(LG, 0x0018)
 278 #define LG_ALL_SUBVENDOR        HDA_MODEL_CONSTRUCT(LG, 0xffff)
 279
 280 /* Fujitsu Siemens */
 281 #define FS_VENDORID             0x1734
 282 #define FS_PA1510_SUBVENDOR     HDA_MODEL_CONSTRUCT(FS, 0x10b8)
 283 #define FS_SI1848_SUBVENDOR     HDA_MODEL_CONSTRUCT(FS, 0x10cd)
 284 #define FS_ALL_SUBVENDOR        HDA_MODEL_CONSTRUCT(FS, 0xffff)
 285
 286 /* Fujitsu Limited */
 287 #define FL_VENDORID             0x10cf
 288 #define FL_S7020D_SUBVENDOR     HDA_MODEL_CONSTRUCT(FL, 0x1326)
 289 #define FL_ALL_SUBVENDOR        HDA_MODEL_CONSTRUCT(FL, 0xffff)
 290
 291 /* Toshiba */
 292 #define TOSHIBA_VENDORID        0x1179
 293 #define TOSHIBA_U200_SUBVENDOR  HDA_MODEL_CONSTRUCT(TOSHIBA, 0x0001)
 294 #define TOSHIBA_A135_SUBVENDOR  HDA_MODEL_CONSTRUCT(TOSHIBA, 0xff01)
 295 #define TOSHIBA_ALL_SUBVENDOR   HDA_MODEL_CONSTRUCT(TOSHIBA, 0xffff)
 296
 297 /* Micro-Star International (MSI) */
 298 #define MSI_VENDORID            0x1462
 299 #define MSI_MS1034_SUBVENDOR    HDA_MODEL_CONSTRUCT(MSI, 0x0349)
 300 #define MSI_MS034A_SUBVENDOR    HDA_MODEL_CONSTRUCT(MSI, 0x034a)
 301 #define MSI_ALL_SUBVENDOR       HDA_MODEL_CONSTRUCT(MSI, 0xffff)
 302
 303 /* Giga-Byte Technology */
 304 #define GB_VENDORID             0x1458
 305 #define GB_G33S2H_SUBVENDOR     HDA_MODEL_CONSTRUCT(GB, 0xa022)
 306 #define GP_ALL_SUBVENDOR        HDA_MODEL_CONSTRUCT(GB, 0xffff)
 307
 308 /* Uniwill ? */
 309 #define UNIWILL_VENDORID        0x1584
 310 #define UNIWILL_9075_SUBVENDOR  HDA_MODEL_CONSTRUCT(UNIWILL, 0x9075)
 311 #define UNIWILL_9080_SUBVENDOR  HDA_MODEL_CONSTRUCT(UNIWILL, 0x9080)
 312
 313
 314 /* Misc constants.. */
 315 #define HDA_AMP_MUTE_DEFAULT    (0xffffffff)
 316 #define HDA_AMP_MUTE_NONE       (0)
 317 #define HDA_AMP_MUTE_LEFT       (1 << 0)
 318 #define HDA_AMP_MUTE_RIGHT      (1 << 1)
 319 #define HDA_AMP_MUTE_ALL        (HDA_AMP_MUTE_LEFT | HDA_AMP_MUTE_RIGHT)
 320
 321 #define HDA_AMP_LEFT_MUTED(v)   ((v) & (HDA_AMP_MUTE_LEFT))
 322 #define HDA_AMP_RIGHT_MUTED(v)  (((v) & HDA_AMP_MUTE_RIGHT) >> 1)
 323
 324 #define HDA_DAC_PATH    (1 << 0)
 325 #define HDA_ADC_PATH    (1 << 1)
 326 #define HDA_ADC_RECSEL  (1 << 2)
 327
 328 #define HDA_DAC_LOCKED  (1 << 3)
 329 #define HDA_ADC_LOCKED  (1 << 4)
 330
 331 #define HDA_CTL_OUT     (1 << 0)
 332 #define HDA_CTL_IN      (1 << 1)
 333 #define HDA_CTL_BOTH    (HDA_CTL_IN | HDA_CTL_OUT)
 334
 335 #define HDA_GPIO_MAX            8
 336 /* 0 - 7 = GPIO , 8 = Flush */
 337 #define HDA_QUIRK_GPIO0         (1 << 0)
 338 #define HDA_QUIRK_GPIO1         (1 << 1)
 339 #define HDA_QUIRK_GPIO2         (1 << 2)
 340 #define HDA_QUIRK_GPIO3         (1 << 3)
 341 #define HDA_QUIRK_GPIO4         (1 << 4)
 342 #define HDA_QUIRK_GPIO5         (1 << 5)
 343 #define HDA_QUIRK_GPIO6         (1 << 6)
 344 #define HDA_QUIRK_GPIO7         (1 << 7)
 345 #define HDA_QUIRK_GPIOFLUSH     (1 << 8)
 346
 347 /* 9 - 25 = anything else */
 348 #define HDA_QUIRK_SOFTPCMVOL    (1 << 9)
 349 #define HDA_QUIRK_FIXEDRATE     (1 << 10)
 350 #define HDA_QUIRK_FORCESTEREO   (1 << 11)
 351 #define HDA_QUIRK_EAPDINV       (1 << 12)
 352 #define HDA_QUIRK_DMAPOS        (1 << 13)
 353
 354 /* 26 - 31 = vrefs */
 355 #define HDA_QUIRK_IVREF50       (1 << 26)
 356 #define HDA_QUIRK_IVREF80       (1 << 27)
 357 #define HDA_QUIRK_IVREF100      (1 << 28)
 358 #define HDA_QUIRK_OVREF50       (1 << 29)
 359 #define HDA_QUIRK_OVREF80       (1 << 30)
 360 #define HDA_QUIRK_OVREF100      (1 << 31)
 361
 362 #define HDA_QUIRK_IVREF         (HDA_QUIRK_IVREF50 | HDA_QUIRK_IVREF80 | \
 363                                                         HDA_QUIRK_IVREF100)
 364 #define HDA_QUIRK_OVREF         (HDA_QUIRK_OVREF50 | HDA_QUIRK_OVREF80 | \
 365                                                         HDA_QUIRK_OVREF100)
 366 #define HDA_QUIRK_VREF          (HDA_QUIRK_IVREF | HDA_QUIRK_OVREF)
 367
 368 #define SOUND_MASK_SKIP         (1 << 30)
 369 #define SOUND_MASK_DISABLE      (1 << 31)
 370
 371 static const struct {
 372         char *key;
 373         uint32_t value;
 374 } hdac_quirks_tab[] = {
 375         { "gpio0", HDA_QUIRK_GPIO0 },
 376         { "gpio1", HDA_QUIRK_GPIO1 },
 377         { "gpio2", HDA_QUIRK_GPIO2 },
 378         { "gpio3", HDA_QUIRK_GPIO3 },
 379         { "gpio4", HDA_QUIRK_GPIO4 },
 380         { "gpio5", HDA_QUIRK_GPIO5 },
 381         { "gpio6", HDA_QUIRK_GPIO6 },
 382         { "gpio7", HDA_QUIRK_GPIO7 },
 383         { "gpioflush", HDA_QUIRK_GPIOFLUSH },
 384         { "softpcmvol", HDA_QUIRK_SOFTPCMVOL },
 385         { "fixedrate", HDA_QUIRK_FIXEDRATE },
 386         { "forcestereo", HDA_QUIRK_FORCESTEREO },
 387         { "eapdinv", HDA_QUIRK_EAPDINV },
 388         { "dmapos", HDA_QUIRK_DMAPOS },
 389         { "ivref50", HDA_QUIRK_IVREF50 },
 390         { "ivref80", HDA_QUIRK_IVREF80 },
 391         { "ivref100", HDA_QUIRK_IVREF100 },
 392         { "ovref50", HDA_QUIRK_OVREF50 },
 393         { "ovref80", HDA_QUIRK_OVREF80 },
 394         { "ovref100", HDA_QUIRK_OVREF100 },
 395         { "ivref", HDA_QUIRK_IVREF },
 396         { "ovref", HDA_QUIRK_OVREF },
 397         { "vref", HDA_QUIRK_VREF },
 398 };
 399 #define HDAC_QUIRKS_TAB_LEN NELEM(hdac_quirks_tab)
 400
 401 #define HDA_BDL_MIN     2
 402 #define HDA_BDL_MAX     256
 403 #define HDA_BDL_DEFAULT HDA_BDL_MIN
 404
 405 #define HDA_BLK_MIN     HDAC_DMA_ALIGNMENT
 406 #define HDA_BLK_ALIGN   (~(HDA_BLK_MIN - 1))
 407
 408 #define HDA_BUFSZ_MIN           4096
 409 #define HDA_BUFSZ_MAX           65536
 410 #define HDA_BUFSZ_DEFAULT       16384
 411
 412 #define HDA_PARSE_MAXDEPTH      10
 413
 414 #define HDAC_UNSOLTAG_EVENT_HP          0x00
 415 #define HDAC_UNSOLTAG_EVENT_TEST        0x01
 416
 417 MALLOC_DEFINE(M_HDAC, "hdac", "High Definition Audio Controller");
 418
 419 static int hdac_msi_enable = 1;
 420 TUNABLE_INT("hw.snd.hdac.msi.enable", &hdac_msi_enable);
 421
 422 enum {
 423         HDA_PARSE_MIXER,
 424         HDA_PARSE_DIRECT
 425 };
 426
 427 /* Default */
 428 static uint32_t hdac_fmt[] = {
 429         AFMT_STEREO | AFMT_S16_LE,
 430         0
 431 };
 432
 433 static struct pcmchan_caps hdac_caps = {48000, 48000, hdac_fmt, 0};
 434
 435 static const struct {
 436         uint32_t        model;
 437         char            *desc;
 438 } hdac_devices[] = {
 439         { HDA_INTEL_82801F,  "Intel 82801F" },
 440         { HDA_INTEL_63XXESB, "Intel 631x/632xESB" },
 441         { HDA_INTEL_82801G,  "Intel 82801G" },
 442         { HDA_INTEL_82801H,  "Intel 82801H" },
 443         { HDA_INTEL_82801I,  "Intel 82801I" },
 444         { HDA_NVIDIA_MCP51,  "NVidia MCP51" },
 445         { HDA_NVIDIA_MCP55,  "NVidia MCP55" },
 446         { HDA_NVIDIA_MCP61_1, "NVidia MCP61" },
 447         { HDA_NVIDIA_MCP61_2, "NVidia MCP61" },
 448         { HDA_NVIDIA_MCP65_1, "NVidia MCP65" },
 449         { HDA_NVIDIA_MCP65_2, "NVidia MCP65" },
 450         { HDA_NVIDIA_MCP67_1, "NVidia MCP67" },
 451         { HDA_NVIDIA_MCP67_2, "NVidia MCP67" },
 452         { HDA_ATI_SB450,     "ATI SB450"    },
 453         { HDA_ATI_SB600,     "ATI SB600"    },
 454         { HDA_VIA_VT82XX,    "VIA VT8251/8237A" },
 455         { HDA_SIS_966,       "SiS 966" },
 456         /* Unknown */
 457         { HDA_INTEL_ALL,  "Intel (Unknown)"  },
 458         { HDA_NVIDIA_ALL, "NVidia (Unknown)" },
 459         { HDA_ATI_ALL,    "ATI (Unknown)"    },
 460         { HDA_VIA_ALL,    "VIA (Unknown)"    },
 461         { HDA_SIS_ALL,    "SiS (Unknown)"    },
 462 };
 463 #define HDAC_DEVICES_LEN NELEM(hdac_devices)
 464
 465 static const struct {
 466         uint16_t vendor;
 467         uint8_t reg;
 468         uint8_t mask;
 469         uint8_t enable;
 470 } hdac_pcie_snoop[] = {
 471         {  INTEL_VENDORID, 0x00, 0x00, 0x00 },
 472         {    ATI_VENDORID, 0x42, 0xf8, 0x02 },
 473         { NVIDIA_VENDORID, 0x4e, 0xf0, 0x0f },
 474 };
 475 #define HDAC_PCIESNOOP_LEN NELEM(hdac_pcie_snoop)
 476
 477 static const struct {
 478         uint32_t        rate;
 479         int             valid;
 480         uint16_t        base;
 481         uint16_t        mul;
 482         uint16_t        div;
 483 } hda_rate_tab[] = {
 484         {   8000, 1, 0x0000, 0x0000, 0x0500 },  /* (48000 * 1) / 6 */
 485         {   9600, 0, 0x0000, 0x0000, 0x0400 },  /* (48000 * 1) / 5 */
 486         {  12000, 0, 0x0000, 0x0000, 0x0300 },  /* (48000 * 1) / 4 */
 487         {  16000, 1, 0x0000, 0x0000, 0x0200 },  /* (48000 * 1) / 3 */
 488         {  18000, 0, 0x0000, 0x1000, 0x0700 },  /* (48000 * 3) / 8 */
 489         {  19200, 0, 0x0000, 0x0800, 0x0400 },  /* (48000 * 2) / 5 */
 490         {  24000, 0, 0x0000, 0x0000, 0x0100 },  /* (48000 * 1) / 2 */
 491         {  28800, 0, 0x0000, 0x1000, 0x0400 },  /* (48000 * 3) / 5 */
 492         {  32000, 1, 0x0000, 0x0800, 0x0200 },  /* (48000 * 2) / 3 */
 493         {  36000, 0, 0x0000, 0x1000, 0x0300 },  /* (48000 * 3) / 4 */
 494         {  38400, 0, 0x0000, 0x1800, 0x0400 },  /* (48000 * 4) / 5 */
 495         {  48000, 1, 0x0000, 0x0000, 0x0000 },  /* (48000 * 1) / 1 */
 496         {  64000, 0, 0x0000, 0x1800, 0x0200 },  /* (48000 * 4) / 3 */
 497         {  72000, 0, 0x0000, 0x1000, 0x0100 },  /* (48000 * 3) / 2 */
 498         {  96000, 1, 0x0000, 0x0800, 0x0000 },  /* (48000 * 2) / 1 */
 499         { 144000, 0, 0x0000, 0x1000, 0x0000 },  /* (48000 * 3) / 1 */
 500         { 192000, 1, 0x0000, 0x1800, 0x0000 },  /* (48000 * 4) / 1 */
 501         {   8820, 0, 0x4000, 0x0000, 0x0400 },  /* (44100 * 1) / 5 */
 502         {  11025, 1, 0x4000, 0x0000, 0x0300 },  /* (44100 * 1) / 4 */
 503         {  12600, 0, 0x4000, 0x0800, 0x0600 },  /* (44100 * 2) / 7 */
 504         {  14700, 0, 0x4000, 0x0000, 0x0200 },  /* (44100 * 1) / 3 */
 505         {  17640, 0, 0x4000, 0x0800, 0x0400 },  /* (44100 * 2) / 5 */
 506         {  18900, 0, 0x4000, 0x1000, 0x0600 },  /* (44100 * 3) / 7 */
 507         {  22050, 1, 0x4000, 0x0000, 0x0100 },  /* (44100 * 1) / 2 */
 508         {  25200, 0, 0x4000, 0x1800, 0x0600 },  /* (44100 * 4) / 7 */
 509         {  26460, 0, 0x4000, 0x1000, 0x0400 },  /* (44100 * 3) / 5 */
 510         {  29400, 0, 0x4000, 0x0800, 0x0200 },  /* (44100 * 2) / 3 */
 511         {  33075, 0, 0x4000, 0x1000, 0x0300 },  /* (44100 * 3) / 4 */
 512         {  35280, 0, 0x4000, 0x1800, 0x0400 },  /* (44100 * 4) / 5 */
 513         {  44100, 1, 0x4000, 0x0000, 0x0000 },  /* (44100 * 1) / 1 */
 514         {  58800, 0, 0x4000, 0x1800, 0x0200 },  /* (44100 * 4) / 3 */
 515         {  66150, 0, 0x4000, 0x1000, 0x0100 },  /* (44100 * 3) / 2 */
 516         {  88200, 1, 0x4000, 0x0800, 0x0000 },  /* (44100 * 2) / 1 */
 517         { 132300, 0, 0x4000, 0x1000, 0x0000 },  /* (44100 * 3) / 1 */
 518         { 176400, 1, 0x4000, 0x1800, 0x0000 },  /* (44100 * 4) / 1 */
 519 };
 520 #define HDA_RATE_TAB_LEN NELEM(hda_rate_tab)
 521
 522 /* All codecs you can eat... */
 523 #define HDA_CODEC_CONSTRUCT(vendor, id) \
 524                 (((uint32_t)(vendor##_VENDORID) << 16) | ((id) & 0xffff))
 525
 526 /* Realtek */
 527 #define REALTEK_VENDORID        0x10ec
 528 #define HDA_CODEC_ALC260        HDA_CODEC_CONSTRUCT(REALTEK, 0x0260)
 529 #define HDA_CODEC_ALC262        HDA_CODEC_CONSTRUCT(REALTEK, 0x0262)
 530 #define HDA_CODEC_ALC268        HDA_CODEC_CONSTRUCT(REALTEK, 0x0268)
 531 #define HDA_CODEC_ALC660        HDA_CODEC_CONSTRUCT(REALTEK, 0x0660)
 532 #define HDA_CODEC_ALC861        HDA_CODEC_CONSTRUCT(REALTEK, 0x0861)
 533 #define HDA_CODEC_ALC861VD      HDA_CODEC_CONSTRUCT(REALTEK, 0x0862)
 534 #define HDA_CODEC_ALC880        HDA_CODEC_CONSTRUCT(REALTEK, 0x0880)
 535 #define HDA_CODEC_ALC882        HDA_CODEC_CONSTRUCT(REALTEK, 0x0882)
 536 #define HDA_CODEC_ALC883        HDA_CODEC_CONSTRUCT(REALTEK, 0x0883)
 537 #define HDA_CODEC_ALC885        HDA_CODEC_CONSTRUCT(REALTEK, 0x0885)
 538 #define HDA_CODEC_ALC888        HDA_CODEC_CONSTRUCT(REALTEK, 0x0888)
 539 #define HDA_CODEC_ALCXXXX       HDA_CODEC_CONSTRUCT(REALTEK, 0xffff)
 540
 541 /* Analog Devices */
 542 #define ANALOGDEVICES_VENDORID  0x11d4
 543 #define HDA_CODEC_AD1981HD      HDA_CODEC_CONSTRUCT(ANALOGDEVICES, 0x1981)
 544 #define HDA_CODEC_AD1983        HDA_CODEC_CONSTRUCT(ANALOGDEVICES, 0x1983)
 545 #define HDA_CODEC_AD1984        HDA_CODEC_CONSTRUCT(ANALOGDEVICES, 0x1984)
 546 #define HDA_CODEC_AD1986A       HDA_CODEC_CONSTRUCT(ANALOGDEVICES, 0x1986)
 547 #define HDA_CODEC_AD1988        HDA_CODEC_CONSTRUCT(ANALOGDEVICES, 0x1988)
 548 #define HDA_CODEC_AD1988B       HDA_CODEC_CONSTRUCT(ANALOGDEVICES, 0x198b)
 549 #define HDA_CODEC_ADXXXX        HDA_CODEC_CONSTRUCT(ANALOGDEVICES, 0xffff)
 550
 551 /* CMedia */
 552 #define CMEDIA_VENDORID         0x434d
 553 #define HDA_CODEC_CMI9880       HDA_CODEC_CONSTRUCT(CMEDIA, 0x4980)
 554 #define HDA_CODEC_CMIXXXX       HDA_CODEC_CONSTRUCT(CMEDIA, 0xffff)
 555
 556 /* Sigmatel */
 557 #define SIGMATEL_VENDORID       0x8384
 558 #define HDA_CODEC_STAC9221      HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7680)
 559 #define HDA_CODEC_STAC9221D     HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7683)
 560 #define HDA_CODEC_STAC9220      HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7690)
 561 #define HDA_CODEC_STAC922XD     HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7681)
 562 #define HDA_CODEC_STAC9227      HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7618)
 563 #define HDA_CODEC_STAC9271D     HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7627)
 564 #define HDA_CODEC_STACXXXX      HDA_CODEC_CONSTRUCT(SIGMATEL, 0xffff)
 565
 566 /*
 567  * Conexant
 568  *
 569  * Ok, the truth is, I don't have any idea at all whether
 570  * it is "Venice" or "Waikiki" or other unnamed CXyadayada. The only
 571  * place that tell me it is "Venice" is from its Windows driver INF.
 572  *
 573  *  Venice - CX?????
 574  * Waikiki - CX20551-22
 575  */
 576 #define CONEXANT_VENDORID       0x14f1
 577 #define HDA_CODEC_CXVENICE      HDA_CODEC_CONSTRUCT(CONEXANT, 0x5045)
 578 #define HDA_CODEC_CXWAIKIKI     HDA_CODEC_CONSTRUCT(CONEXANT, 0x5047)
 579 #define HDA_CODEC_CXXXXX        HDA_CODEC_CONSTRUCT(CONEXANT, 0xffff)
 580
 581 /* VIA */
 582 #define HDA_CODEC_VT1708_8      HDA_CODEC_CONSTRUCT(VIA, 0x1708)
 583 #define HDA_CODEC_VT1708_9      HDA_CODEC_CONSTRUCT(VIA, 0x1709)
 584 #define HDA_CODEC_VT1708_A      HDA_CODEC_CONSTRUCT(VIA, 0x170a)
 585 #define HDA_CODEC_VT1708_B      HDA_CODEC_CONSTRUCT(VIA, 0x170b)
 586 #define HDA_CODEC_VT1709_0      HDA_CODEC_CONSTRUCT(VIA, 0xe710)
 587 #define HDA_CODEC_VT1709_1      HDA_CODEC_CONSTRUCT(VIA, 0xe711)
 588 #define HDA_CODEC_VT1709_2      HDA_CODEC_CONSTRUCT(VIA, 0xe712)
 589 #define HDA_CODEC_VT1709_3      HDA_CODEC_CONSTRUCT(VIA, 0xe713)
 590 #define HDA_CODEC_VT1709_4      HDA_CODEC_CONSTRUCT(VIA, 0xe714)
 591 #define HDA_CODEC_VT1709_5      HDA_CODEC_CONSTRUCT(VIA, 0xe715)
 592 #define HDA_CODEC_VT1709_6      HDA_CODEC_CONSTRUCT(VIA, 0xe716)
 593 #define HDA_CODEC_VT1709_7      HDA_CODEC_CONSTRUCT(VIA, 0xe717)
 594 #define HDA_CODEC_VTXXXX        HDA_CODEC_CONSTRUCT(VIA, 0xffff)
 595
 596
 597 /* Codecs */
 598 static const struct {
 599         uint32_t id;
 600         char *name;
 601 } hdac_codecs[] = {
 602         { HDA_CODEC_ALC260,    "Realtek ALC260" },
 603         { HDA_CODEC_ALC262,    "Realtek ALC262" },
 604         { HDA_CODEC_ALC268,    "Realtek ALC268" },
 605         { HDA_CODEC_ALC660,    "Realtek ALC660" },
 606         { HDA_CODEC_ALC861,    "Realtek ALC861" },
 607         { HDA_CODEC_ALC861VD,  "Realtek ALC861-VD" },
 608         { HDA_CODEC_ALC880,    "Realtek ALC880" },
 609         { HDA_CODEC_ALC882,    "Realtek ALC882" },
 610         { HDA_CODEC_ALC883,    "Realtek ALC883" },
 611         { HDA_CODEC_ALC885,    "Realtek ALC885" },
 612         { HDA_CODEC_ALC888,    "Realtek ALC888" },
 613         { HDA_CODEC_AD1981HD,  "Analog Devices AD1981HD" },
 614         { HDA_CODEC_AD1983,    "Analog Devices AD1983" },
 615         { HDA_CODEC_AD1984,    "Analog Devices AD1984" },
 616         { HDA_CODEC_AD1986A,   "Analog Devices AD1986A" },
 617         { HDA_CODEC_AD1988,    "Analog Devices AD1988" },
 618         { HDA_CODEC_AD1988B,   "Analog Devices AD1988B" },
 619         { HDA_CODEC_CMI9880,   "CMedia CMI9880" },
 620         { HDA_CODEC_STAC9221,  "Sigmatel STAC9221" },
 621         { HDA_CODEC_STAC9221D, "Sigmatel STAC9221D" },
 622         { HDA_CODEC_STAC9220,  "Sigmatel STAC9220" },
 623         { HDA_CODEC_STAC922XD, "Sigmatel STAC9220D/9223D" },
 624         { HDA_CODEC_STAC9227,  "Sigmatel STAC9227" },
 625         { HDA_CODEC_STAC9271D, "Sigmatel STAC9271D" },
 626         { HDA_CODEC_CXVENICE,  "Conexant Venice" },
 627         { HDA_CODEC_CXWAIKIKI, "Conexant Waikiki" },
 628         { HDA_CODEC_VT1708_8,  "VIA VT1708_8" },
 629         { HDA_CODEC_VT1708_9,  "VIA VT1708_9" },
 630         { HDA_CODEC_VT1708_A,  "VIA VT1708_A" },
 631         { HDA_CODEC_VT1708_B,  "VIA VT1708_B" },
 632         { HDA_CODEC_VT1709_0,  "VIA VT1709_0" },
 633         { HDA_CODEC_VT1709_1,  "VIA VT1709_1" },
 634         { HDA_CODEC_VT1709_2,  "VIA VT1709_2" },
 635         { HDA_CODEC_VT1709_3,  "VIA VT1709_3" },
 636         { HDA_CODEC_VT1709_4,  "VIA VT1709_4" },
 637         { HDA_CODEC_VT1709_5,  "VIA VT1709_5" },
 638         { HDA_CODEC_VT1709_6,  "VIA VT1709_6" },
 639         { HDA_CODEC_VT1709_7,  "VIA VT1709_7" },
 640         /* Unknown codec */
 641         { HDA_CODEC_ALCXXXX,   "Realtek (Unknown)" },
 642         { HDA_CODEC_ADXXXX,    "Analog Devices (Unknown)" },
 643         { HDA_CODEC_CMIXXXX,   "CMedia (Unknown)" },
 644         { HDA_CODEC_STACXXXX,  "Sigmatel (Unknown)" },
 645         { HDA_CODEC_CXXXXX,    "Conexant (Unknown)" },
 646         { HDA_CODEC_VTXXXX,    "VIA (Unknown)" },
 647 };
 648 #define HDAC_CODECS_LEN NELEM(hdac_codecs)
 649
 650 enum {
 651         HDAC_HP_SWITCH_CTL,
 652         HDAC_HP_SWITCH_CTRL,
 653         HDAC_HP_SWITCH_DEBUG
 654 };
 655
 656 static const struct {
 657         uint32_t model;
 658         uint32_t id;
 659         int type;
 660         int inverted;
 661         int polling;
 662         int execsense;
 663         nid_t hpnid;
 664         nid_t spkrnid[8];
 665         nid_t eapdnid;
 666 } hdac_hp_switch[] = {
 667         /* Specific OEM models */
 668         { HP_V3000_SUBVENDOR, HDA_CODEC_CXVENICE, HDAC_HP_SWITCH_CTL,
 669             0, 0, -1, 17, { 16, -1 }, 16 },
 670         /* { HP_XW4300_SUBVENDOR, HDA_CODEC_ALC260, HDAC_HP_SWITCH_CTL,
 671             0, 0, -1, 21, { 16, 17, -1 }, -1 } */
 672         /* { HP_3010_SUBVENDOR,  HDA_CODEC_ALC260, HDAC_HP_SWITCH_DEBUG,
 673             0, 1, 0, 16, { 15, 18, 19, 20, 21, -1 }, -1 }, */
 674         { HP_NX7400_SUBVENDOR, HDA_CODEC_AD1981HD, HDAC_HP_SWITCH_CTL,
 675             0, 0, -1, 6, { 5, -1 }, 5 },
 676         { HP_NX6310_SUBVENDOR, HDA_CODEC_AD1981HD, HDAC_HP_SWITCH_CTL,
 677             0, 0, -1, 6, { 5, -1 }, 5 },
 678         { HP_NX6325_SUBVENDOR, HDA_CODEC_AD1981HD, HDAC_HP_SWITCH_CTL,
 679             0, 0, -1, 6, { 5, -1 }, 5 },
 680         /* { HP_DC7700_SUBVENDOR, HDA_CODEC_ALC262, HDAC_HP_SWITCH_CTL,
 681             0, 0, -1, 21, { 22, 27, -1 }, -1 }, */
 682         { TOSHIBA_U200_SUBVENDOR, HDA_CODEC_AD1981HD, HDAC_HP_SWITCH_CTL,
 683             0, 0, -1, 6, { 5, -1 }, -1 },
 684         { TOSHIBA_A135_SUBVENDOR, HDA_CODEC_ALC861VD, HDAC_HP_SWITCH_CTL,
 685             0, 0, -1, 27, { 20, -1 }, -1 },
 686         { DELL_D820_SUBVENDOR, HDA_CODEC_STAC9220, HDAC_HP_SWITCH_CTRL,
 687             0, 0, -1, 13, { 14, -1 }, -1 },
 688         { DELL_I1300_SUBVENDOR, HDA_CODEC_STAC9220, HDAC_HP_SWITCH_CTRL,
 689             0, 0, -1, 13, { 14, -1 }, -1 },
 690         { DELL_OPLX745_SUBVENDOR, HDA_CODEC_AD1983, HDAC_HP_SWITCH_CTL,
 691             0, 0, -1, 6, { 5, 7, -1 }, -1 },
 692         { APPLE_MB3_SUBVENDOR, HDA_CODEC_ALC885, HDAC_HP_SWITCH_CTL,
 693             0, 0, -1, 21, { 20, 22, -1 }, -1 },
 694         { APPLE_INTEL_MAC, HDA_CODEC_STAC9221, HDAC_HP_SWITCH_CTRL,
 695             0, 0, -1, 10, { 13, -1 }, -1 },
 696         { LENOVO_3KN100_SUBVENDOR, HDA_CODEC_AD1986A, HDAC_HP_SWITCH_CTL,
 697             1, 0, -1, 26, { 27, -1 }, -1 },
 698         /* { LENOVO_TCA55_SUBVENDOR, HDA_CODEC_AD1986A, HDAC_HP_SWITCH_CTL,
 699             0, 0, -1, 26, { 27, 28, 29, 30, -1 }, -1 }, */
 700         { LG_LW20_SUBVENDOR, HDA_CODEC_ALC880, HDAC_HP_SWITCH_CTL,
 701             0, 0, -1, 27, { 20, -1 }, -1 },
 702         { ACER_A5050_SUBVENDOR, HDA_CODEC_ALC883, HDAC_HP_SWITCH_CTL,
 703             0, 0, -1, 20, { 21, -1 }, -1 },
 704         { ACER_3681WXM_SUBVENDOR, HDA_CODEC_ALC883, HDAC_HP_SWITCH_CTL,
 705             0, 0, -1, 20, { 21, -1 }, -1 },
 706         { ACER_A4520_SUBVENDOR, HDA_CODEC_ALC268, HDAC_HP_SWITCH_CTL,
 707             0, 0, -1, 20, { 21, -1 }, -1 },
 708         { UNIWILL_9080_SUBVENDOR, HDA_CODEC_ALC883, HDAC_HP_SWITCH_CTL,
 709             0, 0, -1, 20, { 21, -1 }, -1 },
 710         { MSI_MS1034_SUBVENDOR, HDA_CODEC_ALC883, HDAC_HP_SWITCH_CTL,
 711             0, 0, -1, 20, { 27, -1 }, -1 },
 712         { MSI_MS034A_SUBVENDOR, HDA_CODEC_ALC883, HDAC_HP_SWITCH_CTL,
 713             0, 0, -1, 20, { 27, -1 }, -1 },
 714         { FS_SI1848_SUBVENDOR, HDA_CODEC_ALC883, HDAC_HP_SWITCH_CTL,
 715             0, 0, -1, 20, { 21, -1 }, -1 },
 716         { FL_S7020D_SUBVENDOR, HDA_CODEC_ALC260, HDAC_HP_SWITCH_CTL,
 717             0, 0, -1, 20, { 16, -1 }, -1 },
 718         /*
 719          * All models that at least come from the same vendor with
 720          * simmilar codec.
 721          */
 722         { HP_ALL_SUBVENDOR, HDA_CODEC_CXVENICE, HDAC_HP_SWITCH_CTL,
 723             0, 0, -1, 17, { 16, -1 }, 16 },
 724         { HP_ALL_SUBVENDOR, HDA_CODEC_AD1981HD, HDAC_HP_SWITCH_CTL,
 725             0, 0, -1, 6, { 5, -1 }, 5 },
 726         { TOSHIBA_ALL_SUBVENDOR, HDA_CODEC_AD1981HD, HDAC_HP_SWITCH_CTL,
 727             0, 0, -1, 6, { 5, -1 }, -1 },
 728         { DELL_ALL_SUBVENDOR, HDA_CODEC_STAC9220, HDAC_HP_SWITCH_CTRL,
 729             0, 0, -1, 13, { 14, -1 }, -1 },
 730 #if 0
 731         { LENOVO_ALL_SUBVENDOR, HDA_CODEC_AD1986A, HDAC_HP_SWITCH_CTL,
 732             1, 0, -1, 26, { 27, -1 }, -1 },
 733         { ACER_ALL_SUBVENDOR, HDA_CODEC_ALC883, HDAC_HP_SWITCH_CTL,
 734             0, 0, -1, 20, { 21, -1 }, -1 },
 735 #endif
 736 };
 737 #define HDAC_HP_SWITCH_LEN NELEM(hdac_hp_switch)
 738
 739 static const struct {
 740         uint32_t model;
 741         uint32_t id;
 742         nid_t eapdnid;
 743         int hp_switch;
 744 } hdac_eapd_switch[] = {
 745         { HP_V3000_SUBVENDOR, HDA_CODEC_CXVENICE, 16, 1 },
 746         { HP_NX7400_SUBVENDOR, HDA_CODEC_AD1981HD, 5, 1 },
 747         { HP_NX6310_SUBVENDOR, HDA_CODEC_AD1981HD, 5, 1 },
 748 };
 749 #define HDAC_EAPD_SWITCH_LEN NELEM(hdac_eapd_switch)
 750
 751 /****************************************************************************
 752  * Function prototypes
 753  ****************************************************************************/
 754 static void     hdac_intr_handler(void *);
 755 static int      hdac_reset(struct hdac_softc *);
 756 static int      hdac_get_capabilities(struct hdac_softc *);
 757 static void     hdac_dma_cb(void *, bus_dma_segment_t *, int, int);
 758 static int      hdac_dma_alloc(struct hdac_softc *,
 759                                         struct hdac_dma *, bus_size_t);
 760 static void     hdac_dma_free(struct hdac_softc *, struct hdac_dma *);
 761 static int      hdac_mem_alloc(struct hdac_softc *);
 762 static void     hdac_mem_free(struct hdac_softc *);
 763 static int      hdac_irq_alloc(struct hdac_softc *);
 764 static void     hdac_irq_free(struct hdac_softc *);
 765 static void     hdac_corb_init(struct hdac_softc *);
 766 static void     hdac_rirb_init(struct hdac_softc *);
 767 static void     hdac_corb_start(struct hdac_softc *);
 768 static void     hdac_rirb_start(struct hdac_softc *);
 769 static void     hdac_scan_codecs(struct hdac_softc *, int);
 770 static int      hdac_probe_codec(struct hdac_codec *);
 771 static struct   hdac_devinfo *hdac_probe_function(struct hdac_codec *, nid_t);
 772 static void     hdac_add_child(struct hdac_softc *, struct hdac_devinfo *);
 773
 774 static void     hdac_attach2(void *);
 775
 776 static uint32_t hdac_command_sendone_internal(struct hdac_softc *,
 777                                                         uint32_t, int);
 778 static void     hdac_command_send_internal(struct hdac_softc *,
 779                                         struct hdac_command_list *, int);
 780
 781 static int      hdac_probe(device_t);
 782 static int      hdac_attach(device_t);
 783 static int      hdac_detach(device_t);
 784 static void     hdac_widget_connection_select(struct hdac_widget *, uint8_t);
 785 static void     hdac_audio_ctl_amp_set(struct hdac_audio_ctl *,
 786                                                 uint32_t, int, int);
 787 static struct   hdac_audio_ctl *hdac_audio_ctl_amp_get(struct hdac_devinfo *,
 788                                                         nid_t, int, int);
 789 static void     hdac_audio_ctl_amp_set_internal(struct hdac_softc *,
 790                                 nid_t, nid_t, int, int, int, int, int, int);
 791 static int      hdac_audio_ctl_ossmixer_getnextdev(struct hdac_devinfo *);
 792 static struct   hdac_widget *hdac_widget_get(struct hdac_devinfo *, nid_t);
 793
 794 static int      hdac_rirb_flush(struct hdac_softc *sc);
 795 static int      hdac_unsolq_flush(struct hdac_softc *sc);
 796
 797 #define hdac_command(a1, a2, a3)        \
 798                 hdac_command_sendone_internal(a1, a2, a3)
 799
 800 #define hdac_codec_id(d)                                                \
 801                 ((uint32_t)((d == NULL) ? 0x00000000 :                  \
 802                 ((((uint32_t)(d)->vendor_id & 0x0000ffff) << 16) |      \
 803                 ((uint32_t)(d)->device_id & 0x0000ffff))))
 804
 805 static char *
 806 hdac_codec_name(struct hdac_devinfo *devinfo)
 807 {
 808         uint32_t id;
 809         int i;
 810
 811         id = hdac_codec_id(devinfo);
 812
 813         for (i = 0; i < HDAC_CODECS_LEN; i++) {
 814                 if (HDA_DEV_MATCH(hdac_codecs[i].id, id))
 815                         return (hdac_codecs[i].name);
 816         }
 817
 818         return ((id == 0x00000000) ? "NULL Codec" : "Unknown Codec");
 819 }
 820
 821 static char *
 822 hdac_audio_ctl_ossmixer_mask2name(uint32_t devmask)
 823 {
 824         static char *ossname[] = SOUND_DEVICE_NAMES;
 825         static char *unknown = "???";
 826         int i;
 827
 828         for (i = SOUND_MIXER_NRDEVICES - 1; i >= 0; i--) {
 829                 if (devmask & (1 << i))
 830                         return (ossname[i]);
 831         }
 832         return (unknown);
 833 }
 834
 835 static void
 836 hdac_audio_ctl_ossmixer_mask2allname(uint32_t mask, char *buf, size_t len)
 837 {
 838         static char *ossname[] = SOUND_DEVICE_NAMES;
 839         int i, first = 1;
 840
 841         bzero(buf, len);
 842         for (i = 0; i < SOUND_MIXER_NRDEVICES; i++) {
 843                 if (mask & (1 << i)) {
 844                         if (first == 0)
 845                                 strlcat(buf, ", ", len);
 846                         strlcat(buf, ossname[i], len);
 847                         first = 0;
 848                 }
 849         }
 850 }
 851
 852 static struct hdac_audio_ctl *
 853 hdac_audio_ctl_each(struct hdac_devinfo *devinfo, int *index)
 854 {
 855         if (devinfo == NULL ||
 856             devinfo->node_type != HDA_PARAM_FCT_GRP_TYPE_NODE_TYPE_AUDIO ||
 857             index == NULL || devinfo->function.audio.ctl == NULL ||
 858             devinfo->function.audio.ctlcnt < 1 ||
 859             *index < 0 || *index >= devinfo->function.audio.ctlcnt)
 860                 return (NULL);
 861         return (&devinfo->function.audio.ctl[(*index)++]);
 862 }
 863
 864 static struct hdac_audio_ctl *
 865 hdac_audio_ctl_amp_get(struct hdac_devinfo *devinfo, nid_t nid,
 866                                                 int index, int cnt)
 867 {
 868         struct hdac_audio_ctl *ctl, *retctl = NULL;
 869         int i, at, atindex, found = 0;
 870
 871         if (devinfo == NULL || devinfo->function.audio.ctl == NULL)
 872                 return (NULL);
 873
 874         at = cnt;
 875         if (at == 0)
 876                 at = 1;
 877         else if (at < 0)
 878                 at = -1;
 879         atindex = index;
 880         if (atindex < 0)
 881                 atindex = -1;
 882
 883         i = 0;
 884         while ((ctl = hdac_audio_ctl_each(devinfo, &i)) != NULL) {
 885                 if (ctl->enable == 0 || ctl->widget == NULL)
 886                         continue;
 887                 if (!(ctl->widget->nid == nid && (atindex == -1 ||
 888                     ctl->index == atindex)))
 889                         continue;
 890                 found++;
 891                 if (found == cnt)
 892                         return (ctl);
 893                 retctl = ctl;
 894         }
 895
 896         return ((at == -1) ? retctl : NULL);
 897 }
 898
 899 static void
 900 hdac_hp_switch_handler(struct hdac_devinfo *devinfo)
 901 {
 902         struct hdac_softc *sc;
 903         struct hdac_widget *w;
 904         struct hdac_audio_ctl *ctl;
 905         uint32_t val, id, res;
 906         int i = 0, j, timeout, forcemute;
 907         nid_t cad;
 908
 909         if (devinfo == NULL || devinfo->codec == NULL ||
 910             devinfo->codec->sc == NULL)
 911                 return;
 912
 913         sc = devinfo->codec->sc;
 914         cad = devinfo->codec->cad;
 915         id = hdac_codec_id(devinfo);
 916         for (i = 0; i < HDAC_HP_SWITCH_LEN; i++) {
 917                 if (HDA_DEV_MATCH(hdac_hp_switch[i].model,
 918                     sc->pci_subvendor) &&
 919                     hdac_hp_switch[i].id == id)
 920                         break;
 921         }
 922
 923         if (i >= HDAC_HP_SWITCH_LEN)
 924                 return;
 925
 926         forcemute = 0;
 927         if (hdac_hp_switch[i].eapdnid != -1) {
 928                 w = hdac_widget_get(devinfo, hdac_hp_switch[i].eapdnid);
 929                 if (w != NULL && w->param.eapdbtl != HDAC_INVALID)
 930                         forcemute = (w->param.eapdbtl &
 931                             HDA_CMD_SET_EAPD_BTL_ENABLE_EAPD) ? 0 : 1;
 932         }
 933
 934         if (hdac_hp_switch[i].execsense != -1)
 935                 hdac_command(sc,
 936                     HDA_CMD_SET_PIN_SENSE(cad, hdac_hp_switch[i].hpnid,
 937                     hdac_hp_switch[i].execsense), cad);
 938
 939         timeout = 10000;
 940         do {
 941                 res = hdac_command(sc,
 942                     HDA_CMD_GET_PIN_SENSE(cad, hdac_hp_switch[i].hpnid),
 943                     cad);
 944                 if (hdac_hp_switch[i].execsense == -1 || res != 0x7fffffff)
 945                         break;
 946                 DELAY(10);
 947         } while (--timeout != 0);
 948
 949         HDA_BOOTVERBOSE(
 950                 device_printf(sc->dev,
 951                     "HDA_DEBUG: Pin sense: nid=%d timeout=%d res=0x%08x\n",
 952                     hdac_hp_switch[i].hpnid, timeout, res);
 953         );
 954
 955         res = HDA_CMD_GET_PIN_SENSE_PRESENCE_DETECT(res);
 956         res ^= hdac_hp_switch[i].inverted;
 957
 958         switch (hdac_hp_switch[i].type) {
 959         case HDAC_HP_SWITCH_CTL:
 960                 ctl = hdac_audio_ctl_amp_get(devinfo,
 961                     hdac_hp_switch[i].hpnid, 0, 1);
 962                 if (ctl != NULL) {
 963                         val = (res != 0 && forcemute == 0) ?
 964                             HDA_AMP_MUTE_NONE : HDA_AMP_MUTE_ALL;
 965                         if (val != ctl->muted) {
 966                                 ctl->muted = val;
 967                                 hdac_audio_ctl_amp_set(ctl,
 968                                     HDA_AMP_MUTE_DEFAULT, ctl->left,
 969                                     ctl->right);
 970                         }
 971                 }
 972                 for (j = 0; hdac_hp_switch[i].spkrnid[j] != -1; j++) {
 973                         ctl = hdac_audio_ctl_amp_get(devinfo,
 974                             hdac_hp_switch[i].spkrnid[j], 0, 1);
 975                         if (ctl == NULL)
 976                                 continue;
 977                         val = (res != 0 || forcemute == 1) ?
 978                             HDA_AMP_MUTE_ALL : HDA_AMP_MUTE_NONE;
 979                         if (val == ctl->muted)
 980                                 continue;
 981                         ctl->muted = val;
 982                         hdac_audio_ctl_amp_set(ctl, HDA_AMP_MUTE_DEFAULT,
 983                             ctl->left, ctl->right);
 984                 }
 985                 break;
 986         case HDAC_HP_SWITCH_CTRL:
 987                 if (res != 0) {
 988                         /* HP in */
 989                         w = hdac_widget_get(devinfo, hdac_hp_switch[i].hpnid);
 990                         if (w != NULL && w->type ==
 991                             HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX) {
 992                                 if (forcemute == 0)
 993                                         val = w->wclass.pin.ctrl |
 994                                             HDA_CMD_SET_PIN_WIDGET_CTRL_OUT_ENABLE;
 995                                 else
 996                                         val = w->wclass.pin.ctrl &
 997                                             ~HDA_CMD_SET_PIN_WIDGET_CTRL_OUT_ENABLE;
 998                                 if (val != w->wclass.pin.ctrl) {
 999                                         w->wclass.pin.ctrl = val;
1000                                         hdac_command(sc,
1001                                             HDA_CMD_SET_PIN_WIDGET_CTRL(cad,
1002                                             w->nid, w->wclass.pin.ctrl), cad);
1003                                 }
1004                         }
1005                         for (j = 0; hdac_hp_switch[i].spkrnid[j] != -1; j++) {
1006                                 w = hdac_widget_get(devinfo,
1007                                     hdac_hp_switch[i].spkrnid[j]);
1008                                 if (w == NULL || w->type !=
1009                                     HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX)
1010                                         continue;
1011                                 val = w->wclass.pin.ctrl &
1012                                     ~HDA_CMD_SET_PIN_WIDGET_CTRL_OUT_ENABLE;
1013                                 if (val == w->wclass.pin.ctrl)
1014                                         continue;
1015                                 w->wclass.pin.ctrl = val;
1016                                 hdac_command(sc, HDA_CMD_SET_PIN_WIDGET_CTRL(
1017                                     cad, w->nid, w->wclass.pin.ctrl), cad);
1018                         }
1019                 } else {
1020                         /* HP out */
1021                         w = hdac_widget_get(devinfo, hdac_hp_switch[i].hpnid);
1022                         if (w != NULL && w->type ==
1023                             HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX) {
1024                                 val = w->wclass.pin.ctrl &
1025                                     ~HDA_CMD_SET_PIN_WIDGET_CTRL_OUT_ENABLE;
1026                                 if (val != w->wclass.pin.ctrl) {
1027                                         w->wclass.pin.ctrl = val;
1028                                         hdac_command(sc,
1029                                             HDA_CMD_SET_PIN_WIDGET_CTRL(cad,
1030                                             w->nid, w->wclass.pin.ctrl), cad);
1031                                 }
1032                         }
1033                         for (j = 0; hdac_hp_switch[i].spkrnid[j] != -1; j++) {
1034                                 w = hdac_widget_get(devinfo,
1035                                     hdac_hp_switch[i].spkrnid[j]);
1036                                 if (w == NULL || w->type !=
1037                                     HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX)
1038                                         continue;
1039                                 if (forcemute == 0)
1040                                         val = w->wclass.pin.ctrl |
1041                                             HDA_CMD_SET_PIN_WIDGET_CTRL_OUT_ENABLE;
1042                                 else
1043                                         val = w->wclass.pin.ctrl &
1044                                             ~HDA_CMD_SET_PIN_WIDGET_CTRL_OUT_ENABLE;
1045                                 if (val == w->wclass.pin.ctrl)
1046                                         continue;
1047                                 w->wclass.pin.ctrl = val;
1048                                 hdac_command(sc, HDA_CMD_SET_PIN_WIDGET_CTRL(
1049                                     cad, w->nid, w->wclass.pin.ctrl), cad);
1050                         }
1051                 }
1052                 break;
1053         case HDAC_HP_SWITCH_DEBUG:
1054                 if (hdac_hp_switch[i].execsense != -1)
1055                         hdac_command(sc,
1056                             HDA_CMD_SET_PIN_SENSE(cad, hdac_hp_switch[i].hpnid,
1057                             hdac_hp_switch[i].execsense), cad);
1058                 res = hdac_command(sc,
1059                     HDA_CMD_GET_PIN_SENSE(cad, hdac_hp_switch[i].hpnid), cad);
1060                 device_printf(sc->dev,
1061                     "[ 0] HDA_DEBUG: Pin sense: nid=%d res=0x%08x\n",
1062                     hdac_hp_switch[i].hpnid, res);
1063                 for (j = 0; hdac_hp_switch[i].spkrnid[j] != -1; j++) {
1064                         w = hdac_widget_get(devinfo,
1065                             hdac_hp_switch[i].spkrnid[j]);
1066                         if (w == NULL || w->type !=
1067                             HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX)
1068                                 continue;
1069                         if (hdac_hp_switch[i].execsense != -1)
1070                                 hdac_command(sc,
1071                                     HDA_CMD_SET_PIN_SENSE(cad, w->nid,
1072                                     hdac_hp_switch[i].execsense), cad);
1073                         res = hdac_command(sc,
1074                             HDA_CMD_GET_PIN_SENSE(cad, w->nid), cad);
1075                         device_printf(sc->dev,
1076                             "[%2d] HDA_DEBUG: Pin sense: nid=%d res=0x%08x\n",
1077                             j + 1, w->nid, res);
1078                 }
1079                 break;
1080         default:
1081                 break;
1082         }
1083 }
1084
1085 static void
1086 hdac_unsolicited_handler(struct hdac_codec *codec, uint32_t tag)
1087 {
1088         struct hdac_softc *sc;
1089         struct hdac_devinfo *devinfo = NULL;
1090         device_t *devlist = NULL;
1091         int devcount, i;
1092
1093         if (codec == NULL || codec->sc == NULL)
1094                 return;
1095
1096         sc = codec->sc;
1097
1098         HDA_BOOTVERBOSE(
1099                 device_printf(sc->dev, "HDA_DEBUG: Unsol Tag: 0x%08x\n", tag);
1100         );
1101
1102         device_get_children(sc->dev, &devlist, &devcount);
1103         for (i = 0; devlist != NULL && i < devcount; i++) {
1104                 devinfo = (struct hdac_devinfo *)device_get_ivars(devlist[i]);
1105                 if (devinfo != NULL && devinfo->node_type ==
1106                     HDA_PARAM_FCT_GRP_TYPE_NODE_TYPE_AUDIO &&
1107                     devinfo->codec != NULL &&
1108                     devinfo->codec->cad == codec->cad) {
1109                         break;
1110                 } else
1111                         devinfo = NULL;
1112         }
1113         if (devlist != NULL)
1114                 kfree(devlist, M_TEMP);
1115
1116         if (devinfo == NULL)
1117                 return;
1118
1119         switch (tag) {
1120         case HDAC_UNSOLTAG_EVENT_HP:
1121                 hdac_hp_switch_handler(devinfo);
1122                 break;
1123         case HDAC_UNSOLTAG_EVENT_TEST:
1124                 device_printf(sc->dev, "Unsol Test!\n");
1125                 break;
1126         default:
1127                 break;
1128         }
1129 }
1130
1131 static int
1132 hdac_stream_intr(struct hdac_softc *sc, struct hdac_chan *ch)
1133 {
1134         /* XXX to be removed */
1135 #ifdef HDAC_INTR_EXTRA
1136         uint32_t res;
1137 #endif
1138
1139         if (!(ch->flags & HDAC_CHN_RUNNING))
1140                 return (0);
1141
1142         /* XXX to be removed */
1143 #ifdef HDAC_INTR_EXTRA
1144         res = HDAC_READ_1(&sc->mem, ch->off + HDAC_SDSTS);
1145 #endif
1146
1147         /* XXX to be removed */
1148 #ifdef HDAC_INTR_EXTRA
1149         HDA_BOOTVERBOSE(
1150                 if (res & (HDAC_SDSTS_DESE | HDAC_SDSTS_FIFOE))
1151                         device_printf(sc->dev,
1152                             "PCMDIR_%s intr triggered beyond stream boundary:"
1153                             "%08x\n",
1154                             (ch->dir == PCMDIR_PLAY) ? "PLAY" : "REC", res);
1155         );
1156 #endif
1157
1158         HDAC_WRITE_1(&sc->mem, ch->off + HDAC_SDSTS,
1159             HDAC_SDSTS_DESE | HDAC_SDSTS_FIFOE | HDAC_SDSTS_BCIS );
1160
1161         /* XXX to be removed */
1162 #ifdef HDAC_INTR_EXTRA
1163         if (res & HDAC_SDSTS_BCIS) {
1164 #endif
1165                 return (1);
1166         /* XXX to be removed */
1167 #ifdef HDAC_INTR_EXTRA
1168         }
1169 #endif
1170
1171         return (0);
1172 }
1173
1174 /****************************************************************************
1175  * void hdac_intr_handler(void *)
1176  *
1177  * Interrupt handler. Processes interrupts received from the hdac.
1178  ****************************************************************************/
1179 static void
1180 hdac_intr_handler(void *context)
1181 {
1182         struct hdac_softc *sc;
1183         uint32_t intsts;
1184         uint8_t rirbsts;
1185         uint32_t trigger;
1186
1187         sc = (struct hdac_softc *)context;
1188
1189         hdac_lock(sc);
1190         if (sc->polling != 0) {
1191                 hdac_unlock(sc);
1192                 return;
1193         }
1194
1195         /* Do we have anything to do? */
1196         intsts = HDAC_READ_4(&sc->mem, HDAC_INTSTS);
1197         if (!HDA_FLAG_MATCH(intsts, HDAC_INTSTS_GIS)) {
1198                 hdac_unlock(sc);
1199                 return;
1200         }
1201
1202         trigger = 0;
1203
1204         /* Was this a controller interrupt? */
1205         if (HDA_FLAG_MATCH(intsts, HDAC_INTSTS_CIS)) {
1206                 rirbsts = HDAC_READ_1(&sc->mem, HDAC_RIRBSTS);
1207                 /* Get as many responses that we can */
1208                 while (HDA_FLAG_MATCH(rirbsts, HDAC_RIRBSTS_RINTFL)) {
1209                         HDAC_WRITE_1(&sc->mem,
1210                             HDAC_RIRBSTS, HDAC_RIRBSTS_RINTFL);
1211                         if (hdac_rirb_flush(sc) != 0)
1212                                 trigger |= HDAC_TRIGGER_UNSOL;
1213                         rirbsts = HDAC_READ_1(&sc->mem, HDAC_RIRBSTS);
1214                 }
1215                 /* XXX to be removed */
1216                 /* Clear interrupt and exit */
1217 #ifdef HDAC_INTR_EXTRA
1218                 HDAC_WRITE_4(&sc->mem, HDAC_INTSTS, HDAC_INTSTS_CIS);
1219 #endif
1220         }
1221
1222         if (intsts & HDAC_INTSTS_SIS_MASK) {
1223                 if ((intsts & (1 << sc->num_iss)) &&
1224                     hdac_stream_intr(sc, &sc->play) != 0)
1225                         trigger |= HDAC_TRIGGER_PLAY;
1226                 if ((intsts & (1 << 0)) &&
1227                     hdac_stream_intr(sc, &sc->rec) != 0)
1228                         trigger |= HDAC_TRIGGER_REC;
1229                 /* XXX to be removed */
1230 #ifdef HDAC_INTR_EXTRA
1231                 HDAC_WRITE_4(&sc->mem, HDAC_INTSTS, intsts &
1232                     HDAC_INTSTS_SIS_MASK);
1233 #endif
1234         }
1235
1236         hdac_unlock(sc);
1237
1238         if (trigger & HDAC_TRIGGER_PLAY)
1239                 chn_intr(sc->play.c);
1240         if (trigger & HDAC_TRIGGER_REC)
1241                 chn_intr(sc->rec.c);
1242         if (trigger & HDAC_TRIGGER_UNSOL)
1243                 taskqueue_enqueue(taskqueue_swi, &sc->unsolq_task);
1244 }
1245
1246 /****************************************************************************
1247  * int hdac_reset(hdac_softc *)
1248  *
1249  * Reset the hdac to a quiescent and known state.
1250  ****************************************************************************/
1251 static int
1252 hdac_reset(struct hdac_softc *sc)
1253 {
1254         uint32_t gctl;
1255         int count, i;
1256
1257         /*
1258          * Stop all Streams DMA engine
1259          */
1260         for (i = 0; i < sc->num_iss; i++)
1261                 HDAC_WRITE_4(&sc->mem, HDAC_ISDCTL(sc, i), 0x0);
1262         for (i = 0; i < sc->num_oss; i++)
1263                 HDAC_WRITE_4(&sc->mem, HDAC_OSDCTL(sc, i), 0x0);
1264         for (i = 0; i < sc->num_bss; i++)
1265                 HDAC_WRITE_4(&sc->mem, HDAC_BSDCTL(sc, i), 0x0);
1266
1267         /*
1268          * Stop Control DMA engines.
1269          */
1270         HDAC_WRITE_1(&sc->mem, HDAC_CORBCTL, 0x0);
1271         HDAC_WRITE_1(&sc->mem, HDAC_RIRBCTL, 0x0);
1272
1273         /*
1274          * Reset DMA position buffer.
1275          */
1276         HDAC_WRITE_4(&sc->mem, HDAC_DPIBLBASE, 0x0);
1277         HDAC_WRITE_4(&sc->mem, HDAC_DPIBUBASE, 0x0);
1278
1279         /*
1280          * Reset the controller. The reset must remain asserted for
1281          * a minimum of 100us.
1282          */
1283         gctl = HDAC_READ_4(&sc->mem, HDAC_GCTL);
1284         HDAC_WRITE_4(&sc->mem, HDAC_GCTL, gctl & ~HDAC_GCTL_CRST);
1285         count = 10000;
1286         do {
1287                 gctl = HDAC_READ_4(&sc->mem, HDAC_GCTL);
1288                 if (!(gctl & HDAC_GCTL_CRST))
1289                         break;
1290                 DELAY(10);
1291         } while (--count);
1292         if (gctl & HDAC_GCTL_CRST) {
1293                 device_printf(sc->dev, "Unable to put hdac in reset\n");
1294                 return (ENXIO);
1295         }
1296         DELAY(100);
1297         gctl = HDAC_READ_4(&sc->mem, HDAC_GCTL);
1298         HDAC_WRITE_4(&sc->mem, HDAC_GCTL, gctl | HDAC_GCTL_CRST);
1299         count = 10000;
1300         do {
1301                 gctl = HDAC_READ_4(&sc->mem, HDAC_GCTL);
1302                 if (gctl & HDAC_GCTL_CRST)
1303                         break;
1304                 DELAY(10);
1305         } while (--count);
1306         if (!(gctl & HDAC_GCTL_CRST)) {
1307                 device_printf(sc->dev, "Device stuck in reset\n");
1308                 return (ENXIO);
1309         }
1310
1311         /*
1312          * Wait for codecs to finish their own reset sequence. The delay here
1313          * should be of 250us but for some reasons, on it's not enough on my
1314          * computer. Let's use twice as much as necessary to make sure that
1315          * it's reset properly.
1316          */
1317         DELAY(1000);
1318
1319         return (0);
1320 }
1321
1322
1323 /****************************************************************************
1324  * int hdac_get_capabilities(struct hdac_softc *);
1325  *
1326  * Retreive the general capabilities of the hdac;
1327  *      Number of Input Streams
1328  *      Number of Output Streams
1329  *      Number of bidirectional Streams
1330  *      64bit ready
1331  *      CORB and RIRB sizes
1332  ****************************************************************************/
1333 static int
1334 hdac_get_capabilities(struct hdac_softc *sc)
1335 {
1336         uint16_t gcap;
1337         uint8_t corbsize, rirbsize;
1338
1339         gcap = HDAC_READ_2(&sc->mem, HDAC_GCAP);
1340         sc->num_iss = HDAC_GCAP_ISS(gcap);
1341         sc->num_oss = HDAC_GCAP_OSS(gcap);
1342         sc->num_bss = HDAC_GCAP_BSS(gcap);
1343
1344         sc->support_64bit = HDA_FLAG_MATCH(gcap, HDAC_GCAP_64OK);
1345
1346         corbsize = HDAC_READ_1(&sc->mem, HDAC_CORBSIZE);
1347         if ((corbsize & HDAC_CORBSIZE_CORBSZCAP_256) ==
1348             HDAC_CORBSIZE_CORBSZCAP_256)
1349                 sc->corb_size = 256;
1350         else if ((corbsize & HDAC_CORBSIZE_CORBSZCAP_16) ==
1351             HDAC_CORBSIZE_CORBSZCAP_16)
1352                 sc->corb_size = 16;
1353         else if ((corbsize & HDAC_CORBSIZE_CORBSZCAP_2) ==
1354             HDAC_CORBSIZE_CORBSZCAP_2)
1355                 sc->corb_size = 2;
1356         else {
1357                 device_printf(sc->dev, "%s: Invalid corb size (%x)\n",
1358                     __func__, corbsize);
1359                 return (ENXIO);
1360         }
1361
1362         rirbsize = HDAC_READ_1(&sc->mem, HDAC_RIRBSIZE);
1363         if ((rirbsize & HDAC_RIRBSIZE_RIRBSZCAP_256) ==
1364             HDAC_RIRBSIZE_RIRBSZCAP_256)
1365                 sc->rirb_size = 256;
1366         else if ((rirbsize & HDAC_RIRBSIZE_RIRBSZCAP_16) ==
1367             HDAC_RIRBSIZE_RIRBSZCAP_16)
1368                 sc->rirb_size = 16;
1369         else if ((rirbsize & HDAC_RIRBSIZE_RIRBSZCAP_2) ==
1370             HDAC_RIRBSIZE_RIRBSZCAP_2)
1371                 sc->rirb_size = 2;
1372         else {
1373                 device_printf(sc->dev, "%s: Invalid rirb size (%x)\n",
1374                     __func__, rirbsize);
1375                 return (ENXIO);
1376         }
1377
1378         return (0);
1379 }
1380
1381
1382 /****************************************************************************
1383  * void hdac_dma_cb
1384  *
1385  * This function is called by bus_dmamap_load when the mapping has been
1386  * established. We just record the physical address of the mapping into
1387  * the struct hdac_dma passed in.
1388  ****************************************************************************/
1389 static void
1390 hdac_dma_cb(void *callback_arg, bus_dma_segment_t *segs, int nseg, int error)
1391 {
1392         struct hdac_dma *dma;
1393
1394         if (error == 0) {
1395                 dma = (struct hdac_dma *)callback_arg;
1396                 dma->dma_paddr = segs[0].ds_addr;
1397         }
1398 }
1399
1400
1401 /****************************************************************************
1402  * int hdac_dma_alloc
1403  *
1404  * This function allocate and setup a dma region (struct hdac_dma).
1405  * It must be freed by a corresponding hdac_dma_free.
1406  ****************************************************************************/
1407 static int
1408 hdac_dma_alloc(struct hdac_softc *sc, struct hdac_dma *dma, bus_size_t size)
1409 {
1410         bus_size_t roundsz;
1411         int result;
1412         bus_addr_t lowaddr;
1413
1414         roundsz = roundup2(size, HDAC_DMA_ALIGNMENT);
1415         lowaddr = (sc->support_64bit) ? BUS_SPACE_MAXADDR :
1416             BUS_SPACE_MAXADDR_32BIT;
1417         bzero(dma, sizeof(*dma));
1418
1419         /*
1420          * Create a DMA tag
1421          */
1422         result = bus_dma_tag_create(NULL,       /* parent */
1423             HDAC_DMA_ALIGNMENT,                 /* alignment */
1424             0,                                  /* boundary */
1425             lowaddr,                            /* lowaddr */
1426             BUS_SPACE_MAXADDR,                  /* highaddr */
1427             NULL,                               /* filtfunc */
1428             NULL,                               /* fistfuncarg */
1429             roundsz,                            /* maxsize */
1430             1,                                  /* nsegments */
1431             roundsz,                            /* maxsegsz */
1432             0,                                  /* flags */
1433             &dma->dma_tag);                     /* dmat */
1434         if (result != 0) {
1435                 device_printf(sc->dev, "%s: bus_dma_tag_create failed (%x)\n",
1436                     __func__, result);
1437                 goto hdac_dma_alloc_fail;
1438         }
1439
1440         /*
1441          * Allocate DMA memory
1442          */
1443 #if 0 /* TODO: No uncacheable DMA support in DragonFly. */
1444         result = bus_dmamem_alloc(dma->dma_tag, (void **)&dma->dma_vaddr,
1445             BUS_DMA_NOWAIT | BUS_DMA_ZERO |
1446             ((sc->flags & HDAC_F_DMA_NOCACHE) ? BUS_DMA_NOCACHE : 0),
1447             &dma->dma_map);
1448 #else
1449         result = bus_dmamem_alloc(dma->dma_tag, (void **)&dma->dma_vaddr,
1450             BUS_DMA_NOWAIT | BUS_DMA_ZERO, &dma->dma_map);
1451 #endif
1452         if (result != 0) {
1453                 device_printf(sc->dev, "%s: bus_dmamem_alloc failed (%x)\n",
1454                     __func__, result);
1455                 goto hdac_dma_alloc_fail;
1456         }
1457
1458         dma->dma_size = roundsz;
1459
1460         /*
1461          * Map the memory
1462          */
1463         result = bus_dmamap_load(dma->dma_tag, dma->dma_map,
1464             (void *)dma->dma_vaddr, roundsz, hdac_dma_cb, (void *)dma, 0);
1465         if (result != 0 || dma->dma_paddr == 0) {
1466                 if (result == 0)
1467                         result = ENOMEM;
1468                 device_printf(sc->dev, "%s: bus_dmamem_load failed (%x)\n",
1469                     __func__, result);
1470                 goto hdac_dma_alloc_fail;
1471         }
1472
1473         HDA_BOOTVERBOSE(
1474                 device_printf(sc->dev, "%s: size=%ju -> roundsz=%ju\n",
1475                     __func__, (uintmax_t)size, (uintmax_t)roundsz);
1476         );
1477
1478         return (0);
1479
1480 hdac_dma_alloc_fail:
1481         hdac_dma_free(sc, dma);
1482
1483         return (result);
1484 }
1485
1486
1487 /****************************************************************************
1488  * void hdac_dma_free(struct hdac_softc *, struct hdac_dma *)
1489  *
1490  * Free a struct dhac_dma that has been previously allocated via the
1491  * hdac_dma_alloc function.
1492  ****************************************************************************/
1493 static void
1494 hdac_dma_free(struct hdac_softc *sc, struct hdac_dma *dma)
1495 {
1496         if (dma->dma_map != NULL) {
1497 #if 0
1498                 /* Flush caches */
1499                 bus_dmamap_sync(dma->dma_tag, dma->dma_map,
1500                     BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
1501 #endif
1502                 bus_dmamap_unload(dma->dma_tag, dma->dma_map);
1503         }
1504         if (dma->dma_vaddr != NULL) {
1505                 bus_dmamem_free(dma->dma_tag, dma->dma_vaddr, dma->dma_map);
1506                 dma->dma_vaddr = NULL;
1507         }
1508         dma->dma_map = NULL;
1509         if (dma->dma_tag != NULL) {
1510                 bus_dma_tag_destroy(dma->dma_tag);
1511                 dma->dma_tag = NULL;
1512         }
1513         dma->dma_size = 0;
1514 }
1515
1516 /****************************************************************************
1517  * int hdac_mem_alloc(struct hdac_softc *)
1518  *
1519  * Allocate all the bus resources necessary to speak with the physical
1520  * controller.
1521  ****************************************************************************/
1522 static int
1523 hdac_mem_alloc(struct hdac_softc *sc)
1524 {
1525         struct hdac_mem *mem;
1526
1527         mem = &sc->mem;
1528         mem->mem_rid = PCIR_BAR(0);
1529         mem->mem_res = bus_alloc_resource_any(sc->dev, SYS_RES_MEMORY,
1530             &mem->mem_rid, RF_ACTIVE);
1531         if (mem->mem_res == NULL) {
1532                 device_printf(sc->dev,
1533                     "%s: Unable to allocate memory resource\n", __func__);
1534                 return (ENOMEM);
1535         }
1536         mem->mem_tag = rman_get_bustag(mem->mem_res);
1537         mem->mem_handle = rman_get_bushandle(mem->mem_res);
1538
1539         return (0);
1540 }
1541
1542 /****************************************************************************
1543  * void hdac_mem_free(struct hdac_softc *)
1544  *
1545  * Free up resources previously allocated by hdac_mem_alloc.
1546  ****************************************************************************/
1547 static void
1548 hdac_mem_free(struct hdac_softc *sc)
1549 {
1550         struct hdac_mem *mem;
1551
1552         mem = &sc->mem;
1553         if (mem->mem_res != NULL)
1554                 bus_release_resource(sc->dev, SYS_RES_MEMORY, mem->mem_rid,
1555                     mem->mem_res);
1556         mem->mem_res = NULL;
1557 }
1558
1559 /****************************************************************************
1560  * int hdac_irq_alloc(struct hdac_softc *)
1561  *
1562  * Allocate and setup the resources necessary for interrupt handling.
1563  ****************************************************************************/
1564 static int
1565 hdac_irq_alloc(struct hdac_softc *sc)
1566 {
1567         struct hdac_irq *irq;
1568         int result;
1569         u_int irq_flags;
1570
1571         irq = &sc->irq;
1572         irq->irq_rid = 0x0;
1573         irq->irq_type = pci_alloc_1intr(sc->dev, hdac_msi_enable,
1574             &irq->irq_rid, &irq_flags);
1575         irq->irq_res = bus_alloc_resource_any(sc->dev, SYS_RES_IRQ,
1576             &irq->irq_rid, irq_flags);
1577         if (irq->irq_res == NULL) {
1578                 device_printf(sc->dev, "%s: Unable to allocate irq\n",
1579                     __func__);
1580                 goto hdac_irq_alloc_fail;
1581         }
1582         result = snd_setup_intr(sc->dev, irq->irq_res, INTR_MPSAFE,
1583             hdac_intr_handler, sc, &irq->irq_handle);
1584         if (result != 0) {
1585                 device_printf(sc->dev,
1586                     "%s: Unable to setup interrupt handler (%x)\n",
1587                     __func__, result);
1588                 goto hdac_irq_alloc_fail;
1589         }
1590
1591         return (0);
1592
1593 hdac_irq_alloc_fail:
1594         hdac_irq_free(sc);
1595
1596         return (ENXIO);
1597 }
1598
1599 /****************************************************************************
1600  * void hdac_irq_free(struct hdac_softc *)
1601  *
1602  * Free up resources previously allocated by hdac_irq_alloc.
1603  ****************************************************************************/
1604 static void
1605 hdac_irq_free(struct hdac_softc *sc)
1606 {
1607         struct hdac_irq *irq;
1608
1609         irq = &sc->irq;
1610         if (irq->irq_res != NULL && irq->irq_handle != NULL)
1611                 bus_teardown_intr(sc->dev, irq->irq_res, irq->irq_handle);
1612         if (irq->irq_res != NULL)
1613                 bus_release_resource(sc->dev, SYS_RES_IRQ, irq->irq_rid,
1614                     irq->irq_res);
1615         if (irq->irq_type == PCI_INTR_TYPE_MSI)
1616                 pci_release_msi(sc->dev);
1617         irq->irq_handle = NULL;
1618         irq->irq_res = NULL;
1619         irq->irq_rid = 0x0;
1620 }
1621
1622 /****************************************************************************
1623  * void hdac_corb_init(struct hdac_softc *)
1624  *
1625  * Initialize the corb registers for operations but do not start it up yet.
1626  * The CORB engine must not be running when this function is called.
1627  ****************************************************************************/
1628 static void
1629 hdac_corb_init(struct hdac_softc *sc)
1630 {
1631         uint8_t corbsize;
1632         uint64_t corbpaddr;
1633
1634         /* Setup the CORB size. */
1635         switch (sc->corb_size) {
1636         case 256:
1637                 corbsize = HDAC_CORBSIZE_CORBSIZE(HDAC_CORBSIZE_CORBSIZE_256);
1638                 break;
1639         case 16:
1640                 corbsize = HDAC_CORBSIZE_CORBSIZE(HDAC_CORBSIZE_CORBSIZE_16);
1641                 break;
1642         case 2:
1643                 corbsize = HDAC_CORBSIZE_CORBSIZE(HDAC_CORBSIZE_CORBSIZE_2);
1644                 break;
1645         default:
1646                 panic("%s: Invalid CORB size (%x)", __func__, sc->corb_size);
1647         }
1648         HDAC_WRITE_1(&sc->mem, HDAC_CORBSIZE, corbsize);
1649
1650         /* Setup the CORB Address in the hdac */
1651         corbpaddr = (uint64_t)sc->corb_dma.dma_paddr;
1652         HDAC_WRITE_4(&sc->mem, HDAC_CORBLBASE, (uint32_t)corbpaddr);
1653         HDAC_WRITE_4(&sc->mem, HDAC_CORBUBASE, (uint32_t)(corbpaddr >> 32));
1654
1655         /* Set the WP and RP */
1656         sc->corb_wp = 0;
1657         HDAC_WRITE_2(&sc->mem, HDAC_CORBWP, sc->corb_wp);
1658         HDAC_WRITE_2(&sc->mem, HDAC_CORBRP, HDAC_CORBRP_CORBRPRST);
1659         /*
1660          * The HDA specification indicates that the CORBRPRST bit will always
1661          * read as zero. Unfortunately, it seems that at least the 82801G
1662          * doesn't reset the bit to zero, which stalls the corb engine.
1663          * manually reset the bit to zero before continuing.
1664          */
1665         HDAC_WRITE_2(&sc->mem, HDAC_CORBRP, 0x0);
1666
1667         /* Enable CORB error reporting */
1668 #if 0
1669         HDAC_WRITE_1(&sc->mem, HDAC_CORBCTL, HDAC_CORBCTL_CMEIE);
1670 #endif
1671 }
1672
1673 /****************************************************************************
1674  * void hdac_rirb_init(struct hdac_softc *)
1675  *
1676  * Initialize the rirb registers for operations but do not start it up yet.
1677  * The RIRB engine must not be running when this function is called.
1678  ****************************************************************************/
1679 static void
1680 hdac_rirb_init(struct hdac_softc *sc)
1681 {
1682         uint8_t rirbsize;
1683         uint64_t rirbpaddr;
1684
1685         /* Setup the RIRB size. */
1686         switch (sc->rirb_size) {
1687         case 256:
1688                 rirbsize = HDAC_RIRBSIZE_RIRBSIZE(HDAC_RIRBSIZE_RIRBSIZE_256);
1689                 break;
1690         case 16:
1691                 rirbsize = HDAC_RIRBSIZE_RIRBSIZE(HDAC_RIRBSIZE_RIRBSIZE_16);
1692                 break;
1693         case 2:
1694                 rirbsize = HDAC_RIRBSIZE_RIRBSIZE(HDAC_RIRBSIZE_RIRBSIZE_2);
1695                 break;
1696         default:
1697                 panic("%s: Invalid RIRB size (%x)", __func__, sc->rirb_size);
1698         }
1699         HDAC_WRITE_1(&sc->mem, HDAC_RIRBSIZE, rirbsize);
1700
1701         /* Setup the RIRB Address in the hdac */
1702         rirbpaddr = (uint64_t)sc->rirb_dma.dma_paddr;
1703         HDAC_WRITE_4(&sc->mem, HDAC_RIRBLBASE, (uint32_t)rirbpaddr);
1704         HDAC_WRITE_4(&sc->mem, HDAC_RIRBUBASE, (uint32_t)(rirbpaddr >> 32));
1705
1706         /* Setup the WP and RP */
1707         sc->rirb_rp = 0;
1708         HDAC_WRITE_2(&sc->mem, HDAC_RIRBWP, HDAC_RIRBWP_RIRBWPRST);
1709
1710         if (sc->polling == 0) {
1711                 /* Setup the interrupt threshold */
1712                 HDAC_WRITE_2(&sc->mem, HDAC_RINTCNT, sc->rirb_size / 2);
1713
1714                 /* Enable Overrun and response received reporting */
1715 #if 0
1716                 HDAC_WRITE_1(&sc->mem, HDAC_RIRBCTL,
1717                     HDAC_RIRBCTL_RIRBOIC | HDAC_RIRBCTL_RINTCTL);
1718 #else
1719                 HDAC_WRITE_1(&sc->mem, HDAC_RIRBCTL, HDAC_RIRBCTL_RINTCTL);
1720 #endif
1721         }
1722
1723 #if 0
1724         /*
1725          * Make sure that the Host CPU cache doesn't contain any dirty
1726          * cache lines that falls in the rirb. If I understood correctly, it
1727          * should be sufficient to do this only once as the rirb is purely
1728          * read-only from now on.
1729          */
1730         bus_dmamap_sync(sc->rirb_dma.dma_tag, sc->rirb_dma.dma_map,
1731             BUS_DMASYNC_PREREAD);
1732 #endif
1733 }
1734
1735 /****************************************************************************
1736  * void hdac_corb_start(hdac_softc *)
1737  *
1738  * Startup the corb DMA engine
1739  ****************************************************************************/
1740 static void
1741 hdac_corb_start(struct hdac_softc *sc)
1742 {
1743         uint32_t corbctl;
1744
1745         corbctl = HDAC_READ_1(&sc->mem, HDAC_CORBCTL);
1746         corbctl |= HDAC_CORBCTL_CORBRUN;
1747         HDAC_WRITE_1(&sc->mem, HDAC_CORBCTL, corbctl);
1748 }
1749
1750 /****************************************************************************
1751  * void hdac_rirb_start(hdac_softc *)
1752  *
1753  * Startup the rirb DMA engine
1754  ****************************************************************************/
1755 static void
1756 hdac_rirb_start(struct hdac_softc *sc)
1757 {
1758         uint32_t rirbctl;
1759
1760         rirbctl = HDAC_READ_1(&sc->mem, HDAC_RIRBCTL);
1761         rirbctl |= HDAC_RIRBCTL_RIRBDMAEN;
1762         HDAC_WRITE_1(&sc->mem, HDAC_RIRBCTL, rirbctl);
1763 }
1764
1765
1766 /****************************************************************************
1767  * void hdac_scan_codecs(struct hdac_softc *, int)
1768  *
1769  * Scan the bus for available codecs, starting with num.
1770  ****************************************************************************/
1771 static void
1772 hdac_scan_codecs(struct hdac_softc *sc, int num)
1773 {
1774         struct hdac_codec *codec;
1775         int i;
1776         uint16_t statests;
1777
1778         if (num < 0)
1779                 num = 0;
1780         if (num >= HDAC_CODEC_MAX)
1781                 num = HDAC_CODEC_MAX - 1;
1782
1783         statests = HDAC_READ_2(&sc->mem, HDAC_STATESTS);
1784         for (i = num; i < HDAC_CODEC_MAX; i++) {
1785                 if (HDAC_STATESTS_SDIWAKE(statests, i)) {
1786                         /* We have found a codec. */
1787                         codec = kmalloc(sizeof(*codec), M_HDAC,
1788                                         M_ZERO | M_WAITOK);
1789                         codec->commands = NULL;
1790                         codec->responses_received = 0;
1791                         codec->verbs_sent = 0;
1792                         codec->sc = sc;
1793                         codec->cad = i;
1794                         sc->codecs[i] = codec;
1795                         if (hdac_probe_codec(codec) != 0)
1796                                 break;
1797                 }
1798         }
1799         /* All codecs have been probed, now try to attach drivers to them */
1800         /* bus_generic_attach(sc->dev); */
1801 }
1802
1803 /****************************************************************************
1804  * void hdac_probe_codec(struct hdac_softc *, int)
1805  *
1806  * Probe a the given codec_id for available function groups.
1807  ****************************************************************************/
1808 static int
1809 hdac_probe_codec(struct hdac_codec *codec)
1810 {
1811         struct hdac_softc *sc = codec->sc;
1812         struct hdac_devinfo *devinfo;
1813         uint32_t vendorid, revisionid, subnode;
1814         int startnode;
1815         int endnode;
1816         int i;
1817         nid_t cad = codec->cad;
1818
1819         HDA_BOOTVERBOSE(
1820                 device_printf(sc->dev, "HDA_DEBUG: Probing codec: %d\n", cad);
1821         );
1822         vendorid = hdac_command(sc,
1823             HDA_CMD_GET_PARAMETER(cad, 0x0, HDA_PARAM_VENDOR_ID),
1824             cad);
1825         revisionid = hdac_command(sc,
1826             HDA_CMD_GET_PARAMETER(cad, 0x0, HDA_PARAM_REVISION_ID),
1827             cad);
1828         subnode = hdac_command(sc,
1829             HDA_CMD_GET_PARAMETER(cad, 0x0, HDA_PARAM_SUB_NODE_COUNT),
1830             cad);
1831         startnode = HDA_PARAM_SUB_NODE_COUNT_START(subnode);
1832         endnode = startnode + HDA_PARAM_SUB_NODE_COUNT_TOTAL(subnode);
1833
1834         HDA_BOOTVERBOSE(
1835                 device_printf(sc->dev, "HDA_DEBUG: \tstartnode=%d endnode=%d\n",
1836                     startnode, endnode);
1837         );
1838         for (i = startnode; i < endnode; i++) {
1839                 devinfo = hdac_probe_function(codec, i);
1840                 if (devinfo != NULL) {
1841                         /* XXX Ignore other FG. */
1842                         devinfo->vendor_id =
1843                             HDA_PARAM_VENDOR_ID_VENDOR_ID(vendorid);
1844                         devinfo->device_id =
1845                             HDA_PARAM_VENDOR_ID_DEVICE_ID(vendorid);
1846                         devinfo->revision_id =
1847                             HDA_PARAM_REVISION_ID_REVISION_ID(revisionid);
1848                         devinfo->stepping_id =
1849                             HDA_PARAM_REVISION_ID_STEPPING_ID(revisionid);
1850                         HDA_BOOTVERBOSE(
1851                                 device_printf(sc->dev,
1852                                     "HDA_DEBUG: \tFound AFG nid=%d "
1853                                     "[startnode=%d endnode=%d]\n",
1854                                     devinfo->nid, startnode, endnode);
1855                         );
1856                         return (1);
1857                 }
1858         }
1859
1860         HDA_BOOTVERBOSE(
1861                 device_printf(sc->dev, "HDA_DEBUG: \tAFG not found\n");
1862         );
1863         return (0);
1864 }
1865
1866 static struct hdac_devinfo *
1867 hdac_probe_function(struct hdac_codec *codec, nid_t nid)
1868 {
1869         struct hdac_softc *sc = codec->sc;
1870         struct hdac_devinfo *devinfo;
1871         uint32_t fctgrptype;
1872         nid_t cad = codec->cad;
1873
1874         fctgrptype = HDA_PARAM_FCT_GRP_TYPE_NODE_TYPE(hdac_command(sc,
1875             HDA_CMD_GET_PARAMETER(cad, nid, HDA_PARAM_FCT_GRP_TYPE), cad));
1876
1877         /* XXX For now, ignore other FG. */
1878         if (fctgrptype != HDA_PARAM_FCT_GRP_TYPE_NODE_TYPE_AUDIO)
1879                 return (NULL);
1880
1881         devinfo = kmalloc(sizeof(*devinfo), M_HDAC, M_WAITOK | M_ZERO);
1882         devinfo->nid = nid;
1883         devinfo->node_type = fctgrptype;
1884         devinfo->codec = codec;
1885
1886         hdac_add_child(sc, devinfo);
1887
1888         return (devinfo);
1889 }
1890
1891 static void
1892 hdac_add_child(struct hdac_softc *sc, struct hdac_devinfo *devinfo)
1893 {
1894         devinfo->dev = device_add_child(sc->dev, NULL, -1);
1895         device_set_ivars(devinfo->dev, (void *)devinfo);
1896         /* XXX - Print more information when booting verbose??? */
1897 }
1898
1899 static void
1900 hdac_widget_connection_parse(struct hdac_widget *w)
1901 {
1902         struct hdac_softc *sc = w->devinfo->codec->sc;
1903         uint32_t res;
1904         int i, j, max, ents, entnum;
1905         nid_t cad = w->devinfo->codec->cad;
1906         nid_t nid = w->nid;
1907         nid_t cnid, addcnid, prevcnid;
1908
1909         w->nconns = 0;
1910
1911         res = hdac_command(sc,
1912             HDA_CMD_GET_PARAMETER(cad, nid, HDA_PARAM_CONN_LIST_LENGTH), cad);
1913
1914         ents = HDA_PARAM_CONN_LIST_LENGTH_LIST_LENGTH(res);
1915
1916         if (ents < 1)
1917                 return;
1918
1919         entnum = HDA_PARAM_CONN_LIST_LENGTH_LONG_FORM(res) ? 2 : 4;
1920         max = NELEM(w->conns) - 1;
1921         prevcnid = 0;
1922
1923 #define CONN_RMASK(e)           (1 << ((32 / (e)) - 1))
1924 #define CONN_NMASK(e)           (CONN_RMASK(e) - 1)
1925 #define CONN_RESVAL(r, e, n)    ((r) >> ((32 / (e)) * (n)))
1926 #define CONN_RANGE(r, e, n)     (CONN_RESVAL(r, e, n) & CONN_RMASK(e))
1927 #define CONN_CNID(r, e, n)      (CONN_RESVAL(r, e, n) & CONN_NMASK(e))
1928
1929         for (i = 0; i < ents; i += entnum) {
1930                 res = hdac_command(sc,
1931                     HDA_CMD_GET_CONN_LIST_ENTRY(cad, nid, i), cad);
1932                 for (j = 0; j < entnum; j++) {
1933                         cnid = CONN_CNID(res, entnum, j);
1934                         if (cnid == 0) {
1935                                 if (w->nconns < ents)
1936                                         device_printf(sc->dev,
1937                                             "%s: nid=%d WARNING: zero cnid "
1938                                             "entnum=%d j=%d index=%d "
1939                                             "entries=%d found=%d res=0x%08x\n",
1940                                             __func__, nid, entnum, j, i,
1941                                             ents, w->nconns, res);
1942                                 else
1943                                         goto getconns_out;
1944                         }
1945                         if (cnid < w->devinfo->startnode ||
1946                             cnid >= w->devinfo->endnode) {
1947                                 HDA_BOOTVERBOSE(
1948                                         device_printf(sc->dev,
1949                                             "%s: GHOST: nid=%d j=%d "
1950                                             "entnum=%d index=%d res=0x%08x\n",
1951                                             __func__, nid, j, entnum, i, res);
1952                                 );
1953                         }
1954                         if (CONN_RANGE(res, entnum, j) == 0)
1955                                 addcnid = cnid;
1956                         else if (prevcnid == 0 || prevcnid >= cnid) {
1957                                 device_printf(sc->dev,
1958                                     "%s: WARNING: Invalid child range "
1959                                     "nid=%d index=%d j=%d entnum=%d "
1960                                     "prevcnid=%d cnid=%d res=0x%08x\n",
1961                                     __func__, nid, i, j, entnum, prevcnid,
1962                                     cnid, res);
1963                                 addcnid = cnid;
1964                         } else
1965                                 addcnid = prevcnid + 1;
1966                         while (addcnid <= cnid) {
1967                                 if (w->nconns > max) {
1968                                         device_printf(sc->dev,
1969                                             "%s: nid=%d: Adding %d: "
1970                                             "Max connection reached! max=%d\n",
1971                                             __func__, nid, addcnid, max + 1);
1972                                         goto getconns_out;
1973                                 }
1974                                 w->conns[w->nconns++] = addcnid++;
1975                         }
1976                         prevcnid = cnid;
1977                 }
1978         }
1979
1980 getconns_out:
1981         HDA_BOOTVERBOSE(
1982                 device_printf(sc->dev,
1983                     "HDA_DEBUG: %s: nid=%d entries=%d found=%d\n",
1984                     __func__, nid, ents, w->nconns);
1985         );
1986         return;
1987 }
1988
1989 static uint32_t
1990 hdac_widget_pin_getconfig(struct hdac_widget *w)
1991 {
1992         struct hdac_softc *sc;
1993         uint32_t config, orig, id;
1994         nid_t cad, nid;
1995
1996         sc = w->devinfo->codec->sc;
1997         cad = w->devinfo->codec->cad;
1998         nid = w->nid;
1999         id = hdac_codec_id(w->devinfo);
2000
2001         config = hdac_command(sc,
2002             HDA_CMD_GET_CONFIGURATION_DEFAULT(cad, nid),
2003             cad);
2004         orig = config;
2005
2006         /*
2007          * XXX REWRITE!!!! Don't argue!
2008          */
2009         if (id == HDA_CODEC_ALC880 && sc->pci_subvendor == LG_LW20_SUBVENDOR) {
2010                 switch (nid) {
2011                 case 26:
2012                         config &= ~HDA_CONFIG_DEFAULTCONF_DEVICE_MASK;
2013                         config |= HDA_CONFIG_DEFAULTCONF_DEVICE_LINE_IN;
2014                         break;
2015                 case 27:
2016                         config &= ~HDA_CONFIG_DEFAULTCONF_DEVICE_MASK;
2017                         config |= HDA_CONFIG_DEFAULTCONF_DEVICE_HP_OUT;
2018                         break;
2019                 default:
2020                         break;
2021                 }
2022         } else if (id == HDA_CODEC_ALC880 &&
2023             (sc->pci_subvendor == CLEVO_D900T_SUBVENDOR ||
2024             sc->pci_subvendor == ASUS_M5200_SUBVENDOR)) {
2025                 /*
2026                  * Super broken BIOS
2027                  */
2028                 switch (nid) {
2029                 case 20:
2030                         break;
2031                 case 21:
2032                         break;
2033                 case 22:
2034                         break;
2035                 case 23:
2036                         break;
2037                 case 24:        /* MIC1 */
2038                         config &= ~HDA_CONFIG_DEFAULTCONF_DEVICE_MASK;
2039                         config |= HDA_CONFIG_DEFAULTCONF_DEVICE_MIC_IN;
2040                         break;
2041                 case 25:        /* XXX MIC2 */
2042                         config &= ~HDA_CONFIG_DEFAULTCONF_DEVICE_MASK;
2043                         config |= HDA_CONFIG_DEFAULTCONF_DEVICE_MIC_IN;
2044                         break;
2045                 case 26:        /* LINE1 */
2046                         config &= ~HDA_CONFIG_DEFAULTCONF_DEVICE_MASK;
2047                         config |= HDA_CONFIG_DEFAULTCONF_DEVICE_LINE_IN;
2048                         break;
2049                 case 27:        /* XXX LINE2 */
2050                         config &= ~HDA_CONFIG_DEFAULTCONF_DEVICE_MASK;
2051                         config |= HDA_CONFIG_DEFAULTCONF_DEVICE_LINE_IN;
2052                         break;
2053                 case 28:        /* CD */
2054                         config &= ~HDA_CONFIG_DEFAULTCONF_DEVICE_MASK;
2055                         config |= HDA_CONFIG_DEFAULTCONF_DEVICE_CD;
2056                         break;
2057                 case 30:
2058                         break;
2059                 case 31:
2060                         break;
2061                 default:
2062                         break;
2063                 }
2064         } else if (id == HDA_CODEC_ALC883 &&
2065             (sc->pci_subvendor == MSI_MS034A_SUBVENDOR ||
2066             HDA_DEV_MATCH(ACER_ALL_SUBVENDOR, sc->pci_subvendor))) {
2067                 switch (nid) {
2068                 case 25:
2069                         config &= ~(HDA_CONFIG_DEFAULTCONF_DEVICE_MASK |
2070                             HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_MASK);
2071                         config |= (HDA_CONFIG_DEFAULTCONF_DEVICE_MIC_IN |
2072                             HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_FIXED);
2073                         break;
2074                 case 28:
2075                         config &= ~(HDA_CONFIG_DEFAULTCONF_DEVICE_MASK |
2076                             HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_MASK);
2077                         config |= (HDA_CONFIG_DEFAULTCONF_DEVICE_CD |
2078                             HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_FIXED);
2079                         break;
2080                 default:
2081                         break;
2082                 }
2083         } else if (id == HDA_CODEC_CXVENICE && sc->pci_subvendor ==
2084             HP_V3000_SUBVENDOR) {
2085                 switch (nid) {
2086                 case 18:
2087                         config &= ~HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_MASK;
2088                         config |= HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_NONE;
2089                         break;
2090                 case 20:
2091                         config &= ~(HDA_CONFIG_DEFAULTCONF_DEVICE_MASK |
2092                             HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_MASK);
2093                         config |= (HDA_CONFIG_DEFAULTCONF_DEVICE_MIC_IN |
2094                             HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_FIXED);
2095                         break;
2096                 case 21:
2097                         config &= ~(HDA_CONFIG_DEFAULTCONF_DEVICE_MASK |
2098                             HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_MASK);
2099                         config |= (HDA_CONFIG_DEFAULTCONF_DEVICE_CD |
2100                             HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_FIXED);
2101                         break;
2102                 default:
2103                         break;
2104                 }
2105         } else if (id == HDA_CODEC_CXWAIKIKI && sc->pci_subvendor ==
2106             HP_DV5000_SUBVENDOR) {
2107                 switch (nid) {
2108                 case 20:
2109                 case 21:
2110                         config &= ~HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_MASK;
2111                         config |= HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_NONE;
2112                         break;
2113                 default:
2114                         break;
2115                 }
2116         } else if (id == HDA_CODEC_ALC861 && sc->pci_subvendor ==
2117             ASUS_W6F_SUBVENDOR) {
2118                 switch (nid) {
2119                 case 11:
2120                         config &= ~(HDA_CONFIG_DEFAULTCONF_DEVICE_MASK |
2121                             HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_MASK);
2122                         config |= (HDA_CONFIG_DEFAULTCONF_DEVICE_LINE_OUT |
2123                             HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_FIXED);
2124                         break;
2125                 case 15:
2126                         config &= ~(HDA_CONFIG_DEFAULTCONF_DEVICE_MASK |
2127                             HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_MASK);
2128                         config |= (HDA_CONFIG_DEFAULTCONF_DEVICE_HP_OUT |
2129                             HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_JACK);
2130                         break;
2131                 default:
2132                         break;
2133                 }
2134         } else if (id == HDA_CODEC_ALC861 && sc->pci_subvendor ==
2135             UNIWILL_9075_SUBVENDOR) {
2136                 switch (nid) {
2137                 case 15:
2138                         config &= ~(HDA_CONFIG_DEFAULTCONF_DEVICE_MASK |
2139                             HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_MASK);
2140                         config |= (HDA_CONFIG_DEFAULTCONF_DEVICE_HP_OUT |
2141                             HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_JACK);
2142                         break;
2143                 default:
2144                         break;
2145                 }
2146         } else if (id == HDA_CODEC_AD1986A &&
2147             (sc->pci_subvendor == ASUS_M2NPVMX_SUBVENDOR ||
2148             sc->pci_subvendor == ASUS_A8NVMCSM_SUBVENDOR)) {
2149                 switch (nid) {
2150                 case 28:        /* LINE */
2151                         config &= ~HDA_CONFIG_DEFAULTCONF_DEVICE_MASK;
2152                         config |= HDA_CONFIG_DEFAULTCONF_DEVICE_LINE_IN;
2153                         break;
2154                 case 29:        /* MIC */
2155                         config &= ~HDA_CONFIG_DEFAULTCONF_DEVICE_MASK;
2156                         config |= HDA_CONFIG_DEFAULTCONF_DEVICE_MIC_IN;
2157                         break;
2158                 default:
2159                         break;
2160                 }
2161         }
2162
2163         HDA_BOOTVERBOSE(
2164                 if (config != orig)
2165                         device_printf(sc->dev,
2166                             "HDA_DEBUG: Pin config nid=%u 0x%08x -> 0x%08x\n",
2167                             nid, orig, config);
2168         );
2169
2170         return (config);
2171 }
2172
2173 static uint32_t
2174 hdac_widget_pin_getcaps(struct hdac_widget *w)
2175 {
2176         struct hdac_softc *sc;
2177         uint32_t caps, orig;
2178         nid_t cad, nid;
2179
2180         sc = w->devinfo->codec->sc;
2181         cad = w->devinfo->codec->cad;
2182         nid = w->nid;
2183
2184         caps = hdac_command(sc,
2185             HDA_CMD_GET_PARAMETER(cad, nid, HDA_PARAM_PIN_CAP), cad);
2186         orig = caps;
2187
2188         HDA_BOOTVERBOSE(
2189                 if (caps != orig)
2190                         device_printf(sc->dev,
2191                             "HDA_DEBUG: Pin caps nid=%u 0x%08x -> 0x%08x\n",
2192                             nid, orig, caps);
2193         );
2194
2195         return (caps);
2196 }
2197
2198 static void
2199 hdac_widget_pin_parse(struct hdac_widget *w)
2200 {
2201         struct hdac_softc *sc = w->devinfo->codec->sc;
2202         uint32_t config, pincap;
2203         char *devstr, *connstr;
2204         nid_t cad = w->devinfo->codec->cad;
2205         nid_t nid = w->nid;
2206
2207         config = hdac_widget_pin_getconfig(w);
2208         w->wclass.pin.config = config;
2209
2210         pincap = hdac_widget_pin_getcaps(w);
2211         w->wclass.pin.cap = pincap;
2212
2213         w->wclass.pin.ctrl = hdac_command(sc,
2214             HDA_CMD_GET_PIN_WIDGET_CTRL(cad, nid), cad) &
2215             ~(HDA_CMD_SET_PIN_WIDGET_CTRL_HPHN_ENABLE |
2216             HDA_CMD_SET_PIN_WIDGET_CTRL_OUT_ENABLE |
2217             HDA_CMD_SET_PIN_WIDGET_CTRL_IN_ENABLE |
2218             HDA_CMD_SET_PIN_WIDGET_CTRL_VREF_ENABLE_MASK);
2219
2220         if (HDA_PARAM_PIN_CAP_HEADPHONE_CAP(pincap))
2221                 w->wclass.pin.ctrl |= HDA_CMD_SET_PIN_WIDGET_CTRL_HPHN_ENABLE;
2222         if (HDA_PARAM_PIN_CAP_OUTPUT_CAP(pincap))
2223                 w->wclass.pin.ctrl |= HDA_CMD_SET_PIN_WIDGET_CTRL_OUT_ENABLE;
2224         if (HDA_PARAM_PIN_CAP_INPUT_CAP(pincap))
2225                 w->wclass.pin.ctrl |= HDA_CMD_SET_PIN_WIDGET_CTRL_IN_ENABLE;
2226         if (HDA_PARAM_PIN_CAP_EAPD_CAP(pincap)) {
2227                 w->param.eapdbtl = hdac_command(sc,
2228                     HDA_CMD_GET_EAPD_BTL_ENABLE(cad, nid), cad);
2229                 w->param.eapdbtl &= 0x7;
2230                 w->param.eapdbtl |= HDA_CMD_SET_EAPD_BTL_ENABLE_EAPD;
2231         } else
2232                 w->param.eapdbtl = HDAC_INVALID;
2233
2234         switch (config & HDA_CONFIG_DEFAULTCONF_DEVICE_MASK) {
2235         case HDA_CONFIG_DEFAULTCONF_DEVICE_LINE_OUT:
2236                 devstr = "line out";
2237                 break;
2238         case HDA_CONFIG_DEFAULTCONF_DEVICE_SPEAKER:
2239                 devstr = "speaker";
2240                 break;
2241         case HDA_CONFIG_DEFAULTCONF_DEVICE_HP_OUT:
2242                 devstr = "headphones out";
2243                 break;
2244         case HDA_CONFIG_DEFAULTCONF_DEVICE_CD:
2245                 devstr = "CD";
2246                 break;
2247         case HDA_CONFIG_DEFAULTCONF_DEVICE_SPDIF_OUT:
2248                 devstr = "SPDIF out";
2249                 break;
2250         case HDA_CONFIG_DEFAULTCONF_DEVICE_DIGITAL_OTHER_OUT:
2251                 devstr = "digital (other) out";
2252                 break;
2253         case HDA_CONFIG_DEFAULTCONF_DEVICE_MODEM_LINE:
2254                 devstr = "modem, line side";
2255                 break;
2256         case HDA_CONFIG_DEFAULTCONF_DEVICE_MODEM_HANDSET:
2257                 devstr = "modem, handset side";
2258                 break;
2259         case HDA_CONFIG_DEFAULTCONF_DEVICE_LINE_IN:
2260                 devstr = "line in";
2261                 break;
2262         case HDA_CONFIG_DEFAULTCONF_DEVICE_AUX:
2263                 devstr = "AUX";
2264                 break;
2265         case HDA_CONFIG_DEFAULTCONF_DEVICE_MIC_IN:
2266                 devstr = "Mic in";
2267                 break;
2268         case HDA_CONFIG_DEFAULTCONF_DEVICE_TELEPHONY:
2269                 devstr = "telephony";
2270                 break;
2271         case HDA_CONFIG_DEFAULTCONF_DEVICE_SPDIF_IN:
2272                 devstr = "SPDIF in";
2273                 break;
2274         case HDA_CONFIG_DEFAULTCONF_DEVICE_DIGITAL_OTHER_IN:
2275                 devstr = "digital (other) in";
2276                 break;
2277         case HDA_CONFIG_DEFAULTCONF_DEVICE_OTHER:
2278                 devstr = "other";
2279                 break;
2280         default:
2281                 devstr = "unknown";
2282                 break;
2283         }
2284
2285         switch (config & HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_MASK) {
2286         case HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_JACK:
2287                 connstr = "jack";
2288                 break;
2289         case HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_NONE:
2290                 connstr = "none";
2291                 break;
2292         case HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_FIXED:
2293                 connstr = "fixed";
2294                 break;
2295         case HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_BOTH:
2296                 connstr = "jack / fixed";
2297                 break;
2298         default:
2299                 connstr = "unknown";
2300                 break;
2301         }
2302
2303         strlcat(w->name, ": ", sizeof(w->name));
2304         strlcat(w->name, devstr, sizeof(w->name));
2305         strlcat(w->name, " (", sizeof(w->name));
2306         strlcat(w->name, connstr, sizeof(w->name));
2307         strlcat(w->name, ")", sizeof(w->name));
2308 }
2309
2310 static void
2311 hdac_widget_parse(struct hdac_widget *w)
2312 {
2313         struct hdac_softc *sc = w->devinfo->codec->sc;
2314         uint32_t wcap, cap;
2315         char *typestr;
2316         nid_t cad = w->devinfo->codec->cad;
2317         nid_t nid = w->nid;
2318
2319         wcap = hdac_command(sc,
2320             HDA_CMD_GET_PARAMETER(cad, nid, HDA_PARAM_AUDIO_WIDGET_CAP),
2321             cad);
2322         w->param.widget_cap = wcap;
2323         w->type = HDA_PARAM_AUDIO_WIDGET_CAP_TYPE(wcap);
2324
2325         switch (w->type) {
2326         case HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_OUTPUT:
2327                 typestr = "audio output";
2328                 break;
2329         case HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_INPUT:
2330                 typestr = "audio input";
2331                 break;
2332         case HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_MIXER:
2333                 typestr = "audio mixer";
2334                 break;
2335         case HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_SELECTOR:
2336                 typestr = "audio selector";
2337                 break;
2338         case HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX:
2339                 typestr = "pin";
2340                 break;
2341         case HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_POWER_WIDGET:
2342                 typestr = "power widget";
2343                 break;
2344         case HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_VOLUME_WIDGET:
2345                 typestr = "volume widget";
2346                 break;
2347         case HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_BEEP_WIDGET:
2348                 typestr = "beep widget";
2349                 break;
2350         case HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_VENDOR_WIDGET:
2351                 typestr = "vendor widget";
2352                 break;
2353         default:
2354                 typestr = "unknown type";
2355                 break;
2356         }
2357
2358         strlcpy(w->name, typestr, sizeof(w->name));
2359
2360         if (HDA_PARAM_AUDIO_WIDGET_CAP_POWER_CTRL(wcap)) {
2361                 hdac_command(sc,
2362                     HDA_CMD_SET_POWER_STATE(cad, nid, HDA_CMD_POWER_STATE_D0),
2363                     cad);
2364                 DELAY(1000);
2365         }
2366
2367         hdac_widget_connection_parse(w);
2368
2369         if (HDA_PARAM_AUDIO_WIDGET_CAP_OUT_AMP(wcap)) {
2370                 if (HDA_PARAM_AUDIO_WIDGET_CAP_AMP_OVR(wcap))
2371                         w->param.outamp_cap =
2372                             hdac_command(sc,
2373                             HDA_CMD_GET_PARAMETER(cad, nid,
2374                             HDA_PARAM_OUTPUT_AMP_CAP), cad);
2375                 else
2376                         w->param.outamp_cap =
2377                             w->devinfo->function.audio.outamp_cap;
2378         } else
2379                 w->param.outamp_cap = 0;
2380
2381         if (HDA_PARAM_AUDIO_WIDGET_CAP_IN_AMP(wcap)) {
2382                 if (HDA_PARAM_AUDIO_WIDGET_CAP_AMP_OVR(wcap))
2383                         w->param.inamp_cap =
2384                             hdac_command(sc,
2385                             HDA_CMD_GET_PARAMETER(cad, nid,
2386                             HDA_PARAM_INPUT_AMP_CAP), cad);
2387                 else
2388                         w->param.inamp_cap =
2389                             w->devinfo->function.audio.inamp_cap;
2390         } else
2391                 w->param.inamp_cap = 0;
2392
2393         if (w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_OUTPUT ||
2394             w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_INPUT) {
2395                 if (HDA_PARAM_AUDIO_WIDGET_CAP_FORMAT_OVR(wcap)) {
2396                         cap = hdac_command(sc,
2397                             HDA_CMD_GET_PARAMETER(cad, nid,
2398                             HDA_PARAM_SUPP_STREAM_FORMATS), cad);
2399                         w->param.supp_stream_formats = (cap != 0) ? cap :
2400                             w->devinfo->function.audio.supp_stream_formats;
2401                         cap = hdac_command(sc,
2402                             HDA_CMD_GET_PARAMETER(cad, nid,
2403                             HDA_PARAM_SUPP_PCM_SIZE_RATE), cad);
2404                         w->param.supp_pcm_size_rate = (cap != 0) ? cap :
2405                             w->devinfo->function.audio.supp_pcm_size_rate;
2406                 } else {
2407                         w->param.supp_stream_formats =
2408                             w->devinfo->function.audio.supp_stream_formats;
2409                         w->param.supp_pcm_size_rate =
2410                             w->devinfo->function.audio.supp_pcm_size_rate;
2411                 }
2412         } else {
2413                 w->param.supp_stream_formats = 0;
2414                 w->param.supp_pcm_size_rate = 0;
2415         }
2416
2417         if (w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX)
2418                 hdac_widget_pin_parse(w);
2419 }
2420
2421 static struct hdac_widget *
2422 hdac_widget_get(struct hdac_devinfo *devinfo, nid_t nid)
2423 {
2424         if (devinfo == NULL || devinfo->widget == NULL ||
2425                     nid < devinfo->startnode || nid >= devinfo->endnode)
2426                 return (NULL);
2427         return (&devinfo->widget[nid - devinfo->startnode]);
2428 }
2429
2430 static __inline int
2431 hda_poll_channel(struct hdac_chan *ch)
2432 {
2433         uint32_t sz, delta;
2434         volatile uint32_t ptr;
2435
2436         if (!(ch->flags & HDAC_CHN_RUNNING))
2437                 return (0);
2438
2439         sz = ch->blksz * ch->blkcnt;
2440         if (ch->dmapos != NULL)
2441                 ptr = *(ch->dmapos);
2442         else
2443                 ptr = HDAC_READ_4(&ch->devinfo->codec->sc->mem,
2444                     ch->off + HDAC_SDLPIB);
2445         ch->ptr = ptr;
2446         ptr %= sz;
2447         ptr &= ~(ch->blksz - 1);
2448         delta = (sz + ptr - ch->prevptr) % sz;
2449
2450         if (delta < ch->blksz)
2451                 return (0);
2452
2453         ch->prevptr = ptr;
2454
2455         return (1);
2456 }
2457
2458 #define hda_chan_active(sc)    (((sc)->play.flags | (sc)->rec.flags) & \
2459                                 HDAC_CHN_RUNNING)
2460
2461 static void
2462 hda_poll_callback(void *arg)
2463 {
2464         struct hdac_softc *sc = arg;
2465         uint32_t trigger;
2466
2467         if (sc == NULL)
2468                 return;
2469
2470         hdac_lock(sc);
2471         if (sc->polling == 0 || hda_chan_active(sc) == 0) {
2472                 hdac_unlock(sc);
2473                 return;
2474         }
2475
2476         trigger = 0;
2477         trigger |= (hda_poll_channel(&sc->play) != 0) ? HDAC_TRIGGER_PLAY : 0;
2478         trigger |= (hda_poll_channel(&sc->rec)) != 0 ? HDAC_TRIGGER_REC : 0;
2479
2480         /* XXX */
2481         callout_reset(&sc->poll_hda, 1/*sc->poll_ticks*/,
2482             hda_poll_callback, sc);
2483
2484         hdac_unlock(sc);
2485
2486         if (trigger & HDAC_TRIGGER_PLAY)
2487                 chn_intr(sc->play.c);
2488         if (trigger & HDAC_TRIGGER_REC)
2489                 chn_intr(sc->rec.c);
2490 }
2491
2492 static int
2493 hdac_rirb_flush(struct hdac_softc *sc)
2494 {
2495         struct hdac_rirb *rirb_base, *rirb;
2496         struct hdac_codec *codec;
2497         struct hdac_command_list *commands;
2498         nid_t cad;
2499         uint32_t resp;
2500         uint8_t rirbwp;
2501         int ret;
2502
2503         rirb_base = (struct hdac_rirb *)sc->rirb_dma.dma_vaddr;
2504         rirbwp = HDAC_READ_1(&sc->mem, HDAC_RIRBWP);
2505 #if 0
2506         bus_dmamap_sync(sc->rirb_dma.dma_tag, sc->rirb_dma.dma_map,
2507             BUS_DMASYNC_POSTREAD);
2508 #endif
2509         ret = 0;
2510
2511         while (sc->rirb_rp != rirbwp) {
2512                 sc->rirb_rp++;
2513                 sc->rirb_rp %= sc->rirb_size;
2514                 rirb = &rirb_base[sc->rirb_rp];
2515                 cad = HDAC_RIRB_RESPONSE_EX_SDATA_IN(rirb->response_ex);
2516                 if (cad < 0 || cad >= HDAC_CODEC_MAX ||
2517                     sc->codecs[cad] == NULL)
2518                         continue;
2519                 resp = rirb->response;
2520                 codec = sc->codecs[cad];
2521                 commands = codec->commands;
2522                 if (rirb->response_ex & HDAC_RIRB_RESPONSE_EX_UNSOLICITED) {
2523                         sc->unsolq[sc->unsolq_wp++] = (cad << 16) |
2524                             ((resp >> 26) & 0xffff);
2525                         sc->unsolq_wp %= HDAC_UNSOLQ_MAX;
2526                 } else if (commands != NULL && commands->num_commands > 0 &&
2527                     codec->responses_received < commands->num_commands)
2528                         commands->responses[codec->responses_received++] =
2529                             resp;
2530                 ret++;
2531         }
2532
2533         return (ret);
2534 }
2535
2536 static int
2537 hdac_unsolq_flush(struct hdac_softc *sc)
2538 {
2539         nid_t cad;
2540         uint32_t tag;
2541         int ret = 0;
2542
2543         if (sc->unsolq_st == HDAC_UNSOLQ_READY) {
2544                 sc->unsolq_st = HDAC_UNSOLQ_BUSY;
2545                 while (sc->unsolq_rp != sc->unsolq_wp) {
2546                         cad = sc->unsolq[sc->unsolq_rp] >> 16;
2547                         tag = sc->unsolq[sc->unsolq_rp++] & 0xffff;
2548                         sc->unsolq_rp %= HDAC_UNSOLQ_MAX;
2549                         hdac_unsolicited_handler(sc->codecs[cad], tag);
2550                         ret++;
2551                 }
2552                 sc->unsolq_st = HDAC_UNSOLQ_READY;
2553         }
2554
2555         return (ret);
2556 }
2557
2558 static void
2559 hdac_poll_callback(void *arg)
2560 {
2561         struct hdac_softc *sc = arg;
2562         if (sc == NULL)
2563                 return;
2564
2565         hdac_lock(sc);
2566         if (sc->polling == 0 || sc->poll_ival == 0) {
2567                 hdac_unlock(sc);
2568                 return;
2569         }
2570         if (hdac_rirb_flush(sc) != 0)
2571                 hdac_unsolq_flush(sc);
2572         callout_reset(&sc->poll_hdac, sc->poll_ival, hdac_poll_callback, sc);
2573         hdac_unlock(sc);
2574 }
2575
2576 static void
2577 hdac_stream_stop(struct hdac_chan *ch)
2578 {
2579         struct hdac_softc *sc = ch->devinfo->codec->sc;
2580         uint32_t ctl;
2581
2582         ctl = HDAC_READ_1(&sc->mem, ch->off + HDAC_SDCTL0);
2583         ctl &= ~(HDAC_SDCTL_IOCE | HDAC_SDCTL_FEIE | HDAC_SDCTL_DEIE |
2584             HDAC_SDCTL_RUN);
2585         HDAC_WRITE_1(&sc->mem, ch->off + HDAC_SDCTL0, ctl);
2586
2587         ch->flags &= ~HDAC_CHN_RUNNING;
2588
2589         if (sc->polling != 0) {
2590                 int pollticks;
2591
2592                 if (hda_chan_active(sc) == 0) {
2593                         callout_stop(&sc->poll_hda);
2594                         sc->poll_ticks = 1;
2595                 } else {
2596                         if (sc->play.flags & HDAC_CHN_RUNNING)
2597                                 ch = &sc->play;
2598                         else
2599                                 ch = &sc->rec;
2600                         pollticks = ((uint64_t)hz * ch->blksz) /
2601                             ((uint64_t)sndbuf_getbps(ch->b) *
2602                             sndbuf_getspd(ch->b));
2603                         pollticks >>= 2;
2604                         if (pollticks > hz)
2605                                 pollticks = hz;
2606                         if (pollticks < 1) {
2607                                 HDA_BOOTVERBOSE(
2608                                         device_printf(sc->dev,
2609                                             "%s: pollticks=%d < 1 !\n",
2610                                             __func__, pollticks);
2611                                 );
2612                                 pollticks = 1;
2613                         }
2614                         if (pollticks > sc->poll_ticks) {
2615                                 HDA_BOOTVERBOSE(
2616                                         device_printf(sc->dev,
2617                                             "%s: pollticks %d -> %d\n",
2618                                             __func__, sc->poll_ticks,
2619                                             pollticks);
2620                                 );
2621                                 sc->poll_ticks = pollticks;
2622                                 callout_reset(&sc->poll_hda, 1,
2623                                     hda_poll_callback, sc);
2624                         }
2625                 }
2626         } else {
2627                 ctl = HDAC_READ_4(&sc->mem, HDAC_INTCTL);
2628                 ctl &= ~(1 << (ch->off >> 5));
2629                 HDAC_WRITE_4(&sc->mem, HDAC_INTCTL, ctl);
2630         }
2631 }
2632
2633 static void
2634 hdac_stream_start(struct hdac_chan *ch)
2635 {
2636         struct hdac_softc *sc = ch->devinfo->codec->sc;
2637         uint32_t ctl;
2638
2639         if (sc->polling != 0) {
2640                 int pollticks;
2641
2642                 pollticks = ((uint64_t)hz * ch->blksz) /
2643                     ((uint64_t)sndbuf_getbps(ch->b) * sndbuf_getspd(ch->b));
2644                 pollticks >>= 2;
2645                 if (pollticks > hz)
2646                         pollticks = hz;
2647                 if (pollticks < 1) {
2648                         HDA_BOOTVERBOSE(
2649                                 device_printf(sc->dev,
2650                                     "%s: pollticks=%d < 1 !\n",
2651                                     __func__, pollticks);
2652                         );
2653                         pollticks = 1;
2654                 }
2655                 if (hda_chan_active(sc) == 0 || pollticks < sc->poll_ticks) {
2656                         HDA_BOOTVERBOSE(
2657                                 if (hda_chan_active(sc) == 0) {
2658                                         device_printf(sc->dev,
2659                                             "%s: pollticks=%d\n",
2660                                             __func__, pollticks);
2661                                 } else {
2662                                         device_printf(sc->dev,
2663                                             "%s: pollticks %d -> %d\n",
2664                                             __func__, sc->poll_ticks,
2665                                             pollticks);
2666                                 }
2667                         );
2668                         sc->poll_ticks = pollticks;
2669                         callout_reset(&sc->poll_hda, 1, hda_poll_callback,
2670                             sc);
2671                 }
2672                 ctl = HDAC_READ_1(&sc->mem, ch->off + HDAC_SDCTL0);
2673                 ctl |= HDAC_SDCTL_RUN;
2674         } else {
2675                 ctl = HDAC_READ_4(&sc->mem, HDAC_INTCTL);
2676                 ctl |= 1 << (ch->off >> 5);
2677                 HDAC_WRITE_4(&sc->mem, HDAC_INTCTL, ctl);
2678                 ctl = HDAC_READ_1(&sc->mem, ch->off + HDAC_SDCTL0);
2679                 ctl |= HDAC_SDCTL_IOCE | HDAC_SDCTL_FEIE | HDAC_SDCTL_DEIE |
2680                     HDAC_SDCTL_RUN;
2681         }
2682         HDAC_WRITE_1(&sc->mem, ch->off + HDAC_SDCTL0, ctl);
2683
2684         ch->flags |= HDAC_CHN_RUNNING;
2685 }
2686
2687 static void
2688 hdac_stream_reset(struct hdac_chan *ch)
2689 {
2690         struct hdac_softc *sc = ch->devinfo->codec->sc;
2691         int timeout = 1000;
2692         int to = timeout;
2693         uint32_t ctl;
2694
2695         ctl = HDAC_READ_1(&sc->mem, ch->off + HDAC_SDCTL0);
2696         ctl |= HDAC_SDCTL_SRST;
2697         HDAC_WRITE_1(&sc->mem, ch->off + HDAC_SDCTL0, ctl);
2698         do {
2699                 ctl = HDAC_READ_1(&sc->mem, ch->off + HDAC_SDCTL0);
2700                 if (ctl & HDAC_SDCTL_SRST)
2701                         break;
2702                 DELAY(10);
2703         } while (--to);
2704         if (!(ctl & HDAC_SDCTL_SRST)) {
2705                 device_printf(sc->dev, "timeout in reset\n");
2706         }
2707         ctl &= ~HDAC_SDCTL_SRST;
2708         HDAC_WRITE_1(&sc->mem, ch->off + HDAC_SDCTL0, ctl);
2709         to = timeout;
2710         do {
2711                 ctl = HDAC_READ_1(&sc->mem, ch->off + HDAC_SDCTL0);
2712                 if (!(ctl & HDAC_SDCTL_SRST))
2713                         break;
2714                 DELAY(10);
2715         } while (--to);
2716         if (ctl & HDAC_SDCTL_SRST)
2717                 device_printf(sc->dev, "can't reset!\n");
2718 }
2719
2720 static void
2721 hdac_stream_setid(struct hdac_chan *ch)
2722 {
2723         struct hdac_softc *sc = ch->devinfo->codec->sc;
2724         uint32_t ctl;
2725
2726         ctl = HDAC_READ_1(&sc->mem, ch->off + HDAC_SDCTL2);
2727         ctl &= ~HDAC_SDCTL2_STRM_MASK;
2728         ctl |= ch->sid << HDAC_SDCTL2_STRM_SHIFT;
2729         HDAC_WRITE_1(&sc->mem, ch->off + HDAC_SDCTL2, ctl);
2730 }
2731
2732 static void
2733 hdac_bdl_setup(struct hdac_chan *ch)
2734 {
2735         struct hdac_softc *sc = ch->devinfo->codec->sc;
2736         struct hdac_bdle *bdle;
2737         uint64_t addr;
2738         uint32_t blksz, blkcnt;
2739         int i;
2740
2741         addr = (uint64_t)sndbuf_getbufaddr(ch->b);
2742         bdle = (struct hdac_bdle *)ch->bdl_dma.dma_vaddr;
2743
2744         if (sc->polling != 0) {
2745                 blksz = ch->blksz * ch->blkcnt;
2746                 blkcnt = 1;
2747         } else {
2748                 blksz = ch->blksz;
2749                 blkcnt = ch->blkcnt;
2750         }
2751
2752         for (i = 0; i < blkcnt; i++, bdle++) {
2753                 bdle->addrl = (uint32_t)addr;
2754                 bdle->addrh = (uint32_t)(addr >> 32);
2755                 bdle->len = blksz;
2756                 bdle->ioc = 1 ^ sc->polling;
2757                 addr += blksz;
2758         }
2759
2760         HDAC_WRITE_4(&sc->mem, ch->off + HDAC_SDCBL, blksz * blkcnt);
2761         HDAC_WRITE_2(&sc->mem, ch->off + HDAC_SDLVI, blkcnt - 1);
2762         addr = ch->bdl_dma.dma_paddr;
2763         HDAC_WRITE_4(&sc->mem, ch->off + HDAC_SDBDPL, (uint32_t)addr);
2764         HDAC_WRITE_4(&sc->mem, ch->off + HDAC_SDBDPU, (uint32_t)(addr >> 32));
2765         if (ch->dmapos != NULL &&
2766             !(HDAC_READ_4(&sc->mem, HDAC_DPIBLBASE) & 0x00000001)) {
2767                 addr = sc->pos_dma.dma_paddr;
2768                 HDAC_WRITE_4(&sc->mem, HDAC_DPIBLBASE,
2769                     ((uint32_t)addr & HDAC_DPLBASE_DPLBASE_MASK) | 0x00000001);
2770                 HDAC_WRITE_4(&sc->mem, HDAC_DPIBUBASE, (uint32_t)(addr >> 32));
2771         }
2772 }
2773
2774 static int
2775 hdac_bdl_alloc(struct hdac_chan *ch)
2776 {
2777         struct hdac_softc *sc = ch->devinfo->codec->sc;
2778         int rc;
2779
2780         rc = hdac_dma_alloc(sc, &ch->bdl_dma,
2781             sizeof(struct hdac_bdle) * HDA_BDL_MAX);
2782         if (rc) {
2783                 device_printf(sc->dev, "can't alloc bdl\n");
2784                 return (rc);
2785         }
2786
2787         return (0);
2788 }
2789
2790 static void
2791 hdac_audio_ctl_amp_set_internal(struct hdac_softc *sc, nid_t cad, nid_t nid,
2792                                         int index, int lmute, int rmute,
2793                                         int left, int right, int dir)
2794 {
2795         uint16_t v = 0;
2796
2797         if (sc == NULL)
2798                 return;
2799
2800         if (left != right || lmute != rmute) {
2801                 v = (1 << (15 - dir)) | (1 << 13) | (index << 8) |
2802                     (lmute << 7) | left;
2803                 hdac_command(sc,
2804                     HDA_CMD_SET_AMP_GAIN_MUTE(cad, nid, v), cad);
2805                 v = (1 << (15 - dir)) | (1 << 12) | (index << 8) |
2806                     (rmute << 7) | right;
2807         } else
2808                 v = (1 << (15 - dir)) | (3 << 12) | (index << 8) |
2809                     (lmute << 7) | left;
2810
2811         hdac_command(sc,
2812             HDA_CMD_SET_AMP_GAIN_MUTE(cad, nid, v), cad);
2813 }
2814
2815 static void
2816 hdac_audio_ctl_amp_set(struct hdac_audio_ctl *ctl, uint32_t mute,
2817                                                 int left, int right)
2818 {
2819         struct hdac_softc *sc;
2820         nid_t nid, cad;
2821         int lmute, rmute;
2822
2823         if (ctl == NULL || ctl->widget == NULL ||
2824             ctl->widget->devinfo == NULL ||
2825             ctl->widget->devinfo->codec == NULL ||
2826             ctl->widget->devinfo->codec->sc == NULL)
2827                 return;
2828
2829         sc = ctl->widget->devinfo->codec->sc;
2830         cad = ctl->widget->devinfo->codec->cad;
2831         nid = ctl->widget->nid;
2832
2833         if (mute == HDA_AMP_MUTE_DEFAULT) {
2834                 lmute = HDA_AMP_LEFT_MUTED(ctl->muted);
2835                 rmute = HDA_AMP_RIGHT_MUTED(ctl->muted);
2836         } else {
2837                 lmute = HDA_AMP_LEFT_MUTED(mute);
2838                 rmute = HDA_AMP_RIGHT_MUTED(mute);
2839         }
2840
2841         if (ctl->dir & HDA_CTL_OUT)
2842                 hdac_audio_ctl_amp_set_internal(sc, cad, nid, ctl->index,
2843                     lmute, rmute, left, right, 0);
2844         if (ctl->dir & HDA_CTL_IN)
2845                 hdac_audio_ctl_amp_set_internal(sc, cad, nid, ctl->index,
2846                     lmute, rmute, left, right, 1);
2847         ctl->left = left;
2848         ctl->right = right;
2849 }
2850
2851 static void
2852 hdac_widget_connection_select(struct hdac_widget *w, uint8_t index)
2853 {
2854         if (w == NULL || w->nconns < 1 || index > (w->nconns - 1))
2855                 return;
2856         hdac_command(w->devinfo->codec->sc,
2857             HDA_CMD_SET_CONNECTION_SELECT_CONTROL(w->devinfo->codec->cad,
2858             w->nid, index), w->devinfo->codec->cad);
2859         w->selconn = index;
2860 }
2861
2862
2863 /****************************************************************************
2864  * uint32_t hdac_command_sendone_internal
2865  *
2866  * Wrapper function that sends only one command to a given codec
2867  ****************************************************************************/
2868 static uint32_t
2869 hdac_command_sendone_internal(struct hdac_softc *sc, uint32_t verb, nid_t cad)
2870 {
2871         struct hdac_command_list cl;
2872         uint32_t response = HDAC_INVALID;
2873
2874         if (!hdac_lockowned(sc))
2875                 device_printf(sc->dev, "WARNING!!!! mtx not owned!!!!\n");
2876         cl.num_commands = 1;
2877         cl.verbs = &verb;
2878         cl.responses = &response;
2879
2880         hdac_command_send_internal(sc, &cl, cad);
2881
2882         return (response);
2883 }
2884
2885 /****************************************************************************
2886  * hdac_command_send_internal
2887  *
2888  * Send a command list to the codec via the corb. We queue as much verbs as
2889  * we can and sleep on the codec. When the interrupt get the responses
2890  * back from the rirb, it will wake us up so we can queue the remaining verbs
2891  * if any.
2892  ****************************************************************************/
2893 static void
2894 hdac_command_send_internal(struct hdac_softc *sc,
2895                         struct hdac_command_list *commands, nid_t cad)
2896 {
2897         struct hdac_codec *codec;
2898         int corbrp;
2899         uint32_t *corb;
2900         int timeout;
2901         int retry = 10;
2902
2903         if (sc == NULL || sc->codecs[cad] == NULL || commands == NULL ||
2904             commands->num_commands < 1)
2905                 return;
2906
2907         codec = sc->codecs[cad];
2908         codec->commands = commands;
2909         codec->responses_received = 0;
2910         codec->verbs_sent = 0;
2911         corb = (uint32_t *)sc->corb_dma.dma_vaddr;
2912
2913         do {
2914                 if (codec->verbs_sent != commands->num_commands) {
2915                         /* Queue as many verbs as possible */
2916                         corbrp = HDAC_READ_2(&sc->mem, HDAC_CORBRP);
2917 #if 0
2918                         bus_dmamap_sync(sc->corb_dma.dma_tag,
2919                             sc->corb_dma.dma_map, BUS_DMASYNC_PREWRITE);
2920 #endif
2921                         while (codec->verbs_sent != commands->num_commands &&
2922                             ((sc->corb_wp + 1) % sc->corb_size) != corbrp) {
2923                                 sc->corb_wp++;
2924                                 sc->corb_wp %= sc->corb_size;
2925                                 corb[sc->corb_wp] =
2926                                     commands->verbs[codec->verbs_sent++];
2927                         }
2928
2929                         /* Send the verbs to the codecs */
2930 #if 0
2931                         bus_dmamap_sync(sc->corb_dma.dma_tag,
2932                             sc->corb_dma.dma_map, BUS_DMASYNC_POSTWRITE);
2933 #endif
2934                         HDAC_WRITE_2(&sc->mem, HDAC_CORBWP, sc->corb_wp);
2935                 }
2936
2937                 timeout = 1000;
2938                 while (hdac_rirb_flush(sc) == 0 && --timeout)
2939                         DELAY(10);
2940         } while ((codec->verbs_sent != commands->num_commands ||
2941             codec->responses_received != commands->num_commands) && --retry);
2942
2943         if (retry == 0)
2944                 device_printf(sc->dev,
2945                     "%s: TIMEOUT numcmd=%d, sent=%d, received=%d\n",
2946                     __func__, commands->num_commands, codec->verbs_sent,
2947                     codec->responses_received);
2948
2949         codec->commands = NULL;
2950         codec->responses_received = 0;
2951         codec->verbs_sent = 0;
2952
2953         hdac_unsolq_flush(sc);
2954 }
2955
2956
2957 /****************************************************************************
2958  * Device Methods
2959  ****************************************************************************/
2960
2961 /****************************************************************************
2962  * int hdac_probe(device_t)
2963  *
2964  * Probe for the presence of an hdac. If none is found, check for a generic
2965  * match using the subclass of the device.
2966  ****************************************************************************/
2967 static int
2968 hdac_probe(device_t dev)
2969 {
2970         int i, result;
2971         uint32_t model;
2972         uint16_t class, subclass;
2973         char desc[64];
2974
2975         model = (uint32_t)pci_get_device(dev) << 16;
2976         model |= (uint32_t)pci_get_vendor(dev) & 0x0000ffff;
2977         class = pci_get_class(dev);
2978         subclass = pci_get_subclass(dev);
2979
2980         bzero(desc, sizeof(desc));
2981         result = ENXIO;
2982         for (i = 0; i < HDAC_DEVICES_LEN; i++) {
2983                 if (hdac_devices[i].model == model) {
2984                         strlcpy(desc, hdac_devices[i].desc, sizeof(desc));
2985                         result = BUS_PROBE_DEFAULT;
2986                         break;
2987                 }
2988                 if (HDA_DEV_MATCH(hdac_devices[i].model, model) &&
2989                     class == PCIC_MULTIMEDIA &&
2990                     subclass == PCIS_MULTIMEDIA_HDA) {
2991                         strlcpy(desc, hdac_devices[i].desc, sizeof(desc));
2992                         result = BUS_PROBE_GENERIC;
2993                         break;
2994                 }
2995         }
2996         if (result == ENXIO && class == PCIC_MULTIMEDIA &&
2997             subclass == PCIS_MULTIMEDIA_HDA) {
2998                 strlcpy(desc, "Generic", sizeof(desc));
2999                 result = BUS_PROBE_GENERIC;
3000         }
3001         if (result != ENXIO) {
3002                 strlcat(desc, " High Definition Audio Controller",
3003                     sizeof(desc));
3004                 device_set_desc_copy(dev, desc);
3005         }
3006
3007         return (result);
3008 }
3009
3010 static void *
3011 hdac_channel_init(kobj_t obj, void *data, struct snd_dbuf *b,
3012                                         struct pcm_channel *c, int dir)
3013 {
3014         struct hdac_devinfo *devinfo = data;
3015         struct hdac_softc *sc = devinfo->codec->sc;
3016         struct hdac_chan *ch;
3017
3018         hdac_lock(sc);
3019         if (dir == PCMDIR_PLAY) {
3020                 ch = &sc->play;
3021                 ch->off = (sc->num_iss + devinfo->function.audio.playcnt) << 5;
3022                 devinfo->function.audio.playcnt++;
3023         } else {
3024                 ch = &sc->rec;
3025                 ch->off = devinfo->function.audio.reccnt << 5;
3026                 devinfo->function.audio.reccnt++;
3027         }
3028         if (devinfo->function.audio.quirks & HDA_QUIRK_FIXEDRATE) {
3029                 ch->caps.minspeed = ch->caps.maxspeed = 48000;
3030                 ch->pcmrates[0] = 48000;
3031                 ch->pcmrates[1] = 0;
3032         }
3033         if (sc->pos_dma.dma_vaddr != NULL)
3034                 ch->dmapos = (uint32_t *)(sc->pos_dma.dma_vaddr +
3035                     (sc->streamcnt * 8));
3036         else
3037                 ch->dmapos = NULL;
3038         ch->sid = ++sc->streamcnt;
3039         ch->dir = dir;
3040         ch->b = b;
3041         ch->c = c;
3042         ch->devinfo = devinfo;
3043         ch->blksz = sc->chan_size / sc->chan_blkcnt;
3044         ch->blkcnt = sc->chan_blkcnt;
3045         hdac_unlock(sc);
3046
3047         if (hdac_bdl_alloc(ch) != 0) {
3048                 ch->blkcnt = 0;
3049                 return (NULL);
3050         }
3051
3052         if (sndbuf_alloc(ch->b, sc->chan_dmat, sc->chan_size) != 0)
3053                 return (NULL);
3054
3055         HDAC_DMA_ATTR(sc, sndbuf_getbuf(ch->b), sndbuf_getmaxsize(ch->b),
3056             PAT_UNCACHEABLE);
3057
3058         return (ch);
3059 }
3060
3061 static int
3062 hdac_channel_free(kobj_t obj, void *data)
3063 {
3064         struct hdac_softc *sc;
3065         struct hdac_chan *ch;
3066
3067         ch = (struct hdac_chan *)data;
3068         sc = (ch != NULL && ch->devinfo != NULL && ch->devinfo->codec != NULL) ?
3069             ch->devinfo->codec->sc : NULL;
3070         if (ch != NULL && sc != NULL) {
3071                 HDAC_DMA_ATTR(sc, sndbuf_getbuf(ch->b),
3072                     sndbuf_getmaxsize(ch->b), PAT_WRITE_BACK);
3073         }
3074
3075         return (1);
3076 }
3077
3078 static int
3079 hdac_channel_setformat(kobj_t obj, void *data, uint32_t format)
3080 {
3081         struct hdac_chan *ch = data;
3082         int i;
3083
3084         for (i = 0; ch->caps.fmtlist[i] != 0; i++) {
3085                 if (format == ch->caps.fmtlist[i]) {
3086                         ch->fmt = format;
3087                         return (0);
3088                 }
3089         }
3090
3091         return (EINVAL);
3092 }
3093
3094 static int
3095 hdac_channel_setspeed(kobj_t obj, void *data, uint32_t speed)
3096 {
3097         struct hdac_chan *ch = data;
3098         uint32_t spd = 0, threshold;
3099         int i;
3100
3101         for (i = 0; ch->pcmrates[i] != 0; i++) {
3102                 spd = ch->pcmrates[i];
3103                 threshold = spd + ((ch->pcmrates[i + 1] != 0) ?
3104                     ((ch->pcmrates[i + 1] - spd) >> 1) : 0);
3105                 if (speed < threshold)
3106                         break;
3107         }
3108
3109         if (spd == 0)   /* impossible */
3110                 ch->spd = 48000;
3111         else
3112                 ch->spd = spd;
3113
3114         return (ch->spd);
3115 }
3116
3117 static void
3118 hdac_stream_setup(struct hdac_chan *ch)
3119 {
3120         struct hdac_softc *sc = ch->devinfo->codec->sc;
3121         struct hdac_widget *w;
3122         int i, chn, totalchn;
3123         nid_t cad = ch->devinfo->codec->cad;
3124         uint16_t fmt;
3125
3126         fmt = 0;
3127         if (ch->fmt & AFMT_S16_LE)
3128                 fmt |= ch->bit16 << 4;
3129         else if (ch->fmt & AFMT_S32_LE)
3130                 fmt |= ch->bit32 << 4;
3131         else
3132                 fmt |= 1 << 4;
3133
3134         for (i = 0; i < HDA_RATE_TAB_LEN; i++) {
3135                 if (hda_rate_tab[i].valid && ch->spd == hda_rate_tab[i].rate) {
3136                         fmt |= hda_rate_tab[i].base;
3137                         fmt |= hda_rate_tab[i].mul;
3138                         fmt |= hda_rate_tab[i].div;
3139                         break;
3140                 }
3141         }
3142
3143         if (ch->fmt & AFMT_STEREO) {
3144                 fmt |= 1;
3145                 totalchn = 2;
3146         } else
3147                 totalchn = 1;
3148
3149         HDAC_WRITE_2(&sc->mem, ch->off + HDAC_SDFMT, fmt);
3150
3151         chn = 0;
3152         for (i = 0; ch->io[i] != -1; i++) {
3153                 w = hdac_widget_get(ch->devinfo, ch->io[i]);
3154                 if (w == NULL)
3155                         continue;
3156                 HDA_BOOTVERBOSE(
3157                         device_printf(sc->dev,
3158                             "HDA_DEBUG: PCMDIR_%s: Stream setup nid=%d "
3159                             "fmt=0x%08x\n",
3160                             (ch->dir == PCMDIR_PLAY) ? "PLAY" : "REC",
3161                             ch->io[i], fmt);
3162                 );
3163                 hdac_command(sc,
3164                     HDA_CMD_SET_CONV_FMT(cad, ch->io[i], fmt), cad);
3165                 if (ch->dir == PCMDIR_REC)
3166                         hdac_command(sc,
3167                             HDA_CMD_SET_CONV_STREAM_CHAN(cad, ch->io[i],
3168                             (chn < totalchn) ? ((ch->sid << 4) | chn) : 0),
3169                             cad);
3170                 else
3171                         hdac_command(sc,
3172                             HDA_CMD_SET_CONV_STREAM_CHAN(cad, ch->io[i],
3173                             ch->sid << 4), cad);
3174                 chn +=
3175                     HDA_PARAM_AUDIO_WIDGET_CAP_STEREO(w->param.widget_cap) ?
3176                     2 : 1;
3177         }
3178 }
3179
3180 static int
3181 hdac_channel_setfragments(kobj_t obj, void *data,
3182                                         uint32_t blksz, uint32_t blkcnt)
3183 {
3184         struct hdac_chan *ch = data;
3185         struct hdac_softc *sc = ch->devinfo->codec->sc;
3186
3187         blksz &= HDA_BLK_ALIGN;
3188
3189         if (blksz > (sndbuf_getmaxsize(ch->b) / HDA_BDL_MIN))
3190                 blksz = sndbuf_getmaxsize(ch->b) / HDA_BDL_MIN;
3191         if (blksz < HDA_BLK_MIN)
3192                 blksz = HDA_BLK_MIN;
3193         if (blkcnt > HDA_BDL_MAX)
3194                 blkcnt = HDA_BDL_MAX;
3195         if (blkcnt < HDA_BDL_MIN)
3196                 blkcnt = HDA_BDL_MIN;
3197
3198         while ((blksz * blkcnt) > sndbuf_getmaxsize(ch->b)) {
3199                 if ((blkcnt >> 1) >= HDA_BDL_MIN)
3200                         blkcnt >>= 1;
3201                 else if ((blksz >> 1) >= HDA_BLK_MIN)
3202                         blksz >>= 1;
3203                 else
3204                         break;
3205         }
3206
3207         if ((sndbuf_getblksz(ch->b) != blksz ||
3208             sndbuf_getblkcnt(ch->b) != blkcnt) &&
3209             sndbuf_resize(ch->b, blkcnt, blksz) != 0)
3210                 device_printf(sc->dev, "%s: failed blksz=%u blkcnt=%u\n",
3211                     __func__, blksz, blkcnt);
3212
3213         ch->blksz = sndbuf_getblksz(ch->b);
3214         ch->blkcnt = sndbuf_getblkcnt(ch->b);
3215
3216         return (1);
3217 }
3218
3219 static int
3220 hdac_channel_setblocksize(kobj_t obj, void *data, uint32_t blksz)
3221 {
3222         struct hdac_chan *ch = data;
3223         struct hdac_softc *sc = ch->devinfo->codec->sc;
3224
3225         hdac_channel_setfragments(obj, data, blksz, sc->chan_blkcnt);
3226
3227         return (ch->blksz);
3228 }
3229
3230 static void
3231 hdac_channel_stop(struct hdac_softc *sc, struct hdac_chan *ch)
3232 {
3233         struct hdac_devinfo *devinfo = ch->devinfo;
3234         nid_t cad = devinfo->codec->cad;
3235         int i;
3236
3237         hdac_stream_stop(ch);
3238
3239         for (i = 0; ch->io[i] != -1; i++) {
3240                 hdac_command(sc,
3241                     HDA_CMD_SET_CONV_STREAM_CHAN(cad, ch->io[i],
3242                     0), cad);
3243         }
3244 }
3245
3246 static void
3247 hdac_channel_start(struct hdac_softc *sc, struct hdac_chan *ch)
3248 {
3249         ch->ptr = 0;
3250         ch->prevptr = 0;
3251         hdac_stream_stop(ch);
3252         hdac_stream_reset(ch);
3253         hdac_bdl_setup(ch);
3254         hdac_stream_setid(ch);
3255         hdac_stream_setup(ch);
3256         hdac_stream_start(ch);
3257 }
3258
3259 static int
3260 hdac_channel_trigger(kobj_t obj, void *data, int go)
3261 {
3262         struct hdac_chan *ch = data;
3263         struct hdac_softc *sc = ch->devinfo->codec->sc;
3264
3265         if (!(go == PCMTRIG_START || go == PCMTRIG_STOP || go == PCMTRIG_ABORT))
3266                 return (0);
3267
3268         hdac_lock(sc);
3269         switch (go) {
3270         case PCMTRIG_START:
3271                 hdac_channel_start(sc, ch);
3272                 break;
3273         case PCMTRIG_STOP:
3274         case PCMTRIG_ABORT:
3275                 hdac_channel_stop(sc, ch);
3276                 break;
3277         default:
3278                 break;
3279         }
3280         hdac_unlock(sc);
3281
3282         return (0);
3283 }
3284
3285 static int
3286 hdac_channel_getptr(kobj_t obj, void *data)
3287 {
3288         struct hdac_chan *ch = data;
3289         struct hdac_softc *sc = ch->devinfo->codec->sc;
3290         uint32_t ptr;
3291
3292         hdac_lock(sc);
3293         if (sc->polling != 0)
3294                 ptr = ch->ptr;
3295         else if (ch->dmapos != NULL)
3296                 ptr = *(ch->dmapos);
3297         else
3298                 ptr = HDAC_READ_4(&sc->mem, ch->off + HDAC_SDLPIB);
3299         hdac_unlock(sc);
3300
3301         /*
3302          * Round to available space and force 128 bytes aligment.
3303          */
3304         ptr %= ch->blksz * ch->blkcnt;
3305         ptr &= HDA_BLK_ALIGN;
3306
3307         return (ptr);
3308 }
3309
3310 static struct pcmchan_caps *
3311 hdac_channel_getcaps(kobj_t obj, void *data)
3312 {
3313         return (&((struct hdac_chan *)data)->caps);
3314 }
3315
3316 static kobj_method_t hdac_channel_methods[] = {
3317         KOBJMETHOD(channel_init,                hdac_channel_init),
3318         KOBJMETHOD(channel_free,                hdac_channel_free),
3319         KOBJMETHOD(channel_setformat,           hdac_channel_setformat),
3320         KOBJMETHOD(channel_setspeed,            hdac_channel_setspeed),
3321         KOBJMETHOD(channel_setblocksize,        hdac_channel_setblocksize),
3322         KOBJMETHOD(channel_trigger,             hdac_channel_trigger),
3323         KOBJMETHOD(channel_getptr,              hdac_channel_getptr),
3324         KOBJMETHOD(channel_getcaps,             hdac_channel_getcaps),
3325         KOBJMETHOD_END
3326 };
3327 CHANNEL_DECLARE(hdac_channel);
3328
3329 static void
3330 hdac_jack_poll_callback(void *arg)
3331 {
3332         struct hdac_devinfo *devinfo = arg;
3333         struct hdac_softc *sc;
3334
3335         if (devinfo == NULL || devinfo->codec == NULL ||
3336             devinfo->codec->sc == NULL)
3337                 return;
3338         sc = devinfo->codec->sc;
3339         hdac_lock(sc);
3340         if (sc->poll_ival == 0) {
3341                 hdac_unlock(sc);
3342                 return;
3343         }
3344         hdac_hp_switch_handler(devinfo);
3345         callout_reset(&sc->poll_jack, sc->poll_ival,
3346             hdac_jack_poll_callback, devinfo);
3347         hdac_unlock(sc);
3348 }
3349
3350 static int
3351 hdac_audio_ctl_ossmixer_init(struct snd_mixer *m)
3352 {
3353         struct hdac_devinfo *devinfo = mix_getdevinfo(m);
3354         struct hdac_softc *sc = devinfo->codec->sc;
3355         struct hdac_widget *w, *cw;
3356         struct hdac_audio_ctl *ctl;
3357         uint32_t mask, recmask, id;
3358         int i, j, softpcmvol;
3359         nid_t cad;
3360
3361         hdac_lock(sc);
3362
3363         mask = 0;
3364         recmask = 0;
3365
3366         id = hdac_codec_id(devinfo);
3367         cad = devinfo->codec->cad;
3368         for (i = 0; i < HDAC_HP_SWITCH_LEN; i++) {
3369                 if (!(HDA_DEV_MATCH(hdac_hp_switch[i].model,
3370                     sc->pci_subvendor) && hdac_hp_switch[i].id == id))
3371                         continue;
3372                 w = hdac_widget_get(devinfo, hdac_hp_switch[i].hpnid);
3373                 if (w == NULL || w->enable == 0 || w->type !=
3374                     HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX)
3375                         continue;
3376                 if (hdac_hp_switch[i].polling != 0)
3377                         callout_reset(&sc->poll_jack, 1,
3378                             hdac_jack_poll_callback, devinfo);
3379                 else if (HDA_PARAM_AUDIO_WIDGET_CAP_UNSOL_CAP(w->param.widget_cap))
3380                         hdac_command(sc,
3381                             HDA_CMD_SET_UNSOLICITED_RESPONSE(cad, w->nid,
3382                             HDA_CMD_SET_UNSOLICITED_RESPONSE_ENABLE |
3383                             HDAC_UNSOLTAG_EVENT_HP), cad);
3384                 else
3385                         continue;
3386                 hdac_hp_switch_handler(devinfo);
3387                 HDA_BOOTVERBOSE(
3388                         device_printf(sc->dev,
3389                             "HDA_DEBUG: Enabling headphone/speaker "
3390                             "audio routing switching:\n");
3391                         device_printf(sc->dev,
3392                             "HDA_DEBUG: \tindex=%d nid=%d "
3393                             "pci_subvendor=0x%08x "
3394                             "codec=0x%08x [%s]\n",
3395                             i, w->nid, sc->pci_subvendor, id,
3396                             (hdac_hp_switch[i].polling != 0) ? "POLL" :
3397                             "UNSOL");
3398                 );
3399                 break;
3400         }
3401         for (i = 0; i < HDAC_EAPD_SWITCH_LEN; i++) {
3402                 if (!(HDA_DEV_MATCH(hdac_eapd_switch[i].model,
3403                     sc->pci_subvendor) &&
3404                     hdac_eapd_switch[i].id == id))
3405                         continue;
3406                 w = hdac_widget_get(devinfo, hdac_eapd_switch[i].eapdnid);
3407                 if (w == NULL || w->enable == 0)
3408                         break;
3409                 if (w->type != HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX ||
3410                     w->param.eapdbtl == HDAC_INVALID)
3411                         break;
3412                 mask |= SOUND_MASK_OGAIN;
3413                 break;
3414         }
3415
3416         for (i = devinfo->startnode; i < devinfo->endnode; i++) {
3417                 w = hdac_widget_get(devinfo, i);
3418                 if (w == NULL || w->enable == 0)
3419                         continue;
3420                 mask |= w->ctlflags;
3421                 if (!(w->pflags & HDA_ADC_RECSEL))
3422                         continue;
3423                 for (j = 0; j < w->nconns; j++) {
3424                         cw = hdac_widget_get(devinfo, w->conns[j]);
3425                         if (cw == NULL || cw->enable == 0)
3426                                 continue;
3427                         recmask |= cw->ctlflags;
3428                 }
3429         }
3430
3431         if (!(mask & SOUND_MASK_PCM)) {
3432                 softpcmvol = 1;
3433                 mask |= SOUND_MASK_PCM;
3434         } else
3435                 softpcmvol = (devinfo->function.audio.quirks &
3436                     HDA_QUIRK_SOFTPCMVOL) ? 1 : 0;
3437
3438         i = 0;
3439         ctl = NULL;
3440         while ((ctl = hdac_audio_ctl_each(devinfo, &i)) != NULL) {
3441                 if (ctl->widget == NULL || ctl->enable == 0)
3442                         continue;
3443                 if (!(ctl->ossmask & SOUND_MASK_PCM))
3444                         continue;
3445                 if (ctl->step > 0)
3446                         break;
3447         }
3448
3449         if (softpcmvol == 1 || ctl == NULL) {
3450                 pcm_setflags(sc->dev, pcm_getflags(sc->dev) | SD_F_SOFTPCMVOL);
3451                 HDA_BOOTVERBOSE(
3452                         device_printf(sc->dev,
3453                             "HDA_DEBUG: %s Soft PCM volume\n",
3454                             (softpcmvol == 1) ?
3455                             "Forcing" : "Enabling");
3456                 );
3457                 i = 0;
3458                 /*
3459                  * XXX Temporary quirk for STAC9220, until the parser
3460                  *     become smarter.
3461                  */
3462                 if (id == HDA_CODEC_STAC9220) {
3463                         mask |= SOUND_MASK_VOLUME;
3464                         while ((ctl = hdac_audio_ctl_each(devinfo, &i)) !=
3465                             NULL) {
3466                                 if (ctl->widget == NULL || ctl->enable == 0)
3467                                         continue;
3468                                 if (ctl->widget->nid == 11 && ctl->index == 0) {
3469                                         ctl->ossmask = SOUND_MASK_VOLUME;
3470                                         ctl->ossval = 100 | (100 << 8);
3471                                 } else
3472                                         ctl->ossmask &= ~SOUND_MASK_VOLUME;
3473                         }
3474                 } else if (id == HDA_CODEC_STAC9221) {
3475                         mask |= SOUND_MASK_VOLUME;
3476                         while ((ctl = hdac_audio_ctl_each(devinfo, &i)) !=
3477                             NULL) {
3478                                 if (ctl->widget == NULL)
3479                                         continue;
3480                                 if (ctl->widget->type ==
3481                                     HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_OUTPUT &&
3482                                     ctl->index == 0 && (ctl->widget->nid == 2 ||
3483                                     ctl->widget->enable != 0)) {
3484                                         ctl->enable = 1;
3485                                         ctl->ossmask = SOUND_MASK_VOLUME;
3486                                         ctl->ossval = 100 | (100 << 8);
3487                                 } else if (ctl->enable == 0)
3488                                         continue;
3489                                 else
3490                                         ctl->ossmask &= ~SOUND_MASK_VOLUME;
3491                         }
3492                 } else {
3493                         mix_setparentchild(m, SOUND_MIXER_VOLUME,
3494                             SOUND_MASK_PCM);
3495                         if (!(mask & SOUND_MASK_VOLUME))
3496                                 mix_setrealdev(m, SOUND_MIXER_VOLUME,
3497                                     SOUND_MIXER_NONE);
3498                         while ((ctl = hdac_audio_ctl_each(devinfo, &i)) !=
3499                             NULL) {
3500                                 if (ctl->widget == NULL || ctl->enable == 0)
3501                                         continue;
3502                                 if (!HDA_FLAG_MATCH(ctl->ossmask,
3503                                     SOUND_MASK_VOLUME | SOUND_MASK_PCM))
3504                                         continue;
3505                                 if (!(ctl->mute == 1 && ctl->step == 0))
3506                                         ctl->enable = 0;
3507                         }
3508                 }
3509         }
3510
3511         recmask &= ~(SOUND_MASK_PCM | SOUND_MASK_RECLEV | SOUND_MASK_SPEAKER |
3512             SOUND_MASK_BASS | SOUND_MASK_TREBLE | SOUND_MASK_IGAIN |
3513             SOUND_MASK_OGAIN);
3514         recmask &= (1 << SOUND_MIXER_NRDEVICES) - 1;
3515         mask &= (1 << SOUND_MIXER_NRDEVICES) - 1;
3516
3517         mix_setrecdevs(m, recmask);
3518         mix_setdevs(m, mask);
3519
3520         hdac_unlock(sc);
3521
3522         return (0);
3523 }
3524
3525 static int
3526 hdac_audio_ctl_ossmixer_set(struct snd_mixer *m, unsigned dev,
3527                                         unsigned left, unsigned right)
3528 {
3529         struct hdac_devinfo *devinfo = mix_getdevinfo(m);
3530         struct hdac_softc *sc = devinfo->codec->sc;
3531         struct hdac_widget *w;
3532         struct hdac_audio_ctl *ctl;
3533         uint32_t id, mute;
3534         int lvol, rvol, mlvol, mrvol;
3535         int i = 0;
3536
3537         hdac_lock(sc);
3538         if (dev == SOUND_MIXER_OGAIN) {
3539                 uint32_t orig;
3540                 /*if (left != right || !(left == 0 || left == 1)) {
3541                         hdac_unlock(sc);
3542                         return (-1);
3543                 }*/
3544                 id = hdac_codec_id(devinfo);
3545                 for (i = 0; i < HDAC_EAPD_SWITCH_LEN; i++) {
3546                         if (HDA_DEV_MATCH(hdac_eapd_switch[i].model,
3547                             sc->pci_subvendor) &&
3548                             hdac_eapd_switch[i].id == id)
3549                                 break;
3550                 }
3551                 if (i >= HDAC_EAPD_SWITCH_LEN) {
3552                         hdac_unlock(sc);
3553                         return (-1);
3554                 }
3555                 w = hdac_widget_get(devinfo, hdac_eapd_switch[i].eapdnid);
3556                 if (w == NULL ||
3557                     w->type != HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX ||
3558                     w->param.eapdbtl == HDAC_INVALID) {
3559                         hdac_unlock(sc);
3560                         return (-1);
3561                 }
3562                 orig = w->param.eapdbtl;
3563                 if (left == 0)
3564                         w->param.eapdbtl &= ~HDA_CMD_SET_EAPD_BTL_ENABLE_EAPD;
3565                 else
3566                         w->param.eapdbtl |= HDA_CMD_SET_EAPD_BTL_ENABLE_EAPD;
3567                 if (orig != w->param.eapdbtl) {
3568                         uint32_t val;
3569
3570                         if (hdac_eapd_switch[i].hp_switch != 0)
3571                                 hdac_hp_switch_handler(devinfo);
3572                         val = w->param.eapdbtl;
3573                         if (devinfo->function.audio.quirks & HDA_QUIRK_EAPDINV)
3574                                 val ^= HDA_CMD_SET_EAPD_BTL_ENABLE_EAPD;
3575                         hdac_command(sc,
3576                             HDA_CMD_SET_EAPD_BTL_ENABLE(devinfo->codec->cad,
3577                             w->nid, val), devinfo->codec->cad);
3578                 }
3579                 hdac_unlock(sc);
3580                 return (left | (left << 8));
3581         }
3582         if (dev == SOUND_MIXER_VOLUME)
3583                 devinfo->function.audio.mvol = left | (right << 8);
3584
3585         mlvol = devinfo->function.audio.mvol & 0x7f;
3586         mrvol = (devinfo->function.audio.mvol >> 8) & 0x7f;
3587         lvol = 0;
3588         rvol = 0;
3589
3590         i = 0;
3591         while ((ctl = hdac_audio_ctl_each(devinfo, &i)) != NULL) {
3592                 if (ctl->widget == NULL || ctl->enable == 0 ||
3593                     !(ctl->ossmask & (1 << dev)))
3594                         continue;
3595                 switch (dev) {
3596                 case SOUND_MIXER_VOLUME:
3597                         lvol = ((ctl->ossval & 0x7f) * left) / 100;
3598                         lvol = (lvol * ctl->step) / 100;
3599                         rvol = (((ctl->ossval >> 8) & 0x7f) * right) / 100;
3600                         rvol = (rvol * ctl->step) / 100;
3601                         break;
3602                 default:
3603                         if (ctl->ossmask & SOUND_MASK_VOLUME) {
3604                                 lvol = (left * mlvol) / 100;
3605                                 lvol = (lvol * ctl->step) / 100;
3606                                 rvol = (right * mrvol) / 100;
3607                                 rvol = (rvol * ctl->step) / 100;
3608                         } else {
3609                                 lvol = (left * ctl->step) / 100;
3610                                 rvol = (right * ctl->step) / 100;
3611                         }
3612                         ctl->ossval = left | (right << 8);
3613                         break;
3614                 }
3615                 mute = 0;
3616                 if (ctl->step < 1) {
3617                         mute |= (left == 0) ? HDA_AMP_MUTE_LEFT :
3618                             (ctl->muted & HDA_AMP_MUTE_LEFT);
3619                         mute |= (right == 0) ? HDA_AMP_MUTE_RIGHT :
3620                             (ctl->muted & HDA_AMP_MUTE_RIGHT);
3621                 } else {
3622                         mute |= (lvol == 0) ? HDA_AMP_MUTE_LEFT :
3623                             (ctl->muted & HDA_AMP_MUTE_LEFT);
3624                         mute |= (rvol == 0) ? HDA_AMP_MUTE_RIGHT :
3625                             (ctl->muted & HDA_AMP_MUTE_RIGHT);
3626                 }
3627                 hdac_audio_ctl_amp_set(ctl, mute, lvol, rvol);
3628         }
3629         hdac_unlock(sc);
3630
3631         return (left | (right << 8));
3632 }
3633
3634 static int
3635 hdac_audio_ctl_ossmixer_setrecsrc(struct snd_mixer *m, uint32_t src)
3636 {
3637         struct hdac_devinfo *devinfo = mix_getdevinfo(m);
3638         struct hdac_widget *w, *cw;
3639         struct hdac_softc *sc = devinfo->codec->sc;
3640         uint32_t ret = src, target;
3641         int i, j;
3642
3643         target = 0;
3644         for (i = 0; i < SOUND_MIXER_NRDEVICES; i++) {
3645                 if (src & (1 << i)) {
3646                         target = 1 << i;
3647                         break;
3648                 }
3649         }
3650
3651         hdac_lock(sc);
3652
3653         for (i = devinfo->startnode; i < devinfo->endnode; i++) {
3654                 w = hdac_widget_get(devinfo, i);
3655                 if (w == NULL || w->enable == 0)
3656                         continue;
3657                 if (!(w->pflags & HDA_ADC_RECSEL))
3658                         continue;
3659                 for (j = 0; j < w->nconns; j++) {
3660                         cw = hdac_widget_get(devinfo, w->conns[j]);
3661                         if (cw == NULL || cw->enable == 0)
3662                                 continue;
3663                         if ((target == SOUND_MASK_VOLUME &&
3664                             cw->type !=
3665                             HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_MIXER) ||
3666                             (target != SOUND_MASK_VOLUME &&
3667                             cw->type ==
3668                             HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_MIXER))
3669                                 continue;
3670                         if (cw->ctlflags & target) {
3671                                 if (!(w->pflags & HDA_ADC_LOCKED))
3672                                         hdac_widget_connection_select(w, j);
3673                                 ret = target;
3674                                 j += w->nconns;
3675                         }
3676                 }
3677         }
3678
3679         hdac_unlock(sc);
3680
3681         return (ret);
3682 }
3683
3684 static kobj_method_t hdac_audio_ctl_ossmixer_methods[] = {
3685         KOBJMETHOD(mixer_init,          hdac_audio_ctl_ossmixer_init),
3686         KOBJMETHOD(mixer_set,           hdac_audio_ctl_ossmixer_set),
3687         KOBJMETHOD(mixer_setrecsrc,     hdac_audio_ctl_ossmixer_setrecsrc),
3688         KOBJMETHOD_END
3689 };
3690 MIXER_DECLARE(hdac_audio_ctl_ossmixer);
3691
3692 static void
3693 hdac_unsolq_task(void *context, int pending)
3694 {
3695         struct hdac_softc *sc;
3696
3697         sc = (struct hdac_softc *)context;
3698
3699         hdac_lock(sc);
3700         hdac_unsolq_flush(sc);
3701         hdac_unlock(sc);
3702 }
3703
3704 /****************************************************************************
3705  * int hdac_attach(device_t)
3706  *
3707  * Attach the device into the kernel. Interrupts usually won't be enabled
3708  * when this function is called. Setup everything that doesn't require
3709  * interrupts and defer probing of codecs until interrupts are enabled.
3710  ****************************************************************************/
3711 static int
3712 hdac_attach(device_t dev)
3713 {
3714         struct hdac_softc *sc;
3715         int result;
3716         int i;
3717         uint16_t vendor;
3718         uint8_t v;
3719
3720         sc = kmalloc(sizeof(*sc), M_DEVBUF, M_WAITOK | M_ZERO);
3721         sc->lock = snd_mtxcreate(device_get_nameunit(dev), HDAC_MTX_NAME);
3722         sc->dev = dev;
3723         sc->pci_subvendor = (uint32_t)pci_get_subdevice(sc->dev) << 16;
3724         sc->pci_subvendor |= (uint32_t)pci_get_subvendor(sc->dev) & 0x0000ffff;
3725         vendor = pci_get_vendor(dev);
3726
3727         if (sc->pci_subvendor == HP_NX6325_SUBVENDORX) {
3728                 /* Screw nx6325 - subdevice/subvendor swapped */
3729                 sc->pci_subvendor = HP_NX6325_SUBVENDOR;
3730         }
3731
3732         callout_init(&sc->poll_hda);
3733         callout_init(&sc->poll_hdac);
3734         callout_init(&sc->poll_jack);
3735
3736         TASK_INIT(&sc->unsolq_task, 0, hdac_unsolq_task, sc);
3737
3738         sc->poll_ticks = 1;
3739         sc->poll_ival = HDAC_POLL_INTERVAL;
3740         if (resource_int_value(device_get_name(dev),
3741             device_get_unit(dev), "polling", &i) == 0 && i != 0)
3742                 sc->polling = 1;
3743         else
3744                 sc->polling = 0;
3745
3746         sc->chan_size = pcm_getbuffersize(dev,
3747             HDA_BUFSZ_MIN, HDA_BUFSZ_DEFAULT, HDA_BUFSZ_MAX);
3748
3749         if (resource_int_value(device_get_name(dev),
3750             device_get_unit(dev), "blocksize", &i) == 0 && i > 0) {
3751                 i &= HDA_BLK_ALIGN;
3752                 if (i < HDA_BLK_MIN)
3753                         i = HDA_BLK_MIN;
3754                 sc->chan_blkcnt = sc->chan_size / i;
3755                 i = 0;
3756                 while (sc->chan_blkcnt >> i)
3757                         i++;
3758                 sc->chan_blkcnt = 1 << (i - 1);
3759                 if (sc->chan_blkcnt < HDA_BDL_MIN)
3760                         sc->chan_blkcnt = HDA_BDL_MIN;
3761                 else if (sc->chan_blkcnt > HDA_BDL_MAX)
3762                         sc->chan_blkcnt = HDA_BDL_MAX;
3763         } else
3764                 sc->chan_blkcnt = HDA_BDL_DEFAULT;
3765
3766         result = bus_dma_tag_create(NULL,       /* parent */
3767             HDAC_DMA_ALIGNMENT,                 /* alignment */
3768             0,                                  /* boundary */
3769             BUS_SPACE_MAXADDR_32BIT,            /* lowaddr */
3770             BUS_SPACE_MAXADDR,                  /* highaddr */
3771             NULL,                               /* filtfunc */
3772             NULL,                               /* fistfuncarg */
3773             sc->chan_size,                      /* maxsize */
3774             1,                                  /* nsegments */
3775             sc->chan_size,                      /* maxsegsz */
3776             0,                                  /* flags */
3777             &sc->chan_dmat);                    /* dmat */
3778         if (result != 0) {
3779                 device_printf(dev, "%s: bus_dma_tag_create failed (%x)\n",
3780                      __func__, result);
3781                 snd_mtxfree(sc->lock);
3782                 kfree(sc, M_DEVBUF);
3783                 return (ENXIO);
3784         }
3785
3786
3787         sc->hdabus = NULL;
3788         for (i = 0; i < HDAC_CODEC_MAX; i++)
3789                 sc->codecs[i] = NULL;
3790
3791         pci_enable_busmaster(dev);
3792
3793         if (vendor == INTEL_VENDORID) {
3794                 /* TCSEL -> TC0 */
3795                 v = pci_read_config(dev, 0x44, 1);
3796                 pci_write_config(dev, 0x44, v & 0xf8, 1);
3797                 HDA_BOOTVERBOSE(
3798                         device_printf(dev, "TCSEL: 0x%02d -> 0x%02d\n", v,
3799                             pci_read_config(dev, 0x44, 1));
3800                 );
3801         }
3802
3803 #if 0 /* TODO: No uncacheable DMA support in DragonFly. */
3804         sc->flags |= HDAC_F_DMA_NOCACHE;
3805
3806         if (resource_int_value(device_get_name(dev),
3807             device_get_unit(dev), "snoop", &i) == 0 && i != 0) {
3808 #else
3809         sc->flags &= ~HDAC_F_DMA_NOCACHE;
3810 #endif
3811
3812                 /*
3813                  * Try to enable PCIe snoop to avoid messing around with
3814                  * uncacheable DMA attribute. Since PCIe snoop register
3815                  * config is pretty much vendor specific, there are no
3816                  * general solutions on how to enable it, forcing us (even
3817                  * Microsoft) to enable uncacheable or write combined DMA
3818                  * by default.
3819                  *
3820                  * http://msdn2.microsoft.com/en-us/library/ms790324.aspx
3821                  */
3822                 for (i = 0; i < HDAC_PCIESNOOP_LEN; i++) {
3823                         if (hdac_pcie_snoop[i].vendor != vendor)
3824                                 continue;
3825                         sc->flags &= ~HDAC_F_DMA_NOCACHE;
3826                         if (hdac_pcie_snoop[i].reg == 0x00)
3827                                 break;
3828                         v = pci_read_config(dev, hdac_pcie_snoop[i].reg, 1);
3829                         if ((v & hdac_pcie_snoop[i].enable) ==
3830                             hdac_pcie_snoop[i].enable)
3831                                 break;
3832                         v &= hdac_pcie_snoop[i].mask;
3833                         v |= hdac_pcie_snoop[i].enable;
3834                         pci_write_config(dev, hdac_pcie_snoop[i].reg, v, 1);
3835                         v = pci_read_config(dev, hdac_pcie_snoop[i].reg, 1);
3836                         if ((v & hdac_pcie_snoop[i].enable) !=
3837                             hdac_pcie_snoop[i].enable) {
3838                                 HDA_BOOTVERBOSE(
3839                                         device_printf(dev,
3840                                             "WARNING: Failed to enable PCIe "
3841                                             "snoop!\n");
3842                                 );
3843 #if 0 /* TODO: No uncacheable DMA support in DragonFly. */
3844                                 sc->flags |= HDAC_F_DMA_NOCACHE;
3845 #endif
3846                         }
3847                         break;
3848                 }
3849
3850                 if (pci_is_pcie(dev)) {
3851                         int pcie_cap = pci_get_pciecap_ptr(dev);
3852                         uint16_t dev_ctl;
3853
3854                         dev_ctl = pci_read_config(dev,
3855                             pcie_cap + PCIER_DEVCTRL, 2);
3856                         if (bootverbose) {
3857                                 device_printf(dev, "device ctrl %#x\n",
3858                                     dev_ctl);
3859                         }
3860
3861                         if (dev_ctl & PCIEM_DEVCTL_NOSNOOP) {
3862                                 dev_ctl &= ~PCIEM_DEVCTL_NOSNOOP;
3863                                 pci_write_config(dev,
3864                                     pcie_cap + PCIER_DEVCTRL, dev_ctl, 2);
3865
3866                                 if (bootverbose)
3867                                         device_printf(dev, "disable nosnoop\n");
3868                         }
3869                         sc->flags &= ~HDAC_F_DMA_NOCACHE;
3870                 }
3871
3872 #if 0 /* TODO: No uncacheable DMA support in DragonFly. */
3873         }
3874 #endif
3875
3876         HDA_BOOTVERBOSE(
3877                 device_printf(dev, "DMA Coherency: %s / vendor=0x%04x\n",
3878                     (sc->flags & HDAC_F_DMA_NOCACHE) ?
3879                     "Uncacheable" : "PCIe snoop", vendor);
3880         );
3881
3882         /* Allocate resources */
3883         result = hdac_mem_alloc(sc);
3884         if (result != 0)
3885                 goto hdac_attach_fail;
3886         result = hdac_irq_alloc(sc);
3887         if (result != 0)
3888                 goto hdac_attach_fail;
3889
3890         /* Get Capabilities */
3891         result = hdac_get_capabilities(sc);
3892         if (result != 0)
3893                 goto hdac_attach_fail;
3894
3895         /* Allocate CORB and RIRB dma memory */
3896         result = hdac_dma_alloc(sc, &sc->corb_dma,
3897             sc->corb_size * sizeof(uint32_t));
3898         if (result != 0)
3899                 goto hdac_attach_fail;
3900         result = hdac_dma_alloc(sc, &sc->rirb_dma,
3901             sc->rirb_size * sizeof(struct hdac_rirb));
3902         if (result != 0)
3903                 goto hdac_attach_fail;
3904
3905         /* Quiesce everything */
3906         hdac_reset(sc);
3907
3908         /* Initialize the CORB and RIRB */
3909         hdac_corb_init(sc);
3910         hdac_rirb_init(sc);
3911
3912         /* Defer remaining of initialization until interrupts are enabled */
3913         sc->intrhook.ich_func = hdac_attach2;
3914         sc->intrhook.ich_arg = (void *)sc;
3915         sc->intrhook.ich_desc = "snd_hda";
3916         if (cold == 0 || config_intrhook_establish(&sc->intrhook) != 0) {
3917                 sc->intrhook.ich_func = NULL;
3918                 hdac_attach2(sc);
3919         }
3920
3921         return (0);
3922
3923 hdac_attach_fail:
3924         hdac_irq_free(sc);
3925         hdac_dma_free(sc, &sc->rirb_dma);
3926         hdac_dma_free(sc, &sc->corb_dma);
3927         hdac_mem_free(sc);
3928         snd_mtxfree(sc->lock);
3929         kfree(sc, M_DEVBUF);
3930
3931         return (ENXIO);
3932 }
3933
3934 static void
3935 hdac_audio_parse(struct hdac_devinfo *devinfo)
3936 {
3937         struct hdac_softc *sc = devinfo->codec->sc;
3938         struct hdac_widget *w;
3939         uint32_t res;
3940         int i;
3941         nid_t cad, nid;
3942
3943         cad = devinfo->codec->cad;
3944         nid = devinfo->nid;
3945
3946         hdac_command(sc,
3947             HDA_CMD_SET_POWER_STATE(cad, nid, HDA_CMD_POWER_STATE_D0), cad);
3948
3949         DELAY(100);
3950
3951         res = hdac_command(sc,
3952             HDA_CMD_GET_PARAMETER(cad , nid, HDA_PARAM_SUB_NODE_COUNT), cad);
3953
3954         devinfo->nodecnt = HDA_PARAM_SUB_NODE_COUNT_TOTAL(res);
3955         devinfo->startnode = HDA_PARAM_SUB_NODE_COUNT_START(res);
3956         devinfo->endnode = devinfo->startnode + devinfo->nodecnt;
3957
3958         res = hdac_command(sc,
3959             HDA_CMD_GET_PARAMETER(cad , nid, HDA_PARAM_GPIO_COUNT), cad);
3960         devinfo->function.audio.gpio = res;
3961
3962         HDA_BOOTVERBOSE(
3963                 device_printf(sc->dev, "       Vendor: 0x%08x\n",
3964                     devinfo->vendor_id);
3965                 device_printf(sc->dev, "       Device: 0x%08x\n",
3966                     devinfo->device_id);
3967                 device_printf(sc->dev, "     Revision: 0x%08x\n",
3968                     devinfo->revision_id);
3969                 device_printf(sc->dev, "     Stepping: 0x%08x\n",
3970                     devinfo->stepping_id);
3971                 device_printf(sc->dev, "PCI Subvendor: 0x%08x\n",
3972                     sc->pci_subvendor);
3973                 device_printf(sc->dev, "        Nodes: start=%d "
3974                     "endnode=%d total=%d\n",
3975                     devinfo->startnode, devinfo->endnode, devinfo->nodecnt);
3976                 device_printf(sc->dev, "    CORB size: %d\n", sc->corb_size);
3977                 device_printf(sc->dev, "    RIRB size: %d\n", sc->rirb_size);
3978                 device_printf(sc->dev, "      Streams: ISS=%d OSS=%d BSS=%d\n",
3979                     sc->num_iss, sc->num_oss, sc->num_bss);
3980                 device_printf(sc->dev, "         GPIO: 0x%08x\n",
3981                     devinfo->function.audio.gpio);
3982                 device_printf(sc->dev, "               NumGPIO=%d NumGPO=%d "
3983                     "NumGPI=%d GPIWake=%d GPIUnsol=%d\n",
3984                     HDA_PARAM_GPIO_COUNT_NUM_GPIO(devinfo->function.audio.gpio),
3985                     HDA_PARAM_GPIO_COUNT_NUM_GPO(devinfo->function.audio.gpio),
3986                     HDA_PARAM_GPIO_COUNT_NUM_GPI(devinfo->function.audio.gpio),
3987                     HDA_PARAM_GPIO_COUNT_GPI_WAKE(devinfo->function.audio.gpio),
3988                     HDA_PARAM_GPIO_COUNT_GPI_UNSOL(devinfo->function.audio.gpio));
3989         );
3990
3991         res = hdac_command(sc,
3992             HDA_CMD_GET_PARAMETER(cad, nid, HDA_PARAM_SUPP_STREAM_FORMATS),
3993             cad);
3994         devinfo->function.audio.supp_stream_formats = res;
3995
3996         res = hdac_command(sc,
3997             HDA_CMD_GET_PARAMETER(cad, nid, HDA_PARAM_SUPP_PCM_SIZE_RATE),
3998             cad);
3999         devinfo->function.audio.supp_pcm_size_rate = res;
4000
4001         res = hdac_command(sc,
4002             HDA_CMD_GET_PARAMETER(cad, nid, HDA_PARAM_OUTPUT_AMP_CAP),
4003             cad);
4004         devinfo->function.audio.outamp_cap = res;
4005
4006         res = hdac_command(sc,
4007             HDA_CMD_GET_PARAMETER(cad, nid, HDA_PARAM_INPUT_AMP_CAP),
4008             cad);
4009         devinfo->function.audio.inamp_cap = res;
4010
4011         if (devinfo->nodecnt > 0)
4012                 devinfo->widget = kmalloc(
4013                     sizeof(*(devinfo->widget)) * devinfo->nodecnt,
4014                     M_HDAC, M_WAITOK | M_ZERO);
4015         else
4016                 devinfo->widget = NULL;
4017
4018         if (devinfo->widget == NULL) {
4019                 device_printf(sc->dev, "unable to allocate widgets!\n");
4020                 devinfo->endnode = devinfo->startnode;
4021                 devinfo->nodecnt = 0;
4022                 return;
4023         }
4024
4025         for (i = devinfo->startnode; i < devinfo->endnode; i++) {
4026                 w = hdac_widget_get(devinfo, i);
4027                 if (w == NULL)
4028                         device_printf(sc->dev, "Ghost widget! nid=%d!\n", i);
4029                 else {
4030                         w->devinfo = devinfo;
4031                         w->nid = i;
4032                         w->enable = 1;
4033                         w->selconn = -1;
4034                         w->pflags = 0;
4035                         w->ctlflags = 0;
4036                         w->param.eapdbtl = HDAC_INVALID;
4037                         hdac_widget_parse(w);
4038                 }
4039         }
4040 }
4041
4042 static void
4043 hdac_audio_ctl_parse(struct hdac_devinfo *devinfo)
4044 {
4045         struct hdac_softc *sc = devinfo->codec->sc;
4046         struct hdac_audio_ctl *ctls;
4047         struct hdac_widget *w, *cw;
4048         int i, j, cnt, max, ocap, icap;
4049         int mute, offset, step, size;
4050
4051         /* XXX This is redundant */
4052         max = 0;
4053         for (i = devinfo->startnode; i < devinfo->endnode; i++) {
4054                 w = hdac_widget_get(devinfo, i);
4055                 if (w == NULL || w->enable == 0)
4056                         continue;
4057                 if (w->param.outamp_cap != 0)
4058                         max++;
4059                 if (w->param.inamp_cap != 0) {
4060                         switch (w->type) {
4061                         case HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_SELECTOR:
4062                         case HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_MIXER:
4063                                 for (j = 0; j < w->nconns; j++) {
4064                                         cw = hdac_widget_get(devinfo,
4065                                             w->conns[j]);
4066                                         if (cw == NULL || cw->enable == 0)
4067                                                 continue;
4068                                         max++;
4069                                 }
4070                                 break;
4071                         default:
4072                                 max++;
4073                                 break;
4074                         }
4075                 }
4076         }
4077
4078         devinfo->function.audio.ctlcnt = max;
4079
4080         if (max < 1)
4081                 return;
4082
4083         ctls = kmalloc(sizeof(*ctls) * max, M_HDAC, M_ZERO | M_WAITOK);
4084         cnt = 0;
4085         for (i = devinfo->startnode; cnt < max && i < devinfo->endnode; i++) {
4086                 if (cnt >= max) {
4087                         device_printf(sc->dev, "%s: Ctl overflow!\n",
4088                             __func__);
4089                         break;
4090                 }
4091                 w = hdac_widget_get(devinfo, i);
4092                 if (w == NULL || w->enable == 0)
4093                         continue;
4094                 ocap = w->param.outamp_cap;
4095                 icap = w->param.inamp_cap;
4096                 if (ocap != 0) {
4097                         mute = HDA_PARAM_OUTPUT_AMP_CAP_MUTE_CAP(ocap);
4098                         step = HDA_PARAM_OUTPUT_AMP_CAP_NUMSTEPS(ocap);
4099                         size = HDA_PARAM_OUTPUT_AMP_CAP_STEPSIZE(ocap);
4100                         offset = HDA_PARAM_OUTPUT_AMP_CAP_OFFSET(ocap);
4101                         /*if (offset > step) {
4102                                 HDA_BOOTVERBOSE(
4103                                         device_printf(sc->dev,
4104                                             "HDA_DEBUG: BUGGY outamp: nid=%d "
4105                                             "[offset=%d > step=%d]\n",
4106                                             w->nid, offset, step);
4107                                 );
4108                                 offset = step;
4109                         }*/
4110                         ctls[cnt].enable = 1;
4111                         ctls[cnt].widget = w;
4112                         ctls[cnt].mute = mute;
4113                         ctls[cnt].step = step;
4114                         ctls[cnt].size = size;
4115                         ctls[cnt].offset = offset;
4116                         ctls[cnt].left = offset;
4117                         ctls[cnt].right = offset;
4118                         ctls[cnt++].dir = HDA_CTL_OUT;
4119                 }
4120
4121                 if (icap != 0) {
4122                         mute = HDA_PARAM_OUTPUT_AMP_CAP_MUTE_CAP(icap);
4123                         step = HDA_PARAM_OUTPUT_AMP_CAP_NUMSTEPS(icap);
4124                         size = HDA_PARAM_OUTPUT_AMP_CAP_STEPSIZE(icap);
4125                         offset = HDA_PARAM_OUTPUT_AMP_CAP_OFFSET(icap);
4126                         /*if (offset > step) {
4127                                 HDA_BOOTVERBOSE(
4128                                         device_printf(sc->dev,
4129                                             "HDA_DEBUG: BUGGY inamp: nid=%d "
4130                                             "[offset=%d > step=%d]\n",
4131                                             w->nid, offset, step);
4132                                 );
4133                                 offset = step;
4134                         }*/
4135                         switch (w->type) {
4136                         case HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_SELECTOR:
4137                         case HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_MIXER:
4138                                 for (j = 0; j < w->nconns; j++) {
4139                                         if (cnt >= max) {
4140                                                 device_printf(sc->dev,
4141                                                     "%s: Ctl overflow!\n",
4142                                                     __func__);
4143                                                 break;
4144                                         }
4145                                         cw = hdac_widget_get(devinfo,
4146                                             w->conns[j]);
4147                                         if (cw == NULL || cw->enable == 0)
4148                                                 continue;
4149                                         ctls[cnt].enable = 1;
4150                                         ctls[cnt].widget = w;
4151                                         ctls[cnt].childwidget = cw;
4152                                         ctls[cnt].index = j;
4153                                         ctls[cnt].mute = mute;
4154                                         ctls[cnt].step = step;
4155                                         ctls[cnt].size = size;
4156                                         ctls[cnt].offset = offset;
4157                                         ctls[cnt].left = offset;
4158                                         ctls[cnt].right = offset;
4159                                         ctls[cnt++].dir = HDA_CTL_IN;
4160                                 }
4161                                 break;
4162                         default:
4163                                 if (cnt >= max) {
4164                                         device_printf(sc->dev,
4165                                             "%s: Ctl overflow!\n",
4166                                             __func__);
4167                                         break;
4168                                 }
4169                                 ctls[cnt].enable = 1;
4170                                 ctls[cnt].widget = w;
4171                                 ctls[cnt].mute = mute;
4172                                 ctls[cnt].step = step;
4173                                 ctls[cnt].size = size;
4174                                 ctls[cnt].offset = offset;
4175                                 ctls[cnt].left = offset;
4176                                 ctls[cnt].right = offset;
4177                                 ctls[cnt++].dir = HDA_CTL_IN;
4178                                 break;
4179                         }
4180                 }
4181         }
4182
4183         devinfo->function.audio.ctl = ctls;
4184 }
4185
4186 static const struct {
4187         uint32_t model;
4188         uint32_t id;
4189         uint32_t set, unset;
4190 } hdac_quirks[] = {
4191         /*
4192          * XXX Force stereo quirk. Monoural recording / playback
4193          *     on few codecs (especially ALC880) seems broken or
4194          *     perhaps unsupported.
4195          */
4196         { HDA_MATCH_ALL, HDA_MATCH_ALL,
4197             HDA_QUIRK_FORCESTEREO | HDA_QUIRK_IVREF, 0 },
4198         { ACER_ALL_SUBVENDOR, HDA_MATCH_ALL,
4199             HDA_QUIRK_GPIO0, 0 },
4200         { ASUS_M5200_SUBVENDOR, HDA_CODEC_ALC880,
4201             HDA_QUIRK_GPIO0, 0 },
4202         { ASUS_A7M_SUBVENDOR, HDA_CODEC_ALC880,
4203             HDA_QUIRK_GPIO0, 0 },
4204         { ASUS_A7T_SUBVENDOR, HDA_CODEC_ALC882,
4205             HDA_QUIRK_GPIO0, 0 },
4206         { ASUS_W2J_SUBVENDOR, HDA_CODEC_ALC882,
4207             HDA_QUIRK_GPIO0, 0 },
4208         { ASUS_U5F_SUBVENDOR, HDA_CODEC_AD1986A,
4209             HDA_QUIRK_EAPDINV, 0 },
4210         { ASUS_A8JC_SUBVENDOR, HDA_CODEC_AD1986A,
4211             HDA_QUIRK_EAPDINV, 0 },
4212         { ASUS_F3JC_SUBVENDOR, HDA_CODEC_ALC861,
4213             HDA_QUIRK_OVREF, 0 },
4214         { ASUS_W6F_SUBVENDOR, HDA_CODEC_ALC861,
4215             HDA_QUIRK_OVREF, 0 },
4216         { UNIWILL_9075_SUBVENDOR, HDA_CODEC_ALC861,
4217             HDA_QUIRK_OVREF, 0 },
4218         /*{ ASUS_M2N_SUBVENDOR, HDA_CODEC_AD1988,
4219             HDA_QUIRK_IVREF80, HDA_QUIRK_IVREF50 | HDA_QUIRK_IVREF100 },*/
4220         { MEDION_MD95257_SUBVENDOR, HDA_CODEC_ALC880,
4221             HDA_QUIRK_GPIO1, 0 },
4222         { LENOVO_3KN100_SUBVENDOR, HDA_CODEC_AD1986A,
4223             HDA_QUIRK_EAPDINV, 0 },
4224         { SAMSUNG_Q1_SUBVENDOR, HDA_CODEC_AD1986A,
4225             HDA_QUIRK_EAPDINV, 0 },
4226         { APPLE_MB3_SUBVENDOR, HDA_CODEC_ALC885,
4227             HDA_QUIRK_GPIO0 | HDA_QUIRK_OVREF50, 0},
4228         { APPLE_INTEL_MAC, HDA_CODEC_STAC9221,
4229             HDA_QUIRK_GPIO0 | HDA_QUIRK_GPIO1, 0 },
4230         { HDA_MATCH_ALL, HDA_CODEC_AD1988,
4231             HDA_QUIRK_IVREF80, HDA_QUIRK_IVREF50 | HDA_QUIRK_IVREF100 },
4232         { HDA_MATCH_ALL, HDA_CODEC_AD1988B,
4233             HDA_QUIRK_IVREF80, HDA_QUIRK_IVREF50 | HDA_QUIRK_IVREF100 },
4234         { HDA_MATCH_ALL, HDA_CODEC_CXVENICE,
4235             0, HDA_QUIRK_FORCESTEREO },
4236         { HDA_MATCH_ALL, HDA_CODEC_STACXXXX,
4237             HDA_QUIRK_SOFTPCMVOL, 0 }
4238 };
4239 #define HDAC_QUIRKS_LEN NELEM(hdac_quirks)
4240
4241 static void
4242 hdac_vendor_patch_parse(struct hdac_devinfo *devinfo)
4243 {
4244         struct hdac_widget *w;
4245         struct hdac_audio_ctl *ctl;
4246         uint32_t id, subvendor;
4247         int i;
4248
4249         id = hdac_codec_id(devinfo);
4250         subvendor = devinfo->codec->sc->pci_subvendor;
4251
4252         /*
4253          * Quirks
4254          */
4255         for (i = 0; i < HDAC_QUIRKS_LEN; i++) {
4256                 if (!(HDA_DEV_MATCH(hdac_quirks[i].model, subvendor) &&
4257                     HDA_DEV_MATCH(hdac_quirks[i].id, id)))
4258                         continue;
4259                 if (hdac_quirks[i].set != 0)
4260                         devinfo->function.audio.quirks |=
4261                             hdac_quirks[i].set;
4262                 if (hdac_quirks[i].unset != 0)
4263                         devinfo->function.audio.quirks &=
4264                             ~(hdac_quirks[i].unset);
4265         }
4266
4267         switch (id) {
4268         case HDA_CODEC_ALC260:
4269                 for (i = devinfo->startnode; i < devinfo->endnode; i++) {
4270                         w = hdac_widget_get(devinfo, i);
4271                         if (w == NULL || w->enable == 0)
4272                                 continue;
4273                         if (w->type !=
4274                             HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_INPUT)
4275                                 continue;
4276                         if (w->nid != 5)
4277                                 w->enable = 0;
4278                 }
4279                 if (subvendor == HP_XW4300_SUBVENDOR) {
4280                         ctl = hdac_audio_ctl_amp_get(devinfo, 16, 0, 1);
4281                         if (ctl != NULL && ctl->widget != NULL) {
4282                                 ctl->ossmask = SOUND_MASK_SPEAKER;
4283                                 ctl->widget->ctlflags |= SOUND_MASK_SPEAKER;
4284                         }
4285                         ctl = hdac_audio_ctl_amp_get(devinfo, 17, 0, 1);
4286                         if (ctl != NULL && ctl->widget != NULL) {
4287                                 ctl->ossmask = SOUND_MASK_SPEAKER;
4288                                 ctl->widget->ctlflags |= SOUND_MASK_SPEAKER;
4289                         }
4290                 } else if (subvendor == HP_3010_SUBVENDOR) {
4291                         ctl = hdac_audio_ctl_amp_get(devinfo, 17, 0, 1);
4292                         if (ctl != NULL && ctl->widget != NULL) {
4293                                 ctl->ossmask = SOUND_MASK_SPEAKER;
4294                                 ctl->widget->ctlflags |= SOUND_MASK_SPEAKER;
4295                         }
4296                         ctl = hdac_audio_ctl_amp_get(devinfo, 21, 0, 1);
4297                         if (ctl != NULL && ctl->widget != NULL) {
4298                                 ctl->ossmask = SOUND_MASK_SPEAKER;
4299                                 ctl->widget->ctlflags |= SOUND_MASK_SPEAKER;
4300                         }
4301                 }
4302                 break;
4303         case HDA_CODEC_ALC268:
4304                 if (HDA_DEV_MATCH(ACER_ALL_SUBVENDOR, subvendor)) {
4305                         w = hdac_widget_get(devinfo, 29);
4306                         if (w != NULL) {
4307                                 w->enable = 1;
4308                                 w->type =
4309                                     HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_BEEP_WIDGET;
4310                                 w->param.widget_cap &=
4311                                     ~HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_MASK;
4312                                 w->param.widget_cap |=
4313                                     HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_BEEP_WIDGET <<
4314                                     HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_SHIFT;
4315                                 strlcpy(w->name, "beep widget", sizeof(w->name));
4316                         }
4317                 }
4318                 break;
4319         case HDA_CODEC_ALC262:
4320                 if (subvendor == HP_DC7700_SUBVENDOR) {
4321                         ctl = hdac_audio_ctl_amp_get(devinfo, 22, 0, 1);
4322                         if (ctl != NULL && ctl->widget != NULL) {
4323                                 ctl->ossmask = SOUND_MASK_SPEAKER;
4324                                 ctl->widget->ctlflags |= SOUND_MASK_SPEAKER;
4325                         }
4326                         ctl = hdac_audio_ctl_amp_get(devinfo, 27, 0, 1);
4327                         if (ctl != NULL && ctl->widget != NULL) {
4328                                 ctl->ossmask = SOUND_MASK_SPEAKER;
4329                                 ctl->widget->ctlflags |= SOUND_MASK_SPEAKER;
4330                         }
4331                 }
4332                 break;
4333         case HDA_CODEC_ALC861:
4334                 ctl = hdac_audio_ctl_amp_get(devinfo, 21, 2, 1);
4335                 if (ctl != NULL)
4336                         ctl->muted = HDA_AMP_MUTE_ALL;
4337                 break;
4338         case HDA_CODEC_ALC880:
4339                 for (i = devinfo->startnode; i < devinfo->endnode; i++) {
4340                         w = hdac_widget_get(devinfo, i);
4341                         if (w == NULL || w->enable == 0)
4342                                 continue;
4343                         if (w->type ==
4344                             HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_INPUT &&
4345                             w->nid != 9 && w->nid != 29) {
4346                                         w->enable = 0;
4347                         } else if (w->type !=
4348                             HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_BEEP_WIDGET &&
4349                             w->nid == 29) {
4350                                 w->type =
4351                                     HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_BEEP_WIDGET;
4352                                 w->param.widget_cap &=
4353                                     ~HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_MASK;
4354                                 w->param.widget_cap |=
4355                                     HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_BEEP_WIDGET <<
4356                                     HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_SHIFT;
4357                                 strlcpy(w->name, "beep widget", sizeof(w->name));
4358                         }
4359                 }
4360                 break;
4361         case HDA_CODEC_ALC883:
4362                 /*
4363                  * nid: 24/25 = External (jack) or Internal (fixed) Mic.
4364                  *              Clear vref cap for jack connectivity.
4365                  */
4366                 w = hdac_widget_get(devinfo, 24);
4367                 if (w != NULL && w->enable != 0 && w->type ==
4368                     HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX &&
4369                     (w->wclass.pin.config &
4370                     HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_MASK) ==
4371                     HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_JACK)
4372                         w->wclass.pin.cap &= ~(
4373                             HDA_PARAM_PIN_CAP_VREF_CTRL_100_MASK |
4374                             HDA_PARAM_PIN_CAP_VREF_CTRL_80_MASK |
4375                             HDA_PARAM_PIN_CAP_VREF_CTRL_50_MASK);
4376                 w = hdac_widget_get(devinfo, 25);
4377                 if (w != NULL && w->enable != 0 && w->type ==
4378                     HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX &&
4379                     (w->wclass.pin.config &
4380                     HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_MASK) ==
4381                     HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_JACK)
4382                         w->wclass.pin.cap &= ~(
4383                             HDA_PARAM_PIN_CAP_VREF_CTRL_100_MASK |
4384                             HDA_PARAM_PIN_CAP_VREF_CTRL_80_MASK |
4385                             HDA_PARAM_PIN_CAP_VREF_CTRL_50_MASK);
4386                 /*
4387                  * nid: 26 = Line-in, leave it alone.
4388                  */
4389                 break;
4390         case HDA_CODEC_AD1981HD:
4391                 w = hdac_widget_get(devinfo, 11);
4392                 if (w != NULL && w->enable != 0 && w->nconns > 3)
4393                         w->selconn = 3;
4394                 if (subvendor == IBM_M52_SUBVENDOR) {
4395                         ctl = hdac_audio_ctl_amp_get(devinfo, 7, 0, 1);
4396                         if (ctl != NULL)
4397                                 ctl->ossmask = SOUND_MASK_SPEAKER;
4398                 }
4399                 break;
4400         case HDA_CODEC_AD1986A:
4401                 for (i = devinfo->startnode; i < devinfo->endnode; i++) {
4402                         w = hdac_widget_get(devinfo, i);
4403                         if (w == NULL || w->enable == 0)
4404                                 continue;
4405                         if (w->type !=
4406                             HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_OUTPUT)
4407                                 continue;
4408                         if (w->nid != 3)
4409                                 w->enable = 0;
4410                 }
4411                 if (subvendor == ASUS_M2NPVMX_SUBVENDOR ||
4412                     subvendor == ASUS_A8NVMCSM_SUBVENDOR) {
4413                         /* nid 28 is mic, nid 29 is line-in */
4414                         w = hdac_widget_get(devinfo, 15);
4415                         if (w != NULL)
4416                                 w->selconn = 2;
4417                         w = hdac_widget_get(devinfo, 16);
4418                         if (w != NULL)
4419                                 w->selconn = 1;
4420                 }
4421                 break;
4422         case HDA_CODEC_AD1988:
4423         case HDA_CODEC_AD1988B:
4424                 /*w = hdac_widget_get(devinfo, 12);
4425                 if (w != NULL) {
4426                         w->selconn = 1;
4427                         w->pflags |= HDA_ADC_LOCKED;
4428                 }
4429                 w = hdac_widget_get(devinfo, 13);
4430                 if (w != NULL) {
4431                         w->selconn = 4;
4432                         w->pflags |= HDA_ADC_LOCKED;
4433                 }
4434                 w = hdac_widget_get(devinfo, 14);
4435                 if (w != NULL) {
4436                         w->selconn = 2;
4437                         w->pflags |= HDA_ADC_LOCKED;
4438                 }*/
4439                 ctl = hdac_audio_ctl_amp_get(devinfo, 57, 0, 1);
4440                 if (ctl != NULL) {
4441                         ctl->ossmask = SOUND_MASK_IGAIN;
4442                         ctl->widget->ctlflags |= SOUND_MASK_IGAIN;
4443                 }
4444                 ctl = hdac_audio_ctl_amp_get(devinfo, 58, 0, 1);
4445                 if (ctl != NULL) {
4446                         ctl->ossmask = SOUND_MASK_IGAIN;
4447                         ctl->widget->ctlflags |= SOUND_MASK_IGAIN;
4448                 }
4449                 ctl = hdac_audio_ctl_amp_get(devinfo, 60, 0, 1);
4450                 if (ctl != NULL) {
4451                         ctl->ossmask = SOUND_MASK_IGAIN;
4452                         ctl->widget->ctlflags |= SOUND_MASK_IGAIN;
4453                 }
4454                 ctl = hdac_audio_ctl_amp_get(devinfo, 32, 0, 1);
4455                 if (ctl != NULL) {
4456                         ctl->ossmask = SOUND_MASK_MIC | SOUND_MASK_VOLUME;
4457                         ctl->widget->ctlflags |= SOUND_MASK_MIC;
4458                 }
4459                 ctl = hdac_audio_ctl_amp_get(devinfo, 32, 4, 1);
4460                 if (ctl != NULL) {
4461                         ctl->ossmask = SOUND_MASK_MIC | SOUND_MASK_VOLUME;
4462                         ctl->widget->ctlflags |= SOUND_MASK_MIC;
4463                 }
4464                 ctl = hdac_audio_ctl_amp_get(devinfo, 32, 1, 1);
4465                 if (ctl != NULL) {
4466                         ctl->ossmask = SOUND_MASK_LINE | SOUND_MASK_VOLUME;
4467                         ctl->widget->ctlflags |= SOUND_MASK_LINE;
4468                 }
4469                 ctl = hdac_audio_ctl_amp_get(devinfo, 32, 7, 1);
4470                 if (ctl != NULL) {
4471                         ctl->ossmask = SOUND_MASK_SPEAKER | SOUND_MASK_VOLUME;
4472                         ctl->widget->ctlflags |= SOUND_MASK_SPEAKER;
4473                 }
4474                 break;
4475         case HDA_CODEC_STAC9221:
4476                 /*
4477                  * Dell XPS M1210 need all DACs for each output jacks
4478                  */
4479                 if (subvendor == DELL_XPSM1210_SUBVENDOR)
4480                         break;
4481                 for (i = devinfo->startnode; i < devinfo->endnode; i++) {
4482                         w = hdac_widget_get(devinfo, i);
4483                         if (w == NULL || w->enable == 0)
4484                                 continue;
4485                         if (w->type !=
4486                             HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_OUTPUT)
4487                                 continue;
4488                         if (w->nid != 2)
4489                                 w->enable = 0;
4490                 }
4491                 break;
4492         case HDA_CODEC_STAC9221D:
4493                 for (i = devinfo->startnode; i < devinfo->endnode; i++) {
4494                         w = hdac_widget_get(devinfo, i);
4495                         if (w == NULL || w->enable == 0)
4496                                 continue;
4497                         if (w->type ==
4498                             HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_INPUT &&
4499                             w->nid != 6)
4500                                 w->enable = 0;
4501
4502                 }
4503                 break;
4504         case HDA_CODEC_STAC9227:
4505                 w = hdac_widget_get(devinfo, 8);
4506                 if (w != NULL)
4507                         w->enable = 0;
4508                 w = hdac_widget_get(devinfo, 9);
4509                 if (w != NULL)
4510                         w->enable = 0;
4511                 break;
4512         case HDA_CODEC_CXWAIKIKI:
4513                 if (subvendor == HP_DV5000_SUBVENDOR) {
4514                         w = hdac_widget_get(devinfo, 27);
4515                         if (w != NULL)
4516                                 w->enable = 0;
4517                 }
4518                 ctl = hdac_audio_ctl_amp_get(devinfo, 16, 0, 1);
4519                 if (ctl != NULL)
4520                         ctl->ossmask = SOUND_MASK_SKIP;
4521                 ctl = hdac_audio_ctl_amp_get(devinfo, 25, 0, 1);
4522                 if (ctl != NULL && ctl->childwidget != NULL &&
4523                     ctl->childwidget->enable != 0) {
4524                         ctl->ossmask = SOUND_MASK_PCM | SOUND_MASK_VOLUME;
4525                         ctl->childwidget->ctlflags |= SOUND_MASK_PCM;
4526                 }
4527                 ctl = hdac_audio_ctl_amp_get(devinfo, 25, 1, 1);
4528                 if (ctl != NULL && ctl->childwidget != NULL &&
4529                     ctl->childwidget->enable != 0) {
4530                         ctl->ossmask = SOUND_MASK_LINE | SOUND_MASK_VOLUME;
4531                         ctl->childwidget->ctlflags |= SOUND_MASK_LINE;
4532                 }
4533                 ctl = hdac_audio_ctl_amp_get(devinfo, 25, 2, 1);
4534                 if (ctl != NULL && ctl->childwidget != NULL &&
4535                     ctl->childwidget->enable != 0) {
4536                         ctl->ossmask = SOUND_MASK_MIC | SOUND_MASK_VOLUME;
4537                         ctl->childwidget->ctlflags |= SOUND_MASK_MIC;
4538                 }
4539                 ctl = hdac_audio_ctl_amp_get(devinfo, 26, 0, 1);
4540                 if (ctl != NULL) {
4541                         ctl->ossmask = SOUND_MASK_SKIP;
4542                         /* XXX mixer \=rec mic broken.. why?!? */
4543                         /* ctl->widget->ctlflags |= SOUND_MASK_MIC; */
4544                 }
4545                 break;
4546         default:
4547                 break;
4548         }
4549 }
4550
4551 static int
4552 hdac_audio_ctl_ossmixer_getnextdev(struct hdac_devinfo *devinfo)
4553 {
4554         int *dev = &devinfo->function.audio.ossidx;
4555
4556         while (*dev < SOUND_MIXER_NRDEVICES) {
4557                 switch (*dev) {
4558                 case SOUND_MIXER_VOLUME:
4559                 case SOUND_MIXER_BASS:
4560                 case SOUND_MIXER_TREBLE:
4561                 case SOUND_MIXER_PCM:
4562                 case SOUND_MIXER_SPEAKER:
4563                 case SOUND_MIXER_LINE:
4564                 case SOUND_MIXER_MIC:
4565                 case SOUND_MIXER_CD:
4566                 case SOUND_MIXER_RECLEV:
4567                 case SOUND_MIXER_IGAIN:
4568                 case SOUND_MIXER_OGAIN: /* reserved for EAPD switch */
4569                         (*dev)++;
4570                         break;
4571                 default:
4572                         return (*dev)++;
4573                         break;
4574                 }
4575         }
4576
4577         return (-1);
4578 }
4579
4580 static int
4581 hdac_widget_find_dac_path(struct hdac_devinfo *devinfo, nid_t nid, int depth)
4582 {
4583         struct hdac_widget *w;
4584         int i, ret = 0;
4585
4586         if (depth > HDA_PARSE_MAXDEPTH)
4587                 return (0);
4588         w = hdac_widget_get(devinfo, nid);
4589         if (w == NULL || w->enable == 0)
4590                 return (0);
4591         switch (w->type) {
4592         case HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_OUTPUT:
4593                 w->pflags |= HDA_DAC_PATH;
4594                 ret = 1;
4595                 break;
4596         case HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_MIXER:
4597         case HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_SELECTOR:
4598                 for (i = 0; i < w->nconns; i++) {
4599                         if (hdac_widget_find_dac_path(devinfo,
4600                             w->conns[i], depth + 1) != 0) {
4601                                 if (w->selconn == -1)
4602                                         w->selconn = i;
4603                                 ret = 1;
4604                                 w->pflags |= HDA_DAC_PATH;
4605                         }
4606                 }
4607                 break;
4608         default:
4609                 break;
4610         }
4611         return (ret);
4612 }
4613
4614 static int
4615 hdac_widget_find_adc_path(struct hdac_devinfo *devinfo, nid_t nid, int depth)
4616 {
4617         struct hdac_widget *w;
4618         int i, conndev, ret = 0;
4619
4620         if (depth > HDA_PARSE_MAXDEPTH)
4621                 return (0);
4622         w = hdac_widget_get(devinfo, nid);
4623         if (w == NULL || w->enable == 0)
4624                 return (0);
4625         switch (w->type) {
4626         case HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_INPUT:
4627         case HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_SELECTOR:
4628         case HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_MIXER:
4629                 for (i = 0; i < w->nconns; i++) {
4630                         if (hdac_widget_find_adc_path(devinfo, w->conns[i],
4631                             depth + 1) != 0) {
4632                                 if (w->selconn == -1)
4633                                         w->selconn = i;
4634                                 w->pflags |= HDA_ADC_PATH;
4635                                 ret = 1;
4636                         }
4637                 }
4638                 break;
4639         case HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX:
4640                 conndev = w->wclass.pin.config &
4641                     HDA_CONFIG_DEFAULTCONF_DEVICE_MASK;
4642                 if (HDA_PARAM_PIN_CAP_INPUT_CAP(w->wclass.pin.cap) &&
4643                     (conndev == HDA_CONFIG_DEFAULTCONF_DEVICE_CD ||
4644                     conndev == HDA_CONFIG_DEFAULTCONF_DEVICE_LINE_IN ||
4645                     conndev == HDA_CONFIG_DEFAULTCONF_DEVICE_MIC_IN)) {
4646                         w->pflags |= HDA_ADC_PATH;
4647                         ret = 1;
4648                 }
4649                 break;
4650         /*case HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_MIXER:
4651                 if (w->pflags & HDA_DAC_PATH) {
4652                         w->pflags |= HDA_ADC_PATH;
4653                         ret = 1;
4654                 }
4655                 break;*/
4656         default:
4657                 break;
4658         }
4659         return (ret);
4660 }
4661
4662 static uint32_t
4663 hdac_audio_ctl_outamp_build(struct hdac_devinfo *devinfo,
4664                                 nid_t nid, nid_t pnid, int index, int depth)
4665 {
4666         struct hdac_widget *w, *pw;
4667         struct hdac_audio_ctl *ctl;
4668         uint32_t fl = 0;
4669         int i, ossdev, conndev, strategy;
4670
4671         if (depth > HDA_PARSE_MAXDEPTH)
4672                 return (0);
4673
4674         w = hdac_widget_get(devinfo, nid);
4675         if (w == NULL || w->enable == 0)
4676                 return (0);
4677
4678         pw = hdac_widget_get(devinfo, pnid);
4679         strategy = devinfo->function.audio.parsing_strategy;
4680
4681         if (w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_MIXER
4682             || w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_SELECTOR) {
4683                 for (i = 0; i < w->nconns; i++) {
4684                         fl |= hdac_audio_ctl_outamp_build(devinfo, w->conns[i],
4685                             w->nid, i, depth + 1);
4686                 }
4687                 w->ctlflags |= fl;
4688                 return (fl);
4689         } else if (w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_OUTPUT &&
4690             (w->pflags & HDA_DAC_PATH)) {
4691                 i = 0;
4692                 while ((ctl = hdac_audio_ctl_each(devinfo, &i)) != NULL) {
4693                         if (ctl->enable == 0 || ctl->widget == NULL)
4694                                 continue;
4695                         /* XXX This should be compressed! */
4696                         if (((ctl->widget->nid == w->nid) ||
4697                             (ctl->widget->nid == pnid && ctl->index == index &&
4698                             (ctl->dir & HDA_CTL_IN)) ||
4699                             (ctl->widget->nid == pnid && pw != NULL &&
4700                             pw->type ==
4701                             HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_SELECTOR &&
4702                             (pw->nconns < 2 || pw->selconn == index ||
4703                             pw->selconn == -1) &&
4704                             (ctl->dir & HDA_CTL_OUT)) ||
4705                             (strategy == HDA_PARSE_DIRECT &&
4706                             ctl->widget->nid == w->nid)) &&
4707                             !(ctl->ossmask & ~SOUND_MASK_VOLUME)) {
4708                                 /*if (pw != NULL && pw->selconn == -1)
4709                                         pw->selconn = index;
4710                                 fl |= SOUND_MASK_VOLUME;
4711                                 fl |= SOUND_MASK_PCM;
4712                                 ctl->ossmask |= SOUND_MASK_VOLUME;
4713                                 ctl->ossmask |= SOUND_MASK_PCM;
4714                                 ctl->ossdev = SOUND_MIXER_PCM;*/
4715                                 if (!(w->ctlflags & SOUND_MASK_PCM) ||
4716                                     (pw != NULL &&
4717                                     !(pw->ctlflags & SOUND_MASK_PCM))) {
4718                                         fl |= SOUND_MASK_VOLUME;
4719                                         fl |= SOUND_MASK_PCM;
4720                                         ctl->ossmask |= SOUND_MASK_VOLUME;
4721                                         ctl->ossmask |= SOUND_MASK_PCM;
4722                                         ctl->ossdev = SOUND_MIXER_PCM;
4723                                         w->ctlflags |= SOUND_MASK_VOLUME;
4724                                         w->ctlflags |= SOUND_MASK_PCM;
4725                                         if (pw != NULL) {
4726                                                 if (pw->selconn == -1)
4727                                                         pw->selconn = index;
4728                                                 pw->ctlflags |=
4729                                                     SOUND_MASK_VOLUME;
4730                                                 pw->ctlflags |=
4731                                                     SOUND_MASK_PCM;
4732                                         }
4733                                 }
4734                         }
4735                 }
4736                 w->ctlflags |= fl;
4737                 return (fl);
4738         } else if (w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX &&
4739             HDA_PARAM_PIN_CAP_INPUT_CAP(w->wclass.pin.cap) &&
4740             (w->pflags & HDA_ADC_PATH)) {
4741                 conndev = w->wclass.pin.config &
4742                     HDA_CONFIG_DEFAULTCONF_DEVICE_MASK;
4743                 i = 0;
4744                 while ((ctl = hdac_audio_ctl_each(devinfo, &i)) != NULL) {
4745                         if (ctl->enable == 0 || ctl->widget == NULL)
4746                                 continue;
4747                         /* XXX This should be compressed! */
4748                         if (((ctl->widget->nid == pnid && ctl->index == index &&
4749                             (ctl->dir & HDA_CTL_IN)) ||
4750                             (ctl->widget->nid == pnid && pw != NULL &&
4751                             pw->type ==
4752                             HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_SELECTOR &&
4753                             (pw->nconns < 2 || pw->selconn == index ||
4754                             pw->selconn == -1) &&
4755                             (ctl->dir & HDA_CTL_OUT)) ||
4756                             (strategy == HDA_PARSE_DIRECT &&
4757                             ctl->widget->nid == w->nid)) &&
4758                             !(ctl->ossmask & ~SOUND_MASK_VOLUME)) {
4759                                 if (pw != NULL && pw->selconn == -1)
4760                                         pw->selconn = index;
4761                                 ossdev = 0;
4762                                 switch (conndev) {
4763                                 case HDA_CONFIG_DEFAULTCONF_DEVICE_MIC_IN:
4764                                         ossdev = SOUND_MIXER_MIC;
4765                                         break;
4766                                 case HDA_CONFIG_DEFAULTCONF_DEVICE_LINE_IN:
4767                                         ossdev = SOUND_MIXER_LINE;
4768                                         break;
4769                                 case HDA_CONFIG_DEFAULTCONF_DEVICE_CD:
4770                                         ossdev = SOUND_MIXER_CD;
4771                                         break;
4772                                 default:
4773                                         ossdev =
4774                                             hdac_audio_ctl_ossmixer_getnextdev(
4775                                             devinfo);
4776                                         if (ossdev < 0)
4777                                                 ossdev = 0;
4778                                         break;
4779                                 }
4780                                 if (strategy == HDA_PARSE_MIXER) {
4781                                         fl |= SOUND_MASK_VOLUME;
4782                                         ctl->ossmask |= SOUND_MASK_VOLUME;
4783                                 }
4784                                 fl |= 1 << ossdev;
4785                                 ctl->ossmask |= 1 << ossdev;
4786                                 ctl->ossdev = ossdev;
4787                         }
4788                 }
4789                 w->ctlflags |= fl;
4790                 return (fl);
4791         } else if (w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_BEEP_WIDGET) {
4792                 i = 0;
4793                 while ((ctl = hdac_audio_ctl_each(devinfo, &i)) != NULL) {
4794                         if (ctl->enable == 0 || ctl->widget == NULL)
4795                                 continue;
4796                         /* XXX This should be compressed! */
4797                         if (((ctl->widget->nid == pnid && ctl->index == index &&
4798                             (ctl->dir & HDA_CTL_IN)) ||
4799                             (ctl->widget->nid == pnid && pw != NULL &&
4800                             pw->type ==
4801                             HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_SELECTOR &&
4802                             (pw->nconns < 2 || pw->selconn == index ||
4803                             pw->selconn == -1) &&
4804                             (ctl->dir & HDA_CTL_OUT)) ||
4805                             (strategy == HDA_PARSE_DIRECT &&
4806                             ctl->widget->nid == w->nid)) &&
4807                             !(ctl->ossmask & ~SOUND_MASK_VOLUME)) {
4808                                 if (pw != NULL && pw->selconn == -1)
4809                                         pw->selconn = index;
4810                                 fl |= SOUND_MASK_VOLUME;
4811                                 fl |= SOUND_MASK_SPEAKER;
4812                                 ctl->ossmask |= SOUND_MASK_VOLUME;
4813                                 ctl->ossmask |= SOUND_MASK_SPEAKER;
4814                                 ctl->ossdev = SOUND_MIXER_SPEAKER;
4815                         }
4816                 }
4817                 w->ctlflags |= fl;
4818                 return (fl);
4819         }
4820         return (0);
4821 }
4822
4823 static uint32_t
4824 hdac_audio_ctl_inamp_build(struct hdac_devinfo *devinfo, nid_t nid, int depth)
4825 {
4826         struct hdac_widget *w, *cw;
4827         struct hdac_audio_ctl *ctl;
4828         uint32_t fl;
4829         int i;
4830
4831         if (depth > HDA_PARSE_MAXDEPTH)
4832                 return (0);
4833
4834         w = hdac_widget_get(devinfo, nid);
4835         if (w == NULL || w->enable == 0)
4836                 return (0);
4837         /*if (!(w->pflags & HDA_ADC_PATH))
4838                 return (0);
4839         if (!(w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_INPUT ||
4840             w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_SELECTOR))
4841                 return (0);*/
4842         i = 0;
4843         while ((ctl = hdac_audio_ctl_each(devinfo, &i)) != NULL) {
4844                 if (ctl->enable == 0 || ctl->widget == NULL)
4845                         continue;
4846                 if (ctl->widget->nid == nid) {
4847                         ctl->ossmask |= SOUND_MASK_RECLEV;
4848                         w->ctlflags |= SOUND_MASK_RECLEV;
4849                         return (SOUND_MASK_RECLEV);
4850                 }
4851         }
4852         for (i = 0; i < w->nconns; i++) {
4853                 cw = hdac_widget_get(devinfo, w->conns[i]);
4854                 if (cw == NULL || cw->enable == 0)
4855                         continue;
4856                 if (cw->type != HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_SELECTOR)
4857                         continue;
4858                 fl = hdac_audio_ctl_inamp_build(devinfo, cw->nid, depth + 1);
4859                 if (fl != 0) {
4860                         cw->ctlflags |= fl;
4861                         w->ctlflags |= fl;
4862                         return (fl);
4863                 }
4864         }
4865         return (0);
4866 }
4867
4868 static int
4869 hdac_audio_ctl_recsel_build(struct hdac_devinfo *devinfo, nid_t nid, int depth)
4870 {
4871         struct hdac_widget *w, *cw;
4872         int i, child = 0;
4873
4874         if (depth > HDA_PARSE_MAXDEPTH)
4875                 return (0);
4876
4877         w = hdac_widget_get(devinfo, nid);
4878         if (w == NULL || w->enable == 0)
4879                 return (0);
4880         /*if (!(w->pflags & HDA_ADC_PATH))
4881                 return (0);
4882         if (!(w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_INPUT ||
4883             w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_SELECTOR))
4884                 return (0);*/
4885         /* XXX weak! */
4886         for (i = 0; i < w->nconns; i++) {
4887                 cw = hdac_widget_get(devinfo, w->conns[i]);
4888                 if (cw == NULL)
4889                         continue;
4890                 if (++child > 1) {
4891                         w->pflags |= HDA_ADC_RECSEL;
4892                         return (1);
4893                 }
4894         }
4895         for (i = 0; i < w->nconns; i++) {
4896                 if (hdac_audio_ctl_recsel_build(devinfo,
4897                     w->conns[i], depth + 1) != 0)
4898                         return (1);
4899         }
4900         return (0);
4901 }
4902
4903 static int
4904 hdac_audio_build_tree_strategy(struct hdac_devinfo *devinfo)
4905 {
4906         struct hdac_widget *w, *cw;
4907         int i, j, conndev, found_dac = 0;
4908         int strategy;
4909
4910         strategy = devinfo->function.audio.parsing_strategy;
4911
4912         for (i = devinfo->startnode; i < devinfo->endnode; i++) {
4913                 w = hdac_widget_get(devinfo, i);
4914                 if (w == NULL || w->enable == 0)
4915                         continue;
4916                 if (w->type != HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX)
4917                         continue;
4918                 if (!HDA_PARAM_PIN_CAP_OUTPUT_CAP(w->wclass.pin.cap))
4919                         continue;
4920                 conndev = w->wclass.pin.config &
4921                     HDA_CONFIG_DEFAULTCONF_DEVICE_MASK;
4922                 if (!(conndev == HDA_CONFIG_DEFAULTCONF_DEVICE_HP_OUT ||
4923                     conndev == HDA_CONFIG_DEFAULTCONF_DEVICE_SPEAKER ||
4924                     conndev == HDA_CONFIG_DEFAULTCONF_DEVICE_LINE_OUT))
4925                         continue;
4926                 for (j = 0; j < w->nconns; j++) {
4927                         cw = hdac_widget_get(devinfo, w->conns[j]);
4928                         if (cw == NULL || cw->enable == 0)
4929                                 continue;
4930                         if (strategy == HDA_PARSE_MIXER && !(cw->type ==
4931                             HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_MIXER ||
4932                             cw->type ==
4933                             HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_SELECTOR))
4934                                 continue;
4935                         if (hdac_widget_find_dac_path(devinfo, cw->nid, 0)
4936                             != 0) {
4937                                 if (w->selconn == -1)
4938                                         w->selconn = j;
4939                                 w->pflags |= HDA_DAC_PATH;
4940                                 found_dac++;
4941                         }
4942                 }
4943         }
4944
4945         return (found_dac);
4946 }
4947
4948 static void
4949 hdac_audio_build_tree(struct hdac_devinfo *devinfo)
4950 {
4951         struct hdac_widget *w;
4952         struct hdac_audio_ctl *ctl;
4953         int i, j, dacs, strategy;
4954
4955         /* Construct DAC path */
4956         strategy = HDA_PARSE_MIXER;
4957         devinfo->function.audio.parsing_strategy = strategy;
4958         HDA_BOOTVERBOSE(
4959                 device_printf(devinfo->codec->sc->dev,
4960                     "HDA_DEBUG: HWiP: HDA Widget Parser - Revision %d\n",
4961                     HDA_WIDGET_PARSER_REV);
4962         );
4963         dacs = hdac_audio_build_tree_strategy(devinfo);
4964         if (dacs == 0) {
4965                 HDA_BOOTVERBOSE(
4966                         device_printf(devinfo->codec->sc->dev,
4967                             "HDA_DEBUG: HWiP: 0 DAC path found! "
4968                             "Retrying parser "
4969                             "using HDA_PARSE_DIRECT strategy.\n");
4970                 );
4971                 strategy = HDA_PARSE_DIRECT;
4972                 devinfo->function.audio.parsing_strategy = strategy;
4973                 dacs = hdac_audio_build_tree_strategy(devinfo);
4974         }
4975
4976         HDA_BOOTVERBOSE(
4977                 device_printf(devinfo->codec->sc->dev,
4978                     "HDA_DEBUG: HWiP: Found %d DAC path using HDA_PARSE_%s "
4979                     "strategy.\n",
4980                     dacs, (strategy == HDA_PARSE_MIXER) ? "MIXER" : "DIRECT");
4981         );
4982
4983         /* Construct ADC path */
4984         for (i = devinfo->startnode; i < devinfo->endnode; i++) {
4985                 w = hdac_widget_get(devinfo, i);
4986                 if (w == NULL || w->enable == 0)
4987                         continue;
4988                 if (w->type != HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_INPUT)
4989                         continue;
4990                 (void)hdac_widget_find_adc_path(devinfo, w->nid, 0);
4991         }
4992
4993         /* Output mixers */
4994         for (i = devinfo->startnode; i < devinfo->endnode; i++) {
4995                 w = hdac_widget_get(devinfo, i);
4996                 if (w == NULL || w->enable == 0)
4997                         continue;
4998                 if ((strategy == HDA_PARSE_MIXER &&
4999                     (w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_MIXER ||
5000                     w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_SELECTOR)
5001                     && (w->pflags & HDA_DAC_PATH)) ||
5002                     (strategy == HDA_PARSE_DIRECT && (w->pflags &
5003                     (HDA_DAC_PATH | HDA_ADC_PATH)))) {
5004                         w->ctlflags |= hdac_audio_ctl_outamp_build(devinfo,
5005                             w->nid, devinfo->startnode - 1, 0, 0);
5006                 } else if (w->type ==
5007                     HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_BEEP_WIDGET) {
5008                         j = 0;
5009                         while ((ctl = hdac_audio_ctl_each(devinfo, &j)) !=
5010                             NULL) {
5011                                 if (ctl->enable == 0 || ctl->widget == NULL)
5012                                         continue;
5013                                 if (ctl->widget->nid != w->nid)
5014                                         continue;
5015                                 ctl->ossmask |= SOUND_MASK_VOLUME;
5016                                 ctl->ossmask |= SOUND_MASK_SPEAKER;
5017                                 ctl->ossdev = SOUND_MIXER_SPEAKER;
5018                                 w->ctlflags |= SOUND_MASK_VOLUME;
5019                                 w->ctlflags |= SOUND_MASK_SPEAKER;
5020                         }
5021                 }
5022         }
5023
5024         /* Input mixers (rec) */
5025         for (i = devinfo->startnode; i < devinfo->endnode; i++) {
5026                 w = hdac_widget_get(devinfo, i);
5027                 if (w == NULL || w->enable == 0)
5028                         continue;
5029                 if (!(w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_INPUT &&
5030                     w->pflags & HDA_ADC_PATH))
5031                         continue;
5032                 hdac_audio_ctl_inamp_build(devinfo, w->nid, 0);
5033                 hdac_audio_ctl_recsel_build(devinfo, w->nid, 0);
5034         }
5035 }
5036
5037 #define HDA_COMMIT_CONN (1 << 0)
5038 #define HDA_COMMIT_CTRL (1 << 1)
5039 #define HDA_COMMIT_EAPD (1 << 2)
5040 #define HDA_COMMIT_GPIO (1 << 3)
5041 #define HDA_COMMIT_MISC (1 << 4)
5042 #define HDA_COMMIT_ALL  (HDA_COMMIT_CONN | HDA_COMMIT_CTRL | \
5043                         HDA_COMMIT_EAPD | HDA_COMMIT_GPIO | HDA_COMMIT_MISC)
5044
5045 static void
5046 hdac_audio_commit(struct hdac_devinfo *devinfo, uint32_t cfl)
5047 {
5048         struct hdac_softc *sc = devinfo->codec->sc;
5049         struct hdac_widget *w;
5050         nid_t cad;
5051         int i;
5052
5053         if (!(cfl & HDA_COMMIT_ALL))
5054                 return;
5055
5056         cad = devinfo->codec->cad;
5057
5058         if ((cfl & HDA_COMMIT_MISC)) {
5059                 if (sc->pci_subvendor == APPLE_INTEL_MAC)
5060                         hdac_command(sc, HDA_CMD_12BIT(cad, devinfo->nid,
5061                             0x7e7, 0), cad);
5062         }
5063
5064         if (cfl & HDA_COMMIT_GPIO) {
5065                 uint32_t gdata, gmask, gdir;
5066                 int commitgpio, numgpio;
5067
5068                 gdata = 0;
5069                 gmask = 0;
5070                 gdir = 0;
5071                 commitgpio = 0;
5072
5073                 numgpio = HDA_PARAM_GPIO_COUNT_NUM_GPIO(
5074                     devinfo->function.audio.gpio);
5075
5076                 if (devinfo->function.audio.quirks & HDA_QUIRK_GPIOFLUSH)
5077                         commitgpio = (numgpio > 0) ? 1 : 0;
5078                 else {
5079                         for (i = 0; i < numgpio && i < HDA_GPIO_MAX; i++) {
5080                                 if (!(devinfo->function.audio.quirks &
5081                                     (1 << i)))
5082                                         continue;
5083                                 if (commitgpio == 0) {
5084                                         commitgpio = 1;
5085                                         HDA_BOOTVERBOSE(
5086                                                 gdata = hdac_command(sc,
5087                                                     HDA_CMD_GET_GPIO_DATA(cad,
5088                                                     devinfo->nid), cad);
5089                                                 gmask = hdac_command(sc,
5090                                                     HDA_CMD_GET_GPIO_ENABLE_MASK(cad,
5091                                                     devinfo->nid), cad);
5092                                                 gdir = hdac_command(sc,
5093                                                     HDA_CMD_GET_GPIO_DIRECTION(cad,
5094                                                     devinfo->nid), cad);
5095                                                 device_printf(sc->dev,
5096                                                     "GPIO init: data=0x%08x "
5097                                                     "mask=0x%08x dir=0x%08x\n",
5098                                                     gdata, gmask, gdir);
5099                                                 gdata = 0;
5100                                                 gmask = 0;
5101                                                 gdir = 0;
5102                                         );
5103                                 }
5104                                 gdata |= 1 << i;
5105                                 gmask |= 1 << i;
5106                                 gdir |= 1 << i;
5107                         }
5108                 }
5109
5110                 if (commitgpio != 0) {
5111                         HDA_BOOTVERBOSE(
5112                                 device_printf(sc->dev,
5113                                     "GPIO commit: data=0x%08x mask=0x%08x "
5114                                     "dir=0x%08x\n",
5115                                     gdata, gmask, gdir);
5116                         );
5117                         hdac_command(sc,
5118                             HDA_CMD_SET_GPIO_ENABLE_MASK(cad, devinfo->nid,
5119                             gmask), cad);
5120                         hdac_command(sc,
5121                             HDA_CMD_SET_GPIO_DIRECTION(cad, devinfo->nid,
5122                             gdir), cad);
5123                         hdac_command(sc,
5124                             HDA_CMD_SET_GPIO_DATA(cad, devinfo->nid,
5125                             gdata), cad);
5126                 }
5127         }
5128
5129         for (i = 0; i < devinfo->nodecnt; i++) {
5130                 w = &devinfo->widget[i];
5131                 if (w == NULL || w->enable == 0)
5132                         continue;
5133                 if (cfl & HDA_COMMIT_CONN) {
5134                         if (w->selconn == -1)
5135                                 w->selconn = 0;
5136                         if (w->nconns > 0)
5137                                 hdac_widget_connection_select(w, w->selconn);
5138                 }
5139                 if ((cfl & HDA_COMMIT_CTRL) &&
5140                     w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX) {
5141                         uint32_t pincap;
5142
5143                         pincap = w->wclass.pin.cap;
5144
5145                         if ((w->pflags & (HDA_DAC_PATH | HDA_ADC_PATH)) ==
5146                             (HDA_DAC_PATH | HDA_ADC_PATH))
5147                                 device_printf(sc->dev, "WARNING: node %d "
5148                                     "participate both for DAC/ADC!\n", w->nid);
5149                         if (w->pflags & HDA_DAC_PATH) {
5150                                 w->wclass.pin.ctrl &=
5151                                     ~HDA_CMD_SET_PIN_WIDGET_CTRL_IN_ENABLE;
5152                                 if ((w->wclass.pin.config &
5153                                     HDA_CONFIG_DEFAULTCONF_DEVICE_MASK) !=
5154                                     HDA_CONFIG_DEFAULTCONF_DEVICE_HP_OUT)
5155                                         w->wclass.pin.ctrl &=
5156                                             ~HDA_CMD_SET_PIN_WIDGET_CTRL_HPHN_ENABLE;
5157                                 if ((devinfo->function.audio.quirks & HDA_QUIRK_OVREF100) &&
5158                                     HDA_PARAM_PIN_CAP_VREF_CTRL_100(pincap))
5159                                         w->wclass.pin.ctrl |=
5160                                             HDA_CMD_SET_PIN_WIDGET_CTRL_VREF_ENABLE(
5161                                             HDA_CMD_PIN_WIDGET_CTRL_VREF_ENABLE_100);
5162                                 else if ((devinfo->function.audio.quirks & HDA_QUIRK_OVREF80) &&
5163                                     HDA_PARAM_PIN_CAP_VREF_CTRL_80(pincap))
5164                                         w->wclass.pin.ctrl |=
5165                                             HDA_CMD_SET_PIN_WIDGET_CTRL_VREF_ENABLE(
5166                                             HDA_CMD_PIN_WIDGET_CTRL_VREF_ENABLE_80);
5167                                 else if ((devinfo->function.audio.quirks & HDA_QUIRK_OVREF50) &&
5168                                     HDA_PARAM_PIN_CAP_VREF_CTRL_50(pincap))
5169                                         w->wclass.pin.ctrl |=
5170                                             HDA_CMD_SET_PIN_WIDGET_CTRL_VREF_ENABLE(
5171                                             HDA_CMD_PIN_WIDGET_CTRL_VREF_ENABLE_50);
5172                         } else if (w->pflags & HDA_ADC_PATH) {
5173                                 w->wclass.pin.ctrl &=
5174                                     ~(HDA_CMD_SET_PIN_WIDGET_CTRL_OUT_ENABLE |
5175                                     HDA_CMD_SET_PIN_WIDGET_CTRL_HPHN_ENABLE);
5176                                 if ((devinfo->function.audio.quirks & HDA_QUIRK_IVREF100) &&
5177                                     HDA_PARAM_PIN_CAP_VREF_CTRL_100(pincap))
5178                                         w->wclass.pin.ctrl |=
5179                                             HDA_CMD_SET_PIN_WIDGET_CTRL_VREF_ENABLE(
5180                                             HDA_CMD_PIN_WIDGET_CTRL_VREF_ENABLE_100);
5181                                 else if ((devinfo->function.audio.quirks & HDA_QUIRK_IVREF80) &&
5182                                     HDA_PARAM_PIN_CAP_VREF_CTRL_80(pincap))
5183                                         w->wclass.pin.ctrl |=
5184                                             HDA_CMD_SET_PIN_WIDGET_CTRL_VREF_ENABLE(
5185                                             HDA_CMD_PIN_WIDGET_CTRL_VREF_ENABLE_80);
5186                                 else if ((devinfo->function.audio.quirks & HDA_QUIRK_IVREF50) &&
5187                                     HDA_PARAM_PIN_CAP_VREF_CTRL_50(pincap))
5188                                         w->wclass.pin.ctrl |=
5189                                             HDA_CMD_SET_PIN_WIDGET_CTRL_VREF_ENABLE(
5190                                             HDA_CMD_PIN_WIDGET_CTRL_VREF_ENABLE_50);
5191                         } else
5192                                 w->wclass.pin.ctrl &= ~(
5193                                     HDA_CMD_SET_PIN_WIDGET_CTRL_HPHN_ENABLE |
5194                                     HDA_CMD_SET_PIN_WIDGET_CTRL_OUT_ENABLE |
5195                                     HDA_CMD_SET_PIN_WIDGET_CTRL_IN_ENABLE |
5196                                     HDA_CMD_SET_PIN_WIDGET_CTRL_VREF_ENABLE_MASK);
5197                         hdac_command(sc,
5198                             HDA_CMD_SET_PIN_WIDGET_CTRL(cad, w->nid,
5199                             w->wclass.pin.ctrl), cad);
5200                 }
5201                 if ((cfl & HDA_COMMIT_EAPD) &&
5202                     w->param.eapdbtl != HDAC_INVALID) {
5203                         uint32_t val;
5204
5205                         val = w->param.eapdbtl;
5206                         if (devinfo->function.audio.quirks &
5207                             HDA_QUIRK_EAPDINV)
5208                                 val ^= HDA_CMD_SET_EAPD_BTL_ENABLE_EAPD;
5209                         hdac_command(sc,
5210                             HDA_CMD_SET_EAPD_BTL_ENABLE(cad, w->nid,
5211                             val), cad);
5212
5213                 }
5214                 DELAY(1000);
5215         }
5216 }
5217
5218 static void
5219 hdac_audio_ctl_commit(struct hdac_devinfo *devinfo)
5220 {
5221         struct hdac_softc *sc = devinfo->codec->sc;
5222         struct hdac_audio_ctl *ctl;
5223         int i;
5224
5225         devinfo->function.audio.mvol = 100 | (100 << 8);
5226         i = 0;
5227         while ((ctl = hdac_audio_ctl_each(devinfo, &i)) != NULL) {
5228                 if (ctl->enable == 0 || ctl->widget == NULL) {
5229                         HDA_BOOTVERBOSE(
5230                                 device_printf(sc->dev, "[%2d] Ctl nid=%d",
5231                                     i, (ctl->widget != NULL) ?
5232                                     ctl->widget->nid : -1);
5233                                 if (ctl->childwidget != NULL)
5234                                         kprintf(" childnid=%d",
5235                                             ctl->childwidget->nid);
5236                                 if (ctl->widget == NULL)
5237                                         kprintf(" NULL WIDGET!");
5238                                 kprintf(" DISABLED\n");
5239                         );
5240                         continue;
5241                 }
5242                 HDA_BOOTVERBOSE(
5243                         if (ctl->ossmask == 0) {
5244                                 device_printf(sc->dev, "[%2d] Ctl nid=%d",
5245                                     i, ctl->widget->nid);
5246                                 if (ctl->childwidget != NULL)
5247                                         kprintf(" childnid=%d",
5248                                         ctl->childwidget->nid);
5249                                 kprintf(" Bind to NONE\n");
5250                         }
5251                 );
5252                 if (ctl->step > 0) {
5253                         ctl->ossval = (ctl->left * 100) / ctl->step;
5254                         ctl->ossval |= ((ctl->right * 100) / ctl->step) << 8;
5255                 } else
5256                         ctl->ossval = 0;
5257                 hdac_audio_ctl_amp_set(ctl, HDA_AMP_MUTE_DEFAULT,
5258                     ctl->left, ctl->right);
5259         }
5260 }
5261
5262 static int
5263 hdac_pcmchannel_setup(struct hdac_devinfo *devinfo, int dir)
5264 {
5265         struct hdac_chan *ch;
5266         struct hdac_widget *w;
5267         uint32_t cap, fmtcap, pcmcap, path;
5268         int i, type, ret, max;
5269
5270         if (dir == PCMDIR_PLAY) {
5271                 type = HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_OUTPUT;
5272                 ch = &devinfo->codec->sc->play;
5273                 path = HDA_DAC_PATH;
5274         } else {
5275                 type = HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_INPUT;
5276                 ch = &devinfo->codec->sc->rec;
5277                 path = HDA_ADC_PATH;
5278         }
5279
5280         ch->caps = hdac_caps;
5281         ch->caps.fmtlist = ch->fmtlist;
5282         ch->bit16 = 1;
5283         ch->bit32 = 0;
5284         ch->pcmrates[0] = 48000;
5285         ch->pcmrates[1] = 0;
5286
5287         ret = 0;
5288         fmtcap = devinfo->function.audio.supp_stream_formats;
5289         pcmcap = devinfo->function.audio.supp_pcm_size_rate;
5290         max = NELEM(ch->io) - 1;
5291
5292         for (i = devinfo->startnode; i < devinfo->endnode && ret < max; i++) {
5293                 w = hdac_widget_get(devinfo, i);
5294                 if (w == NULL || w->enable == 0 || w->type != type ||
5295                     !(w->pflags & path))
5296                         continue;
5297                 cap = w->param.widget_cap;
5298                 /*if (HDA_PARAM_AUDIO_WIDGET_CAP_DIGITAL(cap))
5299                         continue;*/
5300                 if (!HDA_PARAM_AUDIO_WIDGET_CAP_STEREO(cap))
5301                         continue;
5302                 cap = w->param.supp_stream_formats;
5303                 /*if (HDA_PARAM_SUPP_STREAM_FORMATS_AC3(cap)) {
5304                 }
5305                 if (HDA_PARAM_SUPP_STREAM_FORMATS_FLOAT32(cap)) {
5306                 }*/
5307                 if (!HDA_PARAM_SUPP_STREAM_FORMATS_PCM(cap))
5308                         continue;
5309                 if (ret == 0) {
5310                         fmtcap = w->param.supp_stream_formats;
5311                         pcmcap = w->param.supp_pcm_size_rate;
5312                 } else {
5313                         fmtcap &= w->param.supp_stream_formats;
5314                         pcmcap &= w->param.supp_pcm_size_rate;
5315                 }
5316                 ch->io[ret++] = i;
5317         }
5318         ch->io[ret] = -1;
5319
5320         ch->supp_stream_formats = fmtcap;
5321         ch->supp_pcm_size_rate = pcmcap;
5322
5323         /*
5324          *  8bit = 0
5325          * 16bit = 1
5326          * 20bit = 2
5327          * 24bit = 3
5328          * 32bit = 4
5329          */
5330         if (ret > 0) {
5331                 cap = pcmcap;
5332                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_16BIT(cap))
5333                         ch->bit16 = 1;
5334                 else if (HDA_PARAM_SUPP_PCM_SIZE_RATE_8BIT(cap))
5335                         ch->bit16 = 0;
5336                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_32BIT(cap))
5337                         ch->bit32 = 4;
5338                 else if (HDA_PARAM_SUPP_PCM_SIZE_RATE_24BIT(cap))
5339                         ch->bit32 = 3;
5340                 else if (HDA_PARAM_SUPP_PCM_SIZE_RATE_20BIT(cap))
5341                         ch->bit32 = 2;
5342                 i = 0;
5343                 if (!(devinfo->function.audio.quirks & HDA_QUIRK_FORCESTEREO))
5344                         ch->fmtlist[i++] = AFMT_S16_LE;
5345                 ch->fmtlist[i++] = AFMT_S16_LE | AFMT_STEREO;
5346                 if (ch->bit32 > 0) {
5347                         if (!(devinfo->function.audio.quirks &
5348                             HDA_QUIRK_FORCESTEREO))
5349                                 ch->fmtlist[i++] = AFMT_S32_LE;
5350                         ch->fmtlist[i++] = AFMT_S32_LE | AFMT_STEREO;
5351                 }
5352                 ch->fmtlist[i] = 0;
5353                 i = 0;
5354                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_8KHZ(cap))
5355                         ch->pcmrates[i++] = 8000;
5356                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_11KHZ(cap))
5357                         ch->pcmrates[i++] = 11025;
5358                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_16KHZ(cap))
5359                         ch->pcmrates[i++] = 16000;
5360                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_22KHZ(cap))
5361                         ch->pcmrates[i++] = 22050;
5362                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_32KHZ(cap))
5363                         ch->pcmrates[i++] = 32000;
5364                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_44KHZ(cap))
5365                         ch->pcmrates[i++] = 44100;
5366                 /* if (HDA_PARAM_SUPP_PCM_SIZE_RATE_48KHZ(cap)) */
5367                 ch->pcmrates[i++] = 48000;
5368                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_88KHZ(cap))
5369                         ch->pcmrates[i++] = 88200;
5370                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_96KHZ(cap))
5371                         ch->pcmrates[i++] = 96000;
5372                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_176KHZ(cap))
5373                         ch->pcmrates[i++] = 176400;
5374                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_192KHZ(cap))
5375                         ch->pcmrates[i++] = 192000;
5376                 /* if (HDA_PARAM_SUPP_PCM_SIZE_RATE_384KHZ(cap)) */
5377                 ch->pcmrates[i] = 0;
5378                 if (i > 0) {
5379                         ch->caps.minspeed = ch->pcmrates[0];
5380                         ch->caps.maxspeed = ch->pcmrates[i - 1];
5381                 }
5382         }
5383
5384         return (ret);
5385 }
5386
5387 static void
5388 hdac_dump_ctls(struct hdac_devinfo *devinfo, const char *banner, uint32_t flag)
5389 {
5390         struct hdac_audio_ctl *ctl;
5391         struct hdac_softc *sc = devinfo->codec->sc;
5392         int i;
5393         uint32_t fl = 0;
5394
5395
5396         if (flag == 0) {
5397                 fl = SOUND_MASK_VOLUME | SOUND_MASK_PCM |
5398                     SOUND_MASK_CD | SOUND_MASK_LINE | SOUND_MASK_RECLEV |
5399                     SOUND_MASK_MIC | SOUND_MASK_SPEAKER | SOUND_MASK_OGAIN;
5400         }
5401
5402         i = 0;
5403         while ((ctl = hdac_audio_ctl_each(devinfo, &i)) != NULL) {
5404                 if (ctl->enable == 0 || ctl->widget == NULL ||
5405                     ctl->widget->enable == 0 || (ctl->ossmask &
5406                     (SOUND_MASK_SKIP | SOUND_MASK_DISABLE)))
5407                         continue;
5408                 if ((flag == 0 && (ctl->ossmask & ~fl)) ||
5409                     (flag != 0 && (ctl->ossmask & flag))) {
5410                         if (banner != NULL) {
5411                                 device_printf(sc->dev, "\n");
5412                                 device_printf(sc->dev, "%s\n", banner);
5413                         }
5414                         goto hdac_ctl_dump_it_all;
5415                 }
5416         }
5417
5418         return;
5419
5420 hdac_ctl_dump_it_all:
5421         i = 0;
5422         while ((ctl = hdac_audio_ctl_each(devinfo, &i)) != NULL) {
5423                 if (ctl->enable == 0 || ctl->widget == NULL ||
5424                     ctl->widget->enable == 0)
5425                         continue;
5426                 if (!((flag == 0 && (ctl->ossmask & ~fl)) ||
5427                     (flag != 0 && (ctl->ossmask & flag))))
5428                         continue;
5429                 if (flag == 0) {
5430                         device_printf(sc->dev, "\n");
5431                         device_printf(sc->dev, "Unknown Ctl (OSS: %s)\n",
5432                             hdac_audio_ctl_ossmixer_mask2name(ctl->ossmask));
5433                 }
5434                 device_printf(sc->dev, "   |\n");
5435                 device_printf(sc->dev, "   +-  nid: %2d index: %2d ",
5436                     ctl->widget->nid, ctl->index);
5437                 if (ctl->childwidget != NULL)
5438                         kprintf("(nid: %2d) ", ctl->childwidget->nid);
5439                 else
5440                         kprintf("          ");
5441                 kprintf("mute: %d step: %3d size: %3d off: %3d dir=0x%x ossmask=0x%08x\n",
5442                     ctl->mute, ctl->step, ctl->size, ctl->offset, ctl->dir,
5443                     ctl->ossmask);
5444         }
5445 }
5446
5447 static void
5448 hdac_dump_audio_formats(struct hdac_softc *sc, uint32_t fcap, uint32_t pcmcap)
5449 {
5450         uint32_t cap;
5451
5452         cap = fcap;
5453         if (cap != 0) {
5454                 device_printf(sc->dev, "     Stream cap: 0x%08x\n", cap);
5455                 device_printf(sc->dev, "         Format:");
5456                 if (HDA_PARAM_SUPP_STREAM_FORMATS_AC3(cap))
5457                         kprintf(" AC3");
5458                 if (HDA_PARAM_SUPP_STREAM_FORMATS_FLOAT32(cap))
5459                         kprintf(" FLOAT32");
5460                 if (HDA_PARAM_SUPP_STREAM_FORMATS_PCM(cap))
5461                         kprintf(" PCM");
5462                 kprintf("\n");
5463         }
5464         cap = pcmcap;
5465         if (cap != 0) {
5466                 device_printf(sc->dev, "        PCM cap: 0x%08x\n", cap);
5467                 device_printf(sc->dev, "       PCM size:");
5468                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_8BIT(cap))
5469                         kprintf(" 8");
5470                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_16BIT(cap))
5471                         kprintf(" 16");
5472                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_20BIT(cap))
5473                         kprintf(" 20");
5474                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_24BIT(cap))
5475                         kprintf(" 24");
5476                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_32BIT(cap))
5477                         kprintf(" 32");
5478                 kprintf("\n");
5479                 device_printf(sc->dev, "       PCM rate:");
5480                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_8KHZ(cap))
5481                         kprintf(" 8");
5482                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_11KHZ(cap))
5483                         kprintf(" 11");
5484                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_16KHZ(cap))
5485                         kprintf(" 16");
5486                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_22KHZ(cap))
5487                         kprintf(" 22");
5488                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_32KHZ(cap))
5489                         kprintf(" 32");
5490                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_44KHZ(cap))
5491                         kprintf(" 44");
5492                 kprintf(" 48");
5493                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_88KHZ(cap))
5494                         kprintf(" 88");
5495                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_96KHZ(cap))
5496                         kprintf(" 96");
5497                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_176KHZ(cap))
5498                         kprintf(" 176");
5499                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_192KHZ(cap))
5500                         kprintf(" 192");
5501                 kprintf("\n");
5502         }
5503 }
5504
5505 static void
5506 hdac_dump_pin(struct hdac_softc *sc, struct hdac_widget *w)
5507 {
5508         uint32_t pincap, wcap;
5509
5510         pincap = w->wclass.pin.cap;
5511         wcap = w->param.widget_cap;
5512
5513         device_printf(sc->dev, "        Pin cap: 0x%08x\n", pincap);
5514         device_printf(sc->dev, "                ");
5515         if (HDA_PARAM_PIN_CAP_IMP_SENSE_CAP(pincap))
5516                 kprintf(" ISC");
5517         if (HDA_PARAM_PIN_CAP_TRIGGER_REQD(pincap))
5518                 kprintf(" TRQD");
5519         if (HDA_PARAM_PIN_CAP_PRESENCE_DETECT_CAP(pincap))
5520                 kprintf(" PDC");
5521         if (HDA_PARAM_PIN_CAP_HEADPHONE_CAP(pincap))
5522                 kprintf(" HP");
5523         if (HDA_PARAM_PIN_CAP_OUTPUT_CAP(pincap))
5524                 kprintf(" OUT");
5525         if (HDA_PARAM_PIN_CAP_INPUT_CAP(pincap))
5526                 kprintf(" IN");
5527         if (HDA_PARAM_PIN_CAP_BALANCED_IO_PINS(pincap))
5528                 kprintf(" BAL");
5529         if (HDA_PARAM_PIN_CAP_VREF_CTRL(pincap)) {
5530                 kprintf(" VREF[");
5531                 if (HDA_PARAM_PIN_CAP_VREF_CTRL_50(pincap))
5532                         kprintf(" 50");
5533                 if (HDA_PARAM_PIN_CAP_VREF_CTRL_80(pincap))
5534                         kprintf(" 80");
5535                 if (HDA_PARAM_PIN_CAP_VREF_CTRL_100(pincap))
5536                         kprintf(" 100");
5537                 if (HDA_PARAM_PIN_CAP_VREF_CTRL_GROUND(pincap))
5538                         kprintf(" GROUND");
5539                 if (HDA_PARAM_PIN_CAP_VREF_CTRL_HIZ(pincap))
5540                         kprintf(" HIZ");
5541                 kprintf(" ]");
5542         }
5543         if (HDA_PARAM_PIN_CAP_EAPD_CAP(pincap))
5544                 kprintf(" EAPD");
5545         if (HDA_PARAM_AUDIO_WIDGET_CAP_UNSOL_CAP(wcap))
5546                 kprintf(" : UNSOL");
5547         kprintf("\n");
5548         device_printf(sc->dev, "     Pin config: 0x%08x\n",
5549             w->wclass.pin.config);
5550         device_printf(sc->dev, "    Pin control: 0x%08x", w->wclass.pin.ctrl);
5551         if (w->wclass.pin.ctrl & HDA_CMD_SET_PIN_WIDGET_CTRL_HPHN_ENABLE)
5552                 kprintf(" HP");
5553         if (w->wclass.pin.ctrl & HDA_CMD_SET_PIN_WIDGET_CTRL_IN_ENABLE)
5554                 kprintf(" IN");
5555         if (w->wclass.pin.ctrl & HDA_CMD_SET_PIN_WIDGET_CTRL_OUT_ENABLE)
5556                 kprintf(" OUT");
5557         kprintf("\n");
5558 }
5559
5560 static void
5561 hdac_dump_amp(struct hdac_softc *sc, uint32_t cap, char *banner)
5562 {
5563         device_printf(sc->dev, "     %s amp: 0x%08x\n", banner, cap);
5564         device_printf(sc->dev, "                 "
5565             "mute=%d step=%d size=%d offset=%d\n",
5566             HDA_PARAM_OUTPUT_AMP_CAP_MUTE_CAP(cap),
5567             HDA_PARAM_OUTPUT_AMP_CAP_NUMSTEPS(cap),
5568             HDA_PARAM_OUTPUT_AMP_CAP_STEPSIZE(cap),
5569             HDA_PARAM_OUTPUT_AMP_CAP_OFFSET(cap));
5570 }
5571
5572 static void
5573 hdac_dump_nodes(struct hdac_devinfo *devinfo)
5574 {
5575         struct hdac_softc *sc = devinfo->codec->sc;
5576         struct hdac_widget *w, *cw;
5577         int i, j;
5578
5579         device_printf(sc->dev, "\n");
5580         device_printf(sc->dev, "Default Parameter\n");
5581         device_printf(sc->dev, "-----------------\n");
5582         hdac_dump_audio_formats(sc,
5583             devinfo->function.audio.supp_stream_formats,
5584             devinfo->function.audio.supp_pcm_size_rate);
5585         device_printf(sc->dev, "         IN amp: 0x%08x\n",
5586             devinfo->function.audio.inamp_cap);
5587         device_printf(sc->dev, "        OUT amp: 0x%08x\n",
5588             devinfo->function.audio.outamp_cap);
5589         for (i = devinfo->startnode; i < devinfo->endnode; i++) {
5590                 w = hdac_widget_get(devinfo, i);
5591                 if (w == NULL) {
5592                         device_printf(sc->dev, "Ghost widget nid=%d\n", i);
5593                         continue;
5594                 }
5595                 device_printf(sc->dev, "\n");
5596                 device_printf(sc->dev, "            nid: %d [%s]%s\n", w->nid,
5597                     HDA_PARAM_AUDIO_WIDGET_CAP_DIGITAL(w->param.widget_cap) ?
5598                     "DIGITAL" : "ANALOG",
5599                     (w->enable == 0) ? " [DISABLED]" : "");
5600                 device_printf(sc->dev, "           name: %s\n", w->name);
5601                 device_printf(sc->dev, "     widget_cap: 0x%08x\n",
5602                     w->param.widget_cap);
5603                 device_printf(sc->dev, "    Parse flags: 0x%08x\n",
5604                     w->pflags);
5605                 device_printf(sc->dev, "      Ctl flags: 0x%08x\n",
5606                     w->ctlflags);
5607                 if (w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_OUTPUT ||
5608                     w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_INPUT) {
5609                         hdac_dump_audio_formats(sc,
5610                             w->param.supp_stream_formats,
5611                             w->param.supp_pcm_size_rate);
5612                 } else if (w->type ==
5613                     HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX)
5614                         hdac_dump_pin(sc, w);
5615                 if (w->param.eapdbtl != HDAC_INVALID)
5616                         device_printf(sc->dev, "           EAPD: 0x%08x\n",
5617                             w->param.eapdbtl);
5618                 if (HDA_PARAM_AUDIO_WIDGET_CAP_OUT_AMP(w->param.widget_cap) &&
5619                     w->param.outamp_cap != 0)
5620                         hdac_dump_amp(sc, w->param.outamp_cap, "Output");
5621                 if (HDA_PARAM_AUDIO_WIDGET_CAP_IN_AMP(w->param.widget_cap) &&
5622                     w->param.inamp_cap != 0)
5623                         hdac_dump_amp(sc, w->param.inamp_cap, " Input");
5624                 device_printf(sc->dev, "    connections: %d\n", w->nconns);
5625                 for (j = 0; j < w->nconns; j++) {
5626                         cw = hdac_widget_get(devinfo, w->conns[j]);
5627                         device_printf(sc->dev, "          |\n");
5628                         device_printf(sc->dev, "          + <- nid=%d [%s]",
5629                             w->conns[j], (cw == NULL) ? "GHOST!" : cw->name);
5630                         if (cw == NULL)
5631                                 kprintf(" [UNKNOWN]");
5632                         else if (cw->enable == 0)
5633                                 kprintf(" [DISABLED]");
5634                         if (w->nconns > 1 && w->selconn == j && w->type !=
5635                             HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_MIXER)
5636                                 kprintf(" (selected)");
5637                         kprintf("\n");
5638                 }
5639         }
5640
5641 }
5642
5643 static int
5644 hdac_dump_dac_internal(struct hdac_devinfo *devinfo, nid_t nid, int depth)
5645 {
5646         struct hdac_widget *w, *cw;
5647         struct hdac_softc *sc = devinfo->codec->sc;
5648         int i;
5649
5650         if (depth > HDA_PARSE_MAXDEPTH)
5651                 return (0);
5652
5653         w = hdac_widget_get(devinfo, nid);
5654         if (w == NULL || w->enable == 0 || !(w->pflags & HDA_DAC_PATH))
5655                 return (0);
5656
5657         if (w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX) {
5658                 device_printf(sc->dev, "\n");
5659                 device_printf(sc->dev, "    nid=%d [%s]\n", w->nid, w->name);
5660                 device_printf(sc->dev, "      ^\n");
5661                 device_printf(sc->dev, "      |\n");
5662                 device_printf(sc->dev, "      +-----<------+\n");
5663         } else {
5664                 device_printf(sc->dev, "                   ^\n");
5665                 device_printf(sc->dev, "                   |\n");
5666                 device_printf(sc->dev, "               ");
5667                 kprintf("  nid=%d [%s]\n", w->nid, w->name);
5668         }
5669
5670         if (w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_OUTPUT) {
5671                 return (1);
5672         } else if (w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_MIXER) {
5673                 for (i = 0; i < w->nconns; i++) {
5674                         cw = hdac_widget_get(devinfo, w->conns[i]);
5675                         if (cw == NULL || cw->enable == 0 || cw->type ==
5676                             HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX)
5677                                 continue;
5678                         if (hdac_dump_dac_internal(devinfo, cw->nid,
5679                             depth + 1) != 0)
5680                                 return (1);
5681                 }
5682         } else if ((w->type ==
5683             HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_SELECTOR ||
5684             w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX) &&
5685             w->selconn > -1 && w->selconn < w->nconns) {
5686                 if (hdac_dump_dac_internal(devinfo, w->conns[w->selconn],
5687                     depth + 1) != 0)
5688                         return (1);
5689         }
5690
5691         return (0);
5692 }
5693
5694 static void
5695 hdac_dump_dac(struct hdac_devinfo *devinfo)
5696 {
5697         struct hdac_widget *w;
5698         struct hdac_softc *sc = devinfo->codec->sc;
5699         int i, printed = 0;
5700
5701         for (i = devinfo->startnode; i < devinfo->endnode; i++) {
5702                 w = hdac_widget_get(devinfo, i);
5703                 if (w == NULL || w->enable == 0)
5704                         continue;
5705                 if (w->type != HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX ||
5706                     !(w->pflags & HDA_DAC_PATH))
5707                         continue;
5708                 if (printed == 0) {
5709                         printed = 1;
5710                         device_printf(sc->dev, "\n");
5711                         device_printf(sc->dev, "Playback path:\n");
5712                 }
5713                 hdac_dump_dac_internal(devinfo, w->nid, 0);
5714         }
5715 }
5716
5717 static void
5718 hdac_dump_adc(struct hdac_devinfo *devinfo)
5719 {
5720         struct hdac_widget *w, *cw;
5721         struct hdac_softc *sc = devinfo->codec->sc;
5722         int i, j;
5723         int printed = 0;
5724         char ossdevs[256];
5725
5726         for (i = devinfo->startnode; i < devinfo->endnode; i++) {
5727                 w = hdac_widget_get(devinfo, i);
5728                 if (w == NULL || w->enable == 0)
5729                         continue;
5730                 if (!(w->pflags & HDA_ADC_RECSEL))
5731                         continue;
5732                 if (printed == 0) {
5733                         printed = 1;
5734                         device_printf(sc->dev, "\n");
5735                         device_printf(sc->dev, "Recording sources:\n");
5736                 }
5737                 device_printf(sc->dev, "\n");
5738                 device_printf(sc->dev, "    nid=%d [%s]\n", w->nid, w->name);
5739                 for (j = 0; j < w->nconns; j++) {
5740                         cw = hdac_widget_get(devinfo, w->conns[j]);
5741                         if (cw == NULL || cw->enable == 0)
5742                                 continue;
5743                         hdac_audio_ctl_ossmixer_mask2allname(cw->ctlflags,
5744                             ossdevs, sizeof(ossdevs));
5745                         device_printf(sc->dev, "      |\n");
5746                         device_printf(sc->dev, "      + <- nid=%d [%s]",
5747                             cw->nid, cw->name);
5748                         if (strlen(ossdevs) > 0) {
5749                                 kprintf(" [recsrc: %s]", ossdevs);
5750                         }
5751                         kprintf("\n");
5752                 }
5753         }
5754 }
5755
5756 static void
5757 hdac_dump_pcmchannels(struct hdac_softc *sc, int pcnt, int rcnt)
5758 {
5759         nid_t *nids;
5760
5761         if (pcnt > 0) {
5762                 device_printf(sc->dev, "\n");
5763                 device_printf(sc->dev, "   PCM Playback: %d\n", pcnt);
5764                 hdac_dump_audio_formats(sc, sc->play.supp_stream_formats,
5765                     sc->play.supp_pcm_size_rate);
5766                 device_printf(sc->dev, "            DAC:");
5767                 for (nids = sc->play.io; *nids != -1; nids++)
5768                         kprintf(" %d", *nids);
5769                 kprintf("\n");
5770         }
5771
5772         if (rcnt > 0) {
5773                 device_printf(sc->dev, "\n");
5774                 device_printf(sc->dev, "     PCM Record: %d\n", rcnt);
5775                 hdac_dump_audio_formats(sc, sc->play.supp_stream_formats,
5776                     sc->rec.supp_pcm_size_rate);
5777                 device_printf(sc->dev, "            ADC:");
5778                 for (nids = sc->rec.io; *nids != -1; nids++)
5779                         kprintf(" %d", *nids);
5780                 kprintf("\n");
5781         }
5782 }
5783
5784 static void
5785 hdac_release_resources(struct hdac_softc *sc)
5786 {
5787         struct hdac_devinfo *devinfo = NULL;
5788         device_t *devlist = NULL;
5789         int i, devcount;
5790
5791         if (sc == NULL)
5792                 return;
5793
5794         hdac_lock(sc);
5795         sc->polling = 0;
5796         sc->poll_ival = 0;
5797         callout_stop(&sc->poll_hda);
5798         callout_stop(&sc->poll_hdac);
5799         callout_stop(&sc->poll_jack);
5800         hdac_reset(sc);
5801         hdac_unlock(sc);
5802
5803         hdac_irq_free(sc);
5804
5805         /* give pending interrupts stuck on the lock a chance to clear */
5806         /* bad hack */
5807         tsleep(&sc->irq, 0, "hdaslp", hz / 10);
5808
5809         device_get_children(sc->dev, &devlist, &devcount);
5810         for (i = 0; devlist != NULL && i < devcount; i++) {
5811                 devinfo = (struct hdac_devinfo *)device_get_ivars(devlist[i]);
5812                 if (devinfo == NULL)
5813                         continue;
5814                 if (devinfo->widget != NULL)
5815                         kfree(devinfo->widget, M_HDAC);
5816                 if (devinfo->node_type ==
5817                     HDA_PARAM_FCT_GRP_TYPE_NODE_TYPE_AUDIO &&
5818                     devinfo->function.audio.ctl != NULL)
5819                         kfree(devinfo->function.audio.ctl, M_HDAC);
5820                 kfree(devinfo, M_HDAC);
5821                 device_delete_child(sc->dev, devlist[i]);
5822         }
5823         if (devlist != NULL)
5824                 kfree(devlist, M_TEMP);
5825
5826         for (i = 0; i < HDAC_CODEC_MAX; i++) {
5827                 if (sc->codecs[i] != NULL)
5828                         kfree(sc->codecs[i], M_HDAC);
5829                 sc->codecs[i] = NULL;
5830         }
5831
5832         hdac_dma_free(sc, &sc->pos_dma);
5833         hdac_dma_free(sc, &sc->rirb_dma);
5834         hdac_dma_free(sc, &sc->corb_dma);
5835         if (sc->play.blkcnt > 0)
5836                 hdac_dma_free(sc, &sc->play.bdl_dma);
5837         if (sc->rec.blkcnt > 0)
5838                 hdac_dma_free(sc, &sc->rec.bdl_dma);
5839         if (sc->chan_dmat != NULL) {
5840                 bus_dma_tag_destroy(sc->chan_dmat);
5841                 sc->chan_dmat = NULL;
5842         }
5843         hdac_mem_free(sc);
5844         snd_mtxfree(sc->lock);
5845         kfree(sc, M_DEVBUF);
5846 }
5847
5848 /* This function surely going to make its way into upper level someday. */
5849 static void
5850 hdac_config_fetch(struct hdac_softc *sc, uint32_t *on, uint32_t *off)
5851 {
5852         char *res = NULL;
5853         int i = 0, j, k, len, inv;
5854
5855         if (on != NULL)
5856                 *on = 0;
5857         if (off != NULL)
5858                 *off = 0;
5859         if (sc == NULL)
5860                 return;
5861         if (resource_string_value(device_get_name(sc->dev),
5862             device_get_unit(sc->dev), "config", &res) != 0)
5863                 return;
5864         if (!(res != NULL && strlen(res) > 0))
5865                 return;
5866         HDA_BOOTVERBOSE(
5867                 device_printf(sc->dev, "HDA_DEBUG: HDA Config:");
5868         );
5869         for (;;) {
5870                 while (res[i] != '\0' &&
5871                     (res[i] == ',' || isspace(res[i]) != 0))
5872                         i++;
5873                 if (res[i] == '\0') {
5874                         HDA_BOOTVERBOSE(
5875                                 kprintf("\n");
5876                         );
5877                         return;
5878                 }
5879                 j = i;
5880                 while (res[j] != '\0' &&
5881                     !(res[j] == ',' || isspace(res[j]) != 0))
5882                         j++;
5883                 len = j - i;
5884                 if (len > 2 && strncmp(res + i, "no", 2) == 0)
5885                         inv = 2;
5886                 else
5887                         inv = 0;
5888                 for (k = 0; len > inv && k < HDAC_QUIRKS_TAB_LEN; k++) {
5889                         if (strncmp(res + i + inv,
5890                             hdac_quirks_tab[k].key, len - inv) != 0)
5891                                 continue;
5892                         if (len - inv != strlen(hdac_quirks_tab[k].key))
5893                                 break;
5894                         HDA_BOOTVERBOSE(
5895                                 kprintf(" %s%s", (inv != 0) ? "no" : "",
5896                                     hdac_quirks_tab[k].key);
5897                         );
5898                         if (inv == 0 && on != NULL)
5899                                 *on |= hdac_quirks_tab[k].value;
5900                         else if (inv != 0 && off != NULL)
5901                                 *off |= hdac_quirks_tab[k].value;
5902                         break;
5903                 }
5904                 i = j;
5905         }
5906 }
5907
5908 #ifdef SND_DYNSYSCTL
5909 static int
5910 sysctl_hdac_polling(SYSCTL_HANDLER_ARGS)
5911 {
5912         struct hdac_softc *sc;
5913         struct hdac_devinfo *devinfo;
5914         device_t dev;
5915         uint32_t ctl;
5916         int err, val;
5917
5918         dev = oidp->oid_arg1;
5919         devinfo = pcm_getdevinfo(dev);
5920         if (devinfo == NULL || devinfo->codec == NULL ||
5921             devinfo->codec->sc == NULL)
5922                 return (EINVAL);
5923         sc = devinfo->codec->sc;
5924         hdac_lock(sc);
5925         val = sc->polling;
5926         hdac_unlock(sc);
5927         err = sysctl_handle_int(oidp, &val, 0, req);
5928
5929         if (err != 0 || req->newptr == NULL)
5930                 return (err);
5931         if (val < 0 || val > 1)
5932                 return (EINVAL);
5933
5934         hdac_lock(sc);
5935         if (val != sc->polling) {
5936                 if (hda_chan_active(sc) != 0)
5937                         err = EBUSY;
5938                 else if (val == 0) {
5939                         callout_stop(&sc->poll_hdac);
5940                         hdac_unlock(sc);
5941                         hdac_lock(sc);
5942                         HDAC_WRITE_2(&sc->mem, HDAC_RINTCNT,
5943                             sc->rirb_size / 2);
5944                         ctl = HDAC_READ_1(&sc->mem, HDAC_RIRBCTL);
5945                         ctl |= HDAC_RIRBCTL_RINTCTL;
5946                         HDAC_WRITE_1(&sc->mem, HDAC_RIRBCTL, ctl);
5947                         HDAC_WRITE_4(&sc->mem, HDAC_INTCTL,
5948                             HDAC_INTCTL_CIE | HDAC_INTCTL_GIE);
5949                         sc->polling = 0;
5950                         DELAY(1000);
5951                 } else {
5952                         HDAC_WRITE_4(&sc->mem, HDAC_INTCTL, 0);
5953                         HDAC_WRITE_2(&sc->mem, HDAC_RINTCNT, 0);
5954                         ctl = HDAC_READ_1(&sc->mem, HDAC_RIRBCTL);
5955                         ctl &= ~HDAC_RIRBCTL_RINTCTL;
5956                         HDAC_WRITE_1(&sc->mem, HDAC_RIRBCTL, ctl);
5957                         callout_reset(&sc->poll_hdac, 1, hdac_poll_callback,
5958                             sc);
5959                         sc->polling = 1;
5960                         DELAY(1000);
5961                 }
5962         }
5963         hdac_unlock(sc);
5964
5965         return (err);
5966 }
5967
5968 static int
5969 sysctl_hdac_polling_interval(SYSCTL_HANDLER_ARGS)
5970 {
5971         struct hdac_softc *sc;
5972         struct hdac_devinfo *devinfo;
5973         device_t dev;
5974         int err, val;
5975
5976         dev = oidp->oid_arg1;
5977         devinfo = pcm_getdevinfo(dev);
5978         if (devinfo == NULL || devinfo->codec == NULL ||
5979             devinfo->codec->sc == NULL)
5980                 return (EINVAL);
5981         sc = devinfo->codec->sc;
5982         hdac_lock(sc);
5983         val = ((uint64_t)sc->poll_ival * 1000) / hz;
5984         hdac_unlock(sc);
5985         err = sysctl_handle_int(oidp, &val, 0, req);
5986
5987         if (err != 0 || req->newptr == NULL)
5988                 return (err);
5989
5990         if (val < 1)
5991                 val = 1;
5992         if (val > 5000)
5993                 val = 5000;
5994         val = ((uint64_t)val * hz) / 1000;
5995         if (val < 1)
5996                 val = 1;
5997         if (val > (hz * 5))
5998                 val = hz * 5;
5999
6000         hdac_lock(sc);
6001         sc->poll_ival = val;
6002         hdac_unlock(sc);
6003
6004         return (err);
6005 }
6006
6007 #ifdef SND_DEBUG
6008 static int
6009 sysctl_hdac_pindump(SYSCTL_HANDLER_ARGS)
6010 {
6011         struct hdac_softc *sc;
6012         struct hdac_devinfo *devinfo;
6013         struct hdac_widget *w;
6014         device_t dev;
6015         uint32_t res, pincap, execres;
6016         int i, err, val;
6017         nid_t cad;
6018
6019         dev = oidp->oid_arg1;
6020         devinfo = pcm_getdevinfo(dev);
6021         if (devinfo == NULL || devinfo->codec == NULL ||
6022             devinfo->codec->sc == NULL)
6023                 return (EINVAL);
6024         val = 0;
6025         err = sysctl_handle_int(oidp, &val, 0, req);
6026         if (err != 0 || req->newptr == NULL || val == 0)
6027                 return (err);
6028         sc = devinfo->codec->sc;
6029         cad = devinfo->codec->cad;
6030         hdac_lock(sc);
6031         device_printf(dev, "HDAC Dump AFG [nid=%d]:\n", devinfo->nid);
6032         for (i = devinfo->startnode; i < devinfo->endnode; i++) {
6033                 w = hdac_widget_get(devinfo, i);
6034                 if (w == NULL || w->type !=
6035                     HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX)
6036                         continue;
6037                 pincap = w->wclass.pin.cap;
6038                 if ((HDA_PARAM_PIN_CAP_IMP_SENSE_CAP(pincap) ||
6039                     HDA_PARAM_PIN_CAP_PRESENCE_DETECT_CAP(pincap)) &&
6040                     HDA_PARAM_PIN_CAP_TRIGGER_REQD(pincap)) {
6041                         timeout = 10000;
6042                         hdac_command(sc,
6043                             HDA_CMD_SET_PIN_SENSE(cad, w->nid, 0), cad);
6044                         do {
6045                                 res = hdac_command(sc,
6046                                     HDA_CMD_GET_PIN_SENSE(cad, w->nid), cad);
6047                                 if (res != 0x7fffffff)
6048                                         break;
6049                                 DELAY(10);
6050                         } while (--timeout != 0);
6051                 } else {
6052                         timeout = -1;
6053                         res = hdac_command(sc, HDA_CMD_GET_PIN_SENSE(cad,
6054                             w->nid), cad);
6055                 }
6056                 device_printf(dev,
6057                     "PIN_SENSE: nid=%-3d timeout=%d res=0x%08x [%s]\n",
6058                     w->nid, timeout, res,
6059                     (w->enable == 0) ? "DISABLED" : "ENABLED");
6060         }
6061         device_printf(dev,
6062             "NumGPIO=%d NumGPO=%d NumGPI=%d GPIWake=%d GPIUnsol=%d\n",
6063             HDA_PARAM_GPIO_COUNT_NUM_GPIO(devinfo->function.audio.gpio),
6064             HDA_PARAM_GPIO_COUNT_NUM_GPO(devinfo->function.audio.gpio),
6065             HDA_PARAM_GPIO_COUNT_NUM_GPI(devinfo->function.audio.gpio),
6066             HDA_PARAM_GPIO_COUNT_GPI_WAKE(devinfo->function.audio.gpio),
6067             HDA_PARAM_GPIO_COUNT_GPI_UNSOL(devinfo->function.audio.gpio));
6068         if (HDA_PARAM_GPIO_COUNT_NUM_GPI(devinfo->function.audio.gpio) > 0) {
6069                 device_printf(dev, " GPI:");
6070                 res = hdac_command(sc,
6071                     HDA_CMD_GET_GPI_DATA(cad, devinfo->nid), cad);
6072                 kprintf(" data=0x%08x", res);
6073                 res = hdac_command(sc,
6074                     HDA_CMD_GET_GPI_WAKE_ENABLE_MASK(cad, devinfo->nid),
6075                     cad);
6076                 kprintf(" wake=0x%08x", res);
6077                 res = hdac_command(sc,
6078                     HDA_CMD_GET_GPI_UNSOLICITED_ENABLE_MASK(cad, devinfo->nid),
6079                     cad);
6080                 kprintf(" unsol=0x%08x", res);
6081                 res = hdac_command(sc,
6082                     HDA_CMD_GET_GPI_STICKY_MASK(cad, devinfo->nid), cad);
6083                 kprintf(" sticky=0x%08x\n", res);
6084         }
6085         if (HDA_PARAM_GPIO_COUNT_NUM_GPO(devinfo->function.audio.gpio) > 0) {
6086                 device_printf(dev, " GPO:");
6087                 res = hdac_command(sc,
6088                     HDA_CMD_GET_GPO_DATA(cad, devinfo->nid), cad);
6089                 kprintf(" data=0x%08x\n", res);
6090         }
6091         if (HDA_PARAM_GPIO_COUNT_NUM_GPIO(devinfo->function.audio.gpio) > 0) {
6092                 device_printf(dev, "GPI0:");
6093                 res = hdac_command(sc,
6094                     HDA_CMD_GET_GPIO_DATA(cad, devinfo->nid), cad);
6095                 kprintf(" data=0x%08x", res);
6096                 res = hdac_command(sc,
6097                     HDA_CMD_GET_GPIO_ENABLE_MASK(cad, devinfo->nid), cad);
6098                 kprintf(" enable=0x%08x", res);
6099                 res = hdac_command(sc,
6100                     HDA_CMD_GET_GPIO_DIRECTION(cad, devinfo->nid), cad);
6101                 kprintf(" direction=0x%08x\n", res);
6102                 res = hdac_command(sc,
6103                     HDA_CMD_GET_GPIO_WAKE_ENABLE_MASK(cad, devinfo->nid), cad);
6104                 device_printf(dev, "      wake=0x%08x", res);
6105                 res = hdac_command(sc,
6106                     HDA_CMD_GET_GPIO_UNSOLICITED_ENABLE_MASK(cad, devinfo->nid),
6107                     cad);
6108                 kprintf("  unsol=0x%08x", res);
6109                 res = hdac_command(sc,
6110                     HDA_CMD_GET_GPIO_STICKY_MASK(cad, devinfo->nid), cad);
6111                 kprintf("    sticky=0x%08x\n", res);
6112         }
6113         hdac_unlock(sc);
6114         return (0);
6115 }
6116 #endif
6117 #endif
6118
6119 static void
6120 hdac_attach2(void *arg)
6121 {
6122         struct hdac_softc *sc;
6123         struct hdac_widget *w;
6124         struct hdac_audio_ctl *ctl;
6125         uint32_t quirks_on, quirks_off;
6126         int pcnt, rcnt, codec_index;
6127         int i;
6128         char status[SND_STATUSLEN];
6129         device_t *devlist = NULL;
6130         int devcount;
6131         struct hdac_devinfo *devinfo = NULL;
6132
6133         sc = (struct hdac_softc *)arg;
6134
6135         hdac_config_fetch(sc, &quirks_on, &quirks_off);
6136
6137         HDA_BOOTVERBOSE(
6138                 device_printf(sc->dev, "HDA_DEBUG: HDA Config: on=0x%08x off=0x%08x\n",
6139                     quirks_on, quirks_off);
6140         );
6141
6142         if (resource_int_value(device_get_name(sc->dev),
6143             device_get_unit(sc->dev), "codec_index", &codec_index) != 0) {
6144                 switch (sc->pci_subvendor) {
6145                 case GB_G33S2H_SUBVENDOR:
6146                         codec_index = 2;
6147                         break;
6148                 default:
6149                         codec_index = 0;
6150                         break;
6151                 }
6152         }
6153
6154         hdac_lock(sc);
6155
6156         /* Remove ourselves from the config hooks */
6157         if (sc->intrhook.ich_func != NULL) {
6158                 config_intrhook_disestablish(&sc->intrhook);
6159                 sc->intrhook.ich_func = NULL;
6160         }
6161
6162         /* Start the corb and rirb engines */
6163         HDA_BOOTVERBOSE(
6164                 device_printf(sc->dev, "HDA_DEBUG: Starting CORB Engine...\n");
6165         );
6166         hdac_corb_start(sc);
6167         HDA_BOOTVERBOSE(
6168                 device_printf(sc->dev, "HDA_DEBUG: Starting RIRB Engine...\n");
6169         );
6170         hdac_rirb_start(sc);
6171
6172         HDA_BOOTVERBOSE(
6173                 device_printf(sc->dev,
6174                     "HDA_DEBUG: Enabling controller interrupt...\n");
6175         );
6176         if (sc->polling == 0)
6177                 HDAC_WRITE_4(&sc->mem, HDAC_INTCTL,
6178                     HDAC_INTCTL_CIE | HDAC_INTCTL_GIE);
6179         HDAC_WRITE_4(&sc->mem, HDAC_GCTL, HDAC_READ_4(&sc->mem, HDAC_GCTL) |
6180             HDAC_GCTL_UNSOL);
6181
6182         DELAY(1000);
6183
6184         HDA_BOOTVERBOSE(
6185                 device_printf(sc->dev,
6186                     "HDA_DEBUG: Scanning HDA codecs [start index=%d] ...\n",
6187                     codec_index);
6188         );
6189         hdac_scan_codecs(sc, codec_index);
6190
6191         device_get_children(sc->dev, &devlist, &devcount);
6192         for (i = 0; devlist != NULL && i < devcount; i++) {
6193                 devinfo = (struct hdac_devinfo *)device_get_ivars(devlist[i]);
6194                 if (devinfo != NULL && devinfo->node_type ==
6195                     HDA_PARAM_FCT_GRP_TYPE_NODE_TYPE_AUDIO) {
6196                         break;
6197                 } else
6198                         devinfo = NULL;
6199         }
6200         if (devlist != NULL)
6201                 kfree(devlist, M_TEMP);
6202
6203         if (devinfo == NULL) {
6204                 hdac_unlock(sc);
6205                 device_printf(sc->dev, "Audio Function Group not found!\n");
6206                 hdac_release_resources(sc);
6207                 return;
6208         }
6209
6210         HDA_BOOTVERBOSE(
6211                 device_printf(sc->dev,
6212                     "HDA_DEBUG: Parsing AFG nid=%d cad=%d\n",
6213                     devinfo->nid, devinfo->codec->cad);
6214         );
6215         hdac_audio_parse(devinfo);
6216         HDA_BOOTVERBOSE(
6217                 device_printf(sc->dev, "HDA_DEBUG: Parsing Ctls...\n");
6218         );
6219         hdac_audio_ctl_parse(devinfo);
6220         HDA_BOOTVERBOSE(
6221                 device_printf(sc->dev, "HDA_DEBUG: Parsing vendor patch...\n");
6222         );
6223         hdac_vendor_patch_parse(devinfo);
6224         if (quirks_on != 0)
6225                 devinfo->function.audio.quirks |= quirks_on;
6226         if (quirks_off != 0)
6227                 devinfo->function.audio.quirks &= ~quirks_off;
6228
6229         /* XXX Disable all DIGITAL path. */
6230         for (i = devinfo->startnode; i < devinfo->endnode; i++) {
6231                 w = hdac_widget_get(devinfo, i);
6232                 if (w == NULL)
6233                         continue;
6234                 if (HDA_PARAM_AUDIO_WIDGET_CAP_DIGITAL(w->param.widget_cap)) {
6235                         w->enable = 0;
6236                         continue;
6237                 }
6238                 /* XXX Disable useless pin ? */
6239                 if (w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX &&
6240                     (w->wclass.pin.config &
6241                     HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_MASK) ==
6242                     HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_NONE)
6243                         w->enable = 0;
6244         }
6245         i = 0;
6246         while ((ctl = hdac_audio_ctl_each(devinfo, &i)) != NULL) {
6247                 if (ctl->widget == NULL)
6248                         continue;
6249                 if (ctl->ossmask & SOUND_MASK_DISABLE)
6250                         ctl->enable = 0;
6251                 w = ctl->widget;
6252                 if (w->enable == 0 ||
6253                     HDA_PARAM_AUDIO_WIDGET_CAP_DIGITAL(w->param.widget_cap))
6254                         ctl->enable = 0;
6255                 w = ctl->childwidget;
6256                 if (w == NULL)
6257                         continue;
6258                 if (w->enable == 0 ||
6259                     HDA_PARAM_AUDIO_WIDGET_CAP_DIGITAL(w->param.widget_cap))
6260                         ctl->enable = 0;
6261         }
6262
6263         HDA_BOOTVERBOSE(
6264                 device_printf(sc->dev, "HDA_DEBUG: Building AFG tree...\n");
6265         );
6266         hdac_audio_build_tree(devinfo);
6267
6268         i = 0;
6269         while ((ctl = hdac_audio_ctl_each(devinfo, &i)) != NULL) {
6270                 if (ctl->ossmask & (SOUND_MASK_SKIP | SOUND_MASK_DISABLE))
6271                         ctl->ossmask = 0;
6272         }
6273         HDA_BOOTVERBOSE(
6274                 device_printf(sc->dev, "HDA_DEBUG: AFG commit...\n");
6275         );
6276         hdac_audio_commit(devinfo, HDA_COMMIT_ALL);
6277         HDA_BOOTVERBOSE(
6278                 device_printf(sc->dev, "HDA_DEBUG: Ctls commit...\n");
6279         );
6280         hdac_audio_ctl_commit(devinfo);
6281
6282         HDA_BOOTVERBOSE(
6283                 device_printf(sc->dev, "HDA_DEBUG: PCMDIR_PLAY setup...\n");
6284         );
6285         pcnt = hdac_pcmchannel_setup(devinfo, PCMDIR_PLAY);
6286         HDA_BOOTVERBOSE(
6287                 device_printf(sc->dev, "HDA_DEBUG: PCMDIR_REC setup...\n");
6288         );
6289         rcnt = hdac_pcmchannel_setup(devinfo, PCMDIR_REC);
6290
6291         hdac_unlock(sc);
6292         HDA_BOOTVERBOSE(
6293                 device_printf(sc->dev,
6294                     "HDA_DEBUG: OSS mixer initialization...\n");
6295         );
6296
6297         /*
6298          * There is no point of return after this. If the driver failed,
6299          * so be it. Let the detach procedure do all the cleanup.
6300          */
6301         if (mixer_init(sc->dev, &hdac_audio_ctl_ossmixer_class, devinfo) != 0)
6302                 device_printf(sc->dev, "Can't register mixer\n");
6303
6304         if (pcnt > 0)
6305                 pcnt = 1;
6306         if (rcnt > 0)
6307                 rcnt = 1;
6308
6309         HDA_BOOTVERBOSE(
6310                 device_printf(sc->dev,
6311                     "HDA_DEBUG: Registering PCM channels...\n");
6312         );
6313         if (pcm_register(sc->dev, devinfo, pcnt, rcnt) != 0)
6314                 device_printf(sc->dev, "Can't register PCM\n");
6315
6316         sc->registered++;
6317
6318         if ((devinfo->function.audio.quirks & HDA_QUIRK_DMAPOS) &&
6319             hdac_dma_alloc(sc, &sc->pos_dma,
6320             (sc->num_iss + sc->num_oss + sc->num_bss) * 8) != 0) {
6321                 HDA_BOOTVERBOSE(
6322                         device_printf(sc->dev,
6323                             "Failed to allocate DMA pos buffer (non-fatal)\n");
6324                 );
6325         }
6326
6327         for (i = 0; i < pcnt; i++)
6328                 pcm_addchan(sc->dev, PCMDIR_PLAY, &hdac_channel_class, devinfo);
6329         for (i = 0; i < rcnt; i++)
6330                 pcm_addchan(sc->dev, PCMDIR_REC, &hdac_channel_class, devinfo);
6331
6332 #ifdef SND_DYNSYSCTL
6333         SYSCTL_ADD_PROC(snd_sysctl_tree(sc->dev),
6334             SYSCTL_CHILDREN(snd_sysctl_tree_top(sc->dev)), OID_AUTO,
6335             "polling", CTLTYPE_INT | CTLFLAG_RW, sc->dev, sizeof(sc->dev),
6336             sysctl_hdac_polling, "I", "Enable polling mode");
6337         SYSCTL_ADD_PROC(snd_sysctl_tree(sc->dev),
6338             SYSCTL_CHILDREN(snd_sysctl_tree_top(sc->dev)), OID_AUTO,
6339             "polling_interval", CTLTYPE_INT | CTLFLAG_RW, sc->dev,
6340             sizeof(sc->dev), sysctl_hdac_polling_interval, "I",
6341             "Controller/Jack Sense polling interval (1-1000 ms)");
6342 #ifdef SND_DEBUG
6343         SYSCTL_ADD_PROC(snd_sysctl_tree(sc->dev),
6344             SYSCTL_CHILDREN(snd_sysctl_tree_top(sc->dev)), OID_AUTO,
6345             "pindump", CTLTYPE_INT | CTLFLAG_RW, sc->dev, sizeof(sc->dev),
6346             sysctl_hdac_pindump, "I", "Dump pin states/data");
6347 #endif
6348 #endif
6349
6350         ksnprintf(status, SND_STATUSLEN, "at memory 0x%lx irq %ld %s [%s]",
6351             rman_get_start(sc->mem.mem_res), rman_get_start(sc->irq.irq_res),
6352             PCM_KLDSTRING(snd_hda), HDA_DRV_TEST_REV);
6353         pcm_setstatus(sc->dev, status);
6354         device_printf(sc->dev, "<HDA Codec: %s>\n", hdac_codec_name(devinfo));
6355         HDA_BOOTVERBOSE(
6356                 device_printf(sc->dev, "<HDA Codec ID: 0x%08x>\n",
6357                     hdac_codec_id(devinfo));
6358         );
6359         device_printf(sc->dev, "<HDA Driver Revision: %s>\n",
6360             HDA_DRV_TEST_REV);
6361
6362         HDA_BOOTVERBOSE(
6363                 if (devinfo->function.audio.quirks != 0) {
6364                         device_printf(sc->dev, "\n");
6365                         device_printf(sc->dev, "HDA config/quirks:");
6366                         for (i = 0; i < HDAC_QUIRKS_TAB_LEN; i++) {
6367                                 if ((devinfo->function.audio.quirks &
6368                                     hdac_quirks_tab[i].value) ==
6369                                     hdac_quirks_tab[i].value)
6370                                         kprintf(" %s", hdac_quirks_tab[i].key);
6371                         }
6372                         kprintf("\n");
6373                 }
6374                 device_printf(sc->dev, "\n");
6375                 device_printf(sc->dev, "+-------------------+\n");
6376                 device_printf(sc->dev, "| DUMPING HDA NODES |\n");
6377                 device_printf(sc->dev, "+-------------------+\n");
6378                 hdac_dump_nodes(devinfo);
6379                 device_printf(sc->dev, "\n");
6380                 device_printf(sc->dev, "+------------------------+\n");
6381                 device_printf(sc->dev, "| DUMPING HDA AMPLIFIERS |\n");
6382                 device_printf(sc->dev, "+------------------------+\n");
6383                 device_printf(sc->dev, "\n");
6384                 i = 0;
6385                 while ((ctl = hdac_audio_ctl_each(devinfo, &i)) != NULL) {
6386                         device_printf(sc->dev, "%3d: nid=%d", i,
6387                             (ctl->widget != NULL) ? ctl->widget->nid : -1);
6388                         if (ctl->childwidget != NULL)
6389                                 kprintf(" cnid=%d", ctl->childwidget->nid);
6390                         kprintf(" dir=0x%x index=%d "
6391                             "ossmask=0x%08x ossdev=%d%s\n",
6392                             ctl->dir, ctl->index,
6393                             ctl->ossmask, ctl->ossdev,
6394                             (ctl->enable == 0) ? " [DISABLED]" : "");
6395                 }
6396                 device_printf(sc->dev, "\n");
6397                 device_printf(sc->dev, "+-----------------------------------+\n");
6398                 device_printf(sc->dev, "| DUMPING HDA AUDIO/VOLUME CONTROLS |\n");
6399                 device_printf(sc->dev, "+-----------------------------------+\n");
6400                 hdac_dump_ctls(devinfo, "Master Volume (OSS: vol)", SOUND_MASK_VOLUME);
6401                 hdac_dump_ctls(devinfo, "PCM Volume (OSS: pcm)", SOUND_MASK_PCM);
6402                 hdac_dump_ctls(devinfo, "CD Volume (OSS: cd)", SOUND_MASK_CD);
6403                 hdac_dump_ctls(devinfo, "Microphone Volume (OSS: mic)", SOUND_MASK_MIC);
6404                 hdac_dump_ctls(devinfo, "Line-in Volume (OSS: line)", SOUND_MASK_LINE);
6405                 hdac_dump_ctls(devinfo, "Recording Level (OSS: rec)", SOUND_MASK_RECLEV);
6406                 hdac_dump_ctls(devinfo, "Speaker/Beep (OSS: speaker)", SOUND_MASK_SPEAKER);
6407                 hdac_dump_ctls(devinfo, NULL, 0);
6408                 hdac_dump_dac(devinfo);
6409                 hdac_dump_adc(devinfo);
6410                 device_printf(sc->dev, "\n");
6411                 device_printf(sc->dev, "+--------------------------------------+\n");
6412                 device_printf(sc->dev, "| DUMPING PCM Playback/Record Channels |\n");
6413                 device_printf(sc->dev, "+--------------------------------------+\n");
6414                 hdac_dump_pcmchannels(sc, pcnt, rcnt);
6415         );
6416
6417         if (sc->polling != 0) {
6418                 hdac_lock(sc);
6419                 callout_reset(&sc->poll_hdac, 1, hdac_poll_callback, sc);
6420                 hdac_unlock(sc);
6421         }
6422 }
6423
6424 /****************************************************************************
6425  * int hdac_detach(device_t)
6426  *
6427  * Detach and free up resources utilized by the hdac device.
6428  ****************************************************************************/
6429 static int
6430 hdac_detach(device_t dev)
6431 {
6432         struct hdac_softc *sc = NULL;
6433         struct hdac_devinfo *devinfo = NULL;
6434         int err;
6435
6436         devinfo = (struct hdac_devinfo *)pcm_getdevinfo(dev);
6437         if (devinfo != NULL && devinfo->codec != NULL)
6438                 sc = devinfo->codec->sc;
6439         if (sc == NULL)
6440                 return (0);
6441
6442         if (sc->registered > 0) {
6443                 err = pcm_unregister(dev);
6444                 if (err != 0)
6445                         return (err);
6446         }
6447
6448         hdac_release_resources(sc);
6449
6450         return (0);
6451 }
6452
6453 static device_method_t hdac_methods[] = {
6454         /* device interface */
6455         DEVMETHOD(device_probe,         hdac_probe),
6456         DEVMETHOD(device_attach,        hdac_attach),
6457         DEVMETHOD(device_detach,        hdac_detach),
6458         DEVMETHOD_END
6459 };
6460
6461 static driver_t hdac_driver = {
6462         "pcm",
6463         hdac_methods,
6464         PCM_SOFTC_SIZE,
6465 };
6466
6467 DRIVER_MODULE(snd_hda, pci, hdac_driver, pcm_devclass, NULL, NULL);
6468 MODULE_DEPEND(snd_hda, sound, SOUND_MINVER, SOUND_PREFVER, SOUND_MAXVER);
6469 MODULE_VERSION(snd_hda, 1);