sys/dev/drm/i915/intel_drv.h

   1 /*
   2  * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
   3  * Copyright (c) 2007-2008 Intel Corporation
   4  *   Jesse Barnes <jesse.barnes@intel.com>
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the "Software"),
   8  * to deal in the Software without restriction, including without limitation
   9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10  * and/or sell copies of the Software, and to permit persons to whom the
  11  * Software is furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice (including the next
  14  * paragraph) shall be included in all copies or substantial portions of the
  15  * Software.
  16  *
  17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  19  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  20  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  21  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  22  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  23  * IN THE SOFTWARE.
  24  *
  25  * $FreeBSD: src/sys/dev/drm2/i915/intel_drv.h,v 1.1 2012/05/22 11:07:44 kib Exp $
  26  */
  27
  28 #ifndef DRM_INTEL_DRV_H
  29 #define DRM_INTEL_DRV_H
  30
  31 #include <linux/delay.h>
  32 #include <drm/i915_drm.h>
  33 #include "i915_drv.h"
  34 #include <drm/drm_crtc.h>
  35 #include <drm/drm_crtc_helper.h>
  36 #include <drm/drm_fb_helper.h>
  37 #include <drm/drm_dp_helper.h>
  38
  39 #define _wait_for(COND, MS, W) ({ \
  40         unsigned long timeout__ = jiffies + msecs_to_jiffies(MS);       \
  41         int ret__ = 0;                                                  \
  42         while (!(COND)) {                                               \
  43                 if (time_after(jiffies, timeout__)) {                   \
  44                         ret__ = -ETIMEDOUT;                             \
  45                         break;                                          \
  46                 }                                                       \
  47                 if (W && drm_can_sleep())  {                            \
  48                         msleep(W);                                      \
  49                 } else {                                                \
  50                         cpu_pause();                                    \
  51                 }                                                       \
  52         }                                                               \
  53         ret__;                                                          \
  54 })
  55
  56 /* XXX: poor substitute for the Linux version of this routine */
  57 static inline
  58 unsigned long usecs_to_jiffies(const unsigned int u)
  59 {
  60         unsigned long jiffies;
  61
  62         jiffies = (u * hz) / 1000000;
  63         if (jiffies < 1)
  64                 return 1;
  65         else
  66                 return jiffies;
  67 }
  68
  69 #define wait_for_atomic_us(COND, US) ({ \
  70         unsigned long timeout__ = jiffies + usecs_to_jiffies(US);       \
  71         int ret__ = 0;                                                  \
  72         while (!(COND)) {                                               \
  73                 if (time_after(jiffies, timeout__)) {                   \
  74                         ret__ = -ETIMEDOUT;                             \
  75                         break;                                          \
  76                 }                                                       \
  77                 cpu_pause();                                            \
  78         }                                                               \
  79         ret__;                                                          \
  80 })
  81
  82 #define _intel_wait_for(DEV, COND, MS, W, WMSG)                         \
  83 ({                                                                      \
  84         int end, ret;                                                   \
  85                                                                         \
  86         end = ticks + (MS) * hz / 1000;                                 \
  87         ret = 0;                                                        \
  88                                                                         \
  89         while (!(COND)) {                                               \
  90                 if (time_after(ticks, end)) {                           \
  91                         ret = -ETIMEDOUT;                               \
  92                         break;                                          \
  93                 }                                                       \
  94                 DELAY(1000);                                            \
  95         }                                                               \
  96                                                                         \
  97         ret;                                                            \
  98 })
  99
 100 #define wait_for(COND, MS) _wait_for(COND, MS, 1)
 101 #define wait_for_atomic(COND, MS) _wait_for(COND, MS, 0)
 102
 103 #define KHz(x) (1000*x)
 104 #define MHz(x) KHz(1000*x)
 105
 106 /* store information about an Ixxx DVO */
 107 /* The i830->i865 use multiple DVOs with multiple i2cs */
 108 /* the i915, i945 have a single sDVO i2c bus - which is different */
 109 #define MAX_OUTPUTS 6
 110 /* maximum connectors per crtcs in the mode set */
 111 #define INTELFB_CONN_LIMIT 4
 112
 113 #define INTEL_I2C_BUS_DVO 1
 114 #define INTEL_I2C_BUS_SDVO 2
 115
 116 /* these are outputs from the chip - integrated only
 117    external chips are via DVO or SDVO output */
 118 #define INTEL_OUTPUT_UNUSED 0
 119 #define INTEL_OUTPUT_ANALOG 1
 120 #define INTEL_OUTPUT_DVO 2
 121 #define INTEL_OUTPUT_SDVO 3
 122 #define INTEL_OUTPUT_LVDS 4
 123 #define INTEL_OUTPUT_TVOUT 5
 124 #define INTEL_OUTPUT_HDMI 6
 125 #define INTEL_OUTPUT_DISPLAYPORT 7
 126 #define INTEL_OUTPUT_EDP 8
 127
 128 /* Intel Pipe Clone Bit */
 129 #define INTEL_HDMIB_CLONE_BIT 1
 130 #define INTEL_HDMIC_CLONE_BIT 2
 131 #define INTEL_HDMID_CLONE_BIT 3
 132 #define INTEL_HDMIE_CLONE_BIT 4
 133 #define INTEL_HDMIF_CLONE_BIT 5
 134 #define INTEL_SDVO_NON_TV_CLONE_BIT 6
 135 #define INTEL_SDVO_TV_CLONE_BIT 7
 136 #define INTEL_SDVO_LVDS_CLONE_BIT 8
 137 #define INTEL_ANALOG_CLONE_BIT 9
 138 #define INTEL_TV_CLONE_BIT 10
 139 #define INTEL_DP_B_CLONE_BIT 11
 140 #define INTEL_DP_C_CLONE_BIT 12
 141 #define INTEL_DP_D_CLONE_BIT 13
 142 #define INTEL_LVDS_CLONE_BIT 14
 143 #define INTEL_DVO_TMDS_CLONE_BIT 15
 144 #define INTEL_DVO_LVDS_CLONE_BIT 16
 145 #define INTEL_EDP_CLONE_BIT 17
 146
 147 #define INTEL_DVO_CHIP_NONE 0
 148 #define INTEL_DVO_CHIP_LVDS 1
 149 #define INTEL_DVO_CHIP_TMDS 2
 150 #define INTEL_DVO_CHIP_TVOUT 4
 151
 152 /* drm_display_mode->private_flags */
 153 #define INTEL_MODE_PIXEL_MULTIPLIER_SHIFT (0x0)
 154 #define INTEL_MODE_PIXEL_MULTIPLIER_MASK (0xf << INTEL_MODE_PIXEL_MULTIPLIER_SHIFT)
 155 #define INTEL_MODE_DP_FORCE_6BPC (0x10)
 156 /* This flag must be set by the encoder's mode_fixup if it changes the crtc
 157  * timings in the mode to prevent the crtc fixup from overwriting them.
 158  * Currently only lvds needs that. */
 159 #define INTEL_MODE_CRTC_TIMINGS_SET (0x20)
 160
 161 static inline void
 162 intel_mode_set_pixel_multiplier(struct drm_display_mode *mode,
 163                                 int multiplier)
 164 {
 165         mode->clock *= multiplier;
 166         mode->private_flags |= multiplier;
 167 }
 168
 169 static inline int
 170 intel_mode_get_pixel_multiplier(const struct drm_display_mode *mode)
 171 {
 172         return (mode->private_flags & INTEL_MODE_PIXEL_MULTIPLIER_MASK) >> INTEL_MODE_PIXEL_MULTIPLIER_SHIFT;
 173 }
 174
 175 struct intel_framebuffer {
 176         struct drm_framebuffer base;
 177         struct drm_i915_gem_object *obj;
 178 };
 179
 180 struct intel_fbdev {
 181         struct drm_fb_helper helper;
 182         struct intel_framebuffer ifb;
 183         struct list_head fbdev_list;
 184         struct drm_display_mode *our_mode;
 185 };
 186
 187 struct intel_encoder {
 188         struct drm_encoder base;
 189         int type;
 190         bool needs_tv_clock;
 191         void (*hot_plug)(struct intel_encoder *);
 192         int crtc_mask;
 193         int clone_mask;
 194 };
 195
 196 struct intel_connector {
 197         struct drm_connector base;
 198         struct intel_encoder *encoder;
 199 };
 200
 201 struct intel_crtc {
 202         struct drm_crtc base;
 203         enum i915_pipe pipe;
 204         enum plane plane;
 205         enum transcoder cpu_transcoder;
 206         u8 lut_r[256], lut_g[256], lut_b[256];
 207         int dpms_mode;
 208         bool active; /* is the crtc on? independent of the dpms mode */
 209         bool primary_disabled; /* is the crtc obscured by a plane? */
 210         bool busy; /* is scanout buffer being updated frequently? */
 211         struct callout idle_callout;
 212         bool lowfreq_avail;
 213         struct intel_overlay *overlay;
 214         struct intel_unpin_work *unpin_work;
 215         int fdi_lanes;
 216
 217         struct drm_i915_gem_object *cursor_bo;
 218         uint32_t cursor_addr;
 219         int16_t cursor_x, cursor_y;
 220         int16_t cursor_width, cursor_height;
 221         bool cursor_visible;
 222         unsigned int bpp;
 223
 224         bool no_pll; /* tertiary pipe for IVB */
 225         bool use_pll_a;
 226 };
 227
 228 struct intel_plane {
 229         struct drm_plane base;
 230         enum i915_pipe pipe;
 231         struct drm_i915_gem_object *obj;
 232         bool can_scale;
 233         int max_downscale;
 234         u32 lut_r[1024], lut_g[1024], lut_b[1024];
 235         void (*update_plane)(struct drm_plane *plane,
 236                              struct drm_framebuffer *fb,
 237                              struct drm_i915_gem_object *obj,
 238                              int crtc_x, int crtc_y,
 239                              unsigned int crtc_w, unsigned int crtc_h,
 240                              uint32_t x, uint32_t y,
 241                              uint32_t src_w, uint32_t src_h);
 242         void (*disable_plane)(struct drm_plane *plane);
 243         int (*update_colorkey)(struct drm_plane *plane,
 244                                struct drm_intel_sprite_colorkey *key);
 245         void (*get_colorkey)(struct drm_plane *plane,
 246                              struct drm_intel_sprite_colorkey *key);
 247 };
 248
 249 struct intel_watermark_params {
 250         unsigned long fifo_size;
 251         unsigned long max_wm;
 252         unsigned long default_wm;
 253         unsigned long guard_size;
 254         unsigned long cacheline_size;
 255 };
 256
 257 struct cxsr_latency {
 258         int is_desktop;
 259         int is_ddr3;
 260         unsigned long fsb_freq;
 261         unsigned long mem_freq;
 262         unsigned long display_sr;
 263         unsigned long display_hpll_disable;
 264         unsigned long cursor_sr;
 265         unsigned long cursor_hpll_disable;
 266 };
 267
 268 #define to_intel_crtc(x) container_of(x, struct intel_crtc, base)
 269 #define to_intel_connector(x) container_of(x, struct intel_connector, base)
 270 #define to_intel_encoder(x) container_of(x, struct intel_encoder, base)
 271 #define to_intel_framebuffer(x) container_of(x, struct intel_framebuffer, base)
 272 #define to_intel_plane(x) container_of(x, struct intel_plane, base)
 273
 274 #define DIP_HEADER_SIZE 5
 275
 276 #define DIP_TYPE_AVI    0x82
 277 #define DIP_VERSION_AVI 0x2
 278 #define DIP_LEN_AVI     13
 279
 280 #define DIP_TYPE_SPD    0x83
 281 #define DIP_VERSION_SPD 0x1
 282 #define DIP_LEN_SPD     25
 283 #define DIP_SPD_UNKNOWN 0
 284 #define DIP_SPD_DSTB    0x1
 285 #define DIP_SPD_DVDP    0x2
 286 #define DIP_SPD_DVHS    0x3
 287 #define DIP_SPD_HDDVR   0x4
 288 #define DIP_SPD_DVC     0x5
 289 #define DIP_SPD_DSC     0x6
 290 #define DIP_SPD_VCD     0x7
 291 #define DIP_SPD_GAME    0x8
 292 #define DIP_SPD_PC      0x9
 293 #define DIP_SPD_BD      0xa
 294 #define DIP_SPD_SCD     0xb
 295
 296 struct dip_infoframe {
 297         uint8_t type;           /* HB0 */
 298         uint8_t ver;            /* HB1 */
 299         uint8_t len;            /* HB2 - body len, not including checksum */
 300         uint8_t ecc;            /* Header ECC */
 301         uint8_t checksum;       /* PB0 */
 302         union {
 303                 struct {
 304                         /* PB1 - Y 6:5, A 4:4, B 3:2, S 1:0 */
 305                         uint8_t Y_A_B_S;
 306                         /* PB2 - C 7:6, M 5:4, R 3:0 */
 307                         uint8_t C_M_R;
 308                         /* PB3 - ITC 7:7, EC 6:4, Q 3:2, SC 1:0 */
 309                         uint8_t ITC_EC_Q_SC;
 310                         /* PB4 - VIC 6:0 */
 311                         uint8_t VIC;
 312                         /* PB5 - PR 3:0 */
 313                         uint8_t PR;
 314                         /* PB6 to PB13 */
 315                         uint16_t top_bar_end;
 316                         uint16_t bottom_bar_start;
 317                         uint16_t left_bar_end;
 318                         uint16_t right_bar_start;
 319                 } avi;
 320                 struct {
 321                         uint8_t vn[8];
 322                         uint8_t pd[16];
 323                         uint8_t sdi;
 324                 } spd;
 325                 uint8_t payload[27];
 326         } __attribute__ ((packed)) body;
 327 } __attribute__((packed));
 328
 329 #define DP_MAX_DOWNSTREAM_PORTS         0x10
 330 #define DP_LINK_CONFIGURATION_SIZE      9
 331
 332 struct intel_dp {
 333         struct intel_encoder base;
 334         uint32_t output_reg;
 335         uint32_t DP;
 336         uint8_t  link_configuration[DP_LINK_CONFIGURATION_SIZE];
 337         bool has_audio;
 338         enum hdmi_force_audio force_audio;
 339         uint32_t color_range;
 340         int dpms_mode;
 341         uint8_t link_bw;
 342         uint8_t lane_count;
 343         uint8_t dpcd[DP_RECEIVER_CAP_SIZE];
 344         device_t dp_iic_bus;
 345         device_t adapter;
 346         bool is_pch_edp;
 347         uint8_t train_set[4];
 348         int panel_power_up_delay;
 349         int panel_power_down_delay;
 350         int panel_power_cycle_delay;
 351         int backlight_on_delay;
 352         int backlight_off_delay;
 353         struct delayed_work panel_vdd_work;
 354         bool want_panel_vdd;
 355         struct drm_display_mode *panel_fixed_mode;  /* for eDP */
 356 };
 357
 358 static inline struct drm_crtc *
 359 intel_get_crtc_for_pipe(struct drm_device *dev, int pipe)
 360 {
 361         struct drm_i915_private *dev_priv = dev->dev_private;
 362         return dev_priv->pipe_to_crtc_mapping[pipe];
 363 }
 364
 365 static inline struct drm_crtc *
 366 intel_get_crtc_for_plane(struct drm_device *dev, int plane)
 367 {
 368         struct drm_i915_private *dev_priv = dev->dev_private;
 369         return dev_priv->plane_to_crtc_mapping[plane];
 370 }
 371
 372 struct intel_unpin_work {
 373         struct work_struct work;
 374         struct drm_device *dev;
 375         struct drm_i915_gem_object *old_fb_obj;
 376         struct drm_i915_gem_object *pending_flip_obj;
 377         struct drm_pending_vblank_event *event;
 378         atomic_t pending;
 379 #define INTEL_FLIP_INACTIVE     0
 380 #define INTEL_FLIP_PENDING      1
 381 #define INTEL_FLIP_COMPLETE     2
 382         bool enable_stall_check;
 383 };
 384
 385 struct intel_fbc_work {
 386         struct delayed_work work;
 387         struct drm_crtc *crtc;
 388         struct drm_framebuffer *fb;
 389         int interval;
 390 };
 391
 392 int intel_connector_update_modes(struct drm_connector *connector,
 393                                 struct edid *edid);
 394 int intel_ddc_get_modes(struct drm_connector *c, device_t adapter);
 395 extern bool intel_ddc_probe(struct intel_encoder *intel_encoder, int ddc_bus);
 396
 397 extern void intel_attach_force_audio_property(struct drm_connector *connector);
 398 extern void intel_attach_broadcast_rgb_property(struct drm_connector *connector);
 399
 400 extern void intel_crt_init(struct drm_device *dev);
 401 extern void intel_hdmi_init(struct drm_device *dev, int sdvox_reg);
 402 void intel_dip_infoframe_csum(struct dip_infoframe *avi_if);
 403 extern bool intel_sdvo_init(struct drm_device *dev, int output_device);
 404 extern void intel_dvo_init(struct drm_device *dev);
 405 extern void intel_tv_init(struct drm_device *dev);
 406 extern void intel_mark_busy(struct drm_device *dev);
 407 extern void intel_mark_idle(struct drm_device *dev);
 408 extern bool intel_lvds_init(struct drm_device *dev);
 409 extern void intel_dp_init(struct drm_device *dev, int dp_reg);
 410 void
 411 intel_dp_set_m_n(struct drm_crtc *crtc, struct drm_display_mode *mode,
 412                  struct drm_display_mode *adjusted_mode);
 413 extern bool intel_dpd_is_edp(struct drm_device *dev);
 414 extern void intel_edp_link_config(struct intel_encoder *, int *, int *);
 415 extern bool intel_encoder_is_pch_edp(struct drm_encoder *encoder);
 416 extern int intel_plane_init(struct drm_device *dev, enum i915_pipe pipe);
 417 extern void intel_flush_display_plane(struct drm_i915_private *dev_priv,
 418                                       enum plane plane);
 419
 420 /* intel_panel.c */
 421 extern void intel_fixed_panel_mode(struct drm_display_mode *fixed_mode,
 422                                    struct drm_display_mode *adjusted_mode);
 423 extern void intel_pch_panel_fitting(struct drm_device *dev,
 424                                     int fitting_mode,
 425                                     const struct drm_display_mode *mode,
 426                                     struct drm_display_mode *adjusted_mode);
 427 extern u32 intel_panel_get_max_backlight(struct drm_device *dev);
 428 extern u32 intel_panel_get_backlight(struct drm_device *dev);
 429 extern void intel_panel_set_backlight(struct drm_device *dev, u32 level);
 430 extern int intel_panel_setup_backlight(struct drm_device *dev);
 431 extern void intel_panel_enable_backlight(struct drm_device *dev);
 432 extern void intel_panel_disable_backlight(struct drm_device *dev);
 433 extern void intel_panel_destroy_backlight(struct drm_device *dev);
 434 extern enum drm_connector_status intel_panel_detect(struct drm_device *dev);
 435
 436 extern void intel_crtc_load_lut(struct drm_crtc *crtc);
 437 extern void intel_encoder_prepare(struct drm_encoder *encoder);
 438 extern void intel_encoder_commit(struct drm_encoder *encoder);
 439 extern void intel_encoder_destroy(struct drm_encoder *encoder);
 440
 441 static inline struct intel_encoder *intel_attached_encoder(struct drm_connector *connector)
 442 {
 443         return to_intel_connector(connector)->encoder;
 444 }
 445
 446 extern void intel_connector_attach_encoder(struct intel_connector *connector,
 447                                            struct intel_encoder *encoder);
 448 extern struct drm_encoder *intel_best_encoder(struct drm_connector *connector);
 449
 450 extern struct drm_display_mode *intel_crtc_mode_get(struct drm_device *dev,
 451                                                     struct drm_crtc *crtc);
 452 int intel_get_pipe_from_crtc_id(struct drm_device *dev, void *data,
 453                                 struct drm_file *file_priv);
 454 extern enum transcoder
 455 intel_pipe_to_cpu_transcoder(struct drm_i915_private *dev_priv,
 456                              enum i915_pipe pipe);
 457 extern void intel_wait_for_vblank(struct drm_device *dev, int pipe);
 458 extern void intel_wait_for_pipe_off(struct drm_device *dev, int pipe);
 459
 460 struct intel_load_detect_pipe {
 461         struct drm_framebuffer *release_fb;
 462         bool load_detect_temp;
 463         int dpms_mode;
 464 };
 465 extern bool intel_get_load_detect_pipe(struct intel_encoder *intel_encoder,
 466                                        struct drm_connector *connector,
 467                                        struct drm_display_mode *mode,
 468                                        struct intel_load_detect_pipe *old);
 469 extern void intel_release_load_detect_pipe(struct intel_encoder *intel_encoder,
 470                                            struct drm_connector *connector,
 471                                            struct intel_load_detect_pipe *old);
 472
 473 extern void intel_crtc_fb_gamma_set(struct drm_crtc *crtc, u16 red, u16 green,
 474                                     u16 blue, int regno);
 475 extern void intel_crtc_fb_gamma_get(struct drm_crtc *crtc, u16 *red, u16 *green,
 476                                     u16 *blue, int regno);
 477 extern void intel_enable_clock_gating(struct drm_device *dev);
 478
 479 extern int intel_pin_and_fence_fb_obj(struct drm_device *dev,
 480                                       struct drm_i915_gem_object *obj,
 481                                       struct intel_ring_buffer *pipelined);
 482 extern void intel_unpin_fb_obj(struct drm_i915_gem_object *obj);
 483
 484 extern int intel_framebuffer_init(struct drm_device *dev,
 485                                   struct intel_framebuffer *ifb,
 486                                   struct drm_mode_fb_cmd2 *mode_cmd,
 487                                   struct drm_i915_gem_object *obj);
 488 extern int intel_fbdev_init(struct drm_device *dev);
 489 extern void intel_fbdev_fini(struct drm_device *dev);
 490
 491 extern void intel_prepare_page_flip(struct drm_device *dev, int plane);
 492 extern void intel_finish_page_flip(struct drm_device *dev, int pipe);
 493 extern void intel_finish_page_flip_plane(struct drm_device *dev, int plane);
 494
 495 extern void intel_setup_overlay(struct drm_device *dev);
 496 extern void intel_cleanup_overlay(struct drm_device *dev);
 497 extern int intel_overlay_switch_off(struct intel_overlay *overlay);
 498 extern int intel_overlay_put_image(struct drm_device *dev, void *data,
 499                                    struct drm_file *file_priv);
 500 extern int intel_overlay_attrs(struct drm_device *dev, void *data,
 501                                struct drm_file *file_priv);
 502
 503 extern void intel_fb_output_poll_changed(struct drm_device *dev);
 504 extern void intel_fb_restore_mode(struct drm_device *dev);
 505
 506 extern void assert_pipe(struct drm_i915_private *dev_priv, enum i915_pipe pipe,
 507                         bool state);
 508 #define assert_pipe_enabled(d, p) assert_pipe(d, p, true)
 509 #define assert_pipe_disabled(d, p) assert_pipe(d, p, false)
 510
 511 extern void intel_init_clock_gating(struct drm_device *dev);
 512 extern void intel_write_eld(struct drm_encoder *encoder,
 513                             struct drm_display_mode *mode);
 514 extern void intel_cpt_verify_modeset(struct drm_device *dev, int pipe);
 515
 516 /* For use by IVB LP watermark workaround in intel_sprite.c */
 517 extern void intel_update_watermarks(struct drm_device *dev);
 518 extern void intel_update_sprite_watermarks(struct drm_device *dev, int pipe,
 519                                            uint32_t sprite_width,
 520                                            int pixel_size);
 521 extern void intel_update_linetime_watermarks(struct drm_device *dev, int pipe,
 522                          struct drm_display_mode *mode);
 523
 524 extern unsigned long intel_gen4_compute_offset_xtiled(int *x, int *y,
 525                                                       unsigned int bpp,
 526                                                       unsigned int pitch);
 527
 528 extern int intel_sprite_set_colorkey(struct drm_device *dev, void *data,
 529                                      struct drm_file *file_priv);
 530 extern int intel_sprite_get_colorkey(struct drm_device *dev, void *data,
 531                                      struct drm_file *file_priv);
 532
 533 /* Power-related functions, located in intel_pm.c */
 534 extern void intel_init_pm(struct drm_device *dev);
 535 /* FBC */
 536 extern bool intel_fbc_enabled(struct drm_device *dev);
 537 extern void intel_enable_fbc(struct drm_crtc *crtc, unsigned long interval);
 538 extern void intel_update_fbc(struct drm_device *dev);
 539 /* IPS */
 540 extern void intel_gpu_ips_init(struct drm_i915_private *dev_priv);
 541 extern void intel_gpu_ips_teardown(void);
 542
 543 extern void intel_init_power_wells(struct drm_device *dev);
 544 extern void intel_enable_gt_powersave(struct drm_device *dev);
 545 extern void intel_disable_gt_powersave(struct drm_device *dev);
 546 extern void gen6_gt_check_fifodbg(struct drm_i915_private *dev_priv);
 547 extern void ironlake_teardown_rc6(struct drm_device *dev);
 548
 549 #endif