2 Copyright (C) 1988-2015 Free Software Foundation, Inc.
4 This file is part of GCC.
6 GCC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3, or (at your option)
11 GCC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
22 #include "coretypes.h"
23 #include "diagnostic-core.h"
26 #include "common/common-target.h"
27 #include "common/common-target-def.h"
31 /* Define a set of ISAs which are available when a given ISA is
32 enabled. MMX and SSE ISAs are handled separately. */
34 #define OPTION_MASK_ISA_MMX_SET OPTION_MASK_ISA_MMX
35 #define OPTION_MASK_ISA_3DNOW_SET \
36 (OPTION_MASK_ISA_3DNOW | OPTION_MASK_ISA_MMX_SET)
38 #define OPTION_MASK_ISA_SSE_SET OPTION_MASK_ISA_SSE
39 #define OPTION_MASK_ISA_SSE2_SET \
40 (OPTION_MASK_ISA_SSE2 | OPTION_MASK_ISA_SSE_SET)
41 #define OPTION_MASK_ISA_SSE3_SET \
42 (OPTION_MASK_ISA_SSE3 | OPTION_MASK_ISA_SSE2_SET)
43 #define OPTION_MASK_ISA_SSSE3_SET \
44 (OPTION_MASK_ISA_SSSE3 | OPTION_MASK_ISA_SSE3_SET)
45 #define OPTION_MASK_ISA_SSE4_1_SET \
46 (OPTION_MASK_ISA_SSE4_1 | OPTION_MASK_ISA_SSSE3_SET)
47 #define OPTION_MASK_ISA_SSE4_2_SET \
48 (OPTION_MASK_ISA_SSE4_2 | OPTION_MASK_ISA_SSE4_1_SET)
49 #define OPTION_MASK_ISA_AVX_SET \
50 (OPTION_MASK_ISA_AVX | OPTION_MASK_ISA_SSE4_2_SET \
51 | OPTION_MASK_ISA_XSAVE_SET)
52 #define OPTION_MASK_ISA_FMA_SET \
53 (OPTION_MASK_ISA_FMA | OPTION_MASK_ISA_AVX_SET)
54 #define OPTION_MASK_ISA_AVX2_SET \
55 (OPTION_MASK_ISA_AVX2 | OPTION_MASK_ISA_AVX_SET)
56 #define OPTION_MASK_ISA_FXSR_SET OPTION_MASK_ISA_FXSR
57 #define OPTION_MASK_ISA_XSAVE_SET OPTION_MASK_ISA_XSAVE
58 #define OPTION_MASK_ISA_XSAVEOPT_SET \
59 (OPTION_MASK_ISA_XSAVEOPT | OPTION_MASK_ISA_XSAVE)
60 #define OPTION_MASK_ISA_AVX512F_SET \
61 (OPTION_MASK_ISA_AVX512F | OPTION_MASK_ISA_AVX2_SET)
62 #define OPTION_MASK_ISA_AVX512CD_SET \
63 (OPTION_MASK_ISA_AVX512CD | OPTION_MASK_ISA_AVX512F_SET)
64 #define OPTION_MASK_ISA_AVX512PF_SET \
65 (OPTION_MASK_ISA_AVX512PF | OPTION_MASK_ISA_AVX512F_SET)
66 #define OPTION_MASK_ISA_AVX512ER_SET \
67 (OPTION_MASK_ISA_AVX512ER | OPTION_MASK_ISA_AVX512F_SET)
68 #define OPTION_MASK_ISA_AVX512DQ_SET \
69 (OPTION_MASK_ISA_AVX512DQ | OPTION_MASK_ISA_AVX512F_SET)
70 #define OPTION_MASK_ISA_AVX512BW_SET \
71 (OPTION_MASK_ISA_AVX512BW | OPTION_MASK_ISA_AVX512F_SET)
72 #define OPTION_MASK_ISA_AVX512VL_SET \
73 (OPTION_MASK_ISA_AVX512VL | OPTION_MASK_ISA_AVX512F_SET)
74 #define OPTION_MASK_ISA_AVX512IFMA_SET \
75 (OPTION_MASK_ISA_AVX512IFMA | OPTION_MASK_ISA_AVX512F_SET)
76 #define OPTION_MASK_ISA_AVX512VBMI_SET \
77 (OPTION_MASK_ISA_AVX512VBMI | OPTION_MASK_ISA_AVX512BW_SET)
78 #define OPTION_MASK_ISA_RTM_SET OPTION_MASK_ISA_RTM
79 #define OPTION_MASK_ISA_PRFCHW_SET OPTION_MASK_ISA_PRFCHW
80 #define OPTION_MASK_ISA_RDSEED_SET OPTION_MASK_ISA_RDSEED
81 #define OPTION_MASK_ISA_ADX_SET OPTION_MASK_ISA_ADX
82 #define OPTION_MASK_ISA_PREFETCHWT1_SET OPTION_MASK_ISA_PREFETCHWT1
83 #define OPTION_MASK_ISA_CLFLUSHOPT_SET OPTION_MASK_ISA_CLFLUSHOPT
84 #define OPTION_MASK_ISA_XSAVES_SET \
85 (OPTION_MASK_ISA_XSAVES | OPTION_MASK_ISA_XSAVE)
86 #define OPTION_MASK_ISA_XSAVEC_SET \
87 (OPTION_MASK_ISA_XSAVEC | OPTION_MASK_ISA_XSAVE)
88 #define OPTION_MASK_ISA_CLWB_SET OPTION_MASK_ISA_CLWB
89 #define OPTION_MASK_ISA_PCOMMIT_SET OPTION_MASK_ISA_PCOMMIT
91 /* SSE4 includes both SSE4.1 and SSE4.2. -msse4 should be the same
93 #define OPTION_MASK_ISA_SSE4_SET OPTION_MASK_ISA_SSE4_2_SET
95 #define OPTION_MASK_ISA_SSE4A_SET \
96 (OPTION_MASK_ISA_SSE4A | OPTION_MASK_ISA_SSE3_SET)
97 #define OPTION_MASK_ISA_FMA4_SET \
98 (OPTION_MASK_ISA_FMA4 | OPTION_MASK_ISA_SSE4A_SET \
99 | OPTION_MASK_ISA_AVX_SET)
100 #define OPTION_MASK_ISA_XOP_SET \
101 (OPTION_MASK_ISA_XOP | OPTION_MASK_ISA_FMA4_SET)
102 #define OPTION_MASK_ISA_LWP_SET \
105 /* AES, SHA and PCLMUL need SSE2 because they use xmm registers. */
106 #define OPTION_MASK_ISA_AES_SET \
107 (OPTION_MASK_ISA_AES | OPTION_MASK_ISA_SSE2_SET)
108 #define OPTION_MASK_ISA_SHA_SET \
109 (OPTION_MASK_ISA_SHA | OPTION_MASK_ISA_SSE2_SET)
110 #define OPTION_MASK_ISA_PCLMUL_SET \
111 (OPTION_MASK_ISA_PCLMUL | OPTION_MASK_ISA_SSE2_SET)
113 #define OPTION_MASK_ISA_ABM_SET \
114 (OPTION_MASK_ISA_ABM | OPTION_MASK_ISA_POPCNT)
116 #define OPTION_MASK_ISA_BMI_SET OPTION_MASK_ISA_BMI
117 #define OPTION_MASK_ISA_BMI2_SET OPTION_MASK_ISA_BMI2
118 #define OPTION_MASK_ISA_LZCNT_SET OPTION_MASK_ISA_LZCNT
119 #define OPTION_MASK_ISA_TBM_SET OPTION_MASK_ISA_TBM
120 #define OPTION_MASK_ISA_POPCNT_SET OPTION_MASK_ISA_POPCNT
121 #define OPTION_MASK_ISA_CX16_SET OPTION_MASK_ISA_CX16
122 #define OPTION_MASK_ISA_SAHF_SET OPTION_MASK_ISA_SAHF
123 #define OPTION_MASK_ISA_MOVBE_SET OPTION_MASK_ISA_MOVBE
124 #define OPTION_MASK_ISA_CRC32_SET OPTION_MASK_ISA_CRC32
126 #define OPTION_MASK_ISA_FSGSBASE_SET OPTION_MASK_ISA_FSGSBASE
127 #define OPTION_MASK_ISA_RDRND_SET OPTION_MASK_ISA_RDRND
128 #define OPTION_MASK_ISA_F16C_SET \
129 (OPTION_MASK_ISA_F16C | OPTION_MASK_ISA_AVX_SET)
131 /* Define a set of ISAs which aren't available when a given ISA is
132 disabled. MMX and SSE ISAs are handled separately. */
134 #define OPTION_MASK_ISA_MMX_UNSET \
135 (OPTION_MASK_ISA_MMX | OPTION_MASK_ISA_3DNOW_UNSET)
136 #define OPTION_MASK_ISA_3DNOW_UNSET \
137 (OPTION_MASK_ISA_3DNOW | OPTION_MASK_ISA_3DNOW_A_UNSET)
138 #define OPTION_MASK_ISA_3DNOW_A_UNSET OPTION_MASK_ISA_3DNOW_A
140 #define OPTION_MASK_ISA_SSE_UNSET \
141 (OPTION_MASK_ISA_SSE | OPTION_MASK_ISA_SSE2_UNSET)
142 #define OPTION_MASK_ISA_SSE2_UNSET \
143 (OPTION_MASK_ISA_SSE2 | OPTION_MASK_ISA_SSE3_UNSET)
144 #define OPTION_MASK_ISA_SSE3_UNSET \
145 (OPTION_MASK_ISA_SSE3 \
146 | OPTION_MASK_ISA_SSSE3_UNSET \
147 | OPTION_MASK_ISA_SSE4A_UNSET )
148 #define OPTION_MASK_ISA_SSSE3_UNSET \
149 (OPTION_MASK_ISA_SSSE3 | OPTION_MASK_ISA_SSE4_1_UNSET)
150 #define OPTION_MASK_ISA_SSE4_1_UNSET \
151 (OPTION_MASK_ISA_SSE4_1 | OPTION_MASK_ISA_SSE4_2_UNSET)
152 #define OPTION_MASK_ISA_SSE4_2_UNSET \
153 (OPTION_MASK_ISA_SSE4_2 | OPTION_MASK_ISA_AVX_UNSET )
154 #define OPTION_MASK_ISA_AVX_UNSET \
155 (OPTION_MASK_ISA_AVX | OPTION_MASK_ISA_FMA_UNSET \
156 | OPTION_MASK_ISA_FMA4_UNSET | OPTION_MASK_ISA_F16C_UNSET \
157 | OPTION_MASK_ISA_AVX2_UNSET | OPTION_MASK_ISA_XSAVE_UNSET)
158 #define OPTION_MASK_ISA_FMA_UNSET OPTION_MASK_ISA_FMA
159 #define OPTION_MASK_ISA_FXSR_UNSET OPTION_MASK_ISA_FXSR
160 #define OPTION_MASK_ISA_XSAVE_UNSET \
161 (OPTION_MASK_ISA_XSAVE | OPTION_MASK_ISA_XSAVEOPT_UNSET)
162 #define OPTION_MASK_ISA_XSAVEOPT_UNSET OPTION_MASK_ISA_XSAVEOPT
163 #define OPTION_MASK_ISA_AVX2_UNSET \
164 (OPTION_MASK_ISA_AVX2 | OPTION_MASK_ISA_AVX512F_UNSET)
165 #define OPTION_MASK_ISA_AVX512F_UNSET \
166 (OPTION_MASK_ISA_AVX512F | OPTION_MASK_ISA_AVX512CD_UNSET \
167 | OPTION_MASK_ISA_AVX512PF_UNSET | OPTION_MASK_ISA_AVX512ER_UNSET \
168 | OPTION_MASK_ISA_AVX512DQ_UNSET | OPTION_MASK_ISA_AVX512BW_UNSET \
169 | OPTION_MASK_ISA_AVX512VL_UNSET)
170 #define OPTION_MASK_ISA_AVX512CD_UNSET OPTION_MASK_ISA_AVX512CD
171 #define OPTION_MASK_ISA_AVX512PF_UNSET OPTION_MASK_ISA_AVX512PF
172 #define OPTION_MASK_ISA_AVX512ER_UNSET OPTION_MASK_ISA_AVX512ER
173 #define OPTION_MASK_ISA_AVX512DQ_UNSET OPTION_MASK_ISA_AVX512DQ
174 #define OPTION_MASK_ISA_AVX512BW_UNSET \
175 (OPTION_MASK_ISA_AVX512BW | OPTION_MASK_ISA_AVX512VBMI_UNSET)
176 #define OPTION_MASK_ISA_AVX512VL_UNSET OPTION_MASK_ISA_AVX512VL
177 #define OPTION_MASK_ISA_AVX512IFMA_UNSET OPTION_MASK_ISA_AVX512IFMA
178 #define OPTION_MASK_ISA_AVX512VBMI_UNSET OPTION_MASK_ISA_AVX512VBMI
179 #define OPTION_MASK_ISA_RTM_UNSET OPTION_MASK_ISA_RTM
180 #define OPTION_MASK_ISA_PRFCHW_UNSET OPTION_MASK_ISA_PRFCHW
181 #define OPTION_MASK_ISA_RDSEED_UNSET OPTION_MASK_ISA_RDSEED
182 #define OPTION_MASK_ISA_ADX_UNSET OPTION_MASK_ISA_ADX
183 #define OPTION_MASK_ISA_PREFETCHWT1_UNSET OPTION_MASK_ISA_PREFETCHWT1
184 #define OPTION_MASK_ISA_CLFLUSHOPT_UNSET OPTION_MASK_ISA_CLFLUSHOPT
185 #define OPTION_MASK_ISA_XSAVEC_UNSET OPTION_MASK_ISA_XSAVEC
186 #define OPTION_MASK_ISA_XSAVES_UNSET OPTION_MASK_ISA_XSAVES
187 #define OPTION_MASK_ISA_PCOMMIT_UNSET OPTION_MASK_ISA_PCOMMIT
188 #define OPTION_MASK_ISA_CLWB_UNSET OPTION_MASK_ISA_CLWB
190 /* SSE4 includes both SSE4.1 and SSE4.2. -mno-sse4 should the same
192 #define OPTION_MASK_ISA_SSE4_UNSET OPTION_MASK_ISA_SSE4_1_UNSET
194 #define OPTION_MASK_ISA_SSE4A_UNSET \
195 (OPTION_MASK_ISA_SSE4A | OPTION_MASK_ISA_FMA4_UNSET)
197 #define OPTION_MASK_ISA_FMA4_UNSET \
198 (OPTION_MASK_ISA_FMA4 | OPTION_MASK_ISA_XOP_UNSET)
199 #define OPTION_MASK_ISA_XOP_UNSET OPTION_MASK_ISA_XOP
200 #define OPTION_MASK_ISA_LWP_UNSET OPTION_MASK_ISA_LWP
202 #define OPTION_MASK_ISA_AES_UNSET OPTION_MASK_ISA_AES
203 #define OPTION_MASK_ISA_SHA_UNSET OPTION_MASK_ISA_SHA
204 #define OPTION_MASK_ISA_PCLMUL_UNSET OPTION_MASK_ISA_PCLMUL
205 #define OPTION_MASK_ISA_ABM_UNSET OPTION_MASK_ISA_ABM
206 #define OPTION_MASK_ISA_BMI_UNSET OPTION_MASK_ISA_BMI
207 #define OPTION_MASK_ISA_BMI2_UNSET OPTION_MASK_ISA_BMI2
208 #define OPTION_MASK_ISA_LZCNT_UNSET OPTION_MASK_ISA_LZCNT
209 #define OPTION_MASK_ISA_TBM_UNSET OPTION_MASK_ISA_TBM
210 #define OPTION_MASK_ISA_POPCNT_UNSET OPTION_MASK_ISA_POPCNT
211 #define OPTION_MASK_ISA_CX16_UNSET OPTION_MASK_ISA_CX16
212 #define OPTION_MASK_ISA_SAHF_UNSET OPTION_MASK_ISA_SAHF
213 #define OPTION_MASK_ISA_MOVBE_UNSET OPTION_MASK_ISA_MOVBE
214 #define OPTION_MASK_ISA_CRC32_UNSET OPTION_MASK_ISA_CRC32
216 #define OPTION_MASK_ISA_FSGSBASE_UNSET OPTION_MASK_ISA_FSGSBASE
217 #define OPTION_MASK_ISA_RDRND_UNSET OPTION_MASK_ISA_RDRND
218 #define OPTION_MASK_ISA_F16C_UNSET OPTION_MASK_ISA_F16C
220 /* Implement TARGET_HANDLE_OPTION. */
223 ix86_handle_option (struct gcc_options *opts,
224 struct gcc_options *opts_set ATTRIBUTE_UNUSED,
225 const struct cl_decoded_option *decoded,
228 size_t code = decoded->opt_index;
229 int value = decoded->value;
236 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_MMX_SET;
237 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_MMX_SET;
241 opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_MMX_UNSET;
242 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_MMX_UNSET;
249 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_3DNOW_SET;
250 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_3DNOW_SET;
254 opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_3DNOW_UNSET;
255 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_3DNOW_UNSET;
265 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_SSE_SET;
266 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_SSE_SET;
270 opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_SSE_UNSET;
271 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_SSE_UNSET;
278 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_SSE2_SET;
279 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_SSE2_SET;
283 opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_SSE2_UNSET;
284 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_SSE2_UNSET;
291 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_SSE3_SET;
292 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_SSE3_SET;
296 opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_SSE3_UNSET;
297 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_SSE3_UNSET;
304 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_SSSE3_SET;
305 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_SSSE3_SET;
309 opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_SSSE3_UNSET;
310 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_SSSE3_UNSET;
317 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_SSE4_1_SET;
318 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_SSE4_1_SET;
322 opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_SSE4_1_UNSET;
323 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_SSE4_1_UNSET;
330 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_SSE4_2_SET;
331 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_SSE4_2_SET;
335 opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_SSE4_2_UNSET;
336 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_SSE4_2_UNSET;
343 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_AVX_SET;
344 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_AVX_SET;
348 opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_AVX_UNSET;
349 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_AVX_UNSET;
356 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_AVX2_SET;
357 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_AVX2_SET;
361 opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_AVX2_UNSET;
362 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_AVX2_UNSET;
369 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_AVX512F_SET;
370 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_AVX512F_SET;
374 opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_AVX512F_UNSET;
375 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_AVX512F_UNSET;
382 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_AVX512CD_SET;
383 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_AVX512CD_SET;
387 opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_AVX512CD_UNSET;
388 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_AVX512CD_UNSET;
395 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_AVX512PF_SET;
396 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_AVX512PF_SET;
400 opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_AVX512PF_UNSET;
401 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_AVX512PF_UNSET;
408 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_AVX512ER_SET;
409 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_AVX512ER_SET;
413 opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_AVX512ER_UNSET;
414 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_AVX512ER_UNSET;
421 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_AVX512DQ_SET;
422 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_AVX512DQ_SET;
426 opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_AVX512DQ_UNSET;
427 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_AVX512DQ_UNSET;
434 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_AVX512BW_SET;
435 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_AVX512BW_SET;
439 opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_AVX512BW_UNSET;
440 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_AVX512BW_UNSET;
447 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_AVX512VL_SET;
448 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_AVX512VL_SET;
452 opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_AVX512VL_UNSET;
453 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_AVX512VL_UNSET;
457 case OPT_mavx512ifma:
460 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_AVX512IFMA_SET;
461 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_AVX512IFMA_SET;
465 opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_AVX512IFMA_UNSET;
466 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_AVX512IFMA_UNSET;
470 case OPT_mavx512vbmi:
473 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_AVX512VBMI_SET;
474 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_AVX512VBMI_SET;
478 opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_AVX512VBMI_UNSET;
479 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_AVX512VBMI_UNSET;
486 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_FMA_SET;
487 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_FMA_SET;
491 opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_FMA_UNSET;
492 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_FMA_UNSET;
499 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_RTM_SET;
500 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_RTM_SET;
504 opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_RTM_UNSET;
505 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_RTM_UNSET;
510 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_SSE4_SET;
511 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_SSE4_SET;
515 opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_SSE4_UNSET;
516 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_SSE4_UNSET;
522 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_SSE4A_SET;
523 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_SSE4A_SET;
527 opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_SSE4A_UNSET;
528 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_SSE4A_UNSET;
535 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_FMA4_SET;
536 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_FMA4_SET;
540 opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_FMA4_UNSET;
541 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_FMA4_UNSET;
548 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_XOP_SET;
549 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_XOP_SET;
553 opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_XOP_UNSET;
554 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_XOP_UNSET;
561 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_LWP_SET;
562 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_LWP_SET;
566 opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_LWP_UNSET;
567 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_LWP_UNSET;
574 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_ABM_SET;
575 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_ABM_SET;
579 opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_ABM_UNSET;
580 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_ABM_UNSET;
587 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_BMI_SET;
588 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_BMI_SET;
592 opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_BMI_UNSET;
593 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_BMI_UNSET;
600 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_BMI2_SET;
601 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_BMI2_SET;
605 opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_BMI2_UNSET;
606 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_BMI2_UNSET;
613 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_LZCNT_SET;
614 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_LZCNT_SET;
618 opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_LZCNT_UNSET;
619 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_LZCNT_UNSET;
626 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_TBM_SET;
627 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_TBM_SET;
631 opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_TBM_UNSET;
632 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_TBM_UNSET;
639 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_POPCNT_SET;
640 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_POPCNT_SET;
644 opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_POPCNT_UNSET;
645 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_POPCNT_UNSET;
652 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_SAHF_SET;
653 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_SAHF_SET;
657 opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_SAHF_UNSET;
658 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_SAHF_UNSET;
665 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_CX16_SET;
666 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_CX16_SET;
670 opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_CX16_UNSET;
671 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_CX16_UNSET;
678 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_MOVBE_SET;
679 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_MOVBE_SET;
683 opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_MOVBE_UNSET;
684 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_MOVBE_UNSET;
691 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_CRC32_SET;
692 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_CRC32_SET;
696 opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_CRC32_UNSET;
697 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_CRC32_UNSET;
704 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_AES_SET;
705 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_AES_SET;
709 opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_AES_UNSET;
710 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_AES_UNSET;
717 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_SHA_SET;
718 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_SHA_SET;
722 opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_SHA_UNSET;
723 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_SHA_UNSET;
730 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_PCLMUL_SET;
731 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_PCLMUL_SET;
735 opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_PCLMUL_UNSET;
736 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_PCLMUL_UNSET;
743 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_FSGSBASE_SET;
744 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_FSGSBASE_SET;
748 opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_FSGSBASE_UNSET;
749 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_FSGSBASE_UNSET;
756 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_RDRND_SET;
757 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_RDRND_SET;
761 opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_RDRND_UNSET;
762 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_RDRND_UNSET;
769 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_F16C_SET;
770 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_F16C_SET;
774 opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_F16C_UNSET;
775 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_F16C_UNSET;
782 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_FXSR_SET;
783 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_FXSR_SET;
787 opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_FXSR_UNSET;
788 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_FXSR_UNSET;
795 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_XSAVE_SET;
796 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_XSAVE_SET;
800 opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_XSAVE_UNSET;
801 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_XSAVE_UNSET;
808 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_XSAVEOPT_SET;
809 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_XSAVEOPT_SET;
813 opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_XSAVEOPT_UNSET;
814 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_XSAVEOPT_UNSET;
821 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_XSAVEC_SET;
822 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_XSAVEC_SET;
826 opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_XSAVEC_UNSET;
827 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_XSAVEC_UNSET;
834 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_XSAVES_SET;
835 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_XSAVES_SET;
839 opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_XSAVES_UNSET;
840 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_XSAVES_UNSET;
847 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_RDSEED_SET;
848 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_RDSEED_SET;
852 opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_RDSEED_UNSET;
853 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_RDSEED_UNSET;
860 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_PRFCHW_SET;
861 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_PRFCHW_SET;
865 opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_PRFCHW_UNSET;
866 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_PRFCHW_UNSET;
873 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_ADX_SET;
874 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_ADX_SET;
878 opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_ADX_UNSET;
879 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_ADX_UNSET;
883 case OPT_mprefetchwt1:
886 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_PREFETCHWT1_SET;
887 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_PREFETCHWT1_SET;
891 opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_PREFETCHWT1_UNSET;
892 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_PREFETCHWT1_UNSET;
896 case OPT_mclflushopt:
899 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_CLFLUSHOPT_SET;
900 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_CLFLUSHOPT_SET;
904 opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_CLFLUSHOPT_UNSET;
905 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_CLFLUSHOPT_UNSET;
912 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_PCOMMIT_SET;
913 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_PCOMMIT_SET;
917 opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_PCOMMIT_UNSET;
918 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_PCOMMIT_UNSET;
925 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_CLWB_SET;
926 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_CLWB_SET;
930 opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_CLWB_UNSET;
931 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_CLWB_UNSET;
935 /* Comes from final.c -- no real reason to change it. */
936 #define MAX_CODE_ALIGN 16
938 case OPT_malign_loops_:
939 warning_at (loc, 0, "-malign-loops is obsolete, use -falign-loops");
940 if (value > MAX_CODE_ALIGN)
941 error_at (loc, "-malign-loops=%d is not between 0 and %d",
942 value, MAX_CODE_ALIGN);
944 opts->x_align_loops = 1 << value;
947 case OPT_malign_jumps_:
948 warning_at (loc, 0, "-malign-jumps is obsolete, use -falign-jumps");
949 if (value > MAX_CODE_ALIGN)
950 error_at (loc, "-malign-jumps=%d is not between 0 and %d",
951 value, MAX_CODE_ALIGN);
953 opts->x_align_jumps = 1 << value;
956 case OPT_malign_functions_:
958 "-malign-functions is obsolete, use -falign-functions");
959 if (value > MAX_CODE_ALIGN)
960 error_at (loc, "-malign-functions=%d is not between 0 and %d",
961 value, MAX_CODE_ALIGN);
963 opts->x_align_functions = 1 << value;
966 case OPT_mbranch_cost_:
969 error_at (loc, "-mbranch-cost=%d is not between 0 and 5", value);
970 opts->x_ix86_branch_cost = 5;
979 static const struct default_options ix86_option_optimization_table[] =
981 /* Enable redundant extension instructions removal at -O2 and higher. */
982 { OPT_LEVELS_2_PLUS, OPT_free, NULL, 1 },
983 /* Enable function splitting at -O2 and higher. */
984 { OPT_LEVELS_2_PLUS, OPT_freorder_blocks_and_partition, NULL, 1 },
985 /* Turn off -fschedule-insns by default. It tends to make the
986 problem with not enough registers even worse. */
987 { OPT_LEVELS_ALL, OPT_fschedule_insns, NULL, 0 },
989 #ifdef SUBTARGET_OPTIMIZATION_OPTIONS
990 SUBTARGET_OPTIMIZATION_OPTIONS,
992 { OPT_LEVELS_NONE, 0, NULL, 0 }
995 /* Implement TARGET_OPTION_INIT_STRUCT. */
998 ix86_option_init_struct (struct gcc_options *opts)
1001 /* The Darwin libraries never set errno, so we might as well
1002 avoid calling them when that's the only reason we would. */
1003 opts->x_flag_errno_math = 0;
1005 opts->x_flag_pcc_struct_return = 2;
1006 opts->x_flag_asynchronous_unwind_tables = 2;
1009 /* On the x86 -fsplit-stack and -fstack-protector both use the same
1010 field in the TCB, so they can not be used together. */
1013 ix86_supports_split_stack (bool report ATTRIBUTE_UNUSED,
1014 struct gcc_options *opts ATTRIBUTE_UNUSED)
1018 #ifndef TARGET_THREAD_SPLIT_STACK_OFFSET
1020 error ("%<-fsplit-stack%> currently only supported on GNU/Linux");
1023 if (!HAVE_GAS_CFI_PERSONALITY_DIRECTIVE)
1026 error ("%<-fsplit-stack%> requires "
1027 "assembler support for CFI directives");
1035 /* Implement TARGET_EXCEPT_UNWIND_INFO. */
1037 static enum unwind_info_type
1038 i386_except_unwind_info (struct gcc_options *opts)
1040 /* Honor the --enable-sjlj-exceptions configure switch. */
1041 #ifdef CONFIG_SJLJ_EXCEPTIONS
1042 if (CONFIG_SJLJ_EXCEPTIONS)
1046 /* On windows 64, prefer SEH exceptions over anything else. */
1047 if (TARGET_64BIT && DEFAULT_ABI == MS_ABI && opts->x_flag_unwind_tables)
1050 if (DWARF2_UNWIND_INFO)
1056 #undef TARGET_EXCEPT_UNWIND_INFO
1057 #define TARGET_EXCEPT_UNWIND_INFO i386_except_unwind_info
1059 #undef TARGET_DEFAULT_TARGET_FLAGS
1060 #define TARGET_DEFAULT_TARGET_FLAGS \
1062 | TARGET_SUBTARGET_DEFAULT \
1063 | TARGET_TLS_DIRECT_SEG_REFS_DEFAULT)
1065 #undef TARGET_HANDLE_OPTION
1066 #define TARGET_HANDLE_OPTION ix86_handle_option
1068 #undef TARGET_OPTION_OPTIMIZATION_TABLE
1069 #define TARGET_OPTION_OPTIMIZATION_TABLE ix86_option_optimization_table
1070 #undef TARGET_OPTION_INIT_STRUCT
1071 #define TARGET_OPTION_INIT_STRUCT ix86_option_init_struct
1073 #undef TARGET_SUPPORTS_SPLIT_STACK
1074 #define TARGET_SUPPORTS_SPLIT_STACK ix86_supports_split_stack
1076 struct gcc_targetm_common targetm_common = TARGETM_COMMON_INITIALIZER;