1 /* $NetBSD: ohci.c,v 1.138 2003/02/08 03:32:50 ichiro Exp $ */
2 /* $FreeBSD: src/sys/dev/usb/ohci.c,v 1.154.2.4 2006/06/26 00:31:25 iedowse Exp $ */
4 /* Also, already ported:
5 * $NetBSD: ohci.c,v 1.140 2003/05/13 04:42:00 gson Exp $
6 * $NetBSD: ohci.c,v 1.141 2003/09/10 20:08:29 mycroft Exp $
7 * $NetBSD: ohci.c,v 1.142 2003/10/11 03:04:26 toshii Exp $
8 * $NetBSD: ohci.c,v 1.143 2003/10/18 04:50:35 simonb Exp $
9 * $NetBSD: ohci.c,v 1.144 2003/11/23 19:18:06 augustss Exp $
10 * $NetBSD: ohci.c,v 1.145 2003/11/23 19:20:25 augustss Exp $
11 * $NetBSD: ohci.c,v 1.146 2003/12/29 08:17:10 toshii Exp $
12 * $NetBSD: ohci.c,v 1.147 2004/06/22 07:20:35 mycroft Exp $
13 * $NetBSD: ohci.c,v 1.148 2004/06/22 18:27:46 mycroft Exp $
17 * Copyright (c) 1998 The NetBSD Foundation, Inc.
18 * All rights reserved.
20 * This code is derived from software contributed to The NetBSD Foundation
21 * by Lennart Augustsson (lennart@augustsson.net) at
22 * Carlstedt Research & Technology.
24 * Redistribution and use in source and binary forms, with or without
25 * modification, are permitted provided that the following conditions
27 * 1. Redistributions of source code must retain the above copyright
28 * notice, this list of conditions and the following disclaimer.
29 * 2. Redistributions in binary form must reproduce the above copyright
30 * notice, this list of conditions and the following disclaimer in the
31 * documentation and/or other materials provided with the distribution.
32 * 3. All advertising materials mentioning features or use of this software
33 * must display the following acknowledgement:
34 * This product includes software developed by the NetBSD
35 * Foundation, Inc. and its contributors.
36 * 4. Neither the name of The NetBSD Foundation nor the names of its
37 * contributors may be used to endorse or promote products derived
38 * from this software without specific prior written permission.
40 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
41 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
42 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
43 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
44 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
45 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
46 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
47 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
48 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
49 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
50 * POSSIBILITY OF SUCH DAMAGE.
54 * USB Open Host Controller driver.
56 * OHCI spec: http://www.compaq.com/productinfo/development/openhci.html
57 * USB spec: http://www.usb.org/developers/docs/usbspec.zip
60 #include <sys/param.h>
61 #include <sys/systm.h>
62 #include <sys/malloc.h>
63 #include <sys/kernel.h>
64 #include <sys/endian.h>
65 #include <sys/module.h>
67 #if defined(DIAGNOSTIC) && defined(__i386__)
68 #include <machine/cpu.h>
71 #include <sys/queue.h>
72 #include <sys/sysctl.h>
73 #include <sys/thread2.h>
75 #include <machine/endian.h>
77 #include <bus/usb/usb.h>
78 #include <bus/usb/usbdi.h>
79 #include <bus/usb/usbdivar.h>
80 #include <bus/usb/usb_mem.h>
81 #include <bus/usb/usb_quirks.h>
83 #include <bus/usb/ohcireg.h>
84 #include <bus/usb/ohcivar.h>
86 #define delay(d) DELAY(d)
89 #define DPRINTF(x) if (ohcidebug) kprintf x
90 #define DPRINTFN(n,x) if (ohcidebug>(n)) kprintf x
92 SYSCTL_NODE(_hw_usb, OID_AUTO, ohci, CTLFLAG_RW, 0, "USB ohci");
93 SYSCTL_INT(_hw_usb_ohci, OID_AUTO, debug, CTLFLAG_RW,
94 &ohcidebug, 0, "ohci debug level");
95 #define bitmask_snprintf(q,f,b,l) ksnprintf((b), (l), "%b", (q), (f))
103 static ohci_soft_ed_t *ohci_alloc_sed(ohci_softc_t *);
104 static void ohci_free_sed(ohci_softc_t *, ohci_soft_ed_t *);
106 static ohci_soft_td_t *ohci_alloc_std(ohci_softc_t *);
107 static void ohci_free_std(ohci_softc_t *, ohci_soft_td_t *);
109 static ohci_soft_itd_t *ohci_alloc_sitd(ohci_softc_t *);
110 static void ohci_free_sitd(ohci_softc_t *,ohci_soft_itd_t *);
113 static void ohci_free_std_chain(ohci_softc_t *, ohci_soft_td_t *,
116 static usbd_status ohci_alloc_std_chain(struct ohci_pipe *,
117 ohci_softc_t *, int, int, usbd_xfer_handle,
118 ohci_soft_td_t *, ohci_soft_td_t **);
120 static usbd_status ohci_open(usbd_pipe_handle);
121 static void ohci_poll(struct usbd_bus *);
122 static void ohci_softintr(void *);
123 static void ohci_waitintr(ohci_softc_t *, usbd_xfer_handle);
124 static void ohci_add_done(ohci_softc_t *, ohci_physaddr_t);
125 static void ohci_rhsc(ohci_softc_t *, usbd_xfer_handle);
127 static usbd_status ohci_device_request(usbd_xfer_handle xfer);
128 static void ohci_add_ed(ohci_soft_ed_t *, ohci_soft_ed_t *);
129 static void ohci_rem_ed(ohci_soft_ed_t *, ohci_soft_ed_t *);
130 static void ohci_hash_add_td(ohci_softc_t *, ohci_soft_td_t *);
131 static void ohci_hash_rem_td(ohci_softc_t *, ohci_soft_td_t *);
132 static ohci_soft_td_t *ohci_hash_find_td(ohci_softc_t *, ohci_physaddr_t);
133 static void ohci_hash_add_itd(ohci_softc_t *, ohci_soft_itd_t *);
134 static void ohci_hash_rem_itd(ohci_softc_t *, ohci_soft_itd_t *);
135 static ohci_soft_itd_t *ohci_hash_find_itd(ohci_softc_t *, ohci_physaddr_t);
137 static usbd_status ohci_setup_isoc(usbd_pipe_handle pipe);
138 static void ohci_device_isoc_enter(usbd_xfer_handle);
140 static usbd_status ohci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t);
141 static void ohci_freem(struct usbd_bus *, usb_dma_t *);
143 static usbd_xfer_handle ohci_allocx(struct usbd_bus *);
144 static void ohci_freex(struct usbd_bus *, usbd_xfer_handle);
146 static usbd_status ohci_root_ctrl_transfer(usbd_xfer_handle);
147 static usbd_status ohci_root_ctrl_start(usbd_xfer_handle);
148 static void ohci_root_ctrl_abort(usbd_xfer_handle);
149 static void ohci_root_ctrl_close(usbd_pipe_handle);
150 static void ohci_root_ctrl_done(usbd_xfer_handle);
152 static usbd_status ohci_root_intr_transfer(usbd_xfer_handle);
153 static usbd_status ohci_root_intr_start(usbd_xfer_handle);
154 static void ohci_root_intr_abort(usbd_xfer_handle);
155 static void ohci_root_intr_close(usbd_pipe_handle);
156 static void ohci_root_intr_done(usbd_xfer_handle);
158 static usbd_status ohci_device_ctrl_transfer(usbd_xfer_handle);
159 static usbd_status ohci_device_ctrl_start(usbd_xfer_handle);
160 static void ohci_device_ctrl_abort(usbd_xfer_handle);
161 static void ohci_device_ctrl_close(usbd_pipe_handle);
162 static void ohci_device_ctrl_done(usbd_xfer_handle);
164 static usbd_status ohci_device_bulk_transfer(usbd_xfer_handle);
165 static usbd_status ohci_device_bulk_start(usbd_xfer_handle);
166 static void ohci_device_bulk_abort(usbd_xfer_handle);
167 static void ohci_device_bulk_close(usbd_pipe_handle);
168 static void ohci_device_bulk_done(usbd_xfer_handle);
170 static usbd_status ohci_device_intr_transfer(usbd_xfer_handle);
171 static usbd_status ohci_device_intr_start(usbd_xfer_handle);
172 static void ohci_device_intr_abort(usbd_xfer_handle);
173 static void ohci_device_intr_close(usbd_pipe_handle);
174 static void ohci_device_intr_done(usbd_xfer_handle);
176 static usbd_status ohci_device_isoc_transfer(usbd_xfer_handle);
177 static usbd_status ohci_device_isoc_start(usbd_xfer_handle);
178 static void ohci_device_isoc_abort(usbd_xfer_handle);
179 static void ohci_device_isoc_close(usbd_pipe_handle);
180 static void ohci_device_isoc_done(usbd_xfer_handle);
182 static usbd_status ohci_device_setintr(ohci_softc_t *sc,
183 struct ohci_pipe *pipe, int ival);
185 static int ohci_str(usb_string_descriptor_t *, int, const char *);
187 static void ohci_timeout(void *);
188 static void ohci_timeout_task(void *);
189 static void ohci_rhsc_able(ohci_softc_t *, int);
190 static void ohci_rhsc_enable(void *);
192 static void ohci_close_pipe(usbd_pipe_handle, ohci_soft_ed_t *);
193 static void ohci_abort_xfer(usbd_xfer_handle, usbd_status);
195 static void ohci_device_clear_toggle(usbd_pipe_handle pipe);
196 static void ohci_noop(usbd_pipe_handle pipe);
198 static usbd_status ohci_controller_init(ohci_softc_t *sc);
201 static void ohci_dumpregs(ohci_softc_t *);
202 static void ohci_dump_tds(ohci_soft_td_t *);
203 static void ohci_dump_td(ohci_soft_td_t *);
204 static void ohci_dump_ed(ohci_soft_ed_t *);
205 static void ohci_dump_itd(ohci_soft_itd_t *);
206 static void ohci_dump_itds(ohci_soft_itd_t *);
209 #define OBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \
210 BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE)
211 #define OWRITE1(sc, r, x) \
212 do { OBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); } while (0)
213 #define OWRITE2(sc, r, x) \
214 do { OBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); } while (0)
215 #define OWRITE4(sc, r, x) \
216 do { OBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); } while (0)
217 #define OREAD1(sc, r) (OBARR(sc), bus_space_read_1((sc)->iot, (sc)->ioh, (r)))
218 #define OREAD2(sc, r) (OBARR(sc), bus_space_read_2((sc)->iot, (sc)->ioh, (r)))
219 #define OREAD4(sc, r) (OBARR(sc), bus_space_read_4((sc)->iot, (sc)->ioh, (r)))
221 /* Reverse the bits in a value 0 .. 31 */
222 static u_int8_t revbits[OHCI_NO_INTRS] =
223 { 0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0c, 0x1c,
224 0x02, 0x12, 0x0a, 0x1a, 0x06, 0x16, 0x0e, 0x1e,
225 0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0d, 0x1d,
226 0x03, 0x13, 0x0b, 0x1b, 0x07, 0x17, 0x0f, 0x1f };
229 struct usbd_pipe pipe;
234 ohci_soft_itd_t *itd;
236 /* Info needed for different pipe kinds. */
242 ohci_soft_td_t *setup, *data, *stat;
261 #define OHCI_INTR_ENDPT 1
263 static struct usbd_bus_methods ohci_bus_methods = {
273 static struct usbd_pipe_methods ohci_root_ctrl_methods = {
274 ohci_root_ctrl_transfer,
275 ohci_root_ctrl_start,
276 ohci_root_ctrl_abort,
277 ohci_root_ctrl_close,
282 static struct usbd_pipe_methods ohci_root_intr_methods = {
283 ohci_root_intr_transfer,
284 ohci_root_intr_start,
285 ohci_root_intr_abort,
286 ohci_root_intr_close,
291 static struct usbd_pipe_methods ohci_device_ctrl_methods = {
292 ohci_device_ctrl_transfer,
293 ohci_device_ctrl_start,
294 ohci_device_ctrl_abort,
295 ohci_device_ctrl_close,
297 ohci_device_ctrl_done,
300 static struct usbd_pipe_methods ohci_device_intr_methods = {
301 ohci_device_intr_transfer,
302 ohci_device_intr_start,
303 ohci_device_intr_abort,
304 ohci_device_intr_close,
305 ohci_device_clear_toggle,
306 ohci_device_intr_done,
309 static struct usbd_pipe_methods ohci_device_bulk_methods = {
310 ohci_device_bulk_transfer,
311 ohci_device_bulk_start,
312 ohci_device_bulk_abort,
313 ohci_device_bulk_close,
314 ohci_device_clear_toggle,
315 ohci_device_bulk_done,
318 static struct usbd_pipe_methods ohci_device_isoc_methods = {
319 ohci_device_isoc_transfer,
320 ohci_device_isoc_start,
321 ohci_device_isoc_abort,
322 ohci_device_isoc_close,
324 ohci_device_isoc_done,
328 ohci_detach(struct ohci_softc *sc, int flags)
335 callout_stop(&sc->sc_tmo_rhsc);
337 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS);
338 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
341 usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */
343 for (i = 0; i < OHCI_NO_EDS; i++) {
344 ohci_free_sed(sc, sc->sc_eds[i]);
345 sc->sc_eds[i] = NULL;
347 ohci_free_sed(sc, sc->sc_isoc_head);
348 sc->sc_isoc_head = NULL;
349 ohci_free_sed(sc, sc->sc_bulk_head);
350 sc->sc_bulk_head = NULL;
351 ohci_free_sed(sc, sc->sc_ctrl_head);
352 sc->sc_ctrl_head = NULL;
353 usb_freemem(&sc->sc_bus, &sc->sc_hccadma);
359 ohci_alloc_sed(ohci_softc_t *sc)
366 if (sc->sc_freeeds == NULL) {
367 DPRINTFN(2, ("ohci_alloc_sed: allocating chunk\n"));
368 err = usb_allocmem(&sc->sc_bus, OHCI_SED_SIZE * OHCI_SED_CHUNK,
369 OHCI_ED_ALIGN, &dma);
372 for(i = 0; i < OHCI_SED_CHUNK; i++) {
373 offs = i * OHCI_SED_SIZE;
374 sed = KERNADDR(&dma, offs);
375 sed->physaddr = DMAADDR(&dma, offs);
376 sed->next = sc->sc_freeeds;
377 sc->sc_freeeds = sed;
380 sed = sc->sc_freeeds;
381 sc->sc_freeeds = sed->next;
382 memset(&sed->ed, 0, sizeof(ohci_ed_t));
388 ohci_free_sed(ohci_softc_t *sc, ohci_soft_ed_t *sed)
390 sed->next = sc->sc_freeeds;
391 sc->sc_freeeds = sed;
395 ohci_alloc_std(ohci_softc_t *sc)
402 if (sc->sc_freetds == NULL) {
403 DPRINTFN(2, ("ohci_alloc_std: allocating chunk\n"));
404 err = usb_allocmem(&sc->sc_bus, OHCI_STD_SIZE * OHCI_STD_CHUNK,
405 OHCI_TD_ALIGN, &dma);
409 for(i = 0; i < OHCI_STD_CHUNK; i++) {
410 offs = i * OHCI_STD_SIZE;
411 std = KERNADDR(&dma, offs);
412 std->physaddr = DMAADDR(&dma, offs);
413 std->nexttd = sc->sc_freetds;
414 sc->sc_freetds = std;
420 std = sc->sc_freetds;
421 sc->sc_freetds = std->nexttd;
422 memset(&std->td, 0, sizeof(ohci_td_t));
425 ohci_hash_add_td(sc, std);
432 ohci_free_std(ohci_softc_t *sc, ohci_soft_td_t *std)
435 ohci_hash_rem_td(sc, std);
436 std->nexttd = sc->sc_freetds;
437 sc->sc_freetds = std;
442 ohci_alloc_std_chain(struct ohci_pipe *opipe, ohci_softc_t *sc,
443 int alen, int rd, usbd_xfer_handle xfer,
444 ohci_soft_td_t *sp, ohci_soft_td_t **ep)
446 ohci_soft_td_t *next, *cur;
447 ohci_physaddr_t dataphys;
451 usb_dma_t *dma = &xfer->dmabuf;
452 u_int16_t flags = xfer->flags;
454 DPRINTFN(alen < 4096,("ohci_alloc_std_chain: start len=%d\n", alen));
460 (rd ? OHCI_TD_IN : OHCI_TD_OUT) |
461 (flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0) |
462 OHCI_TD_NOCC | OHCI_TD_TOGGLE_CARRY | OHCI_TD_SET_DI(6));
465 next = ohci_alloc_std(sc);
469 dataphys = DMAADDR(dma, offset);
472 * The OHCI hardware can handle at most one 4k crossing.
473 * XXX - currently we only allocate contigous buffers, but
474 * the OHCI spec says: If during the data transfer the buffer
475 * address contained in the HC's working copy of
476 * CurrentBufferPointer crosses a 4K boundary, the upper 20
477 * bits of Buffer End are copied to the working value of
478 * CurrentBufferPointer causing the next buffer address to
479 * be the 0th byte in the same 4K page that contains the
480 * last byte of the buffer (the 4K boundary crossing may
481 * occur within a data packet transfer.)
483 * If/when dma has multiple segments, this will need to
484 * properly handle fragmenting TD's.
486 * Note that if we are gathering data from multiple SMALL
487 * segments, e.g. mbufs, we need to do special gymnastics,
488 * e.g. bounce buffering or data aggregation,
489 * BEFORE WE GET HERE because a bulk USB transfer must
490 * consist of maximally sized packets right up to the end.
491 * A shorter than maximal packet means that it is the end
492 * of the transfer. If the data transfer length is a
493 * multiple of the packet size, then a 0 byte
494 * packet will be the signal of the end of transfer.
495 * Since packets can't cross TDs this means that
496 * each TD except the last one must cover an exact multiple
497 * of the maximal packet length.
499 if (OHCI_PAGE_OFFSET(dataphys) + len <= (2 * OHCI_PAGE_SIZE)) {
500 /* We can handle all that remains in this TD */
503 /* must use multiple TDs, fill as much as possible. */
504 curlen = 2 * OHCI_PAGE_SIZE -
505 OHCI_PAGE_OFFSET(dataphys);
506 /* the length must be a multiple of the max size */
508 UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize);
509 KASSERT((curlen != 0), ("ohci_alloc_std: curlen == 0"));
511 DPRINTFN(4,("ohci_alloc_std_chain: dataphys=0x%08x "
512 "len=%d curlen=%d\n",
513 dataphys, len, curlen));
516 cur->td.td_flags = tdflags;
517 cur->td.td_cbp = htole32(dataphys);
519 cur->td.td_nexttd = htole32(next->physaddr);
520 cur->td.td_be = htole32(DMAADDR(dma, offset + curlen - 1));
522 cur->flags = OHCI_ADD_LEN;
524 DPRINTFN(10,("ohci_alloc_std_chain: cbp=0x%08x be=0x%08x\n",
525 dataphys, dataphys + curlen - 1));
529 panic("Length went negative: %d curlen %d dma %p offset %08x", len, curlen, dma, (int)0);
531 DPRINTFN(10,("ohci_alloc_std_chain: extend chain\n"));
535 if ((flags & USBD_FORCE_SHORT_XFER) &&
536 alen % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize) == 0) {
537 /* Force a 0 length transfer at the end. */
541 next = ohci_alloc_std(sc);
545 cur->td.td_flags = tdflags;
546 cur->td.td_cbp = 0; /* indicate 0 length packet */
548 cur->td.td_nexttd = htole32(next->physaddr);
553 DPRINTFN(2,("ohci_alloc_std_chain: add 0 xfer\n"));
557 return (USBD_NORMAL_COMPLETION);
566 ohci_free_std_chain(ohci_softc_t *sc, ohci_soft_td_t *std,
567 ohci_soft_td_t *stdend)
571 for (; std != stdend; std = p) {
573 ohci_free_std(sc, std);
579 ohci_alloc_sitd(ohci_softc_t *sc)
581 ohci_soft_itd_t *sitd;
587 if (sc->sc_freeitds == NULL) {
588 DPRINTFN(2, ("ohci_alloc_sitd: allocating chunk\n"));
590 err = usb_allocmem(&sc->sc_bus,
591 OHCI_SITD_SIZE * OHCI_SITD_CHUNK,
592 OHCI_ITD_ALIGN, &dma);
596 for (i = 0; i < OHCI_SITD_CHUNK; i++) {
597 offs = i * OHCI_SITD_SIZE;
598 sitd = KERNADDR(&dma, offs);
599 sitd->physaddr = DMAADDR(&dma, offs);
600 sitd->nextitd = sc->sc_freeitds;
601 sc->sc_freeitds = sitd;
604 sitd = sc->sc_freeitds;
605 sc->sc_freeitds = sitd->nextitd;
606 memset(&sitd->itd, 0, sizeof(ohci_itd_t));
607 sitd->nextitd = NULL;
609 ohci_hash_add_itd(sc, sitd);
620 ohci_free_sitd(ohci_softc_t *sc, ohci_soft_itd_t *sitd)
622 DPRINTFN(10,("ohci_free_sitd: sitd=%p\n", sitd));
626 panic("ohci_free_sitd: sitd=%p not done", sitd);
629 /* Warn double free */
634 ohci_hash_rem_itd(sc, sitd);
635 sitd->nextitd = sc->sc_freeitds;
636 sc->sc_freeitds = sitd;
641 ohci_init(ohci_softc_t *sc)
643 ohci_soft_ed_t *sed, *psed;
648 DPRINTF(("ohci_init: start\n"));
649 rev = OREAD4(sc, OHCI_REVISION);
650 device_printf(sc->sc_bus.bdev, "OHCI version %d.%d%s\n",
651 OHCI_REV_HI(rev), OHCI_REV_LO(rev),
652 OHCI_REV_LEGACY(rev) ? ", legacy support" : "");
655 * Make sure all interrupts are disabled before we start messing
658 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, -1);
660 if (OHCI_REV_HI(rev) != 1 || OHCI_REV_LO(rev) != 0) {
661 device_printf(sc->sc_bus.bdev, "unsupported OHCI revision\n");
662 sc->sc_bus.usbrev = USBREV_UNKNOWN;
665 sc->sc_bus.usbrev = USBREV_1_0;
667 for (i = 0; i < OHCI_HASH_SIZE; i++)
668 LIST_INIT(&sc->sc_hash_tds[i]);
669 for (i = 0; i < OHCI_HASH_SIZE; i++)
670 LIST_INIT(&sc->sc_hash_itds[i]);
672 STAILQ_INIT(&sc->sc_free_xfers);
674 /* XXX determine alignment by R/W */
675 /* Allocate the HCCA area. */
676 err = usb_allocmem(&sc->sc_bus, OHCI_HCCA_SIZE,
677 OHCI_HCCA_ALIGN, &sc->sc_hccadma);
680 sc->sc_hcca = KERNADDR(&sc->sc_hccadma, 0);
681 memset(sc->sc_hcca, 0, OHCI_HCCA_SIZE);
683 sc->sc_eintrs = OHCI_NORMAL_INTRS;
685 /* Allocate dummy ED that starts the control list. */
686 sc->sc_ctrl_head = ohci_alloc_sed(sc);
687 if (sc->sc_ctrl_head == NULL) {
691 sc->sc_ctrl_head->ed.ed_flags |= htole32(OHCI_ED_SKIP);
693 /* Allocate dummy ED that starts the bulk list. */
694 sc->sc_bulk_head = ohci_alloc_sed(sc);
695 if (sc->sc_bulk_head == NULL) {
699 sc->sc_bulk_head->ed.ed_flags |= htole32(OHCI_ED_SKIP);
701 /* Allocate dummy ED that starts the isochronous list. */
702 sc->sc_isoc_head = ohci_alloc_sed(sc);
703 if (sc->sc_isoc_head == NULL) {
707 sc->sc_isoc_head->ed.ed_flags |= htole32(OHCI_ED_SKIP);
709 /* Allocate all the dummy EDs that make up the interrupt tree. */
710 for (i = 0; i < OHCI_NO_EDS; i++) {
711 sed = ohci_alloc_sed(sc);
714 ohci_free_sed(sc, sc->sc_eds[i]);
715 sc->sc_eds[i] = NULL;
720 /* All ED fields are set to 0. */
722 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP);
724 psed = sc->sc_eds[(i-1) / 2];
726 psed= sc->sc_isoc_head;
728 sed->ed.ed_nexted = htole32(psed->physaddr);
731 * Fill HCCA interrupt table. The bit reversal is to get
732 * the tree set up properly to spread the interrupts.
734 for (i = 0; i < OHCI_NO_INTRS; i++)
735 sc->sc_hcca->hcca_interrupt_table[revbits[i]] =
736 htole32(sc->sc_eds[OHCI_NO_EDS-OHCI_NO_INTRS+i]->physaddr);
739 if (ohcidebug > 15) {
740 for (i = 0; i < OHCI_NO_EDS; i++) {
741 kprintf("ed#%d ", i);
742 ohci_dump_ed(sc->sc_eds[i]);
745 ohci_dump_ed(sc->sc_isoc_head);
749 err = ohci_controller_init(sc);
750 if (err != USBD_NORMAL_COMPLETION)
753 /* Set up the bus struct. */
754 sc->sc_bus.methods = &ohci_bus_methods;
755 sc->sc_bus.pipe_size = sizeof(struct ohci_pipe);
757 callout_init(&sc->sc_tmo_rhsc);
760 * Finish up w/ interlocked done flag (the interrupt handler could
761 * be called due to other shared interrupts), enable interrupts,
762 * and run the handler in case a pending interrupt got cleared
763 * before we finished.
766 sc->sc_flags |= OHCI_SCFLG_DONEINIT;
767 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs);
771 return (USBD_NORMAL_COMPLETION);
774 for (i = 0; i < OHCI_NO_EDS; i++) {
775 ohci_free_sed(sc, sc->sc_eds[i]);
776 sc->sc_eds[i] = NULL;
779 ohci_free_sed(sc, sc->sc_isoc_head);
780 sc->sc_isoc_head = NULL;
782 ohci_free_sed(sc, sc->sc_bulk_head);
783 sc->sc_bulk_head = NULL;
785 ohci_free_sed(sc, sc->sc_ctrl_head);
786 sc->sc_ctrl_head = NULL;
788 usb_freemem(&sc->sc_bus, &sc->sc_hccadma);
793 ohci_controller_init(ohci_softc_t *sc)
796 u_int32_t s, ctl, ival, hcr, fm, per, desca;
798 /* Determine in what context we are running. */
799 ctl = OREAD4(sc, OHCI_CONTROL);
801 /* SMM active, request change */
802 DPRINTF(("ohci_init: SMM active, request owner change\n"));
803 s = OREAD4(sc, OHCI_COMMAND_STATUS);
804 OWRITE4(sc, OHCI_COMMAND_STATUS, s | OHCI_OCR);
805 for (i = 0; i < 100 && (ctl & OHCI_IR); i++) {
806 usb_delay_ms(&sc->sc_bus, 1);
807 ctl = OREAD4(sc, OHCI_CONTROL);
809 if ((ctl & OHCI_IR) == 0) {
810 device_printf(sc->sc_bus.bdev,
811 "SMM does not respond, resetting\n");
812 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
816 /* Don't bother trying to reuse the BIOS init, we'll reset it anyway. */
817 } else if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_RESET) {
818 /* BIOS started controller. */
819 DPRINTF(("ohci_init: BIOS active\n"));
820 if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_OPERATIONAL) {
821 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_OPERATIONAL);
822 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY);
826 DPRINTF(("ohci_init: cold started\n"));
828 /* Controller was cold started. */
829 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY);
833 * This reset should not be necessary according to the OHCI spec, but
834 * without it some controllers do not start.
836 DPRINTF(("%s: resetting\n", device_get_nameunit(sc->sc_bus.bdev)));
837 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
838 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY);
840 /* We now own the host controller and the bus has been reset. */
841 ival = OHCI_GET_IVAL(OREAD4(sc, OHCI_FM_INTERVAL));
843 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */
844 /* Nominal time for a reset is 10 us. */
845 for (i = 0; i < 10; i++) {
847 hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR;
852 device_printf(sc->sc_bus.bdev, "reset timeout\n");
853 return (USBD_IOERROR);
860 /* The controller is now in SUSPEND state, we have 2ms to finish. */
862 /* Set up HC registers. */
863 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0));
864 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr);
865 OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr);
866 /* disable all interrupts */
867 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS);
868 /* switch on desired functional features */
869 ctl = OREAD4(sc, OHCI_CONTROL);
870 ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR);
871 ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE |
872 OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL;
873 /* And finally start it! */
874 OWRITE4(sc, OHCI_CONTROL, ctl);
877 * The controller is now OPERATIONAL. Set a some final
878 * registers that should be set earlier, but that the
879 * controller ignores when in the SUSPEND state.
881 fm = (OREAD4(sc, OHCI_FM_INTERVAL) & OHCI_FIT) ^ OHCI_FIT;
882 fm |= OHCI_FSMPS(ival) | ival;
883 OWRITE4(sc, OHCI_FM_INTERVAL, fm);
884 per = OHCI_PERIODIC(ival); /* 90% periodic */
885 OWRITE4(sc, OHCI_PERIODIC_START, per);
887 /* Fiddle the No OverCurrent Protection bit to avoid chip bug. */
888 desca = OREAD4(sc, OHCI_RH_DESCRIPTOR_A);
889 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca | OHCI_NOCP);
890 OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */
891 usb_delay_ms(&sc->sc_bus, OHCI_ENABLE_POWER_DELAY);
892 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca);
895 * The AMD756 requires a delay before re-reading the register,
896 * otherwise it will occasionally report 0 ports.
899 for (i = 0; i < 10 && sc->sc_noport == 0; i++) {
900 usb_delay_ms(&sc->sc_bus, OHCI_READ_DESC_DELAY);
901 sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A));
905 * Enable desired interrupts
907 sc->sc_eintrs |= OHCI_MIE;
908 if (sc->sc_flags & OHCI_SCFLG_DONEINIT)
909 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs);
915 return (USBD_NORMAL_COMPLETION);
919 ohci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size)
921 return (usb_allocmem(bus, size, 0, dma));
925 ohci_freem(struct usbd_bus *bus, usb_dma_t *dma)
927 usb_freemem(bus, dma);
931 ohci_allocx(struct usbd_bus *bus)
933 struct ohci_softc *sc = (struct ohci_softc *)bus;
934 usbd_xfer_handle xfer;
936 xfer = STAILQ_FIRST(&sc->sc_free_xfers);
938 STAILQ_REMOVE_HEAD(&sc->sc_free_xfers, next);
940 if (xfer->busy_free != XFER_FREE) {
941 kprintf("ohci_allocx: xfer=%p not free, 0x%08x\n", xfer,
946 xfer = kmalloc(sizeof(struct ohci_xfer), M_USB, M_INTWAIT);
949 memset(xfer, 0, sizeof (struct ohci_xfer));
950 usb_init_task(&OXFER(xfer)->abort_task, ohci_timeout_task,
952 OXFER(xfer)->ohci_xfer_flags = 0;
954 xfer->busy_free = XFER_BUSY;
961 ohci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer)
963 struct ohci_softc *sc = (struct ohci_softc *)bus;
964 struct ohci_xfer *oxfer = (struct ohci_xfer *)xfer;
965 ohci_soft_itd_t *sitd;
967 if (oxfer->ohci_xfer_flags & OHCI_ISOC_DIRTY) {
969 for (sitd = xfer->hcpriv; sitd != NULL && sitd->xfer == xfer;
970 sitd = sitd->nextitd)
971 ohci_free_sitd(sc, sitd);
976 if (xfer->busy_free != XFER_BUSY) {
977 kprintf("ohci_freex: xfer=%p not busy, 0x%08x\n", xfer,
981 xfer->busy_free = XFER_FREE;
983 STAILQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next);
987 * Shut down the controller when the system is going down.
990 ohci_shutdown(void *v)
992 ohci_softc_t *sc = v;
994 DPRINTF(("ohci_shutdown: stopping the HC\n"));
995 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
999 * Handle suspend/resume.
1001 * We need to switch to polling mode here, because this routine is
1002 * called from an intterupt context. This is all right since we
1003 * are almost suspended anyway.
1006 ohci_power(int why, void *v)
1008 ohci_softc_t *sc = v;
1012 DPRINTF(("ohci_power: sc=%p, why=%d\n", sc, why));
1017 if (why != PWR_RESUME) {
1018 sc->sc_bus.use_polling++;
1019 ctl = OREAD4(sc, OHCI_CONTROL) & ~OHCI_HCFS_MASK;
1020 if (sc->sc_control == 0) {
1022 * Preserve register values, in case that APM BIOS
1023 * does not recover them.
1025 sc->sc_control = ctl;
1026 sc->sc_intre = OREAD4(sc, OHCI_INTERRUPT_ENABLE);
1028 ctl |= OHCI_HCFS_SUSPEND;
1029 OWRITE4(sc, OHCI_CONTROL, ctl);
1030 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT);
1031 sc->sc_bus.use_polling--;
1033 sc->sc_bus.use_polling++;
1035 /* Some broken BIOSes never initialize Controller chip */
1036 ohci_controller_init(sc);
1039 OWRITE4(sc, OHCI_INTERRUPT_ENABLE,
1040 sc->sc_intre & (OHCI_ALL_INTRS | OHCI_MIE));
1042 ctl = sc->sc_control;
1044 ctl = OREAD4(sc, OHCI_CONTROL);
1045 ctl |= OHCI_HCFS_RESUME;
1046 OWRITE4(sc, OHCI_CONTROL, ctl);
1047 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY);
1048 ctl = (ctl & ~OHCI_HCFS_MASK) | OHCI_HCFS_OPERATIONAL;
1049 OWRITE4(sc, OHCI_CONTROL, ctl);
1050 usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY);
1051 sc->sc_control = sc->sc_intre = 0;
1052 sc->sc_bus.use_polling--;
1059 ohci_dumpregs(ohci_softc_t *sc)
1061 DPRINTF(("ohci_dumpregs: rev=0x%08x control=0x%08x command=0x%08x\n",
1062 OREAD4(sc, OHCI_REVISION),
1063 OREAD4(sc, OHCI_CONTROL),
1064 OREAD4(sc, OHCI_COMMAND_STATUS)));
1065 DPRINTF((" intrstat=0x%08x intre=0x%08x intrd=0x%08x\n",
1066 OREAD4(sc, OHCI_INTERRUPT_STATUS),
1067 OREAD4(sc, OHCI_INTERRUPT_ENABLE),
1068 OREAD4(sc, OHCI_INTERRUPT_DISABLE)));
1069 DPRINTF((" hcca=0x%08x percur=0x%08x ctrlhd=0x%08x\n",
1070 OREAD4(sc, OHCI_HCCA),
1071 OREAD4(sc, OHCI_PERIOD_CURRENT_ED),
1072 OREAD4(sc, OHCI_CONTROL_HEAD_ED)));
1073 DPRINTF((" ctrlcur=0x%08x bulkhd=0x%08x bulkcur=0x%08x\n",
1074 OREAD4(sc, OHCI_CONTROL_CURRENT_ED),
1075 OREAD4(sc, OHCI_BULK_HEAD_ED),
1076 OREAD4(sc, OHCI_BULK_CURRENT_ED)));
1077 DPRINTF((" done=0x%08x fmival=0x%08x fmrem=0x%08x\n",
1078 OREAD4(sc, OHCI_DONE_HEAD),
1079 OREAD4(sc, OHCI_FM_INTERVAL),
1080 OREAD4(sc, OHCI_FM_REMAINING)));
1081 DPRINTF((" fmnum=0x%08x perst=0x%08x lsthrs=0x%08x\n",
1082 OREAD4(sc, OHCI_FM_NUMBER),
1083 OREAD4(sc, OHCI_PERIODIC_START),
1084 OREAD4(sc, OHCI_LS_THRESHOLD)));
1085 DPRINTF((" desca=0x%08x descb=0x%08x stat=0x%08x\n",
1086 OREAD4(sc, OHCI_RH_DESCRIPTOR_A),
1087 OREAD4(sc, OHCI_RH_DESCRIPTOR_B),
1088 OREAD4(sc, OHCI_RH_STATUS)));
1089 DPRINTF((" port1=0x%08x port2=0x%08x\n",
1090 OREAD4(sc, OHCI_RH_PORT_STATUS(1)),
1091 OREAD4(sc, OHCI_RH_PORT_STATUS(2))));
1092 DPRINTF((" HCCA: frame_number=0x%04x done_head=0x%08x\n",
1093 le32toh(sc->sc_hcca->hcca_frame_number),
1094 le32toh(sc->sc_hcca->hcca_done_head)));
1098 static int ohci_intr1(ohci_softc_t *);
1103 ohci_softc_t *sc = p;
1105 if (sc->sc_dying || (sc->sc_flags & OHCI_SCFLG_DONEINIT) == 0)
1109 * If we get an interrupt while polling, then remember what it
1110 * was and acknowledge it.
1112 if (sc->sc_bus.use_polling) {
1113 u_int32_t intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS);
1117 OWRITE4(sc, OHCI_INTERRUPT_STATUS, intrs);
1118 sc->sc_dintrs |= intrs;
1120 DPRINTFN(16, ("ohci_intr: ignored interrupt while polling\n"));
1125 return (ohci_intr1(sc));
1129 ohci_intr1(ohci_softc_t *sc)
1131 u_int32_t intrs, eintrs;
1132 ohci_physaddr_t done;
1134 DPRINTFN(14,("ohci_intr1: enter\n"));
1136 /* In case the interrupt occurs before initialization has completed. */
1137 if (sc->sc_hcca == NULL) {
1139 kprintf("ohci_intr: sc->sc_hcca == NULL\n");
1145 done = le32toh(sc->sc_hcca->hcca_done_head);
1147 /* The LSb of done is used to inform the HC Driver that an interrupt
1148 * condition exists for both the Done list and for another event
1149 * recorded in HcInterruptStatus. On an interrupt from the HC, the HC
1150 * Driver checks the HccaDoneHead Value. If this value is 0, then the
1151 * interrupt was caused by other than the HccaDoneHead update and the
1152 * HcInterruptStatus register needs to be accessed to determine that
1153 * exact interrupt cause. If HccaDoneHead is nonzero, then a Done list
1154 * update interrupt is indicated and if the LSb of done is nonzero,
1155 * then an additional interrupt event is indicated and
1156 * HcInterruptStatus should be checked to determine its cause.
1159 if (done & ~OHCI_DONE_INTRS)
1161 if (done & OHCI_DONE_INTRS) {
1162 intrs |= OREAD4(sc, OHCI_INTERRUPT_STATUS);
1163 intrs |= sc->sc_dintrs;
1164 done &= ~OHCI_DONE_INTRS;
1166 sc->sc_hcca->hcca_done_head = 0;
1168 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS);
1169 intrs |= sc->sc_dintrs;
1173 if (intrs == 0) /* nothing to be done (PCI shared interrupt) */
1177 OWRITE4(sc, OHCI_INTERRUPT_STATUS, intrs); /* Acknowledge */
1178 sc->sc_dintrs &= ~intrs;
1179 eintrs = intrs & sc->sc_eintrs;
1183 sc->sc_bus.intr_context++;
1184 sc->sc_bus.no_intrs++;
1185 DPRINTFN(7, ("ohci_intr: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n",
1186 sc, (u_int)intrs, OREAD4(sc, OHCI_INTERRUPT_STATUS),
1189 if (eintrs & OHCI_SO) {
1190 sc->sc_overrun_cnt++;
1191 if (usbd_ratecheck(&sc->sc_overrun_ntc)) {
1192 device_printf(sc->sc_bus.bdev,
1193 "%u scheduling overruns\n", sc->sc_overrun_cnt);
1194 sc->sc_overrun_cnt = 0;
1199 if (eintrs & OHCI_WDH) {
1200 ohci_add_done(sc, done &~ OHCI_DONE_INTRS);
1201 usb_schedsoftintr(&sc->sc_bus);
1202 eintrs &= ~OHCI_WDH;
1204 if (eintrs & OHCI_RD) {
1205 device_printf(sc->sc_bus.bdev, "resume detect\n");
1206 /* XXX process resume detect */
1208 if (eintrs & OHCI_UE) {
1209 device_printf(sc->sc_bus.bdev,
1210 "unrecoverable error, controller halted\n");
1211 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
1214 if (eintrs & OHCI_RHSC) {
1215 ohci_rhsc(sc, sc->sc_intrxfer);
1217 * Disable RHSC interrupt for now, because it will be
1218 * on until the port has been reset.
1220 ohci_rhsc_able(sc, 0);
1221 /* Do not allow RHSC interrupts > 1 per second */
1222 callout_reset(&sc->sc_tmo_rhsc, hz, ohci_rhsc_enable, sc);
1223 eintrs &= ~OHCI_RHSC;
1226 sc->sc_bus.intr_context--;
1229 /* Block unprocessed interrupts. XXX */
1230 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, eintrs);
1231 sc->sc_eintrs &= ~eintrs;
1232 device_printf(sc->sc_bus.bdev,
1233 "blocking intrs 0x%x\n", eintrs);
1240 ohci_rhsc_able(ohci_softc_t *sc, int on)
1242 DPRINTFN(4, ("ohci_rhsc_able: on=%d\n", on));
1244 sc->sc_eintrs |= OHCI_RHSC;
1245 if (sc->sc_flags & OHCI_SCFLG_DONEINIT)
1246 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC);
1248 sc->sc_eintrs &= ~OHCI_RHSC;
1249 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_RHSC);
1254 ohci_rhsc_enable(void *v_sc)
1256 ohci_softc_t *sc = v_sc;
1259 ohci_rhsc_able(sc, 1);
1264 char *ohci_cc_strs[] = {
1268 "DATA_TOGGLE_MISMATCH",
1270 "DEVICE_NOT_RESPONDING",
1271 "PID_CHECK_FAILURE",
1285 ohci_add_done(ohci_softc_t *sc, ohci_physaddr_t done)
1287 ohci_soft_itd_t *sitd, *sidone, **ip;
1288 ohci_soft_td_t *std, *sdone, **p;
1290 /* Reverse the done list. */
1291 for (sdone = NULL, sidone = NULL; done != 0; ) {
1292 std = ohci_hash_find_td(sc, done);
1295 done = le32toh(std->td.td_nexttd);
1297 DPRINTFN(10,("add TD %p\n", std));
1300 sitd = ohci_hash_find_itd(sc, done);
1302 sitd->dnext = sidone;
1303 done = le32toh(sitd->itd.itd_nextitd);
1305 DPRINTFN(5,("add ITD %p\n", sitd));
1308 panic("ohci_add_done: addr 0x%08lx not found", (u_long)done);
1311 /* sdone & sidone now hold the done lists. */
1312 /* Put them on the already processed lists. */
1313 for (p = &sc->sc_sdone; *p != NULL; p = &(*p)->dnext)
1316 for (ip = &sc->sc_sidone; *ip != NULL; ip = &(*ip)->dnext)
1322 ohci_softintr(void *v)
1324 ohci_softc_t *sc = v;
1325 ohci_soft_itd_t *sitd, *sidone, *sitdnext;
1326 ohci_soft_td_t *std, *sdone, *stdnext, *p, *n;
1327 usbd_xfer_handle xfer;
1328 struct ohci_pipe *opipe;
1332 DPRINTFN(10,("ohci_softintr: enter\n"));
1334 sc->sc_bus.intr_context++;
1337 sdone = sc->sc_sdone;
1338 sc->sc_sdone = NULL;
1339 sidone = sc->sc_sidone;
1340 sc->sc_sidone = NULL;
1343 DPRINTFN(10,("ohci_softintr: sdone=%p sidone=%p\n", sdone, sidone));
1346 if (ohcidebug > 10) {
1347 DPRINTF(("ohci_process_done: TD done:\n"));
1348 ohci_dump_tds(sdone);
1352 for (std = sdone; std; std = stdnext) {
1354 stdnext = std->dnext;
1355 DPRINTFN(10, ("ohci_process_done: std=%p xfer=%p hcpriv=%p\n",
1356 std, xfer, (xfer ? xfer->hcpriv : NULL)));
1359 * xfer == NULL: There seems to be no xfer associated
1360 * with this TD. It is tailp that happened to end up on
1365 if (xfer->status == USBD_CANCELLED ||
1366 xfer->status == USBD_TIMEOUT) {
1367 DPRINTF(("ohci_process_done: cancel/timeout %p\n",
1369 /* Handled by abort routine. */
1374 if (std->td.td_cbp != 0)
1375 len -= le32toh(std->td.td_be) -
1376 le32toh(std->td.td_cbp) + 1;
1377 DPRINTFN(10, ("ohci_process_done: len=%d, flags=0x%x\n", len,
1379 if (std->flags & OHCI_ADD_LEN)
1380 xfer->actlen += len;
1382 cc = OHCI_TD_GET_CC(le32toh(std->td.td_flags));
1383 if (cc != OHCI_CC_NO_ERROR) {
1385 * Endpoint is halted. First unlink all the TDs
1386 * belonging to the failed transfer, and then restart
1389 opipe = (struct ohci_pipe *)xfer->pipe;
1391 DPRINTFN(15,("ohci_process_done: error cc=%d (%s)\n",
1392 OHCI_TD_GET_CC(le32toh(std->td.td_flags)),
1393 ohci_cc_strs[OHCI_TD_GET_CC(le32toh(std->td.td_flags))]));
1394 callout_stop(&xfer->timeout_handle);
1395 usb_rem_task(OXFER(xfer)->xfer.pipe->device,
1396 &OXFER(xfer)->abort_task);
1398 /* Remove all this xfer's TDs from the done queue. */
1399 for (p = std; p->dnext != NULL; p = p->dnext) {
1400 if (p->dnext->xfer != xfer)
1402 p->dnext = p->dnext->dnext;
1404 /* The next TD may have been removed. */
1405 stdnext = std->dnext;
1407 /* Remove all TDs belonging to this xfer. */
1408 for (p = xfer->hcpriv; p->xfer == xfer; p = n) {
1410 ohci_free_std(sc, p);
1414 opipe->sed->ed.ed_headp = htole32(p->physaddr);
1415 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF);
1417 if (cc == OHCI_CC_STALL)
1418 xfer->status = USBD_STALLED;
1420 xfer->status = USBD_IOERROR;
1422 usb_transfer_complete(xfer);
1427 * Skip intermediate TDs. They remain linked from
1428 * xfer->hcpriv and we free them when the transfer completes.
1430 if ((std->flags & OHCI_CALL_DONE) == 0)
1433 /* Normal transfer completion */
1434 callout_stop(&xfer->timeout_handle);
1435 usb_rem_task(OXFER(xfer)->xfer.pipe->device,
1436 &OXFER(xfer)->abort_task);
1437 for (p = xfer->hcpriv; p->xfer == xfer; p = n) {
1439 ohci_free_std(sc, p);
1441 xfer->status = USBD_NORMAL_COMPLETION;
1443 usb_transfer_complete(xfer);
1448 if (ohcidebug > 10) {
1449 DPRINTF(("ohci_softintr: ITD done:\n"));
1450 ohci_dump_itds(sidone);
1454 for (sitd = sidone; sitd != NULL; sitd = sitdnext) {
1456 sitdnext = sitd->dnext;
1457 sitd->flags |= OHCI_ITD_INTFIN;
1458 DPRINTFN(1, ("ohci_process_done: sitd=%p xfer=%p hcpriv=%p\n",
1459 sitd, xfer, xfer ? xfer->hcpriv : 0));
1462 if (xfer->status == USBD_CANCELLED ||
1463 xfer->status == USBD_TIMEOUT) {
1464 DPRINTF(("ohci_process_done: cancel/timeout %p\n",
1466 /* Handled by abort routine. */
1470 if (xfer->pipe->aborting)
1471 continue; /*Ignore.*/
1474 kprintf("ohci_softintr: sitd=%p is done\n", sitd);
1477 opipe = (struct ohci_pipe *)xfer->pipe;
1478 if (opipe->aborting)
1481 if (sitd->flags & OHCI_CALL_DONE) {
1482 ohci_soft_itd_t *next;
1484 opipe->u.iso.inuse -= xfer->nframes;
1485 xfer->status = USBD_NORMAL_COMPLETION;
1486 for (i = 0, sitd = xfer->hcpriv;;sitd = next) {
1487 next = sitd->nextitd;
1488 if (OHCI_ITD_GET_CC(sitd->itd.itd_flags) != OHCI_CC_NO_ERROR)
1489 xfer->status = USBD_IOERROR;
1491 if (xfer->status == USBD_NORMAL_COMPLETION) {
1492 iframes = OHCI_ITD_GET_FC(sitd->itd.itd_flags);
1493 for (j = 0; j < iframes; i++, j++) {
1494 len = le16toh(sitd->itd.itd_offset[j]);
1496 (OHCI_ITD_PSW_GET_CC(len) ==
1497 OHCI_CC_NOT_ACCESSED) ? 0 :
1498 OHCI_ITD_PSW_LENGTH(len);
1499 xfer->frlengths[i] = len;
1502 if (sitd->flags & OHCI_CALL_DONE)
1507 usb_transfer_complete(xfer);
1512 #ifdef USB_USE_SOFTINTR
1513 if (sc->sc_softwake) {
1514 sc->sc_softwake = 0;
1515 wakeup(&sc->sc_softwake);
1517 #endif /* USB_USE_SOFTINTR */
1519 sc->sc_bus.intr_context--;
1520 DPRINTFN(10,("ohci_softintr: done:\n"));
1524 ohci_device_ctrl_done(usbd_xfer_handle xfer)
1526 DPRINTFN(10,("ohci_device_ctrl_done: xfer=%p\n", xfer));
1529 if (!(xfer->rqflags & URQ_REQUEST)) {
1530 panic("ohci_device_ctrl_done: not a request");
1533 xfer->hcpriv = NULL;
1537 ohci_device_intr_done(usbd_xfer_handle xfer)
1539 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
1540 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus;
1541 ohci_soft_ed_t *sed = opipe->sed;
1542 ohci_soft_td_t *data, *tail;
1545 DPRINTFN(10,("ohci_device_intr_done: xfer=%p, actlen=%d\n",
1546 xfer, xfer->actlen));
1548 xfer->hcpriv = NULL;
1550 if (xfer->pipe->repeat) {
1551 data = opipe->tail.td;
1552 tail = ohci_alloc_std(sc); /* XXX should reuse TD */
1554 xfer->status = USBD_NOMEM;
1559 data->td.td_flags = htole32(
1560 OHCI_TD_IN | OHCI_TD_NOCC |
1561 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY);
1562 if (xfer->flags & USBD_SHORT_XFER_OK)
1563 data->td.td_flags |= htole32(OHCI_TD_R);
1564 data->td.td_cbp = htole32(DMAADDR(&xfer->dmabuf, 0));
1565 data->nexttd = tail;
1566 data->td.td_nexttd = htole32(tail->physaddr);
1567 data->td.td_be = htole32(le32toh(data->td.td_cbp) +
1569 data->len = xfer->length;
1571 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN;
1572 xfer->hcpriv = data;
1575 sed->ed.ed_tailp = htole32(tail->physaddr);
1576 opipe->tail.td = tail;
1581 ohci_device_bulk_done(usbd_xfer_handle xfer)
1583 DPRINTFN(10,("ohci_device_bulk_done: xfer=%p, actlen=%d\n",
1584 xfer, xfer->actlen));
1586 xfer->hcpriv = NULL;
1590 ohci_rhsc(ohci_softc_t *sc, usbd_xfer_handle xfer)
1596 hstatus = OREAD4(sc, OHCI_RH_STATUS);
1597 DPRINTF(("ohci_rhsc: sc=%p xfer=%p hstatus=0x%08x\n",
1598 sc, xfer, hstatus));
1601 /* Just ignore the change. */
1605 p = KERNADDR(&xfer->dmabuf, 0);
1606 m = min(sc->sc_noport, xfer->length * 8 - 1);
1607 memset(p, 0, xfer->length);
1608 for (i = 1; i <= m; i++) {
1609 /* Pick out CHANGE bits from the status reg. */
1610 if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16)
1611 p[i/8] |= 1 << (i%8);
1613 DPRINTF(("ohci_rhsc: change=0x%02x\n", *p));
1614 xfer->actlen = xfer->length;
1615 xfer->status = USBD_NORMAL_COMPLETION;
1617 usb_transfer_complete(xfer);
1621 ohci_root_intr_done(usbd_xfer_handle xfer)
1623 xfer->hcpriv = NULL;
1627 ohci_root_ctrl_done(usbd_xfer_handle xfer)
1629 xfer->hcpriv = NULL;
1633 * Wait here until controller claims to have an interrupt.
1634 * Then call ohci_intr and return. Use timeout to avoid waiting
1638 ohci_waitintr(ohci_softc_t *sc, usbd_xfer_handle xfer)
1640 int timo = xfer->timeout;
1644 xfer->status = USBD_IN_PROGRESS;
1645 for (usecs = timo * 1000000 / hz; usecs > 0; usecs -= 1000) {
1646 usb_delay_ms(&sc->sc_bus, 1);
1649 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS);
1650 intrs |= sc->sc_dintrs;
1651 intrs &= sc->sc_eintrs;
1652 DPRINTFN(15,("ohci_waitintr: 0x%04x\n", intrs));
1659 if (xfer->status != USBD_IN_PROGRESS)
1665 DPRINTF(("ohci_waitintr: timeout\n"));
1666 xfer->status = USBD_TIMEOUT;
1667 usb_transfer_complete(xfer);
1668 /* XXX should free TD */
1672 ohci_poll(struct usbd_bus *bus)
1674 ohci_softc_t *sc = (ohci_softc_t *)bus;
1679 new = OREAD4(sc, OHCI_INTERRUPT_STATUS);
1681 DPRINTFN(10,("ohci_poll: intrs=0x%04x\n", new));
1692 ohci_device_request(usbd_xfer_handle xfer)
1694 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
1695 usb_device_request_t *req = &xfer->request;
1696 usbd_device_handle dev = opipe->pipe.device;
1697 ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
1698 int addr = dev->address;
1699 ohci_soft_td_t *setup, *stat, *next, *tail;
1700 ohci_soft_ed_t *sed;
1705 isread = req->bmRequestType & UT_READ;
1706 len = UGETW(req->wLength);
1708 DPRINTFN(3,("ohci_device_control type=0x%02x, request=0x%02x, "
1709 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n",
1710 req->bmRequestType, req->bRequest, UGETW(req->wValue),
1711 UGETW(req->wIndex), len, addr,
1712 opipe->pipe.endpoint->edesc->bEndpointAddress));
1714 setup = opipe->tail.td;
1715 stat = ohci_alloc_std(sc);
1720 tail = ohci_alloc_std(sc);
1728 opipe->u.ctl.length = len;
1731 /* Update device address and length since they may have changed
1732 during the setup of the control pipe in usbd_new_device(). */
1733 /* XXX This only needs to be done once, but it's too early in open. */
1734 /* XXXX Should not touch ED here! */
1735 sed->ed.ed_flags = htole32(
1736 (le32toh(sed->ed.ed_flags) & ~(OHCI_ED_ADDRMASK | OHCI_ED_MAXPMASK)) |
1737 OHCI_ED_SET_FA(addr) |
1738 OHCI_ED_SET_MAXP(UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize)));
1743 /* Set up data transaction */
1745 ohci_soft_td_t *std = stat;
1747 err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer,
1749 stat = stat->nexttd; /* point at free TD */
1752 /* Start toggle at 1 and then use the carried toggle. */
1753 std->td.td_flags &= htole32(~OHCI_TD_TOGGLE_MASK);
1754 std->td.td_flags |= htole32(OHCI_TD_TOGGLE_1);
1757 memcpy(KERNADDR(&opipe->u.ctl.reqdma, 0), req, sizeof *req);
1759 setup->td.td_flags = htole32(OHCI_TD_SETUP | OHCI_TD_NOCC |
1760 OHCI_TD_TOGGLE_0 | OHCI_TD_SET_DI(6));
1761 setup->td.td_cbp = htole32(DMAADDR(&opipe->u.ctl.reqdma, 0));
1762 setup->nexttd = next;
1763 setup->td.td_nexttd = htole32(next->physaddr);
1764 setup->td.td_be = htole32(le32toh(setup->td.td_cbp) + sizeof *req - 1);
1768 xfer->hcpriv = setup;
1770 stat->td.td_flags = htole32(
1771 (isread ? OHCI_TD_OUT : OHCI_TD_IN) |
1772 OHCI_TD_NOCC | OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1));
1773 stat->td.td_cbp = 0;
1774 stat->nexttd = tail;
1775 stat->td.td_nexttd = htole32(tail->physaddr);
1777 stat->flags = OHCI_CALL_DONE;
1782 if (ohcidebug > 5) {
1783 DPRINTF(("ohci_device_request:\n"));
1785 ohci_dump_tds(setup);
1789 /* Insert ED in schedule */
1791 sed->ed.ed_tailp = htole32(tail->physaddr);
1792 opipe->tail.td = tail;
1793 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF);
1794 if (xfer->timeout && !sc->sc_bus.use_polling) {
1795 callout_reset(&xfer->timeout_handle, MS_TO_TICKS(xfer->timeout),
1796 ohci_timeout, xfer);
1801 if (ohcidebug > 20) {
1803 DPRINTF(("ohci_device_request: status=%x\n",
1804 OREAD4(sc, OHCI_COMMAND_STATUS)));
1806 kprintf("ctrl head:\n");
1807 ohci_dump_ed(sc->sc_ctrl_head);
1810 ohci_dump_tds(setup);
1814 return (USBD_NORMAL_COMPLETION);
1817 ohci_free_std(sc, tail);
1819 ohci_free_std(sc, stat);
1825 * Add an ED to the schedule. Called from a critical section.
1828 ohci_add_ed(ohci_soft_ed_t *sed, ohci_soft_ed_t *head)
1830 DPRINTFN(8,("ohci_add_ed: sed=%p head=%p\n", sed, head));
1832 sed->next = head->next;
1833 sed->ed.ed_nexted = head->ed.ed_nexted;
1835 head->ed.ed_nexted = htole32(sed->physaddr);
1839 * Remove an ED from the schedule. Called from a critical section.
1842 ohci_rem_ed(ohci_soft_ed_t *sed, ohci_soft_ed_t *head)
1848 for (p = head; p != NULL && p->next != sed; p = p->next)
1852 panic("ohci_rem_ed: ED not found");
1856 * p == NULL if ohci is detaching and there are still devices
1857 * using ohci (e.g. usb sticks are still plugged in). But
1858 * the real solution should be correcting ohci_free_sed() or
1862 p->next = sed->next;
1863 p->ed.ed_nexted = sed->ed.ed_nexted;
1869 * When a transfer is completed the TD is added to the done queue by
1870 * the host controller. This queue is the processed by software.
1871 * Unfortunately the queue contains the physical address of the TD
1872 * and we have no simple way to translate this back to a kernel address.
1873 * To make the translation possible (and fast) we use a hash table of
1874 * TDs currently in the schedule. The physical address is used as the
1878 #define HASH(a) (((a) >> 4) % OHCI_HASH_SIZE)
1880 * Called from a critical section
1883 ohci_hash_add_td(ohci_softc_t *sc, ohci_soft_td_t *std)
1885 int h = HASH(std->physaddr);
1887 LIST_INSERT_HEAD(&sc->sc_hash_tds[h], std, hnext);
1891 * Called from a critical section
1894 ohci_hash_rem_td(ohci_softc_t *sc, ohci_soft_td_t *std)
1896 LIST_REMOVE(std, hnext);
1900 ohci_hash_find_td(ohci_softc_t *sc, ohci_physaddr_t a)
1903 ohci_soft_td_t *std;
1905 /* if these are present they should be masked out at an earlier
1908 KASSERT((a&~OHCI_HEADMASK) == 0, ("%s: 0x%b has lower bits set",
1909 device_get_nameunit(sc->sc_bus.bdev),
1910 (int) a, "\20\1HALT\2TOGGLE"));
1912 for (std = LIST_FIRST(&sc->sc_hash_tds[h]);
1914 std = LIST_NEXT(std, hnext))
1915 if (std->physaddr == a)
1918 DPRINTF(("%s: ohci_hash_find_td: addr 0x%08lx not found\n",
1919 device_get_nameunit(sc->sc_bus.bdev), (u_long) a));
1924 * Called from a critical section
1927 ohci_hash_add_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd)
1929 int h = HASH(sitd->physaddr);
1931 DPRINTFN(10,("ohci_hash_add_itd: sitd=%p physaddr=0x%08lx\n",
1932 sitd, (u_long)sitd->physaddr));
1934 LIST_INSERT_HEAD(&sc->sc_hash_itds[h], sitd, hnext);
1938 * Called from a critical section
1941 ohci_hash_rem_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd)
1943 DPRINTFN(10,("ohci_hash_rem_itd: sitd=%p physaddr=0x%08lx\n",
1944 sitd, (u_long)sitd->physaddr));
1946 LIST_REMOVE(sitd, hnext);
1950 ohci_hash_find_itd(ohci_softc_t *sc, ohci_physaddr_t a)
1953 ohci_soft_itd_t *sitd;
1955 for (sitd = LIST_FIRST(&sc->sc_hash_itds[h]);
1957 sitd = LIST_NEXT(sitd, hnext))
1958 if (sitd->physaddr == a)
1964 ohci_timeout(void *addr)
1966 struct ohci_xfer *oxfer = addr;
1967 struct ohci_pipe *opipe = (struct ohci_pipe *)oxfer->xfer.pipe;
1968 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus;
1970 DPRINTF(("ohci_timeout: oxfer=%p\n", oxfer));
1973 ohci_abort_xfer(&oxfer->xfer, USBD_TIMEOUT);
1977 /* Execute the abort in a process context. */
1978 usb_add_task(oxfer->xfer.pipe->device, &oxfer->abort_task,
1983 ohci_timeout_task(void *addr)
1985 usbd_xfer_handle xfer = addr;
1987 DPRINTF(("ohci_timeout_task: xfer=%p\n", xfer));
1990 ohci_abort_xfer(xfer, USBD_TIMEOUT);
1996 ohci_dump_tds(ohci_soft_td_t *std)
1998 for (; std; std = std->nexttd)
2003 ohci_dump_td(ohci_soft_td_t *std)
2007 bitmask_snprintf((u_int32_t)le32toh(std->td.td_flags),
2008 "\20\23R\24OUT\25IN\31TOG1\32SETTOGGLE",
2009 sbuf, sizeof(sbuf));
2011 kprintf("TD(%p) at %08lx: %s delay=%d ec=%d cc=%d\ncbp=0x%08lx "
2012 "nexttd=0x%08lx be=0x%08lx\n",
2013 std, (u_long)std->physaddr, sbuf,
2014 OHCI_TD_GET_DI(le32toh(std->td.td_flags)),
2015 OHCI_TD_GET_EC(le32toh(std->td.td_flags)),
2016 OHCI_TD_GET_CC(le32toh(std->td.td_flags)),
2017 (u_long)le32toh(std->td.td_cbp),
2018 (u_long)le32toh(std->td.td_nexttd),
2019 (u_long)le32toh(std->td.td_be));
2023 ohci_dump_itd(ohci_soft_itd_t *sitd)
2027 kprintf("ITD(%p) at %08lx: sf=%d di=%d fc=%d cc=%d\n"
2028 "bp0=0x%08lx next=0x%08lx be=0x%08lx\n",
2029 sitd, (u_long)sitd->physaddr,
2030 OHCI_ITD_GET_SF(le32toh(sitd->itd.itd_flags)),
2031 OHCI_ITD_GET_DI(le32toh(sitd->itd.itd_flags)),
2032 OHCI_ITD_GET_FC(le32toh(sitd->itd.itd_flags)),
2033 OHCI_ITD_GET_CC(le32toh(sitd->itd.itd_flags)),
2034 (u_long)le32toh(sitd->itd.itd_bp0),
2035 (u_long)le32toh(sitd->itd.itd_nextitd),
2036 (u_long)le32toh(sitd->itd.itd_be));
2037 for (i = 0; i < OHCI_ITD_NOFFSET; i++)
2038 kprintf("offs[%d]=0x%04x ", i,
2039 (u_int)le16toh(sitd->itd.itd_offset[i]));
2044 ohci_dump_itds(ohci_soft_itd_t *sitd)
2046 for (; sitd; sitd = sitd->nextitd)
2047 ohci_dump_itd(sitd);
2051 ohci_dump_ed(ohci_soft_ed_t *sed)
2053 char sbuf[128], sbuf2[128];
2055 bitmask_snprintf((u_int32_t)le32toh(sed->ed.ed_flags),
2056 "\20\14OUT\15IN\16LOWSPEED\17SKIP\20ISO",
2057 sbuf, sizeof(sbuf));
2058 bitmask_snprintf((u_int32_t)le32toh(sed->ed.ed_headp),
2059 "\20\1HALT\2CARRY", sbuf2, sizeof(sbuf2));
2061 kprintf("ED(%p) at 0x%08lx: addr=%d endpt=%d maxp=%d flags=%s\ntailp=0x%08lx "
2062 "headflags=%s headp=0x%08lx nexted=0x%08lx\n",
2063 sed, (u_long)sed->physaddr,
2064 OHCI_ED_GET_FA(le32toh(sed->ed.ed_flags)),
2065 OHCI_ED_GET_EN(le32toh(sed->ed.ed_flags)),
2066 OHCI_ED_GET_MAXP(le32toh(sed->ed.ed_flags)), sbuf,
2067 (u_long)le32toh(sed->ed.ed_tailp), sbuf2,
2068 (u_long)le32toh(sed->ed.ed_headp),
2069 (u_long)le32toh(sed->ed.ed_nexted));
2074 ohci_open(usbd_pipe_handle pipe)
2076 usbd_device_handle dev = pipe->device;
2077 ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
2078 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc;
2079 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
2080 u_int8_t addr = dev->address;
2081 u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE;
2082 ohci_soft_ed_t *sed;
2083 ohci_soft_td_t *std;
2084 ohci_soft_itd_t *sitd;
2085 ohci_physaddr_t tdphys;
2090 DPRINTFN(1, ("ohci_open: pipe=%p, addr=%d, endpt=%d (%d)\n",
2091 pipe, addr, ed->bEndpointAddress, sc->sc_addr));
2094 return (USBD_IOERROR);
2099 if (addr == sc->sc_addr) {
2100 switch (ed->bEndpointAddress) {
2101 case USB_CONTROL_ENDPOINT:
2102 pipe->methods = &ohci_root_ctrl_methods;
2104 case UE_DIR_IN | OHCI_INTR_ENDPT:
2105 pipe->methods = &ohci_root_intr_methods;
2108 return (USBD_INVAL);
2111 sed = ohci_alloc_sed(sc);
2115 if (xfertype == UE_ISOCHRONOUS) {
2116 sitd = ohci_alloc_sitd(sc);
2119 opipe->tail.itd = sitd;
2120 opipe->aborting = 0;
2121 tdphys = sitd->physaddr;
2122 fmt = OHCI_ED_FORMAT_ISO;
2123 if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN)
2124 fmt |= OHCI_ED_DIR_IN;
2126 fmt |= OHCI_ED_DIR_OUT;
2128 std = ohci_alloc_std(sc);
2131 opipe->tail.td = std;
2132 tdphys = std->physaddr;
2133 fmt = OHCI_ED_FORMAT_GEN | OHCI_ED_DIR_TD;
2135 sed->ed.ed_flags = htole32(
2136 OHCI_ED_SET_FA(addr) |
2137 OHCI_ED_SET_EN(UE_GET_ADDR(ed->bEndpointAddress)) |
2138 (dev->speed == USB_SPEED_LOW ? OHCI_ED_SPEED : 0) |
2140 OHCI_ED_SET_MAXP(UGETW(ed->wMaxPacketSize)));
2141 sed->ed.ed_headp = htole32(tdphys |
2142 (pipe->endpoint->savedtoggle ? OHCI_TOGGLECARRY : 0));
2143 sed->ed.ed_tailp = htole32(tdphys);
2147 pipe->methods = &ohci_device_ctrl_methods;
2148 err = usb_allocmem(&sc->sc_bus,
2149 sizeof(usb_device_request_t),
2150 0, &opipe->u.ctl.reqdma);
2154 ohci_add_ed(sed, sc->sc_ctrl_head);
2158 pipe->methods = &ohci_device_intr_methods;
2159 ival = pipe->interval;
2160 if (ival == USBD_DEFAULT_INTERVAL)
2161 ival = ed->bInterval;
2162 return (ohci_device_setintr(sc, opipe, ival));
2163 case UE_ISOCHRONOUS:
2164 pipe->methods = &ohci_device_isoc_methods;
2165 return (ohci_setup_isoc(pipe));
2167 pipe->methods = &ohci_device_bulk_methods;
2169 ohci_add_ed(sed, sc->sc_bulk_head);
2174 return (USBD_NORMAL_COMPLETION);
2178 ohci_free_std(sc, std);
2181 ohci_free_sed(sc, sed);
2185 return (USBD_NOMEM);
2190 * Close a reqular pipe.
2191 * Assumes that there are no pending transactions.
2194 ohci_close_pipe(usbd_pipe_handle pipe, ohci_soft_ed_t *head)
2196 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
2197 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
2198 ohci_soft_ed_t *sed = opipe->sed;
2202 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP);
2203 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) !=
2204 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK)) {
2205 ohci_soft_td_t *std;
2206 std = ohci_hash_find_td(sc, le32toh(sed->ed.ed_headp));
2207 kprintf("ohci_close_pipe: pipe not empty sed=%p hd=0x%x "
2208 "tl=0x%x pipe=%p, std=%p\n", sed,
2209 (int)le32toh(sed->ed.ed_headp),
2210 (int)le32toh(sed->ed.ed_tailp),
2213 usbd_dump_pipe(&opipe->pipe);
2220 usb_delay_ms(&sc->sc_bus, 2);
2221 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) !=
2222 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK))
2223 kprintf("ohci_close_pipe: pipe still not empty\n");
2226 ohci_rem_ed(sed, head);
2227 /* Make sure the host controller is not touching this ED */
2228 usb_delay_ms(&sc->sc_bus, 1);
2230 pipe->endpoint->savedtoggle =
2231 (le32toh(sed->ed.ed_headp) & OHCI_TOGGLECARRY) ? 1 : 0;
2232 ohci_free_sed(sc, opipe->sed);
2237 * Abort a device request.
2238 * If this routine is called from a critical section it guarantees that
2239 * the request will be removed from the hardware scheduling and that
2240 * the callback for it will be called with USBD_CANCELLED status.
2241 * It's impossible to guarantee that the requested transfer will not
2242 * have happened since the hardware runs concurrently.
2243 * If the transaction has already happened we rely on the ordinary
2244 * interrupt processing to process it.
2247 ohci_abort_xfer(usbd_xfer_handle xfer, usbd_status status)
2249 struct ohci_xfer *oxfer = OXFER(xfer);
2250 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
2251 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus;
2252 ohci_soft_ed_t *sed = opipe->sed;
2253 ohci_soft_td_t *p, *n;
2254 ohci_physaddr_t headp;
2257 DPRINTF(("ohci_abort_xfer: xfer=%p pipe=%p sed=%p\n", xfer, opipe,sed));
2260 /* If we're dying, just do the software part. */
2262 xfer->status = status; /* make software ignore it */
2263 callout_stop(&xfer->timeout_handle);
2264 usb_rem_task(xfer->pipe->device, &OXFER(xfer)->abort_task);
2265 usb_transfer_complete(xfer);
2271 if (xfer->device->bus->intr_context /* || !curproc REMOVED DFly */)
2272 panic("ohci_abort_xfer: not in process context");
2276 * If an abort is already in progress then just wait for it to
2277 * complete and return.
2279 if (oxfer->ohci_xfer_flags & OHCI_XFER_ABORTING) {
2280 DPRINTFN(2, ("ohci_abort_xfer: already aborting\n"));
2281 /* No need to wait if we're aborting from a timeout. */
2282 if (status == USBD_TIMEOUT)
2284 /* Override the status which might be USBD_TIMEOUT. */
2285 xfer->status = status;
2286 DPRINTFN(2, ("ohci_abort_xfer: waiting for abort to finish\n"));
2287 oxfer->ohci_xfer_flags |= OHCI_XFER_ABORTWAIT;
2288 while (oxfer->ohci_xfer_flags & OHCI_XFER_ABORTING)
2289 tsleep(&oxfer->ohci_xfer_flags, 0, "ohciaw", 0);
2294 * Step 1: Make interrupt routine and hardware ignore xfer.
2297 oxfer->ohci_xfer_flags |= OHCI_XFER_ABORTING;
2298 xfer->status = status; /* make software ignore it */
2299 callout_stop(&xfer->timeout_handle);
2300 usb_rem_task(xfer->pipe->device, &OXFER(xfer)->abort_task);
2302 DPRINTFN(1,("ohci_abort_xfer: stop ed=%p\n", sed));
2303 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); /* force hardware skip */
2306 * Step 2: Wait until we know hardware has finished any possible
2307 * use of the xfer. Also make sure the soft interrupt routine
2310 usb_delay_ms(opipe->pipe.device->bus, 20); /* Hardware finishes in 1ms */
2312 #ifdef USB_USE_SOFTINTR
2313 sc->sc_softwake = 1;
2314 #endif /* USB_USE_SOFTINTR */
2315 usb_schedsoftintr(&sc->sc_bus);
2316 #ifdef USB_USE_SOFTINTR
2317 tsleep(&sc->sc_softwake, 0, "ohciab", 0);
2318 #endif /* USB_USE_SOFTINTR */
2321 * Step 3: Remove any vestiges of the xfer from the hardware.
2322 * The complication here is that the hardware may have executed
2323 * beyond the xfer we're trying to abort. So as we're scanning
2324 * the TDs of this xfer we check if the hardware points to
2330 oxfer->ohci_xfer_flags &= ~OHCI_XFER_ABORTING; /* XXX */
2332 kprintf("ohci_abort_xfer: hcpriv is NULL\n");
2337 if (ohcidebug > 1) {
2338 DPRINTF(("ohci_abort_xfer: sed=\n"));
2343 headp = le32toh(sed->ed.ed_headp) & OHCI_HEADMASK;
2345 for (; p->xfer == xfer; p = n) {
2346 hit |= headp == p->physaddr;
2348 ohci_free_std(sc, p);
2350 /* Zap headp register if hardware pointed inside the xfer. */
2352 DPRINTFN(1,("ohci_abort_xfer: set hd=0x08%x, tl=0x%08x\n",
2353 (int)p->physaddr, (int)le32toh(sed->ed.ed_tailp)));
2354 sed->ed.ed_headp = htole32(p->physaddr); /* unlink TDs */
2356 DPRINTFN(1,("ohci_abort_xfer: no hit\n"));
2360 * Step 4: Turn on hardware again.
2362 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); /* remove hardware skip */
2365 * Step 5: Execute callback.
2367 /* Do the wakeup first to avoid touching the xfer after the callback. */
2368 oxfer->ohci_xfer_flags &= ~OHCI_XFER_ABORTING;
2369 if (oxfer->ohci_xfer_flags & OHCI_XFER_ABORTWAIT) {
2370 oxfer->ohci_xfer_flags &= ~OHCI_XFER_ABORTWAIT;
2371 wakeup(&oxfer->ohci_xfer_flags);
2373 usb_transfer_complete(xfer);
2379 * Data structures and routines to emulate the root hub.
2381 static usb_device_descriptor_t ohci_devd = {
2382 USB_DEVICE_DESCRIPTOR_SIZE,
2383 UDESC_DEVICE, /* type */
2384 {0x00, 0x01}, /* USB version */
2385 UDCLASS_HUB, /* class */
2386 UDSUBCLASS_HUB, /* subclass */
2387 UDPROTO_FSHUB, /* protocol */
2388 64, /* max packet */
2389 {0},{0},{0x00,0x01}, /* device id */
2390 1,2,0, /* string indicies */
2391 1 /* # of configurations */
2394 static usb_config_descriptor_t ohci_confd = {
2395 USB_CONFIG_DESCRIPTOR_SIZE,
2397 {USB_CONFIG_DESCRIPTOR_SIZE +
2398 USB_INTERFACE_DESCRIPTOR_SIZE +
2399 USB_ENDPOINT_DESCRIPTOR_SIZE},
2407 static usb_interface_descriptor_t ohci_ifcd = {
2408 USB_INTERFACE_DESCRIPTOR_SIZE,
2419 static usb_endpoint_descriptor_t ohci_endpd = {
2420 USB_ENDPOINT_DESCRIPTOR_SIZE,
2422 UE_DIR_IN | OHCI_INTR_ENDPT,
2424 {8, 0}, /* max packet */
2428 static usb_hub_descriptor_t ohci_hubd = {
2429 USB_HUB_DESCRIPTOR_SIZE,
2439 ohci_str(usb_string_descriptor_t *p, int l, const char *s)
2445 p->bLength = 2 * strlen(s) + 2;
2448 p->bDescriptorType = UDESC_STRING;
2450 for (i = 0; s[i] && l > 1; i++, l -= 2)
2451 USETW2(p->bString[i], 0, s[i]);
2456 * Simulate a hardware hub by handling all the necessary requests.
2459 ohci_root_ctrl_transfer(usbd_xfer_handle xfer)
2463 /* Insert last in queue. */
2464 err = usb_insert_transfer(xfer);
2468 /* Pipe isn't running, start first */
2469 return (ohci_root_ctrl_start(STAILQ_FIRST(&xfer->pipe->queue)));
2473 ohci_root_ctrl_start(usbd_xfer_handle xfer)
2475 ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus;
2476 usb_device_request_t *req;
2479 int len, value, index, l, totlen = 0;
2480 usb_port_status_t ps;
2481 usb_hub_descriptor_t hubd;
2486 return (USBD_IOERROR);
2489 if (!(xfer->rqflags & URQ_REQUEST))
2491 return (USBD_INVAL);
2493 req = &xfer->request;
2495 DPRINTFN(4,("ohci_root_ctrl_control type=0x%02x request=%02x\n",
2496 req->bmRequestType, req->bRequest));
2498 len = UGETW(req->wLength);
2499 value = UGETW(req->wValue);
2500 index = UGETW(req->wIndex);
2503 buf = KERNADDR(&xfer->dmabuf, 0);
2505 #define C(x,y) ((x) | ((y) << 8))
2506 switch(C(req->bRequest, req->bmRequestType)) {
2507 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE):
2508 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE):
2509 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT):
2511 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops
2512 * for the integrated root hub.
2515 case C(UR_GET_CONFIG, UT_READ_DEVICE):
2517 *(u_int8_t *)buf = sc->sc_conf;
2521 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE):
2522 DPRINTFN(8,("ohci_root_ctrl_control wValue=0x%04x\n", value));
2523 switch(value >> 8) {
2525 if ((value & 0xff) != 0) {
2529 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE);
2530 USETW(ohci_devd.idVendor, sc->sc_id_vendor);
2531 memcpy(buf, &ohci_devd, l);
2534 if ((value & 0xff) != 0) {
2538 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE);
2539 memcpy(buf, &ohci_confd, l);
2540 buf = (char *)buf + l;
2542 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE);
2544 memcpy(buf, &ohci_ifcd, l);
2545 buf = (char *)buf + l;
2547 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE);
2549 memcpy(buf, &ohci_endpd, l);
2554 *(u_int8_t *)buf = 0;
2556 switch (value & 0xff) {
2557 case 1: /* Vendor */
2558 totlen = ohci_str(buf, len, sc->sc_vendor);
2560 case 2: /* Product */
2561 totlen = ohci_str(buf, len, "OHCI root hub");
2570 case C(UR_GET_INTERFACE, UT_READ_INTERFACE):
2572 *(u_int8_t *)buf = 0;
2576 case C(UR_GET_STATUS, UT_READ_DEVICE):
2578 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED);
2582 case C(UR_GET_STATUS, UT_READ_INTERFACE):
2583 case C(UR_GET_STATUS, UT_READ_ENDPOINT):
2585 USETW(((usb_status_t *)buf)->wStatus, 0);
2589 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE):
2590 if (value >= USB_MAX_DEVICES) {
2594 sc->sc_addr = value;
2596 case C(UR_SET_CONFIG, UT_WRITE_DEVICE):
2597 if (value != 0 && value != 1) {
2601 sc->sc_conf = value;
2603 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE):
2605 case C(UR_SET_FEATURE, UT_WRITE_DEVICE):
2606 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE):
2607 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT):
2610 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE):
2612 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT):
2615 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE):
2617 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER):
2618 DPRINTFN(8, ("ohci_root_ctrl_control: UR_CLEAR_PORT_FEATURE "
2619 "port=%d feature=%d\n",
2621 if (index < 1 || index > sc->sc_noport) {
2625 port = OHCI_RH_PORT_STATUS(index);
2627 case UHF_PORT_ENABLE:
2628 OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS);
2630 case UHF_PORT_SUSPEND:
2631 OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR);
2633 case UHF_PORT_POWER:
2634 /* Yes, writing to the LOW_SPEED bit clears power. */
2635 OWRITE4(sc, port, UPS_LOW_SPEED);
2637 case UHF_C_PORT_CONNECTION:
2638 OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16);
2640 case UHF_C_PORT_ENABLE:
2641 OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16);
2643 case UHF_C_PORT_SUSPEND:
2644 OWRITE4(sc, port, UPS_C_SUSPEND << 16);
2646 case UHF_C_PORT_OVER_CURRENT:
2647 OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16);
2649 case UHF_C_PORT_RESET:
2650 OWRITE4(sc, port, UPS_C_PORT_RESET << 16);
2657 case UHF_C_PORT_CONNECTION:
2658 case UHF_C_PORT_ENABLE:
2659 case UHF_C_PORT_SUSPEND:
2660 case UHF_C_PORT_OVER_CURRENT:
2661 case UHF_C_PORT_RESET:
2662 /* Enable RHSC interrupt if condition is cleared. */
2663 if ((OREAD4(sc, port) >> 16) == 0)
2664 ohci_rhsc_able(sc, 1);
2670 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE):
2671 if ((value & 0xff) != 0) {
2675 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A);
2677 hubd.bNbrPorts = sc->sc_noport;
2678 USETW(hubd.wHubCharacteristics,
2679 (v & OHCI_NPS ? UHD_PWR_NO_SWITCH :
2680 v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL)
2681 /* XXX overcurrent */
2683 hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v);
2684 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B);
2685 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8)
2686 hubd.DeviceRemovable[i++] = (u_int8_t)v;
2687 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i;
2688 l = min(len, hubd.bDescLength);
2690 memcpy(buf, &hubd, l);
2692 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE):
2697 memset(buf, 0, len); /* ? XXX */
2700 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER):
2701 DPRINTFN(8,("ohci_root_ctrl_transfer: get port status i=%d\n",
2703 if (index < 1 || index > sc->sc_noport) {
2711 v = OREAD4(sc, OHCI_RH_PORT_STATUS(index));
2712 DPRINTFN(8,("ohci_root_ctrl_transfer: port status=0x%04x\n",
2714 USETW(ps.wPortStatus, v);
2715 USETW(ps.wPortChange, v >> 16);
2716 l = min(len, sizeof ps);
2717 memcpy(buf, &ps, l);
2720 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE):
2723 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE):
2725 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER):
2726 if (index < 1 || index > sc->sc_noport) {
2730 port = OHCI_RH_PORT_STATUS(index);
2732 case UHF_PORT_ENABLE:
2733 OWRITE4(sc, port, UPS_PORT_ENABLED);
2735 case UHF_PORT_SUSPEND:
2736 OWRITE4(sc, port, UPS_SUSPEND);
2738 case UHF_PORT_RESET:
2739 DPRINTFN(5,("ohci_root_ctrl_transfer: reset port %d\n",
2741 OWRITE4(sc, port, UPS_RESET);
2742 for (i = 0; i < 5; i++) {
2743 usb_delay_ms(&sc->sc_bus,
2744 USB_PORT_ROOT_RESET_DELAY);
2749 if ((OREAD4(sc, port) & UPS_RESET) == 0)
2752 DPRINTFN(8,("ohci port %d reset, status = 0x%04x\n",
2753 index, OREAD4(sc, port)));
2755 case UHF_PORT_POWER:
2756 DPRINTFN(2,("ohci_root_ctrl_transfer: set port power "
2758 OWRITE4(sc, port, UPS_PORT_POWER);
2769 xfer->actlen = totlen;
2770 err = USBD_NORMAL_COMPLETION;
2774 usb_transfer_complete(xfer);
2776 return (USBD_IN_PROGRESS);
2779 /* Abort a root control request. */
2781 ohci_root_ctrl_abort(usbd_xfer_handle xfer)
2783 /* Nothing to do, all transfers are synchronous. */
2786 /* Close the root pipe. */
2788 ohci_root_ctrl_close(usbd_pipe_handle pipe)
2790 DPRINTF(("ohci_root_ctrl_close\n"));
2791 /* Nothing to do. */
2795 ohci_root_intr_transfer(usbd_xfer_handle xfer)
2799 /* Insert last in queue. */
2800 err = usb_insert_transfer(xfer);
2804 /* Pipe isn't running, start first */
2805 return (ohci_root_intr_start(STAILQ_FIRST(&xfer->pipe->queue)));
2809 ohci_root_intr_start(usbd_xfer_handle xfer)
2811 usbd_pipe_handle pipe = xfer->pipe;
2812 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
2815 return (USBD_IOERROR);
2817 sc->sc_intrxfer = xfer;
2819 return (USBD_IN_PROGRESS);
2822 /* Abort a root interrupt request. */
2824 ohci_root_intr_abort(usbd_xfer_handle xfer)
2826 if (xfer->pipe->intrxfer == xfer) {
2827 DPRINTF(("ohci_root_intr_abort: remove\n"));
2828 xfer->pipe->intrxfer = NULL;
2830 xfer->status = USBD_CANCELLED;
2832 usb_transfer_complete(xfer);
2836 /* Close the root pipe. */
2838 ohci_root_intr_close(usbd_pipe_handle pipe)
2840 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
2842 DPRINTF(("ohci_root_intr_close\n"));
2844 sc->sc_intrxfer = NULL;
2847 /************************/
2850 ohci_device_ctrl_transfer(usbd_xfer_handle xfer)
2854 /* Insert last in queue. */
2855 err = usb_insert_transfer(xfer);
2859 /* Pipe isn't running, start first */
2860 return (ohci_device_ctrl_start(STAILQ_FIRST(&xfer->pipe->queue)));
2864 ohci_device_ctrl_start(usbd_xfer_handle xfer)
2866 ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus;
2870 return (USBD_IOERROR);
2873 if (!(xfer->rqflags & URQ_REQUEST)) {
2875 kprintf("ohci_device_ctrl_transfer: not a request\n");
2876 return (USBD_INVAL);
2880 err = ohci_device_request(xfer);
2884 if (sc->sc_bus.use_polling)
2885 ohci_waitintr(sc, xfer);
2886 return (USBD_IN_PROGRESS);
2889 /* Abort a device control request. */
2891 ohci_device_ctrl_abort(usbd_xfer_handle xfer)
2893 DPRINTF(("ohci_device_ctrl_abort: xfer=%p\n", xfer));
2894 ohci_abort_xfer(xfer, USBD_CANCELLED);
2897 /* Close a device control pipe. */
2899 ohci_device_ctrl_close(usbd_pipe_handle pipe)
2901 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
2902 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
2904 DPRINTF(("ohci_device_ctrl_close: pipe=%p\n", pipe));
2905 ohci_close_pipe(pipe, sc->sc_ctrl_head);
2906 ohci_free_std(sc, opipe->tail.td);
2909 /************************/
2912 ohci_device_clear_toggle(usbd_pipe_handle pipe)
2914 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
2916 opipe->sed->ed.ed_headp &= htole32(~OHCI_TOGGLECARRY);
2920 ohci_noop(usbd_pipe_handle pipe)
2925 ohci_device_bulk_transfer(usbd_xfer_handle xfer)
2929 /* Insert last in queue. */
2930 err = usb_insert_transfer(xfer);
2934 /* Pipe isn't running, start first */
2935 return (ohci_device_bulk_start(STAILQ_FIRST(&xfer->pipe->queue)));
2939 ohci_device_bulk_start(usbd_xfer_handle xfer)
2941 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
2942 usbd_device_handle dev = opipe->pipe.device;
2943 ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
2944 int addr = dev->address;
2945 ohci_soft_td_t *data, *tail, *tdp;
2946 ohci_soft_ed_t *sed;
2947 int len, isread, endpt;
2951 return (USBD_IOERROR);
2954 if (xfer->rqflags & URQ_REQUEST) {
2956 kprintf("ohci_device_bulk_start: a request\n");
2957 return (USBD_INVAL);
2962 endpt = xfer->pipe->endpoint->edesc->bEndpointAddress;
2963 isread = UE_GET_DIR(endpt) == UE_DIR_IN;
2966 DPRINTFN(4,("ohci_device_bulk_start: xfer=%p len=%d isread=%d "
2967 "flags=%d endpt=%d\n", xfer, len, isread, xfer->flags,
2970 opipe->u.bulk.isread = isread;
2971 opipe->u.bulk.length = len;
2973 /* Update device address */
2974 sed->ed.ed_flags = htole32(
2975 (le32toh(sed->ed.ed_flags) & ~OHCI_ED_ADDRMASK) |
2976 OHCI_ED_SET_FA(addr));
2978 /* Allocate a chain of new TDs (including a new tail). */
2979 data = opipe->tail.td;
2980 err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer,
2982 /* We want interrupt at the end of the transfer. */
2983 tail->td.td_flags &= htole32(~OHCI_TD_INTR_MASK);
2984 tail->td.td_flags |= htole32(OHCI_TD_SET_DI(1));
2985 tail->flags |= OHCI_CALL_DONE;
2986 tail = tail->nexttd; /* point at sentinel */
2991 xfer->hcpriv = data;
2993 DPRINTFN(4,("ohci_device_bulk_start: ed_flags=0x%08x td_flags=0x%08x "
2994 "td_cbp=0x%08x td_be=0x%08x\n",
2995 (int)le32toh(sed->ed.ed_flags),
2996 (int)le32toh(data->td.td_flags),
2997 (int)le32toh(data->td.td_cbp),
2998 (int)le32toh(data->td.td_be)));
3001 if (ohcidebug > 5) {
3003 ohci_dump_tds(data);
3007 /* Insert ED in schedule */
3009 for (tdp = data; tdp != tail; tdp = tdp->nexttd) {
3012 sed->ed.ed_tailp = htole32(tail->physaddr);
3013 opipe->tail.td = tail;
3014 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP);
3015 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF);
3016 if (xfer->timeout && !sc->sc_bus.use_polling) {
3017 callout_reset(&xfer->timeout_handle, MS_TO_TICKS(xfer->timeout),
3018 ohci_timeout, xfer);
3022 /* This goes wrong if we are too slow. */
3023 if (ohcidebug > 10) {
3025 DPRINTF(("ohci_device_intr_transfer: status=%x\n",
3026 OREAD4(sc, OHCI_COMMAND_STATUS)));
3028 ohci_dump_tds(data);
3034 if (sc->sc_bus.use_polling)
3035 ohci_waitintr(sc, xfer);
3037 return (USBD_IN_PROGRESS);
3041 ohci_device_bulk_abort(usbd_xfer_handle xfer)
3043 DPRINTF(("ohci_device_bulk_abort: xfer=%p\n", xfer));
3044 ohci_abort_xfer(xfer, USBD_CANCELLED);
3048 * Close a device bulk pipe.
3051 ohci_device_bulk_close(usbd_pipe_handle pipe)
3053 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
3054 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
3056 DPRINTF(("ohci_device_bulk_close: pipe=%p\n", pipe));
3057 ohci_close_pipe(pipe, sc->sc_bulk_head);
3058 ohci_free_std(sc, opipe->tail.td);
3061 /************************/
3064 ohci_device_intr_transfer(usbd_xfer_handle xfer)
3068 /* Insert last in queue. */
3069 err = usb_insert_transfer(xfer);
3073 /* Pipe isn't running, start first */
3074 return (ohci_device_intr_start(STAILQ_FIRST(&xfer->pipe->queue)));
3078 ohci_device_intr_start(usbd_xfer_handle xfer)
3080 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
3081 usbd_device_handle dev = opipe->pipe.device;
3082 ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
3083 ohci_soft_ed_t *sed = opipe->sed;
3084 ohci_soft_td_t *data, *tail;
3088 return (USBD_IOERROR);
3090 DPRINTFN(3, ("ohci_device_intr_transfer: xfer=%p len=%d "
3091 "flags=%d priv=%p\n",
3092 xfer, xfer->length, xfer->flags, xfer->priv));
3095 if (xfer->rqflags & URQ_REQUEST)
3096 panic("ohci_device_intr_transfer: a request");
3101 data = opipe->tail.td;
3102 tail = ohci_alloc_std(sc);
3104 return (USBD_NOMEM);
3107 data->td.td_flags = htole32(
3108 OHCI_TD_IN | OHCI_TD_NOCC |
3109 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY);
3110 if (xfer->flags & USBD_SHORT_XFER_OK)
3111 data->td.td_flags |= htole32(OHCI_TD_R);
3112 data->td.td_cbp = htole32(DMAADDR(&xfer->dmabuf, 0));
3113 data->nexttd = tail;
3114 data->td.td_nexttd = htole32(tail->physaddr);
3115 data->td.td_be = htole32(le32toh(data->td.td_cbp) + len - 1);
3118 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN;
3119 xfer->hcpriv = data;
3122 if (ohcidebug > 5) {
3123 DPRINTF(("ohci_device_intr_transfer:\n"));
3125 ohci_dump_tds(data);
3129 /* Insert ED in schedule */
3131 sed->ed.ed_tailp = htole32(tail->physaddr);
3132 opipe->tail.td = tail;
3133 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP);
3137 * This goes horribly wrong, printing thousands of descriptors,
3138 * because false references are followed due to the fact that the
3141 if (ohcidebug > 5) {
3142 usb_delay_ms(&sc->sc_bus, 5);
3143 DPRINTF(("ohci_device_intr_transfer: status=%x\n",
3144 OREAD4(sc, OHCI_COMMAND_STATUS)));
3146 ohci_dump_tds(data);
3151 return (USBD_IN_PROGRESS);
3154 /* Abort a device control request. */
3156 ohci_device_intr_abort(usbd_xfer_handle xfer)
3158 if (xfer->pipe->intrxfer == xfer) {
3159 DPRINTF(("ohci_device_intr_abort: remove\n"));
3160 xfer->pipe->intrxfer = NULL;
3162 ohci_abort_xfer(xfer, USBD_CANCELLED);
3165 /* Close a device interrupt pipe. */
3167 ohci_device_intr_close(usbd_pipe_handle pipe)
3169 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
3170 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
3171 int nslots = opipe->u.intr.nslots;
3172 int pos = opipe->u.intr.pos;
3174 ohci_soft_ed_t *p, *sed = opipe->sed;
3176 DPRINTFN(1,("ohci_device_intr_close: pipe=%p nslots=%d pos=%d\n",
3177 pipe, nslots, pos));
3179 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP);
3180 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) !=
3181 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK))
3182 usb_delay_ms(&sc->sc_bus, 2);
3184 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) !=
3185 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK))
3186 panic("%s: Intr pipe %p still has TDs queued",
3187 device_get_nameunit(sc->sc_bus.bdev), pipe);
3190 for (p = sc->sc_eds[pos]; p && p->next != sed; p = p->next)
3194 panic("ohci_device_intr_close: ED not found");
3196 p->next = sed->next;
3197 p->ed.ed_nexted = sed->ed.ed_nexted;
3200 for (j = 0; j < nslots; j++)
3201 --sc->sc_bws[(pos * nslots + j) % OHCI_NO_INTRS];
3203 ohci_free_std(sc, opipe->tail.td);
3204 opipe->tail.td = NULL;
3205 ohci_free_sed(sc, opipe->sed);
3210 ohci_device_setintr(ohci_softc_t *sc, struct ohci_pipe *opipe, int ival)
3213 u_int npoll, slow, shigh, nslots;
3215 ohci_soft_ed_t *hsed, *sed = opipe->sed;
3217 DPRINTFN(2, ("ohci_setintr: pipe=%p\n", opipe));
3219 kprintf("ohci_setintr: 0 interval\n");
3220 return (USBD_INVAL);
3223 npoll = OHCI_NO_INTRS;
3224 while (npoll > ival)
3226 DPRINTFN(2, ("ohci_setintr: ival=%d npoll=%d\n", ival, npoll));
3229 * We now know which level in the tree the ED must go into.
3230 * Figure out which slot has most bandwidth left over.
3236 * 8 7 8 9 10 11 12 13 14
3237 * N (N-1) .. (N-1+N-1)
3240 shigh = slow + npoll;
3241 nslots = OHCI_NO_INTRS / npoll;
3242 for (best = i = slow, bestbw = ~0; i < shigh; i++) {
3244 for (j = 0; j < nslots; j++)
3245 bw += sc->sc_bws[(i * nslots + j) % OHCI_NO_INTRS];
3251 DPRINTFN(2, ("ohci_setintr: best=%d(%d..%d) bestbw=%d\n",
3252 best, slow, shigh, bestbw));
3255 hsed = sc->sc_eds[best];
3256 sed->next = hsed->next;
3257 sed->ed.ed_nexted = hsed->ed.ed_nexted;
3259 hsed->ed.ed_nexted = htole32(sed->physaddr);
3262 for (j = 0; j < nslots; j++)
3263 ++sc->sc_bws[(best * nslots + j) % OHCI_NO_INTRS];
3264 opipe->u.intr.nslots = nslots;
3265 opipe->u.intr.pos = best;
3267 DPRINTFN(5, ("ohci_setintr: returns %p\n", opipe));
3268 return (USBD_NORMAL_COMPLETION);
3271 /***********************/
3274 ohci_device_isoc_transfer(usbd_xfer_handle xfer)
3278 DPRINTFN(5,("ohci_device_isoc_transfer: xfer=%p\n", xfer));
3280 /* Put it on our queue, */
3281 err = usb_insert_transfer(xfer);
3283 /* bail out on error, */
3284 if (err && err != USBD_IN_PROGRESS)
3287 /* XXX should check inuse here */
3289 /* insert into schedule, */
3290 ohci_device_isoc_enter(xfer);
3292 /* and start if the pipe wasn't running */
3294 ohci_device_isoc_start(STAILQ_FIRST(&xfer->pipe->queue));
3300 ohci_device_isoc_enter(usbd_xfer_handle xfer)
3302 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
3303 usbd_device_handle dev = opipe->pipe.device;
3304 ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
3305 ohci_soft_ed_t *sed = opipe->sed;
3306 struct iso *iso = &opipe->u.iso;
3307 struct ohci_xfer *oxfer = (struct ohci_xfer *)xfer;
3308 ohci_soft_itd_t *sitd, *nsitd;
3309 ohci_physaddr_t buf, offs, noffs, bp0, tdphys;
3310 int i, ncur, nframes;
3312 DPRINTFN(1,("ohci_device_isoc_enter: used=%d next=%d xfer=%p "
3314 iso->inuse, iso->next, xfer, xfer->nframes));
3319 if (iso->next == -1) {
3320 /* Not in use yet, schedule it a few frames ahead. */
3321 iso->next = le32toh(sc->sc_hcca->hcca_frame_number) + 5;
3322 DPRINTFN(2,("ohci_device_isoc_enter: start next=%d\n",
3328 for (sitd = xfer->hcpriv; sitd != NULL && sitd->xfer == xfer;
3329 sitd = sitd->nextitd)
3330 ohci_free_sitd(sc, sitd); /* Free ITDs in prev xfer*/
3334 sitd = ohci_alloc_sitd(sc);
3336 panic("can't alloc isoc");
3337 opipe->tail.itd = sitd;
3338 tdphys = sitd->physaddr;
3339 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); /* Stop*/
3341 sed->ed.ed_tailp = htole32(tdphys);
3342 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); /* Start.*/
3346 sitd = opipe->tail.itd;
3347 buf = DMAADDR(&xfer->dmabuf, 0);
3348 bp0 = OHCI_PAGE(buf);
3349 offs = OHCI_PAGE_OFFSET(buf);
3350 nframes = xfer->nframes;
3351 xfer->hcpriv = sitd;
3352 for (i = ncur = 0; i < nframes; i++, ncur++) {
3353 noffs = offs + xfer->frlengths[i];
3354 if (ncur == OHCI_ITD_NOFFSET || /* all offsets used */
3355 OHCI_PAGE(buf + noffs) > bp0 + OHCI_PAGE_SIZE) { /* too many page crossings */
3357 /* Allocate next ITD */
3358 nsitd = ohci_alloc_sitd(sc);
3359 if (nsitd == NULL) {
3361 device_printf(sc->sc_bus.bdev,
3362 "isoc TD alloc failed\n");
3366 /* Fill current ITD */
3367 sitd->itd.itd_flags = htole32(
3369 OHCI_ITD_SET_SF(iso->next) |
3370 OHCI_ITD_SET_DI(6) | /* delay intr a little */
3371 OHCI_ITD_SET_FC(ncur));
3372 sitd->itd.itd_bp0 = htole32(bp0);
3373 sitd->nextitd = nsitd;
3374 sitd->itd.itd_nextitd = htole32(nsitd->physaddr);
3375 sitd->itd.itd_be = htole32(bp0 + offs - 1);
3377 sitd->flags = OHCI_ITD_ACTIVE;
3380 iso->next = iso->next + ncur;
3381 bp0 = OHCI_PAGE(buf + offs);
3384 sitd->itd.itd_offset[ncur] = htole16(OHCI_ITD_MK_OFFS(offs));
3387 nsitd = ohci_alloc_sitd(sc);
3388 if (nsitd == NULL) {
3390 device_printf(sc->sc_bus.bdev, "isoc TD alloc failed\n");
3393 /* Fixup last used ITD */
3394 sitd->itd.itd_flags = htole32(
3396 OHCI_ITD_SET_SF(iso->next) |
3397 OHCI_ITD_SET_DI(0) |
3398 OHCI_ITD_SET_FC(ncur));
3399 sitd->itd.itd_bp0 = htole32(bp0);
3400 sitd->nextitd = nsitd;
3401 sitd->itd.itd_nextitd = htole32(nsitd->physaddr);
3402 sitd->itd.itd_be = htole32(bp0 + offs - 1);
3404 sitd->flags = OHCI_CALL_DONE | OHCI_ITD_ACTIVE;
3406 iso->next = iso->next + ncur;
3407 iso->inuse += nframes;
3409 xfer->actlen = offs; /* XXX pretend we did it all */
3411 xfer->status = USBD_IN_PROGRESS;
3413 oxfer->ohci_xfer_flags |= OHCI_ISOC_DIRTY;
3416 if (ohcidebug > 5) {
3417 DPRINTF(("ohci_device_isoc_enter: frame=%d\n",
3418 le32toh(sc->sc_hcca->hcca_frame_number)));
3419 ohci_dump_itds(xfer->hcpriv);
3425 sed->ed.ed_tailp = htole32(nsitd->physaddr);
3426 opipe->tail.itd = nsitd;
3427 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP);
3431 if (ohcidebug > 5) {
3433 DPRINTF(("ohci_device_isoc_enter: after frame=%d\n",
3434 le32toh(sc->sc_hcca->hcca_frame_number)));
3435 ohci_dump_itds(xfer->hcpriv);
3442 ohci_device_isoc_start(usbd_xfer_handle xfer)
3444 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
3445 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus;
3446 ohci_soft_ed_t *sed;
3448 DPRINTFN(5,("ohci_device_isoc_start: xfer=%p\n", xfer));
3451 return (USBD_IOERROR);
3454 if (xfer->status != USBD_IN_PROGRESS)
3455 kprintf("ohci_device_isoc_start: not in progress %p\n", xfer);
3458 /* XXX anything to do? */
3461 sed = opipe->sed; /* Turn off ED skip-bit to start processing */
3462 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); /* ED's ITD list.*/
3465 return (USBD_IN_PROGRESS);
3469 ohci_device_isoc_abort(usbd_xfer_handle xfer)
3471 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
3472 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus;
3473 ohci_soft_ed_t *sed;
3474 ohci_soft_itd_t *sitd, *tmp_sitd;
3475 int undone, num_sitds;
3478 opipe->aborting = 1;
3480 DPRINTFN(1,("ohci_device_isoc_abort: xfer=%p\n", xfer));
3482 /* Transfer is already done. */
3483 if (xfer->status != USBD_NOT_STARTED &&
3484 xfer->status != USBD_IN_PROGRESS) {
3486 kprintf("ohci_device_isoc_abort: early return\n");
3490 /* Give xfer the requested abort code. */
3491 xfer->status = USBD_CANCELLED;
3494 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); /* force hardware skip */
3497 sitd = xfer->hcpriv;
3501 kprintf("ohci_device_isoc_abort: hcpriv==0\n");
3505 for (; sitd != NULL && sitd->xfer == xfer; sitd = sitd->nextitd) {
3508 DPRINTFN(1,("abort sets done sitd=%p\n", sitd));
3516 * Each sitd has up to OHCI_ITD_NOFFSET transfers, each can
3517 * take a usb 1ms cycle. Conservatively wait for it to drain.
3518 * Even with DMA done, it can take awhile for the "batch"
3519 * delivery of completion interrupts to occur thru the controller.
3523 usb_delay_ms(&sc->sc_bus, 2*(num_sitds*OHCI_ITD_NOFFSET));
3526 tmp_sitd = xfer->hcpriv;
3527 for (; tmp_sitd != NULL && tmp_sitd->xfer == xfer;
3528 tmp_sitd = tmp_sitd->nextitd) {
3529 if (OHCI_CC_NO_ERROR ==
3530 OHCI_ITD_GET_CC(le32toh(tmp_sitd->itd.itd_flags)) &&
3531 tmp_sitd->flags & OHCI_ITD_ACTIVE &&
3532 (tmp_sitd->flags & OHCI_ITD_INTFIN) == 0)
3535 } while( undone != 0 );
3540 usb_transfer_complete(xfer);
3544 * Only if there is a `next' sitd in next xfer...
3545 * unlink this xfer's sitds.
3547 sed->ed.ed_headp = htole32(sitd->physaddr);
3549 sed->ed.ed_headp = 0;
3551 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); /* remove hardware skip */
3557 ohci_device_isoc_done(usbd_xfer_handle xfer)
3559 /* This null routine corresponds to non-isoc "done()" routines
3560 * that free the stds associated with an xfer after a completed
3561 * xfer interrupt. However, in the case of isoc transfers, the
3562 * sitds associated with the transfer have already been processed
3563 * and reallocated for the next iteration by
3564 * "ohci_device_isoc_transfer()".
3566 * Routine "usb_transfer_complete()" is called at the end of every
3567 * relevant usb interrupt. "usb_transfer_complete()" indirectly
3568 * calls 1) "ohci_device_isoc_transfer()" (which keeps pumping the
3569 * pipeline by setting up the next transfer iteration) and 2) then
3570 * calls "ohci_device_isoc_done()". Isoc transfers have not been
3571 * working for the ohci usb because this routine was trashing the
3572 * xfer set up for the next iteration (thus, only the first
3573 * UGEN_NISOREQS xfers outstanding on an open would work). Perhaps
3574 * this could all be re-factored, but that's another pass...
3579 ohci_setup_isoc(usbd_pipe_handle pipe)
3581 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
3582 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
3583 struct iso *iso = &opipe->u.iso;
3589 ohci_add_ed(opipe->sed, sc->sc_isoc_head);
3592 return (USBD_NORMAL_COMPLETION);
3596 ohci_device_isoc_close(usbd_pipe_handle pipe)
3598 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
3599 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
3600 ohci_soft_ed_t *sed;
3602 DPRINTF(("ohci_device_isoc_close: pipe=%p\n", pipe));
3605 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); /* Stop device. */
3607 ohci_close_pipe(pipe, sc->sc_isoc_head); /* Stop isoc list, free ED.*/
3609 /* up to NISOREQs xfers still outstanding. */
3612 opipe->tail.itd->isdone = 1;
3614 ohci_free_sitd(sc, opipe->tail.itd); /* Next `avail free' sitd.*/