sys/platform/pc64/apic/lapic.h

   1 /*
   2  * Copyright (c) 1996, by Steve Passe
   3  * Copyright (c) 2008 The DragonFly Project.
   4  * All rights reserved.
   5  *
   6  * Redistribution and use in source and binary forms, with or without
   7  * modification, are permitted provided that the following conditions
   8  * are met:
   9  * 1. Redistributions of source code must retain the above copyright
  10  *    notice, this list of conditions and the following disclaimer.
  11  * 2. The name of the developer may NOT be used to endorse or promote products
  12  *    derived from this software without specific prior written permission.
  13  *
  14  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
  15  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  16  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  17  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
  18  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  19  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  20  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  21  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  22  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  23  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  24  * SUCH DAMAGE.
  25  *
  26  * $FreeBSD: src/sys/i386/include/mpapic.h,v 1.14.2.2 2000/09/30 02:49:34 ps Exp $
  27  */
  28
  29 #ifndef _ARCH_APIC_LAPIC_H_
  30 #define _ARCH_APIC_LAPIC_H_
  31
  32 #include <machine_base/apic/apicreg.h>
  33
  34 /*
  35  * APIC ID <-> CPU ID mapping macros
  36  */
  37 #define CPUID_TO_APICID(cpu_id)         (cpu_id_to_apic_id[(cpu_id)])
  38 #define APICID_TO_CPUID(apic_id)        (apic_id_to_cpu_id[(apic_id)])
  39
  40 #ifndef _SYS_QUEUE_H_
  41 #include <sys/queue.h>
  42 #endif
  43
  44 struct lapic_enumerator {
  45         int     lapic_prio;
  46         TAILQ_ENTRY(lapic_enumerator) lapic_link;
  47         int     (*lapic_probe)(struct lapic_enumerator *);
  48         int     (*lapic_enumerate)(struct lapic_enumerator *);
  49 };
  50
  51 #define LAPIC_ENUM_PRIO_MPTABLE         20
  52 #define LAPIC_ENUM_PRIO_MADT            40
  53
  54 extern volatile lapic_t         *lapic_mem;
  55 extern int                      cpu_id_to_apic_id[];
  56 extern int                      apic_id_to_cpu_id[];
  57 extern int                      lapic_enable;
  58 extern int                      lapic_usable;
  59 extern int                      x2apic_enable;
  60 extern void                     (*lapic_eoi)(void);
  61 extern int                      (*apic_ipi)(int, int, int);
  62 extern void                     (*single_apic_ipi)(int, int, int);
  63
  64 void    apic_dump(char*);
  65 void    lapic_init(boolean_t);
  66 void    lapic_set_cpuid(int, int);
  67 int     lapic_config(void);
  68 void    lapic_enumerator_register(struct lapic_enumerator *);
  69 void    set_apic_timer(int);
  70 int     read_apic_timer(void);
  71 void    u_sleep(int);
  72
  73 void    lapic_map(vm_paddr_t);
  74 int     lapic_unused_apic_id(int);
  75 void    lapic_fixup_noioapic(void);
  76 void    lapic_seticr_sync(uint32_t, uint32_t);
  77 void    lapic_x2apic_enter(boolean_t);
  78
  79 #ifndef _MACHINE_SMP_H_
  80 #include <machine/smp.h>
  81 #endif
  82
  83 void    selected_apic_ipi(cpumask_t, int, int);
  84
  85 /*
  86  * Send an IPI INTerrupt containing 'vector' to all CPUs EXCEPT myself
  87  */
  88 #ifndef _CPU_CPUMASK_H_
  89 #include <machine/cpumask.h>
  90 #endif
  91
  92 static __inline int
  93 all_but_self_ipi(int vector)
  94 {
  95         if (CPUMASK_ISUP(smp_active_mask))
  96                 return 0;
  97         return apic_ipi(APIC_DEST_ALLESELF, vector, APIC_DELMODE_FIXED);
  98 }
  99
 100 #define LAPIC_MEM_READ(field)           (lapic_mem->field)
 101 #define LAPIC_MEM_WRITE(field, val)     \
 102 do {                                    \
 103         lapic_mem->field = (val);       \
 104 } while (0)
 105
 106 #define LAPIC_MSR_READ(msr)             rdmsr((msr))
 107 #define LAPIC_MSR_WRITE(msr, val)       wrmsr((msr), (val))
 108
 109 #define LAPIC_READ(field)                                               \
 110         (x2apic_enable ? (uint32_t)LAPIC_MSR_READ(LAPIC2MSR(field))     \
 111                        : LAPIC_MEM_READ(field))
 112
 113 #define LAPIC_WRITE(field, val)                                         \
 114 do {                                                                    \
 115         if (x2apic_enable)                                              \
 116                 LAPIC_MSR_WRITE(LAPIC2MSR(field), (val));               \
 117         else                                                            \
 118                 LAPIC_MEM_WRITE(field, (val));                          \
 119 } while (0)
 120
 121 #define LAPIC_READID                                                    \
 122         (x2apic_enable ? (uint32_t)LAPIC_MSR_READ(MSR_X2APIC_ID)        \
 123                        : APIC_ID(LAPIC_MEM_READ(id)))
 124
 125 #endif /* _ARCH_APIC_LAPIC_H_ */