1 // SPDX-License-Identifier: GPL-2.0
3 * Driver for the MMC / SD / SDIO IP found in:
5 * TC6393XB, TC6391XB, TC6387XB, T7L66XB, ASIC3, SH-Mobile SoCs
7 * Copyright (C) 2015-19 Renesas Electronics Corporation
8 * Copyright (C) 2016-19 Sang Engineering, Wolfram Sang
9 * Copyright (C) 2017 Horms Solutions, Simon Horman
10 * Copyright (C) 2011 Guennadi Liakhovetski
11 * Copyright (C) 2007 Ian Molton
12 * Copyright (C) 2004 Ian Molton
14 * This driver draws mainly on scattered spec sheets, Reverse engineering
15 * of the toshiba e800 SD driver and some parts of the 2.4 ASIC3 driver (4 bit
16 * support). (Further 4 bit support from a later datasheet).
19 * Investigate using a workqueue for PIO transfers
21 * Better Power management
22 * Handle MMC errors better
23 * double buffer support
27 #include <linux/delay.h>
28 #include <linux/device.h>
29 #include <linux/dma-mapping.h>
30 #include <linux/highmem.h>
31 #include <linux/interrupt.h>
33 #include <linux/irq.h>
34 #include <linux/mfd/tmio.h>
35 #include <linux/mmc/card.h>
36 #include <linux/mmc/host.h>
37 #include <linux/mmc/mmc.h>
38 #include <linux/mmc/slot-gpio.h>
39 #include <linux/module.h>
40 #include <linux/pagemap.h>
41 #include <linux/platform_device.h>
42 #include <linux/pm_qos.h>
43 #include <linux/pm_runtime.h>
44 #include <linux/regulator/consumer.h>
45 #include <linux/mmc/sdio.h>
46 #include <linux/scatterlist.h>
47 #include <linux/sizes.h>
48 #include <linux/spinlock.h>
49 #include <linux/workqueue.h>
53 static inline void tmio_mmc_start_dma(struct tmio_mmc_host *host,
54 struct mmc_data *data)
57 host->dma_ops->start(host, data);
60 static inline void tmio_mmc_end_dma(struct tmio_mmc_host *host)
62 if (host->dma_ops && host->dma_ops->end)
63 host->dma_ops->end(host);
66 static inline void tmio_mmc_enable_dma(struct tmio_mmc_host *host, bool enable)
69 host->dma_ops->enable(host, enable);
72 static inline void tmio_mmc_request_dma(struct tmio_mmc_host *host,
73 struct tmio_mmc_data *pdata)
76 host->dma_ops->request(host, pdata);
83 static inline void tmio_mmc_release_dma(struct tmio_mmc_host *host)
86 host->dma_ops->release(host);
89 static inline void tmio_mmc_abort_dma(struct tmio_mmc_host *host)
92 host->dma_ops->abort(host);
95 static inline void tmio_mmc_dataend_dma(struct tmio_mmc_host *host)
98 host->dma_ops->dataend(host);
101 void tmio_mmc_enable_mmc_irqs(struct tmio_mmc_host *host, u32 i)
103 host->sdcard_irq_mask &= ~(i & TMIO_MASK_IRQ);
104 sd_ctrl_write32_as_16_and_16(host, CTL_IRQ_MASK, host->sdcard_irq_mask);
106 EXPORT_SYMBOL_GPL(tmio_mmc_enable_mmc_irqs);
108 void tmio_mmc_disable_mmc_irqs(struct tmio_mmc_host *host, u32 i)
110 host->sdcard_irq_mask |= (i & TMIO_MASK_IRQ);
111 sd_ctrl_write32_as_16_and_16(host, CTL_IRQ_MASK, host->sdcard_irq_mask);
113 EXPORT_SYMBOL_GPL(tmio_mmc_disable_mmc_irqs);
115 static void tmio_mmc_ack_mmc_irqs(struct tmio_mmc_host *host, u32 i)
117 sd_ctrl_write32_as_16_and_16(host, CTL_STATUS, ~i);
120 static void tmio_mmc_init_sg(struct tmio_mmc_host *host, struct mmc_data *data)
122 host->sg_len = data->sg_len;
123 host->sg_ptr = data->sg;
124 host->sg_orig = data->sg;
128 static int tmio_mmc_next_sg(struct tmio_mmc_host *host)
130 host->sg_ptr = sg_next(host->sg_ptr);
132 return --host->sg_len;
135 #define CMDREQ_TIMEOUT 5000
137 static void tmio_mmc_enable_sdio_irq(struct mmc_host *mmc, int enable)
139 struct tmio_mmc_host *host = mmc_priv(mmc);
141 if (enable && !host->sdio_irq_enabled) {
144 /* Keep device active while SDIO irq is enabled */
145 pm_runtime_get_sync(mmc_dev(mmc));
147 host->sdio_irq_enabled = true;
148 host->sdio_irq_mask = TMIO_SDIO_MASK_ALL & ~TMIO_SDIO_STAT_IOIRQ;
150 /* Clear obsolete interrupts before enabling */
151 sdio_status = sd_ctrl_read16(host, CTL_SDIO_STATUS) & ~TMIO_SDIO_MASK_ALL;
152 if (host->pdata->flags & TMIO_MMC_SDIO_STATUS_SETBITS)
153 sdio_status |= TMIO_SDIO_SETBITS_MASK;
154 sd_ctrl_write16(host, CTL_SDIO_STATUS, sdio_status);
156 sd_ctrl_write16(host, CTL_SDIO_IRQ_MASK, host->sdio_irq_mask);
157 } else if (!enable && host->sdio_irq_enabled) {
158 host->sdio_irq_mask = TMIO_SDIO_MASK_ALL;
159 sd_ctrl_write16(host, CTL_SDIO_IRQ_MASK, host->sdio_irq_mask);
161 host->sdio_irq_enabled = false;
162 pm_runtime_mark_last_busy(mmc_dev(mmc));
163 pm_runtime_put_autosuspend(mmc_dev(mmc));
167 static void tmio_mmc_set_bus_width(struct tmio_mmc_host *host,
168 unsigned char bus_width)
170 u16 reg = sd_ctrl_read16(host, CTL_SD_MEM_CARD_OPT)
171 & ~(CARD_OPT_WIDTH | CARD_OPT_WIDTH8);
173 /* reg now applies to MMC_BUS_WIDTH_4 */
174 if (bus_width == MMC_BUS_WIDTH_1)
175 reg |= CARD_OPT_WIDTH;
176 else if (bus_width == MMC_BUS_WIDTH_8)
177 reg |= CARD_OPT_WIDTH8;
179 sd_ctrl_write16(host, CTL_SD_MEM_CARD_OPT, reg);
182 static void tmio_mmc_reset(struct tmio_mmc_host *host, bool preserve)
184 u16 card_opt, clk_ctrl, sdif_mode;
187 card_opt = sd_ctrl_read16(host, CTL_SD_MEM_CARD_OPT);
188 clk_ctrl = sd_ctrl_read16(host, CTL_SD_CARD_CLK_CTL);
189 if (host->pdata->flags & TMIO_MMC_MIN_RCAR2)
190 sdif_mode = sd_ctrl_read16(host, CTL_SDIF_MODE);
193 /* FIXME - should we set stop clock reg here */
194 sd_ctrl_write16(host, CTL_RESET_SD, 0x0000);
195 usleep_range(10000, 11000);
196 sd_ctrl_write16(host, CTL_RESET_SD, 0x0001);
197 usleep_range(10000, 11000);
199 tmio_mmc_abort_dma(host);
202 host->reset(host, preserve);
204 sd_ctrl_write32_as_16_and_16(host, CTL_IRQ_MASK, host->sdcard_irq_mask_all);
205 host->sdcard_irq_mask = host->sdcard_irq_mask_all;
207 if (host->native_hotplug)
208 tmio_mmc_enable_mmc_irqs(host,
209 TMIO_STAT_CARD_REMOVE | TMIO_STAT_CARD_INSERT);
211 tmio_mmc_set_bus_width(host, host->mmc->ios.bus_width);
213 if (host->pdata->flags & TMIO_MMC_SDIO_IRQ) {
214 sd_ctrl_write16(host, CTL_SDIO_IRQ_MASK, host->sdio_irq_mask);
215 sd_ctrl_write16(host, CTL_TRANSACTION_CTL, 0x0001);
219 sd_ctrl_write16(host, CTL_SD_MEM_CARD_OPT, card_opt);
220 sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, clk_ctrl);
221 if (host->pdata->flags & TMIO_MMC_MIN_RCAR2)
222 sd_ctrl_write16(host, CTL_SDIF_MODE, sdif_mode);
226 mmc_retune_needed(host->mmc);
229 static void tmio_mmc_reset_work(struct work_struct *work)
231 struct tmio_mmc_host *host = container_of(work, struct tmio_mmc_host,
232 delayed_reset_work.work);
233 struct mmc_request *mrq;
236 spin_lock_irqsave(&host->lock, flags);
240 * is request already finished? Since we use a non-blocking
241 * cancel_delayed_work(), it can happen, that a .set_ios() call preempts
242 * us, so, have to check for IS_ERR(host->mrq)
244 if (IS_ERR_OR_NULL(mrq) ||
245 time_is_after_jiffies(host->last_req_ts +
246 msecs_to_jiffies(CMDREQ_TIMEOUT))) {
247 spin_unlock_irqrestore(&host->lock, flags);
251 dev_warn(&host->pdev->dev,
252 "timeout waiting for hardware interrupt (CMD%u)\n",
256 host->data->error = -ETIMEDOUT;
258 host->cmd->error = -ETIMEDOUT;
260 mrq->cmd->error = -ETIMEDOUT;
262 /* No new calls yet, but disallow concurrent tmio_mmc_done_work() */
263 host->mrq = ERR_PTR(-EBUSY);
267 spin_unlock_irqrestore(&host->lock, flags);
269 tmio_mmc_reset(host, true);
271 /* Ready for new calls */
273 mmc_request_done(host->mmc, mrq);
276 /* These are the bitmasks the tmio chip requires to implement the MMC response
277 * types. Note that R1 and R6 are the same in this scheme. */
278 #define APP_CMD 0x0040
279 #define RESP_NONE 0x0300
280 #define RESP_R1 0x0400
281 #define RESP_R1B 0x0500
282 #define RESP_R2 0x0600
283 #define RESP_R3 0x0700
284 #define DATA_PRESENT 0x0800
285 #define TRANSFER_READ 0x1000
286 #define TRANSFER_MULTI 0x2000
287 #define SECURITY_CMD 0x4000
288 #define NO_CMD12_ISSUE 0x4000 /* TMIO_MMC_HAVE_CMD12_CTRL */
290 static int tmio_mmc_start_command(struct tmio_mmc_host *host,
291 struct mmc_command *cmd)
293 struct mmc_data *data = host->data;
296 switch (mmc_resp_type(cmd)) {
297 case MMC_RSP_NONE: c |= RESP_NONE; break;
299 case MMC_RSP_R1_NO_CRC:
301 case MMC_RSP_R1B: c |= RESP_R1B; break;
302 case MMC_RSP_R2: c |= RESP_R2; break;
303 case MMC_RSP_R3: c |= RESP_R3; break;
305 pr_debug("Unknown response type %d\n", mmc_resp_type(cmd));
311 /* FIXME - this seems to be ok commented out but the spec suggest this bit
312 * should be set when issuing app commands.
313 * if(cmd->flags & MMC_FLAG_ACMD)
318 if (data->blocks > 1) {
319 sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, TMIO_STOP_SEC);
323 * Disable auto CMD12 at IO_RW_EXTENDED and
324 * SET_BLOCK_COUNT when doing multiple block transfer
326 if ((host->pdata->flags & TMIO_MMC_HAVE_CMD12_CTRL) &&
327 (cmd->opcode == SD_IO_RW_EXTENDED || host->mrq->sbc))
330 if (data->flags & MMC_DATA_READ)
334 tmio_mmc_enable_mmc_irqs(host, TMIO_MASK_CMD);
336 /* Fire off the command */
337 sd_ctrl_write32_as_16_and_16(host, CTL_ARG_REG, cmd->arg);
338 sd_ctrl_write16(host, CTL_SD_CMD, c);
343 static void tmio_mmc_transfer_data(struct tmio_mmc_host *host,
347 int is_read = host->data->flags & MMC_DATA_READ;
353 if (host->pdata->flags & TMIO_MMC_32BIT_DATA_PORT) {
355 u32 *buf32 = (u32 *)buf;
358 sd_ctrl_read32_rep(host, CTL_SD_DATA_PORT, buf32,
361 sd_ctrl_write32_rep(host, CTL_SD_DATA_PORT, buf32,
364 /* if count was multiple of 4 */
372 sd_ctrl_read32_rep(host, CTL_SD_DATA_PORT, &data, 1);
373 memcpy(buf32, &data, count);
375 memcpy(&data, buf32, count);
376 sd_ctrl_write32_rep(host, CTL_SD_DATA_PORT, &data, 1);
383 sd_ctrl_read16_rep(host, CTL_SD_DATA_PORT, buf, count >> 1);
385 sd_ctrl_write16_rep(host, CTL_SD_DATA_PORT, buf, count >> 1);
387 /* if count was even number */
391 /* if count was odd number */
392 buf8 = (u8 *)(buf + (count >> 1));
397 * driver and this function are assuming that
398 * it is used as little endian
401 *buf8 = sd_ctrl_read16(host, CTL_SD_DATA_PORT) & 0xff;
403 sd_ctrl_write16(host, CTL_SD_DATA_PORT, *buf8);
407 * This chip always returns (at least?) as much data as you ask for.
408 * I'm unsure what happens if you ask for less than a block. This should be
409 * looked into to ensure that a funny length read doesn't hose the controller.
411 static void tmio_mmc_pio_irq(struct tmio_mmc_host *host)
413 struct mmc_data *data = host->data;
419 pr_err("PIO IRQ in DMA mode!\n");
422 pr_debug("Spurious PIO IRQ\n");
426 sg_virt = kmap_local_page(sg_page(host->sg_ptr));
427 buf = (unsigned short *)(sg_virt + host->sg_ptr->offset + host->sg_off);
429 count = host->sg_ptr->length - host->sg_off;
430 if (count > data->blksz)
433 pr_debug("count: %08x offset: %08x flags %08x\n",
434 count, host->sg_off, data->flags);
436 /* Transfer the data */
437 tmio_mmc_transfer_data(host, buf, count);
439 host->sg_off += count;
441 kunmap_local(sg_virt);
443 if (host->sg_off == host->sg_ptr->length)
444 tmio_mmc_next_sg(host);
447 static void tmio_mmc_check_bounce_buffer(struct tmio_mmc_host *host)
449 if (host->sg_ptr == &host->bounce_sg) {
450 void *sg_virt = kmap_local_page(sg_page(host->sg_orig));
452 memcpy(sg_virt + host->sg_orig->offset, host->bounce_buf,
453 host->bounce_sg.length);
454 kunmap_local(sg_virt);
458 /* needs to be called with host->lock held */
459 void tmio_mmc_do_data_irq(struct tmio_mmc_host *host)
461 struct mmc_data *data = host->data;
462 struct mmc_command *stop;
467 dev_warn(&host->pdev->dev, "Spurious data end IRQ\n");
472 /* FIXME - return correct transfer count on errors */
474 data->bytes_xfered = data->blocks * data->blksz;
476 data->bytes_xfered = 0;
478 pr_debug("Completed data request\n");
481 * FIXME: other drivers allow an optional stop command of any given type
482 * which we dont do, as the chip can auto generate them.
483 * Perhaps we can be smarter about when to use auto CMD12 and
484 * only issue the auto request when we know this is the desired
485 * stop command, allowing fallback to the stop command the
486 * upper layers expect. For now, we do what works.
489 if (data->flags & MMC_DATA_READ) {
491 tmio_mmc_check_bounce_buffer(host);
492 dev_dbg(&host->pdev->dev, "Complete Rx request %p\n",
495 dev_dbg(&host->pdev->dev, "Complete Tx request %p\n",
499 if (stop && !host->mrq->sbc) {
500 if (stop->opcode != MMC_STOP_TRANSMISSION || stop->arg)
501 dev_err(&host->pdev->dev, "unsupported stop: CMD%u,0x%x. We did CMD12,0\n",
502 stop->opcode, stop->arg);
504 /* fill in response from auto CMD12 */
505 stop->resp[0] = sd_ctrl_read16_and_16_as_32(host, CTL_RESPONSE);
507 sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, 0);
510 schedule_work(&host->done);
512 EXPORT_SYMBOL_GPL(tmio_mmc_do_data_irq);
514 static void tmio_mmc_data_irq(struct tmio_mmc_host *host, unsigned int stat)
516 struct mmc_data *data;
518 spin_lock(&host->lock);
524 if (stat & TMIO_STAT_DATATIMEOUT)
525 data->error = -ETIMEDOUT;
526 else if (stat & TMIO_STAT_CRCFAIL || stat & TMIO_STAT_STOPBIT_ERR ||
527 stat & TMIO_STAT_TXUNDERRUN)
528 data->error = -EILSEQ;
529 if (host->dma_on && (data->flags & MMC_DATA_WRITE)) {
530 u32 status = sd_ctrl_read16_and_16_as_32(host, CTL_STATUS);
534 * Has all data been written out yet? Testing on SuperH showed,
535 * that in most cases the first interrupt comes already with the
536 * BUSY status bit clear, but on some operations, like mount or
537 * in the beginning of a write / sync / umount, there is one
538 * DATAEND interrupt with the BUSY bit set, in this cases
539 * waiting for one more interrupt fixes the problem.
541 if (host->pdata->flags & TMIO_MMC_HAS_IDLE_WAIT) {
542 if (status & TMIO_STAT_SCLKDIVEN)
545 if (!(status & TMIO_STAT_CMD_BUSY))
550 tmio_mmc_disable_mmc_irqs(host, TMIO_STAT_DATAEND);
551 tmio_mmc_dataend_dma(host);
553 } else if (host->dma_on && (data->flags & MMC_DATA_READ)) {
554 tmio_mmc_disable_mmc_irqs(host, TMIO_STAT_DATAEND);
555 tmio_mmc_dataend_dma(host);
557 tmio_mmc_do_data_irq(host);
558 tmio_mmc_disable_mmc_irqs(host, TMIO_MASK_READOP | TMIO_MASK_WRITEOP);
561 spin_unlock(&host->lock);
564 static void tmio_mmc_cmd_irq(struct tmio_mmc_host *host, unsigned int stat)
566 struct mmc_command *cmd = host->cmd;
569 spin_lock(&host->lock);
572 pr_debug("Spurious CMD irq\n");
576 /* This controller is sicker than the PXA one. Not only do we need to
577 * drop the top 8 bits of the first response word, we also need to
578 * modify the order of the response for short response command types.
581 for (i = 3, addr = CTL_RESPONSE ; i >= 0 ; i--, addr += 4)
582 cmd->resp[i] = sd_ctrl_read16_and_16_as_32(host, addr);
584 if (cmd->flags & MMC_RSP_136) {
585 cmd->resp[0] = (cmd->resp[0] << 8) | (cmd->resp[1] >> 24);
586 cmd->resp[1] = (cmd->resp[1] << 8) | (cmd->resp[2] >> 24);
587 cmd->resp[2] = (cmd->resp[2] << 8) | (cmd->resp[3] >> 24);
589 } else if (cmd->flags & MMC_RSP_R3) {
590 cmd->resp[0] = cmd->resp[3];
593 if (stat & TMIO_STAT_CMDTIMEOUT)
594 cmd->error = -ETIMEDOUT;
595 else if ((stat & TMIO_STAT_CRCFAIL && cmd->flags & MMC_RSP_CRC) ||
596 stat & TMIO_STAT_STOPBIT_ERR ||
597 stat & TMIO_STAT_CMD_IDX_ERR)
598 cmd->error = -EILSEQ;
600 /* If there is data to handle we enable data IRQs here, and
601 * we will ultimatley finish the request in the data_end handler.
602 * If theres no data or we encountered an error, finish now.
604 if (host->data && (!cmd->error || cmd->error == -EILSEQ)) {
605 if (host->data->flags & MMC_DATA_READ) {
607 tmio_mmc_enable_mmc_irqs(host, TMIO_MASK_READOP);
609 tmio_mmc_disable_mmc_irqs(host,
611 tasklet_schedule(&host->dma_issue);
615 tmio_mmc_enable_mmc_irqs(host, TMIO_MASK_WRITEOP);
617 tmio_mmc_disable_mmc_irqs(host,
619 tasklet_schedule(&host->dma_issue);
623 schedule_work(&host->done);
627 spin_unlock(&host->lock);
630 static bool __tmio_mmc_card_detect_irq(struct tmio_mmc_host *host,
631 int ireg, int status)
633 struct mmc_host *mmc = host->mmc;
635 /* Card insert / remove attempts */
636 if (ireg & (TMIO_STAT_CARD_INSERT | TMIO_STAT_CARD_REMOVE)) {
637 tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_CARD_INSERT |
638 TMIO_STAT_CARD_REMOVE);
639 if ((((ireg & TMIO_STAT_CARD_REMOVE) && mmc->card) ||
640 ((ireg & TMIO_STAT_CARD_INSERT) && !mmc->card)) &&
641 !work_pending(&mmc->detect.work))
642 mmc_detect_change(host->mmc, msecs_to_jiffies(100));
649 static bool __tmio_mmc_sdcard_irq(struct tmio_mmc_host *host, int ireg,
652 /* Command completion */
653 if (ireg & (TMIO_STAT_CMDRESPEND | TMIO_STAT_CMDTIMEOUT)) {
654 tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_CMDRESPEND |
655 TMIO_STAT_CMDTIMEOUT);
656 tmio_mmc_cmd_irq(host, status);
661 if (ireg & (TMIO_STAT_RXRDY | TMIO_STAT_TXRQ)) {
662 tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_RXRDY | TMIO_STAT_TXRQ);
663 tmio_mmc_pio_irq(host);
667 /* Data transfer completion */
668 if (ireg & TMIO_STAT_DATAEND) {
669 tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_DATAEND);
670 tmio_mmc_data_irq(host, status);
674 if (host->dma_ops && host->dma_ops->dma_irq && host->dma_ops->dma_irq(host))
680 static bool __tmio_mmc_sdio_irq(struct tmio_mmc_host *host)
682 struct mmc_host *mmc = host->mmc;
683 struct tmio_mmc_data *pdata = host->pdata;
684 unsigned int ireg, status;
685 unsigned int sdio_status;
687 if (!(pdata->flags & TMIO_MMC_SDIO_IRQ))
690 status = sd_ctrl_read16(host, CTL_SDIO_STATUS);
691 ireg = status & TMIO_SDIO_MASK_ALL & ~host->sdio_irq_mask;
693 sdio_status = status & ~TMIO_SDIO_MASK_ALL;
694 if (pdata->flags & TMIO_MMC_SDIO_STATUS_SETBITS)
695 sdio_status |= TMIO_SDIO_SETBITS_MASK;
697 sd_ctrl_write16(host, CTL_SDIO_STATUS, sdio_status);
699 if (mmc->caps & MMC_CAP_SDIO_IRQ && ireg & TMIO_SDIO_STAT_IOIRQ)
700 mmc_signal_sdio_irq(mmc);
705 irqreturn_t tmio_mmc_irq(int irq, void *devid)
707 struct tmio_mmc_host *host = devid;
708 unsigned int ireg, status;
710 status = sd_ctrl_read16_and_16_as_32(host, CTL_STATUS);
711 ireg = status & TMIO_MASK_IRQ & ~host->sdcard_irq_mask;
713 /* Clear the status except the interrupt status */
714 sd_ctrl_write32_as_16_and_16(host, CTL_STATUS, TMIO_MASK_IRQ);
716 if (__tmio_mmc_card_detect_irq(host, ireg, status))
718 if (__tmio_mmc_sdcard_irq(host, ireg, status))
721 if (__tmio_mmc_sdio_irq(host))
726 EXPORT_SYMBOL_GPL(tmio_mmc_irq);
728 static int tmio_mmc_start_data(struct tmio_mmc_host *host,
729 struct mmc_data *data)
731 struct tmio_mmc_data *pdata = host->pdata;
733 pr_debug("setup data transfer: blocksize %08x nr_blocks %d\n",
734 data->blksz, data->blocks);
736 /* Some hardware cannot perform 2 byte requests in 4/8 bit mode */
737 if (host->mmc->ios.bus_width == MMC_BUS_WIDTH_4 ||
738 host->mmc->ios.bus_width == MMC_BUS_WIDTH_8) {
739 int blksz_2bytes = pdata->flags & TMIO_MMC_BLKSZ_2BYTES;
741 if (data->blksz < 2 || (data->blksz < 4 && !blksz_2bytes)) {
742 pr_err("%s: %d byte block unsupported in 4/8 bit mode\n",
743 mmc_hostname(host->mmc), data->blksz);
748 tmio_mmc_init_sg(host, data);
750 host->dma_on = false;
752 /* Set transfer length / blocksize */
753 sd_ctrl_write16(host, CTL_SD_XFER_LEN, data->blksz);
754 if (host->mmc->max_blk_count >= SZ_64K)
755 sd_ctrl_write32(host, CTL_XFER_BLK_COUNT, data->blocks);
757 sd_ctrl_write16(host, CTL_XFER_BLK_COUNT, data->blocks);
759 tmio_mmc_start_dma(host, data);
764 static void tmio_process_mrq(struct tmio_mmc_host *host,
765 struct mmc_request *mrq)
767 struct mmc_command *cmd;
770 if (mrq->sbc && host->cmd != mrq->sbc) {
775 ret = tmio_mmc_start_data(host, mrq->data);
781 ret = tmio_mmc_start_command(host, cmd);
785 schedule_delayed_work(&host->delayed_reset_work,
786 msecs_to_jiffies(CMDREQ_TIMEOUT));
791 mrq->cmd->error = ret;
792 mmc_request_done(host->mmc, mrq);
795 /* Process requests from the MMC layer */
796 static void tmio_mmc_request(struct mmc_host *mmc, struct mmc_request *mrq)
798 struct tmio_mmc_host *host = mmc_priv(mmc);
801 spin_lock_irqsave(&host->lock, flags);
804 pr_debug("request not null\n");
805 if (IS_ERR(host->mrq)) {
806 spin_unlock_irqrestore(&host->lock, flags);
807 mrq->cmd->error = -EAGAIN;
808 mmc_request_done(mmc, mrq);
813 host->last_req_ts = jiffies;
817 spin_unlock_irqrestore(&host->lock, flags);
819 tmio_process_mrq(host, mrq);
822 static void tmio_mmc_finish_request(struct tmio_mmc_host *host)
824 struct mmc_request *mrq;
827 spin_lock_irqsave(&host->lock, flags);
829 tmio_mmc_end_dma(host);
832 if (IS_ERR_OR_NULL(mrq)) {
833 spin_unlock_irqrestore(&host->lock, flags);
837 /* If not SET_BLOCK_COUNT, clear old data */
838 if (host->cmd != mrq->sbc) {
844 cancel_delayed_work(&host->delayed_reset_work);
846 spin_unlock_irqrestore(&host->lock, flags);
848 if (mrq->cmd->error || (mrq->data && mrq->data->error)) {
849 tmio_mmc_ack_mmc_irqs(host, TMIO_MASK_IRQ); /* Clear all */
850 tmio_mmc_abort_dma(host);
853 /* Error means retune, but executed command was still successful */
854 if (host->check_retune && host->check_retune(host, mrq))
855 mmc_retune_needed(host->mmc);
857 /* If SET_BLOCK_COUNT, continue with main command */
858 if (host->mrq && !mrq->cmd->error) {
859 tmio_process_mrq(host, mrq);
863 if (host->fixup_request)
864 host->fixup_request(host, mrq);
866 mmc_request_done(host->mmc, mrq);
869 static void tmio_mmc_done_work(struct work_struct *work)
871 struct tmio_mmc_host *host = container_of(work, struct tmio_mmc_host,
873 tmio_mmc_finish_request(host);
876 static void tmio_mmc_power_on(struct tmio_mmc_host *host, unsigned short vdd)
878 struct mmc_host *mmc = host->mmc;
881 /* .set_ios() is returning void, so, no chance to report an error */
884 host->set_pwr(host->pdev, 1);
886 if (!IS_ERR(mmc->supply.vmmc)) {
887 ret = mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, vdd);
889 * Attention: empiric value. With a b43 WiFi SDIO card this
890 * delay proved necessary for reliable card-insertion probing.
891 * 100us were not enough. Is this the same 140us delay, as in
892 * tmio_mmc_set_ios()?
894 usleep_range(200, 300);
897 * It seems, VccQ should be switched on after Vcc, this is also what the
898 * omap_hsmmc.c driver does.
900 if (!IS_ERR(mmc->supply.vqmmc) && !ret) {
901 ret = regulator_enable(mmc->supply.vqmmc);
902 usleep_range(200, 300);
906 dev_dbg(&host->pdev->dev, "Regulators failed to power up: %d\n",
910 static void tmio_mmc_power_off(struct tmio_mmc_host *host)
912 struct mmc_host *mmc = host->mmc;
914 if (!IS_ERR(mmc->supply.vqmmc))
915 regulator_disable(mmc->supply.vqmmc);
917 if (!IS_ERR(mmc->supply.vmmc))
918 mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, 0);
921 host->set_pwr(host->pdev, 0);
924 static unsigned int tmio_mmc_get_timeout_cycles(struct tmio_mmc_host *host)
926 u16 val = sd_ctrl_read16(host, CTL_SD_MEM_CARD_OPT);
928 val = (val & CARD_OPT_TOP_MASK) >> CARD_OPT_TOP_SHIFT;
929 return 1 << (13 + val);
932 static void tmio_mmc_max_busy_timeout(struct tmio_mmc_host *host)
934 unsigned int clk_rate = host->mmc->actual_clock ?: host->mmc->f_max;
936 host->mmc->max_busy_timeout = host->get_timeout_cycles(host) /
937 (clk_rate / MSEC_PER_SEC);
940 /* Set MMC clock / power.
941 * Note: This controller uses a simple divider scheme therefore it cannot
942 * run a MMC card at full speed (20MHz). The max clock is 24MHz on SD, but as
943 * MMC wont run that fast, it has to be clocked at 12MHz which is the next
946 static void tmio_mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
948 struct tmio_mmc_host *host = mmc_priv(mmc);
949 struct device *dev = &host->pdev->dev;
952 mutex_lock(&host->ios_lock);
954 spin_lock_irqsave(&host->lock, flags);
956 if (IS_ERR(host->mrq)) {
958 "%s.%d: concurrent .set_ios(), clk %u, mode %u\n",
959 current->comm, task_pid_nr(current),
960 ios->clock, ios->power_mode);
961 host->mrq = ERR_PTR(-EINTR);
964 "%s.%d: CMD%u active since %lu, now %lu!\n",
965 current->comm, task_pid_nr(current),
966 host->mrq->cmd->opcode, host->last_req_ts,
969 spin_unlock_irqrestore(&host->lock, flags);
971 mutex_unlock(&host->ios_lock);
975 /* Disallow new mrqs and work handlers to run */
976 host->mrq = ERR_PTR(-EBUSY);
978 spin_unlock_irqrestore(&host->lock, flags);
980 switch (ios->power_mode) {
982 tmio_mmc_power_off(host);
983 /* For R-Car Gen2+, we need to reset SDHI specific SCC */
984 if (host->pdata->flags & TMIO_MMC_MIN_RCAR2)
985 tmio_mmc_reset(host, false);
987 host->set_clock(host, 0);
990 tmio_mmc_power_on(host, ios->vdd);
991 host->set_clock(host, ios->clock);
992 tmio_mmc_set_bus_width(host, ios->bus_width);
995 host->set_clock(host, ios->clock);
996 tmio_mmc_set_bus_width(host, ios->bus_width);
1000 if (host->pdata->flags & TMIO_MMC_USE_BUSY_TIMEOUT)
1001 tmio_mmc_max_busy_timeout(host);
1003 /* Let things settle. delay taken from winCE driver */
1004 usleep_range(140, 200);
1005 if (PTR_ERR(host->mrq) == -EINTR)
1006 dev_dbg(&host->pdev->dev,
1007 "%s.%d: IOS interrupted: clk %u, mode %u",
1008 current->comm, task_pid_nr(current),
1009 ios->clock, ios->power_mode);
1011 /* Ready for new mrqs */
1013 host->clk_cache = ios->clock;
1015 mutex_unlock(&host->ios_lock);
1018 static int tmio_mmc_get_ro(struct mmc_host *mmc)
1020 struct tmio_mmc_host *host = mmc_priv(mmc);
1022 return !(sd_ctrl_read16_and_16_as_32(host, CTL_STATUS) &
1023 TMIO_STAT_WRPROTECT);
1026 static int tmio_mmc_get_cd(struct mmc_host *mmc)
1028 struct tmio_mmc_host *host = mmc_priv(mmc);
1030 return !!(sd_ctrl_read16_and_16_as_32(host, CTL_STATUS) &
1031 TMIO_STAT_SIGSTATE);
1034 static int tmio_multi_io_quirk(struct mmc_card *card,
1035 unsigned int direction, int blk_size)
1037 struct tmio_mmc_host *host = mmc_priv(card->host);
1039 if (host->multi_io_quirk)
1040 return host->multi_io_quirk(card, direction, blk_size);
1045 static struct mmc_host_ops tmio_mmc_ops = {
1046 .request = tmio_mmc_request,
1047 .set_ios = tmio_mmc_set_ios,
1048 .get_ro = tmio_mmc_get_ro,
1049 .get_cd = tmio_mmc_get_cd,
1050 .enable_sdio_irq = tmio_mmc_enable_sdio_irq,
1051 .multi_io_quirk = tmio_multi_io_quirk,
1054 static int tmio_mmc_init_ocr(struct tmio_mmc_host *host)
1056 struct tmio_mmc_data *pdata = host->pdata;
1057 struct mmc_host *mmc = host->mmc;
1060 err = mmc_regulator_get_supply(mmc);
1064 /* use ocr_mask if no regulator */
1065 if (!mmc->ocr_avail)
1066 mmc->ocr_avail = pdata->ocr_mask;
1070 * There is possibility that regulator has not been probed
1072 if (!mmc->ocr_avail)
1073 return -EPROBE_DEFER;
1078 static void tmio_mmc_of_parse(struct platform_device *pdev,
1079 struct mmc_host *mmc)
1081 const struct device_node *np = pdev->dev.of_node;
1088 * For new platforms, please use "disable-wp" instead of
1089 * "toshiba,mmc-wrprotect-disable"
1091 if (of_property_read_bool(np, "toshiba,mmc-wrprotect-disable"))
1092 mmc->caps2 |= MMC_CAP2_NO_WRITE_PROTECT;
1095 struct tmio_mmc_host *tmio_mmc_host_alloc(struct platform_device *pdev,
1096 struct tmio_mmc_data *pdata)
1098 struct tmio_mmc_host *host;
1099 struct mmc_host *mmc;
1103 ctl = devm_platform_ioremap_resource(pdev, 0);
1105 return ERR_CAST(ctl);
1107 mmc = mmc_alloc_host(sizeof(struct tmio_mmc_host), &pdev->dev);
1109 return ERR_PTR(-ENOMEM);
1111 host = mmc_priv(mmc);
1115 host->pdata = pdata;
1116 host->ops = tmio_mmc_ops;
1117 mmc->ops = &host->ops;
1119 ret = mmc_of_parse(host->mmc);
1121 host = ERR_PTR(ret);
1125 tmio_mmc_of_parse(pdev, mmc);
1127 platform_set_drvdata(pdev, host);
1135 EXPORT_SYMBOL_GPL(tmio_mmc_host_alloc);
1137 void tmio_mmc_host_free(struct tmio_mmc_host *host)
1139 mmc_free_host(host->mmc);
1141 EXPORT_SYMBOL_GPL(tmio_mmc_host_free);
1143 int tmio_mmc_host_probe(struct tmio_mmc_host *_host)
1145 struct platform_device *pdev = _host->pdev;
1146 struct tmio_mmc_data *pdata = _host->pdata;
1147 struct mmc_host *mmc = _host->mmc;
1151 * Check the sanity of mmc->f_min to prevent host->set_clock() from
1152 * looping forever...
1154 if (mmc->f_min == 0)
1157 if (!(pdata->flags & TMIO_MMC_HAS_IDLE_WAIT))
1158 _host->write16_hook = NULL;
1160 if (pdata->flags & TMIO_MMC_USE_BUSY_TIMEOUT && !_host->get_timeout_cycles)
1161 _host->get_timeout_cycles = tmio_mmc_get_timeout_cycles;
1163 _host->set_pwr = pdata->set_pwr;
1165 ret = tmio_mmc_init_ocr(_host);
1170 * Look for a card detect GPIO, if it fails with anything
1171 * else than a probe deferral, just live without it.
1173 ret = mmc_gpiod_request_cd(mmc, "cd", 0, false, 0);
1174 if (ret == -EPROBE_DEFER)
1177 mmc->caps |= MMC_CAP_4_BIT_DATA | pdata->capabilities;
1178 mmc->caps2 |= pdata->capabilities2;
1179 mmc->max_segs = pdata->max_segs ? : 32;
1180 mmc->max_blk_size = TMIO_MAX_BLK_SIZE;
1181 mmc->max_blk_count = pdata->max_blk_count ? :
1182 (PAGE_SIZE / mmc->max_blk_size) * mmc->max_segs;
1183 mmc->max_req_size = min_t(size_t,
1184 mmc->max_blk_size * mmc->max_blk_count,
1185 dma_max_mapping_size(&pdev->dev));
1186 mmc->max_seg_size = mmc->max_req_size;
1188 if (mmc_can_gpio_ro(mmc))
1189 _host->ops.get_ro = mmc_gpio_get_ro;
1191 if (mmc_can_gpio_cd(mmc))
1192 _host->ops.get_cd = mmc_gpio_get_cd;
1194 /* must be set before tmio_mmc_reset() */
1195 _host->native_hotplug = !(mmc_can_gpio_cd(mmc) ||
1196 mmc->caps & MMC_CAP_NEEDS_POLL ||
1197 !mmc_card_is_removable(mmc));
1200 * While using internal tmio hardware logic for card detection, we need
1201 * to ensure it stays powered for it to work.
1203 if (_host->native_hotplug)
1204 pm_runtime_get_noresume(&pdev->dev);
1206 _host->sdio_irq_enabled = false;
1207 if (pdata->flags & TMIO_MMC_SDIO_IRQ)
1208 _host->sdio_irq_mask = TMIO_SDIO_MASK_ALL;
1210 if (!_host->sdcard_irq_mask_all)
1211 _host->sdcard_irq_mask_all = TMIO_MASK_ALL;
1213 _host->set_clock(_host, 0);
1214 tmio_mmc_reset(_host, false);
1216 spin_lock_init(&_host->lock);
1217 mutex_init(&_host->ios_lock);
1219 /* Init delayed work for request timeouts */
1220 INIT_DELAYED_WORK(&_host->delayed_reset_work, tmio_mmc_reset_work);
1221 INIT_WORK(&_host->done, tmio_mmc_done_work);
1223 /* See if we also get DMA */
1224 tmio_mmc_request_dma(_host, pdata);
1226 pm_runtime_get_noresume(&pdev->dev);
1227 pm_runtime_set_active(&pdev->dev);
1228 pm_runtime_set_autosuspend_delay(&pdev->dev, 50);
1229 pm_runtime_use_autosuspend(&pdev->dev);
1230 pm_runtime_enable(&pdev->dev);
1232 ret = mmc_add_host(mmc);
1236 dev_pm_qos_expose_latency_limit(&pdev->dev, 100);
1237 pm_runtime_put(&pdev->dev);
1242 pm_runtime_put_noidle(&pdev->dev);
1243 tmio_mmc_host_remove(_host);
1246 EXPORT_SYMBOL_GPL(tmio_mmc_host_probe);
1248 void tmio_mmc_host_remove(struct tmio_mmc_host *host)
1250 struct platform_device *pdev = host->pdev;
1251 struct mmc_host *mmc = host->mmc;
1253 pm_runtime_get_sync(&pdev->dev);
1255 if (host->pdata->flags & TMIO_MMC_SDIO_IRQ)
1256 sd_ctrl_write16(host, CTL_TRANSACTION_CTL, 0x0000);
1258 dev_pm_qos_hide_latency_limit(&pdev->dev);
1260 mmc_remove_host(mmc);
1261 cancel_work_sync(&host->done);
1262 cancel_delayed_work_sync(&host->delayed_reset_work);
1263 tmio_mmc_release_dma(host);
1264 tmio_mmc_disable_mmc_irqs(host, host->sdcard_irq_mask_all);
1266 if (host->native_hotplug)
1267 pm_runtime_put_noidle(&pdev->dev);
1269 pm_runtime_disable(&pdev->dev);
1270 pm_runtime_dont_use_autosuspend(&pdev->dev);
1271 pm_runtime_put_noidle(&pdev->dev);
1273 EXPORT_SYMBOL_GPL(tmio_mmc_host_remove);
1276 static int tmio_mmc_clk_enable(struct tmio_mmc_host *host)
1278 if (!host->clk_enable)
1281 return host->clk_enable(host);
1284 static void tmio_mmc_clk_disable(struct tmio_mmc_host *host)
1286 if (host->clk_disable)
1287 host->clk_disable(host);
1290 int tmio_mmc_host_runtime_suspend(struct device *dev)
1292 struct tmio_mmc_host *host = dev_get_drvdata(dev);
1294 tmio_mmc_disable_mmc_irqs(host, host->sdcard_irq_mask_all);
1296 if (host->clk_cache)
1297 host->set_clock(host, 0);
1299 tmio_mmc_clk_disable(host);
1303 EXPORT_SYMBOL_GPL(tmio_mmc_host_runtime_suspend);
1305 int tmio_mmc_host_runtime_resume(struct device *dev)
1307 struct tmio_mmc_host *host = dev_get_drvdata(dev);
1309 tmio_mmc_clk_enable(host);
1310 tmio_mmc_reset(host, false);
1312 if (host->clk_cache)
1313 host->set_clock(host, host->clk_cache);
1315 tmio_mmc_enable_dma(host, true);
1319 EXPORT_SYMBOL_GPL(tmio_mmc_host_runtime_resume);
1322 MODULE_LICENSE("GPL v2");