1 /* _NVRM_COPYRIGHT_BEGIN_
3 * Copyright 1999-2001 by NVIDIA Corporation. All rights reserved. All
4 * information contained herein is proprietary and confidential to NVIDIA
5 * Corporation. Any use, reproduction, or disclosure without the written
6 * permission of NVIDIA Corporation is prohibited.
18 #define NV_MIN(_a,_b) ((_a) < (_b) ? (_a) : (_b))
21 #define NV_MAX(_a,_b) ((_a) > (_b) ? (_a) : (_b))
24 /* NVIDIA's reserved major character device number (Linux). */
25 #define NV_MAJOR_DEVICE_NUMBER 195
27 /* most cards in a single system */
28 #define NV_MAX_DEVICES 32
30 /* NOTE: using an ioctl() number > 55 will overflow! */
31 #define NV_IOCTL_MAGIC 'F'
32 #define NV_IOCTL_BASE 200
33 #define NV_ESC_CARD_INFO (NV_IOCTL_BASE + 0)
34 #define NV_ESC_ENV_INFO (NV_IOCTL_BASE + 2)
35 #define NV_ESC_ALLOC_OS_EVENT (NV_IOCTL_BASE + 6)
36 #define NV_ESC_FREE_OS_EVENT (NV_IOCTL_BASE + 7)
37 #define NV_ESC_STATUS_CODE (NV_IOCTL_BASE + 9)
38 #define NV_ESC_CHECK_VERSION_STR (NV_IOCTL_BASE + 10)
39 #define NV_ESC_IOCTL_XFER_CMD (NV_IOCTL_BASE + 11)
42 #define NV_PLATFORM_MAX_IOCTL_SIZE 255
43 #elif (defined(NV_LINUX) || defined(NV_BSD) || defined(NV_USER_MAP))
44 #define NV_PLATFORM_MAX_IOCTL_SIZE 4096
46 #error "The maximum ioctl() argument size is undefined!"
50 * #define an absolute maximum used as a sanity check for the
51 * NV_ESC_IOCTL_XFER_CMD ioctl() size argument.
53 #define NV_ABSOLUTE_MAX_IOCTL_SIZE 4096
56 * Solaris provides no more than 8 bits for the argument size in
57 * the ioctl() command encoding; make sure we don't exceed this
60 #define __NV_IOWR_ASSERT(type) ((sizeof(type) <= NV_PLATFORM_MAX_IOCTL_SIZE) ? 1 : -1)
61 #define __NV_IOWR(nr, type) ({ \
62 typedef char __NV_IOWR_TYPE_SIZE_ASSERT[__NV_IOWR_ASSERT(type)]; \
63 _IOWR(NV_IOCTL_MAGIC, (nr), type); \
67 * ioctl()'s with parameter structures too large for the
68 * _IOC cmd layout use the nv_ioctl_xfer_t structure
69 * and the NV_ESC_IOCTL_XFER_CMD ioctl() to pass the actual
70 * size and user argument pointer into the RM, which
71 * will then copy it to/from kernel space in separate steps.
73 typedef struct nv_ioctl_xfer
77 NvP64 ptr NV_ALIGN_BYTES(8);
80 typedef struct nv_ioctl_card_info
82 NvU16 flags; /* see below */
83 NvU8 bus; /* bus number (PCI, AGP, etc) */
84 NvU8 slot; /* card slot */
85 NvU16 vendor_id; /* PCI vendor id */
88 NvU64 reg_address NV_ALIGN_BYTES(8);
89 NvU64 reg_size NV_ALIGN_BYTES(8);
90 NvU64 fb_address NV_ALIGN_BYTES(8);
91 NvU64 fb_size NV_ALIGN_BYTES(8);
92 } nv_ioctl_card_info_t;
94 #define NV_IOCTL_CARD_INFO_BUS_TYPE_PCI 0x0001
95 #define NV_IOCTL_CARD_INFO_BUS_TYPE_AGP 0x0002
96 #define NV_IOCTL_CARD_INFO_BUS_TYPE_PCI_EXPRESS 0x0003
98 #define NV_IOCTL_CARD_INFO_FLAG_PRESENT 0x0001
99 #define NV_IOCTL_CARD_INFO_FLAG_NEED_MSYNC 0x0002
101 #define SIM_ENV_GPU 0
102 #define SIM_ENV_IKOS 1
103 #define SIM_ENV_CSIM 2
105 #define NV_SLI_DISABLED 0
106 #define NV_SLI_ENABLED 1
108 typedef struct nv_ioctl_env_info
111 } nv_ioctl_env_info_t;
115 * this used to be used to verify client/rm interaction both ways by
116 * overloading the structure passed into the NV_IOCTL_CARD_INFO ioctl.
117 * This interface is deprecated and NV_IOCTL_CHECK_VERSION_STR should
118 * be used instead. We keep the structure and defines here so that RM
119 * can recognize and handle old clients.
121 typedef struct nv_ioctl_rm_api_old_version
127 } nv_ioctl_rm_api_old_version_t;
129 #define NV_RM_API_OLD_VERSION_MAGIC_REQ 0x0197fade
130 #define NV_RM_API_OLD_VERSION_MAGIC_REP 0xbead2929
131 #define NV_RM_API_OLD_VERSION_MAGIC_LAX_REQ (NV_RM_API_OLD_VERSION_MAGIC_REQ ^ '1')
132 #define NV_RM_API_OLD_VERSION_MAGIC_OVERRIDE_REQ (NV_RM_API_OLD_VERSION_MAGIC_REQ ^ '2')
133 #define NV_RM_API_OLD_VERSION_MAGIC_IGNORE 0xffffffff
136 typedef struct nv_ioctl_alloc_os_event
143 } nv_ioctl_alloc_os_event_t;
146 typedef struct nv_ioctl_free_os_event
152 } nv_ioctl_free_os_event_t;
155 typedef struct nv_ioctl_status_code
160 } nv_ioctl_status_code_t;
162 /* check version string */
163 #define NV_RM_API_VERSION_STRING_LENGTH 64
165 typedef struct nv_ioctl_rm_api_version
169 char versionString[NV_RM_API_VERSION_STRING_LENGTH];
170 } nv_ioctl_rm_api_version_t;
172 #define NV_RM_API_VERSION_CMD_STRICT 0
173 #define NV_RM_API_VERSION_CMD_RELAXED '1'
174 #define NV_RM_API_VERSION_CMD_OVERRIDE '2'
176 #define NV_RM_API_VERSION_REPLY_UNRECOGNIZED 0
177 #define NV_RM_API_VERSION_REPLY_RECOGNIZED 1
182 * ptr arithmetic convenience
187 volatile V008 Reg008[1];
188 volatile V016 Reg016[1];
189 volatile V032 Reg032[1];
190 } nv_hwreg_t, * nv_phwreg_t;
193 #define NVRM_PCICFG_NUM_BARS 6
194 #define NVRM_PCICFG_BAR_OFFSET(i) (0x10 + (i) * 4)
195 #define NVRM_PCICFG_BAR_REQTYPE_MASK 0x00000001
196 #define NVRM_PCICFG_BAR_REQTYPE_MEMORY 0x00000000
197 #define NVRM_PCICFG_BAR_MEMTYPE_MASK 0x00000006
198 #define NVRM_PCICFG_BAR_MEMTYPE_64BIT 0x00000004
199 #define NVRM_PCICFG_BAR_ADDR_MASK 0xfffffff0
201 #define NV_GPU_NUM_BARS 3
202 #define NV_GPU_BAR_INDEX_REGS 0
203 #define NV_GPU_BAR_INDEX_FB 1
204 #define NV_GPU_BAR_INDEX_IMEM 2
223 #if defined(NVCPU_X86_64)
224 #define NV_STACK_SIZE (RM_PAGE_SIZE * 3)
226 #define NV_STACK_SIZE (RM_PAGE_SIZE * 2)
229 typedef struct nv_stack_s
233 U008 stack[NV_STACK_SIZE-16] __attribute__ ((aligned(16)));
237 * this is a wrapper for unix events
238 * unlike the events that will be returned to clients, this includes
239 * kernel-specific data, such as file pointer, etc..
241 typedef struct nv_event_s
246 void *file; /* per file-descriptor data pointer */
249 struct nv_event_s *next;
252 typedef struct nv_kern_mapping_s
256 struct nv_kern_mapping_s *next;
265 void *priv; /* private data */
266 void *os_state; /* os-specific device state */
271 /* PCI config info */
279 U032 pci_cfg_space[16];
281 /* physical characteristics */
282 nv_aperture_t bars[NV_GPU_NUM_BARS];
284 nv_aperture_t *fb, ud;
285 nv_aperture_t agp, bc;
287 NvU32 interrupt_line;
296 U032 rc_timer_enabled;
298 /* list of events allocated for this device */
299 nv_event_t *event_list;
301 nv_kern_mapping_t *kern_mappings;
303 BOOL nv_pm_S4_available;
304 BOOL is_passthru_mode;
310 /* PCI config info */
324 #define NV_FLAG_OPEN 0x0001
325 #define NV_FLAG_WAS_POSTED 0x0002
326 #define NV_FLAG_CONTROL 0x0004
327 #define NV_FLAG_MAP_REGS_EARLY 0x0008
328 #define NV_FLAG_USE_BAR0_CFG 0x0010
329 #define NV_FLAG_USES_MSI 0x0020
330 #define NV_FLAG_GVI 0x0040
331 #define NV_FLAG_GVI_IN_SUSPEND 0x0080
332 #define NV_FLAG_GVI_INTR_EN 0x0400
334 #define NV_PM_APM_SUSPEND 0x0001
335 #define NV_PM_APM_RESUME 0x0002
336 #define NV_PM_ACPI_HIBERNATE 0x0003
337 #define NV_PM_ACPI_STANDBY 0x0004
338 #define NV_PM_ACPI_RESUME 0x0005
340 #define NV_AGP_STATUS_DISABLED 0x0000
341 #define NV_AGP_STATUS_ENABLED 0x0001
342 #define NV_AGP_STATUS_FAILED 0x0002
344 #define NV_AGP_ENABLED(nv) ((nv)->agp_status & NV_AGP_STATUS_ENABLED)
345 #define NV_AGP_FAILED(nv) ((nv)->agp_status & NV_AGP_STATUS_FAILED)
347 #define NV_NVAGP_ENABLED(nv) ((nv)->agp_config & NVOS_AGP_CONFIG_NVAGP)
348 #define NV_OSAGP_ENABLED(nv) ((nv)->agp_config & NVOS_AGP_CONFIG_OSAGP)
350 #define NV_PRIMARY_VGA(nv) ((nv)->primary_vga)
352 #define NV_IS_GVI_DEVICE(nv) ((nv)->flags & NV_FLAG_GVI)
355 * The ACPI specification defines IDs for various ACPI video
356 * extension events like display switch events, AC/battery
357 * events, docking events, etc..
358 * Whenever an ACPI event is received by the corresponding
359 * event handler installed within the core NVIDIA driver, the
360 * code can verify the event ID before processing it.
362 #define ACPI_DISPLAY_DEVICE_CHANGE_EVENT 0x80
363 #define NVIF_NOTIFY_DISPLAY_DETECT 0xCB
364 #define NVIF_DISPLAY_DEVICE_CHANGE_EVENT NVIF_NOTIFY_DISPLAY_DETECT
366 * NVIDIA ACPI event IDs to be passed into the core NVIDIA
367 * driver for various events like display switch events,
368 * AC/battery events, docking events, etc..
370 #define NV_SYSTEM_ACPI_DISPLAY_SWITCH_EVENT 0x8001
371 #define NV_SYSTEM_ACPI_BATTERY_POWER_EVENT 0x8002
372 #define NV_SYSTEM_ACPI_DOCK_EVENT 0x8003
375 * Status bit definitions for display switch hotkey events.
377 #define NV_HOTKEY_STATUS_DISPLAY_ENABLE_LCD 0x01
378 #define NV_HOTKEY_STATUS_DISPLAY_ENABLE_CRT 0x02
379 #define NV_HOTKEY_STATUS_DISPLAY_ENABLE_TV 0x04
380 #define NV_HOTKEY_STATUS_DISPLAY_ENABLE_DFP 0x08
383 * NVIDIA ACPI sub-event IDs (event types) to be passed into
384 * to core NVIDIA driver for ACPI events.
386 #define NV_SYSTEM_ACPI_EVENT_VALUE_DISPLAY_SWITCH_DEFAULT 0
387 #define NV_SYSTEM_ACPI_EVENT_VALUE_POWER_EVENT_AC 0
388 #define NV_SYSTEM_ACPI_EVENT_VALUE_POWER_EVENT_BATTERY 1
389 #define NV_SYSTEM_ACPI_EVENT_VALUE_DOCK_EVENT_UNDOCKED 0
390 #define NV_SYSTEM_ACPI_EVENT_VALUE_DOCK_EVENT_DOCKED 1
392 #define NV_ACPI_NVIF_HANDLE_PRESENT 0x01
393 #define NV_ACPI_DSM_HANDLE_PRESENT 0x02
394 #define NV_ACPI_WMMX_HANDLE_PRESENT 0x04
395 #define NV_ACPI_MXMI_HANDLE_PRESENT 0x08
396 #define NV_ACPI_MXMS_HANDLE_PRESENT 0x10
398 #define NV_ACPI_METHOD_NVIF 0x01
399 #define NV_ACPI_METHOD_DSM_NBSI 0x02
400 #define NV_ACPI_METHOD_WMMX 0x03
401 #define NV_ACPI_METHOD_MXMI 0x04
402 #define NV_ACPI_METHOD_MXMS 0x05
404 #define NV_NBSI_REVISION_ID 0x00000101
407 ** where we hide our nv_state_t * ...
409 #define NV_SET_NV_STATE(pgpu,p) ((pgpu)->pOsHwInfo = (p))
410 #define NV_GET_NV_STATE(pgpu) ((nv_state_t *)(pgpu)->pOsHwInfo)
412 /* mmap(2) offsets */
414 #define IS_REG_OFFSET(nv, offset, length) \
415 (((offset) >= (nv)->regs->address) && \
416 (((offset) + ((length)-1)) <= (nv)->regs->address + ((nv)->regs->size-1)))
418 #define IS_FB_OFFSET(nv, offset, length) \
419 (((offset) >= (nv)->fb->address) && \
420 (((offset) + ((length)-1)) <= (nv)->fb->address + ((nv)->fb->size-1)))
422 #define IS_UD_OFFSET(nv, offset, length) \
423 (((nv)->ud.address != 0) && ((nv)->ud.size != 0) && \
424 ((offset) >= (nv)->ud.address) && \
425 (((offset) + ((length)-1)) <= (nv)->ud.address + ((nv)->ud.size-1)))
427 #define IS_BC_OFFSET(nv, offset, length) \
428 (((nv)->bc.address != 0) && ((nv)->bc.size != 0) && \
429 ((offset) >= (nv)->bc.address) && \
430 (((offset) + ((length)-1)) <= (nv)->bc.address + ((nv)->bc.size-1)))
432 #define IS_AGP_OFFSET(nv, offset, length) \
433 ((NV_AGP_ENABLED(nv)) && \
434 ((offset) >= (nv)->agp.address) && \
435 (((offset) + ((length)-1)) <= (nv)->agp.address + ((nv)->agp.size-1)))
437 /* duplicated from nvos.h for external builds */
438 #ifndef NVOS_AGP_CONFIG_DISABLE_AGP
439 # define NVOS_AGP_CONFIG_DISABLE_AGP (0x00000000)
441 #ifndef NVOS_AGP_CONFIG_NVAGP
442 # define NVOS_AGP_CONFIG_NVAGP (0x00000001)
444 #ifndef NVOS_AGP_CONFIG_OSAGP
445 # define NVOS_AGP_CONFIG_OSAGP (0x00000002)
447 #ifndef NVOS_AGP_CONFIG_ANYAGP
448 # define NVOS_AGP_CONFIG_ANYAGP (0x00000003)
452 /* device name length; must be atleast 8 */
454 #define NV_DEVICE_NAME_LENGTH 40
456 #define NV_MAX_ISR_DELAY_US 20000
457 #define NV_MAX_ISR_DELAY_MS (NV_MAX_ISR_DELAY_US / 1000)
459 #define NV_TIMERCMP(a, b, CMP) \
460 (((a)->tv_sec == (b)->tv_sec) ? \
461 ((a)->tv_usec CMP (b)->tv_usec) : ((a)->tv_sec CMP (b)->tv_sec))
463 #define NV_TIMERADD(a, b, result) \
465 (result)->tv_sec = (a)->tv_sec + (b)->tv_sec; \
466 (result)->tv_usec = (a)->tv_usec + (b)->tv_usec; \
467 if ((result)->tv_usec >= 1000000) \
469 ++(result)->tv_sec; \
470 (result)->tv_usec -= 1000000; \
474 #define NV_TIMERSUB(a, b, result) \
476 (result)->tv_sec = (a)->tv_sec - (b)->tv_sec; \
477 (result)->tv_usec = (a)->tv_usec - (b)->tv_usec; \
478 if ((result)->tv_usec < 0) \
480 --(result)->tv_sec; \
481 (result)->tv_usec += 1000000; \
485 #define NV_ALIGN_DOWN(v,g) ((v) & ~((g) - 1))
486 #define NV_ALIGN_UP(v,g) (((v) + ((g) - 1)) & ~((g) - 1))
489 * driver internal interfaces
495 * ---------------------------------------------------------------------------
497 * Function prototypes for UNIX specific OS interface.
499 * ---------------------------------------------------------------------------
503 * Make sure that arguments to and from the core resource manager
504 * are passed and expected on the stack. define duplicated in os-interface.h
506 #if !defined(NV_API_CALL)
507 #if defined(NVCPU_X86)
508 #if defined(__use_altstack__)
509 #define NV_API_CALL __attribute__((regparm(0),altstack(false)))
511 #define NV_API_CALL __attribute__((regparm(0)))
513 #elif defined(NVCPU_X86_64) && defined(__use_altstack__)
514 #define NV_API_CALL __attribute__((altstack(false)))
518 #endif /* !defined(NV_API_CALL) */
521 NvU64 NV_API_CALL nv_dma_to_mmap_token (nv_state_t *, NvU64);
523 void* NV_API_CALL nv_alloc_kernel_mapping (nv_state_t *, NvU64, U032, void **);
524 S032 NV_API_CALL nv_free_kernel_mapping (nv_state_t *, void *, void *, BOOL);
526 NvU64 NV_API_CALL nv_get_kern_phys_address (NvU64);
527 NvU64 NV_API_CALL nv_get_user_phys_address (NvU64);
528 void* NV_API_CALL nv_get_adapter_state (U016, U016);
530 void NV_API_CALL nv_lock_rm (nv_state_t *);
531 void NV_API_CALL nv_unlock_rm (nv_state_t *);
533 void NV_API_CALL nv_set_dma_address_size (nv_state_t *, U032 );
535 RM_STATUS NV_API_CALL nv_alias_pages (nv_state_t *, U032, U032, U032, NvU64, NvU64 *, void **);
536 RM_STATUS NV_API_CALL nv_alloc_pages (nv_state_t *, U032, U032, U032, U032, NvU64 *, void **);
537 RM_STATUS NV_API_CALL nv_free_pages (nv_state_t *, U032, U032, U032, U032, void *);
538 RM_STATUS NV_API_CALL nv_guest_pfn_list (nv_state_t *, unsigned int, unsigned int, unsigned int, unsigned int*);
540 RM_STATUS NV_API_CALL nv_agp_init (nv_state_t *, void **, void *, U032);
541 RM_STATUS NV_API_CALL nv_agp_teardown (nv_state_t *);
543 S032 NV_API_CALL nv_start_rc_timer (nv_state_t *);
544 S032 NV_API_CALL nv_stop_rc_timer (nv_state_t *);
546 void NV_API_CALL nv_post_event (nv_state_t *, nv_event_t *, U032, U032);
547 S032 NV_API_CALL nv_get_event (nv_state_t *, void *, nv_event_t *, U032 *);
549 S032 NV_API_CALL nv_no_incoherent_mappings (void);
551 void NV_API_CALL nv_verify_pci_config (nv_state_t *, BOOL);
553 void* NV_API_CALL nv_i2c_add_adapter (nv_state_t *, U032);
554 BOOL NV_API_CALL nv_i2c_del_adapter (nv_state_t *, void *);
556 void NV_API_CALL nv_acpi_methods_init (U032 *);
557 void NV_API_CALL nv_acpi_methods_uninit (void);
559 RM_STATUS NV_API_CALL nv_acpi_method (U032, U032, U032, void *, U016, U032 *, void *, U016 *);
560 void* NV_API_CALL nv_get_smu_state (void);
564 #else /* NV_USER_MAP */
565 #define NV_MAP_USER_SPACE(status, nv, va, sz, pr) do { } while (0)
566 #define NV_UNMAP_USER_SPACE(nv, va) do { } while (0)
567 #endif /* NV_USER_MAP */
570 * ---------------------------------------------------------------------------
572 * Function prototypes for Resource Manager interface.
574 * ---------------------------------------------------------------------------
577 BOOL NV_API_CALL rm_init_rm (nv_stack_t *);
578 BOOL NV_API_CALL rm_shutdown_rm (nv_stack_t *);
579 BOOL NV_API_CALL rm_init_private_state (nv_stack_t *, nv_state_t *);
580 BOOL NV_API_CALL rm_free_private_state (nv_stack_t *, nv_state_t *);
581 BOOL NV_API_CALL rm_init_adapter (nv_stack_t *, nv_state_t *);
582 BOOL NV_API_CALL rm_disable_adapter (nv_stack_t *, nv_state_t *);
583 BOOL NV_API_CALL rm_shutdown_adapter (nv_stack_t *, nv_state_t *);
584 void NV_API_CALL rm_set_interrupts (nv_stack_t *, BOOL);
585 BOOL NV_API_CALL rm_ioctl (nv_stack_t *, nv_state_t *, void *, U032, void *);
586 BOOL NV_API_CALL rm_isr (nv_stack_t *, nv_state_t *, U032 *);
587 void NV_API_CALL rm_isr_bh (nv_stack_t *, nv_state_t *);
588 RM_STATUS NV_API_CALL rm_power_management (nv_stack_t *, nv_state_t *, U032, U032);
589 RM_STATUS NV_API_CALL rm_save_low_res_mode (nv_stack_t *, nv_state_t *);
590 U032 NV_API_CALL rm_get_vbios_version (nv_stack_t *, nv_state_t *, U032 *, U032 *, U032 *, U032 *, U032 *);
591 void NV_API_CALL rm_free_unused_clients (nv_stack_t *, nv_state_t *, void *);
593 void NV_API_CALL rm_update_agp_config (nv_stack_t *, nv_state_t *);
594 RM_STATUS NV_API_CALL rm_init_agp (nv_stack_t *, nv_state_t *);
595 RM_STATUS NV_API_CALL rm_teardown_agp (nv_stack_t *, nv_state_t *);
597 RM_STATUS NV_API_CALL rm_alloc_agp_pages (nv_stack_t *, nv_state_t *, U032, void **, U032 *);
598 RM_STATUS NV_API_CALL rm_free_agp_pages (nv_stack_t *, nv_state_t *, void *);
600 RM_STATUS NV_API_CALL rm_alloc_agp_bitmap (nv_stack_t *, nv_state_t *, U032, U032 *);
601 RM_STATUS NV_API_CALL rm_free_agp_bitmap (nv_stack_t *, nv_state_t *, U032, U032);
602 RM_STATUS NV_API_CALL rm_set_agp_bitmap (nv_stack_t *, nv_state_t *, void *);
603 RM_STATUS NV_API_CALL rm_clear_agp_bitmap (nv_stack_t *, nv_state_t *, void **);
605 RM_STATUS NV_API_CALL rm_read_registry_dword (nv_stack_t *, nv_state_t *, U008 *, U008 *, U032 *);
606 RM_STATUS NV_API_CALL rm_write_registry_dword (nv_stack_t *, nv_state_t *, U008 *, U008 *, U032);
607 RM_STATUS NV_API_CALL rm_read_registry_binary (nv_stack_t *, nv_state_t *, U008 *, U008 *, U008 *, U032 *);
608 RM_STATUS NV_API_CALL rm_write_registry_binary (nv_stack_t *, nv_state_t *, U008 *, U008 *, U008 *, U032);
610 RM_STATUS NV_API_CALL rm_run_rc_callback (nv_stack_t *, nv_state_t *);
611 RM_STATUS NV_API_CALL rm_get_device_name (nv_stack_t *, nv_state_t *, U032, U032, U008*);
613 NvU64 NV_API_CALL nv_rdtsc (void);
615 void NV_API_CALL rm_register_compatible_ioctls (nv_stack_t *);
616 void NV_API_CALL rm_unregister_compatible_ioctls (nv_stack_t *);
618 BOOL NV_API_CALL rm_is_legacy_device (nv_stack_t *, U016, BOOL);
619 BOOL NV_API_CALL rm_is_supported_device (nv_stack_t *, nv_state_t *);
621 RM_STATUS NV_API_CALL rm_i2c_read_buffer (nv_stack_t *, nv_state_t *, void *, U008, U032, U008 *);
622 RM_STATUS NV_API_CALL rm_i2c_write_buffer (nv_stack_t *, nv_state_t *, void *, U008, U032, U008 *);
623 RM_STATUS NV_API_CALL rm_i2c_smbus_write_quick (nv_stack_t *, nv_state_t *, void *, U008, U008);
624 RM_STATUS NV_API_CALL rm_i2c_smbus_read_buffer (nv_stack_t *, nv_state_t *, void *, U008, U008, U032, U008 *);
625 RM_STATUS NV_API_CALL rm_i2c_smbus_write_buffer (nv_stack_t *, nv_state_t *, void *, U008, U008, U032, U008 *);
627 void NV_API_CALL rm_check_pci_config_space (nv_stack_t *, nv_state_t *nv, BOOL, BOOL, BOOL);
629 RM_STATUS NV_API_CALL rm_i2c_remove_adapters (nv_stack_t *, nv_state_t *);
631 RM_STATUS NV_API_CALL rm_perform_version_check (nv_stack_t *, nv_ioctl_rm_api_version_t *);
633 RM_STATUS NV_API_CALL rm_system_event (nv_stack_t *, U032, U032);
634 RM_STATUS NV_API_CALL rm_init_smu (nv_stack_t *, nv_smu_state_t *);
635 RM_STATUS NV_API_CALL rm_shutdown_smu (nv_stack_t *, nv_smu_state_t *);
636 RM_STATUS NV_API_CALL rm_suspend_smu (nv_stack_t *);
637 RM_STATUS NV_API_CALL rm_resume_smu (nv_stack_t *);
639 #define rm_disable_interrupts(sp) rm_set_interrupts((sp),FALSE)
640 #define rm_enable_interrupts(sp) rm_set_interrupts((sp),TRUE)
646 static inline int nv_count_bits(NvU64 word)
650 bits = (word & 0x5555555555555555ULL) + ((word >> 1) & 0x5555555555555555ULL);
651 bits = (bits & 0x3333333333333333ULL) + ((bits >> 2) & 0x3333333333333333ULL);
652 bits = (bits & 0x0f0f0f0f0f0f0f0fULL) + ((bits >> 4) & 0x0f0f0f0f0f0f0f0fULL);
653 bits = (bits & 0x00ff00ff00ff00ffULL) + ((bits >> 8) & 0x00ff00ff00ff00ffULL);
654 bits = (bits & 0x0000ffff0000ffffULL) + ((bits >> 16) & 0x0000ffff0000ffffULL);
655 bits = (bits & 0x00000000ffffffffULL) + ((bits >> 32) & 0x00000000ffffffffULL);