5 * \author Gareth Hughes <gareth@valinux.com>
9 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
10 * All Rights Reserved.
12 * Permission is hereby granted, free of charge, to any person obtaining a
13 * copy of this software and associated documentation files (the "Software"),
14 * to deal in the Software without restriction, including without limitation
15 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
16 * and/or sell copies of the Software, and to permit persons to whom the
17 * Software is furnished to do so, subject to the following conditions:
19 * The above copyright notice and this permission notice (including the next
20 * paragraph) shall be included in all copies or substantial portions of the
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
24 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
25 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
26 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
27 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
28 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
29 * OTHER DEALINGS IN THE SOFTWARE.
31 * $FreeBSD: head/sys/dev/drm2/radeon/radeon_drv.c 254885 2013-08-25 19:37:15Z dumbbell $
35 #include <uapi_drm/radeon_drm.h>
36 #include "radeon_drv.h"
37 #include "radeon_gem.h"
38 #include "radeon_kms.h"
39 #include "radeon_irq_kms.h"
41 #include <drm/drm_pciids.h>
45 * - 2.0.0 - initial interface
46 * - 2.1.0 - add square tiling interface
47 * - 2.2.0 - add r6xx/r7xx const buffer support
48 * - 2.3.0 - add MSPOS + 3D texture + r500 VAP regs
49 * - 2.4.0 - add crtc id query
50 * - 2.5.0 - add get accel 2 to work around ddx breakage for evergreen
51 * - 2.6.0 - add tiling config query (r6xx+), add initial HiZ support (r300->r500)
52 * 2.7.0 - fixups for r600 2D tiling support. (no external ABI change), add eg dyn gpr regs
53 * 2.8.0 - pageflip support, r500 US_FORMAT regs. r500 ARGB2101010 colorbuf, r300->r500 CMASK, clock crystal query
54 * 2.9.0 - r600 tiling (s3tc,rgtc) working, SET_PREDICATION packet 3 on r600 + eg, backend query
55 * 2.10.0 - fusion 2D tiling
56 * 2.11.0 - backend map, initial compute support for the CS checker
57 * 2.12.0 - RADEON_CS_KEEP_TILING_FLAGS
58 * 2.13.0 - virtual memory support, streamout
59 * 2.14.0 - add evergreen tiling informations
60 * 2.15.0 - add max_pipes query
61 * 2.16.0 - fix evergreen 2D tiled surface calculation
62 * 2.17.0 - add STRMOUT_BASE_UPDATE for r7xx
63 * 2.18.0 - r600-eg: allow "invalid" DB formats
64 * 2.19.0 - r600-eg: MSAA textures
65 * 2.20.0 - r600-si: RADEON_INFO_TIMESTAMP query
66 * 2.21.0 - r600-r700: FMASK and CMASK
67 * 2.22.0 - r600 only: RESOLVE_BOX allowed
68 * 2.23.0 - allow STRMOUT_BASE_UPDATE on RS780 and RS880
69 * 2.24.0 - eg only: allow MIP_ADDRESS=0 for MSAA textures
70 * 2.25.0 - eg+: new info request for num SE and num SH
71 * 2.26.0 - r600-eg: fix htile size computation
72 * 2.27.0 - r600-SI: Add CS ioctl support for async DMA
73 * 2.28.0 - r600-eg: Add MEM_WRITE packet support
74 * 2.29.0 - R500 FP16 color clear registers
75 * 2.30.0 - fix for FMASK texturing
76 * 2.31.0 - Add fastfb support for rs690
77 * 2.32.0 - new info request for rings working
78 * 2.33.0 - Add SI tiling mode array query
80 #define KMS_DRIVER_MAJOR 2
81 #define KMS_DRIVER_MINOR 33
82 #define KMS_DRIVER_PATCHLEVEL 0
83 int radeon_suspend_kms(struct drm_device *dev);
84 int radeon_resume_kms(struct drm_device *dev);
85 extern int radeon_get_crtc_scanoutpos(struct drm_device *dev, int crtc,
86 int *vpos, int *hpos);
87 extern struct drm_ioctl_desc radeon_ioctls_kms[];
88 extern int radeon_max_kms_ioctl;
90 int radeon_mmap(struct file *filp, struct vm_area_struct *vma);
91 #endif /* DUMBBELL_WIP */
92 int radeon_mode_dumb_mmap(struct drm_file *filp,
93 struct drm_device *dev,
94 uint32_t handle, uint64_t *offset_p);
95 int radeon_mode_dumb_create(struct drm_file *file_priv,
96 struct drm_device *dev,
97 struct drm_mode_create_dumb *args);
98 int radeon_mode_dumb_destroy(struct drm_file *file_priv,
99 struct drm_device *dev,
101 struct sg_table *radeon_gem_prime_get_sg_table(struct drm_gem_object *obj);
102 struct drm_gem_object *radeon_gem_prime_import_sg_table(struct drm_device *dev,
104 struct sg_table *sg);
105 int radeon_gem_prime_pin(struct drm_gem_object *obj);
106 void *radeon_gem_prime_vmap(struct drm_gem_object *obj);
107 void radeon_gem_prime_vunmap(struct drm_gem_object *obj, void *vaddr);
109 #if defined(CONFIG_DEBUG_FS)
110 int radeon_debugfs_init(struct drm_minor *minor);
111 void radeon_debugfs_cleanup(struct drm_minor *minor);
115 #if defined(CONFIG_VGA_SWITCHEROO)
116 void radeon_register_atpx_handler(void);
117 void radeon_unregister_atpx_handler(void);
119 static inline void radeon_register_atpx_handler(void) {}
120 static inline void radeon_unregister_atpx_handler(void) {}
124 int radeon_modeset = 1;
125 int radeon_dynclks = -1;
126 int radeon_r4xx_atom = 0;
127 int radeon_agpmode = 0;
128 int radeon_vram_limit = 0;
129 int radeon_gart_size = 512; /* default gart size */
130 int radeon_benchmarking = 0;
131 int radeon_testing = 0;
132 int radeon_connector_table = 0;
134 int radeon_audio = 0;
135 int radeon_disp_priority = 0;
136 int radeon_hw_i2c = 0;
137 int radeon_pcie_gen2 = -1;
139 int radeon_lockup_timeout = 10000;
140 int radeon_fastfb = 0;
142 static drm_pci_id_list_t pciidlist[] = {
146 #ifdef CONFIG_DRM_RADEON_UMS
149 MODULE_PARM_DESC(no_wb, "Disable AGP writeback for scratch registers");
150 module_param_named(no_wb, radeon_no_wb, int, 0444);
152 MODULE_PARM_DESC(modeset, "Disable/Enable modesetting");
153 module_param_named(modeset, radeon_modeset, int, 0400);
155 MODULE_PARM_DESC(dynclks, "Disable/Enable dynamic clocks");
156 module_param_named(dynclks, radeon_dynclks, int, 0444);
158 MODULE_PARM_DESC(r4xx_atom, "Enable ATOMBIOS modesetting for R4xx");
159 module_param_named(r4xx_atom, radeon_r4xx_atom, int, 0444);
161 MODULE_PARM_DESC(vramlimit, "Restrict VRAM for testing");
162 module_param_named(vramlimit, radeon_vram_limit, int, 0600);
164 MODULE_PARM_DESC(agpmode, "AGP Mode (-1 == PCI)");
165 module_param_named(agpmode, radeon_agpmode, int, 0444);
167 MODULE_PARM_DESC(gartsize, "Size of PCIE/IGP gart to setup in megabytes (32, 64, etc)");
168 module_param_named(gartsize, radeon_gart_size, int, 0600);
170 MODULE_PARM_DESC(benchmark, "Run benchmark");
171 module_param_named(benchmark, radeon_benchmarking, int, 0444);
173 MODULE_PARM_DESC(test, "Run tests");
174 module_param_named(test, radeon_testing, int, 0444);
176 MODULE_PARM_DESC(connector_table, "Force connector table");
177 module_param_named(connector_table, radeon_connector_table, int, 0444);
179 MODULE_PARM_DESC(tv, "TV enable (0 = disable)");
180 module_param_named(tv, radeon_tv, int, 0444);
182 MODULE_PARM_DESC(audio, "Audio enable (1 = enable)");
183 module_param_named(audio, radeon_audio, int, 0444);
185 MODULE_PARM_DESC(disp_priority, "Display Priority (0 = auto, 1 = normal, 2 = high)");
186 module_param_named(disp_priority, radeon_disp_priority, int, 0444);
188 MODULE_PARM_DESC(hw_i2c, "hw i2c engine enable (0 = disable)");
189 module_param_named(hw_i2c, radeon_hw_i2c, int, 0444);
191 MODULE_PARM_DESC(pcie_gen2, "PCIE Gen2 mode (-1 = auto, 0 = disable, 1 = enable)");
192 module_param_named(pcie_gen2, radeon_pcie_gen2, int, 0444);
194 MODULE_PARM_DESC(msi, "MSI support (1 = enable, 0 = disable, -1 = auto)");
195 module_param_named(msi, radeon_msi, int, 0444);
197 MODULE_PARM_DESC(lockup_timeout, "GPU lockup timeout in ms (defaul 10000 = 10 seconds, 0 = disable)");
198 module_param_named(lockup_timeout, radeon_lockup_timeout, int, 0444);
200 MODULE_PARM_DESC(fastfb, "Direct FB access for IGP chips (0 = disable, 1 = enable)");
201 module_param_named(fastfb, radeon_fastfb, int, 0444);
203 static int radeon_suspend(struct drm_device *dev, pm_message_t state)
205 drm_radeon_private_t *dev_priv = dev->dev_private;
207 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
210 /* Disable *all* interrupts */
211 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600)
212 RADEON_WRITE(R500_DxMODE_INT_MASK, 0);
213 RADEON_WRITE(RADEON_GEN_INT_CNTL, 0);
217 static int radeon_resume(struct drm_device *dev)
219 drm_radeon_private_t *dev_priv = dev->dev_private;
221 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
224 /* Restore interrupt registers */
225 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600)
226 RADEON_WRITE(R500_DxMODE_INT_MASK, dev_priv->r500_disp_irq_reg);
227 RADEON_WRITE(RADEON_GEN_INT_CNTL, dev_priv->irq_enable_reg);
230 #endif /* DUMBBELL_WIP */
233 static const struct file_operations radeon_driver_old_fops = {
234 .owner = THIS_MODULE,
236 .release = drm_release,
237 .unlocked_ioctl = drm_ioctl,
240 .fasync = drm_fasync,
243 .compat_ioctl = radeon_compat_ioctl,
245 .llseek = noop_llseek,
248 static struct drm_driver driver_old = {
250 DRIVER_USE_AGP | DRIVER_PCI_DMA | DRIVER_SG |
251 DRIVER_HAVE_IRQ | DRIVER_HAVE_DMA | DRIVER_IRQ_SHARED,
252 .dev_priv_size = sizeof(drm_radeon_buf_priv_t),
253 .load = radeon_driver_load,
254 .firstopen = radeon_driver_firstopen,
255 .open = radeon_driver_open,
256 .preclose = radeon_driver_preclose,
257 .postclose = radeon_driver_postclose,
258 .lastclose = radeon_driver_lastclose,
259 .unload = radeon_driver_unload,
261 .suspend = radeon_suspend,
262 .resume = radeon_resume,
263 #endif /* DUMBBELL_WIP */
264 .get_vblank_counter = radeon_get_vblank_counter,
265 .enable_vblank = radeon_enable_vblank,
266 .disable_vblank = radeon_disable_vblank,
267 .master_create = radeon_master_create,
268 .master_destroy = radeon_master_destroy,
269 .irq_preinstall = radeon_driver_irq_preinstall,
270 .irq_postinstall = radeon_driver_irq_postinstall,
271 .irq_uninstall = radeon_driver_irq_uninstall,
272 .irq_handler = radeon_driver_irq_handler,
273 .ioctls = radeon_ioctls,
274 .dma_ioctl = radeon_cp_buffers,
275 .fops = &radeon_driver_old_fops,
279 .major = DRIVER_MAJOR,
280 .minor = DRIVER_MINOR,
281 .patchlevel = DRIVER_PATCHLEVEL,
283 #endif /* DUMBBELL_WIP */
287 static struct drm_driver kms_driver;
290 static int radeon_kick_out_firmware_fb(struct pci_dev *pdev)
292 struct apertures_struct *ap;
293 bool primary = false;
295 ap = alloc_apertures(1);
299 ap->ranges[0].base = pci_resource_start(pdev, 0);
300 ap->ranges[0].size = pci_resource_len(pdev, 0);
303 primary = pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW;
305 remove_conflicting_framebuffers(ap, "radeondrmfb", primary);
311 static int radeon_pci_probe(struct pci_dev *pdev,
312 const struct pci_device_id *ent)
316 /* Get rid of things like offb */
317 ret = radeon_kick_out_firmware_fb(pdev);
321 return drm_get_pci_dev(pdev, ent, &kms_driver);
325 radeon_pci_remove(struct pci_dev *pdev)
327 struct drm_device *dev = pci_get_drvdata(pdev);
333 radeon_pci_suspend(struct pci_dev *pdev, pm_message_t state)
335 struct drm_device *dev = pci_get_drvdata(pdev);
336 return radeon_suspend_kms(dev, state);
340 radeon_pci_resume(struct pci_dev *pdev)
342 struct drm_device *dev = pci_get_drvdata(pdev);
343 return radeon_resume_kms(dev);
346 static const struct file_operations radeon_driver_kms_fops = {
347 .owner = THIS_MODULE,
349 .release = drm_release,
350 .unlocked_ioctl = drm_ioctl,
353 .fasync = drm_fasync,
356 .compat_ioctl = radeon_kms_compat_ioctl,
359 #endif /* DUMBBELL_WIP */
361 static struct drm_driver kms_driver = {
363 DRIVER_USE_AGP | DRIVER_PCI_DMA | DRIVER_SG |
364 DRIVER_HAVE_IRQ | DRIVER_HAVE_DMA | DRIVER_IRQ_SHARED | DRIVER_GEM |
365 DRIVER_PRIME /* | DRIVE_MODESET */,
368 #endif /* DUMBBELL_WIP */
369 .load = radeon_driver_load_kms,
370 .use_msi = radeon_msi_ok,
371 .firstopen = radeon_driver_firstopen_kms,
372 .open = radeon_driver_open_kms,
373 .preclose = radeon_driver_preclose_kms,
374 .postclose = radeon_driver_postclose_kms,
375 .lastclose = radeon_driver_lastclose_kms,
376 .unload = radeon_driver_unload_kms,
378 .suspend = radeon_suspend_kms,
379 .resume = radeon_resume_kms,
380 #endif /* DUMBBELL_WIP */
381 .get_vblank_counter = radeon_get_vblank_counter_kms,
382 .enable_vblank = radeon_enable_vblank_kms,
383 .disable_vblank = radeon_disable_vblank_kms,
384 .get_vblank_timestamp = radeon_get_vblank_timestamp_kms,
385 .get_scanout_position = radeon_get_crtc_scanoutpos,
386 .irq_preinstall = radeon_driver_irq_preinstall_kms,
387 .irq_postinstall = radeon_driver_irq_postinstall_kms,
388 .irq_uninstall = radeon_driver_irq_uninstall_kms,
389 .irq_handler = radeon_driver_irq_handler_kms,
390 .ioctls = radeon_ioctls_kms,
391 .gem_free_object = radeon_gem_object_free,
392 .gem_open_object = radeon_gem_object_open,
393 .gem_close_object = radeon_gem_object_close,
394 .dma_ioctl = radeon_dma_ioctl_kms,
395 .dumb_create = radeon_mode_dumb_create,
396 .dumb_map_offset = radeon_mode_dumb_mmap,
397 .dumb_destroy = radeon_mode_dumb_destroy,
399 .fops = &radeon_driver_kms_fops,
400 #endif /* DUMBBELL_WIP */
403 .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
404 .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
405 .gem_prime_export = drm_gem_prime_export,
406 .gem_prime_import = drm_gem_prime_import,
407 .gem_prime_pin = radeon_gem_prime_pin,
408 .gem_prime_get_sg_table = radeon_gem_prime_get_sg_table,
409 .gem_prime_import_sg_table = radeon_gem_prime_import_sg_table,
410 .gem_prime_vmap = radeon_gem_prime_vmap,
411 .gem_prime_vunmap = radeon_gem_prime_vunmap,
412 #endif /* DUMBBELL_WIP */
417 .major = KMS_DRIVER_MAJOR,
418 .minor = KMS_DRIVER_MINOR,
419 .patchlevel = KMS_DRIVER_PATCHLEVEL,
423 static int __init radeon_init(void)
425 if (radeon_modeset == 1) {
426 DRM_INFO("radeon kernel modesetting enabled.\n");
427 driver = &kms_driver;
428 pdriver = &radeon_kms_pci_driver;
429 driver->driver_features |= DRIVER_MODESET;
430 driver->num_ioctls = radeon_max_kms_ioctl;
431 radeon_register_atpx_handler();
434 #ifdef CONFIG_DRM_RADEON_UMS
435 DRM_INFO("radeon userspace modesetting enabled.\n");
436 driver = &driver_old;
437 pdriver = &radeon_pci_driver;
438 driver->driver_features &= ~DRIVER_MODESET;
439 driver->num_ioctls = radeon_max_ioctl;
441 DRM_ERROR("No UMS support in radeon module!\n");
446 /* let modprobe override vga console setting */
447 return drm_pci_init(driver, pdriver);
450 static void __exit radeon_exit(void)
452 drm_pci_exit(driver, pdriver);
453 radeon_unregister_atpx_handler();
455 #endif /* DUMBBELL_WIP */
457 /* =================================================================== */
460 radeon_probe(device_t kdev)
463 return drm_probe(kdev, pciidlist);
467 radeon_attach(device_t kdev)
469 struct drm_device *dev;
471 dev = device_get_softc(kdev);
472 if (radeon_modeset == 1) {
473 kms_driver.driver_features |= DRIVER_MODESET;
474 kms_driver.num_ioctls = radeon_max_kms_ioctl;
475 radeon_register_atpx_handler();
477 dev->driver = &kms_driver;
478 return (drm_attach(kdev, pciidlist));
482 radeon_suspend(device_t kdev)
484 struct drm_device *dev;
487 dev = device_get_softc(kdev);
488 ret = radeon_suspend_kms(dev);
494 radeon_resume(device_t kdev)
496 struct drm_device *dev;
499 dev = device_get_softc(kdev);
500 ret = radeon_resume_kms(dev);
505 static device_method_t radeon_methods[] = {
506 /* Device interface */
507 DEVMETHOD(device_probe, radeon_probe),
508 DEVMETHOD(device_attach, radeon_attach),
509 DEVMETHOD(device_suspend, radeon_suspend),
510 DEVMETHOD(device_resume, radeon_resume),
511 DEVMETHOD(device_detach, drm_release),
515 static driver_t radeon_driver = {
518 sizeof(struct drm_device)
521 extern devclass_t drm_devclass;
522 DRIVER_MODULE_ORDERED(radeonkms, vgapci, radeon_driver, drm_devclass,
523 NULL, NULL, SI_ORDER_ANY);
524 MODULE_DEPEND(radeonkms, drm, 1, 1, 1);
525 MODULE_DEPEND(radeonkms, agp, 1, 1, 1);
526 MODULE_DEPEND(radeonkms, iicbus, 1, 1, 1);
527 MODULE_DEPEND(radeonkms, iic, 1, 1, 1);
528 MODULE_DEPEND(radeonkms, iicbb, 1, 1, 1);