2 * Copyright (c) 1998 Doug Rabson
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * $FreeBSD: src/sys/i386/include/atomic.h,v 1.9.2.1 2000/07/07 00:38:47 obrien Exp $
28 #ifndef _CPU_ATOMIC_H_
29 #define _CPU_ATOMIC_H_
32 #include <sys/types.h>
36 * Various simple arithmetic on memory which is atomic in the presence
37 * of interrupts and multiple processors.
39 * atomic_set_char(P, V) (*(u_char*)(P) |= (V))
40 * atomic_clear_char(P, V) (*(u_char*)(P) &= ~(V))
41 * atomic_add_char(P, V) (*(u_char*)(P) += (V))
42 * atomic_subtract_char(P, V) (*(u_char*)(P) -= (V))
44 * atomic_set_short(P, V) (*(u_short*)(P) |= (V))
45 * atomic_clear_short(P, V) (*(u_short*)(P) &= ~(V))
46 * atomic_add_short(P, V) (*(u_short*)(P) += (V))
47 * atomic_subtract_short(P, V) (*(u_short*)(P) -= (V))
49 * atomic_set_int(P, V) (*(u_int*)(P) |= (V))
50 * atomic_clear_int(P, V) (*(u_int*)(P) &= ~(V))
51 * atomic_add_int(P, V) (*(u_int*)(P) += (V))
52 * atomic_subtract_int(P, V) (*(u_int*)(P) -= (V))
54 * atomic_set_long(P, V) (*(u_long*)(P) |= (V))
55 * atomic_clear_long(P, V) (*(u_long*)(P) &= ~(V))
56 * atomic_add_long(P, V) (*(u_long*)(P) += (V))
57 * atomic_subtract_long(P, V) (*(u_long*)(P) -= (V))
58 * atomic_readandclear_long(P) (return (*(u_long*)(P)); *(u_long*)(P) = 0;)
59 * atomic_readandclear_int(P) (return (*(u_int*)(P)); *(u_int*)(P) = 0;)
64 * lock elision (backwards compatible)
66 #define MPLOCKED "lock ; "
67 #define XACQUIRE "repne; " /* lock elision */
68 #define XRELEASE "repe; " /* lock elision */
71 * The assembly is volatilized to demark potential before-and-after side
72 * effects if an interrupt or SMP collision were to occur. The primary
73 * atomic instructions are MP safe, the nonlocked instructions are
74 * local-interrupt-safe (so we don't depend on C 'X |= Y' generating an
75 * atomic instruction).
77 * +m - memory is read and written (=m - memory is only written)
78 * iq - integer constant or %ax/%bx/%cx/%dx (ir = int constant or any reg)
79 * (Note: byte instructions only work on %ax,%bx,%cx, or %dx). iq
80 * is good enough for our needs so don't get fancy.
83 * NOTE: 64-bit immediate values are not supported for most x86-64
84 * instructions so we have to use "r".
87 /* egcs 1.1.2+ version */
88 #define ATOMIC_ASM(NAME, TYPE, OP, CONS, V) \
89 static __inline void \
90 atomic_##NAME##_##TYPE(volatile u_##TYPE *p, u_##TYPE v)\
92 __asm __volatile(MPLOCKED OP \
96 static __inline void \
97 atomic_##NAME##_##TYPE##_xacquire(volatile u_##TYPE *p, u_##TYPE v)\
99 __asm __volatile(XACQUIRE MPLOCKED OP \
103 static __inline void \
104 atomic_##NAME##_##TYPE##_xrelease(volatile u_##TYPE *p, u_##TYPE v)\
106 __asm __volatile(XRELEASE MPLOCKED OP \
110 static __inline void \
111 atomic_##NAME##_##TYPE##_nonlocked(volatile u_##TYPE *p, u_##TYPE v)\
113 __asm __volatile(OP \
118 /* egcs 1.1.2+ version */
119 ATOMIC_ASM(set, char, "orb %b1,%0", "iq", v)
120 ATOMIC_ASM(clear, char, "andb %b1,%0", "iq", ~v)
121 ATOMIC_ASM(add, char, "addb %b1,%0", "iq", v)
122 ATOMIC_ASM(subtract, char, "subb %b1,%0", "iq", v)
124 ATOMIC_ASM(set, short, "orw %w1,%0", "iq", v)
125 ATOMIC_ASM(clear, short, "andw %w1,%0", "iq", ~v)
126 ATOMIC_ASM(add, short, "addw %w1,%0", "iq", v)
127 ATOMIC_ASM(subtract, short, "subw %w1,%0", "iq", v)
129 ATOMIC_ASM(set, int, "orl %1,%0", "iq", v)
130 ATOMIC_ASM(clear, int, "andl %1,%0", "iq", ~v)
131 ATOMIC_ASM(add, int, "addl %1,%0", "iq", v)
132 ATOMIC_ASM(subtract, int, "subl %1,%0", "iq", v)
134 ATOMIC_ASM(set, long, "orq %1,%0", "r", v)
135 ATOMIC_ASM(clear, long, "andq %1,%0", "r", ~v)
136 ATOMIC_ASM(add, long, "addq %1,%0", "r", v)
137 ATOMIC_ASM(subtract, long, "subq %1,%0", "r", v)
139 static __inline u_long
140 atomic_readandclear_long(volatile u_long *addr)
147 "# atomic_readandclear_long"
148 : "+r" (res), /* 0 */
155 static __inline u_int
156 atomic_readandclear_int(volatile u_int *addr)
163 "# atomic_readandclear_int"
164 : "+r" (res), /* 0 */
172 * atomic_poll_acquire_int(P) Returns non-zero on success, 0 if the lock
173 * has already been acquired.
174 * atomic_poll_release_int(P)
176 * These support the NDIS driver and are also used for IPIQ interlocks
177 * between cpus. Both the acquisition and release must be
178 * cache-synchronizing instructions.
182 atomic_swap_int(volatile int *addr, int value)
184 __asm __volatile("xchgl %0, %1" :
185 "=r" (value), "=m" (*addr) : "0" (value) : "memory");
190 atomic_swap_long(volatile long *addr, long value)
192 __asm __volatile("xchgq %0, %1" :
193 "=r" (value), "=m" (*addr) : "0" (value) : "memory");
197 static __inline void *
198 atomic_swap_ptr(volatile void **addr, void *value)
200 __asm __volatile("xchgq %0, %1" :
201 "=r" (value), "=m" (*addr) : "0" (value) : "memory");
206 atomic_poll_acquire_int(volatile u_int *p)
210 __asm __volatile(MPLOCKED "btsl $0,%0; setnc %%al; andl $255,%%eax" : "+m" (*p), "=a" (data));
215 atomic_poll_release_int(volatile u_int *p)
217 __asm __volatile(MPLOCKED "btrl $0,%0" : "+m" (*p));
221 * These functions operate on a 32 bit interrupt interlock which is defined
224 * bit 0-29 interrupt handler wait counter
225 * bit 30 interrupt handler disabled bit
226 * bit 31 interrupt handler currently running bit (1 = run)
228 * atomic_intr_cond_test(P) Determine if the interlock is in an
229 * acquired state. Returns 0 if it not
230 * acquired, non-zero if it is. (not MPLOCKed)
232 * atomic_intr_cond_try(P) Attempt to set bit 31 to acquire the
233 * interlock. If we are unable to set bit 31
234 * we return 1, otherwise we return 0.
236 * atomic_intr_cond_enter(P, func, arg)
237 * Attempt to set bit 31 to acquire the
238 * interlock. If we are unable to set bit 31,
239 * the wait is incremented counter and func(arg)
240 * is called in a loop until we are able to set
241 * bit 31. Once we set bit 31, wait counter
244 * atomic_intr_cond_exit(P, func, arg)
245 * Clear bit 31. If the wait counter is still
246 * non-zero call func(arg) once.
248 * atomic_intr_handler_disable(P)
249 * Set bit 30, indicating that the interrupt
250 * handler has been disabled. Must be called
251 * after the hardware is disabled.
253 * Returns bit 31 indicating whether a serialized
254 * accessor is active (typically the interrupt
255 * handler is running). 0 == not active,
256 * non-zero == active.
258 * atomic_intr_handler_enable(P)
259 * Clear bit 30, indicating that the interrupt
260 * handler has been enabled. Must be called
261 * before the hardware is actually enabled.
263 * atomic_intr_handler_is_enabled(P)
264 * Returns bit 30, 0 indicates that the handler
265 * is enabled, non-zero indicates that it is
266 * disabled. The request counter portion of
267 * the field is ignored. (not MPLOCKed)
269 * atomic_intr_cond_inc(P) Increment wait counter by 1.
270 * atomic_intr_cond_dec(P) Decrement wait counter by 1.
274 atomic_intr_init(__atomic_intr_t *p)
280 atomic_intr_handler_disable(__atomic_intr_t *p)
284 __asm __volatile(MPLOCKED "orl $0x40000000,%1; movl %1,%%eax; " \
285 "andl $0x80000000,%%eax" \
286 : "=a"(data) , "+m"(*p));
291 atomic_intr_handler_enable(__atomic_intr_t *p)
293 __asm __volatile(MPLOCKED "andl $0xBFFFFFFF,%0" : "+m" (*p));
297 atomic_intr_handler_is_enabled(__atomic_intr_t *p)
301 __asm __volatile("movl %1,%%eax; andl $0x40000000,%%eax" \
302 : "=a"(data) : "m"(*p));
307 atomic_intr_cond_inc(__atomic_intr_t *p)
309 __asm __volatile(MPLOCKED "incl %0" : "+m" (*p));
313 atomic_intr_cond_dec(__atomic_intr_t *p)
315 __asm __volatile(MPLOCKED "decl %0" : "+m" (*p));
319 atomic_intr_cond_enter(__atomic_intr_t *p, void (*func)(void *), void *arg)
321 __asm __volatile(MPLOCKED "btsl $31,%0; jnc 3f; " \
322 MPLOCKED "incl %0; " \
324 MPLOCKED "btsl $31,%0; jnc 2f; " \
325 "movq %2,%%rdi; call *%1; " \
328 MPLOCKED "decl %0; " \
331 : "r"(func), "m"(arg) \
332 : "ax", "cx", "dx", "rsi", "rdi", "r8", "r9", "r10", "r11");
333 /* YYY the function call may clobber even more registers? */
337 * Attempt to enter the interrupt condition variable. Returns zero on
338 * success, 1 on failure.
341 atomic_intr_cond_try(__atomic_intr_t *p)
345 __asm __volatile("subl %%eax,%%eax; " \
346 MPLOCKED "btsl $31,%0; jnc 2f; " \
349 : "+m" (*p), "=&a"(ret)
356 atomic_intr_cond_test(__atomic_intr_t *p)
358 return((int)(*p & 0x80000000));
362 atomic_intr_cond_exit(__atomic_intr_t *p, void (*func)(void *), void *arg)
364 __asm __volatile(MPLOCKED "btrl $31,%0; " \
365 "testl $0x3FFFFFFF,%0; jz 1f; " \
366 "movq %2,%%rdi; call *%1; " \
369 : "r"(func), "m"(arg) \
370 : "ax", "cx", "dx", "rsi", "rdi", "r8", "r9", "r10", "r11");
371 /* YYY the function call may clobber even more registers? */
375 * Atomic compare and set
377 * if (*_dst == _old) *_dst = _new (all 32 bit words)
379 * Returns 0 on failure, non-zero on success. The inline is designed to
380 * allow the compiler to optimize the common case where the caller calls
381 * these functions from inside a conditional.
385 atomic_cmpxchg_int(volatile u_int *_dst, u_int _old, u_int _new)
389 __asm __volatile(MPLOCKED "cmpxchgl %2,%1; " \
390 : "+a" (res), "=m" (*_dst) \
391 : "r" (_new), "m" (*_dst) \
397 atomic_cmpxchg_long_test(volatile u_long *_dst, u_long _old, u_long _new)
401 __asm __volatile(MPLOCKED "cmpxchgq %2,%1; "
403 " movsbq %%al,%%rax" \
404 : "+a" (res), "=m" (*_dst) \
405 : "r" (_new), "m" (*_dst) \
411 atomic_cmpset_short(volatile u_short *_dst, u_short _old, u_short _new)
415 __asm __volatile(MPLOCKED "cmpxchgw %w2,%1; " \
416 : "+a" (res), "=m" (*_dst) \
417 : "r" (_new), "m" (*_dst) \
419 return (res == _old);
423 atomic_fcmpset_char(volatile u_char *_dst, u_char *_old, u_char _new)
427 __asm __volatile(MPLOCKED "cmpxchgb %2,%0; " \
428 : "+m" (*_dst), /* 0 */
432 return (res == *_old);
436 atomic_fcmpset_short(volatile u_short *_dst, u_short *_old, u_short _new)
440 __asm __volatile(MPLOCKED "cmpxchgw %2,%0; " \
441 : "+m" (*_dst), /* 0 */
445 return (res == *_old);
449 atomic_cmpset_int(volatile u_int *_dst, u_int _old, u_int _new)
453 __asm __volatile(MPLOCKED "cmpxchgl %2,%1; " \
454 : "+a" (res), "=m" (*_dst) \
455 : "r" (_new), "m" (*_dst) \
457 return (res == _old);
461 atomic_fcmpset_int(volatile u_int *_dst, u_int *_old, u_int _new)
465 __asm __volatile(MPLOCKED "cmpxchgl %2,%0; " \
466 : "+m" (*_dst), /* 0 */
470 return (res == *_old);
474 atomic_cmpset_int_xacquire(volatile u_int *_dst, u_int _old, u_int _new)
478 __asm __volatile(XACQUIRE MPLOCKED "cmpxchgl %2,%1; " \
479 : "+a" (res), "=m" (*_dst) \
480 : "r" (_new), "m" (*_dst) \
482 return (res == _old);
486 atomic_cmpset_int_xrelease(volatile u_int *_dst, u_int _old, u_int _new)
490 __asm __volatile(XRELEASE MPLOCKED "cmpxchgl %2,%1; " \
491 : "+a" (res), "=m" (*_dst) \
492 : "r" (_new), "m" (*_dst) \
494 return (res == _old);
498 atomic_cmpset_long(volatile u_long *_dst, u_long _old, u_long _new)
502 __asm __volatile(MPLOCKED "cmpxchgq %2,%1; " \
503 : "+a" (res), "=m" (*_dst) \
504 : "r" (_new), "m" (*_dst) \
506 return (res == _old);
510 atomic_fcmpset_long(volatile u_long *_dst, u_long *_old, u_long _new)
514 __asm __volatile(MPLOCKED "cmpxchgq %2,%0; " \
515 : "+m" (*_dst), /* 0 */
519 return (res == *_old);
523 atomic_cmpset_long_xacquire(volatile u_long *_dst, u_long _old, u_long _new)
527 __asm __volatile(XACQUIRE MPLOCKED "cmpxchgq %2,%1; " \
528 : "+a" (res), "=m" (*_dst) \
529 : "r" (_new), "m" (*_dst) \
531 return (res == _old);
535 atomic_cmpset_long_xrelease(volatile u_long *_dst, u_long _old, u_long _new)
539 __asm __volatile(XRELEASE MPLOCKED "cmpxchgq %2,%1; " \
540 : "+a" (res), "=m" (*_dst) \
541 : "r" (_new), "m" (*_dst) \
543 return (res == _old);
547 * Atomically add the value of v to the integer pointed to by p and return
548 * the previous value of *p.
550 static __inline u_int
551 atomic_fetchadd_int(volatile u_int *_p, u_int _v)
553 __asm __volatile(MPLOCKED "xaddl %0,%1; " \
554 : "+r" (_v), "=m" (*_p) \
560 static __inline u_int
561 atomic_fetchadd_int_xacquire(volatile u_int *_p, u_int _v)
563 __asm __volatile(XACQUIRE MPLOCKED "xaddl %0,%1; " \
564 : "+r" (_v), "=m" (*_p) \
570 static __inline u_int
571 atomic_fetchadd_int_xrelease(volatile u_int *_p, u_int _v)
573 __asm __volatile(XRELEASE MPLOCKED "xaddl %0,%1; " \
574 : "+r" (_v), "=m" (*_p) \
580 static __inline u_long
581 atomic_fetchadd_long(volatile u_long *_p, u_long _v)
583 __asm __volatile(MPLOCKED "xaddq %0,%1; " \
584 : "+r" (_v), "=m" (*_p) \
590 static __inline u_long
591 atomic_fetchadd_long_xacquire(volatile u_long *_p, u_long _v)
593 __asm __volatile(XACQUIRE MPLOCKED "xaddq %0,%1; " \
594 : "+r" (_v), "=m" (*_p) \
600 static __inline u_long
601 atomic_fetchadd_long_xrelease(volatile u_long *_p, u_long _v)
603 __asm __volatile(XRELEASE MPLOCKED "xaddq %0,%1; " \
604 : "+r" (_v), "=m" (*_p) \
611 atomic_testandset_int(volatile u_int *p, u_int v)
619 "# atomic_testandset_int"
620 : "=q" (res), /* 0 */
622 : "Ir" (v & 0x1f) /* 2 */
628 atomic_testandset_long(volatile u_long *p, u_long v)
636 "# atomic_testandset_int"
637 : "=q" (res), /* 0 */
639 : "Ir" (v & 0x3f) /* 2 */
645 atomic_testandclear_int(volatile u_int *p, u_int v)
653 "# atomic_testandclear_int"
654 : "=q" (res), /* 0 */
656 : "Ir" (v & 0x1f) /* 2 */
662 atomic_testandclear_long(volatile u_long *p, u_long v)
670 "# atomic_testandclear_int"
671 : "=q" (res), /* 0 */
673 : "Ir" (v & 0x3f) /* 2 */
678 #define ATOMIC_STORE_LOAD(TYPE, LOP, SOP) \
679 static __inline u_##TYPE \
680 atomic_load_acq_##TYPE(volatile u_##TYPE *p) \
682 u_##TYPE res; /* accumulator can be anything */ \
684 __asm __volatile(MPLOCKED LOP \
685 : "=a" (res), /* 0 */ \
694 * The XCHG instruction asserts LOCK automagically. \
696 static __inline void \
697 atomic_store_rel_##TYPE(volatile u_##TYPE *p, u_##TYPE v)\
699 __asm __volatile(SOP \
700 : "=m" (*p), /* 0 */ \
702 : "m" (*p)); /* 2 */ \
706 ATOMIC_STORE_LOAD(char, "cmpxchgb %b0,%1", "xchgb %b1,%0");
707 ATOMIC_STORE_LOAD(short,"cmpxchgw %w0,%1", "xchgw %w1,%0");
708 ATOMIC_STORE_LOAD(int, "cmpxchgl %0,%1", "xchgl %1,%0");
709 ATOMIC_STORE_LOAD(long, "cmpxchgq %0,%1", "xchgq %1,%0");
712 #undef ATOMIC_STORE_LOAD
714 /* Acquire and release variants are identical to the normal ones. */
715 #define atomic_set_acq_char atomic_set_char
716 #define atomic_set_rel_char atomic_set_char
717 #define atomic_clear_acq_char atomic_clear_char
718 #define atomic_clear_rel_char atomic_clear_char
719 #define atomic_add_acq_char atomic_add_char
720 #define atomic_add_rel_char atomic_add_char
721 #define atomic_subtract_acq_char atomic_subtract_char
722 #define atomic_subtract_rel_char atomic_subtract_char
724 #define atomic_set_acq_short atomic_set_short
725 #define atomic_set_rel_short atomic_set_short
726 #define atomic_clear_acq_short atomic_clear_short
727 #define atomic_clear_rel_short atomic_clear_short
728 #define atomic_add_acq_short atomic_add_short
729 #define atomic_add_rel_short atomic_add_short
730 #define atomic_subtract_acq_short atomic_subtract_short
731 #define atomic_subtract_rel_short atomic_subtract_short
733 #define atomic_set_acq_int atomic_set_int
734 #define atomic_set_rel_int atomic_set_int
735 #define atomic_clear_acq_int atomic_clear_int
736 #define atomic_clear_rel_int atomic_clear_int
737 #define atomic_add_acq_int atomic_add_int
738 #define atomic_add_rel_int atomic_add_int
739 #define atomic_subtract_acq_int atomic_subtract_int
740 #define atomic_subtract_rel_int atomic_subtract_int
741 #define atomic_cmpset_acq_int atomic_cmpset_int
742 #define atomic_cmpset_rel_int atomic_cmpset_int
744 #define atomic_set_acq_long atomic_set_long
745 #define atomic_set_rel_long atomic_set_long
746 #define atomic_clear_acq_long atomic_clear_long
747 #define atomic_clear_rel_long atomic_clear_long
748 #define atomic_add_acq_long atomic_add_long
749 #define atomic_add_rel_long atomic_add_long
750 #define atomic_subtract_acq_long atomic_subtract_long
751 #define atomic_subtract_rel_long atomic_subtract_long
752 #define atomic_cmpset_acq_long atomic_cmpset_long
753 #define atomic_cmpset_rel_long atomic_cmpset_long
755 /* cpumask_t is 64-bits on x86-64 */
756 #define atomic_set_cpumask atomic_set_long
757 #define atomic_clear_cpumask atomic_clear_long
758 #define atomic_cmpset_cpumask atomic_cmpset_long
759 #define atomic_store_rel_cpumask atomic_store_rel_long
760 #define atomic_load_acq_cpumask atomic_load_acq_long
762 /* Operations on 8-bit bytes. */
763 #define atomic_set_8 atomic_set_char
764 #define atomic_set_acq_8 atomic_set_acq_char
765 #define atomic_set_rel_8 atomic_set_rel_char
766 #define atomic_clear_8 atomic_clear_char
767 #define atomic_clear_acq_8 atomic_clear_acq_char
768 #define atomic_clear_rel_8 atomic_clear_rel_char
769 #define atomic_add_8 atomic_add_char
770 #define atomic_add_acq_8 atomic_add_acq_char
771 #define atomic_add_rel_8 atomic_add_rel_char
772 #define atomic_subtract_8 atomic_subtract_char
773 #define atomic_subtract_acq_8 atomic_subtract_acq_char
774 #define atomic_subtract_rel_8 atomic_subtract_rel_char
775 #define atomic_load_acq_8 atomic_load_acq_char
776 #define atomic_store_rel_8 atomic_store_rel_char
777 #define atomic_fcmpset_8 atomic_fcmpset_char
779 /* Operations on 16-bit words. */
780 #define atomic_set_16 atomic_set_short
781 #define atomic_set_acq_16 atomic_set_acq_short
782 #define atomic_set_rel_16 atomic_set_rel_short
783 #define atomic_clear_16 atomic_clear_short
784 #define atomic_clear_acq_16 atomic_clear_acq_short
785 #define atomic_clear_rel_16 atomic_clear_rel_short
786 #define atomic_add_16 atomic_add_short
787 #define atomic_add_acq_16 atomic_add_acq_short
788 #define atomic_add_rel_16 atomic_add_rel_short
789 #define atomic_subtract_16 atomic_subtract_short
790 #define atomic_subtract_acq_16 atomic_subtract_acq_short
791 #define atomic_subtract_rel_16 atomic_subtract_rel_short
792 #define atomic_load_acq_16 atomic_load_acq_short
793 #define atomic_store_rel_16 atomic_store_rel_short
794 #define atomic_fcmpset_16 atomic_fcmpset_short
796 /* Operations on 32-bit double words. */
797 #define atomic_set_32 atomic_set_int
798 #define atomic_set_acq_32 atomic_set_acq_int
799 #define atomic_set_rel_32 atomic_set_rel_int
800 #define atomic_clear_32 atomic_clear_int
801 #define atomic_clear_acq_32 atomic_clear_acq_int
802 #define atomic_clear_rel_32 atomic_clear_rel_int
803 #define atomic_add_32 atomic_add_int
804 #define atomic_add_acq_32 atomic_add_acq_int
805 #define atomic_add_rel_32 atomic_add_rel_int
806 #define atomic_subtract_32 atomic_subtract_int
807 #define atomic_subtract_acq_32 atomic_subtract_acq_int
808 #define atomic_subtract_rel_32 atomic_subtract_rel_int
809 #define atomic_load_acq_32 atomic_load_acq_int
810 #define atomic_store_rel_32 atomic_store_rel_int
811 #define atomic_cmpset_32 atomic_cmpset_int
812 #define atomic_fcmpset_32 atomic_fcmpset_int
813 #define atomic_cmpset_acq_32 atomic_cmpset_acq_int
814 #define atomic_cmpset_rel_32 atomic_cmpset_rel_int
815 #define atomic_readandclear_32 atomic_readandclear_int
816 #define atomic_fetchadd_32 atomic_fetchadd_int
818 /* Operations on 64-bit quad words. */
819 #define atomic_load_acq_64 atomic_load_acq_long
820 #define atomic_store_rel_64 atomic_store_rel_long
821 #define atomic_swap_64 atomic_swap_long
822 #define atomic_fetchadd_64 atomic_fetchadd_long
823 #define atomic_add_64 atomic_add_long
824 #define atomic_cmpset_64 atomic_cmpset_long
825 #define atomic_fcmpset_64 atomic_fcmpset_long
826 #define atomic_set_64 atomic_set_long
827 #define atomic_clear_64 atomic_clear_long
829 /* Operations on pointers. */
830 #define atomic_set_ptr(p, v) \
831 atomic_set_long((volatile u_long *)(p), (u_long)(v))
832 #define atomic_set_acq_ptr(p, v) \
833 atomic_set_acq_long((volatile u_long *)(p), (u_long)(v))
834 #define atomic_set_rel_ptr(p, v) \
835 atomic_set_rel_long((volatile u_long *)(p), (u_long)(v))
836 #define atomic_clear_ptr(p, v) \
837 atomic_clear_long((volatile u_long *)(p), (u_long)(v))
838 #define atomic_clear_acq_ptr(p, v) \
839 atomic_clear_acq_long((volatile u_long *)(p), (u_long)(v))
840 #define atomic_clear_rel_ptr(p, v) \
841 atomic_clear_rel_long((volatile u_long *)(p), (u_long)(v))
842 #define atomic_add_ptr(p, v) \
843 atomic_add_long((volatile u_long *)(p), (u_long)(v))
844 #define atomic_add_acq_ptr(p, v) \
845 atomic_add_acq_long((volatile u_long *)(p), (u_long)(v))
846 #define atomic_add_rel_ptr(p, v) \
847 atomic_add_rel_long((volatile u_long *)(p), (u_long)(v))
848 #define atomic_subtract_ptr(p, v) \
849 atomic_subtract_long((volatile u_long *)(p), (u_long)(v))
850 #define atomic_subtract_acq_ptr(p, v) \
851 atomic_subtract_acq_long((volatile u_long *)(p), (u_long)(v))
852 #define atomic_subtract_rel_ptr(p, v) \
853 atomic_subtract_rel_long((volatile u_long *)(p), (u_long)(v))
854 #define atomic_load_acq_ptr(p) \
855 atomic_load_acq_long((volatile u_long *)(p))
856 #define atomic_store_rel_ptr(p, v) \
857 atomic_store_rel_long((volatile u_long *)(p), (v))
858 #define atomic_cmpset_ptr(dst, old, new) \
859 atomic_cmpset_long((volatile u_long *)(dst), (u_long)(old), \
861 #define atomic_fcmpset_ptr(dst, old, new) \
862 atomic_fcmpset_long((volatile u_long *)(dst), (u_long *)(old), \
864 #define atomic_cmpset_acq_ptr(dst, old, new) \
865 atomic_cmpset_acq_long((volatile u_long *)(dst), (u_long)(old), \
867 #define atomic_cmpset_rel_ptr(dst, old, new) \
868 atomic_cmpset_rel_long((volatile u_long *)(dst), (u_long)(old), \
870 #define atomic_readandclear_ptr(p) \
871 atomic_readandclear_long((volatile u_long *)(p))
873 #endif /* ! _CPU_ATOMIC_H_ */