2 * Intel PCIC or compatible Controller driver
3 *-------------------------------------------------------------------------
5 * Copyright (c) 2001 M. Warner Losh. All rights reserved.
6 * Copyright (c) 1995 Andrew McRae. All rights reserved.
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * 3. The name of the author may not be used to endorse or promote products
17 * derived from this software without specific prior written permission.
19 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
20 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
21 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
22 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
23 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
24 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
25 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
26 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
27 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
28 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
30 * $FreeBSD: src/sys/pccard/pcic.c,v 1.89.2.28 2003/02/26 18:42:00 imp Exp $
31 * $DragonFly: src/sys/bus/pccard/Attic/pcic.c,v 1.2 2003/06/17 04:28:55 dillon Exp $
34 #include <sys/param.h>
36 #include <sys/kernel.h>
37 #include <sys/module.h>
38 #include <sys/sysctl.h>
39 #include <sys/systm.h>
41 #include <machine/clock.h>
42 #include <pccard/i82365.h>
43 #include <pccard/pcic_pci.h>
44 #include <pccard/cardinfo.h>
45 #include <pccard/slot.h>
46 #include <pccard/pcicvar.h>
49 #include <isa/isavar.h>
50 #include <dev/pcic/i82365reg.h>
52 #include <dev/pccard/pccardvar.h>
56 * Prototypes for interrupt handler.
58 static int pcic_ioctl(struct slot *, int, caddr_t);
59 static int pcic_power(struct slot *);
60 static void pcic_mapirq(struct slot *, int);
61 static timeout_t pcic_reset;
62 static void pcic_resume(struct slot *);
63 static void pcic_disable(struct slot *);
64 static int pcic_memory(struct slot *, int);
65 static int pcic_io(struct slot *, int);
67 devclass_t pcic_devclass;
69 static struct slot_ctrl pcic_cinfo = {
83 SYSCTL_NODE(_hw, OID_AUTO, pcic, CTLFLAG_RD, 0, "PCIC parameters");
85 int pcic_override_irq = 0;
86 TUNABLE_INT("machdep.pccard.pcic_irq", &pcic_override_irq);
87 TUNABLE_INT("hw.pcic.irq", &pcic_override_irq);
88 SYSCTL_INT(_hw_pcic, OID_AUTO, irq, CTLFLAG_RD,
89 &pcic_override_irq, 0,
90 "Override the IRQ configured by the config system for all pcic devices");
92 int pcic_boot_deactivated = 0;
93 TUNABLE_INT("hw.pcic.boot_deactivated", &pcic_boot_deactivated);
94 SYSCTL_INT(_hw_pcic, OID_AUTO, boot_deactivated, CTLFLAG_RD,
95 &pcic_boot_deactivated, 0,
96 "Override the automatic powering up of pccards at boot. This works\n\
97 around what turns out to be an old bug in the code that has since been\n\
98 corrected. It is now deprecated and will be removed completely before\n\
102 * CL-PD6722's VSENSE method
103 * 0: NO VSENSE (assume a 5.0V card)
104 * 1: 6710's method (default)
107 int pcic_pd6722_vsense = 1;
108 TUNABLE_INT("hw.pcic.pd6722_vsense", &pcic_pd6722_vsense);
109 SYSCTL_INT(_hw_pcic, OID_AUTO, pd6722_vsense, CTLFLAG_RD,
110 &pcic_pd6722_vsense, 1,
111 "Select CL-PD6722's VSENSE method. VSENSE is used to determine the\n\
112 volatage of inserted cards. The CL-PD6722 has two methods to determine the\n\
113 voltage of the card. 0 means assume a 5.0V card and do not check. 1 means\n\
114 use the same method that the CL-PD6710 uses (default). 2 means use the\n\
115 same method as the CL-PD6729. 2 is documented in the datasheet as being\n\
116 the correct way, but 1 seems to give better results on more laptops.");
119 * Read a register from the PCIC.
122 pcic_getb_io(struct pcic_slot *sp, int reg)
124 bus_space_write_1(sp->bst, sp->bsh, PCIC_INDEX, sp->offset + reg);
125 return (bus_space_read_1(sp->bst, sp->bsh, PCIC_DATA));
129 * Write a register on the PCIC
132 pcic_putb_io(struct pcic_slot *sp, int reg, unsigned char val)
135 * Many datasheets recommend using outw rather than outb to save
136 * a microsecond. Maybe we should do this, but we'd likely only
137 * save 20-30us on card activation.
139 bus_space_write_1(sp->bst, sp->bsh, PCIC_INDEX, sp->offset + reg);
140 bus_space_write_1(sp->bst, sp->bsh, PCIC_DATA, val);
144 * Clear bit(s) of a register.
147 pcic_clrb(struct pcic_slot *sp, int reg, unsigned char mask)
149 sp->putb(sp, reg, sp->getb(sp, reg) & ~mask);
153 * Set bit(s) of a register
156 pcic_setb(struct pcic_slot *sp, int reg, unsigned char mask)
158 sp->putb(sp, reg, sp->getb(sp, reg) | mask);
162 * Write a 16 bit value to 2 adjacent PCIC registers
165 pcic_putw(struct pcic_slot *sp, int reg, unsigned short word)
167 sp->putb(sp, reg, word & 0xFF);
168 sp->putb(sp, reg + 1, (word >> 8) & 0xff);
172 * pc98 cbus cards introduce a slight wrinkle here. They route the irq7 pin
173 * from the pcic chip to INT 2 on the cbus. INT 2 is normally mapped to
174 * irq 6 on the pc98 architecture, so if we get a request for irq 6
175 * lie to the hardware and say it is 7. All the other usual mappings for
176 * cbus INT into irq space are the same as the rest of the system.
179 host_irq_to_pcic(int irq)
189 * Free up resources allocated so far.
192 pcic_dealloc(device_t dev)
194 struct pcic_softc *sc;
196 sc = (struct pcic_softc *) device_get_softc(dev);
198 untimeout(sc->slot_poll, sc, sc->timeout_ch);
200 bus_release_resource(dev, SYS_RES_IOPORT, sc->iorid,
203 bus_release_resource(dev, SYS_RES_MEMORY, sc->memrid,
206 bus_teardown_intr(dev, sc->irqres, sc->ih);
208 bus_release_resource(dev, SYS_RES_IRQ, sc->irqrid, sc->irqres);
212 * entry point from main code to map/unmap memory context.
215 pcic_memory(struct slot *slt, int win)
217 struct pcic_slot *sp = slt->cdata;
218 struct mem_desc *mp = &slt->mem[win];
219 int reg = win * PCIC_MEMSIZE + PCIC_MEMBASE;
221 if (win < 0 || win >= slt->ctrl->maxmem) {
222 printf("Illegal PCIC MEMORY window request %d\n", win);
225 if (mp->flags & MDF_ACTIVE) {
226 unsigned long sys_addr = (uintptr_t)(void *)mp->start >> 12;
227 if ((sys_addr >> 12) != 0 &&
228 (sp->sc->flags & PCIC_YENTA_HIGH_MEMORY) == 0) {
229 printf("This pcic does not support mapping > 24M\n");
233 * Write the addresses, card offsets and length.
234 * The values are all stored as the upper 12 bits of the
235 * 24 bit address i.e everything is allocated as 4 Kb chunks.
236 * Memory mapped cardbus bridges extend this slightly to allow
237 * one to set the upper 8 bits of the 32bit address as well.
238 * If the chip supports it, then go ahead and write those
241 pcic_putw(sp, reg, sys_addr & 0xFFF);
242 pcic_putw(sp, reg+2, (sys_addr + (mp->size >> 12) - 1) & 0xFFF);
243 pcic_putw(sp, reg+4, ((mp->card >> 12) - sys_addr) & 0x3FFF);
244 if (sp->sc->flags & PCIC_YENTA_HIGH_MEMORY)
245 sp->putb(sp, PCIC_MEMORY_HIGH0 + win, sys_addr >> 12);
247 * Each 16 bit register has some flags in the upper bits.
249 if (mp->flags & MDF_16BITS)
250 pcic_setb(sp, reg+1, PCIC_DATA16);
251 if (mp->flags & MDF_ZEROWS)
252 pcic_setb(sp, reg+1, PCIC_ZEROWS);
253 if (mp->flags & MDF_WS0)
254 pcic_setb(sp, reg+3, PCIC_MW0);
255 if (mp->flags & MDF_WS1)
256 pcic_setb(sp, reg+3, PCIC_MW1);
257 if (mp->flags & MDF_ATTR)
258 pcic_setb(sp, reg+5, PCIC_REG);
259 if (mp->flags & MDF_WP)
260 pcic_setb(sp, reg+5, PCIC_WP);
262 * Enable the memory window. By experiment, we need a delay.
264 pcic_setb(sp, PCIC_ADDRWINE, (1<<win) | PCIC_MEMCS16);
267 pcic_clrb(sp, PCIC_ADDRWINE, 1<<win);
268 pcic_putw(sp, reg, 0);
269 pcic_putw(sp, reg+2, 0);
270 pcic_putw(sp, reg+4, 0);
276 * pcic_io - map or unmap I/O context
279 pcic_io(struct slot *slt, int win)
282 struct pcic_slot *sp = slt->cdata;
283 struct io_desc *ip = &slt->io[win];
285 printf("pcic: I/O win %d flags %x %x-%x\n", win, ip->flags,
286 ip->start, ip->start + ip->size - 1);
299 printf("Illegal PCIC I/O window request %d\n", win);
302 if (ip->flags & IODF_ACTIVE) {
303 unsigned char x, ioctlv;
305 pcic_putw(sp, reg, ip->start);
306 pcic_putw(sp, reg+2, ip->start + ip->size - 1);
308 if (ip->flags & IODF_ZEROWS)
310 if (ip->flags & IODF_WS)
312 if (ip->flags & IODF_CS16)
314 if (ip->flags & IODF_16BIT)
317 * Extract the current flags and merge with new flags.
318 * Flags for window 0 in lower nybble, and in upper nybble
321 ioctlv = sp->getb(sp, PCIC_IOCTL);
325 sp->putb(sp, PCIC_IOCTL, x | (ioctlv & 0xf0));
328 sp->putb(sp, PCIC_IOCTL, (x << 4) | (ioctlv & 0xf));
332 pcic_setb(sp, PCIC_ADDRWINE, mask);
335 pcic_clrb(sp, PCIC_ADDRWINE, mask);
337 pcic_putw(sp, reg, 0);
338 pcic_putw(sp, reg + 2, 0);
344 pcic_do_mgt_irq(struct pcic_slot *sp, int irq)
348 if (sp->sc->csc_route == pcic_iw_pci) {
349 /* Do the PCI side of things: Enable the Card Change int */
351 bus_space_write_4(sp->bst, sp->bsh, CB_SOCKET_MASK, reg);
353 * TI Chips need us to set the following. We tell the
354 * controller to route things via PCI interrupts. Also
355 * we clear the interrupt number in the STAT_INT register
356 * as well. The TI-12xx and newer chips require one or the
357 * other of these to happen, depending on what is set in the
358 * diagnostic register. I do both on the theory that other
359 * chips might need one or the other and that no harm will
360 * come from it. If there is harm, then I'll make it a bit
363 pcic_setb(sp, PCIC_INT_GEN, PCIC_INTR_ENA);
364 pcic_clrb(sp, PCIC_STAT_INT, PCIC_CSCSELECT);
366 /* Management IRQ changes */
368 * The PCIC_INTR_ENA bit means either "tie the function
369 * and csc interrupts together" or "Route csc interrupts
370 * via PCI" or "Reserved". In any case, we want to clear
371 * it since we're using ISA interrupts.
373 pcic_clrb(sp, PCIC_INT_GEN, PCIC_INTR_ENA);
374 irq = host_irq_to_pcic(irq);
375 sp->putb(sp, PCIC_STAT_INT, (irq << PCIC_SI_IRQ_SHIFT) |
381 pcic_attach(device_t dev)
385 struct pcic_softc *sc;
387 struct pcic_slot *sp;
389 sc = (struct pcic_softc *) device_get_softc(dev);
390 callout_handle_init(&sc->timeout_ch);
392 for (i = 0; i < PCIC_CARD_SLOTS; i++, sp++) {
396 kid = device_add_child(dev, NULL, -1);
398 device_printf(dev, "Can't add pccard bus slot %d", i);
401 device_probe_and_attach(kid);
402 slt = pccard_init_slot(kid, &pcic_cinfo);
404 device_printf(dev, "Can't get pccard info slot %d", i);
407 sc->slotmask |= (1 << i);
414 for (i = 0; i < PCIC_CARD_SLOTS; i++, sp++) {
418 pcic_do_mgt_irq(sp, sc->irq);
419 sp->slt->irq = sc->irq;
421 /* Check for changes */
422 sp->slt->laststate = sp->slt->state = empty;
423 if (pcic_boot_deactivated) {
424 sp->putb(sp, PCIC_POWER, 0);
425 if ((sp->getb(sp, PCIC_STATUS) & PCIC_CD) == PCIC_CD) {
426 sp->slt->state = inactive;
427 pccard_event(sp->slt, card_deactivated);
430 pcic_do_stat_delta(sp);
434 return (bus_generic_attach(dev));
439 pcic_sresource(struct slot *slt, caddr_t data)
441 struct pccard_resource *pr;
445 device_t bridgedev = slt->dev;
446 struct pcic_slot *sp = slt->cdata;
448 pr = (struct pccard_resource *)data;
449 pr->resource_addr = ~0ul;
452 * If we're using PCI interrupt routing, then force the IRQ to
453 * use and to heck with what the user requested. If they want
454 * to be able to request IRQs, they must use ISA interrupt
455 * routing. If we don't give them an irq, and it is the
456 * pccardd 0,0 case, then just return (giving the "bad resource"
457 * return in pr->resource_addr).
459 if (pr->type == SYS_RES_IRQ) {
460 if (sp->sc->func_route >= pcic_iw_pci) {
461 pr->resource_addr = sp->sc->irq;
464 if (pr->min == 0 && pr->max == 0)
469 * Make sure we grok this type.
481 * Allocate the resource, and align it to the most natural
482 * size. If we get it, then tell userland what we actually got
483 * in the range they requested.
485 flags = rman_make_alignment_flags(pr->size);
486 r = bus_alloc_resource(bridgedev, pr->type, &rid, pr->min, pr->max,
489 pr->resource_addr = (u_long)rman_get_start(r);
490 bus_release_resource(bridgedev, pr->type, rid, r);
496 * ioctl calls - Controller specific ioctls
499 pcic_ioctl(struct slot *slt, int cmd, caddr_t data)
501 struct pcic_slot *sp = slt->cdata;
502 struct pcic_reg *preg = (struct pcic_reg *) data;
507 case PIOCGREG: /* Get pcic register */
508 preg->value = sp->getb(sp, preg->reg);
509 break; /* Set pcic register */
511 sp->putb(sp, preg->reg, preg->value);
513 case PIOCSRESOURCE: /* Can I use this resource? */
514 pcic_sresource(slt, data);
523 * Power the card up, as specified, using the cardbus power
524 * registers to control power. Microsoft recommends that cardbus
525 * vendors support powering the card via cardbus registers because
526 * there is no standard for 3.3V cards. Since at least a few of the
527 * cardbus bridges have minor issues with power via the ExCA registers,
528 * go ahead and do it all via cardbus registers.
530 * An expamination of the code will show the relative ease that we do
531 * Vpp in comparison to the ExCA case (which may be partially broken).
534 pcic_cardbus_power(struct pcic_slot *sp, struct slot *slt)
540 * If we're doing an auto-detect, and we're in a badvcc state, then
541 * we need to force the socket to rescan the card. We don't do this
542 * all the time because the socket can take up to 200ms to do the deed,
543 * and that's too long to busy wait. Since this is a relatively rare
544 * event (some BIOSes, and earlier versions of OLDCARD caused it), we
545 * test for it special.
547 state = bus_space_read_4(sp->bst, sp->bsh, CB_SOCKET_STATE);
548 if (slt->pwr.vcc == -1 && (state & CB_SS_BADVCC)) {
550 * Force the bridge to scan the card for the proper voltages
553 bus_space_write_4(sp->bst, sp->bsh, CB_SOCKET_FORCE,
555 state = bus_space_read_4(sp->bst, sp->bsh, CB_SOCKET_STATE);
556 /* This while loop can take 100-150ms */
557 while ((state & CB_SS_CARD_MASK) == 0) {
559 state = bus_space_read_4(sp->bst, sp->bsh,
566 * Preserve the clock stop bit of the socket power register. Not
567 * sure that we want to do that, but maybe we should set it based
568 * on the power state.
570 power = bus_space_read_4(sp->bst, sp->bsh, CB_SOCKET_POWER);
574 * vcc == -1 means automatically detect the voltage of the card.
575 * Do so and apply the right amount of power.
577 if (slt->pwr.vcc == -1) {
578 if (state & CB_SS_5VCARD)
580 else if (state & CB_SS_3VCARD)
582 else if (state & CB_SS_XVCARD)
584 else if (state & CB_SS_YVCARD)
586 if (bootverbose && slt->pwr.vcc != -1)
587 device_printf(sp->sc->dev,
588 "Autodetected %d.%dV card\n",
589 slt->pwr.vcc / 10, slt->pwr.vcc % 10);
592 switch(slt->pwr.vcc) {
596 power |= CB_SP_VCC_0V;
599 power |= CB_SP_VCC_YV;
602 power |= CB_SP_VCC_XV;
605 power |= CB_SP_VCC_3V;
608 power |= CB_SP_VCC_5V;
613 * vpp == -1 means use vcc voltage.
615 if (slt->pwr.vpp == -1)
616 slt->pwr.vpp = slt->pwr.vcc;
617 switch(slt->pwr.vpp) {
621 power |= CB_SP_VPP_0V;
624 power |= CB_SP_VPP_YV;
627 power |= CB_SP_VPP_XV;
630 power |= CB_SP_VPP_3V;
633 power |= CB_SP_VPP_5V;
636 power |= CB_SP_VPP_12V;
639 bus_space_write_4(sp->bst, sp->bsh, CB_SOCKET_POWER, power);
642 * OK. We need to bring the card out of reset. Let the power
643 * stabilize for 300ms (why 300?) and then enable the outputs
644 * and then wait 100ms (why 100?) for it to stabilize. These numbers
645 * were stolen from the dim, dark past of OLDCARD and I have no clue
646 * how they were derived. I also use the bit setting routines here
647 * as a measure of conservatism.
650 pcic_setb(sp, PCIC_POWER, PCIC_DISRST);
652 pcic_setb(sp, PCIC_POWER, PCIC_DISRST | PCIC_OUTENA);
655 pcic_clrb(sp, PCIC_POWER, PCIC_DISRST | PCIC_OUTENA);
662 * pcic_power - Enable the power of the slot according to
663 * the parameters in the power structure(s).
666 pcic_power(struct slot *slt)
669 unsigned char reg = PCIC_DISRST | PCIC_PCPWRE;
670 struct pcic_slot *sp = slt->cdata;
671 struct pcic_slot *sp2;
672 struct pcic_softc *sc = sp->sc;
677 * Cardbus power registers are completely different.
679 if (sc->flags & PCIC_CARDBUS_POWER)
680 return (pcic_cardbus_power(sp, slt));
683 device_printf(sc->dev, "Power: Vcc=%d Vpp=%d\n", slt->pwr.vcc,
686 * If we're automatically detecting what voltage to use, then we need
687 * to ask the bridge what type (voltage-wise) the card is.
689 if (slt->pwr.vcc == -1) {
690 if (sc->flags & PCIC_DF_POWER) {
692 * Look at the VS[12]# bits on the card. If VS1 is
693 * clear then the card needs 3.3V instead of 5.0V.
695 c = sp->getb(sp, PCIC_CDGC);
696 if ((c & PCIC_VS1STAT) == 0)
701 if (sc->flags & PCIC_PD_POWER) {
703 * The 6710 does it one way, and the '22 and '29 do it
704 * another. The '22 can also do it the same way as a
705 * '10 does it, despite what the datasheets say. Some
706 * laptops with '22 don't seem to have the signals
707 * wired right for the '29 method to work. The
708 * laptops that don't work hang solid when the pccard
709 * memory is accessed.
711 * To allow for both types of laptops,
712 * hw.pcic.pd6722_vsense will select which one to use.
713 * 0 - none, 1 - the '10 way and 2 - the '29 way.
715 controller = sp->controller;
716 if (controller == PCIC_PD6722) {
717 switch (pcic_pd6722_vsense) {
719 controller = PCIC_PD6710;
722 controller = PCIC_PD6729;
727 switch (controller) {
729 c = sp->getb(sp, PCIC_MISC1);
730 if ((c & PCIC_MISC1_5V_DETECT) == 0)
735 case PCIC_PD6722: /* see above for why we do */
736 break; /* none here */
739 * VS[12] signals are in slot1's
740 * extended reg 0xa for both slots.
743 sp2->putb(sp2, PCIC_EXT_IND, PCIC_EXT_DATA);
744 c = sp2->getb(sp2, PCIC_EXTENDED);
745 if (sp == sp2) /* slot 1 */
747 if ((c & PCIC_VS1A) == 0)
753 /* I have no idea how to do this for others */
758 * Regardless of the above, setting the Auto Power
759 * Switch Enable appears to help.
763 if (sc->flags & PCIC_RICOH_POWER) {
765 * The ISA bridge have the 5V/3.3V in register
766 * 1, bit 7. However, 3.3V cards can only be
767 * detected if GPI_EN is disabled.
769 c = sp->getb(sp, PCIC_STATUS);
770 c2 = sp->getb(sp, PCIC_CDGC);
771 if ((c & PCIC_RICOH_5VCARD) && (c2 & PCIC_GPI_EN) == 0)
776 /* Other power schemes here */
778 if (bootverbose && slt->pwr.vcc != -1)
779 device_printf(sc->dev, "Autodetected %d.%dV card\n",
780 slt->pwr.vcc / 10, slt->pwr.vcc %10);
782 if (slt->pwr.vcc == -1) {
784 device_printf(sc->dev,
785 "Couldn't autodetect voltage, assuming 5.0V\n");
791 * XXX Note: The Vpp controls varies quit a bit between bridge chips
792 * and the following might not be right in all cases. The Linux
793 * code and wildboar code bases are more complex. However, most
794 * applications want vpp == vcc and the following code does appear
795 * to do that for all bridge sets.
797 if (slt->pwr.vpp == -1)
798 slt->pwr.vpp = slt->pwr.vcc;
799 switch(slt->pwr.vpp) {
814 reg |= PCIC_VCC_ON; /* Turn on Vcc */
815 switch(slt->pwr.vcc) {
822 * The wildboar code has comments that state that
823 * the IBM KING controller doesn't support 3.3V
824 * on the "IBM Smart PC card drive". The code
825 * intemates that's the only place they have seen
826 * it used and that there's a boatload of issues
827 * with it. I'm not even sure this is right because
828 * the only docs I've been able to find say this is for
829 * 5V power. Of course, this "doc" is just code comments
830 * so who knows for sure.
832 if (sc->flags & PCIC_KING_POWER) {
833 reg |= PCIC_VCC_5V_KING;
836 if (sc->flags & PCIC_VG_POWER) {
837 pcic_setb(sp, PCIC_CVSR, PCIC_CVSR_VS);
840 if (sc->flags & PCIC_PD_POWER) {
841 pcic_setb(sp, PCIC_MISC1, PCIC_MISC1_VCC_33);
844 if (sc->flags & PCIC_RICOH_POWER) {
845 pcic_setb(sp, PCIC_RICOH_MCR2, PCIC_MCR2_VCC_33);
848 if (sc->flags & PCIC_DF_POWER)
852 if (sc->flags & PCIC_KING_POWER)
853 reg |= PCIC_VCC_5V_KING;
855 * For all of the variant power schemes for 3.3V go
856 * ahead and turn off the 3.3V enable bit. For all
857 * bridges, the setting the Vcc on bit does the rest.
858 * Note that we don't have to turn off the 3.3V bit
859 * for the '365 step D since with the reg assigments
860 * to this point it doesn't get turned on.
862 if (sc->flags & PCIC_VG_POWER)
863 pcic_clrb(sp, PCIC_CVSR, PCIC_CVSR_VS);
864 if (sc->flags & PCIC_PD_POWER)
865 pcic_clrb(sp, PCIC_MISC1, PCIC_MISC1_VCC_33);
866 if (sc->flags & PCIC_RICOH_POWER)
867 pcic_clrb(sp, PCIC_RICOH_MCR2, PCIC_MCR2_VCC_33);
870 sp->putb(sp, PCIC_POWER, reg);
872 device_printf(sc->dev, "Power applied\n");
876 sp->putb(sp, PCIC_POWER, reg);
878 device_printf(sc->dev, "Output enabled\n");
881 device_printf(sc->dev, "Settling complete\n");
885 * Some chipsets will attempt to preclude us from supplying
886 * 5.0V to cards that only handle 3.3V. We seem to need to
887 * try 3.3V to paper over some power handling issues in other
888 * parts of the system. Maybe the proper detection of 3.3V cards
889 * now obviates the need for this hack, so put a printf in to
890 * warn the world about it.
892 if (!(sp->getb(sp, PCIC_STATUS) & PCIC_POW) && dodefault) {
895 device_printf(sc->dev,
896 "Failed at 5.0V. Trying 3.3V. Please report message to mobile@freebsd.org\n");
897 return (pcic_power(slt));
900 printf("Power complete.\n");
905 * tell the PCIC which irq we want to use. only the following are legal:
906 * 3, 4, 5, 7, 9, 10, 11, 12, 14, 15. We require the callers of this
907 * routine to do the check for legality.
910 pcic_mapirq(struct slot *slt, int irq)
912 struct pcic_slot *sp = slt->cdata;
914 sp->sc->chip->map_irq(sp, irq);
918 * pcic_reset - Reset the card and enable initial power. This may
919 * need to be interrupt driven in the future. We should likely turn
920 * the reset on, DELAY for a period of time < 250ms, turn it off and
921 * tsleep for a while and check it when we're woken up. I think that
922 * we're running afoul of the card status interrupt glitching, causing
923 * an interrupt storm because the card doesn't seem to be able to
924 * clear this pin while in reset.
927 pcic_reset(void *chan)
929 struct slot *slt = chan;
930 struct pcic_slot *sp = slt->cdata;
933 device_printf(sp->sc->dev, "reset %d ", slt->insert_seq);
934 switch (slt->insert_seq) {
935 case 0: /* Something funny happended on the way to the pub... */
939 case 1: /* Assert reset */
940 pcic_clrb(sp, PCIC_INT_GEN, PCIC_CARDRESET);
942 printf("int is %x stat is %x\n",
943 sp->getb(sp, PCIC_INT_GEN),
944 sp->getb(sp, PCIC_STATUS));
946 timeout(pcic_reset, (void *)slt, hz/4);
948 case 2: /* Deassert it again */
949 pcic_setb(sp, PCIC_INT_GEN, PCIC_CARDRESET | PCIC_IOCARD);
951 printf("int is %x stat is %x\n",
952 sp->getb(sp, PCIC_INT_GEN),
953 sp->getb(sp, PCIC_STATUS));
955 timeout(pcic_reset, (void *)slt, hz/4);
957 case 3: /* Wait if card needs more time */
959 printf("int is %x stat is %x\n",
960 sp->getb(sp, PCIC_INT_GEN),
961 sp->getb(sp, PCIC_STATUS));
962 if ((sp->getb(sp, PCIC_STATUS) & PCIC_READY) == 0) {
963 timeout(pcic_reset, (void *)slt, hz/10);
968 if (sp->controller == PCIC_PD6722 || sp->controller == PCIC_PD6710) {
969 sp->putb(sp, PCIC_TIME_SETUP0, 0x1);
970 sp->putb(sp, PCIC_TIME_CMD0, 0x6);
971 sp->putb(sp, PCIC_TIME_RECOV0, 0x0);
972 sp->putb(sp, PCIC_TIME_SETUP1, 1);
973 sp->putb(sp, PCIC_TIME_CMD1, 0xf);
974 sp->putb(sp, PCIC_TIME_RECOV1, 0);
976 selwakeup(&slt->selp);
980 * pcic_disable - Disable the slot. I wonder if these operations can
981 * cause an interrupt we need to acknowledge? XXX
984 pcic_disable(struct slot *slt)
986 struct pcic_slot *sp = slt->cdata;
988 pcic_clrb(sp, PCIC_INT_GEN, PCIC_CARDTYPE | PCIC_CARDRESET);
990 slt->pwr.vcc = slt->pwr.vpp = 0;
995 * pcic_resume - Suspend/resume support for PCIC
998 pcic_resume(struct slot *slt)
1000 struct pcic_slot *sp = slt->cdata;
1002 pcic_do_mgt_irq(sp, slt->irq);
1003 if (sp->controller == PCIC_PD6722) {
1004 pcic_setb(sp, PCIC_MISC1, PCIC_MISC1_SPEAKER);
1005 pcic_setb(sp, PCIC_MISC2, PCIC_LPDM_EN);
1007 if (sp->slt->state != inactive)
1008 pcic_do_stat_delta(sp);
1012 pcic_activate_resource(device_t dev, device_t child, int type, int rid,
1015 struct pccard_devinfo *devi = device_get_ivars(child);
1018 if (dev != device_get_parent(device_get_parent(child)) || devi == NULL)
1019 return (bus_generic_activate_resource(dev, child, type,
1023 case SYS_RES_IOPORT: {
1025 ip = &devi->slt->io[rid];
1026 if (ip->flags == 0) {
1028 ip->flags = IODF_WS | IODF_16BIT | IODF_CS16;
1030 ip->flags = devi->slt->io[0].flags;
1032 ip->flags |= IODF_ACTIVE;
1033 ip->start = rman_get_start(r);
1034 ip->size = rman_get_end(r) - rman_get_start(r) + 1;
1035 err = pcic_io(devi->slt, rid);
1042 * We actually defer the activation of the IRQ resource
1043 * until the interrupt is registered to avoid stray
1044 * interrupt messages.
1047 case SYS_RES_MEMORY: {
1048 struct mem_desc *mp;
1049 if (rid >= NUM_MEM_WINDOWS)
1051 mp = &devi->slt->mem[rid];
1052 mp->flags |= MDF_ACTIVE;
1053 mp->start = (caddr_t) rman_get_start(r);
1054 mp->size = rman_get_end(r) - rman_get_start(r) + 1;
1055 err = pcic_memory(devi->slt, rid);
1063 err = bus_generic_activate_resource(dev, child, type, rid, r);
1068 pcic_deactivate_resource(device_t dev, device_t child, int type, int rid,
1071 struct pccard_devinfo *devi = device_get_ivars(child);
1074 if (dev != device_get_parent(device_get_parent(child)) || devi == NULL)
1075 return (bus_generic_deactivate_resource(dev, child, type,
1079 case SYS_RES_IOPORT: {
1080 struct io_desc *ip = &devi->slt->io[rid];
1081 ip->flags &= ~IODF_ACTIVE;
1082 err = pcic_io(devi->slt, rid);
1089 case SYS_RES_MEMORY: {
1090 struct mem_desc *mp = &devi->slt->mem[rid];
1091 mp->flags &= ~(MDF_ACTIVE | MDF_ATTR);
1092 err = pcic_memory(devi->slt, rid);
1100 err = bus_generic_deactivate_resource(dev, child, type, rid, r);
1105 pcic_setup_intr(device_t dev, device_t child, struct resource *irq,
1106 int flags, driver_intr_t *intr, void *arg, void **cookiep)
1108 struct pccard_devinfo *devi = device_get_ivars(child);
1111 if (((1 << rman_get_start(irq)) & PCIC_INT_MASK_ALLOWED) == 0) {
1112 device_printf(dev, "Hardware does not support irq %ld.\n",
1113 rman_get_start(irq));
1117 err = bus_generic_setup_intr(dev, child, irq, flags, intr, arg,
1120 pcic_mapirq(devi->slt, rman_get_start(irq));
1122 device_printf(dev, "Error %d irq %ld\n", err,
1123 rman_get_start(irq));
1128 pcic_teardown_intr(device_t dev, device_t child, struct resource *irq,
1131 struct pccard_devinfo *devi = device_get_ivars(child);
1133 pcic_mapirq(devi->slt, 0);
1134 return (bus_generic_teardown_intr(dev, child, irq, cookie));
1138 pcic_set_res_flags(device_t bus, device_t child, int restype, int rid,
1141 struct pccard_devinfo *devi = device_get_ivars(child);
1145 case SYS_RES_MEMORY: {
1146 struct mem_desc *mp = &devi->slt->mem[rid];
1148 case PCCARD_A_MEM_COM:
1149 mp->flags &= ~MDF_ATTR;
1151 case PCCARD_A_MEM_ATTR:
1152 mp->flags |= MDF_ATTR;
1154 case PCCARD_A_MEM_8BIT:
1155 mp->flags &= ~MDF_16BITS;
1157 case PCCARD_A_MEM_16BIT:
1158 mp->flags |= MDF_16BITS;
1161 err = pcic_memory(devi->slt, rid);
1171 pcic_get_res_flags(device_t bus, device_t child, int restype, int rid,
1174 struct pccard_devinfo *devi = device_get_ivars(child);
1181 case SYS_RES_IOPORT: {
1182 struct io_desc *ip = &devi->slt->io[rid];
1186 case SYS_RES_MEMORY: {
1187 struct mem_desc *mp = &devi->slt->mem[rid];
1198 pcic_set_memory_offset(device_t bus, device_t child, int rid, u_int32_t offset
1199 #if __FreeBSD_version >= 500000
1204 struct pccard_devinfo *devi = device_get_ivars(child);
1205 struct mem_desc *mp = &devi->slt->mem[rid];
1208 #if __FreeBSD_version >= 500000
1210 *deltap = 0; /* XXX BAD XXX */
1212 return (pcic_memory(devi->slt, rid));
1216 pcic_get_memory_offset(device_t bus, device_t child, int rid, u_int32_t *offset)
1218 struct pccard_devinfo *devi = device_get_ivars(child);
1219 struct mem_desc *mp = &devi->slt->mem[rid];
1230 pcic_alloc_resource(device_t dev, device_t child, int type, int *rid,
1231 u_long start, u_long end, u_long count, u_int flags)
1233 struct pcic_softc *sc = device_get_softc(dev);
1236 * If we're routing via pci, we can share.
1238 if (sc->func_route == pcic_iw_pci && type == SYS_RES_IRQ) {
1240 device_printf(child, "Forcing IRQ to %d\n", sc->irq);
1241 start = end = sc->irq;
1242 flags |= RF_SHAREABLE;
1245 return (bus_generic_alloc_resource(dev, child, type, rid, start, end,
1250 pcic_do_stat_delta(struct pcic_slot *sp)
1252 if ((sp->getb(sp, PCIC_STATUS) & PCIC_CD) != PCIC_CD)
1253 pccard_event(sp->slt, card_removed);
1255 pccard_event(sp->slt, card_inserted);
1258 * Wrapper function for pcicintr so that signatures match.
1261 pcic_isa_intr(void *arg)
1263 pcic_isa_intr1(arg);
1267 * PCIC timer. If the controller doesn't have a free IRQ to use
1268 * or if interrupt steering doesn't work, poll the controller for
1269 * insertion/removal events.
1272 pcic_timeout(void *chan)
1274 struct pcic_softc *sc = (struct pcic_softc *) chan;
1276 if (pcic_isa_intr1(chan) != 0) {
1277 device_printf(sc->dev,
1278 "Static bug detected, ignoring hardware.");
1282 sc->timeout_ch = timeout(sc->slot_poll, chan, hz/2);
1286 * PCIC Interrupt handler.
1287 * Check each slot in turn, and read the card status change
1288 * register. If this is non-zero, then a change has occurred
1289 * on this card, so send an event to the main code.
1292 pcic_isa_intr1(void *arg)
1296 struct pcic_softc *sc = (struct pcic_softc *) arg;
1297 struct pcic_slot *sp = &sc->slots[0];
1300 for (slot = 0; slot < PCIC_CARD_SLOTS; slot++, sp++) {
1301 if (sp->slt == NULL)
1303 if ((chg = sp->getb(sp, PCIC_STAT_CHG)) != 0) {
1305 * if chg is 0xff, then we know that we've hit
1306 * the famous "static bug" for some desktop
1307 * pcmcia cards. This is caused by static
1308 * discharge frying the poor card's mind and
1309 * it starts return 0xff forever. We return
1310 * an error and stop polling the card. When
1311 * we're interrupt based, we never see this.
1312 * The card just goes away silently.
1318 if (chg & PCIC_CDTCH)
1319 pcic_do_stat_delta(sp);
1327 pcic_isa_mapirq(struct pcic_slot *sp, int irq)
1329 irq = host_irq_to_pcic(irq);
1331 pcic_clrb(sp, PCIC_INT_GEN, 0xF);
1333 sp->putb(sp, PCIC_INT_GEN,
1334 (sp->getb(sp, PCIC_INT_GEN) & 0xF0) | irq);