2 * Copyright (c) 1991 The Regents of the University of California.
5 * This code is derived from software contributed to Berkeley by
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * 3. All advertising materials mentioning features or use of this software
17 * must display the following acknowledgement:
18 * This product includes software developed by the University of
19 * California, Berkeley and its contributors.
20 * 4. Neither the name of the University nor the names of its contributors
21 * may be used to endorse or promote products derived from this software
22 * without specific prior written permission.
24 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
25 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
27 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
30 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
31 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
32 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
33 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
36 * from: @(#)isa.c 7.2 (Berkeley) 5/13/91
37 * $FreeBSD: src/sys/i386/isa/intr_machdep.c,v 1.29.2.5 2001/10/14 06:54:27 luigi Exp $
38 * $DragonFly: src/sys/i386/isa/Attic/intr_machdep.c,v 1.12 2003/07/23 02:30:19 dillon Exp $
41 * This file contains an aggregated module marked:
42 * Copyright (c) 1997, Stefan Esser <se@freebsd.org>
43 * All rights reserved.
44 * See the notice for details.
47 #include "opt_auto_eoi.h"
51 #include <sys/param.h>
53 #include <machine/lock.h>
55 #include <sys/systm.h>
56 #include <sys/syslog.h>
57 #include <sys/malloc.h>
58 #include <sys/errno.h>
59 #include <sys/interrupt.h>
60 #include <machine/ipl.h>
61 #include <machine/md_var.h>
62 #include <machine/segments.h>
64 #include <machine/globaldata.h>
66 #include <sys/thread2.h>
69 #include <machine/smptests.h> /** FAST_HI */
70 #include <machine/smp.h>
73 #include <pc98/pc98/pc98.h>
74 #include <pc98/pc98/pc98_machdep.h>
75 #include <pc98/pc98/epsonio.h>
77 #include <i386/isa/isa.h>
79 #include <i386/isa/icu.h>
82 #include <isa/isavar.h>
84 #include <i386/isa/intr_machdep.h>
85 #include <isa/isavar.h>
86 #include <sys/interrupt.h>
88 #include <machine/clock.h>
90 #include <machine/cpu.h>
94 #include <i386/isa/mca_machdep.h>
97 /* XXX should be in suitable include files */
99 #define ICU_IMR_OFFSET 2 /* IO_ICU{1,2} + 2 */
100 #define ICU_SLAVEID 7
102 #define ICU_IMR_OFFSET 1 /* IO_ICU{1,2} + 1 */
103 #define ICU_SLAVEID 2
108 * This is to accommodate "mixed-mode" programming for
109 * motherboards that don't connect the 8254 to the IO APIC.
114 #define NR_INTRNAMES (1 + ICU_LEN + 2 * ICU_LEN)
116 static inthand2_t isa_strayintr;
118 void *intr_unit[ICU_LEN*2];
119 u_long *intr_countp[ICU_LEN*2];
120 inthand2_t *intr_handler[ICU_LEN*2] = {
121 isa_strayintr, isa_strayintr, isa_strayintr, isa_strayintr,
122 isa_strayintr, isa_strayintr, isa_strayintr, isa_strayintr,
123 isa_strayintr, isa_strayintr, isa_strayintr, isa_strayintr,
124 isa_strayintr, isa_strayintr, isa_strayintr, isa_strayintr,
125 isa_strayintr, isa_strayintr, isa_strayintr, isa_strayintr,
126 isa_strayintr, isa_strayintr, isa_strayintr, isa_strayintr,
127 isa_strayintr, isa_strayintr, isa_strayintr, isa_strayintr,
128 isa_strayintr, isa_strayintr, isa_strayintr, isa_strayintr,
131 static struct md_intr_info {
134 int mihandler_installed;
136 } intr_info[ICU_LEN*2];
138 static inthand_t *fastintr[ICU_LEN] = {
139 &IDTVEC(fastintr0), &IDTVEC(fastintr1),
140 &IDTVEC(fastintr2), &IDTVEC(fastintr3),
141 &IDTVEC(fastintr4), &IDTVEC(fastintr5),
142 &IDTVEC(fastintr6), &IDTVEC(fastintr7),
143 &IDTVEC(fastintr8), &IDTVEC(fastintr9),
144 &IDTVEC(fastintr10), &IDTVEC(fastintr11),
145 &IDTVEC(fastintr12), &IDTVEC(fastintr13),
146 &IDTVEC(fastintr14), &IDTVEC(fastintr15),
148 &IDTVEC(fastintr16), &IDTVEC(fastintr17),
149 &IDTVEC(fastintr18), &IDTVEC(fastintr19),
150 &IDTVEC(fastintr20), &IDTVEC(fastintr21),
151 &IDTVEC(fastintr22), &IDTVEC(fastintr23),
155 unpendhand_t *fastunpend[ICU_LEN] = {
156 IDTVEC(fastunpend0), IDTVEC(fastunpend1),
157 IDTVEC(fastunpend2), IDTVEC(fastunpend3),
158 IDTVEC(fastunpend4), IDTVEC(fastunpend5),
159 IDTVEC(fastunpend6), IDTVEC(fastunpend7),
160 IDTVEC(fastunpend8), IDTVEC(fastunpend9),
161 IDTVEC(fastunpend10), IDTVEC(fastunpend11),
162 IDTVEC(fastunpend12), IDTVEC(fastunpend13),
163 IDTVEC(fastunpend14), IDTVEC(fastunpend15),
165 IDTVEC(fastunpend16), IDTVEC(fastunpend17),
166 IDTVEC(fastunpend18), IDTVEC(fastunpend19),
167 IDTVEC(fastunpend20), IDTVEC(fastunpend21),
168 IDTVEC(fastunpend22), IDTVEC(fastunpend23),
172 static inthand_t *slowintr[ICU_LEN] = {
173 &IDTVEC(intr0), &IDTVEC(intr1), &IDTVEC(intr2), &IDTVEC(intr3),
174 &IDTVEC(intr4), &IDTVEC(intr5), &IDTVEC(intr6), &IDTVEC(intr7),
175 &IDTVEC(intr8), &IDTVEC(intr9), &IDTVEC(intr10), &IDTVEC(intr11),
176 &IDTVEC(intr12), &IDTVEC(intr13), &IDTVEC(intr14), &IDTVEC(intr15),
178 &IDTVEC(intr16), &IDTVEC(intr17), &IDTVEC(intr18), &IDTVEC(intr19),
179 &IDTVEC(intr20), &IDTVEC(intr21), &IDTVEC(intr22), &IDTVEC(intr23),
184 #define NMI_PARITY 0x04
185 #define NMI_EPARITY 0x02
187 #define NMI_PARITY (1 << 7)
188 #define NMI_IOCHAN (1 << 6)
189 #define ENMI_WATCHDOG (1 << 7)
190 #define ENMI_BUSTIMER (1 << 6)
191 #define ENMI_IOSTATUS (1 << 5)
195 * Handle a NMI, possibly a machine check.
196 * return true to panic system, false to ignore.
204 int port = inb(0x33);
206 log(LOG_CRIT, "NMI PC98 port = %x\n", port);
207 if (epson_machine_id == 0x20)
208 epson_outb(0xc16, epson_inb(0xc16) | 0x1);
209 if (port & NMI_PARITY) {
210 log(LOG_CRIT, "BASE RAM parity error, likely hardware failure.");
212 } else if (port & NMI_EPARITY) {
213 log(LOG_CRIT, "EXTENDED RAM parity error, likely hardware failure.");
216 log(LOG_CRIT, "\nNMI Resume ??\n");
219 int isa_port = inb(0x61);
220 int eisa_port = inb(0x461);
222 log(LOG_CRIT, "NMI ISA %x, EISA %x\n", isa_port, eisa_port);
224 if (MCA_system && mca_bus_nmi())
228 if (isa_port & NMI_PARITY) {
229 log(LOG_CRIT, "RAM parity error, likely hardware failure.");
233 if (isa_port & NMI_IOCHAN) {
234 log(LOG_CRIT, "I/O channel check, likely hardware failure.");
239 * On a real EISA machine, this will never happen. However it can
240 * happen on ISA machines which implement XT style floating point
241 * error handling (very rare). Save them from a meaningless panic.
243 if (eisa_port == 0xff)
246 if (eisa_port & ENMI_WATCHDOG) {
247 log(LOG_CRIT, "EISA watchdog timer expired, likely hardware failure.");
251 if (eisa_port & ENMI_BUSTIMER) {
252 log(LOG_CRIT, "EISA bus timeout, likely hardware failure.");
256 if (eisa_port & ENMI_IOSTATUS) {
257 log(LOG_CRIT, "EISA I/O port status error.");
265 * Fill in default interrupt table (in case of spuruious interrupt
266 * during configuration of kernel, setup interrupt control unit
274 for (i = 0; i < ICU_LEN; i++)
275 icu_unset(i, (inthand2_t *)NULL);
277 /* initialize 8259's */
280 outb(IO_ICU1, 0x19); /* reset; program device, four bytes */
283 outb(IO_ICU1, 0x11); /* reset; program device, four bytes */
285 outb(IO_ICU1+ICU_IMR_OFFSET, NRSVIDT); /* starting at this vector index */
286 outb(IO_ICU1+ICU_IMR_OFFSET, IRQ_SLAVE); /* slave on line 7 */
289 outb(IO_ICU1+ICU_IMR_OFFSET, 0x1f); /* (master) auto EOI, 8086 mode */
291 outb(IO_ICU1+ICU_IMR_OFFSET, 0x1d); /* (master) 8086 mode */
295 outb(IO_ICU1+ICU_IMR_OFFSET, 2 | 1); /* auto EOI, 8086 mode */
297 outb(IO_ICU1+ICU_IMR_OFFSET, 1); /* 8086 mode */
300 outb(IO_ICU1+ICU_IMR_OFFSET, 0xff); /* leave interrupts masked */
301 outb(IO_ICU1, 0x0a); /* default to IRR on read */
303 outb(IO_ICU1, 0xc0 | (3 - 1)); /* pri order 3-7, 0-2 (com2 first) */
308 outb(IO_ICU2, 0x19); /* reset; program device, four bytes */
311 outb(IO_ICU2, 0x11); /* reset; program device, four bytes */
313 outb(IO_ICU2+ICU_IMR_OFFSET, NRSVIDT+8); /* staring at this vector index */
314 outb(IO_ICU2+ICU_IMR_OFFSET, ICU_SLAVEID); /* my slave id is 7 */
316 outb(IO_ICU2+ICU_IMR_OFFSET,9); /* 8086 mode */
319 outb(IO_ICU2+ICU_IMR_OFFSET, 2 | 1); /* auto EOI, 8086 mode */
321 outb(IO_ICU2+ICU_IMR_OFFSET,1); /* 8086 mode */
324 outb(IO_ICU2+ICU_IMR_OFFSET, 0xff); /* leave interrupts masked */
325 outb(IO_ICU2, 0x0a); /* default to IRR on read */
329 * Caught a stray interrupt, notify
332 isa_strayintr(void *vcookiep)
334 int intr = (void **)vcookiep - &intr_unit[0];
336 /* DON'T BOTHER FOR NOW! */
337 /* for some reason, we get bursts of intr #7, even if not enabled! */
339 * Well the reason you got bursts of intr #7 is because someone
340 * raised an interrupt line and dropped it before the 8259 could
341 * prioritize it. This is documented in the intel data book. This
342 * means you have BAD hardware! I have changed this so that only
343 * the first 5 get logged, then it quits logging them, and puts
344 * out a special message. rgrimes 3/25/1993
347 * XXX TODO print a different message for #7 if it is for a
348 * glitch. Glitches can be distinguished from real #7's by
349 * testing that the in-service bit is _not_ set. The test
350 * must be done before sending an EOI so it can't be done if
351 * we are using AUTO_EOI_1.
353 printf("STRAY %d\n", intr);
354 if (intrcnt[1 + intr] <= 5)
355 log(LOG_ERR, "stray irq %d\n", intr);
356 if (intrcnt[1 + intr] == 5)
358 "too many stray irq %d's; not logging any more\n", intr);
363 * Return a bitmap of the current interrupt requests. This is 8259-specific
364 * and is only suitable for use at probe time.
367 isa_irq_pending(void)
374 return ((irr2 << 8) | irr1);
379 update_intr_masks(void)
384 for (intr=0; intr < ICU_LEN; intr ++) {
386 /* no 8259 SLAVE to ignore */
388 if (intr==ICU_SLAVEID) continue; /* ignore 8259 SLAVE output */
390 maskptr = intr_info[intr].maskp;
393 *maskptr |= SWI_CLOCK_MASK | (1 << intr);
395 if (mask != intr_info[intr].mask) {
397 printf ("intr_mask[%2d] old=%08x new=%08x ptr=%p.\n",
398 intr, intr_info[intr].mask, mask, maskptr);
400 intr_info[intr].mask = mask;
409 update_intrname(int intr, char *name)
413 int name_index, off, strayintr;
416 * Initialise strings for bitbucket and stray interrupt counters.
417 * These have statically allocated indices 0 and 1 through ICU_LEN.
419 if (intrnames[0] == '\0') {
420 off = sprintf(intrnames, "???") + 1;
421 for (strayintr = 0; strayintr < ICU_LEN; strayintr++)
422 off += sprintf(intrnames + off, "stray irq%d",
428 if (snprintf(buf, sizeof(buf), "%s irq%d", name, intr) >= sizeof(buf))
432 * Search for `buf' in `intrnames'. In the usual case when it is
433 * not found, append it to the end if there is enough space (the \0
434 * terminator for the previous string, if any, becomes a separator).
436 for (cp = intrnames, name_index = 0;
437 cp != eintrnames && name_index < NR_INTRNAMES;
438 cp += strlen(cp) + 1, name_index++) {
440 if (strlen(buf) >= eintrnames - cp)
445 if (strcmp(cp, buf) == 0)
450 printf("update_intrname: counting %s irq%d as %s\n", name, intr,
454 intr_countp[intr] = &intrcnt[name_index];
458 * NOTE! intr_handler[] is only used for FAST interrupts, the *vector.s
459 * code ignores it for normal interrupts.
462 icu_setup(int intr, inthand2_t *handler, void *arg, u_int *maskptr, int flags)
465 int select; /* the select register is 8 bits */
467 u_int32_t value; /* the window register is 32 bits */
470 u_int mask = (maskptr ? *maskptr : 0);
473 if ((u_int)intr >= ICU_LEN) /* no 8259 SLAVE to ignore */
475 if ((u_int)intr >= ICU_LEN || intr == ICU_SLAVEID)
477 if (intr_handler[intr] != isa_strayintr)
481 cpu_disable_intr(); /* YYY */
482 intr_handler[intr] = handler;
483 intr_unit[intr] = arg;
484 intr_info[intr].maskp = maskptr;
485 intr_info[intr].mask = mask | SWI_CLOCK_MASK | (1 << intr);
487 /* YYY fast ints supported and mp protected but ... */
491 if (flags & INTR_FAST) {
492 vector = TPR_FAST_INTS + intr;
493 setidt(vector, fastintr[intr],
494 SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
496 vector = TPR_SLOW_INTS + intr;
497 #ifdef APIC_INTR_REORDER
498 #ifdef APIC_INTR_HIGHPRI_CLOCK
499 /* XXX: Hack (kludge?) for more accurate clock. */
500 if (intr == apic_8254_intr || intr == 8) {
501 vector = TPR_FAST_INTS + intr;
505 setidt(vector, slowintr[intr],
506 SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
508 #ifdef APIC_INTR_REORDER
509 set_lapic_isrloc(intr, vector);
512 * Reprogram the vector in the IO APIC.
514 if (int_to_apicintpin[intr].ioapic >= 0) {
515 select = int_to_apicintpin[intr].redirindex;
516 value = io_apic_read(int_to_apicintpin[intr].ioapic,
517 select) & ~IOART_INTVEC;
518 io_apic_write(int_to_apicintpin[intr].ioapic,
519 select, value | vector);
522 setidt(ICU_OFFSET + intr,
523 flags & INTR_FAST ? fastintr[intr] : slowintr[intr],
524 SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
532 icu_unset(intr, handler)
538 if ((u_int)intr >= ICU_LEN || handler != intr_handler[intr])
543 cpu_disable_intr(); /* YYY */
544 intr_countp[intr] = &intrcnt[1 + intr];
545 intr_handler[intr] = isa_strayintr;
546 intr_info[intr].maskp = NULL;
547 intr_info[intr].mask = HWI_MASK | SWI_MASK;
548 intr_unit[intr] = &intr_unit[intr];
550 /* XXX how do I re-create dvp here? */
551 setidt(flags & INTR_FAST ? TPR_FAST_INTS + intr : TPR_SLOW_INTS + intr,
552 slowintr[intr], SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
554 #ifdef APIC_INTR_REORDER
555 set_lapic_isrloc(intr, ICU_OFFSET + intr);
557 setidt(ICU_OFFSET + intr, slowintr[intr], SDT_SYS386IGT, SEL_KPL,
558 GSEL(GCODE_SEL, SEL_KPL));
565 /* The following notice applies beyond this point in the file */
568 * Copyright (c) 1997, Stefan Esser <se@freebsd.org>
569 * All rights reserved.
571 * Redistribution and use in source and binary forms, with or without
572 * modification, are permitted provided that the following conditions
574 * 1. Redistributions of source code must retain the above copyright
575 * notice unmodified, this list of conditions, and the following
577 * 2. Redistributions in binary form must reproduce the above copyright
578 * notice, this list of conditions and the following disclaimer in the
579 * documentation and/or other materials provided with the distribution.
581 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
582 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
583 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
584 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
585 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
586 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
587 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
588 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
589 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
590 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
592 * $FreeBSD: src/sys/i386/isa/intr_machdep.c,v 1.29.2.5 2001/10/14 06:54:27 luigi Exp $
596 typedef struct intrec {
607 static intrec *intreclist_head[ICU_LEN];
610 * The interrupt multiplexer calls each of the handlers in turn. The
611 * ipl is initially quite low. It is raised as necessary for each call
612 * and lowered after the call. Thus out of order handling is possible
613 * even for interrupts of the same type. This is probably no more
614 * harmful than out of order handling in general (not harmful except
615 * for real time response which we don't support anyway).
624 for (pp = arg; (p = *pp) != NULL; pp = &p->next) {
625 oldspl = splq(p->mask);
626 p->handler(p->argument);
632 find_idesc(unsigned *maskptr, int irq)
634 intrec *p = intreclist_head[irq];
636 while (p && p->maskptr != maskptr)
643 find_pred(intrec *idesc, int irq)
645 intrec **pp = &intreclist_head[irq];
658 * Both the low level handler and the shared interrupt multiplexer
659 * block out further interrupts as set in the handlers "mask", while
660 * the handler is running. In fact *maskptr should be used for this
661 * purpose, but since this requires one more pointer dereference on
662 * each interrupt, we rather bother update "mask" whenever *maskptr
663 * changes. The function "update_masks" should be called **after**
664 * all manipulation of the linked list of interrupt handlers hung
665 * off of intrdec_head[irq] is complete, since the chain of handlers
666 * will both determine the *maskptr values and the instances of mask
667 * that are fixed. This function should be called with the irq for
668 * which a new handler has been add blocked, since the masks may not
669 * yet know about the use of this irq for a device of a certain class.
673 update_mux_masks(void)
676 for (irq = 0; irq < ICU_LEN; irq++) {
677 intrec *idesc = intreclist_head[irq];
678 while (idesc != NULL) {
679 if (idesc->maskptr != NULL) {
680 /* our copy of *maskptr may be stale, refresh */
681 idesc->mask = *idesc->maskptr;
689 update_masks(intrmask_t *maskptr, int irq)
691 intrmask_t mask = 1 << irq;
696 if (find_idesc(maskptr, irq) == NULL) {
697 /* no reference to this maskptr was found in this irq's chain */
700 /* a reference to this maskptr was found in this irq's chain */
703 /* we need to update all values in the intr_mask[irq] array */
705 /* update mask in chains of the interrupt multiplex handler as well */
710 * Add an interrupt handler to the linked list hung off of intreclist_head[irq]
711 * and install a shared interrupt multiplex handler, if necessary. Install
712 * an interrupt thread for each interrupt (though FAST interrupts will not
713 * use it). The preemption procedure checks the CPL. lwkt_preempt() will
714 * check relative thread priorities for us as long as we properly pass through
717 * The interrupt thread has already been put on the run queue, so if we cannot
718 * preempt we should force a reschedule.
720 * YYY needs work. At the moment the handler is run inside a critical
721 * section so only the preemption cpl check is used.
724 cpu_intr_preempt(struct thread *td, int critpri)
726 struct md_intr_info *info = td->td_info.intdata;
728 if ((curthread->td_cpl & (1 << info->irq)) == 0)
729 lwkt_preempt(td, critpri);
735 add_intrdesc(intrec *idesc)
737 int irq = idesc->intr;
741 * YYY This is a hack. The MI interrupt code in kern/kern_intr.c
742 * handles interrupt thread scheduling for NORMAL interrupts. It
743 * will never get called for fast interrupts. On the otherhand,
744 * the handler this code installs in intr_handler[] for a NORMAL
745 * interrupt is not used by the *vector.s code, so we need this
746 * temporary hack to run normal interrupts as interrupt threads.
749 if (intr_info[irq].mihandler_installed == 0) {
752 intr_info[irq].mihandler_installed = 1;
753 intr_info[irq].irq = irq;
754 td = register_int(irq, intr_mux, &intreclist_head[irq], idesc->name);
755 td->td_info.intdata = &intr_info[irq];
756 td->td_preemptable = cpu_intr_preempt;
757 printf("installed MI handler for int %d\n", irq);
760 head = intreclist_head[irq];
763 /* first handler for this irq, just install it */
764 if (icu_setup(irq, idesc->handler, idesc->argument,
765 idesc->maskptr, idesc->flags) != 0)
768 update_intrname(irq, idesc->name);
770 intreclist_head[irq] = idesc;
772 if ((idesc->flags & INTR_EXCL) != 0
773 || (head->flags & INTR_EXCL) != 0) {
775 * can't append new handler, if either list head or
776 * new handler do not allow interrupts to be shared
779 printf("\tdevice combination doesn't support "
780 "shared irq%d\n", irq);
783 if (head->next == NULL) {
785 * second handler for this irq, replace device driver's
786 * handler by shared interrupt multiplexer function
788 icu_unset(irq, head->handler);
789 if (icu_setup(irq, intr_mux, &intreclist_head[irq], 0, 0) != 0)
792 printf("\tusing shared irq%d.\n", irq);
793 update_intrname(irq, "mux");
795 /* just append to the end of the chain */
796 while (head->next != NULL)
800 update_masks(idesc->maskptr, irq);
805 * Create and activate an interrupt handler descriptor data structure.
807 * The dev_instance pointer is required for resource management, and will
808 * only be passed through to resource_claim().
810 * There will be functions that derive a driver and unit name from a
811 * dev_instance variable, and those functions will be used to maintain the
812 * interrupt counter label array referenced by systat and vmstat to report
813 * device interrupt rates (->update_intrlabels).
815 * Add the interrupt handler descriptor data structure created by an
816 * earlier call of create_intr() to the linked list for its irq and
817 * adjust the interrupt masks if necessary.
819 * WARNING: This is an internal function and not to be used by device
820 * drivers. It is subject to change without notice.
824 inthand_add(const char *name, int irq, inthand2_t handler, void *arg,
825 intrmask_t *maskptr, int flags)
831 if (ICU_LEN > 8 * sizeof *maskptr) {
832 printf("create_intr: ICU_LEN of %d too high for %d bit intrmask\n",
833 ICU_LEN, 8 * sizeof *maskptr);
836 if ((unsigned)irq >= ICU_LEN) {
837 printf("create_intr: requested irq%d too high, limit is %d\n",
842 idesc = malloc(sizeof *idesc, M_DEVBUF, M_WAITOK);
845 bzero(idesc, sizeof *idesc);
849 idesc->name = malloc(strlen(name) + 1, M_DEVBUF, M_WAITOK);
850 if (idesc->name == NULL) {
851 free(idesc, M_DEVBUF);
854 strcpy(idesc->name, name);
856 idesc->handler = handler;
857 idesc->argument = arg;
858 idesc->maskptr = maskptr;
860 idesc->flags = flags;
863 oldspl = splq(1 << irq);
865 /* add irq to class selected by maskptr */
866 errcode = add_intrdesc(idesc);
871 printf("\tintr_connect(irq%d) failed, result=%d\n",
873 free(idesc->name, M_DEVBUF);
874 free(idesc, M_DEVBUF);
882 * Deactivate and remove the interrupt handler descriptor data connected
883 * created by an earlier call of intr_connect() from the linked list and
884 * adjust theinterrupt masks if necessary.
886 * Return the memory held by the interrupt handler descriptor data structure
887 * to the system. Make sure, the handler is not actively used anymore, before.
891 inthand_remove(intrec *idesc)
893 intrec **hook, *head;
903 /* find pointer that keeps the reference to this interrupt descriptor */
904 hook = find_pred(idesc, irq);
908 /* make copy of original list head, the line after may overwrite it */
909 head = intreclist_head[irq];
911 /* unlink: make predecessor point to idesc->next instead of to idesc */
914 /* now check whether the element we removed was the list head */
917 oldspl = splq(1 << irq);
919 /* check whether the new list head is the only element on list */
920 head = intreclist_head[irq];
922 icu_unset(irq, intr_mux);
923 if (head->next != NULL) {
924 /* install the multiplex handler with new list head as argument */
925 errcode = icu_setup(irq, intr_mux, &intreclist_head[irq], 0, 0);
927 update_intrname(irq, NULL);
929 /* install the one remaining handler for this irq */
930 errcode = icu_setup(irq, head->handler,
932 head->maskptr, head->flags);
934 update_intrname(irq, head->name);
937 /* revert to old handler, eg: strayintr */
938 icu_unset(irq, idesc->handler);
942 update_masks(idesc->maskptr, irq);
943 free(idesc, M_DEVBUF);
950 * This function is called by an interrupt thread when it has completed
951 * processing a loop. We re-enable itnerrupts and interlock with
954 * See kern/kern_intr.c for more information.
957 ithread_done(int irq)
959 struct mdglobaldata *gd = mdcpu;
962 KKASSERT(curthread->td_pri >= TDPRI_CRIT);
963 lwkt_deschedule_self();
965 if (gd->gd_ipending & mask) {
966 atomic_clear_int_nonlocked(&gd->gd_ipending, mask);
968 lwkt_schedule_self();
976 * forward_fast_remote()
978 * This function is called from the receiving end of an IPIQ when a
979 * remote cpu wishes to forward a fast interrupt to us. All we have to
980 * do is set the interrupt pending and let the IPI's doreti deal with it.
983 forward_fastint_remote(void *arg)
986 struct mdglobaldata *gd = mdcpu;
988 atomic_set_int_nonlocked(&gd->gd_fpending, 1 << irq);
989 atomic_set_int_nonlocked(&gd->mi.gd_reqflags, RQF_INTPEND);