2 * Copyright (c) 2008, Pyun YongHyeon <yongari@FreeBSD.org>
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice unmodified, this list of conditions, and the following
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27 * $FreeBSD: src/sys/dev/jme/if_jmevar.h,v 1.1 2008/05/27 01:42:01 yongari Exp $
33 #include <sys/queue.h>
34 #include <sys/callout.h>
35 #include <sys/taskqueue.h>
38 * JMC250 supports upto JME_NDESC_MAX descriptors and the number of
39 * descriptors should be multiple of JME_NDESC_ALIGN.
41 #define JME_TX_DESC_CNT_DEF 512
42 #define JME_RX_DESC_CNT_DEF 512
44 #define JME_NDESC_ALIGN 16
45 #define JME_NDESC_MAX 1024
47 #define JME_NRXRING_1 1
48 #define JME_NRXRING_2 2
49 #define JME_NRXRING_4 4
51 #define JME_NRXRING_MIN JME_NRXRING_1
52 #define JME_NRXRING_MAX JME_NRXRING_4
54 /* RX rings + TX ring + status */
55 #define JME_NSERIALIZE (JME_NRXRING_MAX + 1 + 1)
57 /* RX rings + TX ring + status */
58 #define JME_MSIXCNT(nrx) ((nrx) + 1 + 1)
59 #define JME_NMSIX JME_MSIXCNT(JME_NRXRING_MAX)
62 * Tx/Rx descriptor queue base should be 16bytes aligned and
63 * should not cross 4G bytes boundary on the 64bits address
66 #define JME_TX_RING_ALIGN __VM_CACHELINE_SIZE
67 #define JME_RX_RING_ALIGN __VM_CACHELINE_SIZE
68 #define JME_MAXSEGSIZE 4096
69 #define JME_TSO_MAXSIZE (IP_MAXPACKET + sizeof(struct ether_vlan_header))
70 #define JME_MAXTXSEGS 40
71 #define JME_RX_BUF_ALIGN sizeof(uint64_t)
72 #define JME_SSB_ALIGN __VM_CACHELINE_SIZE
74 #if (BUS_SPACE_MAXADDR != BUS_SPACE_MAXADDR_32BIT)
75 #define JME_RING_BOUNDARY 0x100000000ULL
77 #define JME_RING_BOUNDARY 0
80 #define JME_ADDR_LO(x) ((uint64_t) (x) & 0xFFFFFFFF)
81 #define JME_ADDR_HI(x) ((uint64_t) (x) >> 32)
83 /* Water mark to kick reclaiming Tx buffers. */
84 #define JME_TX_DESC_HIWAT(tdata) \
85 ((tdata)->jme_tx_desc_cnt - (((tdata)->jme_tx_desc_cnt * 3) / 10))
88 * JMC250 can send 9K jumbo frame on Tx path and can receive
91 #define JME_JUMBO_FRAMELEN 9216
92 #define JME_JUMBO_MTU \
93 (JME_JUMBO_FRAMELEN - sizeof(struct ether_vlan_header) - \
94 ETHER_HDR_LEN - ETHER_CRC_LEN)
96 (ETHER_MAX_LEN + sizeof(struct ether_vlan_header) - \
97 ETHER_HDR_LEN - ETHER_CRC_LEN)
99 * JMC250 can't handle Tx checksum offload/TSO if frame length
100 * is larger than its FIFO size(2K). It's also good idea to not
101 * use jumbo frame if hardware is running at half-duplex media.
102 * Because the jumbo frame may not fit into the Tx FIFO,
103 * collisions make hardware fetch frame from host memory with
104 * DMA again which in turn slows down Tx performance
107 #define JME_TX_FIFO_SIZE 2000
109 * JMC250 has just 4K Rx FIFO. To support jumbo frame that is
110 * larger than 4K bytes in length, Rx FIFO threshold should be
111 * adjusted to minimize Rx FIFO overrun.
113 #define JME_RX_FIFO_SIZE 4000
115 #define JME_DESC_INC(x, y) ((x) = ((x) + 1) % (y))
116 #define JME_DESC_ADD(x, d, y) ((x) = ((x) + (d)) % (y))
120 bus_dmamap_t tx_dmamap;
122 struct jme_desc *tx_desc;
128 bus_dmamap_t rx_dmamap;
129 struct jme_desc *rx_desc;
138 struct lwkt_serialize jme_rx_serialize;
139 struct jme_softc *jme_sc;
141 uint32_t jme_rx_coal;
142 uint32_t jme_rx_comp;
143 uint32_t jme_rx_empty;
146 bus_dma_tag_t jme_rx_tag; /* RX mbuf tag */
147 bus_dmamap_t jme_rx_sparemap;
148 struct jme_rxdesc *jme_rxdesc;
150 struct jme_desc *jme_rx_ring;
155 struct mbuf *jme_rxhead;
156 struct mbuf *jme_rxtail;
161 bus_addr_t jme_rx_ring_paddr;
162 bus_dma_tag_t jme_rx_ring_tag;
163 bus_dmamap_t jme_rx_ring_map;
167 struct lwkt_serialize jme_tx_serialize;
168 struct jme_softc *jme_sc;
170 bus_dma_tag_t jme_tx_tag; /* TX mbuf tag */
171 struct jme_txdesc *jme_txdesc;
173 struct jme_desc *jme_tx_ring;
181 bus_addr_t jme_tx_ring_paddr;
182 bus_dma_tag_t jme_tx_ring_tag;
183 bus_dmamap_t jme_tx_ring_map;
186 struct jme_chain_data {
190 struct jme_txdata jme_tx_data;
196 struct jme_rxdata jme_rx_data[JME_NRXRING_MAX];
201 bus_dma_tag_t jme_ring_tag; /* parent ring tag */
202 bus_dma_tag_t jme_buffer_tag; /* parent mbuf/ssb tag */
205 * Shadow status block (unused)
207 struct jme_ssb *jme_ssb_block;
208 bus_addr_t jme_ssb_block_paddr;
209 bus_dma_tag_t jme_ssb_tag;
210 bus_dmamap_t jme_ssb_map;
213 struct jme_msix_data {
216 u_int jme_msix_vector;
217 uint32_t jme_msix_intrs;
218 struct resource *jme_msix_res;
219 void *jme_msix_handle;
220 struct lwkt_serialize *jme_msix_serialize;
221 char jme_msix_desc[64];
223 driver_intr_t *jme_msix_func;
227 #define JME_TX_RING_SIZE(tdata) \
228 (sizeof(struct jme_desc) * (tdata)->jme_tx_desc_cnt)
229 #define JME_RX_RING_SIZE(rdata) \
230 (sizeof(struct jme_desc) * (rdata)->jme_rx_desc_cnt)
231 #define JME_SSB_SIZE sizeof(struct jme_ssb)
234 * Software state per device.
237 struct arpcom arpcom;
241 struct resource *jme_mem_res;
242 bus_space_tag_t jme_mem_bt;
243 bus_space_handle_t jme_mem_bh;
247 struct resource *jme_irq_res;
248 void *jme_irq_handle;
249 struct jme_msix_data jme_msix[JME_NMSIX];
251 uint32_t jme_msinum[JME_MSINUM_CNT];
259 bus_addr_t jme_lowaddr;
262 uint32_t jme_clksrc_1000;
263 uint16_t jme_phycom0;
264 uint16_t jme_phycom1;
265 uint32_t jme_tx_dma_size;
266 uint32_t jme_rx_dma_size;
269 #define JME_CAP_FPGA 0x0001
270 #define JME_CAP_PCIE 0x0002
271 #define JME_CAP_PMCAP 0x0004
272 #define JME_CAP_FASTETH 0x0008
273 #define JME_CAP_JUMBO 0x0010
274 #define JME_CAP_PHYPWR 0x0020
276 uint32_t jme_workaround;
277 #define JME_WA_EXTFIFO 0x0001
278 #define JME_WA_HDX 0x0002
280 boolean_t jme_has_link;
281 boolean_t jme_in_tick;
283 struct lwkt_serialize jme_serialize;
284 struct lwkt_serialize *jme_serialize_arr[JME_NSERIALIZE];
285 int jme_serialize_cnt;
287 struct callout jme_tick_ch;
288 struct jme_chain_data jme_cdata;
303 /* Register access macros. */
304 #define CSR_WRITE_4(_sc, reg, val) \
305 bus_space_write_4((_sc)->jme_mem_bt, (_sc)->jme_mem_bh, (reg), (val))
306 #define CSR_READ_4(_sc, reg) \
307 bus_space_read_4((_sc)->jme_mem_bt, (_sc)->jme_mem_bh, (reg))
311 #define JME_RXCHAIN_RESET(rdata) \
313 (rdata)->jme_rxhead = NULL; \
314 (rdata)->jme_rxtail = NULL; \
315 (rdata)->jme_rxlen = 0; \
318 #define JME_TX_TIMEOUT 5
319 #define JME_TIMEOUT 1000
320 #define JME_PHY_TIMEOUT 1000
321 #define JME_EEPROM_TIMEOUT 1000
323 #define JME_TXD_RSVD 1
324 /* Large enough to cooperate 64K TSO segment and one spare TX descriptor */
325 #define JME_TXD_SPARE 34
327 #define JME_TXWREG_NSEGS 16
329 #define JME_ENABLE_HWRSS(sc) \
330 ((sc)->jme_cdata.jme_rx_ring_cnt > JME_NRXRING_MIN)