| 1 | /* |
| 2 | * Copyright (c) 1997, 1998, 1999 |
| 3 | * Bill Paul <wpaul@ctr.columbia.edu>. All rights reserved. |
| 4 | * |
| 5 | * Redistribution and use in source and binary forms, with or without |
| 6 | * modification, are permitted provided that the following conditions |
| 7 | * are met: |
| 8 | * 1. Redistributions of source code must retain the above copyright |
| 9 | * notice, this list of conditions and the following disclaimer. |
| 10 | * 2. Redistributions in binary form must reproduce the above copyright |
| 11 | * notice, this list of conditions and the following disclaimer in the |
| 12 | * documentation and/or other materials provided with the distribution. |
| 13 | * 3. All advertising materials mentioning features or use of this software |
| 14 | * must display the following acknowledgement: |
| 15 | * This product includes software developed by Bill Paul. |
| 16 | * 4. Neither the name of the author nor the names of any co-contributors |
| 17 | * may be used to endorse or promote products derived from this software |
| 18 | * without specific prior written permission. |
| 19 | * |
| 20 | * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND |
| 21 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| 22 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
| 23 | * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD |
| 24 | * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
| 25 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
| 26 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
| 27 | * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
| 28 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
| 29 | * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF |
| 30 | * THE POSSIBILITY OF SUCH DAMAGE. |
| 31 | * |
| 32 | * $FreeBSD: src/sys/dev/an/if_an.c,v 1.2.2.13 2003/02/11 03:32:48 ambrisko Exp $ |
| 33 | * $DragonFly: src/sys/dev/netif/an/if_an.c,v 1.33 2005/11/22 00:24:14 dillon Exp $ |
| 34 | */ |
| 35 | |
| 36 | /* |
| 37 | * Aironet 4500/4800 802.11 PCMCIA/ISA/PCI driver for FreeBSD. |
| 38 | * |
| 39 | * Written by Bill Paul <wpaul@ctr.columbia.edu> |
| 40 | * Electrical Engineering Department |
| 41 | * Columbia University, New York City |
| 42 | */ |
| 43 | |
| 44 | /* |
| 45 | * The Aironet 4500/4800 series cards come in PCMCIA, ISA and PCI form. |
| 46 | * This driver supports all three device types (PCI devices are supported |
| 47 | * through an extra PCI shim: /sys/dev/an/if_an_pci.c). ISA devices can be |
| 48 | * supported either using hard-coded IO port/IRQ settings or via Plug |
| 49 | * and Play. The 4500 series devices support 1Mbps and 2Mbps data rates. |
| 50 | * The 4800 devices support 1, 2, 5.5 and 11Mbps rates. |
| 51 | * |
| 52 | * Like the WaveLAN/IEEE cards, the Aironet NICs are all essentially |
| 53 | * PCMCIA devices. The ISA and PCI cards are a combination of a PCMCIA |
| 54 | * device and a PCMCIA to ISA or PCMCIA to PCI adapter card. There are |
| 55 | * a couple of important differences though: |
| 56 | * |
| 57 | * - Lucent ISA card looks to the host like a PCMCIA controller with |
| 58 | * a PCMCIA WaveLAN card inserted. This means that even desktop |
| 59 | * machines need to be configured with PCMCIA support in order to |
| 60 | * use WaveLAN/IEEE ISA cards. The Aironet cards on the other hand |
| 61 | * actually look like normal ISA and PCI devices to the host, so |
| 62 | * no PCMCIA controller support is needed |
| 63 | * |
| 64 | * The latter point results in a small gotcha. The Aironet PCMCIA |
| 65 | * cards can be configured for one of two operating modes depending |
| 66 | * on how the Vpp1 and Vpp2 programming voltages are set when the |
| 67 | * card is activated. In order to put the card in proper PCMCIA |
| 68 | * operation (where the CIS table is visible and the interface is |
| 69 | * programmed for PCMCIA operation), both Vpp1 and Vpp2 have to be |
| 70 | * set to 5 volts. FreeBSD by default doesn't set the Vpp voltages, |
| 71 | * which leaves the card in ISA/PCI mode, which prevents it from |
| 72 | * being activated as an PCMCIA device. |
| 73 | * |
| 74 | * Note that some PCMCIA controller software packages for Windows NT |
| 75 | * fail to set the voltages as well. |
| 76 | * |
| 77 | * The Aironet devices can operate in both station mode and access point |
| 78 | * mode. Typically, when programmed for station mode, the card can be set |
| 79 | * to automatically perform encapsulation/decapsulation of Ethernet II |
| 80 | * and 802.3 frames within 802.11 frames so that the host doesn't have |
| 81 | * to do it itself. This driver doesn't program the card that way: the |
| 82 | * driver handles all of the encapsulation/decapsulation itself. |
| 83 | */ |
| 84 | |
| 85 | #include "opt_inet.h" |
| 86 | |
| 87 | #ifdef INET |
| 88 | #define ANCACHE /* enable signal strength cache */ |
| 89 | #endif |
| 90 | |
| 91 | #include <sys/param.h> |
| 92 | #include <sys/systm.h> |
| 93 | #include <sys/sockio.h> |
| 94 | #include <sys/mbuf.h> |
| 95 | #include <sys/kernel.h> |
| 96 | #include <sys/proc.h> |
| 97 | #include <sys/ucred.h> |
| 98 | #include <sys/socket.h> |
| 99 | #ifdef ANCACHE |
| 100 | #include <sys/syslog.h> |
| 101 | #endif |
| 102 | #include <sys/sysctl.h> |
| 103 | #include <sys/thread2.h> |
| 104 | |
| 105 | #include <sys/module.h> |
| 106 | #include <sys/sysctl.h> |
| 107 | #include <sys/bus.h> |
| 108 | #include <machine/bus.h> |
| 109 | #include <sys/rman.h> |
| 110 | #include <machine/resource.h> |
| 111 | #include <sys/malloc.h> |
| 112 | |
| 113 | #include <net/if.h> |
| 114 | #include <net/ifq_var.h> |
| 115 | #include <net/if_arp.h> |
| 116 | #include <net/ethernet.h> |
| 117 | #include <net/if_dl.h> |
| 118 | #include <net/if_types.h> |
| 119 | #include <net/if_media.h> |
| 120 | #include <netproto/802_11/ieee80211.h> |
| 121 | #include <netproto/802_11/ieee80211_ioctl.h> |
| 122 | |
| 123 | #ifdef INET |
| 124 | #include <netinet/in.h> |
| 125 | #include <netinet/in_systm.h> |
| 126 | #include <netinet/in_var.h> |
| 127 | #include <netinet/ip.h> |
| 128 | #endif |
| 129 | |
| 130 | #include <net/bpf.h> |
| 131 | |
| 132 | #include <machine/md_var.h> |
| 133 | |
| 134 | #include "if_aironet_ieee.h" |
| 135 | #include "if_anreg.h" |
| 136 | |
| 137 | /* These are global because we need them in sys/pci/if_an_p.c. */ |
| 138 | static void an_reset (struct an_softc *); |
| 139 | static int an_init_mpi350_desc (struct an_softc *); |
| 140 | static int an_ioctl (struct ifnet *, u_long, caddr_t, |
| 141 | struct ucred *); |
| 142 | static void an_init (void *); |
| 143 | static int an_init_tx_ring (struct an_softc *); |
| 144 | static void an_start (struct ifnet *); |
| 145 | static void an_watchdog (struct ifnet *); |
| 146 | static void an_rxeof (struct an_softc *); |
| 147 | static void an_txeof (struct an_softc *, int); |
| 148 | |
| 149 | static void an_promisc (struct an_softc *, int); |
| 150 | static int an_cmd (struct an_softc *, int, int); |
| 151 | static int an_cmd_struct (struct an_softc *, struct an_command *, |
| 152 | struct an_reply *); |
| 153 | static int an_read_record (struct an_softc *, struct an_ltv_gen *); |
| 154 | static int an_write_record (struct an_softc *, struct an_ltv_gen *); |
| 155 | static int an_read_data (struct an_softc *, int, |
| 156 | int, caddr_t, int); |
| 157 | static int an_write_data (struct an_softc *, int, |
| 158 | int, caddr_t, int); |
| 159 | static int an_seek (struct an_softc *, int, int, int); |
| 160 | static int an_alloc_nicmem (struct an_softc *, int, int *); |
| 161 | static int an_dma_malloc (struct an_softc *, bus_size_t, |
| 162 | struct an_dma_alloc *, int); |
| 163 | static void an_dma_free (struct an_softc *, |
| 164 | struct an_dma_alloc *); |
| 165 | static void an_dma_malloc_cb (void *, bus_dma_segment_t *, int, int); |
| 166 | static void an_stats_update (void *); |
| 167 | static void an_setdef (struct an_softc *, struct an_req *); |
| 168 | #ifdef ANCACHE |
| 169 | static void an_cache_store (struct an_softc *, struct mbuf *, |
| 170 | uint8_t, uint8_t); |
| 171 | #endif |
| 172 | |
| 173 | /* function definitions for use with the Cisco's Linux configuration |
| 174 | utilities |
| 175 | */ |
| 176 | |
| 177 | static int readrids (struct ifnet*, struct aironet_ioctl*); |
| 178 | static int writerids (struct ifnet*, struct aironet_ioctl*); |
| 179 | static int flashcard (struct ifnet*, struct aironet_ioctl*); |
| 180 | |
| 181 | static int cmdreset (struct ifnet *); |
| 182 | static int setflashmode (struct ifnet *); |
| 183 | static int flashgchar (struct ifnet *,int,int); |
| 184 | static int flashpchar (struct ifnet *,int,int); |
| 185 | static int flashputbuf (struct ifnet *); |
| 186 | static int flashrestart (struct ifnet *); |
| 187 | static int WaitBusy (struct ifnet *, int); |
| 188 | static int unstickbusy (struct ifnet *); |
| 189 | |
| 190 | static void an_dump_record (struct an_softc *,struct an_ltv_gen *, |
| 191 | char *); |
| 192 | |
| 193 | static int an_media_change (struct ifnet *); |
| 194 | static void an_media_status (struct ifnet *, struct ifmediareq *); |
| 195 | |
| 196 | static int an_dump = 0; |
| 197 | static int an_cache_mode = 0; |
| 198 | |
| 199 | #define DBM 0 |
| 200 | #define PERCENT 1 |
| 201 | #define RAW 2 |
| 202 | |
| 203 | static char an_conf[256]; |
| 204 | static char an_conf_cache[256]; |
| 205 | |
| 206 | DECLARE_DUMMY_MODULE(if_an); |
| 207 | |
| 208 | /* sysctl vars */ |
| 209 | |
| 210 | SYSCTL_NODE(_hw, OID_AUTO, an, CTLFLAG_RD, 0, "Wireless driver parameters"); |
| 211 | |
| 212 | static int |
| 213 | sysctl_an_dump(SYSCTL_HANDLER_ARGS) |
| 214 | { |
| 215 | int error, r, last; |
| 216 | char *s = an_conf; |
| 217 | |
| 218 | last = an_dump; |
| 219 | |
| 220 | switch (an_dump) { |
| 221 | case 0: |
| 222 | strcpy(an_conf, "off"); |
| 223 | break; |
| 224 | case 1: |
| 225 | strcpy(an_conf, "type"); |
| 226 | break; |
| 227 | case 2: |
| 228 | strcpy(an_conf, "dump"); |
| 229 | break; |
| 230 | default: |
| 231 | snprintf(an_conf, 5, "%x", an_dump); |
| 232 | break; |
| 233 | } |
| 234 | |
| 235 | error = sysctl_handle_string(oidp, an_conf, sizeof(an_conf), req); |
| 236 | |
| 237 | if (strncmp(an_conf,"off", 3) == 0) { |
| 238 | an_dump = 0; |
| 239 | } |
| 240 | if (strncmp(an_conf,"dump", 4) == 0) { |
| 241 | an_dump = 1; |
| 242 | } |
| 243 | if (strncmp(an_conf,"type", 4) == 0) { |
| 244 | an_dump = 2; |
| 245 | } |
| 246 | if (*s == 'f') { |
| 247 | r = 0; |
| 248 | for (;;s++) { |
| 249 | if ((*s >= '0') && (*s <= '9')) { |
| 250 | r = r * 16 + (*s - '0'); |
| 251 | } else if ((*s >= 'a') && (*s <= 'f')) { |
| 252 | r = r * 16 + (*s - 'a' + 10); |
| 253 | } else { |
| 254 | break; |
| 255 | } |
| 256 | } |
| 257 | an_dump = r; |
| 258 | } |
| 259 | if (an_dump != last) |
| 260 | printf("Sysctl changed for Aironet driver\n"); |
| 261 | |
| 262 | return error; |
| 263 | } |
| 264 | |
| 265 | SYSCTL_PROC(_hw_an, OID_AUTO, an_dump, CTLTYPE_STRING | CTLFLAG_RW, |
| 266 | 0, sizeof(an_conf), sysctl_an_dump, "A", ""); |
| 267 | |
| 268 | static int |
| 269 | sysctl_an_cache_mode(SYSCTL_HANDLER_ARGS) |
| 270 | { |
| 271 | int error, last; |
| 272 | |
| 273 | last = an_cache_mode; |
| 274 | |
| 275 | switch (an_cache_mode) { |
| 276 | case 1: |
| 277 | strcpy(an_conf_cache, "per"); |
| 278 | break; |
| 279 | case 2: |
| 280 | strcpy(an_conf_cache, "raw"); |
| 281 | break; |
| 282 | default: |
| 283 | strcpy(an_conf_cache, "dbm"); |
| 284 | break; |
| 285 | } |
| 286 | |
| 287 | error = sysctl_handle_string(oidp, an_conf_cache, |
| 288 | sizeof(an_conf_cache), req); |
| 289 | |
| 290 | if (strncmp(an_conf_cache,"dbm", 3) == 0) { |
| 291 | an_cache_mode = 0; |
| 292 | } |
| 293 | if (strncmp(an_conf_cache,"per", 3) == 0) { |
| 294 | an_cache_mode = 1; |
| 295 | } |
| 296 | if (strncmp(an_conf_cache,"raw", 3) == 0) { |
| 297 | an_cache_mode = 2; |
| 298 | } |
| 299 | |
| 300 | return error; |
| 301 | } |
| 302 | |
| 303 | SYSCTL_PROC(_hw_an, OID_AUTO, an_cache_mode, CTLTYPE_STRING | CTLFLAG_RW, |
| 304 | 0, sizeof(an_conf_cache), sysctl_an_cache_mode, "A", ""); |
| 305 | |
| 306 | /* |
| 307 | * We probe for an Aironet 4500/4800 card by attempting to |
| 308 | * read the default SSID list. On reset, the first entry in |
| 309 | * the SSID list will contain the name "tsunami." If we don't |
| 310 | * find this, then there's no card present. |
| 311 | */ |
| 312 | int |
| 313 | an_probe(dev) |
| 314 | device_t dev; |
| 315 | { |
| 316 | struct an_softc *sc = device_get_softc(dev); |
| 317 | struct an_ltv_ssidlist_new ssid; |
| 318 | int error; |
| 319 | |
| 320 | bzero((char *)&ssid, sizeof(ssid)); |
| 321 | |
| 322 | error = an_alloc_port(dev, 0, AN_IOSIZ); |
| 323 | if (error) |
| 324 | return (error); |
| 325 | |
| 326 | /* can't do autoprobing */ |
| 327 | if (rman_get_start(sc->port_res) == -1) |
| 328 | return(ENXIO); |
| 329 | |
| 330 | /* |
| 331 | * We need to fake up a softc structure long enough |
| 332 | * to be able to issue commands and call some of the |
| 333 | * other routines. |
| 334 | */ |
| 335 | sc->an_bhandle = rman_get_bushandle(sc->port_res); |
| 336 | sc->an_btag = rman_get_bustag(sc->port_res); |
| 337 | |
| 338 | ssid.an_len = sizeof(ssid); |
| 339 | ssid.an_type = AN_RID_SSIDLIST; |
| 340 | |
| 341 | /* Make sure interrupts are disabled. */ |
| 342 | sc->mpi350 = 0; |
| 343 | CSR_WRITE_2(sc, AN_INT_EN(sc->mpi350), 0); |
| 344 | CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), 0xFFFF); |
| 345 | |
| 346 | if_initname(&sc->arpcom.ac_if, device_get_name(dev), |
| 347 | device_get_unit(dev)); |
| 348 | an_reset(sc); |
| 349 | |
| 350 | if (an_cmd(sc, AN_CMD_READCFG, 0)) |
| 351 | return(ENXIO); |
| 352 | |
| 353 | if (an_read_record(sc, (struct an_ltv_gen *)&ssid)) |
| 354 | return(ENXIO); |
| 355 | |
| 356 | /* See if the ssid matches what we expect ... but doesn't have to */ |
| 357 | if (strcmp(ssid.an_entry[0].an_ssid, AN_DEF_SSID)) |
| 358 | return(ENXIO); |
| 359 | |
| 360 | return(0); |
| 361 | } |
| 362 | |
| 363 | /* |
| 364 | * Allocate a port resource with the given resource id. |
| 365 | */ |
| 366 | int |
| 367 | an_alloc_port(dev, rid, size) |
| 368 | device_t dev; |
| 369 | int rid; |
| 370 | int size; |
| 371 | { |
| 372 | struct an_softc *sc = device_get_softc(dev); |
| 373 | struct resource *res; |
| 374 | |
| 375 | res = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid, |
| 376 | 0ul, ~0ul, size, RF_ACTIVE); |
| 377 | if (res) { |
| 378 | sc->port_rid = rid; |
| 379 | sc->port_res = res; |
| 380 | return (0); |
| 381 | } else { |
| 382 | return (ENOENT); |
| 383 | } |
| 384 | } |
| 385 | |
| 386 | /* |
| 387 | * Allocate a memory resource with the given resource id. |
| 388 | */ |
| 389 | int an_alloc_memory(device_t dev, int rid, int size) |
| 390 | { |
| 391 | struct an_softc *sc = device_get_softc(dev); |
| 392 | struct resource *res; |
| 393 | |
| 394 | res = bus_alloc_resource(dev, SYS_RES_MEMORY, &rid, |
| 395 | 0ul, ~0ul, size, RF_ACTIVE); |
| 396 | if (res) { |
| 397 | sc->mem_rid = rid; |
| 398 | sc->mem_res = res; |
| 399 | sc->mem_used = size; |
| 400 | return (0); |
| 401 | } else { |
| 402 | return (ENOENT); |
| 403 | } |
| 404 | } |
| 405 | |
| 406 | /* |
| 407 | * Allocate a auxilary memory resource with the given resource id. |
| 408 | */ |
| 409 | int an_alloc_aux_memory(device_t dev, int rid, int size) |
| 410 | { |
| 411 | struct an_softc *sc = device_get_softc(dev); |
| 412 | struct resource *res; |
| 413 | |
| 414 | res = bus_alloc_resource(dev, SYS_RES_MEMORY, &rid, |
| 415 | 0ul, ~0ul, size, RF_ACTIVE); |
| 416 | if (res) { |
| 417 | sc->mem_aux_rid = rid; |
| 418 | sc->mem_aux_res = res; |
| 419 | sc->mem_aux_used = size; |
| 420 | return (0); |
| 421 | } else { |
| 422 | return (ENOENT); |
| 423 | } |
| 424 | } |
| 425 | |
| 426 | /* |
| 427 | * Allocate an irq resource with the given resource id. |
| 428 | */ |
| 429 | int |
| 430 | an_alloc_irq(dev, rid, flags) |
| 431 | device_t dev; |
| 432 | int rid; |
| 433 | int flags; |
| 434 | { |
| 435 | struct an_softc *sc = device_get_softc(dev); |
| 436 | struct resource *res; |
| 437 | |
| 438 | res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, |
| 439 | (RF_ACTIVE | flags)); |
| 440 | if (res) { |
| 441 | sc->irq_rid = rid; |
| 442 | sc->irq_res = res; |
| 443 | return (0); |
| 444 | } else { |
| 445 | return (ENOENT); |
| 446 | } |
| 447 | } |
| 448 | |
| 449 | static void |
| 450 | an_dma_malloc_cb(arg, segs, nseg, error) |
| 451 | void *arg; |
| 452 | bus_dma_segment_t *segs; |
| 453 | int nseg; |
| 454 | int error; |
| 455 | { |
| 456 | bus_addr_t *paddr = (bus_addr_t*) arg; |
| 457 | *paddr = segs->ds_addr; |
| 458 | } |
| 459 | |
| 460 | /* |
| 461 | * Alloc DMA memory and set the pointer to it |
| 462 | */ |
| 463 | static int |
| 464 | an_dma_malloc(sc, size, dma, mapflags) |
| 465 | struct an_softc *sc; |
| 466 | bus_size_t size; |
| 467 | struct an_dma_alloc *dma; |
| 468 | int mapflags; |
| 469 | { |
| 470 | int r; |
| 471 | |
| 472 | r = bus_dmamap_create(sc->an_dtag, 0, &dma->an_dma_map); |
| 473 | if (r != 0) |
| 474 | goto fail_0; |
| 475 | |
| 476 | r = bus_dmamem_alloc(sc->an_dtag, (void**) &dma->an_dma_vaddr, |
| 477 | BUS_DMA_WAITOK, &dma->an_dma_map); |
| 478 | if (r != 0) |
| 479 | goto fail_1; |
| 480 | |
| 481 | r = bus_dmamap_load(sc->an_dtag, dma->an_dma_map, dma->an_dma_vaddr, |
| 482 | size, |
| 483 | an_dma_malloc_cb, |
| 484 | &dma->an_dma_paddr, |
| 485 | mapflags); |
| 486 | if (r != 0) |
| 487 | goto fail_2; |
| 488 | |
| 489 | dma->an_dma_size = size; |
| 490 | return (0); |
| 491 | |
| 492 | fail_2: |
| 493 | bus_dmamap_unload(sc->an_dtag, dma->an_dma_map); |
| 494 | fail_1: |
| 495 | bus_dmamem_free(sc->an_dtag, dma->an_dma_vaddr, dma->an_dma_map); |
| 496 | fail_0: |
| 497 | bus_dmamap_destroy(sc->an_dtag, dma->an_dma_map); |
| 498 | dma->an_dma_map = NULL; |
| 499 | return (r); |
| 500 | } |
| 501 | |
| 502 | static void |
| 503 | an_dma_free(sc, dma) |
| 504 | struct an_softc *sc; |
| 505 | struct an_dma_alloc *dma; |
| 506 | { |
| 507 | bus_dmamap_unload(sc->an_dtag, dma->an_dma_map); |
| 508 | bus_dmamem_free(sc->an_dtag, dma->an_dma_vaddr, dma->an_dma_map); |
| 509 | dma->an_dma_vaddr = NULL; |
| 510 | bus_dmamap_destroy(sc->an_dtag, dma->an_dma_map); |
| 511 | } |
| 512 | |
| 513 | /* |
| 514 | * Release all resources |
| 515 | */ |
| 516 | void |
| 517 | an_release_resources(dev) |
| 518 | device_t dev; |
| 519 | { |
| 520 | struct an_softc *sc = device_get_softc(dev); |
| 521 | int i; |
| 522 | |
| 523 | if (sc->port_res) { |
| 524 | bus_release_resource(dev, SYS_RES_IOPORT, |
| 525 | sc->port_rid, sc->port_res); |
| 526 | sc->port_res = 0; |
| 527 | } |
| 528 | if (sc->mem_res) { |
| 529 | bus_release_resource(dev, SYS_RES_MEMORY, |
| 530 | sc->mem_rid, sc->mem_res); |
| 531 | sc->mem_res = 0; |
| 532 | } |
| 533 | if (sc->mem_aux_res) { |
| 534 | bus_release_resource(dev, SYS_RES_MEMORY, |
| 535 | sc->mem_aux_rid, sc->mem_aux_res); |
| 536 | sc->mem_aux_res = 0; |
| 537 | } |
| 538 | if (sc->irq_res) { |
| 539 | bus_release_resource(dev, SYS_RES_IRQ, |
| 540 | sc->irq_rid, sc->irq_res); |
| 541 | sc->irq_res = 0; |
| 542 | } |
| 543 | if (sc->an_rid_buffer.an_dma_paddr) { |
| 544 | an_dma_free(sc, &sc->an_rid_buffer); |
| 545 | } |
| 546 | for (i = 0; i < AN_MAX_RX_DESC; i++) |
| 547 | if (sc->an_rx_buffer[i].an_dma_paddr) { |
| 548 | an_dma_free(sc, &sc->an_rx_buffer[i]); |
| 549 | } |
| 550 | for (i = 0; i < AN_MAX_TX_DESC; i++) |
| 551 | if (sc->an_tx_buffer[i].an_dma_paddr) { |
| 552 | an_dma_free(sc, &sc->an_tx_buffer[i]); |
| 553 | } |
| 554 | if (sc->an_dtag) { |
| 555 | bus_dma_tag_destroy(sc->an_dtag); |
| 556 | } |
| 557 | |
| 558 | } |
| 559 | |
| 560 | int |
| 561 | an_init_mpi350_desc(sc) |
| 562 | struct an_softc *sc; |
| 563 | { |
| 564 | struct an_command cmd_struct; |
| 565 | struct an_reply reply; |
| 566 | struct an_card_rid_desc an_rid_desc; |
| 567 | struct an_card_rx_desc an_rx_desc; |
| 568 | struct an_card_tx_desc an_tx_desc; |
| 569 | int i, desc; |
| 570 | |
| 571 | if(!sc->an_rid_buffer.an_dma_paddr) |
| 572 | an_dma_malloc(sc, AN_RID_BUFFER_SIZE, |
| 573 | &sc->an_rid_buffer, 0); |
| 574 | for (i = 0; i < AN_MAX_RX_DESC; i++) |
| 575 | if(!sc->an_rx_buffer[i].an_dma_paddr) |
| 576 | an_dma_malloc(sc, AN_RX_BUFFER_SIZE, |
| 577 | &sc->an_rx_buffer[i], 0); |
| 578 | for (i = 0; i < AN_MAX_TX_DESC; i++) |
| 579 | if(!sc->an_tx_buffer[i].an_dma_paddr) |
| 580 | an_dma_malloc(sc, AN_TX_BUFFER_SIZE, |
| 581 | &sc->an_tx_buffer[i], 0); |
| 582 | |
| 583 | /* |
| 584 | * Allocate RX descriptor |
| 585 | */ |
| 586 | bzero(&reply,sizeof(reply)); |
| 587 | cmd_struct.an_cmd = AN_CMD_ALLOC_DESC; |
| 588 | cmd_struct.an_parm0 = AN_DESCRIPTOR_RX; |
| 589 | cmd_struct.an_parm1 = AN_RX_DESC_OFFSET; |
| 590 | cmd_struct.an_parm2 = AN_MAX_RX_DESC; |
| 591 | if (an_cmd_struct(sc, &cmd_struct, &reply)) { |
| 592 | if_printf(&sc->arpcom.ac_if, |
| 593 | "failed to allocate RX descriptor\n"); |
| 594 | return(EIO); |
| 595 | } |
| 596 | |
| 597 | for (desc = 0; desc < AN_MAX_RX_DESC; desc++) { |
| 598 | bzero(&an_rx_desc, sizeof(an_rx_desc)); |
| 599 | an_rx_desc.an_valid = 1; |
| 600 | an_rx_desc.an_len = AN_RX_BUFFER_SIZE; |
| 601 | an_rx_desc.an_done = 0; |
| 602 | an_rx_desc.an_phys = sc->an_rx_buffer[desc].an_dma_paddr; |
| 603 | |
| 604 | for (i = 0; i < sizeof(an_rx_desc) / 4; i++) |
| 605 | CSR_MEM_AUX_WRITE_4(sc, AN_RX_DESC_OFFSET |
| 606 | + (desc * sizeof(an_rx_desc)) |
| 607 | + (i * 4), |
| 608 | ((u_int32_t*)&an_rx_desc)[i]); |
| 609 | } |
| 610 | |
| 611 | /* |
| 612 | * Allocate TX descriptor |
| 613 | */ |
| 614 | |
| 615 | bzero(&reply,sizeof(reply)); |
| 616 | cmd_struct.an_cmd = AN_CMD_ALLOC_DESC; |
| 617 | cmd_struct.an_parm0 = AN_DESCRIPTOR_TX; |
| 618 | cmd_struct.an_parm1 = AN_TX_DESC_OFFSET; |
| 619 | cmd_struct.an_parm2 = AN_MAX_TX_DESC; |
| 620 | if (an_cmd_struct(sc, &cmd_struct, &reply)) { |
| 621 | if_printf(&sc->arpcom.ac_if, |
| 622 | "failed to allocate TX descriptor\n"); |
| 623 | return(EIO); |
| 624 | } |
| 625 | |
| 626 | for (desc = 0; desc < AN_MAX_TX_DESC; desc++) { |
| 627 | bzero(&an_tx_desc, sizeof(an_tx_desc)); |
| 628 | an_tx_desc.an_offset = 0; |
| 629 | an_tx_desc.an_eoc = 0; |
| 630 | an_tx_desc.an_valid = 0; |
| 631 | an_tx_desc.an_len = 0; |
| 632 | an_tx_desc.an_phys = sc->an_tx_buffer[desc].an_dma_paddr; |
| 633 | |
| 634 | for (i = 0; i < sizeof(an_tx_desc) / 4; i++) |
| 635 | CSR_MEM_AUX_WRITE_4(sc, AN_TX_DESC_OFFSET |
| 636 | + (desc * sizeof(an_tx_desc)) |
| 637 | + (i * 4), |
| 638 | ((u_int32_t*)&an_tx_desc)[i]); |
| 639 | } |
| 640 | |
| 641 | /* |
| 642 | * Allocate RID descriptor |
| 643 | */ |
| 644 | |
| 645 | bzero(&reply,sizeof(reply)); |
| 646 | cmd_struct.an_cmd = AN_CMD_ALLOC_DESC; |
| 647 | cmd_struct.an_parm0 = AN_DESCRIPTOR_HOSTRW; |
| 648 | cmd_struct.an_parm1 = AN_HOST_DESC_OFFSET; |
| 649 | cmd_struct.an_parm2 = 1; |
| 650 | if (an_cmd_struct(sc, &cmd_struct, &reply)) { |
| 651 | if_printf(&sc->arpcom.ac_if, |
| 652 | "failed to allocate host descriptor\n"); |
| 653 | return(EIO); |
| 654 | } |
| 655 | |
| 656 | bzero(&an_rid_desc, sizeof(an_rid_desc)); |
| 657 | an_rid_desc.an_valid = 1; |
| 658 | an_rid_desc.an_len = AN_RID_BUFFER_SIZE; |
| 659 | an_rid_desc.an_rid = 0; |
| 660 | an_rid_desc.an_phys = sc->an_rid_buffer.an_dma_paddr; |
| 661 | |
| 662 | for (i = 0; i < sizeof(an_rid_desc) / 4; i++) |
| 663 | CSR_MEM_AUX_WRITE_4(sc, AN_HOST_DESC_OFFSET + i * 4, |
| 664 | ((u_int32_t*)&an_rid_desc)[i]); |
| 665 | |
| 666 | return(0); |
| 667 | } |
| 668 | |
| 669 | int |
| 670 | an_attach(sc, dev, flags) |
| 671 | struct an_softc *sc; |
| 672 | device_t dev; |
| 673 | int flags; |
| 674 | { |
| 675 | struct ifnet *ifp = &sc->arpcom.ac_if; |
| 676 | int error; |
| 677 | |
| 678 | callout_init(&sc->an_stat_timer); |
| 679 | sc->an_associated = 0; |
| 680 | sc->an_monitor = 0; |
| 681 | sc->an_was_monitor = 0; |
| 682 | sc->an_flash_buffer = NULL; |
| 683 | |
| 684 | ifp->if_softc = sc; |
| 685 | if_initname(ifp, device_get_name(dev), device_get_unit(dev)); |
| 686 | |
| 687 | /* Reset the NIC. */ |
| 688 | an_reset(sc); |
| 689 | if (sc->mpi350) { |
| 690 | error = an_init_mpi350_desc(sc); |
| 691 | if (error) |
| 692 | return(error); |
| 693 | } |
| 694 | |
| 695 | /* Load factory config */ |
| 696 | if (an_cmd(sc, AN_CMD_READCFG, 0)) { |
| 697 | device_printf(dev, "failed to load config data\n"); |
| 698 | return(EIO); |
| 699 | } |
| 700 | |
| 701 | /* Read the current configuration */ |
| 702 | sc->an_config.an_type = AN_RID_GENCONFIG; |
| 703 | sc->an_config.an_len = sizeof(struct an_ltv_genconfig); |
| 704 | if (an_read_record(sc, (struct an_ltv_gen *)&sc->an_config)) { |
| 705 | device_printf(dev, "read record failed\n"); |
| 706 | return(EIO); |
| 707 | } |
| 708 | |
| 709 | /* Read the card capabilities */ |
| 710 | sc->an_caps.an_type = AN_RID_CAPABILITIES; |
| 711 | sc->an_caps.an_len = sizeof(struct an_ltv_caps); |
| 712 | if (an_read_record(sc, (struct an_ltv_gen *)&sc->an_caps)) { |
| 713 | device_printf(dev, "read record failed\n"); |
| 714 | return(EIO); |
| 715 | } |
| 716 | |
| 717 | /* Read ssid list */ |
| 718 | sc->an_ssidlist.an_type = AN_RID_SSIDLIST; |
| 719 | sc->an_ssidlist.an_len = sizeof(struct an_ltv_ssidlist_new); |
| 720 | if (an_read_record(sc, (struct an_ltv_gen *)&sc->an_ssidlist)) { |
| 721 | device_printf(dev, "read record failed\n"); |
| 722 | return(EIO); |
| 723 | } |
| 724 | |
| 725 | /* Read AP list */ |
| 726 | sc->an_aplist.an_type = AN_RID_APLIST; |
| 727 | sc->an_aplist.an_len = sizeof(struct an_ltv_aplist); |
| 728 | if (an_read_record(sc, (struct an_ltv_gen *)&sc->an_aplist)) { |
| 729 | device_printf(dev, "read record failed\n"); |
| 730 | return(EIO); |
| 731 | } |
| 732 | |
| 733 | #ifdef ANCACHE |
| 734 | /* Read the RSSI <-> dBm map */ |
| 735 | sc->an_have_rssimap = 0; |
| 736 | if (sc->an_caps.an_softcaps & 8) { |
| 737 | sc->an_rssimap.an_type = AN_RID_RSSI_MAP; |
| 738 | sc->an_rssimap.an_len = sizeof(struct an_ltv_rssi_map); |
| 739 | if (an_read_record(sc, (struct an_ltv_gen *)&sc->an_rssimap)) { |
| 740 | device_printf(dev, "unable to get RSSI <-> dBM map\n"); |
| 741 | } else { |
| 742 | device_printf(dev, "got RSSI <-> dBM map\n"); |
| 743 | sc->an_have_rssimap = 1; |
| 744 | } |
| 745 | } else { |
| 746 | device_printf(dev, "no RSSI <-> dBM map\n"); |
| 747 | } |
| 748 | #endif |
| 749 | |
| 750 | ifp->if_mtu = ETHERMTU; |
| 751 | ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; |
| 752 | ifp->if_ioctl = an_ioctl; |
| 753 | ifp->if_start = an_start; |
| 754 | ifp->if_watchdog = an_watchdog; |
| 755 | ifp->if_init = an_init; |
| 756 | ifp->if_baudrate = 10000000; |
| 757 | ifq_set_maxlen(&ifp->if_snd, IFQ_MAXLEN); |
| 758 | ifq_set_ready(&ifp->if_snd); |
| 759 | |
| 760 | bzero(sc->an_config.an_nodename, sizeof(sc->an_config.an_nodename)); |
| 761 | bcopy(AN_DEFAULT_NODENAME, sc->an_config.an_nodename, |
| 762 | sizeof(AN_DEFAULT_NODENAME) - 1); |
| 763 | |
| 764 | bzero(sc->an_ssidlist.an_entry[0].an_ssid, |
| 765 | sizeof(sc->an_ssidlist.an_entry[0].an_ssid)); |
| 766 | bcopy(AN_DEFAULT_NETNAME, sc->an_ssidlist.an_entry[0].an_ssid, |
| 767 | sizeof(AN_DEFAULT_NETNAME) - 1); |
| 768 | sc->an_ssidlist.an_entry[0].an_len = strlen(AN_DEFAULT_NETNAME); |
| 769 | |
| 770 | sc->an_config.an_opmode = |
| 771 | AN_OPMODE_INFRASTRUCTURE_STATION; |
| 772 | |
| 773 | sc->an_tx_rate = 0; |
| 774 | bzero((char *)&sc->an_stats, sizeof(sc->an_stats)); |
| 775 | |
| 776 | ifmedia_init(&sc->an_ifmedia, 0, an_media_change, an_media_status); |
| 777 | #define ADD(m, c) ifmedia_add(&sc->an_ifmedia, (m), (c), NULL) |
| 778 | ADD(IFM_MAKEWORD(IFM_IEEE80211, IFM_IEEE80211_DS1, |
| 779 | IFM_IEEE80211_ADHOC, 0), 0); |
| 780 | ADD(IFM_MAKEWORD(IFM_IEEE80211, IFM_IEEE80211_DS1, 0, 0), 0); |
| 781 | ADD(IFM_MAKEWORD(IFM_IEEE80211, IFM_IEEE80211_DS2, |
| 782 | IFM_IEEE80211_ADHOC, 0), 0); |
| 783 | ADD(IFM_MAKEWORD(IFM_IEEE80211, IFM_IEEE80211_DS2, 0, 0), 0); |
| 784 | if (sc->an_caps.an_rates[2] == AN_RATE_5_5MBPS) { |
| 785 | ADD(IFM_MAKEWORD(IFM_IEEE80211, IFM_IEEE80211_DS5, |
| 786 | IFM_IEEE80211_ADHOC, 0), 0); |
| 787 | ADD(IFM_MAKEWORD(IFM_IEEE80211, IFM_IEEE80211_DS5, 0, 0), 0); |
| 788 | } |
| 789 | if (sc->an_caps.an_rates[3] == AN_RATE_11MBPS) { |
| 790 | ADD(IFM_MAKEWORD(IFM_IEEE80211, IFM_IEEE80211_DS11, |
| 791 | IFM_IEEE80211_ADHOC, 0), 0); |
| 792 | ADD(IFM_MAKEWORD(IFM_IEEE80211, IFM_IEEE80211_DS11, 0, 0), 0); |
| 793 | } |
| 794 | ADD(IFM_MAKEWORD(IFM_IEEE80211, IFM_AUTO, |
| 795 | IFM_IEEE80211_ADHOC, 0), 0); |
| 796 | ADD(IFM_MAKEWORD(IFM_IEEE80211, IFM_AUTO, 0, 0), 0); |
| 797 | #undef ADD |
| 798 | ifmedia_set(&sc->an_ifmedia, IFM_MAKEWORD(IFM_IEEE80211, IFM_AUTO, |
| 799 | 0, 0)); |
| 800 | |
| 801 | /* |
| 802 | * Call MI attach routine. |
| 803 | */ |
| 804 | ether_ifattach(ifp, sc->an_caps.an_oemaddr); |
| 805 | |
| 806 | return(0); |
| 807 | } |
| 808 | |
| 809 | int |
| 810 | an_detach(device_t dev) |
| 811 | { |
| 812 | struct an_softc *sc = device_get_softc(dev); |
| 813 | struct ifnet *ifp = &sc->arpcom.ac_if; |
| 814 | |
| 815 | crit_enter(); |
| 816 | an_stop(sc); |
| 817 | ifmedia_removeall(&sc->an_ifmedia); |
| 818 | ether_ifdetach(ifp); |
| 819 | bus_teardown_intr(dev, sc->irq_res, sc->irq_handle); |
| 820 | crit_exit(); |
| 821 | |
| 822 | an_release_resources(dev); |
| 823 | return 0; |
| 824 | } |
| 825 | |
| 826 | static void |
| 827 | an_rxeof(sc) |
| 828 | struct an_softc *sc; |
| 829 | { |
| 830 | struct ifnet *ifp; |
| 831 | struct ether_header *eh; |
| 832 | struct ieee80211_frame *ih; |
| 833 | struct an_rxframe rx_frame; |
| 834 | struct an_rxframe_802_3 rx_frame_802_3; |
| 835 | struct mbuf *m; |
| 836 | int len, id, error = 0, i, count = 0; |
| 837 | int ieee80211_header_len; |
| 838 | u_char *bpf_buf; |
| 839 | u_short fc1; |
| 840 | struct an_card_rx_desc an_rx_desc; |
| 841 | u_int8_t *buf; |
| 842 | |
| 843 | ifp = &sc->arpcom.ac_if; |
| 844 | |
| 845 | if (!sc->mpi350) { |
| 846 | id = CSR_READ_2(sc, AN_RX_FID); |
| 847 | |
| 848 | if (sc->an_monitor && (ifp->if_flags & IFF_PROMISC)) { |
| 849 | /* read raw 802.11 packet */ |
| 850 | bpf_buf = sc->buf_802_11; |
| 851 | |
| 852 | /* read header */ |
| 853 | if (an_read_data(sc, id, 0x0, (caddr_t)&rx_frame, |
| 854 | sizeof(rx_frame))) { |
| 855 | ifp->if_ierrors++; |
| 856 | return; |
| 857 | } |
| 858 | |
| 859 | /* |
| 860 | * skip beacon by default since this increases the |
| 861 | * system load a lot |
| 862 | */ |
| 863 | |
| 864 | if (!(sc->an_monitor & AN_MONITOR_INCLUDE_BEACON) && |
| 865 | (rx_frame.an_frame_ctl & |
| 866 | IEEE80211_FC0_SUBTYPE_BEACON)) { |
| 867 | return; |
| 868 | } |
| 869 | |
| 870 | if (sc->an_monitor & AN_MONITOR_AIRONET_HEADER) { |
| 871 | len = rx_frame.an_rx_payload_len |
| 872 | + sizeof(rx_frame); |
| 873 | /* Check for insane frame length */ |
| 874 | if (len > sizeof(sc->buf_802_11)) { |
| 875 | if_printf(ifp, |
| 876 | "oversized packet received " |
| 877 | "(%d, %d)\n", len, MCLBYTES); |
| 878 | ifp->if_ierrors++; |
| 879 | return; |
| 880 | } |
| 881 | |
| 882 | bcopy((char *)&rx_frame, |
| 883 | bpf_buf, sizeof(rx_frame)); |
| 884 | |
| 885 | error = an_read_data(sc, id, sizeof(rx_frame), |
| 886 | (caddr_t)bpf_buf+sizeof(rx_frame), |
| 887 | rx_frame.an_rx_payload_len); |
| 888 | } else { |
| 889 | fc1=rx_frame.an_frame_ctl >> 8; |
| 890 | ieee80211_header_len = |
| 891 | sizeof(struct ieee80211_frame); |
| 892 | if ((fc1 & IEEE80211_FC1_DIR_TODS) && |
| 893 | (fc1 & IEEE80211_FC1_DIR_FROMDS)) { |
| 894 | ieee80211_header_len += ETHER_ADDR_LEN; |
| 895 | } |
| 896 | |
| 897 | len = rx_frame.an_rx_payload_len |
| 898 | + ieee80211_header_len; |
| 899 | /* Check for insane frame length */ |
| 900 | if (len > sizeof(sc->buf_802_11)) { |
| 901 | if_printf(ifp, |
| 902 | "oversized packet received " |
| 903 | "(%d, %d)\n", len, MCLBYTES); |
| 904 | ifp->if_ierrors++; |
| 905 | return; |
| 906 | } |
| 907 | |
| 908 | ih = (struct ieee80211_frame *)bpf_buf; |
| 909 | |
| 910 | bcopy((char *)&rx_frame.an_frame_ctl, |
| 911 | (char *)ih, ieee80211_header_len); |
| 912 | |
| 913 | error = an_read_data(sc, id, sizeof(rx_frame) + |
| 914 | rx_frame.an_gaplen, |
| 915 | (caddr_t)ih +ieee80211_header_len, |
| 916 | rx_frame.an_rx_payload_len); |
| 917 | } |
| 918 | BPF_TAP(ifp, bpf_buf, len); |
| 919 | } else { |
| 920 | m = m_getcl(MB_DONTWAIT, MT_DATA, M_PKTHDR); |
| 921 | if (m == NULL) { |
| 922 | ifp->if_ierrors++; |
| 923 | return; |
| 924 | } |
| 925 | m->m_pkthdr.rcvif = ifp; |
| 926 | /* Read Ethernet encapsulated packet */ |
| 927 | |
| 928 | #ifdef ANCACHE |
| 929 | /* Read NIC frame header */ |
| 930 | if (an_read_data(sc, id, 0, (caddr_t)&rx_frame, |
| 931 | sizeof(rx_frame))) { |
| 932 | ifp->if_ierrors++; |
| 933 | return; |
| 934 | } |
| 935 | #endif |
| 936 | /* Read in the 802_3 frame header */ |
| 937 | if (an_read_data(sc, id, 0x34, |
| 938 | (caddr_t)&rx_frame_802_3, |
| 939 | sizeof(rx_frame_802_3))) { |
| 940 | ifp->if_ierrors++; |
| 941 | return; |
| 942 | } |
| 943 | if (rx_frame_802_3.an_rx_802_3_status != 0) { |
| 944 | ifp->if_ierrors++; |
| 945 | return; |
| 946 | } |
| 947 | /* Check for insane frame length */ |
| 948 | len = rx_frame_802_3.an_rx_802_3_payload_len; |
| 949 | if (len > sizeof(sc->buf_802_11)) { |
| 950 | if_printf(ifp, |
| 951 | "oversized packet received (%d, %d)\n", |
| 952 | len, MCLBYTES); |
| 953 | ifp->if_ierrors++; |
| 954 | return; |
| 955 | } |
| 956 | m->m_pkthdr.len = m->m_len = |
| 957 | rx_frame_802_3.an_rx_802_3_payload_len + 12; |
| 958 | |
| 959 | eh = mtod(m, struct ether_header *); |
| 960 | |
| 961 | bcopy((char *)&rx_frame_802_3.an_rx_dst_addr, |
| 962 | (char *)&eh->ether_dhost, ETHER_ADDR_LEN); |
| 963 | bcopy((char *)&rx_frame_802_3.an_rx_src_addr, |
| 964 | (char *)&eh->ether_shost, ETHER_ADDR_LEN); |
| 965 | |
| 966 | /* in mbuf header type is just before payload */ |
| 967 | error = an_read_data(sc, id, 0x44, |
| 968 | (caddr_t)&(eh->ether_type), |
| 969 | rx_frame_802_3.an_rx_802_3_payload_len); |
| 970 | |
| 971 | if (error) { |
| 972 | m_freem(m); |
| 973 | ifp->if_ierrors++; |
| 974 | return; |
| 975 | } |
| 976 | ifp->if_ipackets++; |
| 977 | |
| 978 | #ifdef ANCACHE |
| 979 | an_cache_store(sc, m, |
| 980 | rx_frame.an_rx_signal_strength, |
| 981 | rx_frame.an_rsvd0); |
| 982 | #endif |
| 983 | (*ifp->if_input)(ifp, m); |
| 984 | } |
| 985 | |
| 986 | } else { /* MPI-350 */ |
| 987 | for (count = 0; count < AN_MAX_RX_DESC; count++){ |
| 988 | for (i = 0; i < sizeof(an_rx_desc) / 4; i++) |
| 989 | ((u_int32_t*)&an_rx_desc)[i] |
| 990 | = CSR_MEM_AUX_READ_4(sc, |
| 991 | AN_RX_DESC_OFFSET |
| 992 | + (count * sizeof(an_rx_desc)) |
| 993 | + (i * 4)); |
| 994 | |
| 995 | if (an_rx_desc.an_done && !an_rx_desc.an_valid) { |
| 996 | buf = sc->an_rx_buffer[count].an_dma_vaddr; |
| 997 | |
| 998 | m = m_getcl(MB_DONTWAIT, MT_DATA, M_PKTHDR); |
| 999 | if (m == NULL) { |
| 1000 | ifp->if_ierrors++; |
| 1001 | return; |
| 1002 | } |
| 1003 | m->m_pkthdr.rcvif = ifp; |
| 1004 | /* Read Ethernet encapsulated packet */ |
| 1005 | |
| 1006 | /* |
| 1007 | * No ANCACHE support since we just get back |
| 1008 | * an Ethernet packet no 802.11 info |
| 1009 | */ |
| 1010 | #if 0 |
| 1011 | #ifdef ANCACHE |
| 1012 | /* Read NIC frame header */ |
| 1013 | bcopy(buf, (caddr_t)&rx_frame, |
| 1014 | sizeof(rx_frame)); |
| 1015 | #endif |
| 1016 | #endif |
| 1017 | /* Check for insane frame length */ |
| 1018 | len = an_rx_desc.an_len + 12; |
| 1019 | if (len > MCLBYTES) { |
| 1020 | if_printf(ifp, |
| 1021 | "oversized packet received " |
| 1022 | "(%d, %d)\n", len, MCLBYTES); |
| 1023 | ifp->if_ierrors++; |
| 1024 | return; |
| 1025 | } |
| 1026 | |
| 1027 | m->m_pkthdr.len = m->m_len = |
| 1028 | an_rx_desc.an_len + 12; |
| 1029 | |
| 1030 | eh = mtod(m, struct ether_header *); |
| 1031 | |
| 1032 | bcopy(buf, (char *)eh, |
| 1033 | m->m_pkthdr.len); |
| 1034 | |
| 1035 | ifp->if_ipackets++; |
| 1036 | |
| 1037 | #if 0 |
| 1038 | #ifdef ANCACHE |
| 1039 | an_cache_store(sc, m, |
| 1040 | rx_frame.an_rx_signal_strength, |
| 1041 | rx_frame.an_rsvd0); |
| 1042 | #endif |
| 1043 | #endif |
| 1044 | (*ifp->if_input)(ifp, m); |
| 1045 | |
| 1046 | an_rx_desc.an_valid = 1; |
| 1047 | an_rx_desc.an_len = AN_RX_BUFFER_SIZE; |
| 1048 | an_rx_desc.an_done = 0; |
| 1049 | an_rx_desc.an_phys = |
| 1050 | sc->an_rx_buffer[count].an_dma_paddr; |
| 1051 | |
| 1052 | for (i = 0; i < sizeof(an_rx_desc) / 4; i++) |
| 1053 | CSR_MEM_AUX_WRITE_4(sc, |
| 1054 | AN_RX_DESC_OFFSET |
| 1055 | + (count * sizeof(an_rx_desc)) |
| 1056 | + (i * 4), |
| 1057 | ((u_int32_t*)&an_rx_desc)[i]); |
| 1058 | |
| 1059 | } else { |
| 1060 | if_printf(ifp, "Didn't get valid RX packet " |
| 1061 | "%x %x %d\n", |
| 1062 | an_rx_desc.an_done, |
| 1063 | an_rx_desc.an_valid, |
| 1064 | an_rx_desc.an_len); |
| 1065 | } |
| 1066 | } |
| 1067 | } |
| 1068 | } |
| 1069 | |
| 1070 | static void |
| 1071 | an_txeof(sc, status) |
| 1072 | struct an_softc *sc; |
| 1073 | int status; |
| 1074 | { |
| 1075 | struct ifnet *ifp; |
| 1076 | int id, i; |
| 1077 | |
| 1078 | ifp = &sc->arpcom.ac_if; |
| 1079 | |
| 1080 | ifp->if_timer = 0; |
| 1081 | ifp->if_flags &= ~IFF_OACTIVE; |
| 1082 | |
| 1083 | if (!sc->mpi350) { |
| 1084 | id = CSR_READ_2(sc, AN_TX_CMP_FID(sc->mpi350)); |
| 1085 | |
| 1086 | if (status & AN_EV_TX_EXC) { |
| 1087 | ifp->if_oerrors++; |
| 1088 | } else |
| 1089 | ifp->if_opackets++; |
| 1090 | |
| 1091 | for (i = 0; i < AN_TX_RING_CNT; i++) { |
| 1092 | if (id == sc->an_rdata.an_tx_ring[i]) { |
| 1093 | sc->an_rdata.an_tx_ring[i] = 0; |
| 1094 | break; |
| 1095 | } |
| 1096 | } |
| 1097 | |
| 1098 | AN_INC(sc->an_rdata.an_tx_cons, AN_TX_RING_CNT); |
| 1099 | } else { /* MPI 350 */ |
| 1100 | id = CSR_READ_2(sc, AN_TX_CMP_FID(sc->mpi350)); |
| 1101 | if (!sc->an_rdata.an_tx_empty){ |
| 1102 | if (status & AN_EV_TX_EXC) { |
| 1103 | ifp->if_oerrors++; |
| 1104 | } else |
| 1105 | ifp->if_opackets++; |
| 1106 | AN_INC(sc->an_rdata.an_tx_cons, AN_MAX_TX_DESC); |
| 1107 | if (sc->an_rdata.an_tx_prod == |
| 1108 | sc->an_rdata.an_tx_cons) |
| 1109 | sc->an_rdata.an_tx_empty = 1; |
| 1110 | } |
| 1111 | } |
| 1112 | } |
| 1113 | |
| 1114 | /* |
| 1115 | * We abuse the stats updater to check the current NIC status. This |
| 1116 | * is important because we don't want to allow transmissions until |
| 1117 | * the NIC has synchronized to the current cell (either as the master |
| 1118 | * in an ad-hoc group, or as a station connected to an access point). |
| 1119 | */ |
| 1120 | static void |
| 1121 | an_stats_update(xsc) |
| 1122 | void *xsc; |
| 1123 | { |
| 1124 | struct an_softc *sc; |
| 1125 | struct ifnet *ifp; |
| 1126 | |
| 1127 | sc = xsc; |
| 1128 | ifp = &sc->arpcom.ac_if; |
| 1129 | |
| 1130 | crit_enter(); |
| 1131 | |
| 1132 | sc->an_status.an_type = AN_RID_STATUS; |
| 1133 | sc->an_status.an_len = sizeof(struct an_ltv_status); |
| 1134 | an_read_record(sc, (struct an_ltv_gen *)&sc->an_status); |
| 1135 | |
| 1136 | if (sc->an_status.an_opmode & AN_STATUS_OPMODE_IN_SYNC) |
| 1137 | sc->an_associated = 1; |
| 1138 | else |
| 1139 | sc->an_associated = 0; |
| 1140 | |
| 1141 | /* Don't do this while we're not transmitting */ |
| 1142 | if ((ifp->if_flags & IFF_OACTIVE) == 0) { |
| 1143 | sc->an_stats.an_len = sizeof(struct an_ltv_stats); |
| 1144 | sc->an_stats.an_type = AN_RID_32BITS_CUM; |
| 1145 | an_read_record(sc, (struct an_ltv_gen *)&sc->an_stats.an_len); |
| 1146 | } |
| 1147 | |
| 1148 | callout_reset(&sc->an_stat_timer, hz, an_stats_update, sc); |
| 1149 | |
| 1150 | crit_exit(); |
| 1151 | } |
| 1152 | |
| 1153 | void |
| 1154 | an_intr(xsc) |
| 1155 | void *xsc; |
| 1156 | { |
| 1157 | struct an_softc *sc; |
| 1158 | struct ifnet *ifp; |
| 1159 | u_int16_t status; |
| 1160 | |
| 1161 | sc = (struct an_softc*)xsc; |
| 1162 | |
| 1163 | ifp = &sc->arpcom.ac_if; |
| 1164 | |
| 1165 | /* Disable interrupts. */ |
| 1166 | CSR_WRITE_2(sc, AN_INT_EN(sc->mpi350), 0); |
| 1167 | |
| 1168 | status = CSR_READ_2(sc, AN_EVENT_STAT(sc->mpi350)); |
| 1169 | CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), ~AN_INTRS(sc->mpi350)); |
| 1170 | |
| 1171 | if (status & AN_EV_MIC) |
| 1172 | CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_MIC); |
| 1173 | |
| 1174 | if (status & AN_EV_LINKSTAT) { |
| 1175 | if (CSR_READ_2(sc, AN_LINKSTAT(sc->mpi350)) |
| 1176 | == AN_LINKSTAT_ASSOCIATED) |
| 1177 | sc->an_associated = 1; |
| 1178 | else |
| 1179 | sc->an_associated = 0; |
| 1180 | CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_LINKSTAT); |
| 1181 | } |
| 1182 | |
| 1183 | if (status & AN_EV_RX) { |
| 1184 | an_rxeof(sc); |
| 1185 | CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_RX); |
| 1186 | } |
| 1187 | |
| 1188 | if (sc->mpi350 && status & AN_EV_TX_CPY) { |
| 1189 | an_txeof(sc, status); |
| 1190 | CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_TX_CPY); |
| 1191 | } |
| 1192 | |
| 1193 | if (status & AN_EV_TX) { |
| 1194 | an_txeof(sc, status); |
| 1195 | CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_TX); |
| 1196 | } |
| 1197 | |
| 1198 | if (status & AN_EV_TX_EXC) { |
| 1199 | an_txeof(sc, status); |
| 1200 | CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_TX_EXC); |
| 1201 | } |
| 1202 | |
| 1203 | if (status & AN_EV_ALLOC) |
| 1204 | CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_ALLOC); |
| 1205 | |
| 1206 | /* Re-enable interrupts. */ |
| 1207 | CSR_WRITE_2(sc, AN_INT_EN(sc->mpi350), AN_INTRS(sc->mpi350)); |
| 1208 | |
| 1209 | if ((ifp->if_flags & IFF_UP) && !ifq_is_empty(&ifp->if_snd)) |
| 1210 | an_start(ifp); |
| 1211 | |
| 1212 | return; |
| 1213 | } |
| 1214 | |
| 1215 | static int |
| 1216 | an_cmd_struct(sc, cmd, reply) |
| 1217 | struct an_softc *sc; |
| 1218 | struct an_command *cmd; |
| 1219 | struct an_reply *reply; |
| 1220 | { |
| 1221 | int i; |
| 1222 | |
| 1223 | for (i = 0; i != AN_TIMEOUT; i++) { |
| 1224 | if (CSR_READ_2(sc, AN_COMMAND(sc->mpi350)) & AN_CMD_BUSY) { |
| 1225 | DELAY(1000); |
| 1226 | } else |
| 1227 | break; |
| 1228 | } |
| 1229 | if( i == AN_TIMEOUT) { |
| 1230 | printf("BUSY\n"); |
| 1231 | return(ETIMEDOUT); |
| 1232 | } |
| 1233 | |
| 1234 | CSR_WRITE_2(sc, AN_PARAM0(sc->mpi350), cmd->an_parm0); |
| 1235 | CSR_WRITE_2(sc, AN_PARAM1(sc->mpi350), cmd->an_parm1); |
| 1236 | CSR_WRITE_2(sc, AN_PARAM2(sc->mpi350), cmd->an_parm2); |
| 1237 | CSR_WRITE_2(sc, AN_COMMAND(sc->mpi350), cmd->an_cmd); |
| 1238 | |
| 1239 | for (i = 0; i < AN_TIMEOUT; i++) { |
| 1240 | if (CSR_READ_2(sc, AN_EVENT_STAT(sc->mpi350)) & AN_EV_CMD) |
| 1241 | break; |
| 1242 | DELAY(1000); |
| 1243 | } |
| 1244 | |
| 1245 | reply->an_resp0 = CSR_READ_2(sc, AN_RESP0(sc->mpi350)); |
| 1246 | reply->an_resp1 = CSR_READ_2(sc, AN_RESP1(sc->mpi350)); |
| 1247 | reply->an_resp2 = CSR_READ_2(sc, AN_RESP2(sc->mpi350)); |
| 1248 | reply->an_status = CSR_READ_2(sc, AN_STATUS(sc->mpi350)); |
| 1249 | |
| 1250 | if (CSR_READ_2(sc, AN_COMMAND(sc->mpi350)) & AN_CMD_BUSY) |
| 1251 | CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_CLR_STUCK_BUSY); |
| 1252 | |
| 1253 | /* Ack the command */ |
| 1254 | CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_CMD); |
| 1255 | |
| 1256 | if (i == AN_TIMEOUT) |
| 1257 | return(ETIMEDOUT); |
| 1258 | |
| 1259 | return(0); |
| 1260 | } |
| 1261 | |
| 1262 | static int |
| 1263 | an_cmd(sc, cmd, val) |
| 1264 | struct an_softc *sc; |
| 1265 | int cmd; |
| 1266 | int val; |
| 1267 | { |
| 1268 | int i, s = 0; |
| 1269 | |
| 1270 | CSR_WRITE_2(sc, AN_PARAM0(sc->mpi350), val); |
| 1271 | CSR_WRITE_2(sc, AN_PARAM1(sc->mpi350), 0); |
| 1272 | CSR_WRITE_2(sc, AN_PARAM2(sc->mpi350), 0); |
| 1273 | CSR_WRITE_2(sc, AN_COMMAND(sc->mpi350), cmd); |
| 1274 | |
| 1275 | for (i = 0; i < AN_TIMEOUT; i++) { |
| 1276 | if (CSR_READ_2(sc, AN_EVENT_STAT(sc->mpi350)) & AN_EV_CMD) |
| 1277 | break; |
| 1278 | else { |
| 1279 | if (CSR_READ_2(sc, AN_COMMAND(sc->mpi350)) == cmd) |
| 1280 | CSR_WRITE_2(sc, AN_COMMAND(sc->mpi350), cmd); |
| 1281 | } |
| 1282 | } |
| 1283 | |
| 1284 | for (i = 0; i < AN_TIMEOUT; i++) { |
| 1285 | CSR_READ_2(sc, AN_RESP0(sc->mpi350)); |
| 1286 | CSR_READ_2(sc, AN_RESP1(sc->mpi350)); |
| 1287 | CSR_READ_2(sc, AN_RESP2(sc->mpi350)); |
| 1288 | s = CSR_READ_2(sc, AN_STATUS(sc->mpi350)); |
| 1289 | if ((s & AN_STAT_CMD_CODE) == (cmd & AN_STAT_CMD_CODE)) |
| 1290 | break; |
| 1291 | } |
| 1292 | |
| 1293 | /* Ack the command */ |
| 1294 | CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_CMD); |
| 1295 | |
| 1296 | if (CSR_READ_2(sc, AN_COMMAND(sc->mpi350)) & AN_CMD_BUSY) |
| 1297 | CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_CLR_STUCK_BUSY); |
| 1298 | |
| 1299 | if (i == AN_TIMEOUT) |
| 1300 | return(ETIMEDOUT); |
| 1301 | |
| 1302 | return(0); |
| 1303 | } |
| 1304 | |
| 1305 | /* |
| 1306 | * This reset sequence may look a little strange, but this is the |
| 1307 | * most reliable method I've found to really kick the NIC in the |
| 1308 | * head and force it to reboot correctly. |
| 1309 | */ |
| 1310 | static void |
| 1311 | an_reset(sc) |
| 1312 | struct an_softc *sc; |
| 1313 | { |
| 1314 | an_cmd(sc, AN_CMD_ENABLE, 0); |
| 1315 | an_cmd(sc, AN_CMD_FW_RESTART, 0); |
| 1316 | an_cmd(sc, AN_CMD_NOOP2, 0); |
| 1317 | |
| 1318 | if (an_cmd(sc, AN_CMD_FORCE_SYNCLOSS, 0) == ETIMEDOUT) |
| 1319 | if_printf(&sc->arpcom.ac_if, "reset failed\n"); |
| 1320 | |
| 1321 | an_cmd(sc, AN_CMD_DISABLE, 0); |
| 1322 | |
| 1323 | return; |
| 1324 | } |
| 1325 | |
| 1326 | /* |
| 1327 | * Read an LTV record from the NIC. |
| 1328 | */ |
| 1329 | static int |
| 1330 | an_read_record(sc, ltv) |
| 1331 | struct an_softc *sc; |
| 1332 | struct an_ltv_gen *ltv; |
| 1333 | { |
| 1334 | struct an_ltv_gen *an_ltv; |
| 1335 | struct an_card_rid_desc an_rid_desc; |
| 1336 | struct an_command cmd; |
| 1337 | struct an_reply reply; |
| 1338 | u_int16_t *ptr; |
| 1339 | u_int8_t *ptr2; |
| 1340 | int i, len; |
| 1341 | |
| 1342 | if (ltv->an_len < 4 || ltv->an_type == 0) |
| 1343 | return(EINVAL); |
| 1344 | |
| 1345 | if (!sc->mpi350){ |
| 1346 | /* Tell the NIC to enter record read mode. */ |
| 1347 | if (an_cmd(sc, AN_CMD_ACCESS|AN_ACCESS_READ, ltv->an_type)) { |
| 1348 | if_printf(&sc->arpcom.ac_if, "RID access failed\n"); |
| 1349 | return(EIO); |
| 1350 | } |
| 1351 | |
| 1352 | /* Seek to the record. */ |
| 1353 | if (an_seek(sc, ltv->an_type, 0, AN_BAP1)) { |
| 1354 | if_printf(&sc->arpcom.ac_if, "seek to record failed\n"); |
| 1355 | return(EIO); |
| 1356 | } |
| 1357 | |
| 1358 | /* |
| 1359 | * Read the length and record type and make sure they |
| 1360 | * match what we expect (this verifies that we have enough |
| 1361 | * room to hold all of the returned data). |
| 1362 | * Length includes type but not length. |
| 1363 | */ |
| 1364 | len = CSR_READ_2(sc, AN_DATA1); |
| 1365 | if (len > (ltv->an_len - 2)) { |
| 1366 | if_printf(&sc->arpcom.ac_if, |
| 1367 | "record length mismatch -- expected %d, " |
| 1368 | "got %d for Rid %x\n", |
| 1369 | ltv->an_len - 2, len, ltv->an_type); |
| 1370 | len = ltv->an_len - 2; |
| 1371 | } else { |
| 1372 | ltv->an_len = len + 2; |
| 1373 | } |
| 1374 | |
| 1375 | /* Now read the data. */ |
| 1376 | len -= 2; /* skip the type */ |
| 1377 | ptr = <v->an_val; |
| 1378 | for (i = len; i > 1; i -= 2) |
| 1379 | *ptr++ = CSR_READ_2(sc, AN_DATA1); |
| 1380 | if (i) { |
| 1381 | ptr2 = (u_int8_t *)ptr; |
| 1382 | *ptr2 = CSR_READ_1(sc, AN_DATA1); |
| 1383 | } |
| 1384 | } else { /* MPI-350 */ |
| 1385 | if (sc->an_rid_buffer.an_dma_vaddr == NULL) |
| 1386 | return(EIO); |
| 1387 | an_rid_desc.an_valid = 1; |
| 1388 | an_rid_desc.an_len = AN_RID_BUFFER_SIZE; |
| 1389 | an_rid_desc.an_rid = 0; |
| 1390 | an_rid_desc.an_phys = sc->an_rid_buffer.an_dma_paddr; |
| 1391 | bzero(sc->an_rid_buffer.an_dma_vaddr, AN_RID_BUFFER_SIZE); |
| 1392 | |
| 1393 | bzero(&cmd, sizeof(cmd)); |
| 1394 | bzero(&reply, sizeof(reply)); |
| 1395 | cmd.an_cmd = AN_CMD_ACCESS|AN_ACCESS_READ; |
| 1396 | cmd.an_parm0 = ltv->an_type; |
| 1397 | |
| 1398 | for (i = 0; i < sizeof(an_rid_desc) / 4; i++) |
| 1399 | CSR_MEM_AUX_WRITE_4(sc, AN_HOST_DESC_OFFSET + i * 4, |
| 1400 | ((u_int32_t*)&an_rid_desc)[i]); |
| 1401 | |
| 1402 | if (an_cmd_struct(sc, &cmd, &reply) |
| 1403 | || reply.an_status & AN_CMD_QUAL_MASK) { |
| 1404 | if_printf(&sc->arpcom.ac_if, |
| 1405 | "failed to read RID %x %x %x %x %x, %d\n", |
| 1406 | ltv->an_type, |
| 1407 | reply.an_status, |
| 1408 | reply.an_resp0, |
| 1409 | reply.an_resp1, |
| 1410 | reply.an_resp2, |
| 1411 | i); |
| 1412 | return(EIO); |
| 1413 | } |
| 1414 | |
| 1415 | an_ltv = (struct an_ltv_gen *)sc->an_rid_buffer.an_dma_vaddr; |
| 1416 | if (an_ltv->an_len + 2 < an_rid_desc.an_len) { |
| 1417 | an_rid_desc.an_len = an_ltv->an_len; |
| 1418 | } |
| 1419 | |
| 1420 | len = an_rid_desc.an_len; |
| 1421 | if (len > (ltv->an_len - 2)) { |
| 1422 | if_printf(&sc->arpcom.ac_if, |
| 1423 | "record length mismatch -- expected %d, " |
| 1424 | "got %d for Rid %x\n", |
| 1425 | ltv->an_len - 2, len, ltv->an_type); |
| 1426 | len = ltv->an_len - 2; |
| 1427 | } else { |
| 1428 | ltv->an_len = len + 2; |
| 1429 | } |
| 1430 | bcopy(&an_ltv->an_type, <v->an_val, len); |
| 1431 | } |
| 1432 | |
| 1433 | if (an_dump) |
| 1434 | an_dump_record(sc, ltv, "Read"); |
| 1435 | |
| 1436 | return(0); |
| 1437 | } |
| 1438 | |
| 1439 | /* |
| 1440 | * Same as read, except we inject data instead of reading it. |
| 1441 | */ |
| 1442 | static int |
| 1443 | an_write_record(sc, ltv) |
| 1444 | struct an_softc *sc; |
| 1445 | struct an_ltv_gen *ltv; |
| 1446 | { |
| 1447 | struct an_card_rid_desc an_rid_desc; |
| 1448 | struct an_command cmd; |
| 1449 | struct an_reply reply; |
| 1450 | char *buf; |
| 1451 | u_int16_t *ptr; |
| 1452 | u_int8_t *ptr2; |
| 1453 | int i, len; |
| 1454 | |
| 1455 | if (an_dump) |
| 1456 | an_dump_record(sc, ltv, "Write"); |
| 1457 | |
| 1458 | if (!sc->mpi350){ |
| 1459 | if (an_cmd(sc, AN_CMD_ACCESS|AN_ACCESS_READ, ltv->an_type)) |
| 1460 | return(EIO); |
| 1461 | |
| 1462 | if (an_seek(sc, ltv->an_type, 0, AN_BAP1)) |
| 1463 | return(EIO); |
| 1464 | |
| 1465 | /* |
| 1466 | * Length includes type but not length. |
| 1467 | */ |
| 1468 | len = ltv->an_len - 2; |
| 1469 | CSR_WRITE_2(sc, AN_DATA1, len); |
| 1470 | |
| 1471 | len -= 2; /* skip the type */ |
| 1472 | ptr = <v->an_val; |
| 1473 | for (i = len; i > 1; i -= 2) |
| 1474 | CSR_WRITE_2(sc, AN_DATA1, *ptr++); |
| 1475 | if (i) { |
| 1476 | ptr2 = (u_int8_t *)ptr; |
| 1477 | CSR_WRITE_1(sc, AN_DATA0, *ptr2); |
| 1478 | } |
| 1479 | |
| 1480 | if (an_cmd(sc, AN_CMD_ACCESS|AN_ACCESS_WRITE, ltv->an_type)) |
| 1481 | return(EIO); |
| 1482 | } else { |
| 1483 | /* MPI-350 */ |
| 1484 | |
| 1485 | for (i = 0; i != AN_TIMEOUT; i++) { |
| 1486 | if (CSR_READ_2(sc, AN_COMMAND(sc->mpi350)) |
| 1487 | & AN_CMD_BUSY) { |
| 1488 | DELAY(10); |
| 1489 | } else |
| 1490 | break; |
| 1491 | } |
| 1492 | if (i == AN_TIMEOUT) { |
| 1493 | printf("BUSY\n"); |
| 1494 | } |
| 1495 | |
| 1496 | an_rid_desc.an_valid = 1; |
| 1497 | an_rid_desc.an_len = ltv->an_len - 2; |
| 1498 | an_rid_desc.an_rid = ltv->an_type; |
| 1499 | an_rid_desc.an_phys = sc->an_rid_buffer.an_dma_paddr; |
| 1500 | |
| 1501 | bcopy(<v->an_type, sc->an_rid_buffer.an_dma_vaddr, |
| 1502 | an_rid_desc.an_len); |
| 1503 | |
| 1504 | bzero(&cmd,sizeof(cmd)); |
| 1505 | bzero(&reply,sizeof(reply)); |
| 1506 | cmd.an_cmd = AN_CMD_ACCESS|AN_ACCESS_WRITE; |
| 1507 | cmd.an_parm0 = ltv->an_type; |
| 1508 | |
| 1509 | for (i = 0; i < sizeof(an_rid_desc) / 4; i++) |
| 1510 | CSR_MEM_AUX_WRITE_4(sc, AN_HOST_DESC_OFFSET + i * 4, |
| 1511 | ((u_int32_t*)&an_rid_desc)[i]); |
| 1512 | |
| 1513 | if ((i = an_cmd_struct(sc, &cmd, &reply))) { |
| 1514 | if_printf(&sc->arpcom.ac_if, |
| 1515 | "failed to write RID 1 %x %x %x %x %x, %d\n", |
| 1516 | ltv->an_type, |
| 1517 | reply.an_status, |
| 1518 | reply.an_resp0, |
| 1519 | reply.an_resp1, |
| 1520 | reply.an_resp2, |
| 1521 | i); |
| 1522 | return(EIO); |
| 1523 | } |
| 1524 | |
| 1525 | ptr = (u_int16_t *)buf; |
| 1526 | |
| 1527 | if (reply.an_status & AN_CMD_QUAL_MASK) { |
| 1528 | if_printf(&sc->arpcom.ac_if, |
| 1529 | "failed to write RID 2 %x %x %x %x %x, %d\n", |
| 1530 | ltv->an_type, |
| 1531 | reply.an_status, |
| 1532 | reply.an_resp0, |
| 1533 | reply.an_resp1, |
| 1534 | reply.an_resp2, |
| 1535 | i); |
| 1536 | return(EIO); |
| 1537 | } |
| 1538 | } |
| 1539 | |
| 1540 | return(0); |
| 1541 | } |
| 1542 | |
| 1543 | static void |
| 1544 | an_dump_record(sc, ltv, string) |
| 1545 | struct an_softc *sc; |
| 1546 | struct an_ltv_gen *ltv; |
| 1547 | char *string; |
| 1548 | { |
| 1549 | u_int8_t *ptr2; |
| 1550 | int len; |
| 1551 | int i; |
| 1552 | int count = 0; |
| 1553 | char buf[17], temp; |
| 1554 | |
| 1555 | len = ltv->an_len - 4; |
| 1556 | if_printf(&sc->arpcom.ac_if, "RID %4x, Length %4d, Mode %s\n", |
| 1557 | ltv->an_type, ltv->an_len - 4, string); |
| 1558 | |
| 1559 | if (an_dump == 1 || (an_dump == ltv->an_type)) { |
| 1560 | if_printf(&sc->arpcom.ac_if, "\t"); |
| 1561 | bzero(buf,sizeof(buf)); |
| 1562 | |
| 1563 | ptr2 = (u_int8_t *)<v->an_val; |
| 1564 | for (i = len; i > 0; i--) { |
| 1565 | printf("%02x ", *ptr2); |
| 1566 | |
| 1567 | temp = *ptr2++; |
| 1568 | if (temp >= ' ' && temp <= '~') |
| 1569 | buf[count] = temp; |
| 1570 | else if (temp >= 'A' && temp <= 'Z') |
| 1571 | buf[count] = temp; |
| 1572 | else |
| 1573 | buf[count] = '.'; |
| 1574 | if (++count == 16) { |
| 1575 | count = 0; |
| 1576 | printf("%s\n",buf); |
| 1577 | if_printf(&sc->arpcom.ac_if, "\t"); |
| 1578 | bzero(buf,sizeof(buf)); |
| 1579 | } |
| 1580 | } |
| 1581 | for (; count != 16; count++) { |
| 1582 | printf(" "); |
| 1583 | } |
| 1584 | printf(" %s\n",buf); |
| 1585 | } |
| 1586 | } |
| 1587 | |
| 1588 | static int |
| 1589 | an_seek(sc, id, off, chan) |
| 1590 | struct an_softc *sc; |
| 1591 | int id, off, chan; |
| 1592 | { |
| 1593 | int i; |
| 1594 | int selreg, offreg; |
| 1595 | |
| 1596 | switch (chan) { |
| 1597 | case AN_BAP0: |
| 1598 | selreg = AN_SEL0; |
| 1599 | offreg = AN_OFF0; |
| 1600 | break; |
| 1601 | case AN_BAP1: |
| 1602 | selreg = AN_SEL1; |
| 1603 | offreg = AN_OFF1; |
| 1604 | break; |
| 1605 | default: |
| 1606 | if_printf(&sc->arpcom.ac_if, "invalid data path: %x\n", chan); |
| 1607 | return(EIO); |
| 1608 | } |
| 1609 | |
| 1610 | CSR_WRITE_2(sc, selreg, id); |
| 1611 | CSR_WRITE_2(sc, offreg, off); |
| 1612 | |
| 1613 | for (i = 0; i < AN_TIMEOUT; i++) { |
| 1614 | if (!(CSR_READ_2(sc, offreg) & (AN_OFF_BUSY|AN_OFF_ERR))) |
| 1615 | break; |
| 1616 | } |
| 1617 | |
| 1618 | if (i == AN_TIMEOUT) |
| 1619 | return(ETIMEDOUT); |
| 1620 | |
| 1621 | return(0); |
| 1622 | } |
| 1623 | |
| 1624 | static int |
| 1625 | an_read_data(sc, id, off, buf, len) |
| 1626 | struct an_softc *sc; |
| 1627 | int id, off; |
| 1628 | caddr_t buf; |
| 1629 | int len; |
| 1630 | { |
| 1631 | int i; |
| 1632 | u_int16_t *ptr; |
| 1633 | u_int8_t *ptr2; |
| 1634 | |
| 1635 | if (off != -1) { |
| 1636 | if (an_seek(sc, id, off, AN_BAP1)) |
| 1637 | return(EIO); |
| 1638 | } |
| 1639 | |
| 1640 | ptr = (u_int16_t *)buf; |
| 1641 | for (i = len; i > 1; i -= 2) |
| 1642 | *ptr++ = CSR_READ_2(sc, AN_DATA1); |
| 1643 | if (i) { |
| 1644 | ptr2 = (u_int8_t *)ptr; |
| 1645 | *ptr2 = CSR_READ_1(sc, AN_DATA1); |
| 1646 | } |
| 1647 | |
| 1648 | return(0); |
| 1649 | } |
| 1650 | |
| 1651 | static int |
| 1652 | an_write_data(sc, id, off, buf, len) |
| 1653 | struct an_softc *sc; |
| 1654 | int id, off; |
| 1655 | caddr_t buf; |
| 1656 | int len; |
| 1657 | { |
| 1658 | int i; |
| 1659 | u_int16_t *ptr; |
| 1660 | u_int8_t *ptr2; |
| 1661 | |
| 1662 | if (off != -1) { |
| 1663 | if (an_seek(sc, id, off, AN_BAP0)) |
| 1664 | return(EIO); |
| 1665 | } |
| 1666 | |
| 1667 | ptr = (u_int16_t *)buf; |
| 1668 | for (i = len; i > 1; i -= 2) |
| 1669 | CSR_WRITE_2(sc, AN_DATA0, *ptr++); |
| 1670 | if (i) { |
| 1671 | ptr2 = (u_int8_t *)ptr; |
| 1672 | CSR_WRITE_1(sc, AN_DATA0, *ptr2); |
| 1673 | } |
| 1674 | |
| 1675 | return(0); |
| 1676 | } |
| 1677 | |
| 1678 | /* |
| 1679 | * Allocate a region of memory inside the NIC and zero |
| 1680 | * it out. |
| 1681 | */ |
| 1682 | static int |
| 1683 | an_alloc_nicmem(sc, len, id) |
| 1684 | struct an_softc *sc; |
| 1685 | int len; |
| 1686 | int *id; |
| 1687 | { |
| 1688 | int i; |
| 1689 | |
| 1690 | if (an_cmd(sc, AN_CMD_ALLOC_MEM, len)) { |
| 1691 | if_printf(&sc->arpcom.ac_if, |
| 1692 | "failed to allocate %d bytes on NIC\n", len); |
| 1693 | return(ENOMEM); |
| 1694 | } |
| 1695 | |
| 1696 | for (i = 0; i < AN_TIMEOUT; i++) { |
| 1697 | if (CSR_READ_2(sc, AN_EVENT_STAT(sc->mpi350)) & AN_EV_ALLOC) |
| 1698 | break; |
| 1699 | } |
| 1700 | |
| 1701 | if (i == AN_TIMEOUT) |
| 1702 | return(ETIMEDOUT); |
| 1703 | |
| 1704 | CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_ALLOC); |
| 1705 | *id = CSR_READ_2(sc, AN_ALLOC_FID); |
| 1706 | |
| 1707 | if (an_seek(sc, *id, 0, AN_BAP0)) |
| 1708 | return(EIO); |
| 1709 | |
| 1710 | for (i = 0; i < len / 2; i++) |
| 1711 | CSR_WRITE_2(sc, AN_DATA0, 0); |
| 1712 | |
| 1713 | return(0); |
| 1714 | } |
| 1715 | |
| 1716 | static void |
| 1717 | an_setdef(sc, areq) |
| 1718 | struct an_softc *sc; |
| 1719 | struct an_req *areq; |
| 1720 | { |
| 1721 | struct ifnet *ifp; |
| 1722 | struct an_ltv_genconfig *cfg; |
| 1723 | struct an_ltv_ssidlist_new *ssid; |
| 1724 | struct an_ltv_aplist *ap; |
| 1725 | struct an_ltv_gen *sp; |
| 1726 | |
| 1727 | ifp = &sc->arpcom.ac_if; |
| 1728 | |
| 1729 | switch (areq->an_type) { |
| 1730 | case AN_RID_GENCONFIG: |
| 1731 | cfg = (struct an_ltv_genconfig *)areq; |
| 1732 | |
| 1733 | bcopy((char *)&cfg->an_macaddr, (char *)&sc->arpcom.ac_enaddr, |
| 1734 | ETHER_ADDR_LEN); |
| 1735 | bcopy((char *)&cfg->an_macaddr, IF_LLADDR(ifp), ETHER_ADDR_LEN); |
| 1736 | |
| 1737 | bcopy((char *)cfg, (char *)&sc->an_config, |
| 1738 | sizeof(struct an_ltv_genconfig)); |
| 1739 | break; |
| 1740 | case AN_RID_SSIDLIST: |
| 1741 | ssid = (struct an_ltv_ssidlist_new *)areq; |
| 1742 | bcopy((char *)ssid, (char *)&sc->an_ssidlist, |
| 1743 | sizeof(struct an_ltv_ssidlist_new)); |
| 1744 | break; |
| 1745 | case AN_RID_APLIST: |
| 1746 | ap = (struct an_ltv_aplist *)areq; |
| 1747 | bcopy((char *)ap, (char *)&sc->an_aplist, |
| 1748 | sizeof(struct an_ltv_aplist)); |
| 1749 | break; |
| 1750 | case AN_RID_TX_SPEED: |
| 1751 | sp = (struct an_ltv_gen *)areq; |
| 1752 | sc->an_tx_rate = sp->an_val; |
| 1753 | |
| 1754 | /* Read the current configuration */ |
| 1755 | sc->an_config.an_type = AN_RID_GENCONFIG; |
| 1756 | sc->an_config.an_len = sizeof(struct an_ltv_genconfig); |
| 1757 | an_read_record(sc, (struct an_ltv_gen *)&sc->an_config); |
| 1758 | cfg = &sc->an_config; |
| 1759 | |
| 1760 | /* clear other rates and set the only one we want */ |
| 1761 | bzero(cfg->an_rates, sizeof(cfg->an_rates)); |
| 1762 | cfg->an_rates[0] = sc->an_tx_rate; |
| 1763 | |
| 1764 | /* Save the new rate */ |
| 1765 | sc->an_config.an_type = AN_RID_GENCONFIG; |
| 1766 | sc->an_config.an_len = sizeof(struct an_ltv_genconfig); |
| 1767 | break; |
| 1768 | case AN_RID_WEP_TEMP: |
| 1769 | /* Cache the temp keys */ |
| 1770 | bcopy(areq, |
| 1771 | &sc->an_temp_keys[((struct an_ltv_key *)areq)->kindex], |
| 1772 | sizeof(struct an_ltv_key)); |
| 1773 | case AN_RID_WEP_PERM: |
| 1774 | case AN_RID_LEAPUSERNAME: |
| 1775 | case AN_RID_LEAPPASSWORD: |
| 1776 | an_init(sc); |
| 1777 | |
| 1778 | /* Disable the MAC. */ |
| 1779 | an_cmd(sc, AN_CMD_DISABLE, 0); |
| 1780 | |
| 1781 | /* Write the key */ |
| 1782 | an_write_record(sc, (struct an_ltv_gen *)areq); |
| 1783 | |
| 1784 | /* Turn the MAC back on. */ |
| 1785 | an_cmd(sc, AN_CMD_ENABLE, 0); |
| 1786 | |
| 1787 | break; |
| 1788 | case AN_RID_MONITOR_MODE: |
| 1789 | cfg = (struct an_ltv_genconfig *)areq; |
| 1790 | bpfdetach(ifp); |
| 1791 | if (ng_ether_detach_p != NULL) |
| 1792 | (*ng_ether_detach_p) (ifp); |
| 1793 | sc->an_monitor = cfg->an_len; |
| 1794 | |
| 1795 | if (sc->an_monitor & AN_MONITOR) { |
| 1796 | if (sc->an_monitor & AN_MONITOR_AIRONET_HEADER) { |
| 1797 | bpfattach(ifp, DLT_AIRONET_HEADER, |
| 1798 | sizeof(struct ether_header)); |
| 1799 | } else { |
| 1800 | bpfattach(ifp, DLT_IEEE802_11, |
| 1801 | sizeof(struct ether_header)); |
| 1802 | } |
| 1803 | } else { |
| 1804 | bpfattach(ifp, DLT_EN10MB, |
| 1805 | sizeof(struct ether_header)); |
| 1806 | if (ng_ether_attach_p != NULL) |
| 1807 | (*ng_ether_attach_p) (ifp); |
| 1808 | } |
| 1809 | break; |
| 1810 | default: |
| 1811 | if_printf(ifp, "unknown RID: %x\n", areq->an_type); |
| 1812 | return; |
| 1813 | } |
| 1814 | |
| 1815 | |
| 1816 | /* Reinitialize the card. */ |
| 1817 | if (ifp->if_flags) |
| 1818 | an_init(sc); |
| 1819 | |
| 1820 | return; |
| 1821 | } |
| 1822 | |
| 1823 | /* |
| 1824 | * Derived from Linux driver to enable promiscious mode. |
| 1825 | */ |
| 1826 | |
| 1827 | static void |
| 1828 | an_promisc(sc, promisc) |
| 1829 | struct an_softc *sc; |
| 1830 | int promisc; |
| 1831 | { |
| 1832 | if (sc->an_was_monitor) |
| 1833 | an_reset(sc); |
| 1834 | if (sc->mpi350) |
| 1835 | an_init_mpi350_desc(sc); |
| 1836 | if (sc->an_monitor || sc->an_was_monitor) |
| 1837 | an_init(sc); |
| 1838 | |
| 1839 | sc->an_was_monitor = sc->an_monitor; |
| 1840 | an_cmd(sc, AN_CMD_SET_MODE, promisc ? 0xffff : 0); |
| 1841 | |
| 1842 | return; |
| 1843 | } |
| 1844 | |
| 1845 | static int |
| 1846 | an_ioctl(ifp, command, data, cr) |
| 1847 | struct ifnet *ifp; |
| 1848 | u_long command; |
| 1849 | caddr_t data; |
| 1850 | struct ucred *cr; |
| 1851 | { |
| 1852 | int error = 0; |
| 1853 | int len; |
| 1854 | int i, max; |
| 1855 | struct an_softc *sc; |
| 1856 | struct ifreq *ifr; |
| 1857 | struct ieee80211req *ireq; |
| 1858 | u_int8_t tmpstr[IEEE80211_NWID_LEN*2]; |
| 1859 | u_int8_t *tmpptr; |
| 1860 | struct an_ltv_genconfig *config; |
| 1861 | struct an_ltv_key *key; |
| 1862 | struct an_ltv_status *status; |
| 1863 | struct an_ltv_ssidlist_new *ssids; |
| 1864 | int mode; |
| 1865 | struct aironet_ioctl l_ioctl; |
| 1866 | |
| 1867 | sc = ifp->if_softc; |
| 1868 | ifr = (struct ifreq *)data; |
| 1869 | ireq = (struct ieee80211req *)data; |
| 1870 | |
| 1871 | crit_enter(); |
| 1872 | |
| 1873 | config = (struct an_ltv_genconfig *)&sc->areq; |
| 1874 | key = (struct an_ltv_key *)&sc->areq; |
| 1875 | status = (struct an_ltv_status *)&sc->areq; |
| 1876 | ssids = (struct an_ltv_ssidlist_new *)&sc->areq; |
| 1877 | |
| 1878 | switch (command) { |
| 1879 | case SIOCSIFFLAGS: |
| 1880 | if (ifp->if_flags & IFF_UP) { |
| 1881 | if (ifp->if_flags & IFF_RUNNING && |
| 1882 | ifp->if_flags & IFF_PROMISC && |
| 1883 | !(sc->an_if_flags & IFF_PROMISC)) { |
| 1884 | an_promisc(sc, 1); |
| 1885 | } else if (ifp->if_flags & IFF_RUNNING && |
| 1886 | !(ifp->if_flags & IFF_PROMISC) && |
| 1887 | sc->an_if_flags & IFF_PROMISC) { |
| 1888 | an_promisc(sc, 0); |
| 1889 | } else |
| 1890 | an_init(sc); |
| 1891 | } else { |
| 1892 | if (ifp->if_flags & IFF_RUNNING) |
| 1893 | an_stop(sc); |
| 1894 | } |
| 1895 | sc->an_if_flags = ifp->if_flags; |
| 1896 | error = 0; |
| 1897 | break; |
| 1898 | case SIOCSIFMEDIA: |
| 1899 | case SIOCGIFMEDIA: |
| 1900 | error = ifmedia_ioctl(ifp, ifr, &sc->an_ifmedia, command); |
| 1901 | break; |
| 1902 | case SIOCADDMULTI: |
| 1903 | case SIOCDELMULTI: |
| 1904 | /* The Aironet has no multicast filter. */ |
| 1905 | error = 0; |
| 1906 | break; |
| 1907 | case SIOCGAIRONET: |
| 1908 | error = copyin(ifr->ifr_data, &sc->areq, sizeof(sc->areq)); |
| 1909 | if (error != 0) |
| 1910 | break; |
| 1911 | #ifdef ANCACHE |
| 1912 | if (sc->areq.an_type == AN_RID_ZERO_CACHE) { |
| 1913 | error = suser_cred(cr, NULL_CRED_OKAY); |
| 1914 | if (error) |
| 1915 | break; |
| 1916 | sc->an_sigitems = sc->an_nextitem = 0; |
| 1917 | break; |
| 1918 | } else if (sc->areq.an_type == AN_RID_READ_CACHE) { |
| 1919 | char *pt = (char *)&sc->areq.an_val; |
| 1920 | bcopy((char *)&sc->an_sigitems, (char *)pt, |
| 1921 | sizeof(int)); |
| 1922 | pt += sizeof(int); |
| 1923 | sc->areq.an_len = sizeof(int) / 2; |
| 1924 | bcopy((char *)&sc->an_sigcache, (char *)pt, |
| 1925 | sizeof(struct an_sigcache) * sc->an_sigitems); |
| 1926 | sc->areq.an_len += ((sizeof(struct an_sigcache) * |
| 1927 | sc->an_sigitems) / 2) + 1; |
| 1928 | } else |
| 1929 | #endif |
| 1930 | if (an_read_record(sc, (struct an_ltv_gen *)&sc->areq)) { |
| 1931 | error = EINVAL; |
| 1932 | break; |
| 1933 | } |
| 1934 | error = copyout(&sc->areq, ifr->ifr_data, sizeof(sc->areq)); |
| 1935 | break; |
| 1936 | case SIOCSAIRONET: |
| 1937 | if ((error = suser_cred(cr, NULL_CRED_OKAY))) |
| 1938 | break; |
| 1939 | error = copyin(ifr->ifr_data, &sc->areq, sizeof(sc->areq)); |
| 1940 | if (error != 0) |
| 1941 | break; |
| 1942 | an_setdef(sc, &sc->areq); |
| 1943 | break; |
| 1944 | case SIOCGPRIVATE_0: /* used by Cisco client utility */ |
| 1945 | if ((error = suser_cred(cr, NULL_CRED_OKAY))) |
| 1946 | break; |
| 1947 | copyin(ifr->ifr_data, &l_ioctl, sizeof(l_ioctl)); |
| 1948 | mode = l_ioctl.command; |
| 1949 | |
| 1950 | if (mode >= AIROGCAP && mode <= AIROGSTATSD32) { |
| 1951 | error = readrids(ifp, &l_ioctl); |
| 1952 | } else if (mode >= AIROPCAP && mode <= AIROPLEAPUSR) { |
| 1953 | error = writerids(ifp, &l_ioctl); |
| 1954 | } else if (mode >= AIROFLSHRST && mode <= AIRORESTART) { |
| 1955 | error = flashcard(ifp, &l_ioctl); |
| 1956 | } else { |
| 1957 | error =-1; |
| 1958 | } |
| 1959 | |
| 1960 | /* copy out the updated command info */ |
| 1961 | copyout(&l_ioctl, ifr->ifr_data, sizeof(l_ioctl)); |
| 1962 | |
| 1963 | break; |
| 1964 | case SIOCGPRIVATE_1: /* used by Cisco client utility */ |
| 1965 | if ((error = suser_cred(cr, NULL_CRED_OKAY))) |
| 1966 | break; |
| 1967 | copyin(ifr->ifr_data, &l_ioctl, sizeof(l_ioctl)); |
| 1968 | l_ioctl.command = 0; |
| 1969 | error = AIROMAGIC; |
| 1970 | copyout(&error, l_ioctl.data, sizeof(error)); |
| 1971 | error = 0; |
| 1972 | break; |
| 1973 | case SIOCG80211: |
| 1974 | sc->areq.an_len = sizeof(sc->areq); |
| 1975 | /* was that a good idea DJA we are doing a short-cut */ |
| 1976 | switch (ireq->i_type) { |
| 1977 | case IEEE80211_IOC_SSID: |
| 1978 | if (ireq->i_val == -1) { |
| 1979 | sc->areq.an_type = AN_RID_STATUS; |
| 1980 | if (an_read_record(sc, |
| 1981 | (struct an_ltv_gen *)&sc->areq)) { |
| 1982 | error = EINVAL; |
| 1983 | break; |
| 1984 | } |
| 1985 | len = status->an_ssidlen; |
| 1986 | tmpptr = status->an_ssid; |
| 1987 | } else if (ireq->i_val >= 0) { |
| 1988 | sc->areq.an_type = AN_RID_SSIDLIST; |
| 1989 | if (an_read_record(sc, |
| 1990 | (struct an_ltv_gen *)&sc->areq)) { |
| 1991 | error = EINVAL; |
| 1992 | break; |
| 1993 | } |
| 1994 | max = (sc->areq.an_len - 4) |
| 1995 | / sizeof(struct an_ltv_ssid_entry); |
| 1996 | if ( max > MAX_SSIDS ) { |
| 1997 | printf("To many SSIDs only using " |
| 1998 | "%d of %d\n", |
| 1999 | MAX_SSIDS, max); |
| 2000 | max = MAX_SSIDS; |
| 2001 | } |
| 2002 | if (ireq->i_val > max) { |
| 2003 | error = EINVAL; |
| 2004 | break; |
| 2005 | } else { |
| 2006 | len = ssids->an_entry[ireq->i_val].an_len; |
| 2007 | tmpptr = ssids->an_entry[ireq->i_val].an_ssid; |
| 2008 | } |
| 2009 | } else { |
| 2010 | error = EINVAL; |
| 2011 | break; |
| 2012 | } |
| 2013 | if (len > IEEE80211_NWID_LEN) { |
| 2014 | error = EINVAL; |
| 2015 | break; |
| 2016 | } |
| 2017 | ireq->i_len = len; |
| 2018 | bzero(tmpstr, IEEE80211_NWID_LEN); |
| 2019 | bcopy(tmpptr, tmpstr, len); |
| 2020 | error = copyout(tmpstr, ireq->i_data, |
| 2021 | IEEE80211_NWID_LEN); |
| 2022 | break; |
| 2023 | case IEEE80211_IOC_NUMSSIDS: |
| 2024 | sc->areq.an_len = sizeof(sc->areq); |
| 2025 | sc->areq.an_type = AN_RID_SSIDLIST; |
| 2026 | if (an_read_record(sc, |
| 2027 | (struct an_ltv_gen *)&sc->areq)) { |
| 2028 | error = EINVAL; |
| 2029 | break; |
| 2030 | } |
| 2031 | max = (sc->areq.an_len - 4) |
| 2032 | / sizeof(struct an_ltv_ssid_entry); |
| 2033 | if (max > MAX_SSIDS) { |
| 2034 | printf("To many SSIDs only using " |
| 2035 | "%d of %d\n", |
| 2036 | MAX_SSIDS, max); |
| 2037 | max = MAX_SSIDS; |
| 2038 | } |
| 2039 | ireq->i_val = max; |
| 2040 | break; |
| 2041 | case IEEE80211_IOC_WEP: |
| 2042 | sc->areq.an_type = AN_RID_ACTUALCFG; |
| 2043 | if (an_read_record(sc, |
| 2044 | (struct an_ltv_gen *)&sc->areq)) { |
| 2045 | error = EINVAL; |
| 2046 | break; |
| 2047 | } |
| 2048 | if (config->an_authtype & AN_AUTHTYPE_PRIVACY_IN_USE) { |
| 2049 | if (config->an_authtype & |
| 2050 | AN_AUTHTYPE_ALLOW_UNENCRYPTED) |
| 2051 | ireq->i_val = IEEE80211_WEP_MIXED; |
| 2052 | else |
| 2053 | ireq->i_val = IEEE80211_WEP_ON; |
| 2054 | } else { |
| 2055 | ireq->i_val = IEEE80211_WEP_OFF; |
| 2056 | } |
| 2057 | break; |
| 2058 | case IEEE80211_IOC_WEPKEY: |
| 2059 | /* |
| 2060 | * XXX: I'm not entierly convinced this is |
| 2061 | * correct, but it's what is implemented in |
| 2062 | * ancontrol so it will have to do until we get |
| 2063 | * access to actual Cisco code. |
| 2064 | */ |
| 2065 | if (ireq->i_val < 0 || ireq->i_val > 8) { |
| 2066 | error = EINVAL; |
| 2067 | break; |
| 2068 | } |
| 2069 | len = 0; |
| 2070 | if (ireq->i_val < 5) { |
| 2071 | sc->areq.an_type = AN_RID_WEP_TEMP; |
| 2072 | for (i = 0; i < 5; i++) { |
| 2073 | if (an_read_record(sc, |
| 2074 | (struct an_ltv_gen *)&sc->areq)) { |
| 2075 | error = EINVAL; |
| 2076 | break; |
| 2077 | } |
| 2078 | if (key->kindex == 0xffff) |
| 2079 | break; |
| 2080 | if (key->kindex == ireq->i_val) |
| 2081 | len = key->klen; |
| 2082 | /* Required to get next entry */ |
| 2083 | sc->areq.an_type = AN_RID_WEP_PERM; |
| 2084 | } |
| 2085 | if (error != 0) |
| 2086 | break; |
| 2087 | } |
| 2088 | /* We aren't allowed to read the value of the |
| 2089 | * key from the card so we just output zeros |
| 2090 | * like we would if we could read the card, but |
| 2091 | * denied the user access. |
| 2092 | */ |
| 2093 | bzero(tmpstr, len); |
| 2094 | ireq->i_len = len; |
| 2095 | error = copyout(tmpstr, ireq->i_data, len); |
| 2096 | break; |
| 2097 | case IEEE80211_IOC_NUMWEPKEYS: |
| 2098 | ireq->i_val = 9; /* include home key */ |
| 2099 | break; |
| 2100 | case IEEE80211_IOC_WEPTXKEY: |
| 2101 | /* |
| 2102 | * For some strange reason, you have to read all |
| 2103 | * keys before you can read the txkey. |
| 2104 | */ |
| 2105 | sc->areq.an_type = AN_RID_WEP_TEMP; |
| 2106 | for (i = 0; i < 5; i++) { |
| 2107 | if (an_read_record(sc, |
| 2108 | (struct an_ltv_gen *) &sc->areq)) { |
| 2109 | error = EINVAL; |
| 2110 | break; |
| 2111 | } |
| 2112 | if (key->kindex == 0xffff) |
| 2113 | break; |
| 2114 | /* Required to get next entry */ |
| 2115 | sc->areq.an_type = AN_RID_WEP_PERM; |
| 2116 | } |
| 2117 | if (error != 0) |
| 2118 | break; |
| 2119 | |
| 2120 | sc->areq.an_type = AN_RID_WEP_PERM; |
| 2121 | key->kindex = 0xffff; |
| 2122 | if (an_read_record(sc, |
| 2123 | (struct an_ltv_gen *)&sc->areq)) { |
| 2124 | error = EINVAL; |
| 2125 | break; |
| 2126 | } |
| 2127 | ireq->i_val = key->mac[0]; |
| 2128 | /* |
| 2129 | * Check for home mode. Map home mode into |
| 2130 | * 5th key since that is how it is stored on |
| 2131 | * the card |
| 2132 | */ |
| 2133 | sc->areq.an_len = sizeof(struct an_ltv_genconfig); |
| 2134 | sc->areq.an_type = AN_RID_GENCONFIG; |
| 2135 | if (an_read_record(sc, |
| 2136 | (struct an_ltv_gen *)&sc->areq)) { |
| 2137 | error = EINVAL; |
| 2138 | break; |
| 2139 | } |
| 2140 | if (config->an_home_product & AN_HOME_NETWORK) |
| 2141 | ireq->i_val = 4; |
| 2142 | break; |
| 2143 | case IEEE80211_IOC_AUTHMODE: |
| 2144 | sc->areq.an_type = AN_RID_ACTUALCFG; |
| 2145 | if (an_read_record(sc, |
| 2146 | (struct an_ltv_gen *)&sc->areq)) { |
| 2147 | error = EINVAL; |
| 2148 | break; |
| 2149 | } |
| 2150 | if ((config->an_authtype & AN_AUTHTYPE_MASK) == |
| 2151 | AN_AUTHTYPE_NONE) { |
| 2152 | ireq->i_val = IEEE80211_AUTH_NONE; |
| 2153 | } else if ((config->an_authtype & AN_AUTHTYPE_MASK) == |
| 2154 | AN_AUTHTYPE_OPEN) { |
| 2155 | ireq->i_val = IEEE80211_AUTH_OPEN; |
| 2156 | } else if ((config->an_authtype & AN_AUTHTYPE_MASK) == |
| 2157 | AN_AUTHTYPE_SHAREDKEY) { |
| 2158 | ireq->i_val = IEEE80211_AUTH_SHARED; |
| 2159 | } else |
| 2160 | error = EINVAL; |
| 2161 | break; |
| 2162 | case IEEE80211_IOC_STATIONNAME: |
| 2163 | sc->areq.an_type = AN_RID_ACTUALCFG; |
| 2164 | if (an_read_record(sc, |
| 2165 | (struct an_ltv_gen *)&sc->areq)) { |
| 2166 | error = EINVAL; |
| 2167 | break; |
| 2168 | } |
| 2169 | ireq->i_len = sizeof(config->an_nodename); |
| 2170 | tmpptr = config->an_nodename; |
| 2171 | bzero(tmpstr, IEEE80211_NWID_LEN); |
| 2172 | bcopy(tmpptr, tmpstr, ireq->i_len); |
| 2173 | error = copyout(tmpstr, ireq->i_data, |
| 2174 | IEEE80211_NWID_LEN); |
| 2175 | break; |
| 2176 | case IEEE80211_IOC_CHANNEL: |
| 2177 | sc->areq.an_type = AN_RID_STATUS; |
| 2178 | if (an_read_record(sc, |
| 2179 | (struct an_ltv_gen *)&sc->areq)) { |
| 2180 | error = EINVAL; |
| 2181 | break; |
| 2182 | } |
| 2183 | ireq->i_val = status->an_cur_channel; |
| 2184 | break; |
| 2185 | case IEEE80211_IOC_POWERSAVE: |
| 2186 | sc->areq.an_type = AN_RID_ACTUALCFG; |
| 2187 | if (an_read_record(sc, |
| 2188 | (struct an_ltv_gen *)&sc->areq)) { |
| 2189 | error = EINVAL; |
| 2190 | break; |
| 2191 | } |
| 2192 | if (config->an_psave_mode == AN_PSAVE_NONE) { |
| 2193 | ireq->i_val = IEEE80211_POWERSAVE_OFF; |
| 2194 | } else if (config->an_psave_mode == AN_PSAVE_CAM) { |
| 2195 | ireq->i_val = IEEE80211_POWERSAVE_CAM; |
| 2196 | } else if (config->an_psave_mode == AN_PSAVE_PSP) { |
| 2197 | ireq->i_val = IEEE80211_POWERSAVE_PSP; |
| 2198 | } else if (config->an_psave_mode == AN_PSAVE_PSP_CAM) { |
| 2199 | ireq->i_val = IEEE80211_POWERSAVE_PSP_CAM; |
| 2200 | } else |
| 2201 | error = EINVAL; |
| 2202 | break; |
| 2203 | case IEEE80211_IOC_POWERSAVESLEEP: |
| 2204 | sc->areq.an_type = AN_RID_ACTUALCFG; |
| 2205 | if (an_read_record(sc, |
| 2206 | (struct an_ltv_gen *)&sc->areq)) { |
| 2207 | error = EINVAL; |
| 2208 | break; |
| 2209 | } |
| 2210 | ireq->i_val = config->an_listen_interval; |
| 2211 | break; |
| 2212 | } |
| 2213 | break; |
| 2214 | case SIOCS80211: |
| 2215 | if ((error = suser_cred(cr, NULL_CRED_OKAY))) |
| 2216 | break; |
| 2217 | sc->areq.an_len = sizeof(sc->areq); |
| 2218 | /* |
| 2219 | * We need a config structure for everything but the WEP |
| 2220 | * key management and SSIDs so we get it now so avoid |
| 2221 | * duplicating this code every time. |
| 2222 | */ |
| 2223 | if (ireq->i_type != IEEE80211_IOC_SSID && |
| 2224 | ireq->i_type != IEEE80211_IOC_WEPKEY && |
| 2225 | ireq->i_type != IEEE80211_IOC_WEPTXKEY) { |
| 2226 | sc->areq.an_type = AN_RID_GENCONFIG; |
| 2227 | if (an_read_record(sc, |
| 2228 | (struct an_ltv_gen *)&sc->areq)) { |
| 2229 | error = EINVAL; |
| 2230 | break; |
| 2231 | } |
| 2232 | } |
| 2233 | switch (ireq->i_type) { |
| 2234 | case IEEE80211_IOC_SSID: |
| 2235 | sc->areq.an_len = sizeof(sc->areq); |
| 2236 | sc->areq.an_type = AN_RID_SSIDLIST; |
| 2237 | if (an_read_record(sc, |
| 2238 | (struct an_ltv_gen *)&sc->areq)) { |
| 2239 | error = EINVAL; |
| 2240 | break; |
| 2241 | } |
| 2242 | if (ireq->i_len > IEEE80211_NWID_LEN) { |
| 2243 | error = EINVAL; |
| 2244 | break; |
| 2245 | } |
| 2246 | max = (sc->areq.an_len - 4) |
| 2247 | / sizeof(struct an_ltv_ssid_entry); |
| 2248 | if (max > MAX_SSIDS) { |
| 2249 | printf("To many SSIDs only using " |
| 2250 | "%d of %d\n", |
| 2251 | MAX_SSIDS, max); |
| 2252 | max = MAX_SSIDS; |
| 2253 | } |
| 2254 | if (ireq->i_val > max) { |
| 2255 | error = EINVAL; |
| 2256 | break; |
| 2257 | } else { |
| 2258 | error = copyin(ireq->i_data, |
| 2259 | ssids->an_entry[ireq->i_val].an_ssid, |
| 2260 | ireq->i_len); |
| 2261 | ssids->an_entry[ireq->i_val].an_len |
| 2262 | = ireq->i_len; |
| 2263 | break; |
| 2264 | } |
| 2265 | break; |
| 2266 | case IEEE80211_IOC_WEP: |
| 2267 | switch (ireq->i_val) { |
| 2268 | case IEEE80211_WEP_OFF: |
| 2269 | config->an_authtype &= |
| 2270 | ~(AN_AUTHTYPE_PRIVACY_IN_USE | |
| 2271 | AN_AUTHTYPE_ALLOW_UNENCRYPTED); |
| 2272 | break; |
| 2273 | case IEEE80211_WEP_ON: |
| 2274 | config->an_authtype |= |
| 2275 | AN_AUTHTYPE_PRIVACY_IN_USE; |
| 2276 | config->an_authtype &= |
| 2277 | ~AN_AUTHTYPE_ALLOW_UNENCRYPTED; |
| 2278 | break; |
| 2279 | case IEEE80211_WEP_MIXED: |
| 2280 | config->an_authtype |= |
| 2281 | AN_AUTHTYPE_PRIVACY_IN_USE | |
| 2282 | AN_AUTHTYPE_ALLOW_UNENCRYPTED; |
| 2283 | break; |
| 2284 | default: |
| 2285 | error = EINVAL; |
| 2286 | break; |
| 2287 | } |
| 2288 | break; |
| 2289 | case IEEE80211_IOC_WEPKEY: |
| 2290 | if (ireq->i_val < 0 || ireq->i_val > 8 || |
| 2291 | ireq->i_len > 13) { |
| 2292 | error = EINVAL; |
| 2293 | break; |
| 2294 | } |
| 2295 | error = copyin(ireq->i_data, tmpstr, 13); |
| 2296 | if (error != 0) |
| 2297 | break; |
| 2298 | /* |
| 2299 | * Map the 9th key into the home mode |
| 2300 | * since that is how it is stored on |
| 2301 | * the card |
| 2302 | */ |
| 2303 | bzero(&sc->areq, sizeof(struct an_ltv_key)); |
| 2304 | sc->areq.an_len = sizeof(struct an_ltv_key); |
| 2305 | key->mac[0] = 1; /* The others are 0. */ |
| 2306 | if (ireq->i_val < 4) { |
| 2307 | sc->areq.an_type = AN_RID_WEP_TEMP; |
| 2308 | key->kindex = ireq->i_val; |
| 2309 | } else { |
| 2310 | sc->areq.an_type = AN_RID_WEP_PERM; |
| 2311 | key->kindex = ireq->i_val - 4; |
| 2312 | } |
| 2313 | key->klen = ireq->i_len; |
| 2314 | bcopy(tmpstr, key->key, key->klen); |
| 2315 | break; |
| 2316 | case IEEE80211_IOC_WEPTXKEY: |
| 2317 | if (ireq->i_val < 0 || ireq->i_val > 4) { |
| 2318 | error = EINVAL; |
| 2319 | break; |
| 2320 | } |
| 2321 | |
| 2322 | /* |
| 2323 | * Map the 5th key into the home mode |
| 2324 | * since that is how it is stored on |
| 2325 | * the card |
| 2326 | */ |
| 2327 | sc->areq.an_len = sizeof(struct an_ltv_genconfig); |
| 2328 | sc->areq.an_type = AN_RID_ACTUALCFG; |
| 2329 | if (an_read_record(sc, |
| 2330 | (struct an_ltv_gen *)&sc->areq)) { |
| 2331 | error = EINVAL; |
| 2332 | break; |
| 2333 | } |
| 2334 | if (ireq->i_val == 4) { |
| 2335 | config->an_home_product |= AN_HOME_NETWORK; |
| 2336 | ireq->i_val = 0; |
| 2337 | } else { |
| 2338 | config->an_home_product &= ~AN_HOME_NETWORK; |
| 2339 | } |
| 2340 | |
| 2341 | sc->an_config.an_home_product |
| 2342 | = config->an_home_product; |
| 2343 | |
| 2344 | /* update configuration */ |
| 2345 | an_init(sc); |
| 2346 | |
| 2347 | bzero(&sc->areq, sizeof(struct an_ltv_key)); |
| 2348 | sc->areq.an_len = sizeof(struct an_ltv_key); |
| 2349 | sc->areq.an_type = AN_RID_WEP_PERM; |
| 2350 | key->kindex = 0xffff; |
| 2351 | key->mac[0] = ireq->i_val; |
| 2352 | break; |
| 2353 | case IEEE80211_IOC_AUTHMODE: |
| 2354 | switch (ireq->i_val) { |
| 2355 | case IEEE80211_AUTH_NONE: |
| 2356 | config->an_authtype = AN_AUTHTYPE_NONE | |
| 2357 | (config->an_authtype & ~AN_AUTHTYPE_MASK); |
| 2358 | break; |
| 2359 | case IEEE80211_AUTH_OPEN: |
| 2360 | config->an_authtype = AN_AUTHTYPE_OPEN | |
| 2361 | (config->an_authtype & ~AN_AUTHTYPE_MASK); |
| 2362 | break; |
| 2363 | case IEEE80211_AUTH_SHARED: |
| 2364 | config->an_authtype = AN_AUTHTYPE_SHAREDKEY | |
| 2365 | (config->an_authtype & ~AN_AUTHTYPE_MASK); |
| 2366 | break; |
| 2367 | default: |
| 2368 | error = EINVAL; |
| 2369 | } |
| 2370 | break; |
| 2371 | case IEEE80211_IOC_STATIONNAME: |
| 2372 | if (ireq->i_len > 16) { |
| 2373 | error = EINVAL; |
| 2374 | break; |
| 2375 | } |
| 2376 | bzero(config->an_nodename, 16); |
| 2377 | error = copyin(ireq->i_data, |
| 2378 | config->an_nodename, ireq->i_len); |
| 2379 | break; |
| 2380 | case IEEE80211_IOC_CHANNEL: |
| 2381 | /* |
| 2382 | * The actual range is 1-14, but if you set it |
| 2383 | * to 0 you get the default so we let that work |
| 2384 | * too. |
| 2385 | */ |
| 2386 | if (ireq->i_val < 0 || ireq->i_val >14) { |
| 2387 | error = EINVAL; |
| 2388 | break; |
| 2389 | } |
| 2390 | config->an_ds_channel = ireq->i_val; |
| 2391 | break; |
| 2392 | case IEEE80211_IOC_POWERSAVE: |
| 2393 | switch (ireq->i_val) { |
| 2394 | case IEEE80211_POWERSAVE_OFF: |
| 2395 | config->an_psave_mode = AN_PSAVE_NONE; |
| 2396 | break; |
| 2397 | case IEEE80211_POWERSAVE_CAM: |
| 2398 | config->an_psave_mode = AN_PSAVE_CAM; |
| 2399 | break; |
| 2400 | case IEEE80211_POWERSAVE_PSP: |
| 2401 | config->an_psave_mode = AN_PSAVE_PSP; |
| 2402 | break; |
| 2403 | case IEEE80211_POWERSAVE_PSP_CAM: |
| 2404 | config->an_psave_mode = AN_PSAVE_PSP_CAM; |
| 2405 | break; |
| 2406 | default: |
| 2407 | error = EINVAL; |
| 2408 | break; |
| 2409 | } |
| 2410 | break; |
| 2411 | case IEEE80211_IOC_POWERSAVESLEEP: |
| 2412 | config->an_listen_interval = ireq->i_val; |
| 2413 | break; |
| 2414 | } |
| 2415 | |
| 2416 | if (!error) |
| 2417 | an_setdef(sc, &sc->areq); |
| 2418 | break; |
| 2419 | default: |
| 2420 | error = ether_ioctl(ifp, command, data); |
| 2421 | break; |
| 2422 | } |
| 2423 | |
| 2424 | crit_exit(); |
| 2425 | |
| 2426 | return(error != 0); |
| 2427 | } |
| 2428 | |
| 2429 | static int |
| 2430 | an_init_tx_ring(sc) |
| 2431 | struct an_softc *sc; |
| 2432 | { |
| 2433 | int i; |
| 2434 | int id; |
| 2435 | |
| 2436 | if (!sc->mpi350) { |
| 2437 | for (i = 0; i < AN_TX_RING_CNT; i++) { |
| 2438 | if (an_alloc_nicmem(sc, 1518 + |
| 2439 | 0x44, &id)) |
| 2440 | return(ENOMEM); |
| 2441 | sc->an_rdata.an_tx_fids[i] = id; |
| 2442 | sc->an_rdata.an_tx_ring[i] = 0; |
| 2443 | } |
| 2444 | } |
| 2445 | |
| 2446 | sc->an_rdata.an_tx_prod = 0; |
| 2447 | sc->an_rdata.an_tx_cons = 0; |
| 2448 | sc->an_rdata.an_tx_empty = 1; |
| 2449 | |
| 2450 | return(0); |
| 2451 | } |
| 2452 | |
| 2453 | static void |
| 2454 | an_init(xsc) |
| 2455 | void *xsc; |
| 2456 | { |
| 2457 | struct an_softc *sc = xsc; |
| 2458 | struct ifnet *ifp = &sc->arpcom.ac_if; |
| 2459 | |
| 2460 | crit_enter(); |
| 2461 | if (ifp->if_flags & IFF_RUNNING) |
| 2462 | an_stop(sc); |
| 2463 | |
| 2464 | sc->an_associated = 0; |
| 2465 | |
| 2466 | /* Allocate the TX buffers */ |
| 2467 | if (an_init_tx_ring(sc)) { |
| 2468 | an_reset(sc); |
| 2469 | if (sc->mpi350) |
| 2470 | an_init_mpi350_desc(sc); |
| 2471 | if (an_init_tx_ring(sc)) { |
| 2472 | crit_exit(); |
| 2473 | if_printf(ifp, "tx buffer allocation failed\n"); |
| 2474 | return; |
| 2475 | } |
| 2476 | } |
| 2477 | |
| 2478 | /* Set our MAC address. */ |
| 2479 | bcopy((char *)&sc->arpcom.ac_enaddr, |
| 2480 | (char *)&sc->an_config.an_macaddr, ETHER_ADDR_LEN); |
| 2481 | |
| 2482 | if (ifp->if_flags & IFF_BROADCAST) |
| 2483 | sc->an_config.an_rxmode = AN_RXMODE_BC_ADDR; |
| 2484 | else |
| 2485 | sc->an_config.an_rxmode = AN_RXMODE_ADDR; |
| 2486 | |
| 2487 | if (ifp->if_flags & IFF_MULTICAST) |
| 2488 | sc->an_config.an_rxmode = AN_RXMODE_BC_MC_ADDR; |
| 2489 | |
| 2490 | if (ifp->if_flags & IFF_PROMISC) { |
| 2491 | if (sc->an_monitor & AN_MONITOR) { |
| 2492 | if (sc->an_monitor & AN_MONITOR_ANY_BSS) { |
| 2493 | sc->an_config.an_rxmode |= |
| 2494 | AN_RXMODE_80211_MONITOR_ANYBSS | |
| 2495 | AN_RXMODE_NO_8023_HEADER; |
| 2496 | } else { |
| 2497 | sc->an_config.an_rxmode |= |
| 2498 | AN_RXMODE_80211_MONITOR_CURBSS | |
| 2499 | AN_RXMODE_NO_8023_HEADER; |
| 2500 | } |
| 2501 | } |
| 2502 | } |
| 2503 | |
| 2504 | if (sc->an_have_rssimap) |
| 2505 | sc->an_config.an_rxmode |= AN_RXMODE_NORMALIZED_RSSI; |
| 2506 | |
| 2507 | /* Set the ssid list */ |
| 2508 | sc->an_ssidlist.an_type = AN_RID_SSIDLIST; |
| 2509 | sc->an_ssidlist.an_len = sizeof(struct an_ltv_ssidlist_new); |
| 2510 | if (an_write_record(sc, (struct an_ltv_gen *)&sc->an_ssidlist)) { |
| 2511 | crit_exit(); |
| 2512 | if_printf(ifp, "failed to set ssid list\n"); |
| 2513 | return; |
| 2514 | } |
| 2515 | |
| 2516 | /* Set the AP list */ |
| 2517 | sc->an_aplist.an_type = AN_RID_APLIST; |
| 2518 | sc->an_aplist.an_len = sizeof(struct an_ltv_aplist); |
| 2519 | if (an_write_record(sc, (struct an_ltv_gen *)&sc->an_aplist)) { |
| 2520 | crit_exit(); |
| 2521 | if_printf(ifp, "failed to set AP list\n"); |
| 2522 | return; |
| 2523 | } |
| 2524 | |
| 2525 | /* Set the configuration in the NIC */ |
| 2526 | sc->an_config.an_len = sizeof(struct an_ltv_genconfig); |
| 2527 | sc->an_config.an_type = AN_RID_GENCONFIG; |
| 2528 | if (an_write_record(sc, (struct an_ltv_gen *)&sc->an_config)) { |
| 2529 | crit_exit(); |
| 2530 | if_printf(ifp, "failed to set configuration\n"); |
| 2531 | return; |
| 2532 | } |
| 2533 | |
| 2534 | /* Enable the MAC */ |
| 2535 | if (an_cmd(sc, AN_CMD_ENABLE, 0)) { |
| 2536 | crit_exit(); |
| 2537 | if_printf(ifp, "failed to enable MAC\n"); |
| 2538 | return; |
| 2539 | } |
| 2540 | |
| 2541 | if (ifp->if_flags & IFF_PROMISC) |
| 2542 | an_cmd(sc, AN_CMD_SET_MODE, 0xffff); |
| 2543 | |
| 2544 | /* enable interrupts */ |
| 2545 | CSR_WRITE_2(sc, AN_INT_EN(sc->mpi350), AN_INTRS(sc->mpi350)); |
| 2546 | |
| 2547 | ifp->if_flags |= IFF_RUNNING; |
| 2548 | ifp->if_flags &= ~IFF_OACTIVE; |
| 2549 | |
| 2550 | callout_reset(&sc->an_stat_timer, hz, an_stats_update, sc); |
| 2551 | |
| 2552 | crit_exit(); |
| 2553 | } |
| 2554 | |
| 2555 | static void |
| 2556 | an_start(ifp) |
| 2557 | struct ifnet *ifp; |
| 2558 | { |
| 2559 | struct an_softc *sc; |
| 2560 | struct mbuf *m0 = NULL; |
| 2561 | struct an_txframe_802_3 tx_frame_802_3; |
| 2562 | struct ether_header *eh; |
| 2563 | int id, idx, i; |
| 2564 | unsigned char txcontrol; |
| 2565 | struct an_card_tx_desc an_tx_desc; |
| 2566 | u_int8_t *buf; |
| 2567 | |
| 2568 | sc = ifp->if_softc; |
| 2569 | |
| 2570 | if (ifp->if_flags & IFF_OACTIVE) |
| 2571 | return; |
| 2572 | |
| 2573 | if (!sc->an_associated) |
| 2574 | return; |
| 2575 | |
| 2576 | /* We can't send in monitor mode so toss any attempts. */ |
| 2577 | if (sc->an_monitor && (ifp->if_flags & IFF_PROMISC)) { |
| 2578 | ifq_purge(&ifp->if_snd); |
| 2579 | return; |
| 2580 | } |
| 2581 | |
| 2582 | idx = sc->an_rdata.an_tx_prod; |
| 2583 | |
| 2584 | if (!sc->mpi350) { |
| 2585 | bzero((char *)&tx_frame_802_3, sizeof(tx_frame_802_3)); |
| 2586 | |
| 2587 | while (sc->an_rdata.an_tx_ring[idx] == 0) { |
| 2588 | m0 = ifq_dequeue(&ifp->if_snd, NULL); |
| 2589 | if (m0 == NULL) |
| 2590 | break; |
| 2591 | |
| 2592 | id = sc->an_rdata.an_tx_fids[idx]; |
| 2593 | eh = mtod(m0, struct ether_header *); |
| 2594 | |
| 2595 | bcopy((char *)&eh->ether_dhost, |
| 2596 | (char *)&tx_frame_802_3.an_tx_dst_addr, |
| 2597 | ETHER_ADDR_LEN); |
| 2598 | bcopy((char *)&eh->ether_shost, |
| 2599 | (char *)&tx_frame_802_3.an_tx_src_addr, |
| 2600 | ETHER_ADDR_LEN); |
| 2601 | |
| 2602 | /* minus src/dest mac & type */ |
| 2603 | tx_frame_802_3.an_tx_802_3_payload_len = |
| 2604 | m0->m_pkthdr.len - 12; |
| 2605 | |
| 2606 | m_copydata(m0, sizeof(struct ether_header) - 2 , |
| 2607 | tx_frame_802_3.an_tx_802_3_payload_len, |
| 2608 | (caddr_t)&sc->an_txbuf); |
| 2609 | |
| 2610 | txcontrol = AN_TXCTL_8023; |
| 2611 | /* write the txcontrol only */ |
| 2612 | an_write_data(sc, id, 0x08, (caddr_t)&txcontrol, |
| 2613 | sizeof(txcontrol)); |
| 2614 | |
| 2615 | /* 802_3 header */ |
| 2616 | an_write_data(sc, id, 0x34, (caddr_t)&tx_frame_802_3, |
| 2617 | sizeof(struct an_txframe_802_3)); |
| 2618 | |
| 2619 | /* in mbuf header type is just before payload */ |
| 2620 | an_write_data(sc, id, 0x44, (caddr_t)&sc->an_txbuf, |
| 2621 | tx_frame_802_3.an_tx_802_3_payload_len); |
| 2622 | |
| 2623 | BPF_MTAP(ifp, m0); |
| 2624 | |
| 2625 | m_freem(m0); |
| 2626 | m0 = NULL; |
| 2627 | |
| 2628 | sc->an_rdata.an_tx_ring[idx] = id; |
| 2629 | if (an_cmd(sc, AN_CMD_TX, id)) |
| 2630 | if_printf(ifp, "xmit failed\n"); |
| 2631 | |
| 2632 | AN_INC(idx, AN_TX_RING_CNT); |
| 2633 | |
| 2634 | /* |
| 2635 | * Set a timeout in case the chip goes out to lunch. |
| 2636 | */ |
| 2637 | ifp->if_timer = 5; |
| 2638 | } |
| 2639 | } else { /* MPI-350 */ |
| 2640 | /* Disable interrupts. */ |
| 2641 | CSR_WRITE_2(sc, AN_INT_EN(sc->mpi350), 0); |
| 2642 | |
| 2643 | while (sc->an_rdata.an_tx_empty || |
| 2644 | idx != sc->an_rdata.an_tx_cons) { |
| 2645 | m0 = ifq_dequeue(&ifp->if_snd, NULL); |
| 2646 | if (m0 == NULL) { |
| 2647 | break; |
| 2648 | } |
| 2649 | buf = sc->an_tx_buffer[idx].an_dma_vaddr; |
| 2650 | |
| 2651 | eh = mtod(m0, struct ether_header *); |
| 2652 | |
| 2653 | /* DJA optimize this to limit bcopy */ |
| 2654 | bcopy((char *)&eh->ether_dhost, |
| 2655 | (char *)&tx_frame_802_3.an_tx_dst_addr, |
| 2656 | ETHER_ADDR_LEN); |
| 2657 | bcopy((char *)&eh->ether_shost, |
| 2658 | (char *)&tx_frame_802_3.an_tx_src_addr, |
| 2659 | ETHER_ADDR_LEN); |
| 2660 | |
| 2661 | /* minus src/dest mac & type */ |
| 2662 | tx_frame_802_3.an_tx_802_3_payload_len = |
| 2663 | m0->m_pkthdr.len - 12; |
| 2664 | |
| 2665 | m_copydata(m0, sizeof(struct ether_header) - 2 , |
| 2666 | tx_frame_802_3.an_tx_802_3_payload_len, |
| 2667 | (caddr_t)&sc->an_txbuf); |
| 2668 | |
| 2669 | txcontrol = AN_TXCTL_8023; |
| 2670 | /* write the txcontrol only */ |
| 2671 | bcopy((caddr_t)&txcontrol, &buf[0x08], |
| 2672 | sizeof(txcontrol)); |
| 2673 | |
| 2674 | /* 802_3 header */ |
| 2675 | bcopy((caddr_t)&tx_frame_802_3, &buf[0x34], |
| 2676 | sizeof(struct an_txframe_802_3)); |
| 2677 | |
| 2678 | /* in mbuf header type is just before payload */ |
| 2679 | bcopy((caddr_t)&sc->an_txbuf, &buf[0x44], |
| 2680 | tx_frame_802_3.an_tx_802_3_payload_len); |
| 2681 | |
| 2682 | |
| 2683 | bzero(&an_tx_desc, sizeof(an_tx_desc)); |
| 2684 | an_tx_desc.an_offset = 0; |
| 2685 | an_tx_desc.an_eoc = 1; |
| 2686 | an_tx_desc.an_valid = 1; |
| 2687 | an_tx_desc.an_len = 0x44 + |
| 2688 | tx_frame_802_3.an_tx_802_3_payload_len; |
| 2689 | an_tx_desc.an_phys = sc->an_tx_buffer[idx].an_dma_paddr; |
| 2690 | for (i = 0; i < sizeof(an_tx_desc) / 4 ; i++) { |
| 2691 | CSR_MEM_AUX_WRITE_4(sc, AN_TX_DESC_OFFSET |
| 2692 | /* zero for now */ |
| 2693 | + (0 * sizeof(an_tx_desc)) |
| 2694 | + (i * 4), |
| 2695 | ((u_int32_t*)&an_tx_desc)[i]); |
| 2696 | } |
| 2697 | |
| 2698 | BPF_MTAP(ifp, m0); |
| 2699 | |
| 2700 | m_freem(m0); |
| 2701 | m0 = NULL; |
| 2702 | |
| 2703 | AN_INC(idx, AN_MAX_TX_DESC); |
| 2704 | sc->an_rdata.an_tx_empty = 0; |
| 2705 | |
| 2706 | CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_ALLOC); |
| 2707 | |
| 2708 | /* |
| 2709 | * Set a timeout in case the chip goes out to lunch. |
| 2710 | */ |
| 2711 | ifp->if_timer = 5; |
| 2712 | } |
| 2713 | |
| 2714 | /* Re-enable interrupts. */ |
| 2715 | CSR_WRITE_2(sc, AN_INT_EN(sc->mpi350), AN_INTRS(sc->mpi350)); |
| 2716 | } |
| 2717 | |
| 2718 | if (m0 != NULL) |
| 2719 | ifp->if_flags |= IFF_OACTIVE; |
| 2720 | |
| 2721 | sc->an_rdata.an_tx_prod = idx; |
| 2722 | } |
| 2723 | |
| 2724 | void |
| 2725 | an_stop(sc) |
| 2726 | struct an_softc *sc; |
| 2727 | { |
| 2728 | struct ifnet *ifp; |
| 2729 | int i; |
| 2730 | |
| 2731 | ifp = &sc->arpcom.ac_if; |
| 2732 | |
| 2733 | crit_enter(); |
| 2734 | |
| 2735 | an_cmd(sc, AN_CMD_FORCE_SYNCLOSS, 0); |
| 2736 | CSR_WRITE_2(sc, AN_INT_EN(sc->mpi350), 0); |
| 2737 | an_cmd(sc, AN_CMD_DISABLE, 0); |
| 2738 | |
| 2739 | for (i = 0; i < AN_TX_RING_CNT; i++) |
| 2740 | an_cmd(sc, AN_CMD_DEALLOC_MEM, sc->an_rdata.an_tx_fids[i]); |
| 2741 | |
| 2742 | callout_stop(&sc->an_stat_timer); |
| 2743 | |
| 2744 | ifp->if_flags &= ~(IFF_RUNNING|IFF_OACTIVE); |
| 2745 | |
| 2746 | if (sc->an_flash_buffer) { |
| 2747 | free(sc->an_flash_buffer, M_DEVBUF); |
| 2748 | sc->an_flash_buffer = NULL; |
| 2749 | } |
| 2750 | |
| 2751 | crit_exit(); |
| 2752 | } |
| 2753 | |
| 2754 | static void |
| 2755 | an_watchdog(ifp) |
| 2756 | struct ifnet *ifp; |
| 2757 | { |
| 2758 | struct an_softc *sc; |
| 2759 | |
| 2760 | sc = ifp->if_softc; |
| 2761 | |
| 2762 | crit_enter(); |
| 2763 | an_reset(sc); |
| 2764 | if (sc->mpi350) |
| 2765 | an_init_mpi350_desc(sc); |
| 2766 | an_init(sc); |
| 2767 | |
| 2768 | ifp->if_oerrors++; |
| 2769 | crit_exit(); |
| 2770 | |
| 2771 | if_printf(ifp, "device timeout\n"); |
| 2772 | } |
| 2773 | |
| 2774 | void |
| 2775 | an_shutdown(dev) |
| 2776 | device_t dev; |
| 2777 | { |
| 2778 | struct an_softc *sc; |
| 2779 | |
| 2780 | sc = device_get_softc(dev); |
| 2781 | an_stop(sc); |
| 2782 | |
| 2783 | return; |
| 2784 | } |
| 2785 | |
| 2786 | void |
| 2787 | an_resume(dev) |
| 2788 | device_t dev; |
| 2789 | { |
| 2790 | struct an_softc *sc; |
| 2791 | struct ifnet *ifp; |
| 2792 | int i; |
| 2793 | |
| 2794 | sc = device_get_softc(dev); |
| 2795 | ifp = &sc->arpcom.ac_if; |
| 2796 | |
| 2797 | an_reset(sc); |
| 2798 | if (sc->mpi350) |
| 2799 | an_init_mpi350_desc(sc); |
| 2800 | an_init(sc); |
| 2801 | |
| 2802 | /* Recovery temporary keys */ |
| 2803 | for (i = 0; i < 4; i++) { |
| 2804 | sc->areq.an_type = AN_RID_WEP_TEMP; |
| 2805 | sc->areq.an_len = sizeof(struct an_ltv_key); |
| 2806 | bcopy(&sc->an_temp_keys[i], |
| 2807 | &sc->areq, sizeof(struct an_ltv_key)); |
| 2808 | an_setdef(sc, &sc->areq); |
| 2809 | } |
| 2810 | |
| 2811 | if (ifp->if_flags & IFF_UP) |
| 2812 | an_start(ifp); |
| 2813 | |
| 2814 | return; |
| 2815 | } |
| 2816 | |
| 2817 | #ifdef ANCACHE |
| 2818 | /* Aironet signal strength cache code. |
| 2819 | * store signal/noise/quality on per MAC src basis in |
| 2820 | * a small fixed cache. The cache wraps if > MAX slots |
| 2821 | * used. The cache may be zeroed out to start over. |
| 2822 | * Two simple filters exist to reduce computation: |
| 2823 | * 1. ip only (literally 0x800, ETHERTYPE_IP) which may be used |
| 2824 | * to ignore some packets. It defaults to ip only. |
| 2825 | * it could be used to focus on broadcast, non-IP 802.11 beacons. |
| 2826 | * 2. multicast/broadcast only. This may be used to |
| 2827 | * ignore unicast packets and only cache signal strength |
| 2828 | * for multicast/broadcast packets (beacons); e.g., Mobile-IP |
| 2829 | * beacons and not unicast traffic. |
| 2830 | * |
| 2831 | * The cache stores (MAC src(index), IP src (major clue), signal, |
| 2832 | * quality, noise) |
| 2833 | * |
| 2834 | * No apologies for storing IP src here. It's easy and saves much |
| 2835 | * trouble elsewhere. The cache is assumed to be INET dependent, |
| 2836 | * although it need not be. |
| 2837 | * |
| 2838 | * Note: the Aironet only has a single byte of signal strength value |
| 2839 | * in the rx frame header, and it's not scaled to anything sensible. |
| 2840 | * This is kind of lame, but it's all we've got. |
| 2841 | */ |
| 2842 | |
| 2843 | #ifdef documentation |
| 2844 | |
| 2845 | int an_sigitems; /* number of cached entries */ |
| 2846 | struct an_sigcache an_sigcache[MAXANCACHE]; /* array of cache entries */ |
| 2847 | int an_nextitem; /* index/# of entries */ |
| 2848 | |
| 2849 | |
| 2850 | #endif |
| 2851 | |
| 2852 | /* control variables for cache filtering. Basic idea is |
| 2853 | * to reduce cost (e.g., to only Mobile-IP agent beacons |
| 2854 | * which are broadcast or multicast). Still you might |
| 2855 | * want to measure signal strength anth unicast ping packets |
| 2856 | * on a pt. to pt. ant. setup. |
| 2857 | */ |
| 2858 | /* set true if you want to limit cache items to broadcast/mcast |
| 2859 | * only packets (not unicast). Useful for mobile-ip beacons which |
| 2860 | * are broadcast/multicast at network layer. Default is all packets |
| 2861 | * so ping/unicast anll work say anth pt. to pt. antennae setup. |
| 2862 | */ |
| 2863 | static int an_cache_mcastonly = 0; |
| 2864 | SYSCTL_INT(_hw_an, OID_AUTO, an_cache_mcastonly, CTLFLAG_RW, |
| 2865 | &an_cache_mcastonly, 0, ""); |
| 2866 | |
| 2867 | /* set true if you want to limit cache items to IP packets only |
| 2868 | */ |
| 2869 | static int an_cache_iponly = 1; |
| 2870 | SYSCTL_INT(_hw_an, OID_AUTO, an_cache_iponly, CTLFLAG_RW, |
| 2871 | &an_cache_iponly, 0, ""); |
| 2872 | |
| 2873 | /* |
| 2874 | * an_cache_store, per rx packet store signal |
| 2875 | * strength in MAC (src) indexed cache. |
| 2876 | */ |
| 2877 | static void |
| 2878 | an_cache_store (sc, m, rx_rssi, rx_quality) |
| 2879 | struct an_softc *sc; |
| 2880 | struct mbuf *m; |
| 2881 | u_int8_t rx_rssi; |
| 2882 | u_int8_t rx_quality; |
| 2883 | { |
| 2884 | struct ether_header *eh = mtod(m, struct ether_header *); |
| 2885 | struct ip *ip = NULL; |
| 2886 | int i; |
| 2887 | static int cache_slot = 0; /* use this cache entry */ |
| 2888 | static int wrapindex = 0; /* next "free" cache entry */ |
| 2889 | |
| 2890 | /* filters: |
| 2891 | * 1. ip only |
| 2892 | * 2. configurable filter to throw out unicast packets, |
| 2893 | * keep multicast only. |
| 2894 | */ |
| 2895 | |
| 2896 | if ((ntohs(eh->ether_type) == ETHERTYPE_IP)) |
| 2897 | ip = (struct ip *)(mtod(m, uint8_t *) + ETHER_HDR_LEN); |
| 2898 | else if (an_cache_iponly) |
| 2899 | return; |
| 2900 | |
| 2901 | /* filter for broadcast/multicast only |
| 2902 | */ |
| 2903 | if (an_cache_mcastonly && ((eh->ether_dhost[0] & 1) == 0)) { |
| 2904 | return; |
| 2905 | } |
| 2906 | |
| 2907 | #ifdef SIGDEBUG |
| 2908 | if_printf(&sc->arpcom.ac_if, "q value %x (MSB=0x%x, LSB=0x%x)\n", |
| 2909 | rx_rssi & 0xffff, rx_rssi >> 8, rx_rssi & 0xff); |
| 2910 | #endif |
| 2911 | |
| 2912 | /* do a linear search for a matching MAC address |
| 2913 | * in the cache table |
| 2914 | * . MAC address is 6 bytes, |
| 2915 | * . var w_nextitem holds total number of entries already cached |
| 2916 | */ |
| 2917 | for (i = 0; i < sc->an_nextitem; i++) { |
| 2918 | if (! bcmp(eh->ether_shost , sc->an_sigcache[i].macsrc, 6 )) { |
| 2919 | /* Match!, |
| 2920 | * so we already have this entry, |
| 2921 | * update the data |
| 2922 | */ |
| 2923 | break; |
| 2924 | } |
| 2925 | } |
| 2926 | |
| 2927 | /* did we find a matching mac address? |
| 2928 | * if yes, then overwrite a previously existing cache entry |
| 2929 | */ |
| 2930 | if (i < sc->an_nextitem ) { |
| 2931 | cache_slot = i; |
| 2932 | } |
| 2933 | /* else, have a new address entry,so |
| 2934 | * add this new entry, |
| 2935 | * if table full, then we need to replace LRU entry |
| 2936 | */ |
| 2937 | else { |
| 2938 | |
| 2939 | /* check for space in cache table |
| 2940 | * note: an_nextitem also holds number of entries |
| 2941 | * added in the cache table |
| 2942 | */ |
| 2943 | if ( sc->an_nextitem < MAXANCACHE ) { |
| 2944 | cache_slot = sc->an_nextitem; |
| 2945 | sc->an_nextitem++; |
| 2946 | sc->an_sigitems = sc->an_nextitem; |
| 2947 | } |
| 2948 | /* no space found, so simply wrap anth wrap index |
| 2949 | * and "zap" the next entry |
| 2950 | */ |
| 2951 | else { |
| 2952 | if (wrapindex == MAXANCACHE) { |
| 2953 | wrapindex = 0; |
| 2954 | } |
| 2955 | cache_slot = wrapindex++; |
| 2956 | } |
| 2957 | } |
| 2958 | |
| 2959 | /* invariant: cache_slot now points at some slot |
| 2960 | * in cache. |
| 2961 | */ |
| 2962 | if (cache_slot < 0 || cache_slot >= MAXANCACHE) { |
| 2963 | log(LOG_ERR, "an_cache_store, bad index: %d of " |
| 2964 | "[0..%d], gross cache error\n", |
| 2965 | cache_slot, MAXANCACHE); |
| 2966 | return; |
| 2967 | } |
| 2968 | |
| 2969 | /* store items in cache |
| 2970 | * .ip source address |
| 2971 | * .mac src |
| 2972 | * .signal, etc. |
| 2973 | */ |
| 2974 | if (ip != NULL) { |
| 2975 | sc->an_sigcache[cache_slot].ipsrc = ip->ip_src.s_addr; |
| 2976 | } |
| 2977 | bcopy( eh->ether_shost, sc->an_sigcache[cache_slot].macsrc, 6); |
| 2978 | |
| 2979 | |
| 2980 | switch (an_cache_mode) { |
| 2981 | case DBM: |
| 2982 | if (sc->an_have_rssimap) { |
| 2983 | sc->an_sigcache[cache_slot].signal = |
| 2984 | - sc->an_rssimap.an_entries[rx_rssi].an_rss_dbm; |
| 2985 | sc->an_sigcache[cache_slot].quality = |
| 2986 | - sc->an_rssimap.an_entries[rx_quality].an_rss_dbm; |
| 2987 | } else { |
| 2988 | sc->an_sigcache[cache_slot].signal = rx_rssi - 100; |
| 2989 | sc->an_sigcache[cache_slot].quality = rx_quality - 100; |
| 2990 | } |
| 2991 | break; |
| 2992 | case PERCENT: |
| 2993 | if (sc->an_have_rssimap) { |
| 2994 | sc->an_sigcache[cache_slot].signal = |
| 2995 | sc->an_rssimap.an_entries[rx_rssi].an_rss_pct; |
| 2996 | sc->an_sigcache[cache_slot].quality = |
| 2997 | sc->an_rssimap.an_entries[rx_quality].an_rss_pct; |
| 2998 | } else { |
| 2999 | if (rx_rssi > 100) |
| 3000 | rx_rssi = 100; |
| 3001 | if (rx_quality > 100) |
| 3002 | rx_quality = 100; |
| 3003 | sc->an_sigcache[cache_slot].signal = rx_rssi; |
| 3004 | sc->an_sigcache[cache_slot].quality = rx_quality; |
| 3005 | } |
| 3006 | break; |
| 3007 | case RAW: |
| 3008 | sc->an_sigcache[cache_slot].signal = rx_rssi; |
| 3009 | sc->an_sigcache[cache_slot].quality = rx_quality; |
| 3010 | break; |
| 3011 | } |
| 3012 | |
| 3013 | sc->an_sigcache[cache_slot].noise = 0; |
| 3014 | |
| 3015 | return; |
| 3016 | } |
| 3017 | #endif |
| 3018 | |
| 3019 | static int |
| 3020 | an_media_change(ifp) |
| 3021 | struct ifnet *ifp; |
| 3022 | { |
| 3023 | struct an_softc *sc = ifp->if_softc; |
| 3024 | struct an_ltv_genconfig *cfg; |
| 3025 | int otype = sc->an_config.an_opmode; |
| 3026 | int orate = sc->an_tx_rate; |
| 3027 | |
| 3028 | switch (IFM_SUBTYPE(sc->an_ifmedia.ifm_cur->ifm_media)) { |
| 3029 | case IFM_IEEE80211_DS1: |
| 3030 | sc->an_tx_rate = AN_RATE_1MBPS; |
| 3031 | break; |
| 3032 | case IFM_IEEE80211_DS2: |
| 3033 | sc->an_tx_rate = AN_RATE_2MBPS; |
| 3034 | break; |
| 3035 | case IFM_IEEE80211_DS5: |
| 3036 | sc->an_tx_rate = AN_RATE_5_5MBPS; |
| 3037 | break; |
| 3038 | case IFM_IEEE80211_DS11: |
| 3039 | sc->an_tx_rate = AN_RATE_11MBPS; |
| 3040 | break; |
| 3041 | case IFM_AUTO: |
| 3042 | sc->an_tx_rate = 0; |
| 3043 | break; |
| 3044 | } |
| 3045 | |
| 3046 | if (orate != sc->an_tx_rate) { |
| 3047 | /* Read the current configuration */ |
| 3048 | sc->an_config.an_type = AN_RID_GENCONFIG; |
| 3049 | sc->an_config.an_len = sizeof(struct an_ltv_genconfig); |
| 3050 | an_read_record(sc, (struct an_ltv_gen *)&sc->an_config); |
| 3051 | cfg = &sc->an_config; |
| 3052 | |
| 3053 | /* clear other rates and set the only one we want */ |
| 3054 | bzero(cfg->an_rates, sizeof(cfg->an_rates)); |
| 3055 | cfg->an_rates[0] = sc->an_tx_rate; |
| 3056 | |
| 3057 | /* Save the new rate */ |
| 3058 | sc->an_config.an_type = AN_RID_GENCONFIG; |
| 3059 | sc->an_config.an_len = sizeof(struct an_ltv_genconfig); |
| 3060 | } |
| 3061 | |
| 3062 | if ((sc->an_ifmedia.ifm_cur->ifm_media & IFM_IEEE80211_ADHOC) != 0) |
| 3063 | sc->an_config.an_opmode &= ~AN_OPMODE_INFRASTRUCTURE_STATION; |
| 3064 | else |
| 3065 | sc->an_config.an_opmode |= AN_OPMODE_INFRASTRUCTURE_STATION; |
| 3066 | |
| 3067 | if (otype != sc->an_config.an_opmode || |
| 3068 | orate != sc->an_tx_rate) |
| 3069 | an_init(sc); |
| 3070 | |
| 3071 | return(0); |
| 3072 | } |
| 3073 | |
| 3074 | static void |
| 3075 | an_media_status(ifp, imr) |
| 3076 | struct ifnet *ifp; |
| 3077 | struct ifmediareq *imr; |
| 3078 | { |
| 3079 | struct an_ltv_status status; |
| 3080 | struct an_softc *sc = ifp->if_softc; |
| 3081 | |
| 3082 | status.an_len = sizeof(status); |
| 3083 | status.an_type = AN_RID_STATUS; |
| 3084 | if (an_read_record(sc, (struct an_ltv_gen *)&status)) { |
| 3085 | /* If the status read fails, just lie. */ |
| 3086 | imr->ifm_active = sc->an_ifmedia.ifm_cur->ifm_media; |
| 3087 | imr->ifm_status = IFM_AVALID|IFM_ACTIVE; |
| 3088 | } |
| 3089 | |
| 3090 | if (sc->an_tx_rate == 0) { |
| 3091 | imr->ifm_active = IFM_IEEE80211|IFM_AUTO; |
| 3092 | if (sc->an_config.an_opmode == AN_OPMODE_IBSS_ADHOC) |
| 3093 | imr->ifm_active |= IFM_IEEE80211_ADHOC; |
| 3094 | switch (status.an_current_tx_rate) { |
| 3095 | case AN_RATE_1MBPS: |
| 3096 | imr->ifm_active |= IFM_IEEE80211_DS1; |
| 3097 | break; |
| 3098 | case AN_RATE_2MBPS: |
| 3099 | imr->ifm_active |= IFM_IEEE80211_DS2; |
| 3100 | break; |
| 3101 | case AN_RATE_5_5MBPS: |
| 3102 | imr->ifm_active |= IFM_IEEE80211_DS5; |
| 3103 | break; |
| 3104 | case AN_RATE_11MBPS: |
| 3105 | imr->ifm_active |= IFM_IEEE80211_DS11; |
| 3106 | break; |
| 3107 | } |
| 3108 | } else { |
| 3109 | imr->ifm_active = sc->an_ifmedia.ifm_cur->ifm_media; |
| 3110 | } |
| 3111 | |
| 3112 | imr->ifm_status = IFM_AVALID; |
| 3113 | if (status.an_opmode & AN_STATUS_OPMODE_ASSOCIATED) |
| 3114 | imr->ifm_status |= IFM_ACTIVE; |
| 3115 | } |
| 3116 | |
| 3117 | /********************** Cisco utility support routines *************/ |
| 3118 | |
| 3119 | /* |
| 3120 | * ReadRids & WriteRids derived from Cisco driver additions to Ben Reed's |
| 3121 | * Linux driver |
| 3122 | */ |
| 3123 | |
| 3124 | static int |
| 3125 | readrids(ifp, l_ioctl) |
| 3126 | struct ifnet *ifp; |
| 3127 | struct aironet_ioctl *l_ioctl; |
| 3128 | { |
| 3129 | unsigned short rid; |
| 3130 | struct an_softc *sc; |
| 3131 | |
| 3132 | switch (l_ioctl->command) { |
| 3133 | case AIROGCAP: |
| 3134 | rid = AN_RID_CAPABILITIES; |
| 3135 | break; |
| 3136 | case AIROGCFG: |
| 3137 | rid = AN_RID_GENCONFIG; |
| 3138 | break; |
| 3139 | case AIROGSLIST: |
| 3140 | rid = AN_RID_SSIDLIST; |
| 3141 | break; |
| 3142 | case AIROGVLIST: |
| 3143 | rid = AN_RID_APLIST; |
| 3144 | break; |
| 3145 | case AIROGDRVNAM: |
| 3146 | rid = AN_RID_DRVNAME; |
| 3147 | break; |
| 3148 | case AIROGEHTENC: |
| 3149 | rid = AN_RID_ENCAPPROTO; |
| 3150 | break; |
| 3151 | case AIROGWEPKTMP: |
| 3152 | rid = AN_RID_WEP_TEMP; |
| 3153 | break; |
| 3154 | case AIROGWEPKNV: |
| 3155 | rid = AN_RID_WEP_PERM; |
| 3156 | break; |
| 3157 | case AIROGSTAT: |
| 3158 | rid = AN_RID_STATUS; |
| 3159 | break; |
| 3160 | case AIROGSTATSD32: |
| 3161 | rid = AN_RID_32BITS_DELTA; |
| 3162 | break; |
| 3163 | case AIROGSTATSC32: |
| 3164 | rid = AN_RID_32BITS_CUM; |
| 3165 | break; |
| 3166 | default: |
| 3167 | rid = 999; |
| 3168 | break; |
| 3169 | } |
| 3170 | |
| 3171 | if (rid == 999) /* Is bad command */ |
| 3172 | return -EINVAL; |
| 3173 | |
| 3174 | sc = ifp->if_softc; |
| 3175 | sc->areq.an_len = AN_MAX_DATALEN; |
| 3176 | sc->areq.an_type = rid; |
| 3177 | |
| 3178 | an_read_record(sc, (struct an_ltv_gen *)&sc->areq); |
| 3179 | |
| 3180 | l_ioctl->len = sc->areq.an_len - 4; /* just data */ |
| 3181 | |
| 3182 | /* the data contains the length at first */ |
| 3183 | if (copyout(&(sc->areq.an_len), l_ioctl->data, |
| 3184 | sizeof(sc->areq.an_len))) { |
| 3185 | return -EFAULT; |
| 3186 | } |
| 3187 | /* Just copy the data back */ |
| 3188 | if (copyout(&(sc->areq.an_val), l_ioctl->data + 2, |
| 3189 | l_ioctl->len)) { |
| 3190 | return -EFAULT; |
| 3191 | } |
| 3192 | return 0; |
| 3193 | } |
| 3194 | |
| 3195 | static int |
| 3196 | writerids(ifp, l_ioctl) |
| 3197 | struct ifnet *ifp; |
| 3198 | struct aironet_ioctl *l_ioctl; |
| 3199 | { |
| 3200 | struct an_softc *sc; |
| 3201 | int rid, command; |
| 3202 | |
| 3203 | sc = ifp->if_softc; |
| 3204 | rid = 0; |
| 3205 | command = l_ioctl->command; |
| 3206 | |
| 3207 | switch (command) { |
| 3208 | case AIROPSIDS: |
| 3209 | rid = AN_RID_SSIDLIST; |
| 3210 | break; |
| 3211 | case AIROPCAP: |
| 3212 | rid = AN_RID_CAPABILITIES; |
| 3213 | break; |
| 3214 | case AIROPAPLIST: |
| 3215 | rid = AN_RID_APLIST; |
| 3216 | break; |
| 3217 | case AIROPCFG: |
| 3218 | rid = AN_RID_GENCONFIG; |
| 3219 | break; |
| 3220 | case AIROPMACON: |
| 3221 | an_cmd(sc, AN_CMD_ENABLE, 0); |
| 3222 | return 0; |
| 3223 | break; |
| 3224 | case AIROPMACOFF: |
| 3225 | an_cmd(sc, AN_CMD_DISABLE, 0); |
| 3226 | return 0; |
| 3227 | break; |
| 3228 | case AIROPSTCLR: |
| 3229 | /* |
| 3230 | * This command merely clears the counts does not actually |
| 3231 | * store any data only reads rid. But as it changes the cards |
| 3232 | * state, I put it in the writerid routines. |
| 3233 | */ |
| 3234 | |
| 3235 | rid = AN_RID_32BITS_DELTACLR; |
| 3236 | sc = ifp->if_softc; |
| 3237 | sc->areq.an_len = AN_MAX_DATALEN; |
| 3238 | sc->areq.an_type = rid; |
| 3239 | |
| 3240 | an_read_record(sc, (struct an_ltv_gen *)&sc->areq); |
| 3241 | l_ioctl->len = sc->areq.an_len - 4; /* just data */ |
| 3242 | |
| 3243 | /* the data contains the length at first */ |
| 3244 | if (copyout(&(sc->areq.an_len), l_ioctl->data, |
| 3245 | sizeof(sc->areq.an_len))) { |
| 3246 | return -EFAULT; |
| 3247 | } |
| 3248 | /* Just copy the data */ |
| 3249 | if (copyout(&(sc->areq.an_val), l_ioctl->data + 2, |
| 3250 | l_ioctl->len)) { |
| 3251 | return -EFAULT; |
| 3252 | } |
| 3253 | return 0; |
| 3254 | break; |
| 3255 | case AIROPWEPKEY: |
| 3256 | rid = AN_RID_WEP_TEMP; |
| 3257 | break; |
| 3258 | case AIROPWEPKEYNV: |
| 3259 | rid = AN_RID_WEP_PERM; |
| 3260 | break; |
| 3261 | case AIROPLEAPUSR: |
| 3262 | rid = AN_RID_LEAPUSERNAME; |
| 3263 | break; |
| 3264 | case AIROPLEAPPWD: |
| 3265 | rid = AN_RID_LEAPPASSWORD; |
| 3266 | break; |
| 3267 | default: |
| 3268 | return -EOPNOTSUPP; |
| 3269 | } |
| 3270 | |
| 3271 | if (rid) { |
| 3272 | if (l_ioctl->len > sizeof(sc->areq.an_val) + 4) |
| 3273 | return -EINVAL; |
| 3274 | sc->areq.an_len = l_ioctl->len + 4; /* add type & length */ |
| 3275 | sc->areq.an_type = rid; |
| 3276 | |
| 3277 | /* Just copy the data back */ |
| 3278 | copyin((l_ioctl->data) + 2, &sc->areq.an_val, |
| 3279 | l_ioctl->len); |
| 3280 | |
| 3281 | an_cmd(sc, AN_CMD_DISABLE, 0); |
| 3282 | an_write_record(sc, (struct an_ltv_gen *)&sc->areq); |
| 3283 | an_cmd(sc, AN_CMD_ENABLE, 0); |
| 3284 | return 0; |
| 3285 | } |
| 3286 | return -EOPNOTSUPP; |
| 3287 | } |
| 3288 | |
| 3289 | /* |
| 3290 | * General Flash utilities derived from Cisco driver additions to Ben Reed's |
| 3291 | * Linux driver |
| 3292 | */ |
| 3293 | |
| 3294 | #define FLASH_DELAY(x) tsleep(ifp, 0, "flash", ((x) / hz) + 1); |
| 3295 | #define FLASH_COMMAND 0x7e7e |
| 3296 | #define FLASH_SIZE 32 * 1024 |
| 3297 | |
| 3298 | static int |
| 3299 | unstickbusy(ifp) |
| 3300 | struct ifnet *ifp; |
| 3301 | { |
| 3302 | struct an_softc *sc = ifp->if_softc; |
| 3303 | |
| 3304 | if (CSR_READ_2(sc, AN_COMMAND(sc->mpi350)) & AN_CMD_BUSY) { |
| 3305 | CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), |
| 3306 | AN_EV_CLR_STUCK_BUSY); |
| 3307 | return 1; |
| 3308 | } |
| 3309 | return 0; |
| 3310 | } |
| 3311 | |
| 3312 | /* |
| 3313 | * Wait for busy completion from card wait for delay uSec's Return true for |
| 3314 | * success meaning command reg is clear |
| 3315 | */ |
| 3316 | |
| 3317 | static int |
| 3318 | WaitBusy(ifp, uSec) |
| 3319 | struct ifnet *ifp; |
| 3320 | int uSec; |
| 3321 | { |
| 3322 | int statword = 0xffff; |
| 3323 | int delay = 0; |
| 3324 | struct an_softc *sc = ifp->if_softc; |
| 3325 | |
| 3326 | while ((statword & AN_CMD_BUSY) && delay <= (1000 * 100)) { |
| 3327 | FLASH_DELAY(10); |
| 3328 | delay += 10; |
| 3329 | statword = CSR_READ_2(sc, AN_COMMAND(sc->mpi350)); |
| 3330 | |
| 3331 | if ((AN_CMD_BUSY & statword) && (delay % 200)) { |
| 3332 | unstickbusy(ifp); |
| 3333 | } |
| 3334 | } |
| 3335 | |
| 3336 | return 0 == (AN_CMD_BUSY & statword); |
| 3337 | } |
| 3338 | |
| 3339 | /* |
| 3340 | * STEP 1) Disable MAC and do soft reset on card. |
| 3341 | */ |
| 3342 | |
| 3343 | static int |
| 3344 | cmdreset(ifp) |
| 3345 | struct ifnet *ifp; |
| 3346 | { |
| 3347 | int status; |
| 3348 | struct an_softc *sc = ifp->if_softc; |
| 3349 | |
| 3350 | an_stop(sc); |
| 3351 | |
| 3352 | an_cmd(sc, AN_CMD_DISABLE, 0); |
| 3353 | |
| 3354 | if (!(status = WaitBusy(ifp, AN_TIMEOUT))) { |
| 3355 | if_printf(ifp, "Waitbusy hang b4 RESET =%d\n", status); |
| 3356 | return -EBUSY; |
| 3357 | } |
| 3358 | CSR_WRITE_2(sc, AN_COMMAND(sc->mpi350), AN_CMD_FW_RESTART); |
| 3359 | |
| 3360 | FLASH_DELAY(1000); /* WAS 600 12/7/00 */ |
| 3361 | |
| 3362 | |
| 3363 | if (!(status = WaitBusy(ifp, 100))) { |
| 3364 | if_printf(ifp, "Waitbusy hang AFTER RESET =%d\n", status); |
| 3365 | return -EBUSY; |
| 3366 | } |
| 3367 | return 0; |
| 3368 | } |
| 3369 | |
| 3370 | /* |
| 3371 | * STEP 2) Put the card in legendary flash mode |
| 3372 | */ |
| 3373 | |
| 3374 | static int |
| 3375 | setflashmode(ifp) |
| 3376 | struct ifnet *ifp; |
| 3377 | { |
| 3378 | int status; |
| 3379 | struct an_softc *sc = ifp->if_softc; |
| 3380 | |
| 3381 | CSR_WRITE_2(sc, AN_SW0(sc->mpi350), FLASH_COMMAND); |
| 3382 | CSR_WRITE_2(sc, AN_SW1(sc->mpi350), FLASH_COMMAND); |
| 3383 | CSR_WRITE_2(sc, AN_SW0(sc->mpi350), FLASH_COMMAND); |
| 3384 | CSR_WRITE_2(sc, AN_COMMAND(sc->mpi350), FLASH_COMMAND); |
| 3385 | |
| 3386 | /* |
| 3387 | * mdelay(500); // 500ms delay |
| 3388 | */ |
| 3389 | |
| 3390 | FLASH_DELAY(500); |
| 3391 | |
| 3392 | if (!(status = WaitBusy(ifp, AN_TIMEOUT))) { |
| 3393 | printf("Waitbusy hang after setflash mode\n"); |
| 3394 | return -EIO; |
| 3395 | } |
| 3396 | return 0; |
| 3397 | } |
| 3398 | |
| 3399 | /* |
| 3400 | * Get a character from the card matching matchbyte Step 3) |
| 3401 | */ |
| 3402 | |
| 3403 | static int |
| 3404 | flashgchar(ifp, matchbyte, dwelltime) |
| 3405 | struct ifnet *ifp; |
| 3406 | int matchbyte; |
| 3407 | int dwelltime; |
| 3408 | { |
| 3409 | int rchar; |
| 3410 | unsigned char rbyte = 0; |
| 3411 | int success = -1; |
| 3412 | struct an_softc *sc = ifp->if_softc; |
| 3413 | |
| 3414 | |
| 3415 | do { |
| 3416 | rchar = CSR_READ_2(sc, AN_SW1(sc->mpi350)); |
| 3417 | |
| 3418 | if (dwelltime && !(0x8000 & rchar)) { |
| 3419 | dwelltime -= 10; |
| 3420 | FLASH_DELAY(10); |
| 3421 | continue; |
| 3422 | } |
| 3423 | rbyte = 0xff & rchar; |
| 3424 | |
| 3425 | if ((rbyte == matchbyte) && (0x8000 & rchar)) { |
| 3426 | CSR_WRITE_2(sc, AN_SW1(sc->mpi350), 0); |
| 3427 | success = 1; |
| 3428 | break; |
| 3429 | } |
| 3430 | if (rbyte == 0x81 || rbyte == 0x82 || rbyte == 0x83 || rbyte == 0x1a || 0xffff == rchar) |
| 3431 | break; |
| 3432 | CSR_WRITE_2(sc, AN_SW1(sc->mpi350), 0); |
| 3433 | |
| 3434 | } while (dwelltime > 0); |
| 3435 | return success; |
| 3436 | } |
| 3437 | |
| 3438 | /* |
| 3439 | * Put character to SWS0 wait for dwelltime x 50us for echo . |
| 3440 | */ |
| 3441 | |
| 3442 | static int |
| 3443 | flashpchar(ifp, byte, dwelltime) |
| 3444 | struct ifnet *ifp; |
| 3445 | int byte; |
| 3446 | int dwelltime; |
| 3447 | { |
| 3448 | int echo; |
| 3449 | int pollbusy, waittime; |
| 3450 | struct an_softc *sc = ifp->if_softc; |
| 3451 | |
| 3452 | byte |= 0x8000; |
| 3453 | |
| 3454 | if (dwelltime == 0) |
| 3455 | dwelltime = 200; |
| 3456 | |
| 3457 | waittime = dwelltime; |
| 3458 | |
| 3459 | /* |
| 3460 | * Wait for busy bit d15 to go false indicating buffer empty |
| 3461 | */ |
| 3462 | do { |
| 3463 | pollbusy = CSR_READ_2(sc, AN_SW0(sc->mpi350)); |
| 3464 | |
| 3465 | if (pollbusy & 0x8000) { |
| 3466 | FLASH_DELAY(50); |
| 3467 | waittime -= 50; |
| 3468 | continue; |
| 3469 | } else |
| 3470 | break; |
| 3471 | } |
| 3472 | while (waittime >= 0); |
| 3473 | |
| 3474 | /* timeout for busy clear wait */ |
| 3475 | |
| 3476 | if (waittime <= 0) { |
| 3477 | if_printf(ifp, "flash putchar busywait timeout!\n"); |
| 3478 | return -1; |
| 3479 | } |
| 3480 | /* |
| 3481 | * Port is clear now write byte and wait for it to echo back |
| 3482 | */ |
| 3483 | do { |
| 3484 | CSR_WRITE_2(sc, AN_SW0(sc->mpi350), byte); |
| 3485 | FLASH_DELAY(50); |
| 3486 | dwelltime -= 50; |
| 3487 | echo = CSR_READ_2(sc, AN_SW1(sc->mpi350)); |
| 3488 | } while (dwelltime >= 0 && echo != byte); |
| 3489 | |
| 3490 | |
| 3491 | CSR_WRITE_2(sc, AN_SW1(sc->mpi350), 0); |
| 3492 | |
| 3493 | return echo == byte; |
| 3494 | } |
| 3495 | |
| 3496 | /* |
| 3497 | * Transfer 32k of firmware data from user buffer to our buffer and send to |
| 3498 | * the card |
| 3499 | */ |
| 3500 | |
| 3501 | static int |
| 3502 | flashputbuf(ifp) |
| 3503 | struct ifnet *ifp; |
| 3504 | { |
| 3505 | unsigned short *bufp; |
| 3506 | int nwords; |
| 3507 | struct an_softc *sc = ifp->if_softc; |
| 3508 | |
| 3509 | /* Write stuff */ |
| 3510 | |
| 3511 | bufp = sc->an_flash_buffer; |
| 3512 | |
| 3513 | if (!sc->mpi350) { |
| 3514 | CSR_WRITE_2(sc, AN_AUX_PAGE, 0x100); |
| 3515 | CSR_WRITE_2(sc, AN_AUX_OFFSET, 0); |
| 3516 | |
| 3517 | for (nwords = 0; nwords != FLASH_SIZE / 2; nwords++) { |
| 3518 | CSR_WRITE_2(sc, AN_AUX_DATA, bufp[nwords] & 0xffff); |
| 3519 | } |
| 3520 | } else { |
| 3521 | for (nwords = 0; nwords != FLASH_SIZE / 4; nwords++) { |
| 3522 | CSR_MEM_AUX_WRITE_4(sc, 0x8000, |
| 3523 | ((u_int32_t *)bufp)[nwords] & 0xffff); |
| 3524 | } |
| 3525 | } |
| 3526 | |
| 3527 | CSR_WRITE_2(sc, AN_SW0(sc->mpi350), 0x8000); |
| 3528 | |
| 3529 | return 0; |
| 3530 | } |
| 3531 | |
| 3532 | /* |
| 3533 | * After flashing restart the card. |
| 3534 | */ |
| 3535 | |
| 3536 | static int |
| 3537 | flashrestart(ifp) |
| 3538 | struct ifnet *ifp; |
| 3539 | { |
| 3540 | int status = 0; |
| 3541 | struct an_softc *sc = ifp->if_softc; |
| 3542 | |
| 3543 | FLASH_DELAY(1024); /* Added 12/7/00 */ |
| 3544 | |
| 3545 | an_init(sc); |
| 3546 | |
| 3547 | FLASH_DELAY(1024); /* Added 12/7/00 */ |
| 3548 | return status; |
| 3549 | } |
| 3550 | |
| 3551 | /* |
| 3552 | * Entry point for flash ioclt. |
| 3553 | */ |
| 3554 | |
| 3555 | static int |
| 3556 | flashcard(ifp, l_ioctl) |
| 3557 | struct ifnet *ifp; |
| 3558 | struct aironet_ioctl *l_ioctl; |
| 3559 | { |
| 3560 | int z = 0, status; |
| 3561 | struct an_softc *sc; |
| 3562 | |
| 3563 | sc = ifp->if_softc; |
| 3564 | if (sc->mpi350) { |
| 3565 | if_printf(ifp, "flashing not supported on MPI 350 yet\n"); |
| 3566 | return(-1); |
| 3567 | } |
| 3568 | status = l_ioctl->command; |
| 3569 | |
| 3570 | switch (l_ioctl->command) { |
| 3571 | case AIROFLSHRST: |
| 3572 | return cmdreset(ifp); |
| 3573 | break; |
| 3574 | case AIROFLSHSTFL: |
| 3575 | if (sc->an_flash_buffer) { |
| 3576 | free(sc->an_flash_buffer, M_DEVBUF); |
| 3577 | sc->an_flash_buffer = NULL; |
| 3578 | } |
| 3579 | sc->an_flash_buffer = malloc(FLASH_SIZE, M_DEVBUF, 0); |
| 3580 | if (sc->an_flash_buffer) |
| 3581 | return setflashmode(ifp); |
| 3582 | else |
| 3583 | return ENOBUFS; |
| 3584 | break; |
| 3585 | case AIROFLSHGCHR: /* Get char from aux */ |
| 3586 | copyin(l_ioctl->data, &sc->areq, l_ioctl->len); |
| 3587 | z = *(int *)&sc->areq; |
| 3588 | if ((status = flashgchar(ifp, z, 8000)) == 1) |
| 3589 | return 0; |
| 3590 | else |
| 3591 | return -1; |
| 3592 | break; |
| 3593 | case AIROFLSHPCHR: /* Send char to card. */ |
| 3594 | copyin(l_ioctl->data, &sc->areq, l_ioctl->len); |
| 3595 | z = *(int *)&sc->areq; |
| 3596 | if ((status = flashpchar(ifp, z, 8000)) == -1) |
| 3597 | return -EIO; |
| 3598 | else |
| 3599 | return 0; |
| 3600 | break; |
| 3601 | case AIROFLPUTBUF: /* Send 32k to card */ |
| 3602 | if (l_ioctl->len > FLASH_SIZE) { |
| 3603 | if_printf(ifp, "Buffer to big, %x %x\n", |
| 3604 | l_ioctl->len, FLASH_SIZE); |
| 3605 | return -EINVAL; |
| 3606 | } |
| 3607 | copyin(l_ioctl->data, sc->an_flash_buffer, l_ioctl->len); |
| 3608 | |
| 3609 | if ((status = flashputbuf(ifp)) != 0) |
| 3610 | return -EIO; |
| 3611 | else |
| 3612 | return 0; |
| 3613 | break; |
| 3614 | case AIRORESTART: |
| 3615 | if ((status = flashrestart(ifp)) != 0) { |
| 3616 | if_printf(ifp, "FLASHRESTART returned %d\n", status); |
| 3617 | return -EIO; |
| 3618 | } else |
| 3619 | return 0; |
| 3620 | |
| 3621 | break; |
| 3622 | default: |
| 3623 | return -EINVAL; |
| 3624 | } |
| 3625 | |
| 3626 | return -EINVAL; |
| 3627 | } |