Remove upc_{control,register} syscalls and everything that has to do with it.
[dragonfly.git] / sys / platform / pc64 / x86_64 / ipl.s
... / ...
CommitLineData
1/*
2 * Copyright (c) 2008 The DragonFly Project. All rights reserved.
3 *
4 * This code is derived from software contributed to The DragonFly Project
5 * by Matthew Dillon <dillon@backplane.com>
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 *
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in
15 * the documentation and/or other materials provided with the
16 * distribution.
17 * 3. Neither the name of The DragonFly Project nor the names of its
18 * contributors may be used to endorse or promote products derived
19 * from this software without specific, prior written permission.
20 *
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
24 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
25 * COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
26 * INCIDENTAL, SPECIAL, EXEMPLARY OR CONSEQUENTIAL DAMAGES (INCLUDING,
27 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
28 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
29 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
31 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
32 * SUCH DAMAGE.
33 *
34 * ---
35 *
36 * Copyright (c) 1989, 1990 William F. Jolitz.
37 * Copyright (c) 1990 The Regents of the University of California.
38 * All rights reserved.
39 *
40 * This code is derived from software contributed to Berkeley by
41 * William Jolitz.
42 *
43 * Redistribution and use in source and binary forms, with or without
44 * modification, are permitted provided that the following conditions
45 * are met:
46 * 1. Redistributions of source code must retain the above copyright
47 * notice, this list of conditions and the following disclaimer.
48 * 2. Redistributions in binary form must reproduce the above copyright
49 * notice, this list of conditions and the following disclaimer in the
50 * documentation and/or other materials provided with the distribution.
51 * 3. All advertising materials mentioning features or use of this software
52 * must display the following acknowledgement:
53 * This product includes software developed by the University of
54 * California, Berkeley and its contributors.
55 * 4. Neither the name of the University nor the names of its contributors
56 * may be used to endorse or promote products derived from this software
57 * without specific prior written permission.
58 *
59 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
60 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
61 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
62 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
63 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
64 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
65 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
66 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
67 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
68 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
69 * SUCH DAMAGE.
70 *
71 * @(#)ipl.s
72 *
73 * $FreeBSD: src/sys/i386/isa/ipl.s,v 1.32.2.3 2002/05/16 16:03:56 bde Exp $
74 */
75
76#include <machine/asmacros.h>
77#include <machine/segments.h>
78#include <machine/ipl.h>
79#include <machine/lock.h>
80#include <machine/psl.h>
81#include <machine/trap.h>
82
83#include "assym.s"
84
85/*
86 * AT/386
87 * Vector interrupt control section
88 *
89 * ipending - Pending interrupts (set when a masked interrupt occurs)
90 * spending - Pending software interrupts
91 */
92 .data
93 ALIGN_DATA
94
95 .globl fastunpend_count
96fastunpend_count: .long 0
97
98 .text
99 SUPERALIGN_TEXT
100
101 /*
102 * GENERAL NOTES
103 *
104 * - interrupts are always called with a critical section held
105 *
106 * - we release our critical section when scheduling interrupt
107 * or softinterrupt threads in order so they can preempt
108 * (unless we are called manually from a critical section, in
109 * which case there will still be a critical section and
110 * they won't preempt anyway).
111 *
112 * - TD_NEST_COUNT prevents splz from nesting too deeply within
113 * itself. It is *not* actually an interrupt nesting count.
114 * PCPU(intr_nesting_level) is an interrupt nesting count.
115 *
116 * - We have to be careful in regards to local interrupts
117 * occuring simultaniously with our doreti and splz
118 * processing.
119 *
120 * - Interrupts must be enabled when calling higher level
121 * functions in order to avoid deadlocking against things
122 * like smp_invltlb.
123 */
124
125 /*
126 * DORETI
127 *
128 * Handle return from interrupts, traps and syscalls. This function
129 * checks the cpl for unmasked pending interrupts (hardware or soft)
130 * and schedules them if appropriate, then irets.
131 *
132 * If we are in a critical section we cannot run any pending ints.
133 *
134 * The stack contains a trapframe at the start of doreti.
135 */
136 SUPERALIGN_TEXT
137 .globl doreti
138 .type doreti,@function
139doreti:
140 FAKE_MCOUNT(bintr) /* init "from" bintr -> doreti */
141 movq $0,%rax /* irq mask unavailable due to BGL */
142 movq PCPU(curthread),%rbx
143 cli /* interlock with critical section */
144 cmpl $0,PCPU(reqflags) /* short cut if nothing to do */
145 je 5f
146 testl $-1,TD_CRITCOUNT(%rbx) /* can't unpend if in critical sec */
147 jne 5f
148 incl TD_CRITCOUNT(%rbx) /* force all ints to pending */
149doreti_next:
150 cli /* re-assert cli on loop */
151 movq %rax,%rcx /* irq mask unavailable due to BGL */
152 notq %rcx
153 testl $RQF_IPIQ,PCPU(reqflags)
154 jnz doreti_ipiq
155 testl $RQF_TIMER,PCPU(reqflags)
156 jnz doreti_timer
157 /*
158 * check for an unmasked int (3 groups)
159 */
160 movq $0,%rdx
161 testq PCPU_E8(ipending,%rdx),%rcx
162 jnz doreti_fast
163
164 movq $1,%rdx
165 testq PCPU_E8(ipending,%rdx),%rcx
166 jnz doreti_fast
167
168 movq $2,%rdx
169 testq PCPU_E8(ipending,%rdx),%rcx
170 jnz doreti_fast
171
172 movl PCPU(spending),%ecx /* check for a pending software int */
173 cmpl $0,%ecx
174 jnz doreti_soft
175
176 testl $RQF_AST_MASK,PCPU(reqflags) /* any pending ASTs? */
177 jz 2f
178
179 /* ASTs are only applicable when returning to userland */
180 testb $SEL_RPL_MASK,TF_CS(%rsp)
181 jnz doreti_ast
1822:
183 /*
184 * Nothing left to do, finish up. Interrupts are still disabled.
185 * %eax contains the mask of IRQ's that are not available due to
186 * BGL requirements. We can only clear RQF_INTPEND if *ALL* pending
187 * interrupts have been processed.
188 */
189 decl TD_CRITCOUNT(%rbx) /* interlocked with cli */
190 testl %eax,%eax
191 jnz 5f
192 andl $~RQF_INTPEND,PCPU(reqflags)
1935:
194 MEXITCOUNT
195
196 /*
197 * (interrupts are disabled here)
198 *
199 * Restore register and iret. iret can fault on %rip (which is
200 * really stupid). If this occurs we re-fault and vector to
201 * doreti_iret_fault().
202 *
203 * ...
204 * can be set from user mode, this can result in a kernel mode
205 * exception. The trap code will revector to the *_fault code
206 * which then sets up a T_PROTFLT signal. If the signal is
207 * sent to userland, sendsig() will automatically clean up all
208 * the segment registers to avoid a loop.
209 */
210 .globl doreti_iret
211 .globl doreti_syscall_ret
212doreti_syscall_ret:
213 POP_FRAME /* registers and %gs (+cli) */
214 /* WARNING: special global doreti_iret is also used by exception.S */
215doreti_iret:
216 iretq
217
218 /*
219 * doreti_iret_fault. Alternative return code for the case where
220 * we get a fault in the doreti_exit code above. trap()
221 * (sys/platform/pc64/x86_64/trap.c) catches this specific * case,
222 * sends the process a signal and continues in the corresponding
223 * place in the code below.
224 *
225 * Interrupts are likely disabled due to the above interlock
226 * between cli/iretq. We must enable them before calling any
227 * high level function.
228 */
229 ALIGN_TEXT
230 .globl doreti_iret_fault
231doreti_iret_fault:
232 PUSH_FRAME_NOSWAP
233 sti
234 movq $T_PROTFLT,TF_TRAPNO(%rsp)
235 movq $0,TF_ERR(%rsp) /* XXX should be the error code */
236 movq $0,TF_ADDR(%rsp)
237 FAKE_MCOUNT(TF_RIP(%rsp))
238 jmp calltrap
239
240 /*
241 * Interrupt pending. NOTE: stack context holds frame structure
242 * for interrupt procedure, do not do random pushes or pops!
243 */
244 ALIGN_TEXT
245doreti_fast:
246 andq PCPU_E8(ipending,%rdx),%rcx
247 sti
248 bsfq %rcx, %rcx /* locate the next dispatchable int */
249 btrq %rcx, PCPU_E8(ipending,%rdx)
250 /* is it really still pending? */
251 jnc doreti_next
252
253 shlq $6, %rdx
254 orq %rdx, %rcx /* form intr number */
255
256 pushq %rax /* save IRQ mask unavailable for BGL */
257 /* NOTE: is also CPL in frame */
258 call dofastunpend /* unpend intr %rcx */
259 popq %rax
260 jmp doreti_next
261
262 /*
263 * SOFT interrupt pending
264 *
265 * Temporarily back-out our critical section to allow an interrupt
266 * preempt us when we schedule it. Bump intr_nesting_level to
267 * prevent the switch code from recursing via splz too deeply.
268 */
269 ALIGN_TEXT
270doreti_soft:
271 sti
272 bsfl %ecx,%ecx /* locate the next pending softint */
273 btrl %ecx,PCPU(spending) /* make sure its still pending */
274 jnc doreti_next
275 addl $FIRST_SOFTINT,%ecx /* actual intr number */
276 pushq %rax
277 movl %ecx,%edi /* argument to C call */
278 incl TD_NEST_COUNT(%rbx) /* prevent doreti/splz nesting */
279 decl TD_CRITCOUNT(%rbx) /* so we can preempt */
280 call sched_ithd_soft /* YYY must pull in imasks */
281 incl TD_CRITCOUNT(%rbx)
282 decl TD_NEST_COUNT(%rbx)
283 popq %rax
284 jmp doreti_next
285
286 /*
287 * AST pending. We clear RQF_AST_SIGNAL automatically, the others
288 * are cleared by the trap as they are processed.
289 *
290 * Temporarily back-out our critical section because trap() can be
291 * a long-winded call, and we want to be more syscall-like.
292 *
293 * YYY theoretically we can call lwkt_switch directly if all we need
294 * to do is a reschedule.
295 */
296doreti_ast:
297 andl $~RQF_AST_SIGNAL,PCPU(reqflags)
298 sti
299 movl %eax,%r12d /* save cpl (can't use stack) */
300 movl $T_ASTFLT,TF_TRAPNO(%rsp)
301 movq %rsp,%rdi /* pass frame by ref (%edi = C arg) */
302 decl TD_CRITCOUNT(%rbx)
303 call trap
304 incl TD_CRITCOUNT(%rbx)
305 movl %r12d,%eax /* restore cpl for loop */
306 jmp doreti_next
307
308 /*
309 * IPIQ message pending. We clear RQF_IPIQ automatically.
310 */
311doreti_ipiq:
312 movl %eax,%r12d /* save cpl (can't use stack) */
313 incl PCPU(intr_nesting_level)
314 andl $~RQF_IPIQ,PCPU(reqflags)
315 sti
316 subq $8,%rsp /* trapframe->intrframe */
317 movq %rsp,%rdi /* pass frame by ref (C arg) */
318 call lwkt_process_ipiq_frame
319 addq $8,%rsp /* intrframe->trapframe */
320 decl PCPU(intr_nesting_level)
321 movl %r12d,%eax /* restore cpl for loop */
322 jmp doreti_next
323
324doreti_timer:
325 movl %eax,%r12d /* save cpl (can't use stack) */
326 incl PCPU(intr_nesting_level)
327 andl $~RQF_TIMER,PCPU(reqflags)
328 sti
329 subq $8,%rsp /* trapframe->intrframe */
330 movq %rsp,%rdi /* pass frame by ref (C arg) */
331 call lapic_timer_process_frame
332 addq $8,%rsp /* intrframe->trapframe */
333 decl PCPU(intr_nesting_level)
334 movl %r12d,%eax /* restore cpl for loop */
335 jmp doreti_next
336
337 /*
338 * SPLZ() a C callable procedure to dispatch any unmasked pending
339 * interrupts regardless of critical section nesting. ASTs
340 * are not dispatched.
341 *
342 * Use %eax to track those IRQs that could not be processed
343 * due to BGL requirements.
344 */
345 SUPERALIGN_TEXT
346
347ENTRY(splz)
348 pushfq
349 pushq %rbx
350 movq PCPU(curthread),%rbx
351 incl TD_CRITCOUNT(%rbx)
352 movq $0,%rax
353
354splz_next:
355 cli
356 movq %rax,%rcx /* rcx = ~CPL */
357 notq %rcx
358 testl $RQF_IPIQ,PCPU(reqflags)
359 jnz splz_ipiq
360 testl $RQF_TIMER,PCPU(reqflags)
361 jnz splz_timer
362 /*
363 * check for an unmasked int (3 groups)
364 */
365 movq $0,%rdx
366 testq PCPU_E8(ipending,%rdx),%rcx
367 jnz splz_fast
368
369 movq $1,%rdx
370 testq PCPU_E8(ipending,%rdx),%rcx
371 jnz splz_fast
372
373 movq $2,%rdx
374 testq PCPU_E8(ipending,%rdx),%rcx
375 jnz splz_fast
376
377 movl PCPU(spending),%ecx
378 cmpl $0,%ecx
379 jnz splz_soft
380
381 decl TD_CRITCOUNT(%rbx)
382
383 /*
384 * Nothing left to do, finish up. Interrupts are still disabled.
385 * If our mask of IRQs we couldn't process due to BGL requirements
386 * is 0 then there are no pending interrupt sources left and we
387 * can clear RQF_INTPEND.
388 */
389 testl %eax,%eax
390 jnz 5f
391 andl $~RQF_INTPEND,PCPU(reqflags)
3925:
393 popq %rbx
394 popfq
395 ret
396
397 /*
398 * Interrupt pending
399 */
400 ALIGN_TEXT
401splz_fast:
402 andq PCPU_E8(ipending,%rdx),%rcx
403 sti
404 bsfq %rcx, %rcx /* locate the next dispatchable int */
405 btrq %rcx, PCPU_E8(ipending,%rdx)
406 /* is it really still pending? */
407 jnc splz_next
408
409 shlq $6, %rdx
410 orq %rdx, %rcx /* form intr number */
411
412 pushq %rax
413 call dofastunpend /* unpend intr %rcx */
414 popq %rax
415 jmp splz_next
416
417 /*
418 * SOFT interrupt pending
419 *
420 * Temporarily back-out our critical section to allow the interrupt
421 * preempt us.
422 */
423 ALIGN_TEXT
424splz_soft:
425 sti
426 bsfl %ecx,%ecx /* locate the next pending softint */
427 btrl %ecx,PCPU(spending) /* make sure its still pending */
428 jnc splz_next
429 addl $FIRST_SOFTINT,%ecx /* actual intr number */
430 sti
431 pushq %rax
432 movl %ecx,%edi /* C argument */
433 incl TD_NEST_COUNT(%rbx) /* prevent doreti/splz nesting */
434 decl TD_CRITCOUNT(%rbx)
435 call sched_ithd_soft /* YYY must pull in imasks */
436 incl TD_CRITCOUNT(%rbx)
437 decl TD_NEST_COUNT(%rbx) /* prevent doreti/splz nesting */
438 popq %rax
439 jmp splz_next
440
441splz_ipiq:
442 andl $~RQF_IPIQ,PCPU(reqflags)
443 sti
444 pushq %rax
445 call lwkt_process_ipiq
446 popq %rax
447 jmp splz_next
448
449splz_timer:
450 andl $~RQF_TIMER,PCPU(reqflags)
451 sti
452 pushq %rax
453 call lapic_timer_process
454 popq %rax
455 jmp splz_next
456
457 /*
458 * dofastunpend(%rcx:intr)
459 *
460 * A interrupt previously made pending can now be run,
461 * execute it by pushing a dummy interrupt frame and
462 * calling ithread_fast_handler to execute or schedule it.
463 *
464 * ithread_fast_handler() returns 0 if it wants us to unmask
465 * further interrupts.
466 */
467#define PUSH_DUMMY \
468 pushfq ; /* phys int frame / flags */ \
469 xorq %rax,%rax ; /* something not SEL_UPL */ \
470 pushq %rax ; /* phys int frame / cs */ \
471 pushq 3*8(%rsp) ; /* original caller eip */ \
472 subq $TF_RIP,%rsp ; /* trap frame */ \
473 movq $0,TF_XFLAGS(%rsp) ; /* extras */ \
474 movq $0,TF_TRAPNO(%rsp) ; /* extras */ \
475 movq $0,TF_ADDR(%rsp) ; /* extras */ \
476 movq $0,TF_FLAGS(%rsp) ; /* extras */ \
477 movq $0,TF_ERR(%rsp) ; /* extras */ \
478
479#define POP_DUMMY \
480 addq $TF_RIP+(3*8),%rsp ; \
481
482dofastunpend:
483 pushq %rbp /* frame for backtrace */
484 movq %rsp,%rbp
485 PUSH_DUMMY
486 pushq %rcx /* last part of intrframe = intr */
487 incl fastunpend_count
488 movq %rsp,%rdi /* pass frame by reference C arg */
489 call ithread_fast_handler /* returns 0 to unmask */
490 popq %rdi /* intrframe->trapframe */
491 /* + also rdi C arg to next call */
492 cmpl $0,%eax
493 jnz 1f
494 movq MachIntrABI + MACHINTR_INTREN, %rax
495 callq *%rax /* MachIntrABI.intren(intr) */
4961:
497 POP_DUMMY
498 popq %rbp
499 ret
500